checkpoint

diff --git a/include/opcode/txvu.h b/include/opcode/txvu.h
index 4f7a6ed..81f916f 100644 (file)
--- a/include/opcode/txvu.h
+++ b/include/opcode/txvu.h
@@ -91,38 +91,31 @@ struct txvu_operand {
    prints these symbolically if possible.  */
 #define TXVU_OPERAND_ADDRESS 8
 
-/* This operand is a long immediate value.  */
-#define TXVU_OPERAND_LIMM 0x10
-
-/* This operand takes unsigned values (default is signed).  */
-#define TXVU_OPERAND_UNSIGNED 0x20
+/* This operand takes signed values (default is unsigned).
+   The default was chosen to be unsigned as most fields are unsigned
+   (e.g. registers).  */
+#define TXVU_OPERAND_SIGNED 0x10
 
 /* This operand takes signed values, but also accepts a full positive
    range of values.  That is, if bits is 16, it takes any value from
    -0x8000 to 0xffff.  */
-#define TXVU_OPERAND_SIGNOPT 0x40
+#define TXVU_OPERAND_SIGNOPT 0x20
 
 /* This operand should be regarded as a negative number for the
    purposes of overflow checking (i.e., the normal most negative
    number is disallowed and one more than the normal most positive
    number is allowed).  This flag will only be set for a signed
    operand.  */
-#define TXVU_OPERAND_NEGATIVE 0x80
+#define TXVU_OPERAND_NEGATIVE 0x40
 
 /* This operand doesn't really exist.  The program uses these operands
    in special ways.  */
-#define TXVU_OPERAND_FAKE 0x100
+#define TXVU_OPERAND_FAKE 0x80
 
 /* Modifier values.  */
 /* A dot is required before a suffix.  Eg: .le  */
 #define TXVU_MOD_DOT 0x1000
 
-/* A normal register is allowed (not used, but here for completeness).  */
-#define TXVU_MOD_REG 0x2000
-
-/* An auxiliary register name is expected.  */
-#define TXVU_MOD_AUXREG 0x4000
-
 /* Sum of all TXVU_MOD_XXX bits.  */
 #define TXVU_MOD_BITS 0x7000
 
@@ -198,19 +191,23 @@ struct txvu_operand {
 #define TXVU_SHIFT_SREG 11
 #define TXVU_SHIFT_DREG 6
 #define TXVU_MASK_REG 31
+/* Bits for multiple dest choices.  */
 #define TXVU_DEST_X 8
 #define TXVU_DEST_Y 4
 #define TXVU_DEST_Z 2
 #define TXVU_DEST_W 1
-#define TXVU_BC_X 0
-#define TXVU_BC_Y 1
-#define TXVU_BC_Z 2
-#define TXVU_BC_W 3
+/* Values for a single dest choice.  */
+#define TXVU_SDEST_X 0
+#define TXVU_SDEST_Y 1
+#define TXVU_SDEST_Z 2
+#define TXVU_SDEST_W 3
 
 extern const struct txvu_operand txvu_operands[];
 extern const int txvu_operand_count;
-extern /*const*/ struct txvu_opcode txvu_opcodes[];
-extern const int txvu_opcodes_count;
+extern /*const*/ struct txvu_opcode txvu_upper_opcodes[];
+extern /*const*/ struct txvu_opcode txvu_lower_opcodes[];
+extern const int txvu_upper_opcodes_count;
+extern const int txvu_lower_opcodes_count;
 
 /* Utility fns in txvu-opc.c.  */
 void txvu_opcode_init_tables PARAMS ((int));

diff --git a/opcodes/txvu-dis.c b/opcodes/txvu-dis.c
index d30bf22..8652f12 100644 (file)
--- a/opcodes/txvu-dis.c
+++ b/opcodes/txvu-dis.c
@@ -162,7 +162,7 @@ print_insn (pc, info, insn, lower_p)
          else
            {
              value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
-             if ((operand->flags & TXVU_OPERAND_SIGNED)
+             if ((operand->flags & TXVU_OPERAND_SIGNED) != 0
                  && (value & (1 << (operand->bits - 1))))
                value -= 1 << operand->bits;
            }

diff --git a/opcodes/txvu-opc.c b/opcodes/txvu-opc.c
index 53e0a8c..000b4b4 100644 (file)
--- a/opcodes/txvu-opc.c
+++ b/opcodes/txvu-opc.c
@@ -149,17 +149,17 @@ const struct txvu_operand txvu_operands[] =
 
   /* Lower word operands.  */
 
-  /* 11 bit immediate.  */
+  /* 5 bit signed immediate.  */
 #define LIMM5 (UXYZ + 1)
-  { 5, 6, 0, 0, 0, 0, 0 },
+  { 5, 6, TXVU_OPERAND_SIGNED, 0, 0, 0, 0 },
 
-  /* 11 bit immediate.  */
+  /* 11 bit signed immediate.  */
 #define LIMM11 (LIMM5 + 1)
-  { 11, 0, 0, 0, 0, 0, 0 },
+  { 11, 0, TXVU_OPERAND_SIGNED, 0, 0, 0, 0 },
 
   /* 15 bit unsigned immediate.  */
 #define LUIMM15 (LIMM11 + 1)
-  { 15, 0, TXVU_OPERAND_UNSIGNED, 0, insert_luimm15, extract_luimm15, 0 },
+  { 15, 0, 0, 0, insert_luimm15, extract_luimm15, 0 },
 
   /* ID register.  */
 #define LIDREG (LUIMM15 + 1)
@@ -189,12 +189,12 @@ const struct txvu_operand txvu_operands[] =
 #define LVI01 (LFTFFTREG + 1)
   { 0, 0, TXVU_OPERAND_FAKE, parse_vi01, 0, 0, print_vi01 },
 
-  /* 24 bit immediate.  */
-#define LIMM24 (LVI01 + 1)
+  /* 24 bit unsigned immediate.  */
+#define LUIMM24 (LVI01 + 1)
   { 24, 0, 0, 0, 0, 0, 0 },
 
   /* 12 bit unsigned immediate, split into 1 and 11 bit pieces.  */
-#define LUIMM12 (LIMM24 + 1)
+#define LUIMM12 (LUIMM24 + 1)
   { 12, 0, 0, 0, insert_luimm12, extract_luimm12, 0 },
 
   /* 11 bit pc-releative immediate.  */
@@ -358,7 +358,7 @@ struct txvu_opcode txvu_upper_opcodes[] = {
   { "subaq", { DOTDEST, SP, UACCDEST, VFSREG, 'q' }, MURES + MT + MUOP11, VUOP11 (0x27c) },
   { "suba", { UBC, DOTDEST, SP, UACCDEST, VFSREG, UBCFTREG }, MURES + MUOP9, VUOP9 (0x1f) }
 };
-const int txvu_upper_opcodes_count = sizeof (txvu_upper_opcodes) / sizeof (txvu_opcodes[0]);
+const int txvu_upper_opcodes_count = sizeof (txvu_upper_opcodes) / sizeof (txvu_upper_opcodes[0]);
 \f
 /* Lower instruction Value macros.  */
 
@@ -414,11 +414,11 @@ struct txvu_opcode txvu_lower_opcodes[] = {
   { "esin", { SP, 'p', LFSFFSREG }, MLOP7 + VLFTF (~0) + MT + MLOP11, VLOP7 (0x40) + VLOP11 (0x7fc) },
   { "esqrt", { SP, 'p', LFSFFSREG }, MLOP7 + VLFTF (~0) + MT + MLOP11, VLOP7 (0x40) + VLOP11 (0x7bc) },
   { "esum", { SP, 'p', LFSREG }, MLOP7 + MDEST + MT + MLOP11, VLOP7 (0x40) + VDEST (0xf) + VLOP11 (0x77e) },
-  { "fcand", { SP, LVI01, LIMM24 }, MLOP7 + MLB24, VLOP7 (0x12) },
-  { "fceq", { SP, LVI01, LIMM24 }, MLOP7 + MLB24, VLOP7 (0x10) },
+  { "fcand", { SP, LVI01, LUIMM24 }, MLOP7 + MLB24, VLOP7 (0x12) },
+  { "fceq", { SP, LVI01, LUIMM24 }, MLOP7 + MLB24, VLOP7 (0x10) },
   { "fcget", { SP, LITREG }, MLOP7 + MDEST + MS + MLIMM11, VLOP7 (0x1c) },
-  { "fcor", { SP, LVI01, LIMM24 }, MLOP7 + MLB24, VLOP7 (0x13) },
-  { "fcset", { SP, LVI01, LIMM24 }, MLOP7 + MLB24, VLOP7 (0x11) },
+  { "fcor", { SP, LVI01, LUIMM24 }, MLOP7 + MLB24, VLOP7 (0x13) },
+  { "fcset", { SP, LVI01, LUIMM24 }, MLOP7 + MLB24, VLOP7 (0x11) },
   { "fmand", { SP, LITREG, LISREG }, MLOP7 + MDEST + MLIMM11, VLOP7 (0x1a) },
   { "fmeq", { SP, LITREG, LISREG }, MLOP7 + MDEST + MLIMM11, VLOP7 (0x18) },
   { "fmor", { SP, LITREG, LISREG }, MLOP7 + MDEST + MLIMM11, VLOP7 (0x1b) },
@@ -472,7 +472,7 @@ struct txvu_opcode txvu_lower_opcodes[] = {
   { "xitop", { LITREG }, MLOP7 + MDEST + MS + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x6bd) },
   { "xtop", { LITREG }, MLOP7 + MDEST + MS + MLIMM11, VLOP7 (0x40) + VLIMM11 (0x6bc) }
 };
-const int txvu_lower_opcodes_count = sizeof (txvu_lower_opcodes) / sizeof (txvu_opcodes[0]);
+const int txvu_lower_opcodes_count = sizeof (txvu_lower_opcodes) / sizeof (txvu_lower_opcodes[0]);
 \f
 /* Indexed by first letter of opcode.  Points to chain of opcodes with same
    first letter.  */