GenTreeIntCon* op2 = cmp->gtGetOp2()->AsIntCon();
ssize_t op2Value = op2->IconValue();
- if (m_lsra->isContainableMemoryOp(op1) && varTypeIsSmall(op1Type) && genTypeCanRepresentValue(op1Type, op2Value))
+ if (IsContainableMemoryOp(op1) && varTypeIsSmall(op1Type) && genTypeCanRepresentValue(op1Type, op2Value))
{
//
// If op1's type is small then try to narrow op2 so it has the same type as op1.
// the result of bool returning calls.
//
- if (castOp->OperIs(GT_CALL, GT_LCL_VAR) || castOp->OperIsLogical() || m_lsra->isContainableMemoryOp(castOp))
+ if (castOp->OperIs(GT_CALL, GT_LCL_VAR) || castOp->OperIsLogical() || IsContainableMemoryOp(castOp))
{
assert(!castOp->gtOverflowEx()); // Must not be an overflow checking operation
andOp1->ClearContained();
andOp2->ClearContained();
- if (m_lsra->isContainableMemoryOp(andOp1) && andOp2->IsIntegralConst())
+ if (IsContainableMemoryOp(andOp1) && andOp2->IsIntegralConst())
{
//
// For "test" we only care about the bits that are set in the second operand (mask).
// everything is made explicit by adding casts.
assert(dividend->TypeGet() == divisor->TypeGet());
- if (m_lsra->isContainableMemoryOp(divisor) || divisor->IsCnsNonZeroFltOrDbl())
+ if (IsContainableMemoryOp(divisor) || divisor->IsCnsNonZeroFltOrDbl())
{
MakeSrcContained(node, divisor);
}
#endif
// divisor can be an r/m, but the memory indirection must be of the same size as the divide
- if (m_lsra->isContainableMemoryOp(divisor) && (divisor->TypeGet() == node->TypeGet()))
+ if (IsContainableMemoryOp(divisor) && (divisor->TypeGet() == node->TypeGet()))
{
MakeSrcContained(node, divisor);
}
{
assert(node->OperGet() == GT_MUL);
- if (m_lsra->isContainableMemoryOp(op2) || op2->IsCnsNonZeroFltOrDbl())
+ if (IsContainableMemoryOp(op2) || op2->IsCnsNonZeroFltOrDbl())
{
MakeSrcContained(node, op2);
}
- else if (op1->IsCnsNonZeroFltOrDbl() || (m_lsra->isContainableMemoryOp(op1) && IsSafeToContainMem(node, op1)))
+ else if (op1->IsCnsNonZeroFltOrDbl() || (IsContainableMemoryOp(op1) && IsSafeToContainMem(node, op1)))
{
// Since GT_MUL is commutative, we will try to re-order operands if it is safe to
// generate more efficient code sequence for the case of GT_MUL(op1=memOp, op2=non-memOp)
}
MakeSrcContained(node, imm); // The imm is always contained
- if (m_lsra->isContainableMemoryOp(other))
+ if (IsContainableMemoryOp(other))
{
memOp = other; // memOp may be contained below
}
//
if (memOp == nullptr)
{
- if (m_lsra->isContainableMemoryOp(op2) && (op2->TypeGet() == node->TypeGet()) && IsSafeToContainMem(node, op2))
+ if (IsContainableMemoryOp(op2) && (op2->TypeGet() == node->TypeGet()) && IsSafeToContainMem(node, op2))
{
memOp = op2;
}
- else if (m_lsra->isContainableMemoryOp(op1) && (op1->TypeGet() == node->TypeGet()) && IsSafeToContainMem(node, op1))
+ else if (IsContainableMemoryOp(op1) && (op1->TypeGet() == node->TypeGet()) && IsSafeToContainMem(node, op1))
{
memOp = op1;
}
// U8 -> R8 conversion requires that the operand be in a register.
if (srcType != TYP_ULONG)
{
- if (m_lsra->isContainableMemoryOp(castOp) || castOp->IsCnsNonZeroFltOrDbl())
+ if (IsContainableMemoryOp(castOp) || castOp->IsCnsNonZeroFltOrDbl())
{
MakeSrcContained(node, castOp);
}
{
MakeSrcContained(cmp, otherOp);
}
- else if (m_lsra->isContainableMemoryOp(otherOp) && ((otherOp == op2) || IsSafeToContainMem(cmp, otherOp)))
+ else if (IsContainableMemoryOp(otherOp) && ((otherOp == op2) || IsSafeToContainMem(cmp, otherOp)))
{
MakeSrcContained(cmp, otherOp);
}
// we can treat the MemoryOp as contained.
if (op1Type == op2Type)
{
- if (m_lsra->isContainableMemoryOp(op1))
+ if (IsContainableMemoryOp(op1))
{
MakeSrcContained(cmp, op1);
}
// Note that TEST does not have a r,rm encoding like CMP has but we can still
// contain the second operand because the emitter maps both r,rm and rm,r to
// the same instruction code. This avoids the need to special case TEST here.
- if (m_lsra->isContainableMemoryOp(op2))
+ if (IsContainableMemoryOp(op2))
{
MakeSrcContained(cmp, op2);
}
- else if (m_lsra->isContainableMemoryOp(op1) && IsSafeToContainMem(cmp, op1))
+ else if (IsContainableMemoryOp(op1) && IsSafeToContainMem(cmp, op1))
{
MakeSrcContained(cmp, op1);
}
// On Xarch RMW operations require the source to be an immediate or in a register.
// Therefore, if we have previously marked the indirOpSource as contained while lowering
// the binary node, we need to reset that now.
- if (m_lsra->isContainableMemoryOp(indirOpSource))
+ if (IsContainableMemoryOp(indirOpSource))
{
indirOpSource->ClearContained();
}
if (!binOpInRMW)
{
const unsigned operatorSize = genTypeSize(node->TypeGet());
- if (m_lsra->isContainableMemoryOp(op2) && (genTypeSize(op2->TypeGet()) == operatorSize))
+ if (IsContainableMemoryOp(op2) && (genTypeSize(op2->TypeGet()) == operatorSize))
{
directlyEncodable = true;
operand = op2;
else if (node->OperIsCommutative())
{
if (IsContainableImmed(node, op1) ||
- (m_lsra->isContainableMemoryOp(op1) && (genTypeSize(op1->TypeGet()) == operatorSize) &&
+ (IsContainableMemoryOp(op1) && (genTypeSize(op1->TypeGet()) == operatorSize) &&
IsSafeToContainMem(node, op1)))
{
// If it is safe, we can reverse the order of operands of commutative operations for efficient
{
other = node->gtIndex;
}
- else if (m_lsra->isContainableMemoryOp(node->gtIndex))
+ else if (IsContainableMemoryOp(node->gtIndex))
{
other = node->gtIndex;
}
if (node->gtIndex->TypeGet() == node->gtArrLen->TypeGet())
{
- if (m_lsra->isContainableMemoryOp(other))
+ if (IsContainableMemoryOp(other))
{
MakeSrcContained(node, other);
}
if (node->gtIntrinsic.gtIntrinsicId == CORINFO_INTRINSIC_Sqrt)
{
GenTree* op1 = node->gtGetOp1();
- if (m_lsra->isContainableMemoryOp(op1) || op1->IsCnsNonZeroFltOrDbl())
+ if (IsContainableMemoryOp(op1) || op1->IsCnsNonZeroFltOrDbl())
{
MakeSrcContained(node, op1);
}
// If the index is a constant, mark it as contained.
CheckImmedAndMakeContained(simdNode, op2);
- if (m_lsra->isContainableMemoryOp(op1))
+ if (IsContainableMemoryOp(op1))
{
MakeSrcContained(simdNode, op1);
if (op1->OperGet() == GT_IND)
// everything is made explicit by adding casts.
assert(op1->TypeGet() == op2->TypeGet());
- if (m_lsra->isContainableMemoryOp(op2) || op2->IsCnsNonZeroFltOrDbl())
+ if (IsContainableMemoryOp(op2) || op2->IsCnsNonZeroFltOrDbl())
{
MakeSrcContained(node, op2);
}
else if (node->OperIsCommutative() &&
- (op1->IsCnsNonZeroFltOrDbl() || (m_lsra->isContainableMemoryOp(op1) && IsSafeToContainMem(node, op1))))
+ (op1->IsCnsNonZeroFltOrDbl() || (IsContainableMemoryOp(op1) && IsSafeToContainMem(node, op1))))
{
// Though we have GT_ADD(op1=memOp, op2=non-memOp, we try to reorder the operands
// as long as it is safe so that the following efficient code sequence is generated:
delayUseSrc = op1;
}
else if ((op2 != nullptr) &&
- (!tree->OperIsCommutative() || (isContainableMemoryOp(op2) && (op2->gtLsraInfo.srcCount == 0))))
+ (!tree->OperIsCommutative() || (isContainableMemoryOp(op2) && (op2->gtLsraInfo.srcCount == 0))))
{
delayUseSrc = op2;
}
switch (tree->OperGet())
{
// These Opers either support a three op form (i.e. GT_LEA), or do not read/write their first operand
- case GT_LEA:
- case GT_STOREIND:
- case GT_ARR_INDEX:
- case GT_STORE_BLK:
- case GT_STORE_OBJ:
- return false;
+ case GT_LEA:
+ case GT_STOREIND:
+ case GT_ARR_INDEX:
+ case GT_STORE_BLK:
+ case GT_STORE_OBJ:
+ return false;
// x86/x64 does support a three op multiply when op2|op1 is a contained immediate
- case GT_MUL:
- return (!tree->gtOp.gtOp2->isContainedIntOrIImmed() && !tree->gtOp.gtOp1->isContainedIntOrIImmed());
+ case GT_MUL:
+ return (!tree->gtOp.gtOp2->isContainedIntOrIImmed() && !tree->gtOp.gtOp1->isContainedIntOrIImmed());
- default:
- return true;
+ default:
+ return true;
}
}
//
void LinearScan::TreeNodeInfoInitReturn(GenTree* tree)
{
- TreeNodeInfo* info = &(tree->gtLsraInfo);
- GenTree* op1 = tree->gtGetOp1();
+ TreeNodeInfo* info = &(tree->gtLsraInfo);
+ GenTree* op1 = tree->gtGetOp1();
#if !defined(_TARGET_64BIT_)
if (tree->TypeGet() == TYP_LONG)
//
void LinearScan::TreeNodeInfoInitBlockStore(GenTreeBlk* blkNode)
{
- GenTree* dstAddr = blkNode->Addr();
- unsigned size = blkNode->gtBlkSize;
- GenTree* source = blkNode->Data();
+ GenTree* dstAddr = blkNode->Addr();
+ unsigned size = blkNode->gtBlkSize;
+ GenTree* source = blkNode->Data();
// Sources are dest address, initVal or source.
// We may require an additional source or temp register for the size.
//
void LinearScan::TreeNodeInfoInitLclHeap(GenTree* tree)
{
- TreeNodeInfo* info = &(tree->gtLsraInfo);
+ TreeNodeInfo* info = &(tree->gtLsraInfo);
info->srcCount = 1;
assert(info->dstCount == 1);
}
else
{
- assert(simdTree->gtSIMDBaseType == TYP_INT && compiler->getSIMDInstructionSet() >= InstructionSet_SSE3_4);
+ assert(simdTree->gtSIMDBaseType == TYP_INT &&
+ compiler->getSIMDInstructionSet() >= InstructionSet_SSE3_4);
// No need to set isInternalRegDelayFree since targetReg is a
// an int type reg and guaranteed to be different from xmm/ymm
}
else
#endif
- if ((compiler->getSIMDInstructionSet() == InstructionSet_AVX) || (simdTree->gtSIMDBaseType == TYP_ULONG))
+ if ((compiler->getSIMDInstructionSet() == InstructionSet_AVX) ||
+ (simdTree->gtSIMDBaseType == TYP_ULONG))
{
info->internalFloatCount = 2;
}