mmc: sdhci-brcmstb: Add ability to increase max clock rate for 72116b0

The 72116B0 has improved SDIO controllers that allow the max clock
rate to be increased from a max of 100MHz to a max of 150MHz. The
driver will need to get the clock and increase it's default rate
and override the caps register, that still indicates a max of 100MHz.
The new clock will be named "sdio_freq" in the DT node's "clock-names"
list. The driver will use a DT property, "clock-frequency", to
enable this functionality and will get the actual rate in MHz
from the property to allow various speeds to be requested.

Signed-off-by: Al Cooper <alcooperx@gmail.com>
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20220520183108.47358-3-kdasu.kdev@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c
index 8eb57de..f8dff85 100644 (file)
--- a/drivers/mmc/host/sdhci-brcmstb.c
+++ b/drivers/mmc/host/sdhci-brcmstb.c
@@ -31,6 +31,8 @@
 struct sdhci_brcmstb_priv {
        void __iomem *cfg_regs;
        unsigned int flags;
+       struct clk *base_clk;
+       u32 base_freq_hz;
 };
 
 struct brcmstb_match_priv {
@@ -250,9 +252,11 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
        struct sdhci_pltfm_host *pltfm_host;
        const struct of_device_id *match;
        struct sdhci_brcmstb_priv *priv;
+       u32 actual_clock_mhz;
        struct sdhci_host *host;
        struct resource *iomem;
        struct clk *clk;
+       struct clk *base_clk;
        int res;
 
        match = of_match_node(sdhci_brcm_of_match, pdev->dev.of_node);
@@ -330,6 +334,35 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
        if (match_priv->flags & BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT)
                host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
 
+       /* Change the base clock frequency if the DT property exists */
+       if (device_property_read_u32(&pdev->dev, "clock-frequency",
+                                    &priv->base_freq_hz) != 0)
+               goto add_host;
+
+       base_clk = devm_clk_get_optional(&pdev->dev, "sdio_freq");
+       if (IS_ERR(base_clk)) {
+               dev_warn(&pdev->dev, "Clock for \"sdio_freq\" not found\n");
+               goto add_host;
+       }
+
+       res = clk_prepare_enable(base_clk);
+       if (res)
+               goto err;
+
+       /* set improved clock rate */
+       clk_set_rate(base_clk, priv->base_freq_hz);
+       actual_clock_mhz = clk_get_rate(base_clk) / 1000000;
+
+       host->caps &= ~SDHCI_CLOCK_V3_BASE_MASK;
+       host->caps |= (actual_clock_mhz << SDHCI_CLOCK_BASE_SHIFT);
+       /* Disable presets because they are now incorrect */
+       host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
+
+       dev_dbg(&pdev->dev, "Base Clock Frequency changed to %dMHz\n",
+               actual_clock_mhz);
+       priv->base_clk = base_clk;
+
+add_host:
        res = sdhci_brcmstb_add_host(host, priv);
        if (res)
                goto err;
@@ -340,6 +373,7 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
 err:
        sdhci_pltfm_free(pdev);
 err_clk:
+       clk_disable_unprepare(base_clk);
        clk_disable_unprepare(clk);
        return res;
 }
@@ -351,11 +385,44 @@ static void sdhci_brcmstb_shutdown(struct platform_device *pdev)
 
 MODULE_DEVICE_TABLE(of, sdhci_brcm_of_match);
 
+#ifdef CONFIG_PM_SLEEP
+static int sdhci_brcmstb_suspend(struct device *dev)
+{
+       struct sdhci_host *host = dev_get_drvdata(dev);
+       struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+       struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host);
+
+       clk_disable_unprepare(priv->base_clk);
+       return sdhci_pltfm_suspend(dev);
+}
+
+static int sdhci_brcmstb_resume(struct device *dev)
+{
+       struct sdhci_host *host = dev_get_drvdata(dev);
+       struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+       struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host);
+       int ret;
+
+       ret = sdhci_pltfm_resume(dev);
+       if (!ret && priv->base_freq_hz) {
+               ret = clk_prepare_enable(priv->base_clk);
+               if (!ret)
+                       ret = clk_set_rate(priv->base_clk, priv->base_freq_hz);
+       }
+
+       return ret;
+}
+#endif
+
+static const struct dev_pm_ops sdhci_brcmstb_pmops = {
+       SET_SYSTEM_SLEEP_PM_OPS(sdhci_brcmstb_suspend, sdhci_brcmstb_resume)
+};
+
 static struct platform_driver sdhci_brcmstb_driver = {
        .driver         = {
                .name   = "sdhci-brcmstb",
                .probe_type = PROBE_PREFER_ASYNCHRONOUS,
-               .pm     = &sdhci_pltfm_pmops,
+               .pm     = &sdhci_brcmstb_pmops,
                .of_match_table = of_match_ptr(sdhci_brcm_of_match),
        },
        .probe          = sdhci_brcmstb_probe,