%r = select i1 %c, i64 %x.neg, i64 %x
ret i64 %r
}
+
+define i64 @f4_sge_0(i64 %x) {
+; CHECK-LE-LABEL: f4_sge_0:
+; CHECK-LE: # %bb.0:
+; CHECK-LE-NEXT: neg r4, r3
+; CHECK-LE-NEXT: cmpdi r3, -1
+; CHECK-LE-NEXT: iselgt r3, r4, r3
+; CHECK-LE-NEXT: blr
+;
+; CHECK-32-LABEL: f4_sge_0:
+; CHECK-32: # %bb.0:
+; CHECK-32-NEXT: subfic r5, r4, 0
+; CHECK-32-NEXT: subfze r6, r3
+; CHECK-32-NEXT: cmpwi r3, -1
+; CHECK-32-NEXT: bc 12, gt, .LBB5_1
+; CHECK-32-NEXT: blr
+; CHECK-32-NEXT: .LBB5_1:
+; CHECK-32-NEXT: addi r3, r6, 0
+; CHECK-32-NEXT: addi r4, r5, 0
+; CHECK-32-NEXT: blr
+ %c = icmp sge i64 %x, 0
+ %x.neg = sub i64 0, %x
+ %r = select i1 %c, i64 %x.neg, i64 %x
+ ret i64 %r
+}
+
+define i64 @f4_slt_0(i64 %x) {
+; CHECK-LE-LABEL: f4_slt_0:
+; CHECK-LE: # %bb.0:
+; CHECK-LE-NEXT: neg r4, r3
+; CHECK-LE-NEXT: cmpdi r3, 0
+; CHECK-LE-NEXT: isellt r3, r3, r4
+; CHECK-LE-NEXT: blr
+;
+; CHECK-32-LABEL: f4_slt_0:
+; CHECK-32: # %bb.0:
+; CHECK-32-NEXT: subfic r5, r4, 0
+; CHECK-32-NEXT: subfze r6, r3
+; CHECK-32-NEXT: cmpwi r3, 0
+; CHECK-32-NEXT: bclr 12, lt, 0
+; CHECK-32-NEXT: # %bb.1:
+; CHECK-32-NEXT: ori r3, r6, 0
+; CHECK-32-NEXT: ori r4, r5, 0
+; CHECK-32-NEXT: blr
+ %c = icmp slt i64 %x, 0
+ %x.neg = sub i64 0, %x
+ %r = select i1 %c, i64 %x, i64 %x.neg
+ ret i64 %r
+}
+
+define i64 @f4_sle_0(i64 %x) {
+; CHECK-LE-LABEL: f4_sle_0:
+; CHECK-LE: # %bb.0:
+; CHECK-LE-NEXT: neg r4, r3
+; CHECK-LE-NEXT: cmpdi r3, 1
+; CHECK-LE-NEXT: isellt r3, r3, r4
+; CHECK-LE-NEXT: blr
+;
+; CHECK-32-LABEL: f4_sle_0:
+; CHECK-32: # %bb.0:
+; CHECK-32-NEXT: cmplwi r3, 0
+; CHECK-32-NEXT: cmpwi cr1, r3, 0
+; CHECK-32-NEXT: crandc 4*cr5+lt, 4*cr1+lt, eq
+; CHECK-32-NEXT: cmpwi cr1, r4, 0
+; CHECK-32-NEXT: subfic r5, r4, 0
+; CHECK-32-NEXT: crand 4*cr5+gt, eq, 4*cr1+eq
+; CHECK-32-NEXT: cror 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
+; CHECK-32-NEXT: subfze r6, r3
+; CHECK-32-NEXT: bclr 12, 4*cr5+lt, 0
+; CHECK-32-NEXT: # %bb.1:
+; CHECK-32-NEXT: ori r3, r6, 0
+; CHECK-32-NEXT: ori r4, r5, 0
+; CHECK-32-NEXT: blr
+ %c = icmp sle i64 %x, 0
+ %x.neg = sub i64 0, %x
+ %r = select i1 %c, i64 %x, i64 %x.neg
+ ret i64 %r
+}
+
+define i64 @f4_sgt_m1(i64 %x) {
+; CHECK-LE-LABEL: f4_sgt_m1:
+; CHECK-LE: # %bb.0:
+; CHECK-LE-NEXT: neg r4, r3
+; CHECK-LE-NEXT: cmpdi r3, -1
+; CHECK-LE-NEXT: iselgt r3, r4, r3
+; CHECK-LE-NEXT: blr
+;
+; CHECK-32-LABEL: f4_sgt_m1:
+; CHECK-32: # %bb.0:
+; CHECK-32-NEXT: subfic r5, r4, 0
+; CHECK-32-NEXT: subfze r6, r3
+; CHECK-32-NEXT: cmpwi r3, -1
+; CHECK-32-NEXT: bc 12, gt, .LBB8_1
+; CHECK-32-NEXT: blr
+; CHECK-32-NEXT: .LBB8_1:
+; CHECK-32-NEXT: addi r3, r6, 0
+; CHECK-32-NEXT: addi r4, r5, 0
+; CHECK-32-NEXT: blr
+ %c = icmp sgt i64 %x, -1
+ %x.neg = sub i64 0, %x
+ %r = select i1 %c, i64 %x.neg, i64 %x
+ ret i64 %r
+}