arm64: dts: renesas: white-hawk-cpu: Add Ethernet support
authorGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 9 Sep 2022 09:54:01 +0000 (11:54 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 19 Sep 2022 11:53:46 +0000 (13:53 +0200)
Describe the wiring of the first Ethernet AVB instance to the Micrel
KSZ9031RNXVB PHY.

Based on a larger patch in the BSP by Takeshi Kihara.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/50a31bc8267ab4c90bff27ef3aca1169f8ebc7ae.1662715538.git.geert+renesas@glider.be
arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi

index e382b2d5c8d49fd30f990b1b45dfa6e736b8db30..77f0130a2f856ddb4bd19d9c54030ea4ab34b825 100644 (file)
@@ -16,6 +16,7 @@
        compatible = "renesas,white-hawk-cpu", "renesas,r8a779g0";
 
        aliases {
+               ethernet0 = &avb0;
                serial0 = &hscif0;
        };
 
        };
 };
 
+&avb0 {
+       pinctrl-0 = <&avb0_pins>;
+       pinctrl-names = "default";
+       phy-handle = <&phy0>;
+       tx-internal-delay-ps = <2000>;
+       status = "okay";
+
+       phy0: ethernet-phy@0 {
+               compatible = "ethernet-phy-id0022.1622",
+                            "ethernet-phy-ieee802.3-c22";
+               rxc-skew-ps = <1500>;
+               reg = <0>;
+               interrupt-parent = <&gpio7>;
+               interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+               reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
+       };
+};
+
 &extal_clk {
        clock-frequency = <16666666>;
 };
        pinctrl-0 = <&scif_clk_pins>;
        pinctrl-names = "default";
 
+       avb0_pins: avb0 {
+               mux {
+                       groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
+                                "avb0_txcrefclk";
+                       function = "avb0";
+               };
+
+               pins_mdio {
+                       groups = "avb0_mdio";
+                       drive-strength = <21>;
+               };
+
+               pins_mii {
+                       groups = "avb0_rgmii";
+                       drive-strength = <21>;
+               };
+
+       };
        hscif0_pins: hscif0 {
                groups = "hscif0_data";
                function = "hscif0";