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ARM: zynq: DT: Enable all FCLKs by default
author
Christian Kohn
<christian.kohn@xilinx.com>
Wed, 12 Oct 2022 09:30:33 +0000
(11:30 +0200)
committer
Michal Simek
<michal.simek@amd.com>
Tue, 22 Nov 2022 14:02:07 +0000
(15:02 +0100)
The fclk-enable property is set to 0 which disables all FCLKs.
Enable all FCLKs so they can be used as clock sources in the
programmable logic.
Signed-off-by: Christian Kohn <christian.kohn@xilinx.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link:
https://lore.kernel.org/r/b1308dc1f14f8eb24662019f7376c959e5e763b8.1665567031.git.michal.simek@amd.com
arch/arm/dts/zynq-7000.dtsi
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diff --git
a/arch/arm/dts/zynq-7000.dtsi
b/arch/arm/dts/zynq-7000.dtsi
index
edc147d
..
f72ef52
100644
(file)
--- a/
arch/arm/dts/zynq-7000.dtsi
+++ b/
arch/arm/dts/zynq-7000.dtsi
@@
-340,7
+340,7
@@
u-boot,dm-pre-reloc;
#clock-cells = <1>;
compatible = "xlnx,ps7-clkc";
- fclk-enable = <0>;
+ fclk-enable = <0
xf
>;
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
"cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x",
"dci", "lqspi", "smc", "pcap", "gem0", "gem1",