tegra: define CONFIG_SYS_CACHELINE_SIZE for tegra
authorAnton staaf <robotboy@chromium.org>
Mon, 3 Oct 2011 13:54:58 +0000 (13:54 +0000)
committerWolfgang Denk <wd@denx.de>
Tue, 25 Oct 2011 07:25:02 +0000 (09:25 +0200)
Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Tom Warren <twarren.nvidia@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Change-Id: I5c4bcfc0bfe59158ff249fe3be6640eec6d3cc76
Acked-by: Mike Frysinger <vapier@gentoo.org>
include/configs/tegra2-common.h

index 73e0f05..a9c665c 100644 (file)
@@ -33,6 +33,8 @@
 #define CONFIG_MACH_TEGRA_GENERIC      /* which is a Tegra generic machine */
 #define CONFIG_SYS_L2CACHE_OFF         /* No L2 cache */
 
+#define CONFIG_SYS_CACHELINE_SIZE      32
+
 #define CONFIG_ENABLE_CORTEXA9         /* enable CPU (A9 complex) */
 
 #include <asm/arch/tegra2.h>           /* get chip and board defs */