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i965/gen6: Fix the size of the GS surface binding table.
author
Eric Anholt
<eric@anholt.net>
Tue, 21 Feb 2012 20:56:29 +0000
(12:56 -0800)
committer
Eric Anholt
<eric@anholt.net>
Tue, 21 Feb 2012 21:30:39 +0000
(13:30 -0800)
I obviously didn't test on gen6 before pushing.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_context.h
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diff --git
a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index
8edd004
..
09d8373
100644
(file)
--- a/
src/mesa/drivers/dri/i965/brw_context.h
+++ b/
src/mesa/drivers/dri/i965/brw_context.h
@@
-870,7
+870,7
@@
struct brw_context
uint32_t state_offset;
uint32_t bind_bo_offset;
- uint32_t surf_offset[BRW_MAX_
V
S_SURFACES];
+ uint32_t surf_offset[BRW_MAX_
G
S_SURFACES];
} gs;
struct {