dt-bindings: dp83867: Convert fifo-depth to common fifo-depth and make optional
authorDan Murphy <dmurphy@ti.com>
Mon, 9 Dec 2019 20:10:24 +0000 (14:10 -0600)
committerDavid S. Miller <davem@davemloft.net>
Tue, 10 Dec 2019 04:19:10 +0000 (20:19 -0800)
Convert the ti,fifo-depth from a TI specific property to the common
tx-fifo-depth property.  Also add support for the rx-fifo-depth.

These are optional properties for this device and if these are not
available then the fifo depths are set to device default values.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reported-by: Adrian Bunk <bunk@kernel.org>
CC: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Documentation/devicetree/bindings/net/ti,dp83867.txt

index 388ff48..44e2a4f 100644 (file)
@@ -8,8 +8,6 @@ Required properties:
        - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
                for applicable values. Required only if interface type is
                PHY_INTERFACE_MODE_RGMII_ID or PHY_INTERFACE_MODE_RGMII_TXID
-       - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
-               for applicable values
 
 Note: If the interface type is PHY_INTERFACE_MODE_RGMII the TX/RX clock delays
       will be left at their default values, as set by the PHY's pin strapping.
@@ -42,6 +40,14 @@ Optional property:
                                    Some MACs work with differential SGMII clock.
                                    See data manual for details.
 
+       - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
+               for applicable values (deprecated)
+
+       -tx-fifo-depth - As defined in the ethernet-controller.yaml.  Values for
+                        the depth can be found in dt-bindings/net/ti-dp83867.h
+       -rx-fifo-depth - As defined in the ethernet-controller.yaml.  Values for
+                        the depth can be found in dt-bindings/net/ti-dp83867.h
+
 Note: ti,min-output-impedance and ti,max-output-impedance are mutually
       exclusive. When both properties are present ti,max-output-impedance
       takes precedence.
@@ -55,7 +61,7 @@ Example:
                reg = <0>;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
                ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>;
-               ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+               tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
        };
 
 Datasheet can be found: