tools: socfpgaimage: Add check params function for Arria 10 (v1)

Add check params function for Arria 10 (header v1).

From [1] page 42, entry point offset should be 4 bytes aligned and
any value smaller than 0x14 is invalid.

Rename existing socfpgaimage_check_params() for v0.

[1]: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_soc_eds.pdf

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

diff --git a/tools/socfpgaimage.c b/tools/socfpgaimage.c
index 6dfd64e..f71b3d5 100644 (file)
--- a/tools/socfpgaimage.c
+++ b/tools/socfpgaimage.c
@@ -62,6 +62,9 @@
 #define HEADER_OFFSET  0x40
 #define VALIDATION_WORD        0x31305341
 
+/* Minimum and default entry point offset */
+#define ENTRY_POINT_OFFSET     0x14
+
 static uint8_t buffer_v0[0x10000];
 static uint8_t buffer_v1[0x40000];
 
@@ -275,7 +278,7 @@ static void socfpgaimage_print_header(const void *ptr)
                printf("Not a sane SOCFPGA preloader\n");
 }
 
-static int socfpgaimage_check_params(struct image_tool_params *params)
+static int socfpgaimage_check_params_v0(struct image_tool_params *params)
 {
        /* Not sure if we should be accepting fflags */
        return  (params->dflag && (params->fflag || params->lflag)) ||
@@ -283,6 +286,26 @@ static int socfpgaimage_check_params(struct image_tool_params *params)
                (params->lflag && (params->dflag || params->fflag));
 }
 
+static int socfpgaimage_check_params_v1(struct image_tool_params *params)
+{
+       /*
+        * If the entry point is specified, ensure it is >= ENTRY_POINT_OFFSET
+        * and it is 4 bytes aligned.
+        */
+       if (params->eflag && (params->ep < ENTRY_POINT_OFFSET ||
+                             params->ep % 4 != 0)) {
+               fprintf(stderr,
+                       "Error: Entry point must be greater than 0x%x.\n",
+                       ENTRY_POINT_OFFSET);
+               return -1;
+       }
+
+       /* Not sure if we should be accepting fflags */
+       return  (params->dflag && (params->fflag || params->lflag)) ||
+               (params->fflag && (params->dflag || params->lflag)) ||
+               (params->lflag && (params->dflag || params->fflag));
+}
+
 static int socfpgaimage_check_image_types_v0(uint8_t type)
 {
        if (type == IH_TYPE_SOCFPGAIMAGE)
@@ -377,7 +400,7 @@ U_BOOT_IMAGE_TYPE(
        "Altera SoCFPGA Cyclone V / Arria V image support",
        0, /* This will be modified by vrec_header() */
        (void *)buffer_v0,
-       socfpgaimage_check_params,
+       socfpgaimage_check_params_v0,
        socfpgaimage_verify_header,
        socfpgaimage_print_header,
        socfpgaimage_set_header_v0,
@@ -392,7 +415,7 @@ U_BOOT_IMAGE_TYPE(
        "Altera SoCFPGA Arria10 image support",
        0, /* This will be modified by vrec_header() */
        (void *)buffer_v1,
-       socfpgaimage_check_params,
+       socfpgaimage_check_params_v1,
        socfpgaimage_verify_header,
        socfpgaimage_print_header,
        socfpgaimage_set_header_v1,