dt-bindings: mailbox: imx-mu: add i.MX8 SECO MU support
authorPeng Fan <peng.fan@nxp.com>
Mon, 7 Feb 2022 01:52:09 +0000 (09:52 +0800)
committerJassi Brar <jaswinder.singh@linaro.org>
Sun, 13 Mar 2022 01:27:02 +0000 (19:27 -0600)
Similar to i.MX8QM/QXP SCU, i.MX8 SECO MU is dedicated for
communication between SECO and Cortex-A cores from hardware design,
it could not be reused for other purpose. To use SECO MU more
effectivly, add "fsl,imx8-mu-seco" compatile to support fast IPC.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Documentation/devicetree/bindings/mailbox/fsl,mu.yaml

index a337bcd..f865b80 100644 (file)
@@ -28,6 +28,7 @@ properties:
       - const: fsl,imx7ulp-mu
       - const: fsl,imx8ulp-mu
       - const: fsl,imx8-mu-scu
+      - const: fsl,imx8-mu-seco
       - const: fsl,imx8ulp-mu-s4
       - items:
           - enum: