target-ppc: change DCR helpers to target_long arguments

The recent transition to always have the DCR helper functions take 32 bit
values broke the PPC64 target, as target_long became 64 bits there.

This patch changes DCR helpers to target_long arguments, and cast the values
to 32 bit when needed.

Fixes PPC64 build with --enable-debug-tcg

Based on a patch from Alexander Graf <agraf@suse.de>
Reported-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 40d4ced..5cf6cd4 100644 (file)
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -359,8 +359,8 @@ DEF_HELPER_2(divo, tl, tl, tl)
 DEF_HELPER_2(divs, tl, tl, tl)
 DEF_HELPER_2(divso, tl, tl, tl)
 
-DEF_HELPER_1(load_dcr, i32, i32);
-DEF_HELPER_2(store_dcr, void, i32, i32)
+DEF_HELPER_1(load_dcr, tl, tl);
+DEF_HELPER_2(store_dcr, void, tl, tl)
 
 DEF_HELPER_1(load_dump_spr, void, i32)
 DEF_HELPER_1(store_dump_spr, void, i32)

diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index f905c64..8f2ee98 100644 (file)
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -1828,7 +1828,7 @@ target_ulong helper_602_mfrom (target_ulong arg)
 /* Embedded PowerPC specific helpers */
 
 /* XXX: to be improved to check access rights when in user-mode */
-uint32_t helper_load_dcr (uint32_t dcrn)
+target_ulong helper_load_dcr (target_ulong dcrn)
 {
     uint32_t val = 0;
 
@@ -1836,22 +1836,22 @@ uint32_t helper_load_dcr (uint32_t dcrn)
         qemu_log("No DCR environment\n");
         helper_raise_exception_err(POWERPC_EXCP_PROGRAM,
                                    POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL);
-    } else if (unlikely(ppc_dcr_read(env->dcr_env, dcrn, &val) != 0)) {
-        qemu_log("DCR read error %d %03x\n", dcrn, dcrn);
+    } else if (unlikely(ppc_dcr_read(env->dcr_env, (uint32_t)dcrn, &val) != 0)) {
+        qemu_log("DCR read error %d %03x\n", (uint32_t)dcrn, (uint32_t)dcrn);
         helper_raise_exception_err(POWERPC_EXCP_PROGRAM,
                                    POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
     }
     return val;
 }
 
-void helper_store_dcr (uint32_t dcrn, uint32_t val)
+void helper_store_dcr (target_ulong dcrn, target_ulong val)
 {
     if (unlikely(env->dcr_env == NULL)) {
         qemu_log("No DCR environment\n");
         helper_raise_exception_err(POWERPC_EXCP_PROGRAM,
                                    POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL);
-    } else if (unlikely(ppc_dcr_write(env->dcr_env, dcrn, val) != 0)) {
-        qemu_log("DCR write error %d %03x\n", dcrn, dcrn);
+    } else if (unlikely(ppc_dcr_write(env->dcr_env, (uint32_t)dcrn, (uint32_t)val) != 0)) {
+        qemu_log("DCR write error %d %03x\n", (uint32_t)dcrn, (uint32_t)dcrn);
         helper_raise_exception_err(POWERPC_EXCP_PROGRAM,
                                    POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
     }