arm64/sme: Implement context switching for ZT0

When the system supports SME2 the ZT0 register must be context switched as
part of the floating point state. This register is stored immediately
after ZA in memory and is only accessible when PSTATE.ZA is set so we
handle it in the same functions we use to save and restore ZA.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20221208-arm64-sme2-v4-10-f2fa0aef982f@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index 8df769c206778c6e1ff243ebd97fadfa6282bb1c..0ce4465644fcd3e5ed74f1f1acb89fe8cd745016 100644 (file)
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h
@@ -119,8 +119,8 @@ extern void sve_flush_live(bool flush_ffr, unsigned long vq_minus_1);
 extern unsigned int sve_get_vl(void);
 extern void sve_set_vq(unsigned long vq_minus_1);
 extern void sme_set_vq(unsigned long vq_minus_1);
-extern void za_save_state(void *state);
-extern void za_load_state(void const *state);
+extern void sme_save_state(void *state, int zt);
+extern void sme_load_state(void const *state, int zt);
 
 struct arm64_cpu_capabilities;
 extern void sve_kernel_enable(const struct arm64_cpu_capabilities *__unused);

diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S
index 229436f33df5affb02df5552f62adbe053b72eef..6325db1a2179cf5ddfefd9ea32cb5abce2bd2c7c 100644 (file)
--- a/arch/arm64/kernel/entry-fpsimd.S
+++ b/arch/arm64/kernel/entry-fpsimd.S
@@ -100,25 +100,35 @@ SYM_FUNC_START(sme_set_vq)
 SYM_FUNC_END(sme_set_vq)
 
 /*
- * Save the SME state
+ * Save the ZA and ZT state
  *
  * x0 - pointer to buffer for state
+ * x1 - number of ZT registers to save
  */
-SYM_FUNC_START(za_save_state)
-       _sme_rdsvl      1, 1            // x1 = VL/8
-       sme_save_za 0, x1, 12
+SYM_FUNC_START(sme_save_state)
+       _sme_rdsvl      2, 1            // x2 = VL/8
+       sme_save_za 0, x2, 12           // Leaves x0 pointing to the end of ZA
+
+       cbz     x1, 1f
+       _str_zt 0
+1:
        ret
-SYM_FUNC_END(za_save_state)
+SYM_FUNC_END(sme_save_state)
 
 /*
- * Load the SME state
+ * Load the ZA and ZT state
  *
  * x0 - pointer to buffer for state
+ * x1 - number of ZT registers to save
  */
-SYM_FUNC_START(za_load_state)
-       _sme_rdsvl      1, 1            // x1 = VL/8
-       sme_load_za 0, x1, 12
+SYM_FUNC_START(sme_load_state)
+       _sme_rdsvl      2, 1            // x2 = VL/8
+       sme_load_za 0, x2, 12           // Leaves x0 pointing to the end of ZA
+
+       cbz     x1, 1f
+       _ldr_zt 0
+1:
        ret
-SYM_FUNC_END(za_load_state)
+SYM_FUNC_END(sme_load_state)
 
 #endif /* CONFIG_ARM64_SME */

diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index 717ae4aaa0218ccb72b3db35eba56ebb5f0a4678..cec8b43e7888cf01d53e76ba369a6dd09fd9a730 100644 (file)
--- a/arch/arm64/kernel/fpsimd.c
+++ b/arch/arm64/kernel/fpsimd.c
@@ -429,7 +429,8 @@ static void task_fpsimd_load(void)
                write_sysreg_s(current->thread.svcr, SYS_SVCR);
 
                if (thread_za_enabled(&current->thread))
-                       za_load_state(current->thread.sme_state);
+                       sme_load_state(current->thread.sme_state,
+                                      system_supports_sme2());
 
                if (thread_sm_enabled(&current->thread))
                        restore_ffr = system_supports_fa64();
@@ -490,7 +491,8 @@ static void fpsimd_save(void)
                *svcr = read_sysreg_s(SYS_SVCR);
 
                if (*svcr & SVCR_ZA_MASK)
-                       za_save_state(last->sme_state);
+                       sme_save_state(last->sme_state,
+                                      system_supports_sme2());
 
                /* If we are in streaming mode override regular SVE. */
                if (*svcr & SVCR_SM_MASK) {