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README_PACKAGERS
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aix5libc.supp
file
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-840b3ede98d29dc6d96432121c694ffb
-2010-07-01T02:37:23.193360Z
-11201
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coregrind
dir
- Added new memcheck command-line option --show-possibly-lost.
+- Support for analyzing programs running under Wine with has been improved.
+ The header files <valgrind/valgrind.h>, <valgrind/memcheck.h> and
+ <valgrind/drd.h> can now be used in Windows-programs compiled with MinGW
+ or one of the Microsoft Visual Studio compilers.
+
+- DRD does now have two new command-line options: --free-is-write and
+ --trace-alloc. The former allows to detect reading from already freed
+ memory, and the latter allows to trace all memory allocations and
+ deallocations.
+
+- Several new annotations have been added in DRD: custom barrier
+ implementations can now be annotated and benign races on static variables
+ too.
+
+- The happens before / happens after annotations in DRD have been made more
+ powerful such that these can now also be used to annotate e.g. a smart
+ pointer implementation.
+
Release 3.5.0 (19 August 2009)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
AM_CONDITIONAL([HAVE_BUILTIN_ATOMIC], [test x$ac_have_builtin_atomic = xyes])
-# Check for __builtin_frame_address() support
-AC_MSG_CHECKING([if gcc supports __builtin_frame_address])
-
-AC_TRY_COMPILE(
-[
-], [
- __builtin_frame_address(0);
- return 0;
-],
-[
-ac_have_builtin_frame_address=yes
-AC_MSG_RESULT([yes])
-AC_DEFINE([HAVE_BUILTIN_FRAME_ADDRESS], 1,
- [Define to 1 if your compiler supports __builtin_frame_address.])
-], [
-ac_have_builtin_frame_address=no
-AC_MSG_RESULT([no])
-])
-CFLAGS=$safe_CFLAGS
-
-AM_CONDITIONAL(HAVE_BUILTIN_FRAME_ADDRESS,
- test x$ac_have_builtin_frame_address = xyes)
-
#----------------------------------------------------------------------------
# Ok. We're done checking.
#----------------------------------------------------------------------------
# Memcheck
##----------------------------------------------------------------------##
+# afaict this is legit. Might be caused by setenv("VAR=")
+# where the value string is empty (not sure)
+{
+ macos-Cond-7
+ Memcheck:Cond
+ fun:__setenv
+}
+
# From Jesse Ruderman.
{
Mac OS X 10.6.4. rdar://8145289. "new[]" paired with "delete" in the DesktopServicesPriv framework.
Memcheck:Cond
fun:_ZN13HIMenuBarView31SetAdjustTextTitleBoundsAtIndexEih
fun:_ZN13HIMenuBarView15MeasureAppMenusEv
- }
+}
+
+{
+ TFontFeatures::TFontFeatures(CGFont*) (in CoreText.framework)
+ Memcheck:Cond
+ fun:_ZN13TFontFeaturesC2EP6CGFont
+ fun:_ZNK9TBaseFont12CopyFeaturesEv
+}
- Added new memcheck command-line option --show-possibly-lost.
+- Support for analyzing programs running under Wine with has been improved.
+ The header files <valgrind/valgrind.h>, <valgrind/memcheck.h> and
+ <valgrind/drd.h> can now be used in Windows-programs compiled with MinGW
+ or one of the Microsoft Visual Studio compilers.
+
+- DRD does now have two new command-line options: --free-is-write and
+ --trace-alloc. The former allows to detect reading from already freed
+ memory, and the latter allows to trace all memory allocations and
+ deallocations.
+
+- Several new annotations have been added in DRD: custom barrier
+ implementations can now be annotated and benign races on static variables
+ too.
+
+- The happens before / happens after annotations in DRD have been made more
+ powerful such that these can now also be used to annotate e.g. a smart
+ pointer implementation.
+
Release 3.5.0 (19 August 2009)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10
dir
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svn://svn.valgrind.org/vex
-2010-10-06T20:47:22.726851Z
-2062
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sewardj
has-props
-2010-10-07T07:09:42.451340Z
+2010-10-08T04:47:04.479072Z
ee6d2ed60064b69fa8adec0855d2cb74
2004-11-25T13:08:26.233479Z
587
10
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svn://svn.valgrind.org/vex/trunk/auxprogs
svn://svn.valgrind.org/vex
10
dir
-2062
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svn://svn.valgrind.org/vex/trunk/docs
svn://svn.valgrind.org/vex
10
dir
-2062
+2064
svn://svn.valgrind.org/vex/trunk/orig_amd64
svn://svn.valgrind.org/vex
-2010-10-07T07:09:11.800487Z
+2010-10-08T04:47:04.487070Z
3d0781454489c0ee8265461f049c7faf
2005-01-29T02:12:49.615049Z
769
-2010-10-07T07:09:11.800487Z
+2010-10-08T04:47:04.503068Z
b1405a53ce348cfbf57f563b0680de7d
2005-01-31T18:07:56.879873Z
791
+++ /dev/null
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-. 81 FA FE FF 00 00 C3
-
-cmpl $65535, %eax
-. 170 0x12345678 6
-. 3D FF FF 00 00 C3
-
-cmpl $65536, %ebx
-. 171 0x12345678 7
-. 81 FB 00 00 01 00 C3
-
-cmpl 668(%rbp), %edx
-. 172 0x12345678 7
-. 3B 95 9C 02 00 00 C3
-
-cmpl 668(%rbp), %r12d
-. 173 0x12345678 8
-. 44 3B A5 9C 02 00 00 C3
-
-cmpl $6, %r14d
-. 174 0x12345678 5
-. 41 83 FE 06 C3
-
-cmpl $7, 644(%r11)
-. 175 0x12345678 9
-. 41 83 BB 84 02 00 00 07 C3
-
-cmpl $7, 644(%rbp)
-. 176 0x12345678 8
-. 83 BD 84 02 00 00 07 C3
-
-cmpl $7, 644(%rbx)
-. 177 0x12345678 8
-. 83 BB 84 02 00 00 07 C3
-
-cmpl $7, 644(%rdi)
-. 178 0x12345678 8
-. 83 BF 84 02 00 00 07 C3
-
-cmpl $7, 644(%rsi)
-. 179 0x12345678 8
-. 83 BE 84 02 00 00 07 C3
-
-cmpl $7, %r14d
-. 180 0x12345678 5
-. 41 83 FE 07 C3
-
-cmpl $99, 12(%rsp)
-. 181 0x12345678 6
-. 83 7C 24 0C 63 C3
-
-cmpl $99, 24(%rsp)
-. 182 0x12345678 6
-. 83 7C 24 18 63 C3
-
-cmpl $9999, %ebp
-. 183 0x12345678 7
-. 81 FD 0F 27 00 00 C3
-
-cmpl $9, %eax
-. 184 0x12345678 4
-. 83 F8 09 C3
-
-cmpl %eax, 64(%rsp,%rdx,4)
-. 185 0x12345678 5
-. 39 44 94 40 C3
-
-cmpl %eax, %ecx
-. 186 0x12345678 3
-. 39 C1 C3
-
-cmpl %eax, %edi
-. 187 0x12345678 3
-. 39 C7 C3
-
-cmpl %eax, %edx
-. 188 0x12345678 3
-. 39 C2 C3
-
-cmpl %eax, %esi
-. 189 0x12345678 3
-. 39 C6 C3
-
-cmpl %eax, %r13d
-. 190 0x12345678 4
-. 41 39 C5 C3
-
-cmpl %eax, %r8d
-. 191 0x12345678 4
-. 41 39 C0 C3
-
-cmpl %ebp, %edi
-. 192 0x12345678 3
-. 39 EF C3
-
-cmpl %ebp, %r12d
-. 193 0x12345678 4
-. 41 39 EC C3
-
-cmpl %ecx, %eax
-. 194 0x12345678 3
-. 39 C8 C3
-
-cmpl %ecx, %r13d
-. 195 0x12345678 4
-. 41 39 CD C3
-
-cmpl %edi, %eax
-. 196 0x12345678 3
-. 39 F8 C3
-
-cmpl %edi, %r10d
-. 197 0x12345678 4
-. 41 39 FA C3
-
-cmpl %edx, %ecx
-. 198 0x12345678 3
-. 39 D1 C3
-
-cmpl %edx, %edi
-. 199 0x12345678 3
-. 39 D7 C3
-
-cmpl %edx, 0x12345678(%rip)
-. 200 0x12345678 7
-. 39 15 78 56 34 12 C3
-
-cmpl %edx, %r12d
-. 201 0x12345678 4
-. 41 39 D4 C3
-
-cmpl %edx, %r9d
-. 202 0x12345678 4
-. 41 39 D1 C3
-
-cmpl %edx, (%rcx,%rax,4)
-. 203 0x12345678 4
-. 39 14 81 C3
-
-cmpl %r10d, %r9d
-. 204 0x12345678 4
-. 45 39 D1 C3
-
-cmpl (%r10,%rax,4), %r8d
-. 205 0x12345678 5
-. 45 3B 04 82 C3
-
-cmpl %r11d, %ecx
-. 206 0x12345678 4
-. 44 39 D9 C3
-
-cmpl %r12d, %eax
-. 207 0x12345678 4
-. 44 39 E0 C3
-
-cmpl %r12d, %ebp
-. 208 0x12345678 4
-. 44 39 E5 C3
-
-cmpl %r12d, %edi
-. 209 0x12345678 4
-. 44 39 E7 C3
-
-cmpl %r13d, 16(%rsp)
-. 210 0x12345678 6
-. 44 39 6C 24 10 C3
-
-cmpl %r13d, %eax
-. 211 0x12345678 4
-. 44 39 E8 C3
-
-cmpl %r13d, %ebp
-. 212 0x12345678 4
-. 44 39 ED C3
-
-cmpl %r13d, %edi
-. 213 0x12345678 4
-. 44 39 EF C3
-
-cmpl %r13d, %edx
-. 214 0x12345678 4
-. 44 39 EA C3
-
-cmpl %r13d, %r12d
-. 215 0x12345678 4
-. 45 39 EC C3
-
-cmpl %r14d, %eax
-. 216 0x12345678 4
-. 44 39 F0 C3
-
-cmpl %r14d, %ebx
-. 217 0x12345678 4
-. 44 39 F3 C3
-
-cmpl %r14d, %edi
-. 218 0x12345678 4
-. 44 39 F7 C3
-
-cmpl %r14d, %r12d
-. 219 0x12345678 4
-. 45 39 F4 C3
-
-cmpl %r14d, %r13d
-. 220 0x12345678 4
-. 45 39 F5 C3
-
-cmpl %r15d, %r14d
-. 221 0x12345678 4
-. 45 39 FE C3
-
-cmpl %r8d, %edi
-. 222 0x12345678 4
-. 44 39 C7 C3
-
-cmpl %r8d, %esi
-. 223 0x12345678 4
-. 44 39 C6 C3
-
-cmpl %r9d, %edx
-. 224 0x12345678 4
-. 44 39 CA C3
-
-cmpw %ax, %r10w
-. 225 0x12345678 5
-. 66 41 39 C2 C3
-
-decl 12(%rsp)
-. 226 0x12345678 5
-. FF 4C 24 0C C3
-
-decl 24(%rsp)
-. 227 0x12345678 5
-. FF 4C 24 18 C3
-
-decl 32(%rsp,%rax,4)
-. 228 0x12345678 5
-. FF 4C 84 20 C3
-
-decl %eax
-. 229 0x12345678 3
-. FF C8 C3
-
-decl %ebp
-. 230 0x12345678 3
-. FF CD C3
-
-decl %ebx
-. 231 0x12345678 3
-. FF CB C3
-
-decl %ecx
-. 232 0x12345678 3
-. FF C9 C3
-
-decl %edi
-. 233 0x12345678 3
-. FF CF C3
-
-decl %esi
-. 234 0x12345678 3
-. FF CE C3
-
-decl %r10d
-. 235 0x12345678 4
-. 41 FF CA C3
-
-decl %r11d
-. 236 0x12345678 4
-. 41 FF CB C3
-
-decl %r12d
-. 237 0x12345678 4
-. 41 FF CC C3
-
-decl %r8d
-. 238 0x12345678 4
-. 41 FF C8 C3
-
-decl (%r9)
-. 239 0x12345678 4
-. 41 FF 09 C3
-
-idivl %ebx
-. 240 0x12345678 3
-. F7 FB C3
-
-imull $7621, 8(%rsp), %eax
-. 241 0x12345678 9
-. 69 44 24 08 C5 1D 00 00 C3
-
-imull %eax, %r12d
-. 242 0x12345678 5
-. 44 0F AF E0 C3
-
-imulq $1431655766, %rax, %rax
-. 243 0x12345678 8
-. 48 69 C0 56 55 55 55 C3
-
-imulq %rdx, %rax
-. 244 0x12345678 5
-. 48 0F AF C2 C3
-
-incl 1056(%rsp,%rax,4)
-. 245 0x12345678 8
-. FF 84 84 20 04 00 00 C3
-
-incl 116(%r11)
-. 246 0x12345678 5
-. 41 FF 43 74 C3
-
-incl 116(%rdi)
-. 247 0x12345678 4
-. FF 47 74 C3
-
-incl 116(%rsi)
-. 248 0x12345678 4
-. FF 46 74 C3
-
-incl 124(%rdi)
-. 249 0x12345678 4
-. FF 47 7C C3
-
-incl 12(%rsp)
-. 250 0x12345678 5
-. FF 44 24 0C C3
-
-incl 24(%rsp)
-. 251 0x12345678 5
-. FF 44 24 18 C3
-
-incl 45448(%rbp,%rax,4)
-. 252 0x12345678 8
-. FF 84 85 88 B1 00 00 C3
-
-incl 45448(%rbp,%rdx,4)
-. 253 0x12345678 8
-. FF 84 95 88 B1 00 00 C3
-
-incl 48(%rsp,%rsi,4)
-. 254 0x12345678 5
-. FF 44 B4 30 C3
-
-incl 672(%rbx)
-. 255 0x12345678 7
-. FF 83 A0 02 00 00 C3
-
-incl 672(%rbx,%rax,4)
-. 256 0x12345678 8
-. FF 84 83 A0 02 00 00 C3
-
-incl 676(%rbx)
-. 257 0x12345678 7
-. FF 83 A4 02 00 00 C3
-
-incl 676(%rbx,%rax,4)
-. 258 0x12345678 8
-. FF 84 83 A4 02 00 00 C3
-
-incl %eax
-. 259 0x12345678 3
-. FF C0 C3
-
-incl %ebp
-. 260 0x12345678 3
-. FF C5 C3
-
-incl %ebx
-. 261 0x12345678 3
-. FF C3 C3
-
-incl %ecx
-. 262 0x12345678 3
-. FF C1 C3
-
-incl %edi
-. 263 0x12345678 3
-. FF C7 C3
-
-incl %edx
-. 264 0x12345678 3
-. FF C2 C3
-
-incl %esi
-. 265 0x12345678 3
-. FF C6 C3
-
-incl %r10d
-. 266 0x12345678 4
-. 41 FF C2 C3
-
-incl %r11d
-. 267 0x12345678 4
-. 41 FF C3 C3
-
-incl %r12d
-. 268 0x12345678 4
-. 41 FF C4 C3
-
-incl %r13d
-. 269 0x12345678 4
-. 41 FF C5 C3
-
-incl %r14d
-. 270 0x12345678 4
-. 41 FF C6 C3
-
-incl %r8d
-. 271 0x12345678 4
-. 41 FF C0 C3
-
-incl %r9d
-. 272 0x12345678 4
-. 41 FF C1 C3
-
-incl (%rbp,%rax,4)
-. 273 0x12345678 5
-. FF 44 85 00 C3
-
-incq %rdx
-. 274 0x12345678 4
-. 48 FF C2 C3
-
-ja lalala
-. 275 0x12345678 6
-. 0F 87 DD 12 00 00
-
-jbe lalala
-. 276 0x12345678 6
-. 0F 86 D7 12 00 00
-
-je lalala
-. 277 0x12345678 6
-. 0F 84 D1 12 00 00
-
-jge lalala
-. 278 0x12345678 6
-. 0F 8D CB 12 00 00
-
-jg lalala
-. 279 0x12345678 6
-. 0F 8F C5 12 00 00
-
-jle lalala
-. 280 0x12345678 6
-. 0F 8E BF 12 00 00
-
-jl lalala
-. 281 0x12345678 6
-. 0F 8C B9 12 00 00
-
-jmp lalala
-. 282 0x12345678 5
-. E9 B4 12 00 00
-
-jne lalala
-. 283 0x12345678 6
-. 0F 85 AE 12 00 00
-
-jns lalala
-. 284 0x12345678 6
-. 0F 89 A8 12 00 00
-
-js lalala
-. 285 0x12345678 6
-. 0F 88 A2 12 00 00
-
-leal -1(%r11), %edi
-. 286 0x12345678 5
-. 41 8D 7B FF C3
-
-leal -1(%r12,%rax), %eax
-. 287 0x12345678 6
-. 41 8D 44 04 FF C3
-
-leal 1(%r13), %eax
-. 288 0x12345678 5
-. 41 8D 45 01 C3
-
-leal 1(%r13), %edx
-. 289 0x12345678 5
-. 41 8D 55 01 C3
-
-leal 1(%r8), %edx
-. 290 0x12345678 5
-. 41 8D 50 01 C3
-
-leal 1(%rax), %esi
-. 291 0x12345678 4
-. 8D 70 01 C3
-
-leal -1(%rax), %r14d
-. 292 0x12345678 5
-. 44 8D 70 FF C3
-
-leal 1(%rax,%r8), %r8d
-. 293 0x12345678 6
-. 46 8D 44 00 01 C3
-
-leal 1(%rax,%rcx), %ecx
-. 294 0x12345678 5
-. 8D 4C 08 01 C3
-
-leal 1(%rbp), %esi
-. 295 0x12345678 4
-. 8D 75 01 C3
-
-leal -1(%rbx), %eax
-. 296 0x12345678 4
-. 8D 43 FF C3
-
-leal -1(%rcx), %eax
-. 297 0x12345678 4
-. 8D 41 FF C3
-
-leal 1(%rcx), %eax
-. 298 0x12345678 4
-. 8D 41 01 C3
-
-leal 1(%rdi), %eax
-. 299 0x12345678 4
-. 8D 47 01 C3
-
-leal 1(%rdi), %ecx
-. 300 0x12345678 4
-. 8D 4F 01 C3
-
-leal -1(%rdx), %eax
-. 301 0x12345678 4
-. 8D 42 FF C3
-
-leal 1(%rdx), %eax
-. 302 0x12345678 4
-. 8D 42 01 C3
-
-leal -1(%rsi), %ebp
-. 303 0x12345678 4
-. 8D 6E FF C3
-
-leal -1(%rsi), %r12d
-. 304 0x12345678 5
-. 44 8D 66 FF C3
-
-leal -1(%rsi), %r9d
-. 305 0x12345678 5
-. 44 8D 4E FF C3
-
-leal -2(%rbx), %eax
-. 306 0x12345678 4
-. 8D 43 FE C3
-
-leal -2(%rdi), %eax
-. 307 0x12345678 4
-. 8D 47 FE C3
-
-leal 31(%r13), %eax
-. 308 0x12345678 5
-. 41 8D 45 1F C3
-
-leal 34(%rbp), %edx
-. 309 0x12345678 4
-. 8D 55 22 C3
-
-leal 35(%rbp), %eax
-. 310 0x12345678 4
-. 8D 45 23 C3
-
-leal -3(%rbx), %eax
-. 311 0x12345678 4
-. 8D 43 FD C3
-
-leal 48(%rax), %esi
-. 312 0x12345678 4
-. 8D 70 30 C3
-
-leal -4(%r14), %edi
-. 313 0x12345678 5
-. 41 8D 7E FC C3
-
-leal 4(%rdi), %ecx
-. 314 0x12345678 4
-. 8D 4F 04 C3
-
-leal 7(%rcx), %eax
-. 315 0x12345678 4
-. 8D 41 07 C3
-
-leal 8(%r8), %r11d
-. 316 0x12345678 5
-. 45 8D 58 08 C3
-
-leal (%r10,%r13), %ecx
-. 317 0x12345678 5
-. 43 8D 0C 2A C3
-
-leal (%r12,%r8), %eax
-. 318 0x12345678 5
-. 43 8D 04 04 C3
-
-leal (%r13,%rdi,2), %edx
-. 319 0x12345678 6
-. 41 8D 54 7D 00 C3
-
-leal (%r13,%rsi), %eax
-. 320 0x12345678 6
-. 41 8D 44 35 00 C3
-
-leal (%r14,%r13), %eax
-. 321 0x12345678 5
-. 43 8D 04 2E C3
-
-leal (%r8,%r10), %eax
-. 322 0x12345678 5
-. 43 8D 04 10 C3
-
-leal (%r8,%rdx), %eax
-. 323 0x12345678 5
-. 41 8D 04 10 C3
-
-leal (%r9,%r15), %edi
-. 324 0x12345678 5
-. 43 8D 3C 39 C3
-
-leal (%rax,%r10), %eax
-. 325 0x12345678 5
-. 42 8D 04 10 C3
-
-leal (%rax,%r14), %r15d
-. 326 0x12345678 5
-. 46 8D 3C 30 C3
-
-leal (%rax,%r8), %eax
-. 327 0x12345678 5
-. 42 8D 04 00 C3
-
-leal (%rax,%r9), %eax
-. 328 0x12345678 5
-. 42 8D 04 08 C3
-
-leal (%rax,%rax,2), %eax
-. 329 0x12345678 4
-. 8D 04 40 C3
-
-leal (%rax,%rdi), %eax
-. 330 0x12345678 4
-. 8D 04 38 C3
-
-leal (%rax,%rdx), %eax
-. 331 0x12345678 4
-. 8D 04 10 C3
-
-leal (%rcx,%r9), %eax
-. 332 0x12345678 5
-. 42 8D 04 09 C3
-
-leal (%rdi,%r13), %eax
-. 333 0x12345678 5
-. 42 8D 04 2F C3
-
-leal (%rdx,%r13), %eax
-. 334 0x12345678 5
-. 42 8D 04 2A C3
-
-leal (%rdx,%r8), %edx
-. 335 0x12345678 5
-. 42 8D 14 02 C3
-
-leal (%rdx,%r9), %edx
-. 336 0x12345678 5
-. 42 8D 14 0A C3
-
-leal (%rdx,%rcx), %eax
-. 337 0x12345678 4
-. 8D 04 0A C3
-
-leal (%rdx,%rdi), %edx
-. 338 0x12345678 4
-. 8D 14 3A C3
-
-leal (%rsi,%r13), %eax
-. 339 0x12345678 5
-. 42 8D 04 2E C3
-
-leal (%rsi,%r15), %eax
-. 340 0x12345678 5
-. 42 8D 04 3E C3
-
-leal (%rsi,%rcx), %eax
-. 341 0x12345678 4
-. 8D 04 0E C3
-
-leal (%rsi,%rsi,2), %eax
-. 342 0x12345678 4
-. 8D 04 76 C3
-
-leaq 1(%r11), %rdx
-. 343 0x12345678 5
-. 49 8D 53 01 C3
-
-leaq 20(%rsp), %rax
-. 344 0x12345678 6
-. 48 8D 44 24 14 C3
-
-leaq 37696(%rcx,%rax), %r10
-. 345 0x12345678 9
-. 4C 8D 94 01 40 93 00 00 C3
-
-leaq 37696(%rcx,%rax), %r9
-. 346 0x12345678 9
-. 4C 8D 8C 01 40 93 00 00 C3
-
-leaq 37708(%rbp,%rax,2), %rdi
-. 347 0x12345678 9
-. 48 8D BC 45 4C 93 00 00 C3
-
-leaq 37708(%rbp,%rdi,2), %rdi
-. 348 0x12345678 9
-. 48 8D BC 7D 4C 93 00 00 C3
-
-leaq 37708(%rbp,%rdi,2), %rsi
-. 349 0x12345678 9
-. 48 8D B4 7D 4C 93 00 00 C3
-
-leaq 39256(%rbp,%rax,8), %r8
-. 350 0x12345678 9
-. 4C 8D 84 C5 58 99 00 00 C3
-
-leaq 39256(%rbp,%rdi,8), %rdi
-. 351 0x12345678 9
-. 48 8D BC FD 58 99 00 00 C3
-
-leaq 45448(%rbp,%rdi,8), %rsi
-. 352 0x12345678 9
-. 48 8D B4 FD 88 B1 00 00 C3
-
-leaq (%rax,%rax), %rdx
-. 353 0x12345678 5
-. 48 8D 14 00 C3
-
-leaq (%rax,%rdx), %rax
-. 354 0x12345678 5
-. 48 8D 04 10 C3
-
-leaq (%rbp,%rax,2), %r13
-. 355 0x12345678 6
-. 4C 8D 6C 45 00 C3
-
-leaq (%rbp,%rax,2), %rax
-. 356 0x12345678 6
-. 48 8D 44 45 00 C3
-
-leaq (%rbp,%rax,2), %rcx
-. 357 0x12345678 6
-. 48 8D 4C 45 00 C3
-
-leaq (%rbp,%rax,2), %rdx
-. 358 0x12345678 6
-. 48 8D 54 45 00 C3
-
-leaq (%rbp,%rax), %rdx
-. 359 0x12345678 6
-. 48 8D 54 05 00 C3
-
-leaq (%rbp,%rdx,2), %rdx
-. 360 0x12345678 6
-. 48 8D 54 55 00 C3
-
-leaq (%rdx,%rsi), %rdx
-. 361 0x12345678 5
-. 48 8D 14 32 C3
-
-movb $0, 2112(%rsp,%rax)
-. 362 0x12345678 9
-. C6 84 04 40 08 00 00 00 C3
-
-movb $0, 32(%rsp,%rax)
-. 363 0x12345678 6
-. C6 44 04 20 00 C3
-
-movb $0, 37450(%rax,%rcx)
-. 364 0x12345678 9
-. C6 84 08 4A 92 00 00 00 C3
-
-movb $1, 2112(%rsp,%rax)
-. 365 0x12345678 9
-. C6 84 04 40 08 00 00 01 C3
-
-movb $1, 32(%rsp,%rcx)
-. 366 0x12345678 6
-. C6 44 0C 20 01 C3
-
-movb $15, 37450(%rax,%rcx)
-. 367 0x12345678 9
-. C6 84 08 4A 92 00 00 0F C3
-
-movb $15, 37708(%rax,%rdx)
-. 368 0x12345678 9
-. C6 84 10 4C 93 00 00 0F C3
-
-movb %al, 1(%rsp)
-. 369 0x12345678 5
-. 88 44 24 01 C3
-
-movb %al, 384(%rdi,%rdx)
-. 370 0x12345678 8
-. 88 84 17 80 01 00 00 C3
-
-movb %al, (%rcx,%rdx)
-. 371 0x12345678 4
-. 88 04 11 C3
-
-movb %al, (%rdx)
-. 372 0x12345678 3
-. 88 02 C3
-
-movb %cl, 32(%rsp)
-. 373 0x12345678 5
-. 88 4C 24 20 C3
-
-movb %cl, (%rsp)
-. 374 0x12345678 4
-. 88 0C 24 C3
-
-movb %dil, 32(%rsp,%rax)
-. 375 0x12345678 6
-. 40 88 7C 04 20 C3
-
-movb %dl, 1704(%rbp,%rax)
-. 376 0x12345678 8
-. 88 94 05 A8 06 00 00 C3
-
-movb %dl, 32(%rsp,%rax)
-. 377 0x12345678 5
-. 88 54 04 20 C3
-
-movb %dl, (%rax,%rsi)
-. 378 0x12345678 4
-. 88 14 30 C3
-
-movb %r8b, 19706(%rbp,%rax)
-. 379 0x12345678 9
-. 44 88 84 05 FA 4C 00 00 C3
-
-movb %r9b, (%rsp,%rax)
-. 380 0x12345678 5
-. 44 88 0C 04 C3
-
-mov %eax, %eax
-. 381 0x12345678 3
-. 89 C0 C3
-
-mov %edi, %eax
-. 382 0x12345678 3
-. 89 F8 C3
-
-mov %esi, %eax
-. 383 0x12345678 3
-. 89 F0 C3
-
-movl $0, 1056(%rsp,%rax,4)
-. 384 0x12345678 12
-. C7 84 84 20 04 00 00 00 00 00 00 C3
-
-movl $0, 116(%rdi)
-. 385 0x12345678 8
-. C7 47 74 00 00 00 00 C3
-
-movl $0, 124(%rdi)
-. 386 0x12345678 8
-. C7 47 7C 00 00 00 00 C3
-
-movl $0, 12(%rsp)
-. 387 0x12345678 9
-. C7 44 24 0C 00 00 00 00 C3
-
-movl $0, 24(%rsp)
-. 388 0x12345678 9
-. C7 44 24 18 00 00 00 00 C3
-
-movl $0, 28(%rsp)
-. 389 0x12345678 9
-. C7 44 24 1C 00 00 00 00 C3
-
-movl $0, 45448(%rbp,%rax,4)
-. 390 0x12345678 12
-. C7 84 85 88 B1 00 00 00 00 00 00 C3
-
-movl $0, 48(%rsp,%rax,4)
-. 391 0x12345678 9
-. C7 44 84 30 00 00 00 00 C3
-
-movl $0, 640(%rdi)
-. 392 0x12345678 11
-. C7 87 80 02 00 00 00 00 00 00 C3
-
-movl $0, 644(%rdi)
-. 393 0x12345678 11
-. C7 87 84 02 00 00 00 00 00 00 C3
-
-movl $0, 672(%rbx,%rax,4)
-. 394 0x12345678 12
-. C7 84 83 A0 02 00 00 00 00 00 00 C3
-
-movl $0, 8(%rsp)
-. 395 0x12345678 9
-. C7 44 24 08 00 00 00 00 C3
-
-movl $0, %eax
-. 396 0x12345678 6
-. B8 00 00 00 00 C3
-
-movl $0, %ebx
-. 397 0x12345678 6
-. BB 00 00 00 00 C3
-
-movl $0, %ecx
-. 398 0x12345678 6
-. B9 00 00 00 00 C3
-
-movl $0, %edi
-. 399 0x12345678 6
-. BF 00 00 00 00 C3
-
-movl $0, %edx
-. 400 0x12345678 6
-. BA 00 00 00 00 C3
-
-movl $0, %r12d
-. 401 0x12345678 7
-. 41 BC 00 00 00 00 C3
-
-movl $0, %r13d
-. 402 0x12345678 7
-. 41 BD 00 00 00 00 C3
-
-movl $0, %r8d
-. 403 0x12345678 7
-. 41 B8 00 00 00 00 C3
-
-movl $0, %r9d
-. 404 0x12345678 7
-. 41 B9 00 00 00 00 C3
-
-movl $0, (%rbp,%rax,4)
-. 405 0x12345678 9
-. C7 44 85 00 00 00 00 00 C3
-
-movl $0, (%rbx,%rax,4)
-. 406 0x12345678 8
-. C7 04 83 00 00 00 00 C3
-
-movl $1001, %edi
-. 407 0x12345678 6
-. BF E9 03 00 00 C3
-
-movl $1002, %edi
-. 408 0x12345678 6
-. BF EA 03 00 00 C3
-
-movl $1003, %edi
-. 409 0x12345678 6
-. BF EB 03 00 00 C3
-
-movl $1004, %edi
-. 410 0x12345678 6
-. BF EC 03 00 00 C3
-
-movl $1005, %edi
-. 411 0x12345678 6
-. BF ED 03 00 00 C3
-
-movl $1006, %edi
-. 412 0x12345678 6
-. BF EE 03 00 00 C3
-
-movl $1007, %edi
-. 413 0x12345678 6
-. BF EF 03 00 00 C3
-
-movl $100, %eax
-. 414 0x12345678 6
-. B8 64 00 00 00 C3
-
-movl $104, %esi
-. 415 0x12345678 6
-. BE 68 00 00 00 C3
-
-movl 1056(%rsp,%rax,4), %ecx
-. 416 0x12345678 8
-. 8B 8C 84 20 04 00 00 C3
-
-movl 1056(%rsp,%rax,4), %esi
-. 417 0x12345678 8
-. 8B B4 84 20 04 00 00 C3
-
-movl 1056(%rsp,%rdx,4), %eax
-. 418 0x12345678 8
-. 8B 84 94 20 04 00 00 C3
-
-movl 1088(%rsp,%rdx,4), %eax
-. 419 0x12345678 8
-. 8B 84 94 40 04 00 00 C3
-
-movl 1088(%rsp,%rsi,4), %eax
-. 420 0x12345678 8
-. 8B 84 B4 40 04 00 00 C3
-
-movl 108(%rbx), %r9d
-. 421 0x12345678 5
-. 44 8B 4B 6C C3
-
-movl 108(%rdi), %ebp
-. 422 0x12345678 4
-. 8B 6F 6C C3
-
-movl 108(%rdi), %edx
-. 423 0x12345678 4
-. 8B 57 6C C3
-
-movl $10, %edi
-. 424 0x12345678 6
-. BF 0A 00 00 00 C3
-
-movl $1, 12(%rsp)
-. 425 0x12345678 9
-. C7 44 24 0C 01 00 00 00 C3
-
-movl 112(%rsp), %eax
-. 426 0x12345678 5
-. 8B 44 24 70 C3
-
-movl 112(%rsp), %edi
-. 427 0x12345678 5
-. 8B 7C 24 70 C3
-
-movl $114, %esi
-. 428 0x12345678 6
-. BE 72 00 00 00 C3
-
-movl 116(%rbp), %eax
-. 429 0x12345678 4
-. 8B 45 74 C3
-
-movl 116(%rbp), %edx
-. 430 0x12345678 4
-. 8B 55 74 C3
-
-movl $1, 16(%rsp)
-. 431 0x12345678 9
-. C7 44 24 10 01 00 00 00 C3
-
-movl 124(%rbp), %eax
-. 432 0x12345678 4
-. 8B 45 7C C3
-
-movl 124(%rbx), %edx
-. 433 0x12345678 4
-. 8B 53 7C C3
-
-movl 124(%rbx), %r10d
-. 434 0x12345678 5
-. 44 8B 53 7C C3
-
-movl 124(%rdi), %r8d
-. 435 0x12345678 5
-. 44 8B 47 7C C3
-
-movl $1, 24(%rsp)
-. 436 0x12345678 9
-. C7 44 24 18 01 00 00 00 C3
-
-movl 12(%rsp), %eax
-. 437 0x12345678 5
-. 8B 44 24 0C C3
-
-movl 12(%rsp), %edx
-. 438 0x12345678 5
-. 8B 54 24 0C C3
-
-movl 12(%rsp), %r8d
-. 439 0x12345678 6
-. 44 8B 44 24 0C C3
-
-movl 1360(%rsp), %eax
-. 440 0x12345678 8
-. 8B 84 24 50 05 00 00 C3
-
-movl $144, %esi
-. 441 0x12345678 6
-. BE 90 00 00 00 C3
-
-movl $-1, 48(%rbx)
-. 442 0x12345678 8
-. C7 43 30 FF FF FF FF C3
-
-movl $15, %r8d
-. 443 0x12345678 7
-. 41 B8 0F 00 00 00 C3
-
-movl 16(%rsp), %edx
-. 444 0x12345678 5
-. 8B 54 24 10 C3
-
-movl 16(%rsp,%rax,4), %r14d
-. 445 0x12345678 6
-. 44 8B 74 84 10 C3
-
-movl $17, %ecx
-. 446 0x12345678 6
-. B9 11 00 00 00 C3
-
-movl $1, %eax
-. 447 0x12345678 6
-. B8 01 00 00 00 C3
-
-movl $-1, %ebp
-. 448 0x12345678 6
-. BD FF FF FF FF C3
-
-movl $1, %ebx
-. 449 0x12345678 6
-. BB 01 00 00 00 C3
-
-movl $-1, %ecx
-. 450 0x12345678 6
-. B9 FF FF FF FF C3
-
-movl $1, %edi
-. 451 0x12345678 6
-. BF 01 00 00 00 C3
-
-movl $-1, %edx
-. 452 0x12345678 6
-. BA FF FF FF FF C3
-
-movl $1, %edx
-. 453 0x12345678 6
-. BA 01 00 00 00 C3
-
-movl $1, %esi
-. 454 0x12345678 6
-. BE 01 00 00 00 C3
-
-movl $1, %r14d
-. 455 0x12345678 7
-. 41 BE 01 00 00 00 C3
-
-movl $1, %r8d
-. 456 0x12345678 7
-. 41 B8 01 00 00 00 C3
-
-movl $1, %r9d
-. 457 0x12345678 7
-. 41 B9 01 00 00 00 C3
-
-movl $-2097153, %esi
-. 458 0x12345678 6
-. BE FF FF DF FF C3
-
-movl 20(%rsp), %eax
-. 459 0x12345678 5
-. 8B 44 24 14 C3
-
-movl 20(%rsp), %ecx
-. 460 0x12345678 5
-. 8B 4C 24 14 C3
-
-movl 20(%rsp), %edx
-. 461 0x12345678 5
-. 8B 54 24 14 C3
-
-movl 20(%rsp), %esi
-. 462 0x12345678 5
-. 8B 74 24 14 C3
-
-movl 20(%rsp), %r11d
-. 463 0x12345678 6
-. 44 8B 5C 24 14 C3
-
-movl 20(%rsp), %r12d
-. 464 0x12345678 6
-. 44 8B 64 24 14 C3
-
-movl 20(%rsp), %r8d
-. 465 0x12345678 6
-. 44 8B 44 24 14 C3
-
-movl 20(%rsp), %r9d
-. 466 0x12345678 6
-. 44 8B 4C 24 14 C3
-
-movl 2368(%rsp,%rax,4), %eax
-. 467 0x12345678 8
-. 8B 84 84 40 09 00 00 C3
-
-movl 2368(%rsp,%rax,4), %edx
-. 468 0x12345678 8
-. 8B 94 84 40 09 00 00 C3
-
-movl 2368(%rsp,%rax,4), %r13d
-. 469 0x12345678 9
-. 44 8B AC 84 40 09 00 00 C3
-
-movl 2368(%rsp,%rax,4), %r8d
-. 470 0x12345678 9
-. 44 8B 84 84 40 09 00 00 C3
-
-movl $23, %esi
-. 471 0x12345678 6
-. BE 17 00 00 00 C3
-
-movl $24, %r8d
-. 472 0x12345678 7
-. 41 B8 18 00 00 00 C3
-
-movl 24(%rsp), %ecx
-. 473 0x12345678 5
-. 8B 4C 24 18 C3
-
-movl 24(%rsp), %edi
-. 474 0x12345678 5
-. 8B 7C 24 18 C3
-
-movl 24(%rsp), %r8d
-. 475 0x12345678 6
-. 44 8B 44 24 18 C3
-
-movl $27, %edx
-. 476 0x12345678 6
-. BA 1B 00 00 00 C3
-
-movl $2863311531, %edx
-. 477 0x12345678 6
-. BA AB AA AA AA C3
-
-movl 28(%rsp), %ecx
-. 478 0x12345678 5
-. 8B 4C 24 1C C3
-
-movl 28(%rsp), %edi
-. 479 0x12345678 5
-. 8B 7C 24 1C C3
-
-movl 28(%rsp), %edx
-. 480 0x12345678 5
-. 8B 54 24 1C C3
-
-movl 28(%rsp), %r12d
-. 481 0x12345678 6
-. 44 8B 64 24 1C C3
-
-movl $2, %r10d
-. 482 0x12345678 7
-. 41 BA 02 00 00 00 C3
-
-movl $2, %r14d
-. 483 0x12345678 7
-. 41 BE 02 00 00 00 C3
-
-movl $2, %r9d
-. 484 0x12345678 7
-. 41 B9 02 00 00 00 C3
-
-movl $2, (%rsp)
-. 485 0x12345678 8
-. C7 04 24 02 00 00 00 C3
-
-movl $3001, %edi
-. 486 0x12345678 6
-. BF B9 0B 00 00 C3
-
-movl $3002, %edi
-. 487 0x12345678 6
-. BF BA 0B 00 00 C3
-
-movl $3003, %edi
-. 488 0x12345678 6
-. BF BB 0B 00 00 C3
-
-movl $3004, %edi
-. 489 0x12345678 6
-. BF BC 0B 00 00 C3
-
-movl $3005, %edi
-. 490 0x12345678 6
-. BF BD 0B 00 00 C3
-
-movl $3006, %edi
-. 491 0x12345678 6
-. BF BE 0B 00 00 C3
-
-movl $3007, %edi
-. 492 0x12345678 6
-. BF BF 0B 00 00 C3
-
-movl $32, %r13d
-. 493 0x12345678 7
-. 41 BD 20 00 00 00 C3
-
-movl 32(%rsp), %eax
-. 494 0x12345678 5
-. 8B 44 24 20 C3
-
-movl 32(%rsp), %r13d
-. 495 0x12345678 6
-. 44 8B 6C 24 20 C3
-
-movl $33, %edx
-. 496 0x12345678 6
-. BA 21 00 00 00 C3
-
-movl 36(%rsp), %eax
-. 497 0x12345678 5
-. 8B 44 24 24 C3
-
-movl 36(%rsp), %ebx
-. 498 0x12345678 5
-. 8B 5C 24 24 C3
-
-movl 36(%rsp), %ecx
-. 499 0x12345678 5
-. 8B 4C 24 24 C3
-
-movl 36(%rsp), %edx
-. 500 0x12345678 5
-. 8B 54 24 24 C3
-
-movl 36(%rsp), %esi
-. 501 0x12345678 5
-. 8B 74 24 24 C3
-
-movl 36(%rsp), %r8d
-. 502 0x12345678 6
-. 44 8B 44 24 24 C3
-
-movl $38, %esi
-. 503 0x12345678 6
-. BE 26 00 00 00 C3
-
-movl 39256(%rbp,%rax,4), %r9d
-. 504 0x12345678 9
-. 44 8B 8C 85 58 99 00 00 C3
-
-movl $3, %r12d
-. 505 0x12345678 7
-. 41 BC 03 00 00 00 C3
-
-movl $3, %r14d
-. 506 0x12345678 7
-. 41 BE 03 00 00 00 C3
-
-movl $3, %r8d
-. 507 0x12345678 7
-. 41 B8 03 00 00 00 C3
-
-movl 416(%rsp,%rax,4), %r13d
-. 508 0x12345678 9
-. 44 8B AC 84 A0 01 00 00 C3
-
-movl 48(%rbx), %edi
-. 509 0x12345678 4
-. 8B 7B 30 C3
-
-movl 48(%rsp), %eax
-. 510 0x12345678 5
-. 8B 44 24 30 C3
-
-movl 48(%rsp), %edx
-. 511 0x12345678 5
-. 8B 54 24 30 C3
-
-movl 48(%rsp,%rax,4), %edx
-. 512 0x12345678 5
-. 8B 54 84 30 C3
-
-movl 496(%rsp,%rax,4), %edx
-. 513 0x12345678 8
-. 8B 94 84 F0 01 00 00 C3
-
-movl $49, %esi
-. 514 0x12345678 6
-. BE 31 00 00 00 C3
-
-movl $4, %r14d
-. 515 0x12345678 7
-. 41 BE 04 00 00 00 C3
-
-movl 4(%rbp,%rax,4), %eax
-. 516 0x12345678 5
-. 8B 44 85 04 C3
-
-movl 4(%rbp,%rdx,4), %eax
-. 517 0x12345678 5
-. 8B 44 95 04 C3
-
-movl 51640(%rax), %ecx
-. 518 0x12345678 7
-. 8B 88 B8 C9 00 00 C3
-
-movl 51644(%rax), %esi
-. 519 0x12345678 7
-. 8B B0 BC C9 00 00 C3
-
-movl 51648(%rax), %edi
-. 520 0x12345678 7
-. 8B B8 C0 C9 00 00 C3
-
-movl 52(%rsp), %eax
-. 521 0x12345678 5
-. 8B 44 24 34 C3
-
-movl 52(%rsp), %edx
-. 522 0x12345678 5
-. 8B 54 24 34 C3
-
-movl $53, %edx
-. 523 0x12345678 6
-. BA 35 00 00 00 C3
-
-movl $56, %esi
-. 524 0x12345678 6
-. BE 38 00 00 00 C3
-
-movl 56(%rsp), %eax
-. 525 0x12345678 5
-. 8B 44 24 38 C3
-
-movl 644(%r11), %eax
-. 526 0x12345678 8
-. 41 8B 83 84 02 00 00 C3
-
-movl 644(%rdi), %eax
-. 527 0x12345678 7
-. 8B 87 84 02 00 00 C3
-
-movl 644(%rsi), %eax
-. 528 0x12345678 7
-. 8B 86 84 02 00 00 C3
-
-movl 644(%rsi), %edx
-. 529 0x12345678 7
-. 8B 96 84 02 00 00 C3
-
-movl 648(%rbx), %ecx
-. 530 0x12345678 7
-. 8B 8B 88 02 00 00 C3
-
-movl 648(%rbx), %esi
-. 531 0x12345678 7
-. 8B B3 88 02 00 00 C3
-
-movl 648(%rdi), %edx
-. 532 0x12345678 7
-. 8B 97 88 02 00 00 C3
-
-movl 64(%rsp), %eax
-. 533 0x12345678 5
-. 8B 44 24 40 C3
-
-movl 64(%rsp), %r8d
-. 534 0x12345678 6
-. 44 8B 44 24 40 C3
-
-movl 64(%rsp,%rsi,4), %eax
-. 535 0x12345678 5
-. 8B 44 B4 40 C3
-
-movl 652(%rbx), %edx
-. 536 0x12345678 7
-. 8B 93 8C 02 00 00 C3
-
-movl 652(%rbx), %esi
-. 537 0x12345678 7
-. 8B B3 8C 02 00 00 C3
-
-movl 652(%rbx), %r8d
-. 538 0x12345678 8
-. 44 8B 83 8C 02 00 00 C3
-
-movl 652(%rdi), %eax
-. 539 0x12345678 7
-. 8B 87 8C 02 00 00 C3
-
-movl $65536, %ebx
-. 540 0x12345678 6
-. BB 00 00 01 00 C3
-
-movl 656(%rdi), %r13d
-. 541 0x12345678 8
-. 44 8B AF 90 02 00 00 C3
-
-movl $65, %esi
-. 542 0x12345678 6
-. BE 41 00 00 00 C3
-
-movl 660(%rbx), %edx
-. 543 0x12345678 7
-. 8B 93 94 02 00 00 C3
-
-movl 668(%rbp), %edx
-. 544 0x12345678 7
-. 8B 95 9C 02 00 00 C3
-
-movl 668(%rbp), %r12d
-. 545 0x12345678 8
-. 44 8B A5 9C 02 00 00 C3
-
-movl 668(%rdi), %ecx
-. 546 0x12345678 7
-. 8B 8F 9C 02 00 00 C3
-
-movl $66, %esi
-. 547 0x12345678 6
-. BE 42 00 00 00 C3
-
-movl 68(%rsp), %eax
-. 548 0x12345678 5
-. 8B 44 24 44 C3
-
-movl 68(%rsp), %esi
-. 549 0x12345678 5
-. 8B 74 24 44 C3
-
-###movl 68(%rsp), %r8d
-###. 550 0x12345678 5
-###. 44 8B 44 24 C3
-
-movl $69, %esi
-. 551 0x12345678 6
-. BE 45 00 00 00 C3
-
-movl 72(%rsp), %eax
-. 552 0x12345678 5
-. 8B 44 24 48 C3
-
-movl 72(%rsp), %esi
-. 553 0x12345678 5
-. 8B 74 24 48 C3
-
-movl $80, %esi
-. 554 0x12345678 6
-. BE 50 00 00 00 C3
-
-movl 80(%rsp), %eax
-. 555 0x12345678 5
-. 8B 44 24 50 C3
-
-movl 80(%rsp), %edi
-. 556 0x12345678 5
-. 8B 7C 24 50 C3
-
-movl $83, %esi
-. 557 0x12345678 6
-. BE 53 00 00 00 C3
-
-movl 84(%rsp), %eax
-. 558 0x12345678 5
-. 8B 44 24 54 C3
-
-movl 84(%rsp), %ecx
-. 559 0x12345678 5
-. 8B 4C 24 54 C3
-
-movl 84(%rsp), %edi
-. 560 0x12345678 5
-. 8B 7C 24 54 C3
-
-movl 88(%rdi), %ecx
-. 561 0x12345678 4
-. 8B 4F 58 C3
-
-movl 88(%rsp), %eax
-. 562 0x12345678 5
-. 8B 44 24 58 C3
-
-movl 88(%rsp), %ecx
-. 563 0x12345678 5
-. 8B 4C 24 58 C3
-
-movl 896(%rsp,%rax,4), %r15d
-. 564 0x12345678 9
-. 44 8B BC 84 80 03 00 00 C3
-
-movl $89, %esi
-. 565 0x12345678 6
-. BE 59 00 00 00 C3
-
-movl $8, %r8d
-. 566 0x12345678 7
-. 41 B8 08 00 00 00 C3
-
-movl $8, %r9d
-. 567 0x12345678 7
-. 41 B9 08 00 00 00 C3
-
-movl 8(%rsp), %edx
-. 568 0x12345678 5
-. 8B 54 24 08 C3
-
-movl $90, %esi
-. 569 0x12345678 6
-. BE 5A 00 00 00 C3
-
-movl 96(%rsp,%rax,4), %r13d
-. 570 0x12345678 6
-. 44 8B 6C 84 60 C3
-
-movl $999999999, %ecx
-. 571 0x12345678 6
-. B9 FF C9 9A 3B C3
-
-movl %eax, 1056(%rsp,%rdx,4)
-. 572 0x12345678 8
-. 89 84 94 20 04 00 00 C3
-
-movl %eax, 1088(%rsp,%rsi,4)
-. 573 0x12345678 8
-. 89 84 B4 40 04 00 00 C3
-
-movl %eax, 12(%rsp)
-. 574 0x12345678 5
-. 89 44 24 0C C3
-
-movl %eax, -16(%rsi,%rdx,4)
-. 575 0x12345678 5
-. 89 44 96 F0 C3
-
-movl %eax, 16(%rsp)
-. 576 0x12345678 5
-. 89 44 24 10 C3
-
-movl %eax, 20(%rsp)
-. 577 0x12345678 5
-. 89 44 24 14 C3
-
-movl %eax, 2368(%rsp,%rcx,4)
-. 578 0x12345678 8
-. 89 84 8C 40 09 00 00 C3
-
-movl %eax, 28(%rsp)
-. 579 0x12345678 5
-. 89 44 24 1C C3
-
-movl %eax, 32(%rsp,%rdx,4)
-. 580 0x12345678 5
-. 89 44 94 20 C3
-
-movl %eax, 48(%rsp)
-. 581 0x12345678 5
-. 89 44 24 30 C3
-
-movl %eax, 496(%rsp,%rdx,4)
-. 582 0x12345678 8
-. 89 84 94 F0 01 00 00 C3
-
-movl %eax, -4(%rsi,%rdx,4)
-. 583 0x12345678 5
-. 89 44 96 FC C3
-
-movl %eax, 51640(%rsi)
-. 584 0x12345678 7
-. 89 86 B8 C9 00 00 C3
-
-movl %eax, 51644(%rsi)
-. 585 0x12345678 7
-. 89 86 BC C9 00 00 C3
-
-movl %eax, 51648(%rsi)
-. 586 0x12345678 7
-. 89 86 C0 C9 00 00 C3
-
-movl %eax, 52(%rsp)
-. 587 0x12345678 5
-. 89 44 24 34 C3
-
-movl %eax, 56(%rsp)
-. 588 0x12345678 5
-. 89 44 24 38 C3
-
-movl %eax, 644(%r11)
-. 589 0x12345678 8
-. 41 89 83 84 02 00 00 C3
-
-movl %eax, 644(%rdi)
-. 590 0x12345678 7
-. 89 87 84 02 00 00 C3
-
-movl %eax, 644(%rsi)
-. 591 0x12345678 7
-. 89 86 84 02 00 00 C3
-
-movl %eax, 64(%rsp,%rcx,4)
-. 592 0x12345678 5
-. 89 44 8C 40 C3
-
-movl %eax, 64(%rsp,%rsi,4)
-. 593 0x12345678 5
-. 89 44 B4 40 C3
-
-movl %eax, 652(%rdi)
-. 594 0x12345678 7
-. 89 87 8C 02 00 00 C3
-
-movl %eax, 72(%rsp)
-. 595 0x12345678 5
-. 89 44 24 48 C3
-
-movl %eax, 88(%rsp)
-. 596 0x12345678 5
-. 89 44 24 58 C3
-
-movl %eax, 896(%rsp,%rdx,4)
-. 597 0x12345678 8
-. 89 84 94 80 03 00 00 C3
-
-movl %eax, 8(%rsp)
-. 598 0x12345678 5
-. 89 44 24 08 C3
-
-movl %eax, 96(%rsp)
-. 599 0x12345678 5
-. 89 44 24 60 C3
-
-movl %eax, 96(%rsp,%rdx,4)
-. 600 0x12345678 5
-. 89 44 94 60 C3
-
-movl %eax, %ecx
-. 601 0x12345678 3
-. 89 C1 C3
-
-movl %eax, %edi
-. 602 0x12345678 3
-. 89 C7 C3
-
-movl %eax, %edx
-. 603 0x12345678 3
-. 89 C2 C3
-
-movl %eax, %esi
-. 604 0x12345678 3
-. 89 C6 C3
-
-movl %eax, %r15d
-. 605 0x12345678 4
-. 41 89 C7 C3
-
-movl %eax, (%rbp,%rcx,4)
-. 606 0x12345678 5
-. 89 44 8D 00 C3
-
-movl %eax, (%rbp,%rdx,4)
-. 607 0x12345678 5
-. 89 44 95 00 C3
-
-movl %eax, (%rbx,%rcx,4)
-. 608 0x12345678 4
-. 89 04 8B C3
-
-movl %eax, (%rbx,%rsi,4)
-. 609 0x12345678 4
-. 89 04 B3 C3
-
-movl %eax, (%rdi,%rdx,4)
-. 610 0x12345678 4
-. 89 04 97 C3
-
-movl %ebp, %eax
-. 611 0x12345678 3
-. 89 E8 C3
-
-movl %ebp, %ecx
-. 612 0x12345678 3
-. 89 E9 C3
-
-movl %ebp, %esi
-. 613 0x12345678 3
-. 89 EE C3
-
-movl %ebp, %r12d
-. 614 0x12345678 4
-. 41 89 EC C3
-
-movl %ebp, %r8d
-. 615 0x12345678 4
-. 41 89 E8 C3
-
-movl %ebx, 2368(%rsp,%rax,4)
-. 616 0x12345678 8
-. 89 9C 84 40 09 00 00 C3
-
-movl %ebx, %eax
-. 617 0x12345678 3
-. 89 D8 C3
-
-movl %ebx, %edx
-. 618 0x12345678 3
-. 89 DA C3
-
-movl %ebx, %esi
-. 619 0x12345678 3
-. 89 DE C3
-
-movl %ebx, %r12d
-. 620 0x12345678 4
-. 41 89 DC C3
-
-movl %ebx, %r8d
-. 621 0x12345678 4
-. 41 89 D8 C3
-
-movl %ebx, (%rdi,%rax,4)
-. 622 0x12345678 4
-. 89 1C 87 C3
-
-movl %ecx, 16(%rsp)
-. 623 0x12345678 5
-. 89 4C 24 10 C3
-
-movl %ecx, 16(%rsp,%rax,4)
-. 624 0x12345678 5
-. 89 4C 84 10 C3
-
-movl %ecx, 24(%rsp)
-. 625 0x12345678 5
-. 89 4C 24 18 C3
-
-movl %ecx, 28(%rsp)
-. 626 0x12345678 5
-. 89 4C 24 1C C3
-
-movl %ecx, 36(%rsp)
-. 627 0x12345678 5
-. 89 4C 24 24 C3
-
-movl %ecx, 80(%rsp)
-. 628 0x12345678 5
-. 89 4C 24 50 C3
-
-movl %ecx, 84(%rsp)
-. 629 0x12345678 5
-. 89 4C 24 54 C3
-
-movl %ecx, %eax
-. 630 0x12345678 3
-. 89 C8 C3
-
-movl %ecx, %ebx
-. 631 0x12345678 3
-. 89 CB C3
-
-movl %ecx, %edi
-. 632 0x12345678 3
-. 89 CF C3
-
-movl %ecx, %edx
-. 633 0x12345678 3
-. 89 CA C3
-
-movl %ecx, %r12d
-. 634 0x12345678 4
-. 41 89 CC C3
-
-movl %ecx, %r13d
-. 635 0x12345678 4
-. 41 89 CD C3
-
-movl %ecx, %r8d
-. 636 0x12345678 4
-. 41 89 C8 C3
-
-movl %ecx, (%r8,%rdx,4)
-. 637 0x12345678 5
-. 41 89 0C 90 C3
-
-movl %ecx, (%rbx,%rdx,4)
-. 638 0x12345678 4
-. 89 0C 93 C3
-
-movl %edi, 64(%rsp)
-. 639 0x12345678 5
-. 89 7C 24 40 C3
-
-movl %edi, 68(%rsp)
-. 640 0x12345678 5
-. 89 7C 24 44 C3
-
-movl %edi, 84(%rsp)
-. 641 0x12345678 5
-. 89 7C 24 54 C3
-
-movl %edi, 88(%rsp)
-. 642 0x12345678 5
-. 89 7C 24 58 C3
-
-movl %edi, %eax
-. 643 0x12345678 3
-. 89 F8 C3
-
-movl %edi, %ecx
-. 644 0x12345678 3
-. 89 F9 C3
-
-movl %edi, %edx
-. 645 0x12345678 3
-. 89 FA C3
-
-movl %edi, %r10d
-. 646 0x12345678 4
-. 41 89 FA C3
-
-movl %edi, %r11d
-. 647 0x12345678 4
-. 41 89 FB C3
-
-movl %edi, (%rsi,%rax,4)
-. 648 0x12345678 4
-. 89 3C 86 C3
-
-movl %edx, 1088(%rsp,%rcx,4)
-. 649 0x12345678 8
-. 89 94 8C 40 04 00 00 C3
-
-movl %edx, 12(%rsp)
-. 650 0x12345678 5
-. 89 54 24 0C C3
-
-movl %edx, 16(%rsp)
-. 651 0x12345678 5
-. 89 54 24 10 C3
-
-movl %edx, 20(%rsp)
-. 652 0x12345678 5
-. 89 54 24 14 C3
-
-movl %edx, 416(%rsp)
-. 653 0x12345678 8
-. 89 94 24 A0 01 00 00 C3
-
-movl %edx, 48(%rbx)
-. 654 0x12345678 4
-. 89 53 30 C3
-
-movl %edx, 496(%rsp,%rax,4)
-. 655 0x12345678 8
-. 89 94 84 F0 01 00 00 C3
-
-movl %edx, 52(%rsp)
-. 656 0x12345678 5
-. 89 54 24 34 C3
-
-movl %edx, 56(%rsp)
-. 657 0x12345678 5
-. 89 54 24 38 C3
-
-movl %edx, 644(%rsi)
-. 658 0x12345678 7
-. 89 96 84 02 00 00 C3
-
-movl %edx, 648(%rdi)
-. 659 0x12345678 7
-. 89 97 88 02 00 00 C3
-
-movl %edx, 96(%rsp,%rax,4)
-. 660 0x12345678 5
-. 89 54 84 60 C3
-
-movl %edx, %eax
-. 661 0x12345678 3
-. 89 D0 C3
-
-movl %edx, %ebp
-. 662 0x12345678 3
-. 89 D5 C3
-
-movl %edx, %ebx
-. 663 0x12345678 3
-. 89 D3 C3
-
-movl %edx, %ecx
-. 664 0x12345678 3
-. 89 D1 C3
-
-movl %edx, %edi
-. 665 0x12345678 3
-. 89 D7 C3
-
-movl %edx, %esi
-. 666 0x12345678 3
-. 89 D6 C3
-
-movl %edx, %r12d
-. 667 0x12345678 4
-. 41 89 D4 C3
-
-movl %edx, (%r15,%rax,4)
-. 668 0x12345678 5
-. 41 89 14 87 C3
-
-movl %esi, 1056(%rsp,%rax,4)
-. 669 0x12345678 8
-. 89 B4 84 20 04 00 00 C3
-
-movl %esi, 416(%rsp,%rax,4)
-. 670 0x12345678 8
-. 89 B4 84 A0 01 00 00 C3
-
-movl %esi, 64(%rsp)
-. 671 0x12345678 5
-. 89 74 24 40 C3
-
-movl %esi, 68(%rsp)
-. 672 0x12345678 5
-. 89 74 24 44 C3
-
-movl %esi, %eax
-. 673 0x12345678 3
-. 89 F0 C3
-
-movl %esi, %ebp
-. 674 0x12345678 3
-. 89 F5 C3
-
-movl %esi, %ebx
-. 675 0x12345678 3
-. 89 F3 C3
-
-movl %esi, %ecx
-. 676 0x12345678 3
-. 89 F1 C3
-
-movl %esi, %edx
-. 677 0x12345678 3
-. 89 F2 C3
-
-movl %esi, %r8d
-. 678 0x12345678 4
-. 41 89 F0 C3
-
-movl %esi, (%rbx,%rdx,4)
-. 679 0x12345678 4
-. 89 34 93 C3
-
-movl 12345(,%rax,4), %r12d
-. 680 0x12345678 9
-. 44 8B 24 85 39 30 00 00 C3
-
-movl $0x12345678, %esi
-. 681 0x12345678 6
-. BE 78 56 34 12 C3
-
-movl %r10d, %ecx
-. 682 0x12345678 4
-. 44 89 D1 C3
-
-movl %r10d, %r11d
-. 683 0x12345678 4
-. 45 89 D3 C3
-
-movl %r10d, %r9d
-. 684 0x12345678 4
-. 45 89 D1 C3
-
-movl (%r10,%rax,4), %r8d
-. 685 0x12345678 5
-. 45 8B 04 82 C3
-
-movl %r12d, 20(%rsp)
-. 686 0x12345678 6
-. 44 89 64 24 14 C3
-
-movl %r12d, 28(%rsp)
-. 687 0x12345678 6
-. 44 89 64 24 1C C3
-
-movl %r12d, %eax
-. 688 0x12345678 4
-. 44 89 E0 C3
-
-movl %r12d, %ecx
-. 689 0x12345678 4
-. 44 89 E1 C3
-
-movl %r12d, %edi
-. 690 0x12345678 4
-. 44 89 E7 C3
-
-movl %r12d, %edx
-. 691 0x12345678 4
-. 44 89 E2 C3
-
-movl %r12d, %esi
-. 692 0x12345678 4
-. 44 89 E6 C3
-
-movl %r12d, %r10d
-. 693 0x12345678 4
-. 45 89 E2 C3
-
-movl %r12d, %r8d
-. 694 0x12345678 4
-. 45 89 E0 C3
-
-movl %r12d, (%rbp,%rax,4)
-. 695 0x12345678 6
-. 44 89 64 85 00 C3
-
-movl (%r12,%rax,4), %ecx
-. 696 0x12345678 5
-. 41 8B 0C 84 C3
-
-movl %r13d, 416(%rsp,%rax,4)
-. 697 0x12345678 9
-. 44 89 AC 84 A0 01 00 00 C3
-
-movl %r13d, 48(%rsp)
-. 698 0x12345678 6
-. 44 89 6C 24 30 C3
-
-movl %r13d, 52(%rsp)
-. 699 0x12345678 6
-. 44 89 6C 24 34 C3
-
-movl %r13d, %eax
-. 700 0x12345678 4
-. 44 89 E8 C3
-
-movl %r13d, %ebp
-. 701 0x12345678 4
-. 44 89 ED C3
-
-movl %r13d, %ebx
-. 702 0x12345678 4
-. 44 89 EB C3
-
-movl %r13d, %edx
-. 703 0x12345678 4
-. 44 89 EA C3
-
-movl %r13d, %r10d
-. 704 0x12345678 4
-. 45 89 EA C3
-
-movl %r13d, %r11d
-. 705 0x12345678 4
-. 45 89 EB C3
-
-movl %r13d, %r12d
-. 706 0x12345678 4
-. 45 89 EC C3
-
-movl %r13d, %r8d
-. 707 0x12345678 4
-. 45 89 E8 C3
-
-movl %r13d, %r9d
-. 708 0x12345678 4
-. 45 89 E9 C3
-
-movl %r13d, (%rsp)
-. 709 0x12345678 5
-. 44 89 2C 24 C3
-
-movl %r14d, 16(%rsp,%rax,4)
-. 710 0x12345678 6
-. 44 89 74 84 10 C3
-
-movl %r14d, %eax
-. 711 0x12345678 4
-. 44 89 F0 C3
-
-movl %r14d, %ebp
-. 712 0x12345678 4
-. 44 89 F5 C3
-
-movl %r14d, %ebx
-. 713 0x12345678 4
-. 44 89 F3 C3
-
-movl %r14d, %edi
-. 714 0x12345678 4
-. 44 89 F7 C3
-
-movl %r14d, %edx
-. 715 0x12345678 4
-. 44 89 F2 C3
-
-movl %r14d, %esi
-. 716 0x12345678 4
-. 44 89 F6 C3
-
-movl %r14d, %r11d
-. 717 0x12345678 4
-. 45 89 F3 C3
-
-movl %r14d, %r8d
-. 718 0x12345678 4
-. 45 89 F0 C3
-
-movl %r14d, %r9d
-. 719 0x12345678 4
-. 45 89 F1 C3
-
-movl %r14d, (%rbp,%rax,4)
-. 720 0x12345678 6
-. 44 89 74 85 00 C3
-
-movl %r15d, 80(%rsp)
-. 721 0x12345678 6
-. 44 89 7C 24 50 C3
-
-movl %r15d, 84(%rsp)
-. 722 0x12345678 6
-. 44 89 7C 24 54 C3
-
-movl %r15d, 896(%rsp,%rax,4)
-. 723 0x12345678 9
-. 44 89 BC 84 80 03 00 00 C3
-
-movl %r15d, %ebp
-. 724 0x12345678 4
-. 44 89 FD C3
-
-movl %r15d, %esi
-. 725 0x12345678 4
-. 44 89 FE C3
-
-movl %r15d, %r14d
-. 726 0x12345678 4
-. 45 89 FE C3
-
-movl %r15d, %r8d
-. 727 0x12345678 4
-. 45 89 F8 C3
-
-movl %r15d, %r9d
-. 728 0x12345678 4
-. 45 89 F9 C3
-
-movl (%r15,%rax,4), %eax
-. 729 0x12345678 5
-. 41 8B 04 87 C3
-
-movl (%r15,%rax,4), %edx
-. 730 0x12345678 5
-. 41 8B 14 87 C3
-
-movl (%r15,%rax,4), %r8d
-. 731 0x12345678 5
-. 45 8B 04 87 C3
-
-movl %r8d, 12(%rsp)
-. 732 0x12345678 6
-. 44 89 44 24 0C C3
-
-movl %r8d, 20(%rsp)
-. 733 0x12345678 6
-. 44 89 44 24 14 C3
-
-movl %r8d, 2368(%rsp,%rax,4)
-. 734 0x12345678 9
-. 44 89 84 84 40 09 00 00 C3
-
-movl %r8d, 32(%rsp)
-. 735 0x12345678 6
-. 44 89 44 24 20 C3
-
-movl %r8d, 36(%rsp)
-. 736 0x12345678 6
-. 44 89 44 24 24 C3
-
-movl %r8d, 668(%rbx)
-. 737 0x12345678 8
-. 44 89 83 9C 02 00 00 C3
-
-movl %r8d, 68(%rsp)
-. 738 0x12345678 6
-. 44 89 44 24 44 C3
-
-movl %r8d, 72(%rsp)
-. 739 0x12345678 6
-. 44 89 44 24 48 C3
-
-movl %r8d, 896(%rsp)
-. 740 0x12345678 9
-. 44 89 84 24 80 03 00 00 C3
-
-movl %r8d, %edx
-. 741 0x12345678 4
-. 44 89 C2 C3
-
-movl %r8d, %esi
-. 742 0x12345678 4
-. 44 89 C6 C3
-
-movl (%r8,%rax,4), %ecx
-. 743 0x12345678 5
-. 41 8B 0C 80 C3
-
-movl (%r8,%rax,4), %r10d
-. 744 0x12345678 5
-. 45 8B 14 80 C3
-
-movl (%r8,%rax,4), %r8d
-. 745 0x12345678 5
-. 45 8B 04 80 C3
-
-movl %r9d, -16(%rsi,%rax,4)
-. 746 0x12345678 6
-. 44 89 4C 86 F0 C3
-
-movl %r9d, 28(%rsp)
-. 747 0x12345678 6
-. 44 89 4C 24 1C C3
-
-movl %r9d, 32(%rsp)
-. 748 0x12345678 6
-. 44 89 4C 24 20 C3
-
-movl %r9d, 496(%rsp)
-. 749 0x12345678 9
-. 44 89 8C 24 F0 01 00 00 C3
-
-movl %r9d, -4(%rsi,%rax,4)
-. 750 0x12345678 6
-. 44 89 4C 86 FC C3
-
-movl %r9d, %ebp
-. 751 0x12345678 4
-. 44 89 CD C3
-
-movl %r9d, %ecx
-. 752 0x12345678 4
-. 44 89 C9 C3
-
-movl %r9d, %edi
-. 753 0x12345678 4
-. 44 89 CF C3
-
-movl %r9d, %edx
-. 754 0x12345678 4
-. 44 89 CA C3
-
-movl %r9d, %r8d
-. 755 0x12345678 4
-. 45 89 C8 C3
-
-movl (%rbp,%rax,4), %eax
-. 756 0x12345678 5
-. 8B 44 85 00 C3
-
-movl (%rbp,%rax,4), %edx
-. 757 0x12345678 5
-. 8B 54 85 00 C3
-
-movl (%rbp,%rax,4), %r12d
-. 758 0x12345678 6
-. 44 8B 64 85 00 C3
-
-movl (%rbp,%rax,4), %r14d
-. 759 0x12345678 6
-. 44 8B 74 85 00 C3
-
-movl (%rbp,%rax), %eax
-. 760 0x12345678 5
-. 8B 44 05 00 C3
-
-movl (%rbp,%rax), %edx
-. 761 0x12345678 5
-. 8B 54 05 00 C3
-
-movl (%rbp,%rax), %r12d
-. 762 0x12345678 6
-. 44 8B 64 05 00 C3
-
-movl (%rbp,%rax), %r8d
-. 763 0x12345678 6
-. 44 8B 44 05 00 C3
-
-movl (%rbp,%rdx,4), %eax
-. 764 0x12345678 5
-. 8B 44 95 00 C3
-
-movl (%rbp,%rdx), %edx
-. 765 0x12345678 5
-. 8B 54 15 00 C3
-
-movl (%rbx,%rax,4), %edi
-. 766 0x12345678 4
-. 8B 3C 83 C3
-
-movl (%rbx,%rax,4), %edx
-. 767 0x12345678 4
-. 8B 14 83 C3
-
-movl (%rbx,%rcx,4), %esi
-. 768 0x12345678 4
-. 8B 34 8B C3
-
-movl (%rbx,%rdx,4), %eax
-. 769 0x12345678 4
-. 8B 04 93 C3
-
-movl (%rbx,%rsi,4), %ecx
-. 770 0x12345678 4
-. 8B 0C B3 C3
-
-movl (%rdx,%rax,4), %ecx
-. 771 0x12345678 4
-. 8B 0C 82 C3
-
-movl (%rsi,%rax,4), %r9d
-. 772 0x12345678 5
-. 44 8B 0C 86 C3
-
-movl (%rsi,%rdx,4), %eax
-. 773 0x12345678 4
-. 8B 04 96 C3
-
-movq 120(%rsp), %r9
-. 774 0x12345678 6
-. 4C 8B 4C 24 78 C3
-
-movq 120(%rsp), %rax
-. 775 0x12345678 6
-. 48 8B 44 24 78 C3
-
-movq 1368(%rsp), %rdi
-. 776 0x12345678 9
-. 48 8B BC 24 58 05 00 00 C3
-
-movq 1368(%rsp), %rsi
-. 777 0x12345678 9
-. 48 8B B4 24 58 05 00 00 C3
-
-movq 24(%rbx), %rdi
-. 778 0x12345678 5
-. 48 8B 7B 18 C3
-
-movq 24(%rsp), %rbp
-. 779 0x12345678 6
-. 48 8B 6C 24 18 C3
-
-movq 24(%rsp), %rbx
-. 780 0x12345678 6
-. 48 8B 5C 24 18 C3
-
-movq 24(%rsp), %rcx
-. 781 0x12345678 6
-. 48 8B 4C 24 18 C3
-
-movq 24(%rsp), %rdi
-. 782 0x12345678 6
-. 48 8B 7C 24 18 C3
-
-movq 24(%rsp), %rdx
-. 783 0x12345678 6
-. 48 8B 54 24 18 C3
-
-movq 24(%rsp), %rsi
-. 784 0x12345678 6
-. 48 8B 74 24 18 C3
-
-movq 32(%rbx), %rsi
-. 785 0x12345678 5
-. 48 8B 73 20 C3
-
-movq 32(%rsp), %rbp
-. 786 0x12345678 6
-. 48 8B 6C 24 20 C3
-
-movq 32(%rsp), %rdx
-. 787 0x12345678 6
-. 48 8B 54 24 20 C3
-
-movq 3456(%rsp), %rdx
-. 788 0x12345678 9
-. 48 8B 94 24 80 0D 00 00 C3
-
-movq 3456(%rsp), %rsi
-. 789 0x12345678 9
-. 48 8B B4 24 80 0D 00 00 C3
-
-movq 40(%rdi), %r15
-. 790 0x12345678 5
-. 4C 8B 7F 28 C3
-
-movq 40(%rsp), %r12
-. 791 0x12345678 6
-. 4C 8B 64 24 28 C3
-
-movq 40(%rsp), %r8
-. 792 0x12345678 6
-. 4C 8B 44 24 28 C3
-
-movq 40(%rsp), %rcx
-. 793 0x12345678 6
-. 48 8B 4C 24 28 C3
-
-movq 40(%rsp), %rdi
-. 794 0x12345678 6
-. 48 8B 7C 24 28 C3
-
-movq 40(%rsp), %rdx
-. 795 0x12345678 6
-. 48 8B 54 24 28 C3
-
-movq 40(%rsp), %rsi
-. 796 0x12345678 6
-. 48 8B 74 24 28 C3
-
-movq 48(%rsp), %r13
-. 797 0x12345678 6
-. 4C 8B 6C 24 30 C3
-
-movq 48(%rsp), %r8
-. 798 0x12345678 6
-. 4C 8B 44 24 30 C3
-
-movq 48(%rsp), %rax
-. 799 0x12345678 6
-. 48 8B 44 24 30 C3
-
-movq 48(%rsp), %rcx
-. 800 0x12345678 6
-. 48 8B 4C 24 30 C3
-
-movq 48(%rsp), %rdx
-. 801 0x12345678 6
-. 48 8B 54 24 30 C3
-
-movq 48(%rsp), %rsi
-. 802 0x12345678 6
-. 48 8B 74 24 30 C3
-
-movq 56(%rdi), %r12
-. 803 0x12345678 5
-. 4C 8B 67 38 C3
-
-movq 56(%rdi), %r14
-. 804 0x12345678 5
-. 4C 8B 77 38 C3
-
-movq 56(%rsp), %r14
-. 805 0x12345678 6
-. 4C 8B 74 24 38 C3
-
-movq 56(%rsp), %r8
-. 806 0x12345678 6
-. 4C 8B 44 24 38 C3
-
-movq 56(%rsp), %rdi
-. 807 0x12345678 6
-. 48 8B 7C 24 38 C3
-
-movq 56(%rsp), %rdx
-. 808 0x12345678 6
-. 48 8B 54 24 38 C3
-
-movq 56(%rsp), %rsi
-. 809 0x12345678 6
-. 48 8B 74 24 38 C3
-
-movq 64(%rdi), %r13
-. 810 0x12345678 5
-. 4C 8B 6F 40 C3
-
-movq 64(%rdi), %rsi
-. 811 0x12345678 5
-. 48 8B 77 40 C3
-
-movq 64(%rsp), %r15
-. 812 0x12345678 6
-. 4C 8B 7C 24 40 C3
-
-movq 72(%rdi), %r15
-. 813 0x12345678 5
-. 4C 8B 7F 48 C3
-
-movq 72(%rdi), %rbp
-. 814 0x12345678 5
-. 48 8B 6F 48 C3
-
-movq 80(%r11), %rdx
-. 815 0x12345678 5
-. 49 8B 53 50 C3
-
-movq 80(%rdi), %rdx
-. 816 0x12345678 5
-. 48 8B 57 50 C3
-
-movq 80(%rsi), %rdx
-. 817 0x12345678 5
-. 48 8B 56 50 C3
-
-movq %r12, -32(%rsp)
-. 818 0x12345678 6
-. 4C 89 64 24 E0 C3
-
-movq %r13, -24(%rsp)
-. 819 0x12345678 6
-. 4C 89 6C 24 E8 C3
-
-movq %r14, -16(%rsp)
-. 820 0x12345678 6
-. 4C 89 74 24 F0 C3
-
-movq %r14, %rdi
-. 821 0x12345678 4
-. 4C 89 F7 C3
-
-movq %r15, -8(%rsp)
-. 822 0x12345678 6
-. 4C 89 7C 24 F8 C3
-
-movq %r15, %r10
-. 823 0x12345678 4
-. 4D 89 FA C3
-
-movq %r15, %rcx
-. 824 0x12345678 4
-. 4C 89 F9 C3
-
-movq %r15, %rdx
-. 825 0x12345678 4
-. 4C 89 FA C3
-
-movq %r15, %rsi
-. 826 0x12345678 4
-. 4C 89 FE C3
-
-movq %rax, 80(%rbx)
-. 827 0x12345678 5
-. 48 89 43 50 C3
-
-movq %rax, %r10
-. 828 0x12345678 4
-. 49 89 C2 C3
-
-movq %rax, %rcx
-. 829 0x12345678 4
-. 48 89 C1 C3
-
-movq %rax, %rdi
-. 830 0x12345678 4
-. 48 89 C7 C3
-
-movq %rax, %rdx
-. 831 0x12345678 4
-. 48 89 C2 C3
-
-movq %rax, (%rsp)
-. 832 0x12345678 5
-. 48 89 04 24 C3
-
-movq %rbp, -40(%rsp)
-. 833 0x12345678 6
-. 48 89 6C 24 D8 C3
-
-movq %rbp, %r11
-. 834 0x12345678 4
-. 49 89 EB C3
-
-movq %rbp, %rsi
-. 835 0x12345678 4
-. 48 89 EE C3
-
-movq %rbx, -48(%rsp)
-. 836 0x12345678 6
-. 48 89 5C 24 D0 C3
-
-movq %rbx, %rdi
-. 837 0x12345678 4
-. 48 89 DF C3
-
-movq %rbx, %rsi
-. 838 0x12345678 4
-. 48 89 DE C3
-
-movq %rcx, %rbp
-. 839 0x12345678 4
-. 48 89 CD C3
-
-movq %rcx, %rsi
-. 840 0x12345678 4
-. 48 89 CE C3
-
-movq %rdi, 24(%rsp)
-. 841 0x12345678 6
-. 48 89 7C 24 18 C3
-
-movq %rdi, 56(%rsp)
-. 842 0x12345678 6
-. 48 89 7C 24 38 C3
-
-movq %rdi, %rbp
-. 843 0x12345678 4
-. 48 89 FD C3
-
-movq %rdi, %rbx
-. 844 0x12345678 4
-. 48 89 FB C3
-
-movq %rdi, %rsi
-. 845 0x12345678 4
-. 48 89 FE C3
-
-movq %rdx, 32(%rsp)
-. 846 0x12345678 6
-. 48 89 54 24 20 C3
-
-movq %rdx, 40(%rsp)
-. 847 0x12345678 6
-. 48 89 54 24 28 C3
-
-movq %rdx, 8(%rsp)
-. 848 0x12345678 6
-. 48 89 54 24 08 C3
-
-movq %rdx, %rax
-. 849 0x12345678 4
-. 48 89 D0 C3
-
-movq %rdx, %rbx
-. 850 0x12345678 4
-. 48 89 D3 C3
-
-movq %rdx, %rdi
-. 851 0x12345678 4
-. 48 89 D7 C3
-
-movq %rsi, 40(%rsp)
-. 852 0x12345678 6
-. 48 89 74 24 28 C3
-
-movq %rsi, 48(%rsp)
-. 853 0x12345678 6
-. 48 89 74 24 30 C3
-
-movq %rsi, 8(%rsp)
-. 854 0x12345678 6
-. 48 89 74 24 08 C3
-
-movq %rsi, %r15
-. 855 0x12345678 4
-. 49 89 F7 C3
-
-movq %rsi, %rdx
-. 856 0x12345678 4
-. 48 89 F2 C3
-
-movq %rsi, (%rsp)
-. 857 0x12345678 5
-. 48 89 34 24 C3
-
-movq %rsp, %r11
-. 858 0x12345678 4
-. 49 89 E3 C3
-
-movq (%rsp), %rcx
-. 859 0x12345678 5
-. 48 8B 0C 24 C3
-
-movq (%rsp), %rdx
-. 860 0x12345678 5
-. 48 8B 14 24 C3
-
-movq (%rsp), %rsi
-. 861 0x12345678 5
-. 48 8B 34 24 C3
-
-movq -999(%rip), %rcx
-. 862 0x12345678 8
-. 48 8B 0D 19 FC FF FF C3
-
-movq 1(%rip), %rdi
-. 863 0x12345678 8
-. 48 8B 3D 01 00 00 00 C3
-
-movq 2(%rip), %rsi
-. 864 0x12345678 8
-. 48 8B 35 02 00 00 00 C3
-
-mov (%rbx,%rax,4), %eax
-. 865 0x12345678 4
-. 8B 04 83 C3
-
-mov (%rbx,%rsi,4), %eax
-. 866 0x12345678 4
-. 8B 04 B3 C3
-
-mov (%rcx,%rax,4), %eax
-. 867 0x12345678 4
-. 8B 04 81 C3
-
-mov (%rdx,%rax,4), %eax
-. 868 0x12345678 4
-. 8B 04 82 C3
-
-mov (%rsi,%rax,4), %eax
-. 869 0x12345678 4
-. 8B 04 86 C3
-
-mov (%rsi,%rdx,4), %eax
-. 870 0x12345678 4
-. 8B 04 96 C3
-
-movslq 108(%rbx),%rax
-. 871 0x12345678 5
-. 48 63 43 6C C3
-
-movslq 116(%r11),%rcx
-. 872 0x12345678 5
-. 49 63 4B 74 C3
-
-movslq 116(%rdi),%rcx
-. 873 0x12345678 5
-. 48 63 4F 74 C3
-
-movslq 116(%rsi),%rcx
-. 874 0x12345678 5
-. 48 63 4E 74 C3
-
-movslq 12(%rsp),%rax
-. 875 0x12345678 6
-. 48 63 44 24 0C C3
-
-movslq 20(%rsp),%rax
-. 876 0x12345678 6
-. 48 63 44 24 14 C3
-
-movslq 24(%rsp),%rax
-. 877 0x12345678 6
-. 48 63 44 24 18 C3
-
-movslq 24(%rsp),%rdx
-. 878 0x12345678 6
-. 48 63 54 24 18 C3
-
-movslq 28(%rsp),%r8
-. 879 0x12345678 6
-. 4C 63 44 24 1C C3
-
-movslq 28(%rsp),%rax
-. 880 0x12345678 6
-. 48 63 44 24 1C C3
-
-movslq 28(%rsp),%rcx
-. 881 0x12345678 6
-. 48 63 4C 24 1C C3
-
-movslq %eax,%rdx
-. 882 0x12345678 4
-. 48 63 D0 C3
-
-movslq %ebp,%rcx
-. 883 0x12345678 4
-. 48 63 CD C3
-
-movslq %ebp,%rdx
-. 884 0x12345678 4
-. 48 63 D5 C3
-
-movslq %ebx,%r10
-. 885 0x12345678 4
-. 4C 63 D3 C3
-
-movslq %ebx,%rax
-. 886 0x12345678 4
-. 48 63 C3 C3
-
-movslq %ebx,%rcx
-. 887 0x12345678 4
-. 48 63 CB C3
-
-movslq %ebx,%rdx
-. 888 0x12345678 4
-. 48 63 D3 C3
-
-movslq %ecx,%rax
-. 889 0x12345678 4
-. 48 63 C1 C3
-
-movslq %ecx,%rdx
-. 890 0x12345678 4
-. 48 63 D1 C3
-
-movslq %edi,%rax
-. 891 0x12345678 4
-. 48 63 C7 C3
-
-movslq %edi,%rcx
-. 892 0x12345678 4
-. 48 63 CF C3
-
-movslq %edi,%rdx
-. 893 0x12345678 4
-. 48 63 D7 C3
-
-movslq %edi,%rsi
-. 894 0x12345678 4
-. 48 63 F7 C3
-
-movslq %edx,%rax
-. 895 0x12345678 4
-. 48 63 C2 C3
-
-movslq %edx,%rdx
-. 896 0x12345678 4
-. 48 63 D2 C3
-
-movslq %edx,%rsi
-. 897 0x12345678 4
-. 48 63 F2 C3
-
-movslq %esi,%rax
-. 898 0x12345678 4
-. 48 63 C6 C3
-
-movslq %r10d,%rax
-. 899 0x12345678 4
-. 49 63 C2 C3
-
-movslq %r10d,%rcx
-. 900 0x12345678 4
-. 49 63 CA C3
-
-movslq %r10d,%rdx
-. 901 0x12345678 4
-. 49 63 D2 C3
-
-movslq %r10d,%rsi
-. 902 0x12345678 4
-. 49 63 F2 C3
-
-movslq %r11d,%rcx
-. 903 0x12345678 4
-. 49 63 CB C3
-
-movslq %r11d,%rdx
-. 904 0x12345678 4
-. 49 63 D3 C3
-
-movslq %r12d,%rax
-. 905 0x12345678 4
-. 49 63 C4 C3
-
-movslq %r12d,%rcx
-. 906 0x12345678 4
-. 49 63 CC C3
-
-movslq %r12d,%rdx
-. 907 0x12345678 4
-. 49 63 D4 C3
-
-movslq %r13d,%rax
-. 908 0x12345678 4
-. 49 63 C5 C3
-
-movslq %r13d,%rdx
-. 909 0x12345678 4
-. 49 63 D5 C3
-
-movslq %r14d,%rax
-. 910 0x12345678 4
-. 49 63 C6 C3
-
-movslq %r14d,%rdx
-. 911 0x12345678 4
-. 49 63 D6 C3
-
-movslq %r15d,%rax
-. 912 0x12345678 4
-. 49 63 C7 C3
-
-movslq %r8d,%rax
-. 913 0x12345678 4
-. 49 63 C0 C3
-
-movslq %r8d,%rdx
-. 914 0x12345678 4
-. 49 63 D0 C3
-
-movslq %r9d,%rax
-. 915 0x12345678 4
-. 49 63 C1 C3
-
-movslq %r9d,%rcx
-. 916 0x12345678 4
-. 49 63 C9 C3
-
-movslq %r9d,%rdx
-. 917 0x12345678 4
-. 49 63 D1 C3
-
-movw $0, -2(%rdi,%rdx,2)
-. 918 0x12345678 8
-. 66 C7 44 57 FE 00 00 C3
-
-movw $0, -4(%rdi,%rdx,2)
-. 919 0x12345678 8
-. 66 C7 44 57 FC 00 00 C3
-
-movw $0, -6(%rdi,%rdx,2)
-. 920 0x12345678 8
-. 66 C7 44 57 FA 00 00 C3
-
-movw $0, 80(%rsp,%rax,2)
-. 921 0x12345678 8
-. 66 C7 44 44 50 00 00 C3
-
-movw $0, (%r8,%rax,2)
-. 922 0x12345678 8
-. 66 41 C7 04 40 00 00 C3
-
-movw $0, (%rbp,%rax,2)
-. 923 0x12345678 8
-. 66 C7 44 45 00 00 00 C3
-
-movw $0, (%rcx,%rdx,2)
-. 924 0x12345678 7
-. 66 C7 04 51 00 00 C3
-
-movw $0, (%rdi,%rax,2)
-. 925 0x12345678 7
-. 66 C7 04 47 00 00 C3
-
-movw $1, (%rbp,%rax,2)
-. 926 0x12345678 8
-. 66 C7 44 45 00 01 00 C3
-
-movw %ax, (%rbp,%rdx,2)
-. 927 0x12345678 6
-. 66 89 44 55 00 C3
-
-movw %cx, 80(%rsp)
-. 928 0x12345678 6
-. 66 89 4C 24 50 C3
-
-movw %cx, 82(%rsp)
-. 929 0x12345678 6
-. 66 89 4C 24 52 C3
-
-movw %di, 88(%rsp)
-. 930 0x12345678 6
-. 66 89 7C 24 58 C3
-
-movw %di, 90(%rsp)
-. 931 0x12345678 6
-. 66 89 7C 24 5A C3
-
-movw %r10w, (%rbp,%rax,2)
-. 932 0x12345678 7
-. 66 44 89 54 45 00 C3
-
-movw %si, 84(%rsp)
-. 933 0x12345678 6
-. 66 89 74 24 54 C3
-
-movw %si, 86(%rsp)
-. 934 0x12345678 6
-. 66 89 74 24 56 C3
-
-movw %si, (%rcx,%rax,2)
-. 935 0x12345678 5
-. 66 89 34 41 C3
-
-movzbl 124(%rdi), %eax
-. 936 0x12345678 5
-. 0F B6 47 7C C3
-
-movzbl 12(%r10), %eax
-. 937 0x12345678 6
-. 41 0F B6 42 0C C3
-
-movzbl 12(%r9), %eax
-. 938 0x12345678 6
-. 41 0F B6 41 0C C3
-
-movzbl 1704(%rbp,%rax), %eax
-. 939 0x12345678 9
-. 0F B6 84 05 A8 06 00 00 C3
-
-movzbl 1704(%rbp,%rax), %esi
-. 940 0x12345678 9
-. 0F B6 B4 05 A8 06 00 00 C3
-
-movzbl 19706(%rbp,%r10), %eax
-. 941 0x12345678 10
-. 42 0F B6 84 15 FA 4C 00 00 C3
-
-movzbl -1(%rcx,%r8), %eax
-. 942 0x12345678 7
-. 42 0F B6 44 01 FF C3
-
-movzbl -1(%rdx,%rsi), %eax
-. 943 0x12345678 6
-. 0F B6 44 32 FF C3
-
-movzbl 1(%rsp), %ecx
-. 944 0x12345678 6
-. 0F B6 4C 24 01 C3
-
-movzbl -2(%rcx,%r8), %eax
-. 945 0x12345678 7
-. 42 0F B6 44 01 FE C3
-
-movzbl -2(%rdx,%rsi), %eax
-. 946 0x12345678 6
-. 0F B6 44 32 FE C3
-
-movzbl 32(%rsp), %ecx
-. 947 0x12345678 6
-. 0F B6 4C 24 20 C3
-
-movzbl 32(%rsp,%rax), %ecx
-. 948 0x12345678 6
-. 0F B6 4C 04 20 C3
-
-movzbl 37708(%rax,%r13), %eax
-. 949 0x12345678 10
-. 42 0F B6 84 28 4C 93 00 00 C3
-
-movzbl 37708(%rax,%rdx), %eax
-. 950 0x12345678 9
-. 0F B6 84 10 4C 93 00 00 C3
-
-movzbl 37708(%rbp,%rax,2), %r8d
-. 951 0x12345678 10
-. 44 0F B6 84 45 4C 93 00 00 C3
-
-movzbl 37708(%rbp,%rcx), %edx
-. 952 0x12345678 9
-. 0F B6 94 0D 4C 93 00 00 C3
-
-movzbl 37708(%rcx,%rdx), %r8d
-. 953 0x12345678 10
-. 44 0F B6 84 11 4C 93 00 00 C3
-
-movzbl 37966(%rbp,%rcx), %eax
-. 954 0x12345678 9
-. 0F B6 84 0D 4E 94 00 00 C3
-
-movzbl 38224(%rbp,%rcx), %edx
-. 955 0x12345678 9
-. 0F B6 94 0D 50 95 00 00 C3
-
-movzbl 38482(%rbp,%rcx), %eax
-. 956 0x12345678 9
-. 0F B6 84 0D 52 96 00 00 C3
-
-movzbl 384(%rbx,%rax), %esi
-. 957 0x12345678 9
-. 0F B6 B4 03 80 01 00 00 C3
-
-movzbl 38740(%rbp,%rcx), %edx
-. 958 0x12345678 9
-. 0F B6 94 0D 54 97 00 00 C3
-
-movzbl 38998(%rbp,%rcx), %eax
-. 959 0x12345678 9
-. 0F B6 84 0D 56 98 00 00 C3
-
-movzbl -3(%rcx,%r8), %eax
-. 960 0x12345678 7
-. 42 0F B6 44 01 FD C3
-
-movzbl -3(%rdx,%rsi), %eax
-. 961 0x12345678 6
-. 0F B6 44 32 FD C3
-
-movzbl 643(%r11), %eax
-. 962 0x12345678 9
-. 41 0F B6 83 83 02 00 00 C3
-
-movzbl 643(%rdi), %eax
-. 963 0x12345678 8
-. 0F B6 87 83 02 00 00 C3
-
-movzbl 643(%rsi), %eax
-. 964 0x12345678 8
-. 0F B6 86 83 02 00 00 C3
-
-movzbl 664(%rbx), %eax
-. 965 0x12345678 8
-. 0F B6 83 98 02 00 00 C3
-
-movzbl %al, %eax
-. 966 0x12345678 4
-. 0F B6 C0 C3
-
-movzbl %al, %r14d
-. 967 0x12345678 5
-. 44 0F B6 F0 C3
-
-movzbl %bh, %ebp
-. 968 0x12345678 4
-. 0F B6 EF C3
-
-movzbl %bl,%esi
-. 969 0x12345678 4
-. 0F B6 F3 C3
-
-movzbl %dl, %r11d
-. 970 0x12345678 5
-. 44 0F B6 DA C3
-
-movzbl (%rax), %r12d
-. 971 0x12345678 5
-. 44 0F B6 20 C3
-
-movzbl (%rax,%rcx), %eax
-. 972 0x12345678 5
-. 0F B6 04 08 C3
-
-movzbl (%rax,%rdi), %eax
-. 973 0x12345678 5
-. 0F B6 04 38 C3
-
-movzbl (%rax,%rdi), %edi
-. 974 0x12345678 5
-. 0F B6 3C 38 C3
-
-movzbl (%rax,%rdi), %esi
-. 975 0x12345678 5
-. 0F B6 34 38 C3
-
-movzbl (%rax,%rdi), %r9d
-. 976 0x12345678 6
-. 44 0F B6 0C 38 C3
-
-movzbl (%rax,%rdx), %eax
-. 977 0x12345678 5
-. 0F B6 04 10 C3
-
-movzbl (%rax,%rdx), %r10d
-. 978 0x12345678 6
-. 44 0F B6 14 10 C3
-
-movzbl (%rax,%rsi), %ecx
-. 979 0x12345678 5
-. 0F B6 0C 30 C3
-
-movzbl (%rax,%rsi), %edx
-. 980 0x12345678 5
-. 0F B6 14 30 C3
-
-movzbl (%rcx,%rsi), %eax
-. 981 0x12345678 5
-. 0F B6 04 31 C3
-
-movzbl (%rdx), %ecx
-. 982 0x12345678 4
-. 0F B6 0A C3
-
-movzbl (%rdx,%rsi), %eax
-. 983 0x12345678 5
-. 0F B6 04 32 C3
-
-movzbl (%rdx,%rsi), %edx
-. 984 0x12345678 5
-. 0F B6 14 32 C3
-
-movzbl (%rsp), %eax
-. 985 0x12345678 5
-. 0F B6 04 24 C3
-
-movzbl %sil, %esi
-. 986 0x12345678 5
-. 40 0F B6 F6 C3
-
-movzbq 1704(%rbp,%r10), %rdx
-. 987 0x12345678 10
-. 4A 0F B6 94 15 A8 06 00 00 C3
-
-movzbq 1704(%rbp,%rax), %rdx
-. 988 0x12345678 10
-. 48 0F B6 94 05 A8 06 00 00 C3
-
-movzbq (%rax,%r13), %rax
-. 989 0x12345678 6
-. 4A 0F B6 04 28 C3
-
-movzbq (%rax,%r8), %rsi
-. 990 0x12345678 6
-. 4A 0F B6 34 00 C3
-
-movzbq (%rax,%rcx), %rax
-. 991 0x12345678 6
-. 48 0F B6 04 08 C3
-
-movzbq (%rax,%rdx), %rax
-. 992 0x12345678 6
-. 48 0F B6 04 10 C3
-
-movzbw 37708(%rcx,%rdx), %dx
-. 993 0x12345678 10
-. 66 0F B6 94 11 4C 93 00 00 C3
-
-movzbw (%r8), %si
-. 994 0x12345678 6
-. 66 41 0F B6 30 C3
-
-movzwl 80(%rsp,%rax,2), %eax
-. 995 0x12345678 6
-. 0F B7 44 44 50 C3
-
-movzwl 86(%r15,%r8,2), %edx
-. 996 0x12345678 7
-. 43 0F B7 54 47 56 C3
-
-movzwl %ax, %ecx
-. 997 0x12345678 4
-. 0F B7 C8 C3
-
-movzwl %dx, %eax
-. 998 0x12345678 4
-. 0F B7 C2 C3
-
-movzwl (%r15,%rax,2), %eax
-. 999 0x12345678 6
-. 41 0F B7 04 47 C3
-
-movzwl (%rcx,%rax,2), %eax
-. 1000 0x12345678 5
-. 0F B7 04 41 C3
-
-movzwl (%rcx,%rax,2), %r10d
-. 1001 0x12345678 6
-. 44 0F B7 14 41 C3
-
-movzwl %si, %eax
-. 1002 0x12345678 4
-. 0F B7 C6 C3
-
-movzwq 10(%r15,%r8,2), %rax
-. 1003 0x12345678 7
-. 4B 0F B7 44 47 0A C3
-
-movzwq 10(%r15,%rax,2), %rax
-. 1004 0x12345678 7
-. 49 0F B7 44 47 0A C3
-
-movzwq 10(%r15,%rcx,2), %rax
-. 1005 0x12345678 7
-. 49 0F B7 44 4F 0A C3
-
-movzwq 12(%r15,%r8,2), %rax
-. 1006 0x12345678 7
-. 4B 0F B7 44 47 0C C3
-
-movzwq 12(%r15,%rax,2), %rax
-. 1007 0x12345678 7
-. 49 0F B7 44 47 0C C3
-
-movzwq 12(%r15,%rcx,2), %rax
-. 1008 0x12345678 7
-. 49 0F B7 44 4F 0C C3
-
-movzwq 14(%r15,%r8,2), %rax
-. 1009 0x12345678 7
-. 4B 0F B7 44 47 0E C3
-
-movzwq 14(%r15,%rax,2), %rax
-. 1010 0x12345678 7
-. 49 0F B7 44 47 0E C3
-
-movzwq 14(%r15,%rcx,2), %rax
-. 1011 0x12345678 7
-. 49 0F B7 44 4F 0E C3
-
-movzwq 16(%r15,%r8,2), %rax
-. 1012 0x12345678 7
-. 4B 0F B7 44 47 10 C3
-
-movzwq 16(%r15,%rax,2), %rax
-. 1013 0x12345678 7
-. 49 0F B7 44 47 10 C3
-
-movzwq 16(%r15,%rcx,2), %rax
-. 1014 0x12345678 7
-. 49 0F B7 44 4F 10 C3
-
-movzwq 18(%r15,%r8,2), %rax
-. 1015 0x12345678 7
-. 4B 0F B7 44 47 12 C3
-
-movzwq 18(%r15,%rax,2), %rax
-. 1016 0x12345678 7
-. 49 0F B7 44 47 12 C3
-
-movzwq 18(%r15,%rcx,2), %rax
-. 1017 0x12345678 7
-. 49 0F B7 44 4F 12 C3
-
-movzwq 20(%r15,%r8,2), %rax
-. 1018 0x12345678 7
-. 4B 0F B7 44 47 14 C3
-
-movzwq 20(%r15,%rax,2), %rax
-. 1019 0x12345678 7
-. 49 0F B7 44 47 14 C3
-
-movzwq 20(%r15,%rcx,2), %rax
-. 1020 0x12345678 7
-. 49 0F B7 44 4F 14 C3
-
-movzwq 22(%r15,%r8,2), %rax
-. 1021 0x12345678 7
-. 4B 0F B7 44 47 16 C3
-
-movzwq 22(%r15,%rax,2), %rax
-. 1022 0x12345678 7
-. 49 0F B7 44 47 16 C3
-
-movzwq 22(%r15,%rcx,2), %rax
-. 1023 0x12345678 7
-. 49 0F B7 44 4F 16 C3
-
-movzwq 24(%r15,%r8,2), %rax
-. 1024 0x12345678 7
-. 4B 0F B7 44 47 18 C3
-
-movzwq 24(%r15,%rax,2), %rax
-. 1025 0x12345678 7
-. 49 0F B7 44 47 18 C3
-
-movzwq 24(%r15,%rcx,2), %rax
-. 1026 0x12345678 7
-. 49 0F B7 44 4F 18 C3
-
-movzwq 26(%r15,%r8,2), %rax
-. 1027 0x12345678 7
-. 4B 0F B7 44 47 1A C3
-
-movzwq 26(%r15,%rax,2), %rax
-. 1028 0x12345678 7
-. 49 0F B7 44 47 1A C3
-
-movzwq 26(%r15,%rcx,2), %rax
-. 1029 0x12345678 7
-. 49 0F B7 44 4F 1A C3
-
-movzwq 28(%r15,%r8,2), %rax
-. 1030 0x12345678 7
-. 4B 0F B7 44 47 1C C3
-
-movzwq 28(%r15,%rax,2), %rax
-. 1031 0x12345678 7
-. 49 0F B7 44 47 1C C3
-
-movzwq 28(%r15,%rcx,2), %rax
-. 1032 0x12345678 7
-. 49 0F B7 44 4F 1C C3
-
-movzwq 2(%r15,%r8,2), %rax
-. 1033 0x12345678 7
-. 4B 0F B7 44 47 02 C3
-
-movzwq 2(%r15,%rax,2), %rax
-. 1034 0x12345678 7
-. 49 0F B7 44 47 02 C3
-
-movzwq 2(%r15,%rcx,2), %rax
-. 1035 0x12345678 7
-. 49 0F B7 44 4F 02 C3
-
-movzwq 30(%r15,%r8,2), %rax
-. 1036 0x12345678 7
-. 4B 0F B7 44 47 1E C3
-
-movzwq 30(%r15,%rax,2), %rax
-. 1037 0x12345678 7
-. 49 0F B7 44 47 1E C3
-
-movzwq 30(%r15,%rcx,2), %rax
-. 1038 0x12345678 7
-. 49 0F B7 44 4F 1E C3
-
-movzwq 32(%r15,%r8,2), %rax
-. 1039 0x12345678 7
-. 4B 0F B7 44 47 20 C3
-
-movzwq 32(%r15,%rax,2), %rax
-. 1040 0x12345678 7
-. 49 0F B7 44 47 20 C3
-
-movzwq 32(%r15,%rcx,2), %rax
-. 1041 0x12345678 7
-. 49 0F B7 44 4F 20 C3
-
-movzwq 34(%r15,%r8,2), %rax
-. 1042 0x12345678 7
-. 4B 0F B7 44 47 22 C3
-
-movzwq 34(%r15,%rax,2), %rax
-. 1043 0x12345678 7
-. 49 0F B7 44 47 22 C3
-
-movzwq 34(%r15,%rcx,2), %rax
-. 1044 0x12345678 7
-. 49 0F B7 44 4F 22 C3
-
-movzwq 36(%r15,%r8,2), %rax
-. 1045 0x12345678 7
-. 4B 0F B7 44 47 24 C3
-
-movzwq 36(%r15,%rax,2), %rax
-. 1046 0x12345678 7
-. 49 0F B7 44 47 24 C3
-
-movzwq 36(%r15,%rcx,2), %rax
-. 1047 0x12345678 7
-. 49 0F B7 44 4F 24 C3
-
-movzwq 38(%r15,%r8,2), %rax
-. 1048 0x12345678 7
-. 4B 0F B7 44 47 26 C3
-
-movzwq 38(%r15,%rax,2), %rax
-. 1049 0x12345678 7
-. 49 0F B7 44 47 26 C3
-
-movzwq 38(%r15,%rcx,2), %rax
-. 1050 0x12345678 7
-. 49 0F B7 44 4F 26 C3
-
-movzwq 40(%r15,%r8,2), %rax
-. 1051 0x12345678 7
-. 4B 0F B7 44 47 28 C3
-
-movzwq 40(%r15,%rax,2), %rax
-. 1052 0x12345678 7
-. 49 0F B7 44 47 28 C3
-
-movzwq 40(%r15,%rcx,2), %rax
-. 1053 0x12345678 7
-. 49 0F B7 44 4F 28 C3
-
-movzwq 42(%r15,%r8,2), %rax
-. 1054 0x12345678 7
-. 4B 0F B7 44 47 2A C3
-
-movzwq 42(%r15,%rax,2), %rax
-. 1055 0x12345678 7
-. 49 0F B7 44 47 2A C3
-
-movzwq 42(%r15,%rcx,2), %rax
-. 1056 0x12345678 7
-. 49 0F B7 44 4F 2A C3
-
-movzwq 44(%r15,%r8,2), %rax
-. 1057 0x12345678 7
-. 4B 0F B7 44 47 2C C3
-
-movzwq 44(%r15,%rax,2), %rax
-. 1058 0x12345678 7
-. 49 0F B7 44 47 2C C3
-
-movzwq 44(%r15,%rcx,2), %rax
-. 1059 0x12345678 7
-. 49 0F B7 44 4F 2C C3
-
-movzwq 46(%r15,%r8,2), %rax
-. 1060 0x12345678 7
-. 4B 0F B7 44 47 2E C3
-
-movzwq 46(%r15,%rax,2), %rax
-. 1061 0x12345678 7
-. 49 0F B7 44 47 2E C3
-
-movzwq 46(%r15,%rcx,2), %rax
-. 1062 0x12345678 7
-. 49 0F B7 44 4F 2E C3
-
-movzwq 48(%r15,%r8,2), %rax
-. 1063 0x12345678 7
-. 4B 0F B7 44 47 30 C3
-
-movzwq 48(%r15,%rax,2), %rax
-. 1064 0x12345678 7
-. 49 0F B7 44 47 30 C3
-
-movzwq 48(%r15,%rcx,2), %rax
-. 1065 0x12345678 7
-. 49 0F B7 44 4F 30 C3
-
-movzwq 4(%r15,%r8,2), %rax
-. 1066 0x12345678 7
-. 4B 0F B7 44 47 04 C3
-
-movzwq 4(%r15,%rax,2), %rax
-. 1067 0x12345678 7
-. 49 0F B7 44 47 04 C3
-
-movzwq 4(%r15,%rcx,2), %rax
-. 1068 0x12345678 7
-. 49 0F B7 44 4F 04 C3
-
-movzwq 50(%r15,%r8,2), %rax
-. 1069 0x12345678 7
-. 4B 0F B7 44 47 32 C3
-
-movzwq 50(%r15,%rax,2), %rax
-. 1070 0x12345678 7
-. 49 0F B7 44 47 32 C3
-
-movzwq 50(%r15,%rcx,2), %rax
-. 1071 0x12345678 7
-. 49 0F B7 44 4F 32 C3
-
-movzwq 52(%r15,%r8,2), %rax
-. 1072 0x12345678 7
-. 4B 0F B7 44 47 34 C3
-
-movzwq 52(%r15,%rax,2), %rax
-. 1073 0x12345678 7
-. 49 0F B7 44 47 34 C3
-
-movzwq 52(%r15,%rcx,2), %rax
-. 1074 0x12345678 7
-. 49 0F B7 44 4F 34 C3
-
-movzwq 54(%r15,%r8,2), %rax
-. 1075 0x12345678 7
-. 4B 0F B7 44 47 36 C3
-
-movzwq 54(%r15,%rax,2), %rax
-. 1076 0x12345678 7
-. 49 0F B7 44 47 36 C3
-
-movzwq 54(%r15,%rcx,2), %rax
-. 1077 0x12345678 7
-. 49 0F B7 44 4F 36 C3
-
-movzwq 56(%r15,%r8,2), %rax
-. 1078 0x12345678 7
-. 4B 0F B7 44 47 38 C3
-
-movzwq 56(%r15,%rax,2), %rax
-. 1079 0x12345678 7
-. 49 0F B7 44 47 38 C3
-
-movzwq 56(%r15,%rcx,2), %rax
-. 1080 0x12345678 7
-. 49 0F B7 44 4F 38 C3
-
-movzwq 58(%r15,%r8,2), %rax
-. 1081 0x12345678 7
-. 4B 0F B7 44 47 3A C3
-
-movzwq 58(%r15,%rax,2), %rax
-. 1082 0x12345678 7
-. 49 0F B7 44 47 3A C3
-
-movzwq 58(%r15,%rcx,2), %rax
-. 1083 0x12345678 7
-. 49 0F B7 44 4F 3A C3
-
-movzwq 60(%r15,%r8,2), %rax
-. 1084 0x12345678 7
-. 4B 0F B7 44 47 3C C3
-
-movzwq 60(%r15,%rax,2), %rax
-. 1085 0x12345678 7
-. 49 0F B7 44 47 3C C3
-
-movzwq 60(%r15,%rcx,2), %rax
-. 1086 0x12345678 7
-. 49 0F B7 44 4F 3C C3
-
-movzwq 62(%r15,%r8,2), %rax
-. 1087 0x12345678 7
-. 4B 0F B7 44 47 3E C3
-
-movzwq 62(%r15,%rax,2), %rax
-. 1088 0x12345678 7
-. 49 0F B7 44 47 3E C3
-
-movzwq 62(%r15,%rcx,2), %rax
-. 1089 0x12345678 7
-. 49 0F B7 44 4F 3E C3
-
-movzwq 64(%r15,%r8,2), %rax
-. 1090 0x12345678 7
-. 4B 0F B7 44 47 40 C3
-
-movzwq 64(%r15,%rax,2), %rax
-. 1091 0x12345678 7
-. 49 0F B7 44 47 40 C3
-
-movzwq 64(%r15,%rcx,2), %rax
-. 1092 0x12345678 7
-. 49 0F B7 44 4F 40 C3
-
-movzwq 66(%r15,%r8,2), %rax
-. 1093 0x12345678 7
-. 4B 0F B7 44 47 42 C3
-
-movzwq 66(%r15,%rax,2), %rax
-. 1094 0x12345678 7
-. 49 0F B7 44 47 42 C3
-
-movzwq 66(%r15,%rcx,2), %rax
-. 1095 0x12345678 7
-. 49 0F B7 44 4F 42 C3
-
-movzwq 68(%r15,%r8,2), %rax
-. 1096 0x12345678 7
-. 4B 0F B7 44 47 44 C3
-
-movzwq 68(%r15,%rax,2), %rax
-. 1097 0x12345678 7
-. 49 0F B7 44 47 44 C3
-
-movzwq 68(%r15,%rcx,2), %rax
-. 1098 0x12345678 7
-. 49 0F B7 44 4F 44 C3
-
-movzwq 6(%r15,%r8,2), %rax
-. 1099 0x12345678 7
-. 4B 0F B7 44 47 06 C3
-
-movzwq 6(%r15,%rax,2), %rax
-. 1100 0x12345678 7
-. 49 0F B7 44 47 06 C3
-
-movzwq 6(%r15,%rcx,2), %rax
-. 1101 0x12345678 7
-. 49 0F B7 44 4F 06 C3
-
-movzwq 70(%r15,%r8,2), %rax
-. 1102 0x12345678 7
-. 4B 0F B7 44 47 46 C3
-
-movzwq 70(%r15,%rax,2), %rax
-. 1103 0x12345678 7
-. 49 0F B7 44 47 46 C3
-
-movzwq 70(%r15,%rcx,2), %rax
-. 1104 0x12345678 7
-. 49 0F B7 44 4F 46 C3
-
-movzwq 72(%r15,%r8,2), %rax
-. 1105 0x12345678 7
-. 4B 0F B7 44 47 48 C3
-
-movzwq 72(%r15,%rax,2), %rax
-. 1106 0x12345678 7
-. 49 0F B7 44 47 48 C3
-
-movzwq 72(%r15,%rcx,2), %rax
-. 1107 0x12345678 7
-. 49 0F B7 44 4F 48 C3
-
-movzwq 74(%r15,%r8,2), %rax
-. 1108 0x12345678 7
-. 4B 0F B7 44 47 4A C3
-
-movzwq 74(%r15,%rax,2), %rax
-. 1109 0x12345678 7
-. 49 0F B7 44 47 4A C3
-
-movzwq 74(%r15,%rcx,2), %rax
-. 1110 0x12345678 7
-. 49 0F B7 44 4F 4A C3
-
-movzwq 76(%r15,%r8,2), %rax
-. 1111 0x12345678 7
-. 4B 0F B7 44 47 4C C3
-
-movzwq 76(%r15,%rax,2), %rax
-. 1112 0x12345678 7
-. 49 0F B7 44 47 4C C3
-
-movzwq 76(%r15,%rcx,2), %rax
-. 1113 0x12345678 7
-. 49 0F B7 44 4F 4C C3
-
-movzwq 78(%r15,%r8,2), %rax
-. 1114 0x12345678 7
-. 4B 0F B7 44 47 4E C3
-
-movzwq 78(%r15,%rax,2), %rax
-. 1115 0x12345678 7
-. 49 0F B7 44 47 4E C3
-
-movzwq 78(%r15,%rcx,2), %rax
-. 1116 0x12345678 7
-. 49 0F B7 44 4F 4E C3
-
-movzwq 80(%r15,%r8,2), %rax
-. 1117 0x12345678 7
-. 4B 0F B7 44 47 50 C3
-
-movzwq 80(%r15,%rax,2), %rax
-. 1118 0x12345678 7
-. 49 0F B7 44 47 50 C3
-
-movzwq 80(%r15,%rcx,2), %rax
-. 1119 0x12345678 7
-. 49 0F B7 44 4F 50 C3
-
-movzwq 82(%r15,%r8,2), %rax
-. 1120 0x12345678 7
-. 4B 0F B7 44 47 52 C3
-
-movzwq 82(%r15,%rax,2), %rax
-. 1121 0x12345678 7
-. 49 0F B7 44 47 52 C3
-
-movzwq 82(%r15,%rcx,2), %rax
-. 1122 0x12345678 7
-. 49 0F B7 44 4F 52 C3
-
-movzwq 84(%r15,%r8,2), %rax
-. 1123 0x12345678 7
-. 4B 0F B7 44 47 54 C3
-
-movzwq 84(%r15,%rax,2), %rax
-. 1124 0x12345678 7
-. 49 0F B7 44 47 54 C3
-
-movzwq 84(%r15,%rcx,2), %rax
-. 1125 0x12345678 7
-. 49 0F B7 44 4F 54 C3
-
-movzwq 86(%r15,%rax,2), %rax
-. 1126 0x12345678 7
-. 49 0F B7 44 47 56 C3
-
-movzwq 86(%r15,%rcx,2), %rax
-. 1127 0x12345678 7
-. 49 0F B7 44 4F 56 C3
-
-movzwq 88(%r15,%r8,2), %rax
-. 1128 0x12345678 7
-. 4B 0F B7 44 47 58 C3
-
-movzwq 88(%r15,%rax,2), %rax
-. 1129 0x12345678 7
-. 49 0F B7 44 47 58 C3
-
-movzwq 88(%r15,%rcx,2), %rax
-. 1130 0x12345678 7
-. 49 0F B7 44 4F 58 C3
-
-movzwq 8(%r15,%r8,2), %rax
-. 1131 0x12345678 7
-. 4B 0F B7 44 47 08 C3
-
-movzwq 8(%r15,%rax,2), %rax
-. 1132 0x12345678 7
-. 49 0F B7 44 47 08 C3
-
-movzwq 8(%r15,%rcx,2), %rax
-. 1133 0x12345678 7
-. 49 0F B7 44 4F 08 C3
-
-movzwq 90(%r15,%r8,2), %rax
-. 1134 0x12345678 7
-. 4B 0F B7 44 47 5A C3
-
-movzwq 90(%r15,%rax,2), %rax
-. 1135 0x12345678 7
-. 49 0F B7 44 47 5A C3
-
-movzwq 90(%r15,%rcx,2), %rax
-. 1136 0x12345678 7
-. 49 0F B7 44 4F 5A C3
-
-movzwq 92(%r15,%r8,2), %rax
-. 1137 0x12345678 7
-. 4B 0F B7 44 47 5C C3
-
-movzwq 92(%r15,%rax,2), %rax
-. 1138 0x12345678 7
-. 49 0F B7 44 47 5C C3
-
-movzwq 92(%r15,%rcx,2), %rax
-. 1139 0x12345678 7
-. 49 0F B7 44 4F 5C C3
-
-movzwq 94(%r15,%r8,2), %rax
-. 1140 0x12345678 7
-. 4B 0F B7 44 47 5E C3
-
-movzwq 94(%r15,%rax,2), %rax
-. 1141 0x12345678 7
-. 49 0F B7 44 47 5E C3
-
-movzwq 94(%r15,%rcx,2), %rax
-. 1142 0x12345678 7
-. 49 0F B7 44 4F 5E C3
-
-movzwq 96(%r15,%r8,2), %rax
-. 1143 0x12345678 7
-. 4B 0F B7 44 47 60 C3
-
-movzwq 96(%r15,%rax,2), %rax
-. 1144 0x12345678 7
-. 49 0F B7 44 47 60 C3
-
-movzwq 96(%r15,%rcx,2), %rax
-. 1145 0x12345678 7
-. 49 0F B7 44 4F 60 C3
-
-movzwq 98(%r15,%r8,2), %rax
-. 1146 0x12345678 7
-. 4B 0F B7 44 47 62 C3
-
-movzwq 98(%r15,%rax,2), %rax
-. 1147 0x12345678 7
-. 49 0F B7 44 47 62 C3
-
-movzwq 98(%r15,%rcx,2), %rax
-. 1148 0x12345678 7
-. 49 0F B7 44 4F 62 C3
-
-movzwq (%r15,%r8,2), %rdx
-. 1149 0x12345678 6
-. 4B 0F B7 14 47 C3
-
-movzwq (%r15,%rax,2), %rax
-. 1150 0x12345678 6
-. 49 0F B7 04 47 C3
-
-movzwq (%r15,%rax,2), %rcx
-. 1151 0x12345678 6
-. 49 0F B7 0C 47 C3
-
-movzwq (%r15,%rcx,2), %rax
-. 1152 0x12345678 6
-. 49 0F B7 04 4F C3
-
-negl %ecx
-. 1153 0x12345678 3
-. F7 D9 C3
-
-notl %edx
-. 1154 0x12345678 3
-. F7 D2 C3
-
-orl $2097152, (%rbp,%rax,4)
-. 1155 0x12345678 9
-. 81 4C 85 00 00 00 20 00 C3
-
-orl %eax, 640(%rsi)
-. 1156 0x12345678 7
-. 09 86 80 02 00 00 C3
-
-orl %eax, %esi
-. 1157 0x12345678 3
-. 09 C6 C3
-
-orl %eax, %r12d
-. 1158 0x12345678 4
-. 41 09 C4 C3
-
-orl %ebp, 640(%rsi)
-. 1159 0x12345678 7
-. 09 AE 80 02 00 00 C3
-
-orl %ebp, (%rbx,%rax,4)
-. 1160 0x12345678 4
-. 09 2C 83 C3
-
-orl %edi, 640(%rsi)
-. 1161 0x12345678 7
-. 09 BE 80 02 00 00 C3
-
-orl %edx, 640(%rsi)
-. 1162 0x12345678 7
-. 09 96 80 02 00 00 C3
-
-orl %edx, %eax
-. 1163 0x12345678 3
-. 09 D0 C3
-
-orl %esi, 640(%r11)
-. 1164 0x12345678 8
-. 41 09 B3 80 02 00 00 C3
-
-orl %esi, 640(%rdi)
-. 1165 0x12345678 7
-. 09 B7 80 02 00 00 C3
-
-orl %r10d, 640(%rsi)
-. 1166 0x12345678 8
-. 44 09 96 80 02 00 00 C3
-
-orl %r8d, 640(%rsi)
-. 1167 0x12345678 8
-. 44 09 86 80 02 00 00 C3
-
-orl %r8d, (%rbx,%rax,4)
-. 1168 0x12345678 5
-. 44 09 04 83 C3
-
-orl %r9d, 640(%rsi)
-. 1169 0x12345678 8
-. 44 09 8E 80 02 00 00 C3
-
-popq %r12
-. 1170 0x12345678 3
-. 41 5C C3
-
-popq %r13
-. 1171 0x12345678 3
-. 41 5D C3
-
-popq %r14
-. 1172 0x12345678 3
-. 41 5E C3
-
-popq %r15
-. 1173 0x12345678 3
-. 41 5F C3
-
-popq %rbp
-. 1174 0x12345678 2
-. 5D C3
-
-popq %rbx
-. 1175 0x12345678 2
-. 5B C3
-
-pushq %r12
-. 1176 0x12345678 3
-. 41 54 C3
-
-pushq %r13
-. 1177 0x12345678 3
-. 41 55 C3
-
-pushq %r14
-. 1178 0x12345678 3
-. 41 56 C3
-
-pushq %r15
-. 1179 0x12345678 3
-. 41 57 C3
-
-pushq %rbp
-. 1180 0x12345678 2
-. 55 C3
-
-pushq %rbx
-. 1181 0x12345678 2
-. 53 C3
-
-rep ; ret
-. 1182 0x12345678 2
-. F3 C3
-
-ret
-. 1183 0x12345678 1
-. C3
-
-roll %eax
-. 1184 0x12345678 3
-. D1 C0 C3
-
-sall $16, %eax
-. 1185 0x12345678 4
-. C1 E0 10 C3
-
-sall 16(%rsp)
-. 1186 0x12345678 5
-. D1 64 24 10 C3
-
-sall $4, %edx
-. 1187 0x12345678 4
-. C1 E2 04 C3
-
-sall $4, %r10d
-. 1188 0x12345678 5
-. 41 C1 E2 04 C3
-
-sall $8, 640(%r11)
-. 1189 0x12345678 9
-. 41 C1 A3 80 02 00 00 08 C3
-
-sall $8, 640(%rdi)
-. 1190 0x12345678 8
-. C1 A7 80 02 00 00 08 C3
-
-sall $8, 640(%rsi)
-. 1191 0x12345678 8
-. C1 A6 80 02 00 00 08 C3
-
-sall $8, %eax
-. 1192 0x12345678 4
-. C1 E0 08 C3
-
-sall $8, %esi
-. 1193 0x12345678 4
-. C1 E6 08 C3
-
-sall $8, %r12d
-. 1194 0x12345678 5
-. 41 C1 E4 08 C3
-
-sall %cl, %eax
-. 1195 0x12345678 3
-. D3 E0 C3
-
-sall %cl, %ebp
-. 1196 0x12345678 3
-. D3 E5 C3
-
-sall %cl, %edi
-. 1197 0x12345678 3
-. D3 E7 C3
-
-sall %cl, %edx
-. 1198 0x12345678 3
-. D3 E2 C3
-
-sall %cl, %esi
-. 1199 0x12345678 3
-. D3 E6 C3
-
-sall %cl, %r10d
-. 1200 0x12345678 4
-. 41 D3 E2 C3
-
-sall %cl, %r8d
-. 1201 0x12345678 4
-. 41 D3 E0 C3
-
-sall %cl, %r9d
-. 1202 0x12345678 4
-. 41 D3 E1 C3
-
-salq $10, %rax
-. 1203 0x12345678 5
-. 48 C1 E0 0A C3
-
-salq $10, %rdx
-. 1204 0x12345678 5
-. 48 C1 E2 0A C3
-
-salq $4, %rax
-. 1205 0x12345678 5
-. 48 C1 E0 04 C3
-
-salq $4, %rdx
-. 1206 0x12345678 5
-. 48 C1 E2 04 C3
-
-salq $4, %rsi
-. 1207 0x12345678 5
-. 48 C1 E6 04 C3
-
-salq $7, %rax
-. 1208 0x12345678 5
-. 48 C1 E0 07 C3
-
-salq $7, %rdi
-. 1209 0x12345678 5
-. 48 C1 E7 07 C3
-
-salq $7, %rdx
-. 1210 0x12345678 5
-. 48 C1 E2 07 C3
-
-sarl $31, %ecx
-. 1211 0x12345678 4
-. C1 F9 1F C3
-
-sarl $3, %ecx
-. 1212 0x12345678 4
-. C1 F9 03 C3
-
-sarl $5, %eax
-. 1213 0x12345678 4
-. C1 F8 05 C3
-
-sarl $5, %edx
-. 1214 0x12345678 4
-. C1 FA 05 C3
-
-sarl $8, %ecx
-. 1215 0x12345678 4
-. C1 F9 08 C3
-
-sarl $8, %edx
-. 1216 0x12345678 4
-. C1 FA 08 C3
-
-sarl %cl, %eax
-. 1217 0x12345678 3
-. D3 F8 C3
-
-sarl %cl, %esi
-. 1218 0x12345678 3
-. D3 FE C3
-
-sarl %eax
-. 1219 0x12345678 3
-. D1 F8 C3
-
-sarl %edi
-. 1220 0x12345678 3
-. D1 FF C3
-
-seta %al
-. 1221 0x12345678 4
-. 0F 97 C0 C3
-
-sete %al
-. 1222 0x12345678 4
-. 0F 94 C0 C3
-
-setg %al
-. 1223 0x12345678 4
-. 0F 9F C0 C3
-
-setg %dl
-. 1224 0x12345678 4
-. 0F 9F C2 C3
-
-setge %dl
-. 1225 0x12345678 4
-. 0F 9D C2 C3
-
-setle %al
-. 1226 0x12345678 4
-. 0F 9E C0 C3
-
-setle %dl
-. 1227 0x12345678 4
-. 0F 9E C2 C3
-
-setne %al
-. 1228 0x12345678 4
-. 0F 95 C0 C3
-
-shrl $16, %ecx
-. 1229 0x12345678 4
-. C1 E9 10 C3
-
-shrl $16, %edi
-. 1230 0x12345678 4
-. C1 EF 10 C3
-
-shrl $16, %esi
-. 1231 0x12345678 4
-. C1 EE 10 C3
-
-shrl $16, %r8d
-. 1232 0x12345678 5
-. 41 C1 E8 10 C3
-
-shrl $24, %r8d
-. 1233 0x12345678 5
-. 41 C1 E8 18 C3
-
-shrl $31, %eax
-. 1234 0x12345678 4
-. C1 E8 1F C3
-
-shrl $31, %edx
-. 1235 0x12345678 4
-. C1 EA 1F C3
-
-shrl %eax
-. 1236 0x12345678 3
-. D1 E8 C3
-
-shrq $32, %rax
-. 1237 0x12345678 5
-. 48 C1 E8 20 C3
-
-shrq $32, %rcx
-. 1238 0x12345678 5
-. 48 C1 E9 20 C3
-
-shrw $8, %dx
-. 1239 0x12345678 5
-. 66 C1 EA 08 C3
-
-subl 16(%rsp), %edx
-. 1240 0x12345678 5
-. 2B 54 24 10 C3
-
-subl 16(%rsp), %esi
-. 1241 0x12345678 5
-. 2B 74 24 10 C3
-
-subl 20(%rsp), %eax
-. 1242 0x12345678 5
-. 2B 44 24 14 C3
-
-subl 20(%rsp), %edx
-. 1243 0x12345678 5
-. 2B 54 24 14 C3
-
-subl 24(%rsp), %r8d
-. 1244 0x12345678 6
-. 44 2B 44 24 18 C3
-
-subl 28(%rsp), %eax
-. 1245 0x12345678 5
-. 2B 44 24 1C C3
-
-subl $4, %ebx
-. 1246 0x12345678 4
-. 83 EB 04 C3
-
-subl $5, %ecx
-. 1247 0x12345678 4
-. 83 E9 05 C3
-
-subl 672(%rbp,%rax,4), %r13d
-. 1248 0x12345678 9
-. 44 2B AC 85 A0 02 00 00 C3
-
-subl $8, 644(%r11)
-. 1249 0x12345678 9
-. 41 83 AB 84 02 00 00 08 C3
-
-subl $8, 644(%rdi)
-. 1250 0x12345678 8
-. 83 AF 84 02 00 00 08 C3
-
-subl $8, 644(%rsi)
-. 1251 0x12345678 8
-. 83 AE 84 02 00 00 08 C3
-
-subl $8, %r11d
-. 1252 0x12345678 5
-. 41 83 EB 08 C3
-
-subl %eax, %ecx
-. 1253 0x12345678 3
-. 29 C1 C3
-
-subl %eax, %edx
-. 1254 0x12345678 3
-. 29 C2 C3
-
-subl %eax, %esi
-. 1255 0x12345678 3
-. 29 C6 C3
-
-subl %ebp, %eax
-. 1256 0x12345678 3
-. 29 E8 C3
-
-subl %ebx, %edx
-. 1257 0x12345678 3
-. 29 DA C3
-
-subl %ecx, %eax
-. 1258 0x12345678 3
-. 29 C8 C3
-
-subl %ecx, %r11d
-. 1259 0x12345678 4
-. 41 29 CB C3
-
-subl %ecx, %r9d
-. 1260 0x12345678 4
-. 41 29 C9 C3
-
-subl %edi, %eax
-. 1261 0x12345678 3
-. 29 F8 C3
-
-subl %edi, %ecx
-. 1262 0x12345678 3
-. 29 F9 C3
-
-subl %edi, %edx
-. 1263 0x12345678 3
-. 29 FA C3
-
-subl %edi, %esi
-. 1264 0x12345678 3
-. 29 FE C3
-
-subl %edi, %r8d
-. 1265 0x12345678 4
-. 41 29 F8 C3
-
-subl %edx, %ebx
-. 1266 0x12345678 3
-. 29 D3 C3
-
-subl %esi, %eax
-. 1267 0x12345678 3
-. 29 F0 C3
-
-subl %esi, %edx
-. 1268 0x12345678 3
-. 29 F2 C3
-
-subl %esi, %r9d
-. 1269 0x12345678 4
-. 41 29 F1 C3
-
-subl %r10d, %eax
-. 1270 0x12345678 4
-. 44 29 D0 C3
-
-subl %r10d, %ecx
-. 1271 0x12345678 4
-. 44 29 D1 C3
-
-subl %r11d, %ecx
-. 1272 0x12345678 4
-. 44 29 D9 C3
-
-subl %r11d, %edi
-. 1273 0x12345678 4
-. 44 29 DF C3
-
-subl %r12d, %eax
-. 1274 0x12345678 4
-. 44 29 E0 C3
-
-subl %r12d, %ecx
-. 1275 0x12345678 4
-. 44 29 E1 C3
-
-subl %r12d, %edx
-. 1276 0x12345678 4
-. 44 29 E2 C3
-
-subl %r13d, 12(%rsp)
-. 1277 0x12345678 6
-. 44 29 6C 24 0C C3
-
-subl %r13d, %eax
-. 1278 0x12345678 4
-. 44 29 E8 C3
-
-subl %r13d, %edx
-. 1279 0x12345678 4
-. 44 29 EA C3
-
-subl %r14d, %edi
-. 1280 0x12345678 4
-. 44 29 F7 C3
-
-subl %r15d, %eax
-. 1281 0x12345678 4
-. 44 29 F8 C3
-
-subl %r15d, %edx
-. 1282 0x12345678 4
-. 44 29 FA C3
-
-subl %r15d, %r9d
-. 1283 0x12345678 4
-. 45 29 F9 C3
-
-subl %r8d, %eax
-. 1284 0x12345678 4
-. 44 29 C0 C3
-
-subl %r8d, %ecx
-. 1285 0x12345678 4
-. 44 29 C1 C3
-
-subl %r8d, %edx
-. 1286 0x12345678 4
-. 44 29 C2 C3
-
-subl %r9d, %ecx
-. 1287 0x12345678 4
-. 44 29 C9 C3
-
-subl (%rbp,%rax), %edi
-. 1288 0x12345678 5
-. 2B 7C 05 00 C3
-
-subl (%rbp,%rdx), %eax
-. 1289 0x12345678 5
-. 2B 44 15 00 C3
-
-subq $104, %rsp
-. 1290 0x12345678 5
-. 48 83 EC 68 C3
-
-subq $1304, %rsp
-. 1291 0x12345678 8
-. 48 81 EC 18 05 00 00 C3
-
-subq $2104, %rsp
-. 1292 0x12345678 8
-. 48 81 EC 38 08 00 00 C3
-
-subq $264, %rsp
-. 1293 0x12345678 8
-. 48 81 EC 08 01 00 00 C3
-
-subq $3400, %rsp
-. 1294 0x12345678 8
-. 48 81 EC 48 0D 00 00 C3
-
-subq $56, %rsp
-. 1295 0x12345678 5
-. 48 83 EC 38 C3
-
-subq $72, %rsp
-. 1296 0x12345678 5
-. 48 83 EC 48 C3
-
-subq $824, %rsp
-. 1297 0x12345678 8
-. 48 81 EC 38 03 00 00 C3
-
-subq $8, %rsp
-. 1298 0x12345678 5
-. 48 83 EC 08 C3
-
-testb $1, %al
-. 1299 0x12345678 3
-. A8 01 C3
-
-testb $1, %dil
-. 1300 0x12345678 5
-. 40 F6 C7 01 C3
-
-testb $1, %dl
-. 1301 0x12345678 4
-. F6 C2 01 C3
-
-testb %al, %al
-. 1302 0x12345678 3
-. 84 C0 C3
-
-testb %bpl, %bpl
-. 1303 0x12345678 4
-. 40 84 ED C3
-
-testl $2097152, %eax
-. 1304 0x12345678 6
-. A9 00 00 20 00 C3
-
-testl %ebp, %ebp
-. 1305 0x12345678 3
-. 85 ED C3
-
-testl %ebp, (%rbx,%rax,4)
-. 1306 0x12345678 4
-. 85 2C 83 C3
-
-testl %ebx, %ebx
-. 1307 0x12345678 3
-. 85 DB C3
-
-testl %ecx, %ecx
-. 1308 0x12345678 3
-. 85 C9 C3
-
-testl %edi, %edi
-. 1309 0x12345678 3
-. 85 FF C3
-
-testl %edi, (%rbx,%rax,4)
-. 1310 0x12345678 4
-. 85 3C 83 C3
-
-testl %edx, (%rbx,%rax,4)
-. 1311 0x12345678 4
-. 85 14 83 C3
-
-testl %esi, %esi
-. 1312 0x12345678 3
-. 85 F6 C3
-
-testl %esi, (%rbx,%rax,4)
-. 1313 0x12345678 4
-. 85 34 83 C3
-
-testl %r11d, %r11d
-. 1314 0x12345678 4
-. 45 85 DB C3
-
-testl %r13d, %r13d
-. 1315 0x12345678 4
-. 45 85 ED C3
-
-testl %r14d, %r14d
-. 1316 0x12345678 4
-. 45 85 F6 C3
-
-testl %r8d, %r8d
-. 1317 0x12345678 4
-. 45 85 C0 C3
-
-testl %r8d, (%rbx,%rax,4)
-. 1318 0x12345678 5
-. 44 85 04 83 C3
-
-xorl %edx, %eax
-. 1319 0x12345678 3
-. 31 D0 C3
-
-nop
-. 1320 0x12345678 2
-. 90 C3
-
10
dir
-2062
+2064
svn://svn.valgrind.org/vex/trunk/orig_arm
svn://svn.valgrind.org/vex
-2010-10-07T07:09:11.812485Z
+2010-10-08T04:47:04.523064Z
ee6d2ed60064b69fa8adec0855d2cb74
2005-02-09T13:03:06.989608Z
875
+++ /dev/null
- 0: e1a0c00d mov ip, sp
-. 0 00008000 4
-. 0d c0 a0 e1
-
- 4: e92dd810 stmdb sp!, {r4, fp, ip, lr, pc}
-. 1 00008004 4
-. 10 d8 2d e9
-
- 8: e24cb004 sub fp, ip, #4 ; 0x4
-. 2 00008008 4
-. 04 b0 4c e2
-
- c: e3a00014 mov r0, #20 ; 0x14
-. 3 0000800C 4
-. 14 00 a0 e3
-
- 10: ebfffffe bl 0 <newHHW>
-. 4 00008010 4
-. fe ff ff eb
10
dir
-2062
+2064
svn://svn.valgrind.org/vex/trunk/orig_ppc32
svn://svn.valgrind.org/vex
-2010-10-07T07:09:41.939426Z
+2010-10-08T04:47:04.659042Z
f0f9c89fcb0bd2f3e07b2059e1a0b113
2005-06-20T13:52:30.071196Z
1213
-2010-10-07T07:09:41.943425Z
+2010-10-08T04:47:04.679038Z
e1cafa4b408c6b9dd02f821ad7b5ab8c
2005-06-20T13:52:30.071196Z
1213
-2010-10-07T07:09:41.951424Z
+2010-10-08T04:47:04.731030Z
02a2111c86718ac1ca11e26d88237614
2005-01-12T11:25:02.171676Z
711
-2010-10-07T07:09:41.955423Z
+2010-10-08T04:47:04.755026Z
6462d21b7796bc7d0bdc4b524c9fdcce
2005-02-04T11:58:47.108399Z
834
+++ /dev/null
-==3281== Nulgrind, a binary JIT-compiler for Linux.
-==3281== Copyright (C) 2002-2004, and GNU GPL'd, by Nicholas Nethercote.
-==3281== Using valgrind-2.2.0-ppc, a program supervision framework for Linux.
-==3281== Copyright (C) 2000-2004, and GNU GPL'd, by Julian Seward et al.
-==3281== For more details, rerun with: -v
-==3281==
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-
-. 0 10001678 16
-. 7F 63 DB 78 7F 44 D3 78 7F C5 F3 78 48 00 7B 49
-
-. 0 100091CC 20
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-
-. 0 10008EE4 124
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-
-. 0 1000915C 84
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-
-. 0 100091E0 16
-. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-. 0 10001688 8
-. 2F 9E 00 00 41 9E 00 30
-
-. 0 10001690 44
-. 7F C9 03 A6 38 00 00 00 57 4B 20 36 7D 20 DA 14 7C 1B 04 AE C9 A9 00 08 7D 20 BA 14 7C 17 05 AE 7C 00 5A 14 D9 A9 00 08 42 00 FF E4
-
-. 0 100016BC 52
-. 3E A0 10 02 2A 1A 00 01 CB F5 81 10 3C A0 10 01 3C 60 10 01 38 A5 69 3C FC 20 F8 90 7F 04 C3 78 7F 66 DB 78 38 63 69 4C 7F 47 D3 78 7F C8 F3 78 4B FF F1 2D
-
-. 0 100016F0 24
-. 3C 80 10 01 38 84 6C 58 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3E E5
-
-. 0 10028F6C 4
-. 4B EA 1E 64
-
-. 0 FEEA6E4 20
-. 88 FB 00 00 3B 7B 00 01 98 E3 00 00 38 63 00 01 42 00 FF F0
-
-. 0 10028F44 4
-. 4B E9 9F 90
-
-. 0 FEF89E0 20
-. 81 64 00 00 38 A5 FF FF 81 44 00 04 38 84 00 08 4B FF FF 54
-
-. 0 FEC31A4 104
-. 3B 04 00 01 39 60 00 00 93 1F 04 4C 3A 20 FF FF 8B 04 00 01 3A 00 00 20 39 FF 03 F8 91 7F 04 EC 3A 58 FF E0 91 7F 04 F0 2A 12 00 5A 91 7F 04 F4 91 7F 04 F8 38 00 00 00 91 7F 04 FC 91 7F 05 00 91 7F 05 04 91 7F 05 08 91 7F 05 0C 91 7F 05 10 92 3F 05 14 91 7F 05 18 92 1F 05 1C 91 7F 05 68 91 FF 04 D4 41 91 00 20
-
-. 0 10028F2C 4
-. 4B EB 7D A8
-
-. 0 10028F1C 4
-. 4B EB 2F 00
-
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 1, stride = 1
-. 0 10001708 4
-. 41 91 03 68
-
-. 0 1000170C 16
-. 7F 44 D3 78 7F C5 F3 78 7F 63 DB 78 48 00 7B 01
-
-. 0 10009218 64
-. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 01 00 24 38 C0 00 01 7C 7F 1B 78 93 81 00 10 80 1E FF F0 7C 9C 23 78 93 A1 00 14 7C BD 2B 78 7F C0 F2 14 4B FF FC 91
-
-. 0 10009258 8
-. 2C 03 00 00 40 82 00 64
-
-. 0 10009260 48
-. 81 3E 80 9C 3C 00 43 30 90 01 00 08 7F 83 E8 40 93 A1 00 0C C8 09 00 00 C9 A1 00 08 81 3E 80 A0 FD AD 00 28 C8 09 00 00 FD 80 68 24 40 9C 00 34
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-. 0 10009290 48
-. 7F A9 03 A6 57 84 20 36 38 00 00 00 7C 1F 04 AE 7D 20 FA 14 FC 00 03 32 7C 1F 05 AE 7C 00 22 14 C9 A9 00 08 FD AD 03 32 D9 A9 00 08 42 00 FF E0
-
-. 0 100092C0 32
-. 80 01 00 24 83 81 00 10 83 A1 00 14 7C 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
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-. 0 1000171C 40
-. FC 20 F8 90 3F E0 10 01 3C A0 10 01 38 A5 69 98 7F 24 CB 78 7F 66 DB 78 38 7F 69 90 7F 47 D3 78 7F C8 F3 78 4B FF F0 D9
-
-. 0 10001744 24
-. 3C 80 10 01 38 84 6C A0 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3E 91
-
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 1, stride = 1
-. 0 1000175C 4
-. 41 91 02 E4
-
-. 0 10001760 16
-. 7E E3 BB 78 7F 44 D3 78 7F C5 F3 78 48 00 7A 85
-
-. 0 100091F0 20
-. 7C 08 02 A6 94 21 FF F0 38 C0 00 01 90 01 00 14 4B FF FC E5
-
-. 0 10009204 16
-. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-. 0 10001770 8
-. 2F 9E 00 00 41 9E 00 54
-
-. 0 10001778 80
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-
-. 0 100017C8 40
-. CB F5 81 10 3C A0 10 01 38 A5 69 E4 7F 24 CB 78 FC 20 F8 90 7E E6 BB 78 7F 47 D3 78 7F C8 F3 78 38 7F 69 90 4B FF F0 2D
-
-. 0 100017F0 24
-. 3C 80 10 01 38 84 6C E8 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3D E5
-
-. 0 FEF8088 24
-. 7C A9 03 A6 88 FF 00 00 3B FF 00 01 98 FD 00 00 3B BD 00 01 42 00 FF F0
-
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 1, stride = 1
-. 0 10001808 8
-. 2B 9A 00 01 41 9D 02 04
-
-. 0 10001810 52
-. 3D 20 10 02 3D 60 10 02 39 29 80 F0 39 6B 81 18 C8 49 00 00 7F 66 DB 78 C8 2B 00 00 7F 07 C3 78 7F C4 F3 78 7F 45 D3 78 38 60 00 01 3F 80 10 01 48 00 2F A9
-
-. 0 100047E8 96
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-. 0 10004848 8
-. 2F 9E 00 00 41 9E 00 3C
-
-. 0 10004850 56
-. 7F C9 03 A6 39 60 00 00 39 80 00 00 38 00 00 00 54 AA 20 36 7D 20 32 14 7D 66 01 2E 38 C6 00 04 7D 86 01 2E 38 C6 FF FC 91 69 00 08 91 89 00 0C 7C 00 52 14 42 00 FF E0
-
-. 0 10004888 40
-. 7C 1B F3 96 2F 9E 00 00 7C 00 F1 D6 7C 00 D8 50 7C 00 29 D6 54 00 20 36 7D 20 32 14 7F 86 05 AE DB A9 00 08 41 9E 00 A0
-
-. 0 100048B0 104
-. 3F 00 43 30 3D 20 10 02 39 29 80 F8 93 C1 00 14 93 01 00 10 54 BA 20 36 CB 29 00 00 3D 20 10 02 C8 01 00 10 3B 80 00 00 CB 49 81 38 3B A0 00 00 FF 60 C8 28 7F DF F3 78 7C 1D F3 96 93 01 00 08 7C 00 F1 D6 7C 00 E8 50 7F BD DA 14 90 01 00 0C CB E1 00 08 FF FF C8 28 FF FF 06 B2 FF FF D8 24 FC 20 F8 90 48 02 45 E1
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-. 0 10028EF4 4
-. 4B DE 50 5C
-
-. 0 10004918 12
-. FF C0 08 90 FC 20 F8 90 48 02 46 75
-
-. 0 10028F94 4
-. 4B DE 38 F0
-
-. 0 10004924 40
-. 37 FF FF FF FC 01 07 32 7D 3C CA 14 FC 21 07 72 FC 1E 07 7A FF DE 0F 38 7F DC CD AE 7F 9C D2 14 D8 09 00 08 40 82 FF A0
-
-. 0 1000494C 80
-. 38 60 00 00 80 01 00 74 83 01 00 18 83 21 00 1C 7C 08 03 A6 83 41 00 20 83 61 00 24 83 81 00 28 83 A1 00 2C 83 C1 00 30 83 E1 00 34 CB 21 00 38 CB 41 00 40 CB 61 00 48 CB 81 00 50 CB A1 00 58 CB C1 00 60 CB E1 00 68 38 21 00 70 4E 80 00 20
-
-. 0 10001844 16
-. 7F 44 D3 78 7F C5 F3 78 7F 63 DB 78 48 00 79 7D
-
-. 0 10001854 40
-. FC 20 F8 90 3C A0 10 01 7F 47 D3 78 7F C8 F3 78 38 A5 6A 40 7F 04 C3 78 7F 66 DB 78 38 7C 6A 34 3B A0 00 00 4B FF EF A1
-
-. 0 1000187C 24
-. 3C 80 10 01 38 84 6D 30 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3D 59
-
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 1, stride = 1
-. 0 10001894 44
-. 3D 20 10 02 3D 60 10 02 39 29 80 F0 39 6B 81 18 C8 49 00 00 C8 2B 00 00 7F 06 C3 78 7F 44 D3 78 7F 65 DB 78 7F C3 F3 78 48 00 31 05
-
-. 0 100049C0 20
-. 2C 03 00 00 7C 08 02 A6 94 21 FF F0 90 01 00 14 41 82 00 B0
-
-. 0 100049D4 8
-. 2F 83 00 00 41 9E 00 24
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-. 0 100049DC 32
-. 7C 69 03 A6 38 00 00 00 54 8B 20 36 7D 20 2A 14 7C 25 05 AE D8 49 00 08 7C 00 5A 14 42 00 FF F0
-
-. 0 100049FC 8
-. 2F 83 00 00 41 9E 00 3C
-
-. 0 10004A04 56
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-
-. 0 10004A3C 68
-. 3C 00 43 30 3D 20 10 02 90 61 00 0C 39 29 80 F8 90 01 00 08 38 60 00 00 C8 01 00 08 C9 A9 00 00 80 01 00 14 38 21 00 10 FC 00 68 28 7C 08 03 A6 FD A0 00 B2 FC 00 00 72 D9 A6 00 08 D8 06 00 00 4E 80 00 20
-
-. 0 100018C0 16
-. 7F 44 D3 78 7F C5 F3 78 7F 63 DB 78 48 00 79 01
-
-. 0 100018D0 36
-. FC 20 F8 90 3C A0 10 01 7F 04 C3 78 38 A5 6A 90 7F 66 DB 78 7F 47 D3 78 7F C8 F3 78 38 7C 6A 34 4B FF EF 29
-
-. 0 100018F4 24
-. 3C 80 10 01 38 84 6D 78 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3C E1
-
-. 0 FEF808C 20
-. 88 FF 00 00 3B FF 00 01 98 FD 00 00 3B BD 00 01 42 00 FF F0
-
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 1, stride = 1
-. 0 1000190C 12
-. 7F 9D F0 40 3B E0 00 00 40 9C 00 78
-
-. 0 10001918 52
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-
-. 0 10004AB0 112
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-. 0 10004B20 8
-. 2F 9E 00 00 41 9E 00 A0
-
-. 0 10004B28 104
-. 3E C0 43 30 3D 20 10 02 39 29 80 F8 93 C1 00 14 92 C1 00 10 3B 80 00 00 CB 29 00 00 3D 20 10 02 C8 01 00 10 3B A0 00 00 CB 49 81 40 54 B8 20 36 FF 60 C8 28 7F DF F3 78 7C 1D F3 96 92 C1 00 08 7C 00 F1 D6 7C 00 E8 50 7F BD D2 14 90 01 00 0C CB E1 00 08 FF FF C8 28 FF FF 06 B2 FF FF D8 24 FC 20 F8 90 48 02 43 69
-
-. 0 10004B90 12
-. FF C0 08 90 FC 20 F8 90 48 02 43 FD
-
-. 0 10004B9C 40
-. 37 FF FF FF FC 01 07 32 7D 3C CA 14 FC 21 07 72 FC 1E 07 7A FF DE 0F 38 7F DC CD AE 7F 9C C2 14 D8 09 00 08 40 82 FF A0
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-. 0 10004BC4 8
-. 2F 9E 00 00 41 9E 00 3C
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-. 0 10004BCC 56
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-. 0 10004C04 8
-. 2F 9A 00 00 40 9D 00 C8
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-. 0 10004CD0 20
-. 7D 3A F0 50 7C 09 F3 96 7C 00 F1 D6 7C 60 48 50 4B FF FF 38
-
-. 0 10004C18 148
-. 3C 00 43 30 3D 20 10 02 90 01 00 10 39 29 80 F8 93 C1 00 14 7C 17 19 D6 C9 A1 00 10 38 60 00 00 C8 09 00 00 FD AD 00 28 54 00 20 36 7D 20 DA 14 FC 0D 07 72 FD AD 07 32 7D BB 05 AE D8 09 00 08 80 01 00 84 82 C1 00 20 82 E1 00 24 7C 08 03 A6 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB 21 00 48 CB 41 00 50 CB 61 00 58 CB 81 00 60 CB A1 00 68 CB C1 00 70 CB E1 00 78 38 21 00 80 4E 80 00 20
-
-. 0 1000194C 16
-. 7F 44 D3 78 7F C5 F3 78 7F 63 DB 78 48 00 78 75
-
-. 0 1000195C 36
-. C8 35 81 10 3B FF 00 01 38 7C 6A 34 7F 04 C3 78 38 B6 6A E4 7F 66 DB 78 7F 47 D3 78 7F C8 F3 78 4B FF EE 9D
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-. 0 10001980 12
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-
-. 0 1000198C 28
-. 3C 80 10 01 7F C5 F3 78 7F 46 D3 78 38 84 6D C4 7F A3 EB 78 4C C6 31 82 48 01 3C 45
-
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 1, stride = 1
-. 0 100019A8 8
-. 7F 63 DB 78 48 02 75 D9
-
-. 0 10028F84 4
-. 4B EC 65 0C
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-. 0 100019B0 8
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-. 0 100019B8 8
-. 7F 03 C3 78 48 02 75 C9
-
-. 0 100019C0 8
-. 7E E3 BB 78 48 02 75 C1
-
-. 0 100019C8 72
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-
-. 0 100046BC 12
-. 7F A3 EB 78 7F E4 FB 78 4B FF D7 69
-
-. 0 10001E2C 60
-. 94 21 FF D0 7C 08 02 A6 93 81 00 20 7F 84 19 D6 93 A1 00 24 93 61 00 1C 7C 7B 1B 78 90 01 00 34 57 9D 18 38 93 41 00 18 7F A3 EB 78 93 C1 00 28 93 E1 00 2C 7C 9E 23 78 48 02 70 D1
-
-. 0 10001E68 12
-. 7C 7A 1B 78 7F A3 EB 78 48 02 70 C5
-
-. 0 10001E74 12
-. 7C 7F 1B 78 7F A3 EB 78 48 02 70 B9
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-. 0 10001E80 16
-. 2B 9C 00 00 7C 7D 1B 78 39 40 00 00 40 9D 00 38
-
-. 0 10001E90 52
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-. 0 10001EC4 16
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-. 0 10028F74 4
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-. 0 FEF8760 8
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-. 0 FEF8768 24
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-
-. 0 FEF876C 20
-. 88 FD 00 00 3B BD 00 01 98 FF 00 00 3B FF 00 01 42 00 FF F0
-
-. 0 10001ED4 12
-. 2B 9E 00 01 38 E0 00 00 40 9D 00 18
-
-. 0 10001EF4 12
-. 39 40 00 00 7F 8A F0 40 40 9C 00 54
-
-. 0 10001F00 24
-. 7F E8 FB 78 57 66 18 38 39 60 00 00 7D 49 53 78 7F 8B 38 40 40 9C 00 1C
-
-. 0 10001F30 32
-. 7C 0B D9 D6 39 4A 00 01 7F 8A F0 40 C8 08 00 00 7D 08 32 14 54 00 18 38 7C 1D 05 AE 41 9C FF BC
-
-. 0 10001F50 16
-. 34 DE FF FF 39 60 00 00 39 40 00 00 41 82 00 5C
-
-. 0 10001FB8 44
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-
-. 0 10000A48 124
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-
-. 0 10000AC4 56
-. 3D 20 10 02 7F A9 03 A6 39 29 80 F8 38 00 00 00 C9 69 00 00 54 E9 18 38 7D 9F 04 AE 7D BE 04 AE 7C 00 4A 14 FC 0C 68 28 FC 00 02 10 FF E0 02 F2 FF 9F 08 00 40 9D 00 08
-
-. 0 10000B00 4
-. 42 00 FF DC
-
-. 0 10000B04 12
-. FF 81 50 00 38 60 00 00 40 9C 00 58
-
-. 0 10000B10 84
-. 80 01 00 64 82 41 00 10 82 61 00 14 7C 08 03 A6 82 81 00 18 82 A1 00 1C 82 C1 00 20 82 E1 00 24 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB A1 00 48 CB C1 00 50 CB E1 00 58 38 21 00 60 4E 80 00 20
-
-. 0 10001FE4 20
-. 3C 80 10 01 7F C5 F3 78 38 84 70 08 4C C6 31 82 48 01 35 F5
-
-. 0 FEF8934 8
-. 2C 80 00 02 41 86 00 BC
-
-. 0 FEF893C 8
-. 2F 00 00 03 41 9A 00 8C
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-. 0 FEF89CC 20
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-
-. 0 FEF896C 56
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-
-PASS: fft_real_bitreverse_order, n = 1
-. 0 10001FF8 8
-. 7F A3 EB 78 48 02 6F 89
-
-. 0 10002000 8
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-
-. 0 10002008 8
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-
-. 0 10002010 40
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-. 0 100046C8 16
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-
-. 0 10002038 64
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-
-. 0 10002078 12
-. 7C 7F 1B 78 7F A3 EB 78 48 02 6E B5
-
-. 0 10002084 12
-. 7C 7E 1B 78 7F A3 EB 78 48 02 6E A9
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-. 0 10002090 12
-. 7C 79 1B 78 7F A3 EB 78 48 02 6E 9D
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-. 0 1000209C 16
-. 2B 9A 00 00 7C 7D 1B 78 39 40 00 00 40 9D 00 38
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-. 0 100020AC 52
-. 3D 60 10 02 7F 49 03 A6 39 6B 80 F8 3D 20 43 30 C9 AB 00 00 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 68 28 7C 1F 05 AE 42 00 FF E4
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-. 0 100020E0 16
-. 57 40 08 3C 39 40 00 00 2B 80 00 00 40 9D 00 64
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-. 0 100020F0 96
-. 3D 60 10 02 3D 20 10 02 C9 2B 81 00 3D 60 10 02 39 6B 80 F8 C9 09 80 E8 7C 09 03 A6 3D 20 10 02 C9 6B 00 00 C9 49 81 08 3D 20 43 30 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 58 28 FD A0 50 2A FD 80 40 2A FC 00 48 2A 7D BD 05 AE 7D 9E 05 AE 7C 19 05 AE 42 00 FF D0
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-. 0 1000211C 52
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-. 0 10002150 8
-. 38 60 00 00 48 01 32 A1
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-. 0 10002158 20
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-. 0 10005114 68
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-. 0 10005158 8
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-
-. 0 10005160 24
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-. 0 10005178 28
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-. 0 10005194 20
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-. 0 100051A8 52
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-. 0 1000216C 16
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-. 0 1000217C 8
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-. 0 10002184 32
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-. 0 100021A4 20
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-. 0 10012584 124
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-
-. 0 1001280C 88
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-. 0 100021B8 20
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-. 0 1000E5DC 48
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-. 0 1000E60C 40
-. 38 06 FF FF 83 FE 81 CC 2B 80 00 01 C8 03 00 00 C9 BF 00 00 38 A0 00 01 D8 04 00 00 7C 07 03 78 D9 A4 00 08 40 9D 00 54
-
-. 0 1000E684 8
-. 7F 87 28 00 41 9E 00 20
-
-. 0 1000E68C 28
-. 80 01 00 14 38 60 00 00 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
-
-. 0 100021CC 40
-. C8 3A 81 10 3C A0 10 01 3C 60 10 01 7F 67 DB 78 7F 88 E3 78 38 A5 69 3C 7F A4 EB 78 7F C6 F3 78 38 63 69 4C 4B FF E6 29
-
-. 0 100021F4 24
-. 3C 80 10 01 38 84 70 2C 7F 85 E3 78 7F 66 DB 78 4C C6 31 82 48 01 33 E1
-
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 1, stride = 1
-. 0 1000220C 16
-. 7F E3 FB 78 7F 64 DB 78 7F 85 E3 78 48 00 BE 79
-
-. 0 1000E090 132
-. 94 21 FF 80 7C 08 02 A6 42 9F 00 05 93 C1 00 50 7F C8 02 A6 2F 85 00 01 90 01 00 84 92 E1 00 34 7C B7 2B 78 80 1E FF F0 93 A1 00 4C 7C 9D 23 78 93 E1 00 54 7F C0 F2 14 7C 7F 1B 78 DB 61 00 58 DB 81 00 60 38 60 00 00 DB A1 00 68 DB C1 00 70 DB E1 00 78 92 21 00 1C 92 41 00 20 92 61 00 24 92 81 00 28 92 A1 00 2C 92 C1 00 30 93 01 00 38 93 21 00 3C 93 41 00 40 93 61 00 44 93 81 00 48 41 9E 02 34
-
-. 0 1000E344 96
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-
-. 0 1000221C 8
-. 2F 9C 00 00 41 9E 00 44
-
-. 0 10002224 64
-. 3C 00 43 30 3D 20 10 02 90 01 00 08 39 29 80 F8 93 81 00 0C 7F 89 03 A6 C8 09 00 00 38 00 00 00 C9 A1 00 08 57 69 18 38 FD AD 00 28 7C 1F 04 AE FC 00 68 24 7C 1F 05 AE 7C 00 4A 14 42 00 FF F0
-
-. 0 10002264 20
-. 7F C4 F3 78 7F 65 DB 78 7F 86 E3 78 7F E3 FB 78 48 01 06 11
-
-. 0 10012884 40
-. 7C 08 02 A6 94 21 FF F0 42 9F 00 05 93 C1 00 08 7F C8 02 A6 2C 06 00 00 90 01 00 14 80 1E FF F0 7F C0 F2 14 41 82 00 54
-
-. 0 100128AC 8
-. 2F 86 00 00 41 9E 00 34
-
-. 0 100128B4 48
-. 81 3E 82 9C 7C C9 03 A6 39 40 00 00 C9 A9 00 00 55 40 18 38 55 49 20 36 7C 03 04 AE 7D 69 22 14 7D 4A 2A 14 7C 09 25 AE D9 AB 00 08 42 00 FF E4
-
-. 0 100128E4 24
-. 80 01 00 14 38 60 00 00 83 C1 00 08 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-. 0 10002278 40
-. C8 3A 81 10 3C A0 10 01 3C 60 10 01 7F 67 DB 78 7F 88 E3 78 7F 24 CB 78 7F C6 F3 78 38 A5 69 98 38 63 69 90 4B FF E5 7D
-
-. 0 100022A0 24
-. 3C 80 10 01 7F 85 E3 78 7F 66 DB 78 38 84 70 6C 4C C6 31 82 48 01 33 35
-
-. 0 FEF89F4 24
-. 81 44 00 00 38 63 FF F4 81 64 00 04 38 A5 00 02 38 84 FF FC 4B FF FF 78
-
-. 0 FEF8980 36
-. 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
-
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 1, stride = 1
-. 0 100022B8 8
-. 7F E3 FB 78 48 02 6C C9
-
-. 0 100022C0 8
-. 7F C3 F3 78 48 02 6C C1
-
-. 0 100022C8 8
-. 7F 23 CB 78 48 02 6C B9
-
-. 0 100022D0 8
-. 7F A3 EB 78 48 02 6C B1
-
-. 0 100022D8 44
-. 80 01 00 34 83 21 00 14 83 41 00 18 7C 08 03 A6 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
-
-. 0 100046D8 8
-. 2B 9D 00 03 40 9D FF C8
-
-. 0 100046A4 12
-. 7F A3 EB 78 7F E4 FB 78 4B FF CC 4D
-
-. 0 FEF8864 20
-. 80 04 00 00 38 63 FF FC 81 24 00 04 90 03 00 04 4B FF FF A0
-
-. 0 FEF8814 64
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-
-PASS: fft_complex_bitreverse_order, n = 1
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 1, stride = 2
-. 0 10001A70 20
-. 7F 44 D3 78 7F C5 F3 78 38 C0 00 00 7F 63 DB 78 4B FF F1 B1
-
-. 0 10000C30 20
-. 39 40 00 00 94 21 FF F0 7F 8A 28 40 39 60 00 00 40 9C 00 98
-
-. 0 10000C44 16
-. 7C A7 2B 78 2B 84 00 01 39 6B 00 02 40 9D 00 80
-
-. 0 10000C54 124
-. 3D 20 10 02 38 04 FF FF 39 29 80 F8 7C 09 03 A6 C9 49 00 00 3D 00 43 30 55 69 18 38 7C 0B 32 14 39 6B 00 01 90 01 00 0C 91 01 00 08 7C 0B 32 14 C9 81 00 08 90 01 00 0C 55 60 18 38 C8 01 00 08 FD 8C 50 28 7D 69 1C AE 39 6B 00 01 FC 00 50 28 7D A3 04 AE FF 8B 60 00 FF 0D 00 00 4F DE F0 42 4F 5A D0 42 7D 20 00 26 55 20 FF FE 55 29 DF FE 7D 4A 03 78 7D 4A 4B 78 42 00 FF A0
-
-. 0 10000CD0 8
-. 34 E7 FF FF 40 82 FF 74
-
-. 0 10000CD8 12
-. 7D 43 53 78 38 21 00 10 4E 80 00 20
-
-. 0 10001A84 24
-. 3C 80 10 01 38 84 6E A0 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3B 51
-
-PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 1, stride = 2
-. 0 10001A9C 4
-. 4B FF FC 70
-
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 1, stride = 2
-. 0 10001A40 20
-. 7F 44 D3 78 7F C5 F3 78 38 C0 00 00 7F 63 DB 78 4B FF F1 E1
-
-. 0 10001A54 24
-. 3C 80 10 01 38 84 6E 54 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3B 81
-
-PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 1, stride = 2
-. 0 10001A6C 4
-. 4B FF FC F4
-
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 1, stride = 2
-. 0 10001A10 20
-. 7F 44 D3 78 7F C5 F3 78 38 C0 0B B8 7E E3 BB 78 4B FF F2 11
-
-. 0 10001A24 24
-. 3C 80 10 01 38 84 6E 08 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 3B B1
-
-PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 1, stride = 2
-. 0 10001A3C 4
-. 4B FF FD D4
-
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 1, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 1, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 1, stride = 2
-. 0 10001EA4 32
-. 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 68 28 7C 1F 05 AE 42 00 FF E4
-
-PASS: fft_real_bitreverse_order, n = 1
-. 0 100020C0 32
-. 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 68 28 7C 1F 05 AE 42 00 FF E4
-
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 1, stride = 2
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 1, stride = 2
-. 0 FEF8804 80
-. 80 04 00 00 91 23 00 00 81 24 00 04 90 03 00 04 80 04 00 08 91 23 00 08 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
-
-PASS: fft_complex_bitreverse_order, n = 1
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 1, stride = 3
-. 0 10000C6C 100
-. 55 69 18 38 7C 0B 32 14 39 6B 00 01 90 01 00 0C 91 01 00 08 7C 0B 32 14 C9 81 00 08 90 01 00 0C 55 60 18 38 C8 01 00 08 FD 8C 50 28 7D 69 1C AE 39 6B 00 01 FC 00 50 28 7D A3 04 AE FF 8B 60 00 FF 0D 00 00 4F DE F0 42 4F 5A D0 42 7D 20 00 26 55 20 FF FE 55 29 DF FE 7D 4A 03 78 7D 4A 4B 78 42 00 FF A0
-
-PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 1, stride = 3
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 1, stride = 3
-PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 1, stride = 3
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 1, stride = 3
-PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 1, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 1, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 1, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 1, stride = 3
-. 0 FEF88D8 28
-. 80 04 00 00 38 84 FF F8 81 24 00 0C 38 63 FF F4 38 A5 00 02 90 03 00 0C 4B FF FF 34
-
-. 0 FEF8824 48
-. 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
-
-PASS: fft_real_bitreverse_order, n = 1
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 1, stride = 3
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 1, stride = 3
-. 0 100046E0 12
-. 57 FF 08 3C 7F 9F F0 40 40 9D FF B0
-
-. 0 100013B0 20
-. 39 20 00 01 38 E7 00 01 7D 20 38 30 7F 80 F0 40 41 9C FF F4
-
-. 0 100013E8 24
-. 7C E9 03 A6 55 20 07 FE 55 6B 08 3C 7D 6B 03 78 55 29 F8 7E 42 00 FF F0
-
-. 0 100013D8 16
-. 39 60 00 00 7D 49 53 78 7F 8B 38 40 40 9C 00 1C
-
-. 0 10001440 24
-. 57 C3 F8 7E 38 C0 00 00 57 65 20 36 7F 87 40 40 7C 6A 1B 78 40 9C 00 40
-
-. 0 10001494 8
-. 7F 8A 40 40 40 9D FF F4
-
-. 0 1000149C 20
-. 38 E7 00 01 7D 08 52 14 7F 84 38 40 7C C6 2A 14 41 9D FF A0
-
-. 0 100008AC 60
-. 7D 20 FA 14 7D 60 F2 14 C9 AB 00 08 7D 9F 04 AE 7C 1E 04 AE 7C 00 52 14 C9 69 00 08 FC 0C 00 28 FD 4B 68 28 FC 00 02 10 FD A0 52 10 FC 00 68 2A FF E0 02 72 FF 9F 08 00 40 9D 00 08
-
-PASS: fft_complex_bitreverse_order, n = 2
-. 0 10005068 4
-. 4B FF F7 25
-
-. 0 10005D50 28
-. 93 A1 00 14 92 E1 00 10 CB E1 00 10 FF FF D8 28 FF FF 06 B2 FC 20 F8 90 48 02 31 8D
-
-. 0 10005D2C 20
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-. 0 FE0DFA0 16
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-. 0 FE0E1B4 16
-. 3D 60 40 03 61 6A 68 FC 7C 09 50 00 41 81 00 E4
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-. 0 FE0E2A4 16
-. 3C 60 41 99 60 65 21 FA 7C 09 28 00 41 81 01 F8
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-. 0 FE0E6C4 8
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-. 0 FE0E330 16
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-. 0 FE0E340 4
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-. 0 10009148 16
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-. 0 10009158 88
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-. 0 100008E8 8
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-
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 2, stride = 1
-. 0 FE0CE6C 20
-. 81 3E 0F 94 2F 9F 00 01 C9 29 00 00 FC 9F 02 72 41 9E 04 D0
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-. 0 FE0DD24 16
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-. 0 FE0CF24 16
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-. 0 FE0DDDC 20
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-. 0 FE0DDF0 20
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-. 0 FE0D000 12
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-. 0 FE0D024 12
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-. 0 FE0DE88 20
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-. 0 FE0D100 8
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-. 0 FE0DF38 8
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-. 0 FE0CA58 88
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-
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-. 0 1000929C 36
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-
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 2, stride = 1
-. 0 100017A4 36
-. 7C 19 04 AE 7D 20 CA 14 FC 00 03 32 7C 19 05 AE 7C 00 5A 14 C9 A9 00 08 FD AD 03 32 D9 A9 00 08 42 00 FF E0
-
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 2, stride = 1
-. 0 10004864 36
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-
-. 0 100048E8 48
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-
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 2, stride = 1
-. 0 100049E8 20
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-
-. 0 10004A18 36
-. 7D 20 32 14 7D 66 01 2E 38 C6 00 04 7D 86 01 2E 38 C6 FF FC 91 69 00 08 91 89 00 0C 7C 00 22 14 42 00 FF E0
-
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 2, stride = 1
-. 0 10004B60 48
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-
-. 0 10004BE0 36
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-
-. 0 1000191C 48
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-. 0 FE0E32C 20
-. 81 3E 0F F4 2F 1F 00 01 C9 29 00 00 FC 7F 02 72 41 9A 05 C0
-
-. 0 FE0E6EC 192
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-
-. 0 10004C0C 160
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-
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 2, stride = 1
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-. 0 10001F18 24
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-. 0 10001F08 16
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-
-. 0 10001F60 24
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-. 0 10001F9C 8
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-. 0 10001FA4 20
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-
-. 0 10000ADC 32
-. 7D 9F 04 AE 7D BE 04 AE 7C 00 4A 14 FC 0C 68 28 FC 00 02 10 FF E0 02 F2 FF 9F 08 00 40 9D 00 08
-
-PASS: fft_real_bitreverse_order, n = 2
-. 0 10005174 4
-. 4B FF F6 19
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-. 0 1000218C 24
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-. 0 10012600 8
-. 7C A3 2B 78 4B FF 41 F5
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-. 0 10012608 12
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-. 0 10012614 24
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-. 0 100062E8 20
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-
-. 0 100062FC 24
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-. 0 10006338 8
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-. 0 10006340 20
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-. 0 10006354 12
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-. 0 1001263C 40
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-. 0 10012664 60
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-. 0 100126A0 44
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-. 0 100126CC 16
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-. 0 100126DC 24
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-. 0 100127C8 8
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-. 0 100127FC 12
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-. 0 10012808 92
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-. 0 1000E6A8 36
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-
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 2, stride = 1
-. 0 1000E114 8
-. 7C A3 2B 78 4B FF 86 E1
-
-. 0 1000E11C 12
-. 2F 83 FF FF 7C 78 1B 78 41 9E 02 80
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-. 0 1000E128 24
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-. 0 1000E140 40
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-. 0 1000E168 60
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-. 0 1000E1A4 44
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-. 0 1000E1D0 16
-. FF 80 08 90 C8 31 00 00 FC 3F 00 72 48 01 AD B9
-
-. 0 1000E1E0 24
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-. 0 1000E2BC 8
-. 2B 9B 00 01 40 9D 00 54
-
-. 0 1000E314 24
-. 3B 39 00 01 7C BB 2B 78 7F 99 C0 40 57 9C F8 7E 57 5A 08 3C 40 9D FE 38
-
-. 0 1000E32C 20
-. 7F E3 FB 78 7F A4 EB 78 7E E5 BB 78 7F 06 C3 78 4B FF 7F AD
-
-. 0 1000E340 100
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-. 0 10002250 20
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-. 0 100128C4 32
-. 55 40 18 38 55 49 20 36 7C 03 04 AE 7D 69 22 14 7D 4A 2A 14 7C 09 25 AE D9 AB 00 08 42 00 FF E4
-
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 2, stride = 1
-PASS: fft_complex_bitreverse_order, n = 2
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 2, stride = 2
-. 0 10000C48 12
-. 2B 84 00 01 39 6B 00 02 40 9D 00 80
-
-PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 2, stride = 2
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 2, stride = 2
-PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 2, stride = 2
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 2, stride = 2
-PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 2, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 2, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 2, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 2, stride = 2
-PASS: fft_real_bitreverse_order, n = 2
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 2, stride = 2
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 2, stride = 2
-PASS: fft_complex_bitreverse_order, n = 2
-. 0 FEEEC18 8
-. 71 20 00 02 40 82 02 FC
-
-. 0 FEEEC20 20
-. 81 03 00 30 7F 5F EA 14 83 7E 06 5C 7F 08 F8 00 41 9A 02 54
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-. 0 FEEEC34 8
-. 71 60 00 02 41 82 03 50
-
-. 0 FEEEF88 24
-. 82 48 00 04 83 7E 06 74 56 51 00 38 7D 68 8A 14 7F 8B D0 40 41 9D FC A0
-
-. 0 FEEEC3C 16
-. 80 1A 00 04 83 7E 06 60 70 0B 00 01 41 82 02 3C
-
-. 0 FEEEC4C 12
-. 28 80 00 08 54 1B 00 38 40 85 02 2C
-
-. 0 FEEEC58 12
-. 82 7C 04 4C 7F 13 D8 40 40 99 02 20
-
-. 0 FEEEC64 8
-. 71 27 00 01 40 82 00 3C
-
-. 0 FEEECA4 8
-. 7F 88 D0 00 41 9E 02 C0
-
-. 0 FEEEF68 20
-. 7F BD DA 14 93 FC 00 30 63 AA 00 01 91 5F 00 04 4B FF FD 94
-
-. 0 FEEED0C 8
-. 28 9D FF FF 40 85 01 24
-
-. 0 FEEED14 12
-. 83 BC 00 04 73 A9 00 01 41 82 02 60
-
-. 0 FEEEF7C 8
-. 7F 83 E3 78 4B FF F5 45
-
-. 0 FEEE53C 48
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-. 0 FEEE56C 24
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-. 0 FEEE5DC 36
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-. 0 FEEE634 12
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-. 0 FEEE640 16
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-. 0 FEEE650 16
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-. 0 FEEE5B0 44
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-. 0 FEEE600 32
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-. 0 FEEE620 12
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-
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-
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 2, stride = 3
-PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 2, stride = 3
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 2, stride = 3
-PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 2, stride = 3
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 2, stride = 3
-PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 2, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 2, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 2, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 2, stride = 3
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-
-. 0 FEEEF58 16
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-. 0 FEEECE8 44
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-
-PASS: fft_real_bitreverse_order, n = 2
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 2, stride = 3
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 2, stride = 3
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-
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-. 0 100013EC 20
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-. 0 1000144C 12
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-. 0 10001458 52
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-
-. 0 1000148C 16
-. 7D 0A 40 50 55 4A F8 7E 7F 8A 40 40 40 9D FF F4
-
-PASS: fft_complex_bitreverse_order, n = 4
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-
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-. 0 10009098 48
-. FC 1C 07 B2 39 00 00 00 7F 88 E0 40 FD 7C F7 7A FD A8 07 B2 FD 88 07 72 FC 1D 00 28 FD 2B 68 28 FD 40 60 28 FF C0 48 90 FF A0 50 90 40 9C 00 78
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-. 0 100090C8 116
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-
-. 0 1000913C 12
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-
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 4, stride = 1
-. 0 FE0CAC8 28
-. 80 DE 0E 80 C9 46 00 00 FC 0A 08 2A D8 01 00 30 80 E1 00 30 81 01 00 34 40 9D 02 E8
-
-. 0 FE0CAE4 104
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-. 0 FE0CB50 8
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-. 0 FE0CB5C 60
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-
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 4, stride = 1
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 4, stride = 1
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 4, stride = 1
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 4, stride = 1
-. 0 FE0E368 60
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-
-. 0 FE0BC68 8
-. 81 3E 0E 9C 4B FF FF 8C
-
-. 0 FE0BBF8 24
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-
-. 0 FE0BDD0 8
-. 81 3E 0E A8 4B FF FE C4
-
-. 0 FE0BC98 28
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-
-. 0 FE0BDF8 20
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-. 0 FE0E34C 8
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-
-. 0 FE0E910 20
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-. 0 FE0BBA0 24
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-
-. 0 FE0BD78 28
-. 81 3E 0E B0 C9 09 00 00 FC 1E 6A 3A C9 A1 00 10 FC AD 00 2A FC 8D 28 00 40 86 00 7C
-
-. 0 FE0D344 8
-. 2C 1F 00 03 40 82 FF E8
-
-. 0 FE0D358 192
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-
-. 0 FE0D7C8 8
-. FC 20 08 50 4B FF F5 F4
-
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 4, stride = 1
-. 0 10001EE4 16
-. 38 E7 00 01 7D 20 38 30 7F 80 F0 40 41 9C FF F4
-
-. 0 10001F1C 20
-. 55 20 07 FE 55 6B 08 3C 7D 6B 03 78 55 29 F8 7E 42 00 FF F0
-
-. 0 10001F6C 12
-. 7F 8A 58 40 7C A9 2B 78 40 9C 00 28
-
-. 0 10001F78 28
-. 7C 1B 59 D6 7D A8 FC AE 54 00 18 38 7C 1F 04 AE 7C 08 FD AE 7D BF 05 AE 48 00 00 0C
-
-. 0 10001F94 16
-. 7D 69 58 50 55 29 F8 7E 7F 89 58 40 40 9D FF F4
-
-PASS: fft_real_bitreverse_order, n = 4
-. 0 10006308 12
-. 7F 8A 58 40 7C A9 2B 78 40 9C 00 28
-
-. 0 10006314 28
-. 7C 04 59 D6 7D A8 1C AE 54 00 18 38 7C 03 04 AE 7C 08 1D AE 7D A3 05 AE 48 00 00 0C
-
-. 0 10006330 16
-. 7D 69 58 50 55 29 F8 7E 7F 89 58 40 40 9D FF F4
-
-. 0 1001266C 52
-. 7C 0B DA 14 7D 2B E9 D6 7D 6B E2 14 7C 00 E9 D6 55 29 18 38 7C 09 FC AE 54 00 18 38 7D 9F 04 AE FD A0 60 28 FC 00 60 2A 7C 09 FD AE 7D BF 05 AE 42 00 FF D0
-
-. 0 10012654 16
-. 57 5A F8 7F 7F 9B E3 78 57 9C 08 3C 41 82 00 40
-
-. 0 100127D0 8
-. 2F 9A 00 00 41 9E 00 28
-
-. 0 100127D8 36
-. 7F 49 03 A6 7D 25 E0 50 7C 09 E9 D6 7D 29 E2 14 54 00 18 38 7C 1F 04 AE FC 00 00 50 7C 1F 05 AE 42 00 FF E8
-
-. 0 1000E634 80
-. 7D 88 63 78 7D 67 61 D6 38 A5 00 01 7C E5 30 50 7F 87 28 40 55 09 18 38 55 60 18 38 7C 09 1C AE 7D A3 04 AE 55 6B 20 36 55 00 20 36 7D 4B 22 14 FD 80 68 50 7D 20 22 14 7C 04 05 AE 7D 08 62 14 D9 A9 00 08 7C 0B 25 AE D9 8A 00 08 41 9D FF B8
-
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 4, stride = 1
-. 0 1000E2C4 8
-. 2F 9A 00 00 41 9E 00 4C
-
-. 0 1000E2CC 72
-. 7D 7B 2A 14 FD A0 D8 90 39 40 00 00 7F 49 03 A6 7C 0A 2A 14 7D 2B E9 D6 7D 4A E2 14 7D 6B E2 14 7C 00 E9 D6 55 29 18 38 54 00 18 38 7C 1F 04 AE FC 00 00 2A 7C 1F 05 AE 7C 09 FC AE FC 00 03 72 7C 09 FD AE 42 00 FF CC
-
-. 0 1000E160 8
-. 2F 9A 00 00 41 9E 00 40
-
-. 0 1000E170 52
-. 7C 0B DA 14 7D 2B E9 D6 7D 6B E2 14 7C 00 E9 D6 55 29 18 38 7C 09 FC AE 54 00 18 38 7D 9F 04 AE FD A0 60 28 FC 00 60 2A 7C 09 FD AE 7D BF 05 AE 42 00 FF D0
-
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 4, stride = 1
-PASS: fft_complex_bitreverse_order, n = 4
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 4, stride = 2
-PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 4, stride = 2
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 4, stride = 2
-PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 4, stride = 2
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 4, stride = 2
-PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 4, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 4, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 4, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 4, stride = 2
-PASS: fft_real_bitreverse_order, n = 4
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 4, stride = 2
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 4, stride = 2
-PASS: fft_complex_bitreverse_order, n = 4
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 4, stride = 3
-PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 4, stride = 3
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 4, stride = 3
-PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 4, stride = 3
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 4, stride = 3
-PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 4, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 4, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 4, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 4, stride = 3
-PASS: fft_real_bitreverse_order, n = 4
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 4, stride = 3
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 4, stride = 3
-PASS: fft_complex_bitreverse_order, n = 8
-. 0 FE0DFB0 20
-. 80 FE 0F C4 FC 00 08 90 CB A7 00 00 FF 01 E8 00 41 99 00 08
-
-. 0 FE0DFC4 192
-. FC 00 08 50 81 3E 0E 80 80 9E 0F C8 C8 C9 00 00 80 7E 0F CC FC 66 00 2A 83 FE 0F D0 83 BE 0F D4 C8 83 00 00 FC 43 30 28 D8 61 00 30 C8 64 00 00 CB DF 00 00 FD 80 10 28 C8 5D 00 00 81 9E 0F D8 80 E1 00 30 81 01 00 34 FD 4C 03 32 C8 AC 00 00 80 DE 0E 7C 55 0A 28 34 81 1E 0F DC 7D 6A 32 14 FC 2A 20 FA C9 6B 00 08 C9 2B 00 18 FD 0C 02 B2 FC EA 17 BA FD A1 2A BA C8 2B 00 10 FD 08 61 FA FC 0D 02 B2 7D 4A 34 AE FD 68 02 F2 FD A1 00 32 FC E9 58 28 FD 8A 02 32 FC 07 68 28 C9 A8 00 00 FD 40 60 28 FD 61 50 2A FD 21 58 28 FC 20 58 90 FD 0A 48 2A FC E8 5B 7A FC 87 58 00 41 86 01 0C
-
-. 0 FE0E3A4 24
-. C8 A6 00 00 38 A0 00 01 FC 00 30 90 FC 86 28 00 FC A0 10 90 41 85 00 10
-
-. 0 FE0E3BC 188
-. FC 00 30 50 38 A0 00 00 FC A0 10 50 81 1E 0E 80 81 7E 0F C8 CB A8 00 00 81 5E 0F CC FC 7D 00 2A C9 AB 00 00 C8 8A 00 00 80 9E 0F D8 FD 83 E8 28 D8 61 00 30 80 E1 00 30 81 01 00 34 81 3E 0F D4 FD 80 60 28 80 FE 0F D0 CB C4 00 00 55 00 28 34 C9 07 00 00 FD 4C 03 32 C8 E9 00 00 80 7E 0E 7C 7F E0 1A 14 FD 2A 23 7A FC 2A 3A 3A C8 FF 00 08 FD 69 F2 BA 7D 23 04 AE CB DF 00 18 FC 6C 02 B2 FF AB 02 B2 FC 03 28 7A C8 3F 00 10 FC 8C E9 7A CB A6 00 00 FD 40 60 2A FD A9 01 32 FD 0A 3F BA FD 68 68 28 FC 81 5A BA FC 29 20 2A FC 69 08 28 FD 44 18 2A FF 8A E8 00 40 9D 02 08
-
-. 0 FE0E67C 24
-. 83 FE 0F F8 83 BE 0F F0 C9 3F 00 00 C9 7D 00 00 FD 4A 5A 78 4B FF FD FC
-
-. 0 FE0E48C 12
-. FF C1 50 2A FF 1E 08 00 40 9A 05 20
-
-. 0 FE0E498 8
-. 2F 85 00 00 40 BE FC F0
-
-. 0 FE0E4A0 8
-. FC 20 08 50 4B FF FC E8
-
-. 0 FE0CCEC 200
-. 81 5E 0E 80 83 BE 0E 74 C9 4A 00 00 C9 7D 00 00 FC 2A 60 28 FC 60 58 50 FC 01 50 28 D8 21 00 30 81 61 00 30 81 81 00 34 FD 20 60 2A FD 43 48 28 FD 0A 02 B2 80 DE 0F 6C 80 BE 0F 70 55 80 28 34 80 9E 0F 78 80 7E 0F 74 C8 46 00 00 FD 2A 02 32 C8 E5 00 00 CB 64 00 00 CB 83 00 00 FF 48 38 BA 80 FE 0F 7C FF A8 E6 FA 81 1E 0E 7C C9 67 00 00 7D 20 42 14 7D A8 04 AE FC 3A 5A 3A C8 49 00 10 C8 89 00 18 FC C9 57 7A C9 49 00 08 81 9E 0F 90 FC 01 02 32 CB 4C 00 00 FC 66 02 B2 FD 82 00 32 FC A4 18 28 FF CD 01 B2 FC E5 60 28 FF 67 F0 28 FD 82 D8 2A FF 82 60 28 FF BB E0 2A FD 1D 66 BA FC 08 60 00 40 82 08 10
-
-. 0 FE0E9C4 24
-. C8 26 00 00 38 A0 00 01 FC 00 10 90 FC 82 08 00 FC C0 20 90 41 85 00 10
-
-. 0 FE0E9DC 188
-. FC 00 10 50 38 A0 00 00 FC C0 20 50 80 7E 0E 80 83 FE 0F C8 CB A3 00 00 83 BE 0F CC FD 3D 00 2A C9 1F 00 00 C8 FD 00 00 81 7E 0F D8 FD 89 E8 28 D9 21 00 30 80 E1 00 30 81 01 00 34 81 9E 0F D0 FD 80 60 28 55 00 28 34 81 1E 0F D4 C8 0B 00 00 FF CC 03 32 C8 2C 00 00 C9 48 00 00 81 5E 0E 7C FC BE 3A 3A 7C E0 52 14 FD 7E 50 7A C8 27 00 18 C9 47 00 08 FD A5 07 BA 7C AA 04 AE FD 2C 07 B2 FF AD 07 B2 FC E9 32 FA C9 27 00 10 FD 0C E9 BA CB A6 00 00 FC 07 60 2A FC C5 02 32 FF C0 50 7A FD 7E 30 28 FD A9 58 3A FC 25 68 2A FD 85 08 28 FD 4D 60 2A FF 0A E8 00 40 99 02 E8
-
-. 0 FE0ED7C 16
-. 80 9E 0F F8 C9 64 00 00 FC 0A 1A F8 4B FF FD 1C
-
-. 0 FE0EAA4 12
-. FC 61 00 2A FF 83 08 00 41 9E F9 EC
-
-. 0 FE0E6D8 8
-. 2F 9F 00 00 40 BE FC 78
-
-. 0 FE0E7AC 24
-. 81 7E 10 04 C8 2B 00 00 FC 0A 18 7A FC 6D 00 2A FF 03 68 00 40 9A 03 04
-
-. 0 FE0CE84 8
-. 2F 9F 00 00 40 9E 04 A8
-
-. 0 FE0CEA0 20
-. 80 DE 0F 98 D8 41 00 28 C8 C6 00 00 FC 8A 30 00 40 84 0A B8
-
-. 0 FE0D968 24
-. CB 5D 00 00 3B E0 00 01 FD A0 F0 90 FC 1E D0 00 FC C0 10 90 41 81 00 10
-
-. 0 FE0D98C 180
-. 81 7E 0E 80 80 BE 0F 6C C8 2B 00 00 80 9E 0F 70 FF 41 68 2A C8 E5 00 00 C9 24 00 00 80 7E 0F 7C DB 41 00 30 C9 61 00 30 80 FE 0F 78 FD 8B 08 28 80 DE 0F 74 C8 A3 00 00 C8 67 00 00 FF 4D 60 28 C9 A6 00 00 81 21 00 30 81 41 00 34 81 1E 0E 7C FD 5A 06 B2 55 5C 28 34 7F 7C 42 14 C9 7B 00 18 FF 6A 49 FA C8 FB 00 08 FD 0A 68 FA FF 9B 2A BA 7F 7C 44 AE FF BA 02 B2 FC 1C 02 B2 FC 3D 32 3A CB BB 00 10 C9 1D 00 00 FD 3A 01 BA FD A1 D0 2A FC 7B 02 72 FC AD 3A FA FF 85 18 28 FD 9D E3 7A FD BB 60 2A FC 1B 68 28 FD 4C 00 2A FE 0A 40 00 40 91 02 D8
-
-. 0 FE0DD14 16
-. 81 9E 0F B4 C8 0C 00 00 FC 0A 20 38 4B FF FD 2C
-
-. 0 FE0DA4C 12
-. FC 8D 00 2A FF 84 68 00 40 9E 00 58
-
-. 0 FE0DA58 12
-. 2F 9F 00 00 FC 20 68 90 40 BE EF F8
-
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 8, stride = 1
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 8, stride = 1
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 8, stride = 1
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 8, stride = 1
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 8, stride = 1
-. 0 FE0DFC8 188
-. 81 3E 0E 80 80 9E 0F C8 C8 C9 00 00 80 7E 0F CC FC 66 00 2A 83 FE 0F D0 83 BE 0F D4 C8 83 00 00 FC 43 30 28 D8 61 00 30 C8 64 00 00 CB DF 00 00 FD 80 10 28 C8 5D 00 00 81 9E 0F D8 80 E1 00 30 81 01 00 34 FD 4C 03 32 C8 AC 00 00 80 DE 0E 7C 55 0A 28 34 81 1E 0F DC 7D 6A 32 14 FC 2A 20 FA C9 6B 00 08 C9 2B 00 18 FD 0C 02 B2 FC EA 17 BA FD A1 2A BA C8 2B 00 10 FD 08 61 FA FC 0D 02 B2 7D 4A 34 AE FD 68 02 F2 FD A1 00 32 FC E9 58 28 FD 8A 02 32 FC 07 68 28 C9 A8 00 00 FD 40 60 28 FD 61 50 2A FD 21 58 28 FC 20 58 90 FD 0A 48 2A FC E8 5B 7A FC 87 58 00 41 86 01 0C
-
-. 0 FE0D980 192
-. FD A0 F0 50 3B E0 00 00 FC C0 10 50 81 7E 0E 80 80 BE 0F 6C C8 2B 00 00 80 9E 0F 70 FF 41 68 2A C8 E5 00 00 C9 24 00 00 80 7E 0F 7C DB 41 00 30 C9 61 00 30 80 FE 0F 78 FD 8B 08 28 80 DE 0F 74 C8 A3 00 00 C8 67 00 00 FF 4D 60 28 C9 A6 00 00 81 21 00 30 81 41 00 34 81 1E 0E 7C FD 5A 06 B2 55 5C 28 34 7F 7C 42 14 C9 7B 00 18 FF 6A 49 FA C8 FB 00 08 FD 0A 68 FA FF 9B 2A BA 7F 7C 44 AE FF BA 02 B2 FC 1C 02 B2 FC 3D 32 3A CB BB 00 10 C9 1D 00 00 FD 3A 01 BA FD A1 D0 2A FC 7B 02 72 FC AD 3A FA FF 85 18 28 FD 9D E3 7A FD BB 60 2A FC 1B 68 28 FD 4C 00 2A FE 0A 40 00 40 91 02 D8
-
-. 0 FE0DA64 8
-. FC 20 08 50 4B FF F3 58
-
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 8, stride = 1
-PASS: fft_real_bitreverse_order, n = 8
-. 0 100127E0 28
-. 7C 09 E9 D6 7D 29 E2 14 54 00 18 38 7C 1F 04 AE FC 00 00 50 7C 1F 05 AE 42 00 FF E8
-
-. 0 100126F4 44
-. FC 1C 07 B2 2F 9A 00 00 FD 7C F7 7A FD A4 07 B2 FD 84 07 72 FC 1D 00 28 FC AB 68 28 FC C0 60 28 FF C0 28 90 FF A0 30 90 41 9E 00 A0
-
-. 0 10012720 156
-. 7F 49 03 A6 7D 06 E0 50 38 E0 00 00 7D 48 E9 D6 7C 07 DA 14 7D 60 32 14 7C 06 00 50 7D 27 32 14 7D 6B E9 D6 55 4A 18 38 7D 4A FC AE 7C E7 E2 14 7D 08 E2 14 FD 66 02 B2 7C 00 E9 D6 55 6B 18 38 7C 0B FC AE FD 45 02 B2 FC E5 00 32 7D 29 E9 D6 54 00 18 38 7D 1F 04 AE FC 06 00 32 FD A8 58 28 55 29 18 38 FD 6B 40 2A 7D 29 FC AE FD AD 38 28 FD 89 00 28 FC 00 48 2A FD 6B 38 2A FD 8C 50 2A FC 00 50 28 FD A0 68 50 7C 09 FD AE 7D 6A FD AE 7D 9F 05 AE 7D AB FD AE 42 00 FF 74
-
-. 0 100127BC 12
-. 38 C6 00 01 7F 85 30 40 41 9D FF 30
-
-. 0 1000E638 76
-. 7D 67 61 D6 38 A5 00 01 7C E5 30 50 7F 87 28 40 55 09 18 38 55 60 18 38 7C 09 1C AE 7D A3 04 AE 55 6B 20 36 55 00 20 36 7D 4B 22 14 FD 80 68 50 7D 20 22 14 7C 04 05 AE 7D 08 62 14 D9 A9 00 08 7C 0B 25 AE D9 8A 00 08 41 9D FF B8
-
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 8, stride = 1
-. 0 1000E1F8 44
-. FC 1C 07 B2 2F 9A 00 00 FD 7C F7 7A FD A5 07 B2 FD 85 07 72 FC 1D 00 28 FC CB 68 28 FC E0 60 28 FF C0 30 90 FF A0 38 90 41 9E 00 90
-
-. 0 1000E224 140
-. 7F 49 03 A6 7D 06 E0 50 38 E0 00 00 7C 07 DA 14 7D 27 32 14 7D 40 32 14 7C 06 00 50 7D 4A E9 D6 7C E7 E2 14 7D 68 E9 D6 55 4A 18 38 7D 0A FC AE 7D 08 E2 14 FD 00 40 50 7D 29 E9 D6 55 6B 18 38 7C 0B FC AE FD 80 40 28 7C 00 E9 D6 55 29 18 38 7D 69 FC AE FC 00 40 2A 54 00 18 38 7D 3F 04 AE FD AB 48 28 FD 6B 48 2A FD 26 03 32 FD 46 03 72 7D 69 FD AE 7C 1F 05 AE FD A7 4B 78 FD 87 53 3A 7D AA FD AE 7D 8B FD AE 42 00 FF 84
-
-. 0 1000E2B0 12
-. 38 C6 00 01 7F 85 30 40 41 9D FF 40
-
-. 0 1000E2DC 56
-. 7C 0A 2A 14 7D 2B E9 D6 7D 4A E2 14 7D 6B E2 14 7C 00 E9 D6 55 29 18 38 54 00 18 38 7C 1F 04 AE FC 00 00 2A 7C 1F 05 AE 7C 09 FC AE FC 00 03 72 7C 09 FD AE 42 00 FF CC
-
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 8, stride = 1
-PASS: fft_complex_bitreverse_order, n = 8
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 8, stride = 2
-PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 8, stride = 2
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 8, stride = 2
-PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 8, stride = 2
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 8, stride = 2
-PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 8, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 8, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 8, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 8, stride = 2
-PASS: fft_real_bitreverse_order, n = 8
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 8, stride = 2
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 8, stride = 2
-PASS: fft_complex_bitreverse_order, n = 8
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 8, stride = 3
-PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 8, stride = 3
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 8, stride = 3
-PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 8, stride = 3
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 8, stride = 3
-PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 8, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 8, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 8, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 8, stride = 3
-PASS: fft_real_bitreverse_order, n = 8
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 8, stride = 3
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 8, stride = 3
-. 0 FEC184C 36
-. 7C C3 50 16 54 C0 E8 FE 1C A0 00 0A 2C 00 00 00 7D 25 18 50 7C 03 03 78 7D 69 40 AE 9D 64 FF FF 40 82 FF E0
-
-PASS: fft_complex_bitreverse_order, n = 16
-. 0 FE0E3C8 176
-. 81 1E 0E 80 81 7E 0F C8 CB A8 00 00 81 5E 0F CC FC 7D 00 2A C9 AB 00 00 C8 8A 00 00 80 9E 0F D8 FD 83 E8 28 D8 61 00 30 80 E1 00 30 81 01 00 34 81 3E 0F D4 FD 80 60 28 80 FE 0F D0 CB C4 00 00 55 00 28 34 C9 07 00 00 FD 4C 03 32 C8 E9 00 00 80 7E 0E 7C 7F E0 1A 14 FD 2A 23 7A FC 2A 3A 3A C8 FF 00 08 FD 69 F2 BA 7D 23 04 AE CB DF 00 18 FC 6C 02 B2 FF AB 02 B2 FC 03 28 7A C8 3F 00 10 FC 8C E9 7A CB A6 00 00 FD 40 60 2A FD A9 01 32 FD 0A 3F BA FD 68 68 28 FC 81 5A BA FC 29 20 2A FC 69 08 28 FD 44 18 2A FF 8A E8 00 40 9D 02 08
-
-. 0 FE0EA98 24
-. 80 DE 0F F8 C8 C6 00 00 FC 0A 19 BA FC 61 00 2A FF 83 08 00 41 9E F9 EC
-
-. 0 FE0D418 32
-. 83 7E 0F 80 C8 7B 00 00 FC 0A 20 FA FC 8D 00 2A 57 E0 F8 7F FC 20 68 90 FF 04 68 00 41 9A 03 90
-
-. 0 FE0E9E8 176
-. 80 7E 0E 80 83 FE 0F C8 CB A3 00 00 83 BE 0F CC FD 3D 00 2A C9 1F 00 00 C8 FD 00 00 81 7E 0F D8 FD 89 E8 28 D9 21 00 30 80 E1 00 30 81 01 00 34 81 9E 0F D0 FD 80 60 28 55 00 28 34 81 1E 0F D4 C8 0B 00 00 FF CC 03 32 C8 2C 00 00 C9 48 00 00 81 5E 0E 7C FC BE 3A 3A 7C E0 52 14 FD 7E 50 7A C8 27 00 18 C9 47 00 08 FD A5 07 BA 7C AA 04 AE FD 2C 07 B2 FF AD 07 B2 FC E9 32 FA C9 27 00 10 FD 0C E9 BA CB A6 00 00 FC 07 60 2A FC C5 02 32 FF C0 50 7A FD 7E 30 28 FD A9 58 3A FC 25 68 2A FD 85 08 28 FD 4D 60 2A FF 0A E8 00 40 99 02 E8
-
-. 0 FE0DA40 24
-. 83 1E 0F B4 C8 D8 00 00 FC 0A 21 BA FC 8D 00 2A FF 84 68 00 40 9E 00 58
-
-. 0 FE0C910 108
-. FC E1 00 72 83 1E 0E 70 81 5E 0E 6C CB 98 00 00 CB AA 00 00 81 1E 0E 68 FD 47 00 72 80 FE 0E 64 FF 5C E9 FA CB 68 00 00 C9 27 00 00 81 7E 0E 60 81 3E 0F 54 FC DA D9 FA C8 AB 00 00 C9 A9 00 00 FD 06 49 FA FC C8 01 F2 FC 26 28 2A FD 81 02 B2 FD 7F 60 2A FC 9F 58 28 FC 20 58 90 FC 64 60 2A FC 43 5B 7A FC 82 58 00 41 86 00 E0
-
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 16, stride = 1
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 16, stride = 1
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 16, stride = 1
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 16, stride = 1
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 16, stride = 1
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 16, stride = 1
-PASS: fft_real_bitreverse_order, n = 16
-. 0 1001272C 144
-. 7D 48 E9 D6 7C 07 DA 14 7D 60 32 14 7C 06 00 50 7D 27 32 14 7D 6B E9 D6 55 4A 18 38 7D 4A FC AE 7C E7 E2 14 7D 08 E2 14 FD 66 02 B2 7C 00 E9 D6 55 6B 18 38 7C 0B FC AE FD 45 02 B2 FC E5 00 32 7D 29 E9 D6 54 00 18 38 7D 1F 04 AE FC 06 00 32 FD A8 58 28 55 29 18 38 FD 6B 40 2A 7D 29 FC AE FD AD 38 28 FD 89 00 28 FC 00 48 2A FD 6B 38 2A FD 8C 50 2A FC 00 50 28 FD A0 68 50 7C 09 FD AE 7D 6A FD AE 7D 9F 05 AE 7D AB FD AE 42 00 FF 74
-
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 16, stride = 1
-. 0 1000E230 128
-. 7C 07 DA 14 7D 27 32 14 7D 40 32 14 7C 06 00 50 7D 4A E9 D6 7C E7 E2 14 7D 68 E9 D6 55 4A 18 38 7D 0A FC AE 7D 08 E2 14 FD 00 40 50 7D 29 E9 D6 55 6B 18 38 7C 0B FC AE FD 80 40 28 7C 00 E9 D6 55 29 18 38 7D 69 FC AE FC 00 40 2A 54 00 18 38 7D 3F 04 AE FD AB 48 28 FD 6B 48 2A FD 26 03 32 FD 46 03 72 7D 69 FD AE 7C 1F 05 AE FD A7 4B 78 FD 87 53 3A 7D AA FD AE 7D 8B FD AE 42 00 FF 84
-
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 16, stride = 1
-. 0 FEEF788 16
-. 57 3A D1 BE 2B 1A 00 20 3B 1A 00 38 41 99 01 8C
-
-. 0 FEEF798 8
-. 71 40 00 01 41 82 01 CC
-
-. 0 FEEF97C 24
-. 57 15 18 38 7F F5 E2 14 39 3F 00 30 83 A9 00 0C 7F 9D 48 00 41 9E 00 14
-
-PASS: fft_complex_bitreverse_order, n = 16
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 16, stride = 2
-PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 16, stride = 2
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 16, stride = 2
-PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 16, stride = 2
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 16, stride = 2
-PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 16, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 16, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 16, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 16, stride = 2
-PASS: fft_real_bitreverse_order, n = 16
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 16, stride = 2
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 16, stride = 2
-PASS: fft_complex_bitreverse_order, n = 16
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 16, stride = 3
-PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 16, stride = 3
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 16, stride = 3
-PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 16, stride = 3
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 16, stride = 3
-PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 16, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 16, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 16, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 16, stride = 3
-PASS: fft_real_bitreverse_order, n = 16
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 16, stride = 3
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 16, stride = 3
-PASS: fft_complex_bitreverse_order, n = 32
-. 0 FE0E478 32
-. 81 9E 0F F8 80 DE 0F F0 C8 0C 00 00 C8 A6 00 00 FD 4A 28 3A FF C1 50 2A FF 1E 08 00 40 9A 05 20
-
-. 0 FE0DAAC 20
-. CB BD 00 00 FF 80 10 90 FC A0 F0 90 FF 9E E8 00 41 9D 00 08
-
-. 0 FE0DAC0 36
-. FC A0 F0 50 C9 4B 00 00 FC 6A 28 2A FD 03 50 28 D8 61 00 30 81 21 00 30 81 41 00 34 FC 25 40 28 41 9D 00 08
-
-. 0 FE0DAE4 192
-. FF 80 10 50 FC A1 00 72 C8 06 00 00 C8 87 00 00 55 40 28 34 83 FE 0F 84 7C C0 42 14 C8 66 00 10 FF 65 01 3A C9 5F 00 00 C9 06 00 18 FC 41 01 72 C8 E6 00 08 C9 85 00 00 FD A3 50 2A CB 44 00 00 FD 21 50 2A C8 03 00 00 FC C2 06 F2 FC 4D 50 28 FF 65 D3 3A FD 66 3A 3A FC 83 10 28 FD 29 50 28 FC E3 59 BA 7C C8 04 AE FF 44 40 2A FD 61 48 28 FD 9B 01 7A FD 1A 38 7A FD 46 00 72 FD 22 02 72 FC 6B E0 2A FF 6C 01 72 FC 02 40 FA FC 8A 07 32 FC E9 30 2A FF 46 06 F2 FD 60 20 28 FC 26 38 28 FD AB D0 28 FD 81 48 2A FC AD 60 2A FC 27 28 2A FC 47 08 28 FC 85 10 2A FC 84 E8 00 40 85 02 14
-
-. 0 FE0DDB4 20
-. 80 7E 0F 88 FC 1F E8 00 C9 03 00 00 FC 84 02 32 40 81 00 F0
-
-. 0 FE0DEB4 8
-. 81 3E 0F B8 4B FF FF 14
-
-. 0 FE0DDCC 16
-. C9 69 00 00 FC 7F 02 F2 FC 04 18 28 4B FF FD EC
-
-. 0 FE0DBC4 12
-. FC C1 00 2A FE 06 08 00 41 B2 F5 78
-
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 32, stride = 1
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 32, stride = 1
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 32, stride = 1
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 32, stride = 1
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 32, stride = 1
-. 0 FE0DAC4 32
-. C9 4B 00 00 FC 6A 28 2A FD 03 50 28 D8 61 00 30 81 21 00 30 81 41 00 34 FC 25 40 28 41 9D 00 08
-
-. 0 FE0DAE8 188
-. FC A1 00 72 C8 06 00 00 C8 87 00 00 55 40 28 34 83 FE 0F 84 7C C0 42 14 C8 66 00 10 FF 65 01 3A C9 5F 00 00 C9 06 00 18 FC 41 01 72 C8 E6 00 08 C9 85 00 00 FD A3 50 2A CB 44 00 00 FD 21 50 2A C8 03 00 00 FC C2 06 F2 FC 4D 50 28 FF 65 D3 3A FD 66 3A 3A FC 83 10 28 FD 29 50 28 FC E3 59 BA 7C C8 04 AE FF 44 40 2A FD 61 48 28 FD 9B 01 7A FD 1A 38 7A FD 46 00 72 FD 22 02 72 FC 6B E0 2A FF 6C 01 72 FC 02 40 FA FC 8A 07 32 FC E9 30 2A FF 46 06 F2 FD 60 20 28 FC 26 38 28 FD AB D0 28 FD 81 48 2A FC AD 60 2A FC 27 28 2A FC 47 08 28 FC 85 10 2A FC 84 E8 00 40 85 02 14
-
-. 0 FE0DDC8 20
-. 81 3E 0F 9C C9 69 00 00 FC 7F 02 F2 FC 04 18 28 4B FF FD EC
-
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 32, stride = 1
-PASS: fft_real_bitreverse_order, n = 32
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 32, stride = 1
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 32, stride = 1
-PASS: fft_complex_bitreverse_order, n = 32
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 32, stride = 2
-PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 32, stride = 2
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 32, stride = 2
-PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 32, stride = 2
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 32, stride = 2
-PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 32, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 32, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 32, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 32, stride = 2
-PASS: fft_real_bitreverse_order, n = 32
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 32, stride = 2
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 32, stride = 2
-PASS: fft_complex_bitreverse_order, n = 32
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 32, stride = 3
-PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 32, stride = 3
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 32, stride = 3
-PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 32, stride = 3
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 32, stride = 3
-PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 32, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 32, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 32, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 32, stride = 3
-PASS: fft_real_bitreverse_order, n = 32
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 32, stride = 3
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 32, stride = 3
-PASS: fft_complex_bitreverse_order, n = 64
-. 0 FE0D5C0 16
-. C9 9F 00 00 FD A0 F8 90 FC 9F 60 00 41 85 00 08
-
-. 0 FE0D5D0 24
-. FD A0 F8 50 CB DC 00 00 FC FE 68 28 FF 07 60 00 4F 59 D3 82 41 9A 01 EC
-
-. 0 FE0D7D0 36
-. C8 CA 00 00 C9 5D 00 00 FD 86 38 2A FC AC 30 28 D9 81 00 30 81 41 00 30 81 61 00 34 FC 47 28 28 4B FF FE 20
-
-. 0 FE0D610 200
-. FD 22 00 B2 C8 E5 00 00 CB C6 00 00 55 6B 28 34 CB 87 00 00 7C AB 42 14 80 FE 0F 84 FF A9 3F BA C8 83 00 00 CB 47 00 00 C8 C4 00 00 FF 62 D0 2A C8 65 00 08 FD 7D E2 7A 7F AB 44 AE 80 7E 0F 88 FD 9D D0 2A FD 1B D0 28 FC 2B 02 72 C9 65 00 18 FF CC D0 28 FC 02 40 28 FD A2 0A BA C8 25 00 10 FC E0 50 2A FC BD F0 28 FF 81 03 72 FF 69 21 BA FF 42 02 72 FC 9E 02 32 FD 45 18 2A FD 9E 01 F2 FC 0B E0 28 FD 3A 06 F2 CB 43 00 00 FC 6A 00 B2 FF 81 20 28 FD A0 60 28 FC BD 02 72 FF C1 E0 28 FC CD 18 28 FC FE 20 28 FC 46 28 28 FF 62 38 2A FC 3C D8 2A FD 7C 08 28 FF BB 58 2A FD 5D 0E BA FE 0A 08 00 41 92 00 68
-
-. 0 FE0D73C 12
-. C8 1F 00 00 FF 9F 00 00 41 BD F3 14
-
-. 0 FE0D748 4
-. 4B FF FA 08
-
-. 0 FE0E9B4 12
-. FC 20 30 90 FC 60 F8 90 4B FF D4 79
-
-. 0 FE0BE34 12
-. 94 21 FF B0 7C 08 02 A6 48 06 72 75
-
-. 0 FE0BE40 56
-. 93 C1 00 30 7F C8 02 A6 93 E1 00 34 DB C1 00 40 FF C0 08 90 DB A1 00 38 FF A0 18 90 83 FE 0E B8 DB E1 00 48 FC A0 F0 90 C8 3F 00 00 90 01 00 54 FF 9E 08 00 41 9D 00 08
-
-. 0 FE0BE78 40
-. FC A0 F0 50 81 3E 0E 80 C8 69 00 00 FD A3 28 2A FC 0D 18 28 D9 A1 00 20 80 E1 00 20 81 01 00 24 FC 65 00 28 41 9D 00 08
-
-. 0 FE0BEA0 216
-. FC 40 10 50 FC A3 00 F2 81 3E 0E BC 81 9E 0E C0 55 04 28 34 CB E9 00 00 C9 AC 00 00 81 5E 0E 7C FC E3 01 72 80 FE 0E C4 FC 85 6F FA 7C C4 52 14 C9 47 00 00 CB E6 00 10 C9 86 00 08 FD 23 50 2A FD 07 01 32 C8 86 00 18 80 BE 0E C8 FD 7F 50 2A 81 7E 0E CC C8 C5 00 00 FD 29 50 28 FD A8 61 3A C8 0B 00 00 80 7E 0E D0 FD 6B 50 28 FD 85 01 BA C8 03 00 00 FC FF 58 28 FC DF 6A 3A 7D A4 54 AE FD 47 20 2A FD 03 48 28 FF EC 01 7A FC EA 30 FA FC 8D 00 F2 FD 2B 02 72 FC C8 10 2A FC 7F 01 72 FC 0B 39 BA FD 44 00 B2 FC A9 68 2A FD 8D 00 F2 FD 0D 28 28 FF E0 50 28 FC E8 48 2A FC DF 60 28 FD 66 38 2A FD A5 58 2A FC 85 68 28 FC AB 20 2A FF 85 08 00 40 9D 00 68
-
-. 0 FE0BF78 20
-. FC 1D 08 00 81 1E 0E D4 C8 28 00 00 FC A5 00 72 40 81 00 D8
-
-. 0 FE0C060 16
-. 81 3E 0E DC C8 69 00 00 FC 1D 28 FA 4B FF FF 2C
-
-. 0 FE0BF98 12
-. FC AD 00 2A FF 05 68 00 40 9A 00 6C
-
-. 0 FE0BFA4 16
-. CB BF 00 00 FC 20 68 90 FC 1E E8 00 41 81 00 08
-
-. 0 FE0BFB4 40
-. FC 20 68 50 83 E1 00 54 83 C1 00 30 7F E8 03 A6 CB A1 00 38 83 E1 00 34 CB C1 00 40 CB E1 00 48 38 21 00 50 4E 80 00 20
-
-. 0 FE0E9C0 4
-. 4B FF F7 CC
-
-. 0 FE0EAB0 16
-. FC 20 10 90 FC 60 F8 90 FC 40 20 90 4B FF D3 79
-
-. 0 FE0BFDC 20
-. 80 7E 0E D4 FC 9D 08 00 C9 03 00 00 FC A5 02 32 41 85 00 6C
-
-. 0 FE0BFF0 28
-. 81 3E 0E DC C9 49 00 00 FD 3D 02 B2 FC 05 48 28 FC AD 00 2A FF 05 68 00 41 BA FF 9C
-
-. 0 FE0EAC0 4
-. 4B FF F6 CC
-
-. 0 FE0ED6C 16
-. 81 3E 0F DC C8 E9 00 00 FC 0D 19 F8 4B FF FC 1C
-
-. 0 FE0E994 12
-. FC 61 00 2A FC 03 08 00 41 82 F7 F0
-
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 64, stride = 1
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 64, stride = 1
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 64, stride = 1
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 64, stride = 1
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 64, stride = 1
-. 0 FE0D5D4 20
-. CB DC 00 00 FC FE 68 28 FF 07 60 00 4F 59 D3 82 41 9A 01 EC
-
-. 0 FE0BF8C 24
-. 81 3E 0E D8 C8 69 00 00 FC 1D 28 FA FC AD 00 2A FF 05 68 00 40 9A 00 6C
-
-. 0 FE0C058 8
-. 81 3E 0E D8 4B FF FF 98
-
-. 0 FE0BFF4 24
-. C9 49 00 00 FD 3D 02 B2 FC 05 48 28 FC AD 00 2A FF 05 68 00 41 BA FF 9C
-
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 64, stride = 1
-PASS: fft_real_bitreverse_order, n = 64
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 64, stride = 1
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 64, stride = 1
-PASS: fft_complex_bitreverse_order, n = 64
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 64, stride = 2
-PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 64, stride = 2
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 64, stride = 2
-PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 64, stride = 2
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 64, stride = 2
-PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 64, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 64, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 64, stride = 2
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 64, stride = 2
-PASS: fft_real_bitreverse_order, n = 64
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 64, stride = 2
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 64, stride = 2
-. 0 FEEF920 16
-. 57 3B BA 7E 28 1B 00 14 3B 1B 00 5B 40 A1 FE 6C
-
-PASS: fft_complex_bitreverse_order, n = 64
-PASS: gsl_fft_complex_radix2_forward with signal_noise, n = 64, stride = 3
-PASS: gsl_fft_complex_radix2_forward avoids unstrided data, n = 64, stride = 3
-PASS: gsl_fft_complex_radix2_inverse with signal_noise, n = 64, stride = 3
-PASS: gsl_fft_complex_radix2_inverse other data untouched, n = 64, stride = 3
-PASS: gsl_fft_complex_radix2_backward with signal_noise, n = 64, stride = 3
-PASS: gsl_fft_complex_radix2_backward avoids unstrided data, n = 64, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_pulse, n = 64, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_constant, n = 64, stride = 3
-PASS: gsl_fft_complex_radix2_forward with signal_exp, n = 64, stride = 3
-PASS: fft_real_bitreverse_order, n = 64
-PASS: gsl_fft_real_radix2 with signal_real_noise, n = 64, stride = 3
-PASS: gsl_fft_halfcomplex_radix2 with data from signal_noise, n = 64, stride = 3
-. 0 100046EC 12
-. 7F 9F E3 78 7F 9F F0 40 41 9D 00 50
-
-. 0 100046F8 16
-. 3B A0 00 01 7F A3 EB 78 7F E4 FB 78 4B FF C5 E1
-
-. 0 10000CE4 108
-. 94 21 FF B0 7C 08 02 A6 93 81 00 38 7F 84 19 D6 93 A1 00 3C 93 41 00 30 7C 7A 1B 78 93 E1 00 44 3B E0 00 00 7D 80 00 26 57 9D 20 36 7F A3 EB 78 90 01 00 54 91 81 00 10 57 9C 08 3C 92 E1 00 24 93 01 00 28 93 21 00 2C 93 61 00 34 93 C1 00 40 7C 9E 23 78 DB E1 00 48 92 61 00 14 92 81 00 18 92 A1 00 1C 92 C1 00 20 48 02 81 E9
-
-. 0 10000D50 12
-. 7C 7B 1B 78 7F A3 EB 78 48 02 81 DD
-
-. 0 10000D5C 12
-. 7C 79 1B 78 7F A3 EB 78 48 02 81 D1
-
-. 0 10000D68 12
-. 7C 78 1B 78 7F A3 EB 78 48 02 81 C5
-
-. 0 10000D74 12
-. 2B 9C 00 00 7C 77 1B 78 40 9D 00 68
-
-. 0 10000D80 100
-. 3D 60 10 02 3D 20 10 02 C9 0B 81 00 3D 60 10 02 39 6B 80 F8 C8 E9 80 E8 7F 89 03 A6 3D 20 10 02 C9 4B 00 00 C9 29 81 08 3D 20 43 30 93 E1 00 0C 57 E0 18 38 91 21 00 08 3B FF 00 01 C8 01 00 08 FC 00 50 28 FD A0 48 2A 7C 1B 05 AE FD 80 38 2A FD 60 40 2A 7D B7 05 AE 7D 99 05 AE 7D 78 05 AE 42 00 FF CC
-
-. 0 10000DAC 56
-. 93 E1 00 0C 57 E0 18 38 91 21 00 08 3B FF 00 01 C8 01 00 08 FC 00 50 28 FD A0 48 2A 7C 1B 05 AE FD 80 38 2A FD 60 40 2A 7D B7 05 AE 7D 99 05 AE 7D 78 05 AE 42 00 FF CC
-
-. 0 10000DE4 8
-. 38 60 00 00 48 01 46 0D
-
-. 0 10000DEC 8
-. 7F C3 F3 78 48 00 5A 51
-
-. 0 10006840 128
-. 94 21 FF 70 7C 08 02 A6 42 9F 00 05 93 C1 00 60 7F C8 02 A6 92 E1 00 44 7C 77 1B 79 90 01 00 94 DB 61 00 68 80 1E FF F0 DB 81 00 70 DB A1 00 78 7F C0 F2 14 DB C1 00 80 DB E1 00 88 91 C1 00 20 91 E1 00 24 92 01 00 28 92 21 00 2C 92 41 00 30 92 61 00 34 92 81 00 38 92 A1 00 3C 92 C1 00 40 93 01 00 48 93 21 00 4C 93 41 00 50 93 61 00 54 93 81 00 58 93 A1 00 5C 93 E1 00 64 41 82 01 DC
-
-. 0 100068C0 8
-. 38 60 02 0C 48 02 26 71
-
-. 0 100068C8 12
-. 7C 69 1B 79 91 21 00 14 41 82 02 44
-
-. 0 100068D4 8
-. 56 E3 20 36 48 02 26 5D
-
-. 0 100068DC 16
-. 81 21 00 14 2F 83 00 00 90 69 02 08 41 9E 02 48
-
-. 0 100068EC 24
-. 81 21 00 14 7E E3 BB 78 38 81 00 10 92 E9 00 00 38 A9 00 08 4B FF FE 69
-
-. 0 10006768 116
-. 94 21 FF C0 7C 08 02 A6 42 9F 00 05 93 C1 00 38 7F C8 02 A6 93 81 00 30 90 01 00 44 7C A6 2B 78 93 A1 00 34 7C 85 23 78 80 1E FF F0 38 81 00 10 7F C0 F2 14 81 3E 80 10 83 89 00 18 80 09 00 00 83 A9 00 14 81 69 00 04 81 49 00 08 81 09 00 0C 80 E9 00 10 90 01 00 10 93 A1 00 24 93 81 00 28 91 61 00 14 91 41 00 18 91 01 00 1C 90 E1 00 20 4B FF FC A1
-
-. 0 10006478 60
-. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 2F 83 00 00 90 01 00 14 38 E0 00 00 93 E1 00 0C 7C 68 1B 78 80 1E FF F0 7C BF 2B 78 38 A0 00 00 7F C0 F2 14 41 9E 01 7C
-
-. 0 100064B4 8
-. 2F 83 00 01 41 9E 01 4C
-
-. 0 10006604 40
-. 90 66 00 00 38 00 00 00 90 7F 00 00 7C 03 03 78 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
-
-. 0 100067DC 28
-. 80 01 00 44 83 81 00 30 83 A1 00 34 7C 08 03 A6 83 C1 00 38 38 21 00 40 4E 80 00 20
-
-. 0 10006904 8
-. 2F 83 00 00 40 9E 01 DC
-
-. 0 1000690C 68
-. 81 61 00 10 3C 00 43 30 81 21 00 14 3A A0 00 00 7F 95 58 40 39 C0 00 01 91 69 00 04 81 3E 80 20 90 01 00 08 92 E1 00 0C C9 89 00 00 C9 A1 00 08 81 3E 80 24 FD AD 60 28 C8 09 00 00 FF A0 68 24 40 9C 00 DC
-
-. 0 10006950 60
-. 81 21 00 14 FF 60 60 90 7D 6F 5B 78 3B 40 00 00 83 09 02 08 7D 30 4B 78 7F 1B C3 78 82 50 00 08 3A 60 00 01 7D D1 73 78 93 70 01 08 7D CE 91 D6 7F 93 90 40 7E D7 73 96 40 9C 00 8C
-
-. 0 10006A14 12
-. 35 EF FF FF 3A 10 00 04 40 82 FF 50
-
-. 0 10006A20 8
-. 7F 95 B8 40 41 9D 00 90
-
-. 0 10006A28 112
-. 80 61 00 14 80 01 00 94 81 C1 00 20 81 E1 00 24 7C 08 03 A6 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
-
-. 0 10000DF4 36
-. 3C 80 10 01 7F 46 D3 78 38 84 68 DC 7F C5 F3 78 7C 76 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 47 D5
-
-PASS: gsl_fft_complex_wavetable_alloc, n = 1, stride = 1
-. 0 10000E18 8
-. 7F C3 F3 78 48 00 5D 3D
-
-. 0 10006B58 60
-. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 A1 00 14 7C 7D 1B 79 90 01 00 24 93 E1 00 1C 38 60 00 08 80 1E FF F0 38 A0 00 7B 38 C0 00 01 7F C0 F2 14 41 82 00 5C
-
-. 0 10006B94 4
-. 48 02 23 A1
-
-. 0 10006B98 20
-. 38 A0 00 83 7C 7F 1B 79 38 C0 00 08 57 A3 20 36 41 82 00 74
-
-. 0 10006BAC 8
-. 93 BF 00 00 48 02 23 85
-
-. 0 10006BB4 24
-. 2F 83 00 00 7C 60 1B 78 90 1F 00 04 7F E3 FB 78 7F E0 FB 78 41 9E 00 68
-
-. 0 10006BCC 32
-. 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 10000E20 32
-. 3C 80 10 01 38 84 69 14 7F C5 F3 78 7C 7C 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 47 AD
-
-PASS: gsl_fft_complex_workspace_alloc, n = 1
-. 0 10000E40 20
-. 7F C3 F3 78 7F 44 D3 78 7F 65 DB 78 7F 06 C3 78 48 00 41 C9
-
-. 0 10000E54 8
-. 2F 9E 00 00 41 9E 00 30
-
-. 0 10000E5C 44
-. 7F C9 03 A6 38 00 00 00 57 4B 20 36 7D 20 DA 14 7C 1B 04 AE C9 A9 00 08 7D 20 CA 14 7C 19 05 AE 7C 00 5A 14 D9 A9 00 08 42 00 FF E4
-
-. 0 10000E88 24
-. 7F 63 DB 78 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 48 00 80 21
-
-. 0 10008EBC 20
-. 7C 08 02 A6 94 21 FF F0 39 00 FF FF 90 01 00 14 4B FF DF 0D
-
-. 0 10006DD8 232
-. 94 21 FD 80 7C 08 02 A6 42 9F 00 05 D9 C1 01 F0 D9 E1 01 F8 7D 80 00 26 DA 01 02 00 39 20 00 00 DA 21 02 08 DA 41 02 10 DA 61 02 18 DA 81 02 20 DA A1 02 28 DA C1 02 30 DA E1 02 38 DB 01 02 40 DB 21 02 48 DB 41 02 50 DB 61 02 58 DB 81 02 60 DB A1 02 68 DB C1 02 70 DB E1 02 78 91 C1 01 A8 91 E1 01 AC 92 01 01 B0 92 21 01 B4 92 41 01 B8 92 61 01 BC 92 81 01 C0 92 A1 01 C4 92 C1 01 C8 92 E1 01 CC 93 01 01 D0 93 21 01 D4 93 41 01 D8 93 61 01 DC 93 81 01 E0 93 C1 01 E8 7F C8 02 A6 90 01 02 84 81 67 00 04 80 1E FF F0 91 01 00 1C 39 00 00 01 7F C0 F2 14 7C A0 2B 79 93 A1 01 E4 93 E1 01 EC 91 81 01 A4 90 01 00 18 90 61 00 10 90 81 00 14 81 46 00 04 91 01 00 24 91 21 00 28 91 61 00 2C 41 82 0D 70
-
-. 0 10006EC0 16
-. 80 01 00 18 38 60 00 00 2F 80 00 01 41 9E 06 D8
-
-. 0 100075A4 168
-. 80 01 02 84 81 81 01 A4 81 C1 01 A8 7C 08 03 A6 81 E1 01 AC 7D 81 81 20 82 01 01 B0 82 21 01 B4 82 41 01 B8 82 61 01 BC 82 81 01 C0 82 A1 01 C4 82 C1 01 C8 82 E1 01 CC 83 01 01 D0 83 21 01 D4 83 41 01 D8 83 61 01 DC 83 81 01 E0 83 A1 01 E4 83 C1 01 E8 83 E1 01 EC C9 C1 01 F0 C9 E1 01 F8 CA 01 02 00 CA 21 02 08 CA 41 02 10 CA 61 02 18 CA 81 02 20 CA A1 02 28 CA C1 02 30 CA E1 02 38 CB 01 02 40 CB 21 02 48 CB 41 02 50 CB 61 02 58 CB 81 02 60 CB A1 02 68 CB C1 02 70 CB E1 02 78 38 21 02 80 4E 80 00 20
-
-. 0 10008ED0 16
-. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-. 0 10000EA0 8
-. 2F 9E 00 00 41 9E 00 30
-
-. 0 10000EA8 44
-. 7F C9 03 A6 38 00 00 00 57 4B 20 36 7D 20 DA 14 7C 1B 04 AE C9 A9 00 08 7D 20 BA 14 7C 17 05 AE 7C 00 5A 14 D9 A9 00 08 42 00 FF E4
-
-. 0 10000ED4 52
-. 3E 60 10 02 2A 1A 00 01 CB F3 81 10 3C A0 10 01 3C 60 10 01 38 A5 69 3C FC 20 F8 90 7F 04 C3 78 7F 66 DB 78 38 63 69 4C 7F 47 D3 78 7F C8 F3 78 4B FF F9 15
-
-. 0 10000F08 24
-. 3C 80 10 01 38 84 69 50 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 46 CD
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 1, stride = 1
-. 0 10000F20 4
-. 41 91 03 A8
-
-. 0 10000F24 24
-. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 7E 99
-
-. 0 10008DD0 64
-. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 01 00 24 39 00 00 01 7C 7F 1B 78 93 81 00 10 80 1E FF F0 7C 9C 23 78 93 A1 00 14 7C BD 2B 78 7F C0 F2 14 4B FF DF CD
-
-. 0 10008E10 8
-. 2C 03 00 00 40 82 00 64
-
-. 0 10008E18 48
-. 81 3E 80 74 3C 00 43 30 90 01 00 08 7F 83 E8 40 93 A1 00 0C C8 09 00 00 C9 A1 00 08 81 3E 80 78 FD AD 00 28 C8 09 00 00 FD 80 68 24 40 9C 00 34
-
-. 0 10008E48 48
-. 7F A9 03 A6 57 84 20 36 38 00 00 00 7C 1F 04 AE 7D 20 FA 14 FC 00 03 32 7C 1F 05 AE 7C 00 22 14 C9 A9 00 08 FD AD 03 32 D9 A9 00 08 42 00 FF E0
-
-. 0 10008E78 32
-. 80 01 00 24 83 81 00 10 83 A1 00 14 7C 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 10000F3C 40
-. FC 20 F8 90 3F E0 10 01 3C A0 10 01 38 A5 69 98 7F 24 CB 78 7F 66 DB 78 38 7F 69 90 7F 47 D3 78 7F C8 F3 78 4B FF F8 B9
-
-. 0 10000F64 24
-. 3C 80 10 01 38 84 69 A4 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 46 71
-
-PASS: gsl_fft_complex_inverse with signal_noise, n = 1, stride = 1
-. 0 10000F7C 4
-. 41 91 03 1C
-
-. 0 10000F80 24
-. 7E E3 BB 78 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 48 00 7F 05
-
-. 0 10008E98 20
-. 7C 08 02 A6 94 21 FF F0 39 00 00 01 90 01 00 14 4B FF DF 31
-
-. 0 10008EAC 16
-. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-. 0 10000F98 8
-. 2F 9E 00 00 41 9E 00 54
-
-. 0 10000FA0 80
-. 3C 00 43 30 3D 20 10 02 90 01 00 08 39 29 80 F8 93 C1 00 0C 7F C9 03 A6 C9 A1 00 08 38 00 00 00 C8 09 00 00 57 4B 20 36 FD 8D 00 28 7C 19 04 AE 7D 20 CA 14 FC 00 03 32 7C 19 05 AE 7C 00 5A 14 C9 A9 00 08 FD AD 03 32 D9 A9 00 08 42 00 FF E0
-
-. 0 10000FF0 40
-. CB F3 81 10 3C A0 10 01 38 A5 69 E4 7F 24 CB 78 FC 20 F8 90 7E E6 BB 78 7F 47 D3 78 7F C8 F3 78 38 7F 69 90 4B FF F8 05
-
-. 0 10001018 24
-. 3C 80 10 01 38 84 69 F4 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 45 BD
-
-PASS: gsl_fft_complex_backward with signal_noise, n = 1, stride = 1
-. 0 10001030 8
-. 2B 9A 00 01 41 9D 02 34
-
-. 0 10001038 52
-. 3D 20 10 02 3D 60 10 02 39 29 80 F0 39 6B 81 18 C8 49 00 00 7F C4 F3 78 C8 2B 00 00 7F 45 D3 78 7F 66 DB 78 7F 07 C3 78 38 60 00 01 3E A0 10 01 48 00 37 81
-
-. 0 1000106C 24
-. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 7E 3D
-
-. 0 10001084 40
-. FC 20 F8 90 3C A0 10 01 7F C8 F3 78 7F 47 D3 78 38 A5 6A 40 7F 04 C3 78 7F 66 DB 78 38 75 6A 34 3B A0 00 00 4B FF F7 71
-
-. 0 100010AC 24
-. 3C 80 10 01 38 84 6A 50 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 45 29
-
-PASS: gsl_fft_complex_forward with signal_pulse, n = 1, stride = 1
-. 0 100010C4 44
-. 3D 20 10 02 3D 60 10 02 39 29 80 F0 39 6B 81 18 C8 49 00 00 C8 2B 00 00 7F 44 D3 78 7F 65 DB 78 7F 06 C3 78 7F C3 F3 78 48 00 38 D5
-
-. 0 100010F0 24
-. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 7D B9
-
-. 0 10001108 36
-. FC 20 F8 90 3C A0 10 01 7F 04 C3 78 38 A5 6A 90 7F 66 DB 78 7F 47 D3 78 7F C8 F3 78 38 75 6A 34 4B FF F6 F1
-
-. 0 1000112C 24
-. 3C 80 10 01 38 84 6A A0 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 44 A9
-
-PASS: gsl_fft_complex_forward with signal_constant, n = 1, stride = 1
-. 0 10001144 12
-. 7F 9D F0 40 3B E0 00 00 40 9C 00 80
-
-. 0 10001150 52
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-
-. 0 10001184 24
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-. 0 1000119C 36
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-
-. 0 100011CC 28
-. 3C 80 10 01 7F C5 F3 78 7F 46 D3 78 38 84 6A F0 7F A3 EB 78 4C C6 31 82 48 01 44 05
-
-PASS: gsl_fft_complex_forward with signal_exp, n = 1, stride = 1
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-
-. 0 10006C50 32
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-. 0 10006CC8 24
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-. 0 10002C54 12
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-. 0 10002C60 12
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-. 0 100096E8 8
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-. 0 10009704 16
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-. 0 10009714 24
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-. 0 1000972C 8
-. 2F 83 00 00 40 9E 01 E4
-
-. 0 10009734 68
-. 81 61 00 10 3C 00 43 30 81 21 00 14 3A A0 00 00 7F 95 58 40 39 C0 00 01 91 69 00 04 81 3E 80 C4 90 01 00 08 92 E1 00 0C C9 89 00 00 C9 A1 00 08 81 3E 80 C8 FD AD 60 28 C8 09 00 00 FF A0 68 24 40 9C 00 E4
-
-. 0 10009778 60
-. 81 21 00 14 FF 60 60 90 7D 6F 5B 78 3B 40 00 00 83 09 02 08 7D 30 4B 78 7F 1B C3 78 82 50 00 08 3A 60 00 01 7D D1 73 78 93 70 01 08 7D CE 91 D6 7F 93 90 40 7E D7 73 96 40 9C 00 94
-
-. 0 10009844 12
-. 35 EF FF FF 3A 10 00 04 40 82 FF 48
-
-. 0 10009850 8
-. 7F 95 B8 40 41 9D 00 90
-
-. 0 10009858 112
-. 80 61 00 14 80 01 00 94 81 C1 00 20 81 E1 00 24 7C 08 03 A6 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
-
-. 0 10002CFC 36
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-
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 1, stride = 1
-. 0 10002D20 8
-. 7F C3 F3 78 48 00 6C 65
-
-. 0 10009988 60
-. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 A1 00 14 7C 7D 1B 79 90 01 00 24 93 E1 00 1C 38 60 00 08 80 1E FF F0 38 A0 00 7B 38 C0 00 01 7F C0 F2 14 41 82 00 5C
-
-. 0 100099C4 4
-. 48 01 F5 71
-
-. 0 100099C8 20
-. 38 A0 00 83 7C 7F 1B 79 38 C0 00 08 57 A3 18 38 41 82 00 74
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-. 0 100099DC 8
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-. 0 100099E4 24
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-
-. 0 100099FC 32
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-
-. 0 10002D28 32
-. 3C 80 10 01 38 84 74 F8 7F C5 F3 78 7C 7C 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 28 A5
-
-PASS: gsl_fft_complex_workspace_float_alloc, n = 1
-. 0 10002D48 20
-. 7F C3 F3 78 7F 44 D3 78 7F 65 DB 78 7F 06 C3 78 48 00 2C D1
-
-. 0 10005A28 64
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-
-. 0 10005A68 8
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-. 0 10005A70 16
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-. 0 10005A80 20
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-
-. 0 10005A94 16
-. 37 FF FF FF FC 20 08 18 D0 3D 00 04 40 82 FF DC
-
-. 0 10005AA4 20
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-
-. 0 1000613C 20
-. 7C 08 02 A6 94 21 FF F0 38 E0 FF FF 90 01 00 14 4B FF FD FD
-
-. 0 10005F48 208
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-. 0 10006018 40
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-
-. 0 10006040 44
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-
-. 0 1000606C 12
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-
-. 0 100060BC 28
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-
-. 0 100060D8 100
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-
-. 0 10002D90 24
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-. 0 10002DA8 8
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-. 0 10002780 84
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-
-. 0 100027D8 4
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-
-. 0 100027DC 12
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-. 0 100027E8 84
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-
-. 0 10002E10 24
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-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 1, stride = 1
-. 0 10002E28 4
-. 41 91 03 AC
-
-. 0 10002E2C 24
-. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 8E 4D
-
-. 0 1000BC8C 64
-. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 01 00 24 39 00 00 01 7C 7F 1B 78 93 81 00 10 80 1E FF F0 7C 9C 23 78 93 A1 00 14 7C BD 2B 78 7F C0 F2 14 4B FF DF 41
-
-. 0 1000BCCC 8
-. 2C 03 00 00 40 82 00 68
-
-. 0 1000BCD4 52
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-
-. 0 1000BD08 48
-. 7F A9 03 A6 57 84 18 38 38 00 00 00 7C 1F 04 2E 7D 20 FA 14 EC 00 03 32 7C 1F 05 2E 7C 00 22 14 C1 A9 00 04 ED AD 03 32 D1 A9 00 04 42 00 FF E0
-
-. 0 1000BD38 32
-. 80 01 00 24 83 81 00 10 83 A1 00 14 7C 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 10002E44 40
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-
-. 0 10002E6C 24
-. 3C 80 10 01 38 84 75 70 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 27 69
-
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 1, stride = 1
-. 0 10002E84 4
-. 41 91 03 20
-
-. 0 10002E88 24
-. 7E E3 BB 78 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 48 00 8E BD
-
-. 0 1000BD58 20
-. 7C 08 02 A6 94 21 FF F0 39 00 00 01 90 01 00 14 4B FF DE A1
-
-. 0 1000BD6C 16
-. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-. 0 10002EA0 8
-. 2F 9E 00 00 41 9E 00 58
-
-. 0 10002EA8 84
-. 3C 00 43 30 3D 20 10 02 90 01 00 08 39 29 80 F8 93 C1 00 0C 7F C9 03 A6 C9 A1 00 08 38 00 00 00 C8 09 00 00 57 4B 18 38 FD AD 00 28 FD 80 68 18 7C 19 04 2E 7D 20 CA 14 EC 00 03 32 7C 19 05 2E 7C 00 5A 14 C1 A9 00 04 ED AD 03 32 D1 A9 00 04 42 00 FF E0
-
-. 0 10002EFC 40
-. CB F3 81 10 3C A0 10 01 38 A5 69 E4 7F 24 CB 78 FC 20 F8 90 7E E6 BB 78 7F 47 D3 78 7F C8 F3 78 38 7F 69 90 4B FF F7 E5
-
-. 0 10002F24 24
-. 3C 80 10 01 38 84 75 B8 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 26 B1
-
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 1, stride = 1
-. 0 10002F3C 8
-. 2B 9A 00 01 41 9D 02 34
-
-. 0 10002F44 52
-. 3D 20 10 02 3D 60 10 02 39 29 81 28 39 6B 81 2C C0 49 00 00 7F C4 F3 78 C0 2B 00 00 7F 45 D3 78 7F 66 DB 78 7F 07 C3 78 38 60 00 01 3E A0 10 01 48 00 22 BD
-
-. 0 10005230 96
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-
-. 0 10005290 8
-. 2F 9E 00 00 41 9E 00 28
-
-. 0 10005298 36
-. 7F C9 03 A6 39 40 00 00 38 00 00 00 54 AB 18 38 7D 20 32 14 7D 46 01 2E 91 49 00 04 7C 00 5A 14 42 00 FF F0
-
-. 0 100052BC 40
-. 7C 1B F3 96 2F 9E 00 00 7C 00 F1 D6 7C 00 D8 50 7C 00 29 D6 54 00 18 38 7D 20 32 14 7F 86 05 2E D3 A9 00 04 41 9E 00 A4
-
-. 0 100052E4 104
-. 3F 00 43 30 3D 20 10 02 39 29 80 F8 93 C1 00 14 93 01 00 10 54 BA 18 38 CB 29 00 00 3D 20 10 02 C8 01 00 10 3B 80 00 00 CB 49 81 38 3B A0 00 00 FF 60 C8 28 7F DF F3 78 7C 1D F3 96 93 01 00 08 7C 00 F1 D6 7C 00 E8 50 7F BD DA 14 90 01 00 0C CB E1 00 08 FF FF C8 28 FF FF 06 B2 FF FF D8 24 FC 20 F8 90 48 02 3B AD
-
-. 0 1000534C 12
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-
-. 0 10005358 44
-. 37 FF FF FF FC 20 08 18 7D 3C CA 14 EC 01 07 32 EC 21 07 72 EC 1E 07 7A EF DE 0F 38 7F DC CD 2E 7F 9C D2 14 D0 09 00 04 40 82 FF 9C
-
-. 0 10005384 80
-. 38 60 00 00 80 01 00 74 83 01 00 18 83 21 00 1C 7C 08 03 A6 83 41 00 20 83 61 00 24 83 81 00 28 83 A1 00 2C 83 C1 00 30 83 E1 00 34 CB 21 00 38 CB 41 00 40 CB 61 00 48 CB 81 00 50 CB A1 00 58 CB C1 00 60 CB E1 00 68 38 21 00 70 4E 80 00 20
-
-. 0 10002F78 24
-. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 8D F1
-
-. 0 10002F90 40
-. FC 20 F8 90 3C A0 10 01 7F C8 F3 78 7F 47 D3 78 38 A5 6A 40 7F 04 C3 78 7F 66 DB 78 38 75 6A 34 3B A0 00 00 4B FF F7 51
-
-. 0 10002FB8 24
-. 3C 80 10 01 38 84 76 00 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 26 1D
-
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 1, stride = 1
-. 0 10002FD0 44
-. 3D 20 10 02 3D 60 10 02 39 29 81 28 39 6B 81 2C C0 49 00 00 C0 2B 00 00 7F 44 D3 78 7F 65 DB 78 7F 06 C3 78 7F C3 F3 78 48 00 24 01
-
-. 0 100053F8 20
-. 2C 03 00 00 7C 08 02 A6 94 21 FF F0 90 01 00 14 41 82 00 A0
-
-. 0 1000540C 8
-. 2F 83 00 00 41 9E 00 24
-
-. 0 10005414 32
-. 7C 69 03 A6 38 00 00 00 54 8B 18 38 7D 20 2A 14 7C 25 05 2E D0 49 00 04 7C 00 5A 14 42 00 FF F0
-
-. 0 10005434 8
-. 2F 83 00 00 41 9E 00 28
-
-. 0 1000543C 36
-. 7C 69 03 A6 54 84 18 38 39 60 00 00 38 00 00 00 7D 20 32 14 7D 66 01 2E 91 69 00 04 7C 00 22 14 42 00 FF F0
-
-. 0 10005460 72
-. 3C 00 43 30 3D 20 10 02 90 61 00 0C 39 29 80 F8 90 01 00 08 38 60 00 00 C8 01 00 08 C9 A9 00 00 80 01 00 14 38 21 00 10 FC 00 68 28 7C 08 03 A6 FC 00 00 18 ED A0 00 B2 EC 00 00 72 D1 A6 00 04 D0 06 00 00 4E 80 00 20
-
-. 0 10002FFC 24
-. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 8D 6D
-
-. 0 10003014 36
-. FC 20 F8 90 3C A0 10 01 7F 04 C3 78 38 A5 6A 90 7F 66 DB 78 7F 47 D3 78 7F C8 F3 78 38 75 6A 34 4B FF F6 D1
-
-. 0 10003038 24
-. 3C 80 10 01 38 84 76 48 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 25 9D
-
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 1, stride = 1
-. 0 10003050 12
-. 7F 9D F0 40 3B E0 00 00 40 9C 00 80
-
-. 0 1000305C 52
-. 3E 80 10 01 3D 20 10 02 3D 60 10 02 39 29 81 2C 39 6B 81 28 C0 29 00 00 7F E3 FB 78 C0 4B 00 00 7F C4 F3 78 7F 45 D3 78 7F 66 DB 78 7F 07 C3 78 48 00 24 4D
-
-. 0 100054D8 112
-. 94 21 FF 80 7C 08 02 A6 93 C1 00 40 7C 9E 23 79 DB 61 00 58 FF 60 08 90 DB 81 00 60 FF 80 10 90 92 E1 00 24 7C B7 2B 78 93 21 00 2C 7C D9 33 78 93 41 00 30 7C 7A 1B 78 93 61 00 34 7C FB 3B 78 DB 21 00 48 DB 41 00 50 DB A1 00 68 DB C1 00 70 DB E1 00 78 92 C1 00 20 93 01 00 28 93 81 00 38 93 A1 00 3C 93 E1 00 44 90 01 00 84 41 82 01 84
-
-. 0 10005548 8
-. 2F 9E 00 00 41 9E 00 A4
-
-. 0 10005550 104
-. 3E C0 43 30 3D 20 10 02 39 29 80 F8 93 C1 00 14 92 C1 00 10 3B 80 00 00 CB 29 00 00 3D 20 10 02 C8 01 00 10 3B A0 00 00 CB 49 81 40 54 B8 18 38 FF A0 C8 28 7F DF F3 78 7C 1D F3 96 92 C1 00 08 7C 00 F1 D6 7C 00 E8 50 7F BD D2 14 90 01 00 0C CB E1 00 08 FF FF C8 28 FF FF 06 B2 FF FF E8 24 FC 20 F8 90 48 02 39 41
-
-. 0 100055B8 12
-. FF C0 08 18 FC 20 F8 90 48 02 39 D5
-
-. 0 100055C4 44
-. 37 FF FF FF FC 20 08 18 7D 3C CA 14 EC 01 06 F2 EC 21 07 32 EC 1E 07 3A EF DE 0E F8 7F DC CD 2E 7F 9C C2 14 D0 09 00 04 40 82 FF 9C
-
-. 0 100055F0 8
-. 2F 9E 00 00 41 9E 00 28
-
-. 0 100055F8 36
-. 7F C9 03 A6 39 40 00 00 38 00 00 00 56 EB 18 38 7D 20 DA 14 7D 5B 01 2E 91 49 00 04 7C 00 5A 14 42 00 FF F0
-
-. 0 1000561C 8
-. 2F 9A 00 00 40 9D 00 CC
-
-. 0 100056EC 20
-. 7D 3A F0 50 7C 09 F3 96 7C 00 F1 D6 7C 60 48 50 4B FF FF 34
-
-. 0 10005630 152
-. 3C 00 43 30 3D 20 10 02 90 01 00 10 39 29 80 F8 93 C1 00 14 7C 17 19 D6 C9 A9 00 00 38 60 00 00 C8 01 00 10 FC 00 68 28 54 00 18 38 7D 20 DA 14 FC 00 00 18 ED A0 07 32 EC 00 06 F2 7C 1B 05 2E D1 A9 00 04 80 01 00 84 82 C1 00 20 82 E1 00 24 7C 08 03 A6 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB 21 00 48 CB 41 00 50 CB 61 00 58 CB 81 00 60 CB A1 00 68 CB C1 00 70 CB E1 00 78 38 21 00 80 4E 80 00 20
-
-. 0 10003090 24
-. 7F 44 D3 78 7F C5 F3 78 7E C6 B3 78 7F 87 E3 78 7F 63 DB 78 48 00 8C D9
-
-. 0 100030A8 36
-. C8 33 81 10 3B FF 00 01 38 75 6A 34 7F 04 C3 78 38 B4 6A E4 7F 66 DB 78 7F 47 D3 78 7F C8 F3 78 4B FF F6 3D
-
-. 0 100030CC 12
-. 7F 9F F0 40 7F BD 1B 78 41 9C FF 8C
-
-. 0 100030D8 28
-. 3C 80 10 01 7F C5 F3 78 7F 46 D3 78 38 84 76 90 7F A3 EB 78 4C C6 31 82 48 01 24 F9
-
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 1, stride = 1
-. 0 100030F4 8
-. 7E C3 B3 78 48 00 69 89
-
-. 0 10009A80 32
-. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 02 08 48 01 F4 E9
-
-. 0 10009AA0 16
-. 38 00 00 00 90 1D 02 08 7F A3 EB 78 48 01 F4 D9
-
-. 0 10009AB0 24
-. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
-
-. 0 100030FC 8
-. 7F 83 E3 78 48 00 69 C9
-
-. 0 10009AC8 32
-. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 00 04 48 01 F4 A1
-
-. 0 10009AE8 16
-. 38 00 00 00 90 1D 00 04 7F A3 EB 78 48 01 F4 91
-
-. 0 10009AF8 24
-. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
-
-. 0 10003104 8
-. 7F 63 DB 78 48 02 5E 7D
-
-. 0 1000310C 8
-. 7F 23 CB 78 48 02 5E 75
-
-. 0 10003114 8
-. 7F 03 C3 78 48 02 5E 6D
-
-. 0 1000311C 8
-. 7E E3 BB 78 48 02 5E 65
-
-. 0 10003124 80
-. 80 01 00 54 81 81 00 10 82 61 00 14 7C 08 03 A6 82 81 00 18 7D 80 81 20 82 A1 00 1C 82 C1 00 20 82 E1 00 24 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB E1 00 48 38 21 00 50 4E 80 00 20
-
-. 0 10004714 12
-. 7F A3 EB 78 7F E4 FB 78 4B FF D3 85
-
-. 0 10001AA0 76
-. 94 21 FF C0 7C 08 02 A6 93 41 00 28 7F 44 19 D6 93 81 00 30 7C 7C 1B 78 90 01 00 44 93 21 00 24 57 43 18 38 93 61 00 2C 93 A1 00 34 57 5D 20 36 93 C1 00 38 7C 9E 23 78 93 E1 00 3C 92 C1 00 18 92 E1 00 1C 93 01 00 20 48 02 74 4D
-
-. 0 10001AEC 12
-. 7C 7F 1B 78 7F A3 EB 78 48 02 74 41
-
-. 0 10001AF8 12
-. 7C 7B 1B 78 7F A3 EB 78 48 02 74 35
-
-. 0 FEEFC5C 20
-. 7F 9F CA 14 83 1C 00 04 63 16 00 01 92 DC 00 04 41 8E 00 10
-
-. 0 FEEFC7C 8
-. 39 1F 00 08 4B FF FA 30
-
-. 0 10001B04 12
-. 7C 79 1B 78 7F A3 EB 78 48 02 74 29
-
-. 0 FEEFA5C 24
-. 7C A5 30 78 7F 03 E2 14 39 6A 00 08 54 C6 08 3C 90 B8 04 38 4B FF FF 7C
-
-. 0 FEEF9EC 28
-. 21 26 00 00 7E A9 31 14 7D 26 28 10 7D 29 49 10 7D 29 00 D0 7D 2A AB 79 41 82 00 34
-
-. 0 10001B10 16
-. 2B 9A 00 00 7C 7D 1B 78 39 40 00 00 40 9D 00 38
-
-. 0 10001B20 52
-. 3D 60 10 02 7F 49 03 A6 39 6B 80 F8 3D 20 43 30 C9 AB 00 00 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 68 28 7C 1F 05 AE 42 00 FF E4
-
-. 0 10001B54 16
-. 57 40 08 3C 39 40 00 00 2B 80 00 00 40 9D 00 64
-
-. 0 10001B64 96
-. 3D 60 10 02 3D 20 10 02 C9 2B 81 00 3D 60 10 02 39 6B 80 F8 C9 09 80 E8 7C 09 03 A6 3D 20 10 02 C9 6B 00 00 C9 49 81 08 3D 20 43 30 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 58 28 FD A0 50 2A FD 80 40 2A FC 00 48 2A 7D BD 05 AE 7D 9B 05 AE 7C 19 05 AE 42 00 FF D0
-
-. 0 10001B90 52
-. 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 58 28 FD A0 50 2A FD 80 40 2A FC 00 48 2A 7D BD 05 AE 7D 9B 05 AE 7C 19 05 AE 42 00 FF D0
-
-. 0 10001BC4 8
-. 38 60 00 00 48 01 38 2D
-
-. 0 10001BCC 8
-. 7F C3 F3 78 48 00 ED 75
-
-. 0 10010944 136
-. 94 21 FF 70 7C 08 02 A6 42 9F 00 05 93 C1 00 60 7F C8 02 A6 7D 80 00 26 93 01 00 48 7C 78 1B 79 90 01 00 94 80 1E FF F0 DB 61 00 68 DB 81 00 70 7F C0 F2 14 DB A1 00 78 DB C1 00 80 DB E1 00 88 91 C1 00 20 91 E1 00 24 92 01 00 28 92 21 00 2C 92 41 00 30 92 61 00 34 92 81 00 38 92 A1 00 3C 92 C1 00 40 92 E1 00 44 93 21 00 4C 93 41 00 50 93 61 00 54 93 81 00 58 93 A1 00 5C 93 E1 00 64 91 81 00 1C 41 82 02 08
-
-. 0 100109CC 8
-. 38 60 02 0C 48 01 85 65
-
-. 0 100109D4 12
-. 7C 69 1B 79 91 21 00 14 41 82 02 6C
-
-. 0 100109E0 8
-. 2F 98 00 01 41 9E 01 DC
-
-. 0 10010BC0 16
-. 81 21 00 14 3A E0 00 00 92 E9 02 08 4B FF FE 34
-
-. 0 10010A00 24
-. 81 21 00 14 7F 03 C3 78 38 81 00 10 93 09 00 00 38 A9 00 08 4B FF 5C 6D
-
-. 0 10006680 92
-. 94 21 FF C0 7C 08 02 A6 42 9F 00 05 93 C1 00 38 7F C8 02 A6 7C A6 2B 78 90 01 00 44 7C 85 23 78 38 81 00 10 80 1E FF F0 7F C0 F2 14 81 3E 80 0C 80 09 00 00 80 E9 00 10 81 69 00 04 81 49 00 08 81 09 00 0C 90 01 00 10 91 61 00 14 91 41 00 18 91 01 00 1C 90 E1 00 20 4B FF FD A1
-
-. 0 100066DC 20
-. 80 01 00 44 83 C1 00 38 38 21 00 40 7C 08 03 A6 4E 80 00 20
-
-. 0 10010A18 8
-. 2F 83 00 00 40 9E 01 FC
-
-. 0 10010A20 68
-. 81 61 00 10 3C 00 43 30 81 21 00 14 3A C0 00 00 2B 8B 00 00 39 C0 00 01 91 69 00 04 81 3E 82 44 90 01 00 08 93 01 00 0C C9 89 00 00 C9 A1 00 08 81 3E 82 48 FD AD 60 28 C8 09 00 00 FF A0 68 24 40 9D 00 DC
-
-. 0 10010A64 60
-. 81 21 00 14 FF 60 60 90 7D 6F 5B 78 3B 20 00 00 82 E9 02 08 7D 31 4B 78 7E FA BB 78 82 71 00 08 3A 80 00 01 7D C9 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7E 58 73 96 40 9C 00 94
-
-. 0 10010B30 12
-. 35 EF FF FF 3A 31 00 04 40 82 FF 48
-
-. 0 10010B3C 16
-. 57 00 F8 7E 80 61 00 14 7F 80 B0 40 41 9C 00 A4
-
-. 0 10010B4C 116
-. 80 01 00 94 81 81 00 1C 81 C1 00 20 7C 08 03 A6 81 E1 00 24 7D 80 81 20 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
-
-. 0 10001BD4 36
-. 3C 80 10 01 7F 86 E3 78 38 84 6E EC 7F C5 F3 78 7C 76 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 39 F5
-
-PASS: gsl_fft_real_wavetable_alloc, n = 1, stride = 1
-. 0 10001BF8 8
-. 7F C3 F3 78 48 00 F0 91
-
-. 0 10010C8C 60
-. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 A1 00 14 7C 7D 1B 79 90 01 00 24 93 E1 00 1C 38 60 00 08 80 1E FF F0 38 A0 00 84 38 C0 00 01 7F C0 F2 14 41 82 00 5C
-
-. 0 10010CC8 4
-. 48 01 82 6D
-
-. 0 10010CCC 20
-. 38 A0 00 8C 7C 7F 1B 79 38 C0 00 08 57 A3 18 38 41 82 00 74
-
-. 0 10010CE0 8
-. 93 BF 00 00 48 01 82 51
-
-. 0 10010CE8 24
-. 2F 83 00 00 7C 60 1B 78 90 1F 00 04 7F E3 FB 78 7F E0 FB 78 41 9E 00 68
-
-. 0 10010D00 32
-. 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 10001C00 32
-. 3C 80 10 01 38 84 6F 20 7F C5 F3 78 7C 78 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 39 CD
-
-PASS: gsl_fft_real_workspace_alloc, n = 1
-. 0 10001C20 20
-. 7F 84 E3 78 7F 65 DB 78 7F A6 EB 78 7F C3 F3 78 48 00 34 E5
-
-. 0 10001C34 16
-. 7F 23 CB 78 7F 64 DB 78 57 45 20 36 48 02 73 35
-
-. 0 10001C44 8
-. 2F 9E 00 00 41 9E 00 24
-
-. 0 10001C4C 32
-. 7F C9 03 A6 39 60 00 00 55 60 20 36 55 69 18 38 7C 1B 04 AE 7D 6B E2 14 7C 09 FD AE 42 00 FF EC
-
-. 0 10001C6C 28
-. 7F 07 C3 78 7F 84 E3 78 7F C5 F3 78 7E C6 B3 78 7F E3 FB 78 3E E0 10 02 48 00 F1 95
-
-. 0 10010E18 216
-. 94 21 FE F0 7C 08 02 A6 42 9F 00 05 92 21 00 44 D9 C1 00 80 39 20 00 00 D9 E1 00 88 3A 20 00 01 DA 01 00 90 DA 21 00 98 DA 41 00 A0 DA 61 00 A8 DA 81 00 B0 DA A1 00 B8 DA C1 00 C0 DA E1 00 C8 DB 01 00 D0 DB 21 00 D8 DB 41 00 E0 DB 61 00 E8 DB 81 00 F0 DB A1 00 F8 DB C1 01 00 DB E1 01 08 91 C1 00 38 91 E1 00 3C 92 01 00 40 92 41 00 48 92 61 00 4C 92 81 00 50 92 A1 00 54 92 C1 00 58 92 E1 00 5C 93 01 00 60 93 21 00 64 93 41 00 68 93 61 00 6C 93 81 00 70 93 C1 00 78 7F C8 02 A6 90 01 01 14 81 07 00 04 80 1E FF F0 93 A1 00 74 7F C0 F2 14 7C A0 2B 79 93 E1 00 7C 90 01 00 18 90 61 00 10 90 81 00 14 81 46 00 04 91 01 00 20 91 21 00 24 41 82 16 40
-
-. 0 10010EF0 16
-. 80 01 00 18 38 60 00 00 2F 80 00 01 41 9E 09 2C
-
-. 0 10011828 160
-. 80 01 01 14 81 C1 00 38 81 E1 00 3C 7C 08 03 A6 82 01 00 40 82 21 00 44 82 41 00 48 82 61 00 4C 82 81 00 50 82 A1 00 54 82 C1 00 58 82 E1 00 5C 83 01 00 60 83 21 00 64 83 41 00 68 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C C9 C1 00 80 C9 E1 00 88 CA 01 00 90 CA 21 00 98 CA 41 00 A0 CA 61 00 A8 CA 81 00 B0 CA A1 00 B8 CA C1 00 C0 CA E1 00 C8 CB 01 00 D0 CB 21 00 D8 CB 41 00 E0 CB 61 00 E8 CB 81 00 F0 CB A1 00 F8 CB C1 01 00 CB E1 01 08 38 21 01 10 4E 80 00 20
-
-. 0 10001C88 20
-. 7F 64 DB 78 7F 85 E3 78 7F C6 F3 78 7F E3 FB 78 48 00 C8 05
-
-. 0 1000E49C 56
-. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 2C 06 00 00 90 01 00 24 93 E1 00 1C 7C 7F 1B 78 80 1E FF F0 7C A3 2B 78 93 A1 00 14 7F C0 F2 14 41 82 00 D4
-
-. 0 1000E4D4 40
-. 39 26 FF FF 83 BE 81 C8 2B 89 00 01 C8 1F 00 00 C9 BD 00 00 38 A0 00 01 D8 04 00 00 7D 28 4B 78 D9 A4 00 08 40 9D 00 58
-
-. 0 1000E550 8
-. 7F 88 28 00 41 9E 00 24
-
-. 0 1000E558 32
-. 80 01 00 24 38 60 00 00 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 10001C9C 40
-. C8 37 81 10 3C A0 10 01 3C 60 10 01 7F 87 E3 78 7F C8 F3 78 38 A5 69 3C 7F A4 EB 78 7F 66 DB 78 38 63 69 4C 4B FF EB 59
-
-. 0 10001CC4 24
-. 3C 80 10 01 38 84 6F 48 7F C5 F3 78 7F 86 E3 78 4C C6 31 82 48 01 39 11
-
-PASS: gsl_fft_real with signal_real_noise, n = 1, stride = 1
-. 0 10001CDC 8
-. 7F C3 F3 78 48 00 A8 61
-
-. 0 1000C540 136
-. 94 21 FF 70 7C 08 02 A6 42 9F 00 05 93 C1 00 60 7F C8 02 A6 7D 80 00 26 92 E1 00 44 7C 77 1B 79 90 01 00 94 80 1E FF F0 DB 61 00 68 DB 81 00 70 7F C0 F2 14 DB A1 00 78 DB C1 00 80 DB E1 00 88 91 C1 00 20 91 E1 00 24 92 01 00 28 92 21 00 2C 92 41 00 30 92 61 00 34 92 81 00 38 92 A1 00 3C 92 C1 00 40 93 01 00 48 93 21 00 4C 93 41 00 50 93 61 00 54 93 81 00 58 93 A1 00 5C 93 E1 00 64 91 81 00 1C 41 82 01 F0
-
-. 0 1000C5C8 8
-. 38 60 02 0C 48 01 C9 69
-
-. 0 1000C5D0 12
-. 7C 69 1B 79 91 21 00 14 41 82 02 54
-
-. 0 1000C5DC 8
-. 56 E3 20 36 48 01 C9 55
-
-. 0 1000C5E4 16
-. 81 21 00 14 2F 83 00 00 90 69 02 08 41 9E 02 58
-
-. 0 1000C5F4 24
-. 81 21 00 14 7E E3 BB 78 38 81 00 10 92 E9 00 00 38 A9 00 08 4B FF A0 ED
-
-. 0 100066F4 92
-. 94 21 FF C0 7C 08 02 A6 42 9F 00 05 93 C1 00 38 7F C8 02 A6 7C A6 2B 78 90 01 00 44 7C 85 23 78 38 81 00 10 80 1E FF F0 7F C0 F2 14 81 3E 80 0C 80 09 00 00 80 E9 00 10 81 69 00 04 81 49 00 08 81 09 00 0C 90 01 00 10 91 61 00 14 91 41 00 18 91 01 00 1C 90 E1 00 20 4B FF FD 2D
-
-. 0 10006750 20
-. 80 01 00 44 83 C1 00 38 38 21 00 40 7C 08 03 A6 4E 80 00 20
-
-. 0 1000C60C 8
-. 2F 83 00 00 40 9E 01 EC
-
-. 0 1000C614 68
-. 81 61 00 10 3C 00 43 30 81 21 00 14 3A C0 00 00 7F 96 58 40 39 C0 00 01 91 69 00 04 81 3E 81 54 90 01 00 08 92 E1 00 0C C9 89 00 00 C9 A1 00 08 81 3E 81 58 FD AD 60 28 C8 09 00 00 FF A0 68 24 40 9C 00 DC
-
-. 0 1000C658 60
-. 81 21 00 14 FF 60 60 90 7D 6F 5B 78 3B 20 00 00 83 09 02 08 7D 31 4B 78 7F 1A C3 78 82 71 00 08 3A 80 00 01 7D D2 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7D 37 73 96 40 9C 00 94
-
-. 0 1000C724 12
-. 35 EF FF FF 3A 31 00 04 40 82 FF 48
-
-. 0 1000C730 16
-. 56 E0 F8 7E 80 61 00 14 7F 80 B0 40 41 9C 00 94
-
-. 0 1000C740 116
-. 80 01 00 94 81 81 00 1C 81 C1 00 20 7C 08 03 A6 81 E1 00 24 7D 80 81 20 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
-
-. 0 10001CE4 36
-. 3C 80 10 01 7C 7A 1B 78 38 84 6F 84 20 03 00 00 7C 60 19 14 7F C5 F3 78 7F 86 E3 78 4C C6 31 82 48 01 38 E5
-
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 1, stride = 1
-. 0 10001D08 24
-. 7F E3 FB 78 7F 84 E3 78 7F C5 F3 78 7F 46 D3 78 7F 07 C3 78 48 00 AB 9D
-
-. 0 1000C8B8 200
-. 94 21 FE F0 7C 08 02 A6 42 9F 00 05 D9 C1 00 80 D9 E1 00 88 DA 01 00 90 DA 21 00 98 DA 41 00 A0 DA 61 00 A8 DA 81 00 B0 DA A1 00 B8 DA C1 00 C0 DA E1 00 C8 DB 01 00 D0 DB 21 00 D8 DB 41 00 E0 DB 61 00 E8 DB 81 00 F0 DB A1 00 F8 DB C1 01 00 DB E1 01 08 91 C1 00 38 91 E1 00 3C 92 01 00 40 92 21 00 44 92 41 00 48 92 61 00 4C 92 81 00 50 92 A1 00 54 92 C1 00 58 92 E1 00 5C 93 01 00 60 93 21 00 64 93 41 00 68 93 61 00 6C 93 81 00 70 93 C1 00 78 7F C8 02 A6 90 01 01 14 81 07 00 04 80 1E FF F0 93 A1 00 74 7F C0 F2 14 7C A0 2B 79 93 E1 00 7C 90 01 00 18 90 61 00 10 90 81 00 14 91 01 00 1C 41 82 10 58
-
-. 0 1000C980 16
-. 80 01 00 18 38 60 00 00 2F 80 00 01 41 9E 05 98
-
-. 0 1000CF24 160
-. 80 01 01 14 81 C1 00 38 81 E1 00 3C 7C 08 03 A6 82 01 00 40 82 21 00 44 82 41 00 48 82 61 00 4C 82 81 00 50 82 A1 00 54 82 C1 00 58 82 E1 00 5C 83 01 00 60 83 21 00 64 83 41 00 68 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C C9 C1 00 80 C9 E1 00 88 CA 01 00 90 CA 21 00 98 CA 41 00 A0 CA 61 00 A8 CA 81 00 B0 CA A1 00 B8 CA C1 00 C0 CA E1 00 C8 CB 01 00 D0 CB 21 00 D8 CB 41 00 E0 CB 61 00 E8 CB 81 00 F0 CB A1 00 F8 CB C1 01 00 CB E1 01 08 38 21 01 10 4E 80 00 20
-
-. 0 10001D20 8
-. 2F 9E 00 00 41 9E 00 44
-
-. 0 10001D28 64
-. 3C 00 43 30 3D 20 10 02 90 01 00 08 39 29 80 F8 93 C1 00 0C 7F C9 03 A6 C8 09 00 00 38 00 00 00 C9 A1 00 08 57 89 18 38 FD AD 00 28 7C 1F 04 AE FC 00 68 24 7C 1F 05 AE 7C 00 4A 14 42 00 FF F0
-
-. 0 10001D68 20
-. 7F 64 DB 78 7F 85 E3 78 7F C6 F3 78 7F E3 FB 78 48 01 0B 0D
-
-. 0 10001D7C 40
-. C8 37 81 10 3C A0 10 01 3C 60 10 01 7F 87 E3 78 7F C8 F3 78 7F 24 CB 78 7F 66 DB 78 38 A5 69 98 38 63 69 90 4B FF EA 79
-
-. 0 10001DA4 24
-. 3C 80 10 01 7F C5 F3 78 7F 86 E3 78 38 84 6F C0 4C C6 31 82 48 01 38 31
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 1, stride = 1
-. 0 10001DBC 8
-. 7F 03 C3 78 48 00 F0 0D
-
-. 0 10010DCC 32
-. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 00 04 48 01 81 9D
-
-. 0 10010DEC 16
-. 38 00 00 00 90 1D 00 04 7F A3 EB 78 48 01 81 8D
-
-. 0 10010DFC 24
-. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
-
-. 0 10001DC4 8
-. 7E C3 B3 78 48 00 EF BD
-
-. 0 10010D84 32
-. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 02 08 48 01 81 E5
-
-. 0 10010DA4 16
-. 38 00 00 00 90 1D 02 08 7F A3 EB 78 48 01 81 D5
-
-. 0 10010DB4 24
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-
-. 0 10001DCC 8
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-
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-
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-
-. 0 1000C89C 24
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-
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-
-. 0 10001DDC 8
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-
-. 0 10001DE4 8
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-
-. 0 10001DEC 8
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-
-. 0 10001DF4 56
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-
-. 0 10004720 16
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-
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-
-. 0 FEEF714 16
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-
-. 0 10003A10 12
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-
-. 0 10003A1C 12
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-
-. 0 10003A28 12
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-
-. 0 10003A34 16
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-
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-
-. 0 10003A7C 16
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-
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-
-. 0 10003AB8 64
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-
-. 0 10003AF8 8
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-
-. 0 10003B00 8
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-
-. 0 1001292C 136
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-
-. 0 100129B4 8
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-
-. 0 100129BC 12
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-
-. 0 100129C8 8
-. 2F 98 00 01 41 9E 01 E4
-
-. 0 10012BB0 16
-. 81 21 00 14 3A E0 00 00 92 E9 02 08 4B FF FE 2C
-
-. 0 100129E8 24
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-
-. 0 10012A00 8
-. 2F 83 00 00 40 9E 02 04
-
-. 0 10012A08 68
-. 81 61 00 10 3C 00 43 30 81 21 00 14 3A C0 00 00 2B 8B 00 00 39 C0 00 01 91 69 00 04 81 3E 82 A0 90 01 00 08 93 01 00 0C C9 89 00 00 C9 A1 00 08 81 3E 82 A4 FD AD 60 28 C8 09 00 00 FF A0 68 24 40 9D 00 E4
-
-. 0 10012A4C 60
-. 81 21 00 14 FF 60 60 90 7D 6F 5B 78 3B 20 00 00 82 E9 02 08 7D 31 4B 78 7E FA BB 78 82 71 00 08 3A 80 00 01 7D C9 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7E 58 73 96 40 9C 00 9C
-
-. 0 10012B20 12
-. 35 EF FF FF 3A 31 00 04 40 82 FF 40
-
-. 0 10012B2C 16
-. 57 00 F8 7E 80 61 00 14 7F 80 B0 40 41 9C 00 A4
-
-. 0 10012B3C 116
-. 80 01 00 94 81 81 00 1C 81 C1 00 20 7C 08 03 A6 81 E1 00 24 7D 80 81 20 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
-
-. 0 10003B08 36
-. 3C 80 10 01 7F 86 E3 78 38 84 7A 78 7F C5 F3 78 7C 76 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 1A C1
-
-PASS: gsl_fft_real_wavetable_float_alloc, n = 1, stride = 1
-. 0 10003B2C 8
-. 7F C3 F3 78 48 00 F1 4D
-
-. 0 10012C7C 60
-. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 A1 00 14 7C 7D 1B 79 90 01 00 24 93 E1 00 1C 38 60 00 08 80 1E FF F0 38 A0 00 84 38 C0 00 01 7F C0 F2 14 41 82 00 5C
-
-. 0 10012CB8 4
-. 48 01 62 7D
-
-. 0 10012CBC 20
-. 38 A0 00 8C 7C 7F 1B 79 38 C0 00 08 57 A3 10 3A 41 82 00 74
-
-. 0 10012CD0 8
-. 93 BF 00 00 48 01 62 61
-
-. 0 10012CD8 24
-. 2F 83 00 00 7C 60 1B 78 90 1F 00 04 7F E3 FB 78 7F E0 FB 78 41 9E 00 68
-
-. 0 10012CF0 32
-. 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 10003B34 32
-. 3C 80 10 01 38 84 7A B0 7F C5 F3 78 7C 78 1B 78 20 03 00 00 7C 60 19 14 4C C6 31 82 48 01 1A 99
-
-PASS: gsl_fft_real_workspace_float_alloc, n = 1
-. 0 10003B54 20
-. 7F 84 E3 78 7F 65 DB 78 7F A6 EB 78 7F C3 F3 78 48 00 1F D5
-
-. 0 10005B38 64
-. 94 21 FF D0 7C 08 02 A6 93 61 00 1C 7C 7B 1B 79 93 01 00 10 7C D8 33 78 93 21 00 14 7C 99 23 78 93 A1 00 24 7C BD 2B 78 93 41 00 18 93 81 00 20 93 C1 00 28 93 E1 00 2C 90 01 00 34 41 82 00 80
-
-. 0 10005B78 8
-. 2F 9B 00 00 41 9E 00 34
-
-. 0 10005B80 20
-. 3B 40 00 00 3B C0 00 00 54 9C 18 38 7F 7F DB 78 4B FF EB FD
-
-. 0 10005B94 28
-. 37 FF FF FF FC 20 08 18 7D 3E EA 14 7C 3E ED 2E 7F DE E2 14 93 49 00 04 40 82 FF E4
-
-. 0 10005BB0 20
-. 7F A3 EB 78 7F 24 CB 78 7F 65 DB 78 7F 06 C3 78 48 00 05 7D
-
-. 0 10005BC4 48
-. 80 01 00 34 83 01 00 10 83 21 00 14 7C 08 03 A6 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
-
-. 0 10003B68 16
-. 7F 23 CB 78 7F 64 DB 78 57 45 18 38 48 02 54 01
-
-. 0 10003B78 8
-. 2F 9E 00 00 41 9E 00 24
-
-. 0 10003B80 32
-. 7F C9 03 A6 39 60 00 00 55 60 18 38 55 69 10 3A 7C 1B 04 2E 7D 6B E2 14 7C 09 FD 2E 42 00 FF EC
-
-. 0 10003BA0 28
-. 7F 07 C3 78 7F 84 E3 78 7F C5 F3 78 7E C6 B3 78 7F E3 FB 78 3E E0 10 02 48 00 F2 51
-
-. 0 10012E08 216
-. 94 21 FE E0 7C 08 02 A6 42 9F 00 05 92 21 00 54 D9 C1 00 90 39 20 00 00 D9 E1 00 98 3A 20 00 01 DA 01 00 A0 DA 21 00 A8 DA 41 00 B0 DA 61 00 B8 DA 81 00 C0 DA A1 00 C8 DA C1 00 D0 DA E1 00 D8 DB 01 00 E0 DB 21 00 E8 DB 41 00 F0 DB 61 00 F8 DB 81 01 00 DB A1 01 08 DB C1 01 10 DB E1 01 18 91 C1 00 48 91 E1 00 4C 92 01 00 50 92 41 00 58 92 61 00 5C 92 81 00 60 92 A1 00 64 92 C1 00 68 92 E1 00 6C 93 01 00 70 93 21 00 74 93 41 00 78 93 61 00 7C 93 81 00 80 93 C1 00 88 7F C8 02 A6 90 01 01 24 81 07 00 04 80 1E FF F0 93 A1 00 84 7F C0 F2 14 7C A0 2B 79 93 E1 00 8C 90 01 00 18 90 61 00 10 90 81 00 14 81 46 00 04 91 01 00 20 91 21 00 24 41 82 16 B4
-
-. 0 10012EE0 16
-. 80 01 00 18 38 60 00 00 2F 80 00 01 41 9E 09 68
-
-. 0 10013854 160
-. 80 01 01 24 81 C1 00 48 81 E1 00 4C 7C 08 03 A6 82 01 00 50 82 21 00 54 82 41 00 58 82 61 00 5C 82 81 00 60 82 A1 00 64 82 C1 00 68 82 E1 00 6C 83 01 00 70 83 21 00 74 83 41 00 78 83 61 00 7C 83 81 00 80 83 A1 00 84 83 C1 00 88 83 E1 00 8C C9 C1 00 90 C9 E1 00 98 CA 01 00 A0 CA 21 00 A8 CA 41 00 B0 CA 61 00 B8 CA 81 00 C0 CA A1 00 C8 CA C1 00 D0 CA E1 00 D8 CB 01 00 E0 CB 21 00 E8 CB 41 00 F0 CB 61 00 F8 CB 81 01 00 CB A1 01 08 CB C1 01 10 CB E1 01 18 38 21 01 20 4E 80 00 20
-
-. 0 10003BBC 20
-. 7F 64 DB 78 7F 85 E3 78 7F C6 F3 78 7F E3 FB 78 48 00 CB 15
-
-. 0 100106E0 56
-. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 2C 06 00 00 90 01 00 24 93 E1 00 1C 7C 7F 1B 78 80 1E FF F0 7C A3 2B 78 93 A1 00 14 7F C0 F2 14 41 82 00 D4
-
-. 0 10010718 40
-. 39 26 FF FF 83 BE 82 38 2B 89 00 01 C0 1F 00 00 C1 BD 00 00 38 A0 00 01 D0 04 00 00 7D 28 4B 78 D1 A4 00 04 40 9D 00 58
-
-. 0 10010794 8
-. 7F 88 28 00 41 9E 00 24
-
-. 0 1001079C 32
-. 80 01 00 24 38 60 00 00 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 10003BD0 40
-. C8 37 81 10 3C A0 10 01 3C 60 10 01 7F 87 E3 78 7F C8 F3 78 38 A5 69 3C 7F A4 EB 78 7F 66 DB 78 38 63 69 4C 4B FF EB 11
-
-. 0 10003BF8 24
-. 3C 80 10 01 38 84 7A DC 7F C5 F3 78 7F 86 E3 78 4C C6 31 82 48 01 19 DD
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 1, stride = 1
-. 0 10003C10 8
-. 7F C3 F3 78 48 00 AA ED
-
-. 0 1000E700 136
-. 94 21 FF 70 7C 08 02 A6 42 9F 00 05 93 C1 00 60 7F C8 02 A6 7D 80 00 26 92 E1 00 44 7C 77 1B 79 90 01 00 94 80 1E FF F0 DB 61 00 68 DB 81 00 70 7F C0 F2 14 DB A1 00 78 DB C1 00 80 DB E1 00 88 91 C1 00 20 91 E1 00 24 92 01 00 28 92 21 00 2C 92 41 00 30 92 61 00 34 92 81 00 38 92 A1 00 3C 92 C1 00 40 93 01 00 48 93 21 00 4C 93 41 00 50 93 61 00 54 93 81 00 58 93 A1 00 5C 93 E1 00 64 91 81 00 1C 41 82 01 F8
-
-. 0 1000E788 8
-. 38 60 02 0C 48 01 A7 A9
-
-. 0 1000E790 12
-. 7C 69 1B 79 91 21 00 14 41 82 02 5C
-
-. 0 1000E79C 8
-. 56 E3 18 38 48 01 A7 95
-
-. 0 1000E7A4 16
-. 81 21 00 14 2F 83 00 00 90 69 02 08 41 9E 02 60
-
-. 0 1000E7B4 24
-. 81 21 00 14 7E E3 BB 78 38 81 00 10 92 E9 00 00 38 A9 00 08 4B FF 7F 2D
-
-. 0 1000E7CC 8
-. 2F 83 00 00 40 9E 01 F4
-
-. 0 1000E7D4 68
-. 81 61 00 10 3C 00 43 30 81 21 00 14 3A C0 00 00 7F 96 58 40 39 C0 00 01 91 69 00 04 81 3E 81 D0 90 01 00 08 92 E1 00 0C C9 89 00 00 C9 A1 00 08 81 3E 81 D4 FD AD 60 28 C8 09 00 00 FF A0 68 24 40 9C 00 E4
-
-. 0 1000E818 60
-. 81 21 00 14 FF 60 60 90 7D 6F 5B 78 3B 20 00 00 83 09 02 08 7D 31 4B 78 7F 1A C3 78 82 71 00 08 3A 80 00 01 7D D2 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7D 37 73 96 40 9C 00 9C
-
-. 0 1000E8EC 12
-. 35 EF FF FF 3A 31 00 04 40 82 FF 40
-
-. 0 1000E8F8 16
-. 56 E0 F8 7E 80 61 00 14 7F 80 B0 40 41 9C 00 94
-
-. 0 1000E908 116
-. 80 01 00 94 81 81 00 1C 81 C1 00 20 7C 08 03 A6 81 E1 00 24 7D 80 81 20 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
-
-. 0 10003C18 36
-. 3C 80 10 01 7C 7A 1B 78 38 84 7B 1C 20 03 00 00 7C 60 19 14 7F C5 F3 78 7F 86 E3 78 4C C6 31 82 48 01 19 B1
-
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 1, stride = 1
-. 0 10003C3C 24
-. 7F E3 FB 78 7F 84 E3 78 7F C5 F3 78 7F 46 D3 78 7F 07 C3 78 48 00 AE 31
-
-. 0 1000EA80 200
-. 94 21 FE F0 7C 08 02 A6 42 9F 00 05 D9 C1 00 80 D9 E1 00 88 DA 01 00 90 DA 21 00 98 DA 41 00 A0 DA 61 00 A8 DA 81 00 B0 DA A1 00 B8 DA C1 00 C0 DA E1 00 C8 DB 01 00 D0 DB 21 00 D8 DB 41 00 E0 DB 61 00 E8 DB 81 00 F0 DB A1 00 F8 DB C1 01 00 DB E1 01 08 91 C1 00 38 91 E1 00 3C 92 01 00 40 92 21 00 44 92 41 00 48 92 61 00 4C 92 81 00 50 92 A1 00 54 92 C1 00 58 92 E1 00 5C 93 01 00 60 93 21 00 64 93 41 00 68 93 61 00 6C 93 81 00 70 93 C1 00 78 7F C8 02 A6 90 01 01 14 81 07 00 04 80 1E FF F0 93 A1 00 74 7F C0 F2 14 7C A0 2B 79 93 E1 00 7C 90 01 00 18 90 61 00 10 90 81 00 14 91 01 00 1C 41 82 10 7C
-
-. 0 1000EB48 16
-. 80 01 00 18 38 60 00 00 2F 80 00 01 41 9E 05 9C
-
-. 0 1000F0F0 160
-. 80 01 01 14 81 C1 00 38 81 E1 00 3C 7C 08 03 A6 82 01 00 40 82 21 00 44 82 41 00 48 82 61 00 4C 82 81 00 50 82 A1 00 54 82 C1 00 58 82 E1 00 5C 83 01 00 60 83 21 00 64 83 41 00 68 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C C9 C1 00 80 C9 E1 00 88 CA 01 00 90 CA 21 00 98 CA 41 00 A0 CA 61 00 A8 CA 81 00 B0 CA A1 00 B8 CA C1 00 C0 CA E1 00 C8 CB 01 00 D0 CB 21 00 D8 CB 41 00 E0 CB 61 00 E8 CB 81 00 F0 CB A1 00 F8 CB C1 01 00 CB E1 01 08 38 21 01 10 4E 80 00 20
-
-. 0 10003C54 8
-. 2F 9E 00 00 41 9E 00 48
-
-. 0 10003C5C 68
-. 3C 00 43 30 3D 20 10 02 90 01 00 08 39 29 80 F8 93 C1 00 0C 7F C9 03 A6 C8 09 00 00 38 00 00 00 C9 A1 00 08 57 89 10 3A FD AD 00 28 FD A0 68 18 7C 1F 04 2E EC 00 68 24 7C 1F 05 2E 7C 00 4A 14 42 00 FF F0
-
-. 0 10003CA0 20
-. 7F 64 DB 78 7F 85 E3 78 7F C6 F3 78 7F E3 FB 78 48 01 0C 41
-
-. 0 100148F0 40
-. 7C 08 02 A6 94 21 FF F0 42 9F 00 05 93 C1 00 08 7F C8 02 A6 2C 06 00 00 90 01 00 14 80 1E FF F0 7F C0 F2 14 41 82 00 54
-
-. 0 10014918 8
-. 2F 86 00 00 41 9E 00 34
-
-. 0 10014920 48
-. 81 3E 82 F0 7C C9 03 A6 39 40 00 00 C1 A9 00 00 55 40 10 3A 55 49 18 38 7C 03 04 2E 7D 69 22 14 7D 4A 2A 14 7C 09 25 2E D1 AB 00 04 42 00 FF E4
-
-. 0 10014950 24
-. 80 01 00 14 38 60 00 00 83 C1 00 08 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-. 0 10003CB4 40
-. C8 37 81 10 3C A0 10 01 3C 60 10 01 7F 87 E3 78 7F C8 F3 78 7F 24 CB 78 7F 66 DB 78 38 A5 69 98 38 63 69 90 4B FF EA 2D
-
-. 0 10003CDC 24
-. 3C 80 10 01 7F C5 F3 78 7F 86 E3 78 38 84 7B 5C 4C C6 31 82 48 01 18 F9
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 1, stride = 1
-. 0 10003CF4 8
-. 7F 03 C3 78 48 00 F0 C5
-
-. 0 10012DBC 32
-. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 00 04 48 01 61 AD
-
-. 0 10012DDC 16
-. 38 00 00 00 90 1D 00 04 7F A3 EB 78 48 01 61 9D
-
-. 0 10012DEC 24
-. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
-
-. 0 10003CFC 8
-. 7E C3 B3 78 48 00 F0 75
-
-. 0 10012D74 32
-. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 02 08 48 01 61 F5
-
-. 0 10012D94 16
-. 38 00 00 00 90 1D 02 08 7F A3 EB 78 48 01 61 E5
-
-. 0 10012DA4 24
-. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
-
-. 0 10003D04 8
-. 7F 43 D3 78 48 00 AD 2D
-
-. 0 1000EA34 32
-. 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 C1 00 18 90 01 00 24 80 63 02 08 48 01 A5 35
-
-. 0 1000EA54 16
-. 38 00 00 00 90 1D 02 08 7F A3 EB 78 48 01 A5 25
-
-. 0 1000EA64 24
-. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
-
-. 0 10003D0C 8
-. 7F E3 FB 78 48 02 52 75
-
-. 0 10003D14 8
-. 7F 63 DB 78 48 02 52 6D
-
-. 0 10003D1C 8
-. 7F 23 CB 78 48 02 52 65
-
-. 0 10003D24 8
-. 7F A3 EB 78 48 02 52 5D
-
-. 0 10003D2C 56
-. 80 01 00 44 82 C1 00 18 82 E1 00 1C 7C 08 03 A6 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
-
-. 0 10004730 8
-. 2B 9D 00 03 40 9D FF C8
-
-. 0 100046FC 12
-. 7F A3 EB 78 7F E4 FB 78 4B FF C5 E1
-
-PASS: gsl_fft_complex_wavetable_alloc, n = 1, stride = 2
-. 0 FEEF74C 40
-. 82 FE 05 FC 7E 83 CA 14 82 D4 00 04 7E 1C B8 00 82 63 00 0C 62 D5 00 01 92 B4 00 04 91 53 00 08 92 6A 00 0C 41 92 00 10
-
-. 0 FEEF780 8
-. 39 03 00 08 4B FF FF 2C
-
-PASS: gsl_fft_complex_workspace_alloc, n = 1
-PASS: gsl_fft_complex_forward with signal_noise, n = 1, stride = 2
-. 0 100012C8 20
-. 7F 44 D3 78 7F C5 F3 78 38 C0 00 00 7F 63 DB 78 4B FF F9 59
-
-. 0 100012DC 24
-. 3C 80 10 01 38 84 6B B8 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 42 F9
-
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 1, stride = 2
-. 0 100012F4 4
-. 4B FF FC 30
-
-PASS: gsl_fft_complex_inverse with signal_noise, n = 1, stride = 2
-. 0 10001298 20
-. 7F 44 D3 78 7F C5 F3 78 38 C0 00 00 7F 63 DB 78 4B FF F9 89
-
-. 0 100012AC 24
-. 3C 80 10 01 38 84 6B 74 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 43 29
-
-PASS: gsl_fft_complex_inverse other data untouched, n = 1, stride = 2
-. 0 100012C4 4
-. 4B FF FC BC
-
-PASS: gsl_fft_complex_backward with signal_noise, n = 1, stride = 2
-. 0 10001268 20
-. 7F 44 D3 78 7F C5 F3 78 38 C0 0B B8 7E E3 BB 78 4B FF F9 B9
-
-. 0 1000127C 24
-. 3C 80 10 01 38 84 6B 30 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 43 59
-
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 1, stride = 2
-. 0 10001294 4
-. 4B FF FD A4
-
-PASS: gsl_fft_complex_forward with signal_pulse, n = 1, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 1, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 1, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 1, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 1
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 1, stride = 2
-. 0 100031D4 20
-. 7F 44 D3 78 7F C5 F3 78 38 C0 00 00 7F 63 DB 78 4B FF F9 3D
-
-. 0 10002B20 20
-. 39 40 00 00 94 21 FF F0 7F 8A 28 40 39 60 00 00 40 9C 00 A0
-
-. 0 10002B34 16
-. 7C A7 2B 78 2B 84 00 01 39 6B 00 02 40 9D 00 88
-
-. 0 10002B44 132
-. 3D 20 10 02 38 04 FF FF 39 29 80 F8 7C 09 03 A6 C9 49 00 00 3D 00 43 30 55 69 10 3A 7C 0B 32 14 39 6B 00 01 90 01 00 0C 91 01 00 08 7C 0B 32 14 C9 A1 00 08 90 01 00 0C 55 60 10 3A C8 01 00 08 FD AD 50 28 7D 69 1C 2E 39 6B 00 01 FC 00 50 28 7D 83 04 2E FD A0 68 18 FC 00 00 18 FF 8B 68 00 FF 0C 00 00 4F DE F0 42 4F 5A D0 42 7D 20 00 26 55 20 FF FE 55 29 DF FE 7D 4A 03 78 7D 4A 4B 78 42 00 FF 98
-
-. 0 10002BC8 8
-. 34 E7 FF FF 40 82 FF 6C
-
-. 0 10002BD0 12
-. 7D 43 53 78 38 21 00 10 4E 80 00 20
-
-. 0 100031E8 24
-. 3C 80 10 01 38 84 77 68 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 23 ED
-
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 1, stride = 2
-. 0 10003200 4
-. 4B FF FC 2C
-
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 1, stride = 2
-. 0 100031A4 20
-. 7F 44 D3 78 7F C5 F3 78 38 C0 00 00 7F 63 DB 78 4B FF F9 6D
-
-. 0 100031B8 24
-. 3C 80 10 01 38 84 77 20 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 24 1D
-
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 1, stride = 2
-. 0 100031D0 4
-. 4B FF FC B8
-
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 1, stride = 2
-. 0 10003174 20
-. 7F 44 D3 78 7F C5 F3 78 38 C0 0B B8 7E E3 BB 78 4B FF F9 9D
-
-. 0 10003188 24
-. 3C 80 10 01 38 84 76 D4 7F C5 F3 78 7F 46 D3 78 4C C6 31 82 48 01 24 4D
-
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 1, stride = 2
-. 0 100031A0 4
-. 4B FF FD A4
-
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 1, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 1, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 1, stride = 2
-. 0 10001B34 32
-. 91 41 00 0C 55 40 18 38 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 68 28 7C 1F 05 AE 42 00 FF E4
-
-PASS: gsl_fft_real_wavetable_alloc, n = 1, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 1
-PASS: gsl_fft_real with signal_real_noise, n = 1, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 1, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 1, stride = 2
-. 0 10003A58 36
-. 91 41 00 0C 55 40 10 3A 91 21 00 08 39 4A 00 01 C8 01 00 08 FC 00 68 28 FC 00 00 18 7C 1F 05 2E 42 00 FF E0
-
-PASS: gsl_fft_real_wavetable_float_alloc, n = 1, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 1
-PASS: gsl_fft_real_float with signal_real_noise, n = 1, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 1, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 1, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 1, stride = 3
-. 0 FEEFC34 20
-. 7F 4A 02 14 81 DA 00 04 61 C7 00 01 90 FA 00 04 41 9A 00 10
-
-. 0 FEEFC54 8
-. 39 0A 00 08 4B FF FA 58
-
-PASS: gsl_fft_complex_workspace_alloc, n = 1
-PASS: gsl_fft_complex_forward with signal_noise, n = 1, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 1, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 1, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 1, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 1, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 1, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 1, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 1, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 1, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 1, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 1
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 1, stride = 3
-. 0 10002B5C 108
-. 55 69 10 3A 7C 0B 32 14 39 6B 00 01 90 01 00 0C 91 01 00 08 7C 0B 32 14 C9 A1 00 08 90 01 00 0C 55 60 10 3A C8 01 00 08 FD AD 50 28 7D 69 1C 2E 39 6B 00 01 FC 00 50 28 7D 83 04 2E FD A0 68 18 FC 00 00 18 FF 8B 68 00 FF 0C 00 00 4F DE F0 42 4F 5A D0 42 7D 20 00 26 55 20 FF FE 55 29 DF FE 7D 4A 03 78 7D 4A 4B 78 42 00 FF 98
-
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 1, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 1, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 1, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 1, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 1, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 1, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 1, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 1, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 1, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 1
-PASS: gsl_fft_real with signal_real_noise, n = 1, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 1, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 1, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 1, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 1
-PASS: gsl_fft_real_float with signal_real_noise, n = 1, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 1, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 1, stride = 3
-. 0 10004738 12
-. 3B FF 00 01 7F 9F F0 40 40 9D FF B8
-
-. 0 100064BC 36
-. 81 24 00 00 68 6B 00 01 30 09 FF FF 7D 40 49 10 31 2B FF FF 7C 09 59 10 7D 49 00 39 7D 6A 5B 78 41 82 00 5C
-
-. 0 100064E0 16
-. 39 80 00 00 7D 6C 20 2E 7D 28 5B 96 48 00 00 18
-
-. 0 10006504 12
-. 7C 09 59 D6 7F 88 00 00 41 9E FF E4
-
-. 0 10006510 40
-. 38 A5 00 01 69 0A 00 01 54 AC 10 3A 7D 2C 20 2E 30 09 FF FF 7D 60 49 10 31 2A FF FF 7C 09 51 10 7D 69 00 39 40 82 FF B0
-
-. 0 100064E4 12
-. 7D 6C 20 2E 7D 28 5B 96 48 00 00 18
-
-. 0 100064F0 32
-. 7D 28 4B 78 7D 29 5B 96 54 E0 10 3A 7D 66 01 2E 38 E7 00 01 7C 09 59 D6 7F 88 00 00 41 9E FF E4
-
-. 0 10006538 20
-. 31 2A FF FF 7C 09 51 10 39 60 00 02 7C 0A 40 79 48 00 00 24
-
-. 0 1000656C 8
-. 55 00 F8 7E 40 82 FF DC
-
-. 0 10006574 12
-. 2F 88 00 01 39 60 00 03 40 BE 00 0C
-
-. 0 10006580 4
-. 48 00 00 30
-
-. 0 100065B0 16
-. 38 A0 00 00 39 60 00 01 7F 85 38 40 40 9C 00 1C
-
-. 0 100065C0 24
-. 7C E9 03 A6 54 A0 10 3A 38 A5 00 01 7D 26 00 2E 7D 6B 49 D6 42 00 FF F0
-
-. 0 100065D8 8
-. 7F 8B 18 00 40 9E 00 84
-
-. 0 100065E0 36
-. 38 00 00 00 90 FF 00 00 7C 03 03 78 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
-
-. 0 1000698C 24
-. FF 80 D8 90 7E 39 8B 78 3B 80 00 01 3B E0 00 00 7F 9C B0 40 41 9D 00 64
-
-. 0 100069A4 68
-. 3E 80 43 30 FF C0 E0 90 7F FF CA 14 92 81 00 08 7C 1F BB 96 3B 9C 00 01 7F BA C2 14 3A B5 00 01 3B 7B 00 10 7C 00 B9 D6 7F E0 F8 50 93 E1 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 02 25 11
-
-. 0 100069E8 16
-. 7C 3A C5 AE FC 20 F8 90 3B 5A 00 10 48 02 25 A1
-
-. 0 100069F8 12
-. 7F 9C B0 40 D8 3D 00 08 40 9D FF AC
-
-. 0 10006A04 16
-. 3A 73 00 01 7F 39 8A 14 7F 93 90 40 41 9C FF 84
-
-PASS: gsl_fft_complex_wavetable_alloc, n = 2, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 2
-. 0 10000E68 32
-. 7D 20 DA 14 7C 1B 04 AE C9 A9 00 08 7D 20 CA 14 7C 19 05 AE 7C 00 5A 14 D9 A9 00 08 42 00 FF E4
-
-. 0 10006ED0 16
-. 80 06 00 00 81 01 00 18 7F 80 40 00 40 9E 1E B8
-
-. 0 10006EE0 16
-. 80 07 00 00 80 E1 00 18 7F 80 38 00 40 9E 1E C4
-
-. 0 10006EF0 12
-. 80 01 00 28 7F 80 50 40 40 9C 06 A8
-
-. 0 10006EFC 96
-. 80 E1 00 1C 38 C6 01 08 81 01 00 18 81 21 00 18 2E 07 FF FF 91 41 00 20 55 08 F8 7E 55 29 F0 BE 7D 47 00 D0 4D 90 00 00 90 C1 01 88 91 01 01 80 91 21 01 84 91 41 01 8C 81 61 01 88 80 01 00 24 82 EB FF 00 81 81 00 28 7C 00 B9 D6 80 C1 00 18 2F 8C 00 00 90 01 00 24 7D E6 03 96 40 9E 06 F4
-
-. 0 10006F5C 28
-. 2F 97 00 02 3B 00 00 01 83 E1 00 10 83 21 00 14 83 41 00 2C 93 01 00 28 41 9E 06 F8
-
-. 0 1000766C 36
-. 3B 60 00 00 81 01 01 88 7F 9B 78 40 81 21 00 24 82 68 00 00 38 A0 00 00 38 E0 00 00 55 26 F8 7E 40 BC FE EC
-
-. 0 10007690 32
-. 81 41 00 1C 7E 7C 9B 78 82 DE 80 40 38 80 00 00 2F 0A FF FF 82 FE 80 44 2F 9B 00 00 40 9E 00 CC
-
-. 0 100076B0 16
-. C8 B6 00 00 C8 D7 00 00 2F 86 00 00 41 9E 00 A0
-
-. 0 100076C0 156
-. 7C 07 C1 D6 7C C9 03 A6 54 88 20 36 57 3D 20 36 57 03 20 36 54 0A 20 36 81 61 01 80 7D 28 FA 14 C9 29 00 08 7C 84 CA 14 7C 05 5A 14 7D 88 FC AE 7C 00 C9 D6 7D 6A D2 14 38 A5 00 01 7D 08 EA 14 54 00 20 36 7D 20 FA 14 7D 1F 04 AE C8 E9 00 08 7C 07 32 14 FC 0C 40 28 7C 00 C1 D6 FD A9 38 28 38 E7 00 01 FD 8C 40 2A FD 66 00 32 54 00 20 36 FD 46 03 72 7D 20 D2 14 7D 8A D5 AE 7D 4A 1A 14 FD A5 5B 7A FC 05 50 38 FD 29 38 2A D9 2B 00 08 7C 1A 05 AE D9 A9 00 08 42 00 FF 80
-
-. 0 1000775C 20
-. 3B 7B 00 01 7C E7 32 14 7F 9B 78 40 3B 9C 00 10 40 BC FE 0C
-
-. 0 10007578 28
-. 80 C1 01 88 80 01 00 20 38 C6 00 04 90 C1 01 88 34 C0 FF FF 90 C1 00 20 40 82 F9 A4
-
-. 0 10007594 12
-. 80 E1 00 28 2F 87 00 01 41 9E 0A 48
-
-. 0 10007FE4 20
-. 81 21 00 18 39 00 00 00 91 01 00 20 7F 88 48 40 40 BC F5 AC
-
-. 0 10007FF8 76
-. 81 41 00 14 7D 29 03 A6 38 00 00 00 55 44 20 36 81 61 00 20 81 81 00 2C 55 69 20 36 80 C1 00 10 7C 09 64 AE 7D 29 62 14 80 E1 00 20 7D 60 32 14 7C 06 05 AE 7C 00 22 14 C9 A9 00 08 38 E7 00 01 90 E1 00 20 D9 AB 00 08 42 00 FF C8
-
-. 0 10008008 60
-. 81 61 00 20 81 81 00 2C 55 69 20 36 80 C1 00 10 7C 09 64 AE 7D 29 62 14 80 E1 00 20 7D 60 32 14 7C 06 05 AE 7C 00 22 14 C9 A9 00 08 38 E7 00 01 90 E1 00 20 D9 AB 00 08 42 00 FF C8
-
-. 0 10008044 8
-. 38 60 00 00 4B FF F5 5C
-
-. 0 10000EB4 32
-. 7D 20 DA 14 7C 1B 04 AE C9 A9 00 08 7D 20 BA 14 7C 17 05 AE 7C 00 5A 14 D9 A9 00 08 42 00 FF E4
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 2, stride = 1
-. 0 10008E54 36
-. 7C 1F 04 AE 7D 20 FA 14 FC 00 03 32 7C 1F 05 AE 7C 00 22 14 C9 A9 00 08 FD AD 03 32 D9 A9 00 08 42 00 FF E0
-
-PASS: gsl_fft_complex_inverse with signal_noise, n = 2, stride = 1
-. 0 10000FCC 36
-. 7C 19 04 AE 7D 20 CA 14 FC 00 03 32 7C 19 05 AE 7C 00 5A 14 C9 A9 00 08 FD AD 03 32 D9 A9 00 08 42 00 FF E0
-
-PASS: gsl_fft_complex_backward with signal_noise, n = 2, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 2, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 2, stride = 1
-. 0 10001154 48
-. 3D 20 10 02 3D 60 10 02 39 29 81 18 39 6B 80 F0 C8 29 00 00 7F E3 FB 78 C8 4B 00 00 7F C4 F3 78 7F 45 D3 78 7F 66 DB 78 7F 07 C3 78 48 00 39 31
-
-PASS: gsl_fft_complex_forward with signal_exp, n = 2, stride = 1
-. 0 100097B4 24
-. FF 80 D8 90 7E 39 8B 78 3B 80 00 01 3B E0 00 00 7F 9C B0 40 41 9D 00 6C
-
-. 0 100097CC 68
-. 3E 80 43 30 FF C0 E0 90 7F FF CA 14 92 81 00 08 7C 1F BB 96 3B 9C 00 01 7F BA C2 14 3A B5 00 01 3B 7B 00 08 7C 00 B9 D6 7F E0 F8 50 93 E1 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 F6 E9
-
-. 0 10009810 20
-. FC 00 08 18 FC 20 F8 90 7C 1A C5 2E 3B 5A 00 08 48 01 F7 75
-
-. 0 10009824 16
-. 7F 9C B0 40 FC 20 08 18 D0 3D 00 04 40 9D FF A4
-
-. 0 10009834 16
-. 3A 73 00 01 7F 39 8A 14 7F 93 90 40 41 9C FF 7C
-
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 2, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 2
-. 0 10005A7C 4
-. 4B FF ED 11
-
-. 0 10006050 28
-. 93 A1 00 14 92 E1 00 10 CB E1 00 10 FF FF D8 28 FF FF 06 B2 FC 20 F8 90 48 02 2E 8D
-
-. 0 1000602C 20
-. 2F 9B 00 00 C3 93 00 00 3B A0 00 00 FF A0 E0 90 41 9E 00 80
-
-. 0 10002D70 32
-. 7D 20 DA 14 7C 1B 04 2E C1 A9 00 04 7D 20 CA 14 7C 19 05 2E 7C 00 5A 14 D1 A9 00 04 42 00 FF E4
-
-. 0 10009D00 16
-. 80 06 00 00 81 01 00 18 7F 80 40 00 40 9E 1F 44
-
-. 0 10009D10 16
-. 80 07 00 00 80 E1 00 18 7F 80 38 00 40 9E 1F 50
-
-. 0 10009D20 12
-. 80 01 00 28 7F 80 50 40 40 9C 06 98
-
-. 0 10009D2C 88
-. 80 E1 00 1C 38 C6 01 08 81 01 00 18 81 21 00 18 2E 07 FF FF 55 08 F8 7E 90 C1 01 44 55 29 F0 BE 4D 90 00 00 91 41 00 20 91 01 01 3C 91 21 01 40 81 41 01 44 81 81 00 24 82 EA FF 00 81 61 00 28 7D 8C B9 D6 80 01 00 18 2F 8B 00 00 91 81 00 24 7D E0 63 96 40 9E 06 EC
-
-. 0 10009D84 28
-. 2F 97 00 02 3B 00 00 01 83 E1 00 10 83 21 00 14 83 41 00 2C 93 01 00 28 41 9E 06 F0
-
-. 0 1000A48C 36
-. 3B 60 00 00 81 01 01 44 7F 9B 78 40 81 21 00 24 82 88 00 00 38 A0 00 00 38 E0 00 00 55 26 F8 7E 40 BC FE EC
-
-. 0 1000A4B0 32
-. 81 41 00 1C 7E 9C A3 78 82 FE 80 CC 38 80 00 00 2F 0A FF FF 82 DE 80 D0 2F 9B 00 00 40 9E 00 CC
-
-. 0 1000A4D0 16
-. C0 B7 00 00 C0 D6 00 00 2F 86 00 00 41 9E 00 A0
-
-. 0 1000A4E0 156
-. 7C 07 C1 D6 7C C9 03 A6 54 88 18 38 57 3D 18 38 57 03 18 38 54 0A 18 38 81 61 01 3C 7D 28 FA 14 C1 29 00 04 7C 84 CA 14 7C 05 5A 14 7D 48 FC 2E 7C 00 C9 D6 38 A5 00 01 7D 08 EA 14 54 00 18 38 7D 20 FA 14 7D 1F 04 2E C0 E9 00 04 7C 07 32 14 EC 0A 40 28 7C 00 C1 D6 ED A9 38 28 7D 2A D2 14 ED 4A 40 2A 38 E7 00 01 ED 86 00 32 ED 66 03 72 54 00 18 38 ED 29 38 2A 7D 60 D2 14 ED A5 63 7A 7D 4A D5 2E EC 05 58 38 7D 4A 1A 14 D1 29 00 04 7C 1A 05 2E D1 AB 00 04 42 00 FF 80
-
-. 0 1000A57C 20
-. 3B 7B 00 01 7C E7 32 14 7F 9B 78 40 3B 9C 00 08 40 BC FE 0C
-
-. 0 1000A398 28
-. 80 E1 01 44 80 01 00 20 38 E7 00 04 90 E1 01 44 34 E0 FF FF 90 E1 00 20 40 82 F9 AC
-
-. 0 1000A3B4 12
-. 81 01 00 28 2F 88 00 01 41 9E 0A AC
-
-. 0 1000AE68 20
-. 81 41 00 18 39 20 00 00 91 21 00 20 7F 89 50 40 40 BC F5 48
-
-. 0 1000AE7C 72
-. 81 61 00 14 7D 49 03 A6 38 00 00 00 55 64 18 38 81 81 00 20 80 E1 00 2C 55 89 18 38 81 01 00 10 7C 09 3C 2E 7D 29 3A 14 7D 60 42 14 39 8C 00 01 7C 08 05 2E 7C 00 22 14 C1 A9 00 04 91 81 00 20 D1 AB 00 04 42 00 FF CC
-
-. 0 1000AE8C 56
-. 81 81 00 20 80 E1 00 2C 55 89 18 38 81 01 00 10 7C 09 3C 2E 7D 29 3A 14 7D 60 42 14 39 8C 00 01 7C 08 05 2E 7C 00 22 14 C1 A9 00 04 91 81 00 20 D1 AB 00 04 42 00 FF CC
-
-. 0 1000AEC4 8
-. 38 60 00 00 4B FF F4 FC
-
-. 0 10002DBC 32
-. 7D 20 DA 14 7C 1B 04 2E C1 A9 00 04 7D 20 BA 14 7C 17 05 2E 7C 00 5A 14 D1 A9 00 04 42 00 FF E4
-
-. 0 10002798 60
-. 7D 20 FA 14 7D 60 F2 14 7C 1F 04 2E 7D 9E 04 2E 7C 00 52 14 C1 A9 00 04 C1 6B 00 04 EC 00 60 28 ED AD 58 28 FC 00 02 10 FD A0 6A 10 FC 00 68 2A FF E0 02 B2 FF 9F 08 00 40 9D 00 08
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 2, stride = 1
-. 0 1000BD14 36
-. 7C 1F 04 2E 7D 20 FA 14 EC 00 03 32 7C 1F 05 2E 7C 00 22 14 C1 A9 00 04 ED AD 03 32 D1 A9 00 04 42 00 FF E0
-
-. 0 100027D4 8
-. FC 20 F8 90 42 00 FF C0
-
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 2, stride = 1
-. 0 10002ED8 36
-. 7C 19 04 2E 7D 20 CA 14 EC 00 03 32 7C 19 05 2E 7C 00 5A 14 C1 A9 00 04 ED AD 03 32 D1 A9 00 04 42 00 FF E0
-
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 2, stride = 1
-. 0 100052A8 20
-. 7D 20 32 14 7D 46 01 2E 91 49 00 04 7C 00 5A 14 42 00 FF F0
-
-. 0 1000531C 48
-. 7C 1D F3 96 93 01 00 08 7C 00 F1 D6 7C 00 E8 50 7F BD DA 14 90 01 00 0C CB E1 00 08 FF FF C8 28 FF FF 06 B2 FF FF D8 24 FC 20 F8 90 48 02 3B AD
-
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 2, stride = 1
-. 0 10005420 20
-. 7D 20 2A 14 7C 25 05 2E D0 49 00 04 7C 00 5A 14 42 00 FF F0
-
-. 0 1000544C 20
-. 7D 20 32 14 7D 66 01 2E 91 69 00 04 7C 00 22 14 42 00 FF F0
-
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 2, stride = 1
-. 0 10005588 48
-. 7C 1D F3 96 92 C1 00 08 7C 00 F1 D6 7C 00 E8 50 7F BD D2 14 90 01 00 0C CB E1 00 08 FF FF C8 28 FF FF 06 B2 FF FF E8 24 FC 20 F8 90 48 02 39 41
-
-. 0 10005608 20
-. 7D 20 DA 14 7D 5B 01 2E 91 49 00 04 7C 00 5A 14 42 00 FF F0
-
-. 0 10003060 48
-. 3D 20 10 02 3D 60 10 02 39 29 81 2C 39 6B 81 28 C0 29 00 00 7F E3 FB 78 C0 4B 00 00 7F C4 F3 78 7F 45 D3 78 7F 66 DB 78 7F 07 C3 78 48 00 24 4D
-
-. 0 10005624 164
-. 7C 1A F3 96 7C 00 F1 D6 7C 60 D0 50 3C 00 43 30 3D 20 10 02 90 01 00 10 39 29 80 F8 93 C1 00 14 7C 17 19 D6 C9 A9 00 00 38 60 00 00 C8 01 00 10 FC 00 68 28 54 00 18 38 7D 20 DA 14 FC 00 00 18 ED A0 07 32 EC 00 06 F2 7C 1B 05 2E D1 A9 00 04 80 01 00 84 82 C1 00 20 82 E1 00 24 7C 08 03 A6 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB 21 00 48 CB 41 00 50 CB 61 00 58 CB 81 00 60 CB A1 00 68 CB C1 00 70 CB E1 00 78 38 21 00 80 4E 80 00 20
-
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 2, stride = 1
-. 0 100109E8 8
-. 57 03 18 36 48 01 85 49
-
-. 0 100109F0 16
-. 81 21 00 14 2F 83 00 00 90 69 02 08 41 9E 02 68
-
-. 0 10010AA0 32
-. 38 09 00 01 FF 80 D8 90 54 00 F8 7E 7E 5B 93 78 2A 00 00 01 7C 10 03 78 3B 80 00 00 40 91 00 64
-
-. 0 10010B20 16
-. 3A 94 00 01 7F 7B 92 14 7F 94 98 40 41 9C FF 8C
-
-PASS: gsl_fft_real_wavetable_alloc, n = 2, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 2
-. 0 10001C54 24
-. 55 60 20 36 55 69 18 38 7C 1B 04 AE 7D 6B E2 14 7C 09 FD AE 42 00 FF EC
-
-. 0 10010F00 16
-. 80 06 00 00 81 01 00 18 7F 80 40 00 40 9E 16 3C
-
-. 0 10010F10 16
-. 80 07 00 00 80 E1 00 18 7F 80 38 00 40 9E 16 48
-
-. 0 10010F20 12
-. 80 01 00 24 7F 80 50 40 40 9C 08 FC
-
-. 0 10010F2C 68
-. 80 E1 00 18 38 C6 01 08 81 01 00 18 54 E7 F8 7E 90 C1 00 30 91 41 00 1C 55 0E F0 BE 90 E1 00 2C 81 21 00 24 81 41 00 30 2F 89 00 00 39 31 00 01 83 6A FF 00 55 29 F8 7E 38 09 FF FF 7E 31 D9 D6 40 9E 09 9C
-
-. 0 10010F70 28
-. 2F 9B 00 02 3B 00 00 01 83 E1 00 10 83 A1 00 14 83 21 00 20 93 01 00 24 41 9E 09 A0
-
-. 0 10011928 28
-. 81 81 00 18 56 25 F8 7E 80 E1 00 30 7F 4C 8B 96 83 87 00 00 2F 9A 00 00 41 9E 00 64
-
-. 0 10011944 96
-. 7F 49 03 A6 39 51 FF FF 38 E0 00 00 39 00 00 00 81 21 00 2C 7D 78 39 D6 7C E7 8A 14 7C 08 4A 14 7C 1D 01 D6 55 6B 18 38 7D 3D 41 D6 54 00 18 38 7D BF 04 AE 7D 08 2A 14 55 29 18 38 7C 18 51 D6 7C 09 FC AE 7D 4A 8A 14 FD 80 68 28 FC 00 68 2A 54 00 18 38 7C 0B CD AE 7D 99 05 AE 42 00 FF B4
-
-. 0 100119A4 8
-. 2F 85 00 01 41 BE FE 0C
-
-. 0 100117B4 28
-. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 F7 80
-
-. 0 100117D0 12
-. 81 01 00 24 2F 88 00 01 40 BE 00 4C
-
-. 0 100117DC 20
-. 81 41 00 18 39 20 00 00 91 21 00 1C 7F 89 50 40 40 9C 00 38
-
-. 0 100117F0 52
-. 81 61 00 14 7D 49 03 A6 80 61 00 10 55 64 18 38 81 81 00 1C 80 E1 00 20 55 80 18 38 39 8C 00 01 7C 07 04 AE 91 81 00 1C D8 03 00 00 7C 63 22 14 42 00 FF E0
-
-. 0 10011800 36
-. 81 81 00 1C 80 E1 00 20 55 80 18 38 39 8C 00 01 7C 07 04 AE 91 81 00 1C D8 03 00 00 7C 63 22 14 42 00 FF E0
-
-. 0 10011824 164
-. 38 60 00 00 80 01 01 14 81 C1 00 38 81 E1 00 3C 7C 08 03 A6 82 01 00 40 82 21 00 44 82 41 00 48 82 61 00 4C 82 81 00 50 82 A1 00 54 82 C1 00 58 82 E1 00 5C 83 01 00 60 83 21 00 64 83 41 00 68 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C C9 C1 00 80 C9 E1 00 88 CA 01 00 90 CA 21 00 98 CA 41 00 A0 CA 61 00 A8 CA 81 00 B0 CA A1 00 B8 CA C1 00 C0 CA E1 00 C8 CB 01 00 D0 CB 21 00 D8 CB 41 00 E0 CB 61 00 E8 CB 81 00 F0 CB A1 00 F8 CB C1 01 00 CB E1 01 08 38 21 01 10 4E 80 00 20
-
-. 0 1000E578 44
-. 54 C9 18 38 7C 03 29 D6 39 29 FF F8 C9 BD 00 00 7D 29 19 D6 54 00 20 36 7C 09 FC AE 7D 20 22 14 7C 04 05 AE D9 A9 00 08 4B FF FF B8
-
-PASS: gsl_fft_real with signal_real_noise, n = 2, stride = 1
-. 0 1000C694 32
-. 38 09 00 01 FF 80 D8 90 54 00 F8 7E 7E 5B 93 78 2A 00 00 01 7C 10 03 78 3B 80 00 00 40 91 00 64
-
-. 0 1000C714 16
-. 3A 94 00 01 7F 7B 92 14 7F 94 98 40 41 9C FF 8C
-
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 2, stride = 1
-. 0 1000C990 16
-. 80 06 00 00 81 01 00 18 7F 80 40 00 40 9E 15 FC
-
-. 0 1000C9A0 16
-. 80 07 00 00 80 E1 00 18 7F 80 38 00 40 9E 15 D0
-
-. 0 1000C9B0 28
-. 80 06 00 04 38 E0 00 00 39 00 00 01 90 E1 00 28 7F 87 00 40 91 01 00 20 40 9C 05 58
-
-. 0 1000C9CC 88
-. 81 21 00 18 38 C6 01 08 81 41 00 18 55 29 F8 7E 90 C1 00 34 55 4A F0 BE 90 01 00 24 91 21 00 2C 91 41 00 30 81 61 00 34 83 21 00 20 83 EB FF 00 80 01 00 18 7F 39 F9 D6 81 81 00 28 2F 8C 00 00 7F 60 CB 96 93 21 00 20 39 3B 00 01 55 29 F8 7E 38 09 FF FF 40 9E 06 5C
-
-. 0 1000CA24 28
-. 2F 9F 00 02 3A E0 00 01 83 A1 00 10 83 81 00 14 83 41 00 1C 92 E1 00 28 41 9E 06 60
-
-. 0 1000D09C 20
-. 80 E1 00 20 81 01 00 34 54 F6 F8 7F 82 08 00 00 41 82 00 60
-
-. 0 1000D0B0 92
-. 57 69 20 36 7E C9 03 A6 7D 27 4B 78 39 49 FF F8 39 00 00 00 81 61 00 2C 7C 08 E1 D6 7D 28 5A 14 7D 6A E1 D6 54 00 20 36 7C 1D 04 AE 7D 4A 3A 14 7D AB EC AE 7C 08 B9 D6 7D 08 DA 14 FD 80 68 28 FC 00 68 2A 7D 29 B9 D6 54 00 18 38 7C 1A 05 AE 55 29 18 38 7D 89 D5 AE 42 00 FF BC
-
-. 0 1000D10C 8
-. 2F 9B 00 01 41 BE FD A0
-
-. 0 1000CEB0 28
-. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 FB 28
-
-. 0 1000CECC 12
-. 80 E1 00 28 2F 87 00 01 40 BE 00 4C
-
-. 0 1000CED8 20
-. 81 21 00 18 39 00 00 00 91 01 00 24 7F 88 48 40 40 9C 00 38
-
-. 0 1000CEEC 52
-. 81 41 00 14 7D 29 03 A6 80 61 00 10 55 44 18 38 81 61 00 24 81 81 00 1C 55 60 18 38 39 6B 00 01 7C 0C 04 AE 91 61 00 24 D8 03 00 00 7C 63 22 14 42 00 FF E0
-
-. 0 1000CEFC 36
-. 81 61 00 24 81 81 00 1C 55 60 18 38 39 6B 00 01 7C 0C 04 AE 91 61 00 24 D8 03 00 00 7C 63 22 14 42 00 FF E0
-
-. 0 1000CF20 164
-. 38 60 00 00 80 01 01 14 81 C1 00 38 81 E1 00 3C 7C 08 03 A6 82 01 00 40 82 21 00 44 82 41 00 48 82 61 00 4C 82 81 00 50 82 A1 00 54 82 C1 00 58 82 E1 00 5C 83 01 00 60 83 21 00 64 83 41 00 68 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C C9 C1 00 80 C9 E1 00 88 CA 01 00 90 CA 21 00 98 CA 41 00 A0 CA 61 00 A8 CA 81 00 B0 CA A1 00 B8 CA C1 00 C0 CA E1 00 C8 CB 01 00 D0 CB 21 00 D8 CB 41 00 E0 CB 61 00 E8 CB 81 00 F0 CB A1 00 F8 CB C1 01 00 CB E1 01 08 38 21 01 10 4E 80 00 20
-
-. 0 10001D54 20
-. 7C 1F 04 AE FC 00 68 24 7C 1F 05 AE 7C 00 4A 14 42 00 FF F0
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 2, stride = 1
-. 0 100129D0 8
-. 57 03 10 38 48 01 65 61
-
-. 0 100129D8 16
-. 81 21 00 14 2F 83 00 00 90 69 02 08 41 9E 02 70
-
-. 0 10012A88 32
-. 38 09 00 01 FF 80 D8 90 54 00 F8 7E 7E 5B 93 78 2A 00 00 01 7C 10 03 78 3B 80 00 00 40 91 00 6C
-
-. 0 10012B10 16
-. 3A 94 00 01 7F 7B 92 14 7F 94 98 40 41 9C FF 84
-
-PASS: gsl_fft_real_wavetable_float_alloc, n = 2, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 2
-. 0 10005B90 4
-. 4B FF EB FD
-
-. 0 10003B88 24
-. 55 60 18 38 55 69 10 3A 7C 1B 04 2E 7D 6B E2 14 7C 09 FD 2E 42 00 FF EC
-
-. 0 10012EF0 16
-. 80 06 00 00 81 01 00 18 7F 80 40 00 40 9E 16 B0
-
-. 0 10012F00 16
-. 80 07 00 00 80 E1 00 18 7F 80 38 00 40 9E 16 BC
-
-. 0 10012F10 12
-. 80 01 00 24 7F 80 50 40 40 9C 09 38
-
-. 0 10012F1C 68
-. 80 E1 00 18 38 C6 01 08 81 01 00 18 54 E7 F8 7E 90 C1 00 30 91 41 00 1C 55 0E F0 BE 90 E1 00 2C 81 21 00 24 81 41 00 30 2F 89 00 00 39 31 00 01 83 6A FF 00 55 29 F8 7E 38 09 FF FF 7E 31 D9 D6 40 9E 09 D8
-
-. 0 10012F60 28
-. 2F 9B 00 02 3B 00 00 01 83 A1 00 10 83 E1 00 14 83 21 00 20 93 01 00 24 41 9E 09 DC
-
-. 0 10013954 28
-. 81 81 00 18 56 24 F8 7E 80 E1 00 30 7F 4C 8B 96 83 87 00 00 2F 9A 00 00 41 9E 00 64
-
-. 0 10013970 96
-. 7F 49 03 A6 39 51 FF FF 38 E0 00 00 39 00 00 00 81 21 00 2C 7D 78 39 D6 7C E7 8A 14 7C 08 4A 14 7C 1F 01 D6 55 6B 10 3A 7D 3F 41 D6 54 00 10 3A 7D BD 04 2E 7D 08 22 14 55 29 10 3A 7C 18 51 D6 7C 09 EC 2E 7D 4A 8A 14 ED 80 68 28 EC 00 68 2A 54 00 10 3A 7C 0B CD 2E 7D 99 05 2E 42 00 FF B4
-
-. 0 100139D0 8
-. 2F 84 00 01 41 BE FE 0C
-
-. 0 100137E0 28
-. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 F7 44
-
-. 0 100137FC 12
-. 81 01 00 24 2F 88 00 01 40 BE 00 4C
-
-. 0 10013808 20
-. 81 41 00 18 39 20 00 00 91 21 00 1C 7F 89 50 40 40 9C 00 38
-
-. 0 1001381C 52
-. 81 61 00 14 7D 49 03 A6 80 61 00 10 55 64 10 3A 81 81 00 1C 80 E1 00 20 55 80 10 3A 39 8C 00 01 7C 07 04 2E 91 81 00 1C D0 03 00 00 7C 63 22 14 42 00 FF E0
-
-. 0 1001382C 36
-. 81 81 00 1C 80 E1 00 20 55 80 10 3A 39 8C 00 01 7C 07 04 2E 91 81 00 1C D0 03 00 00 7C 63 22 14 42 00 FF E0
-
-. 0 10013850 164
-. 38 60 00 00 80 01 01 24 81 C1 00 48 81 E1 00 4C 7C 08 03 A6 82 01 00 50 82 21 00 54 82 41 00 58 82 61 00 5C 82 81 00 60 82 A1 00 64 82 C1 00 68 82 E1 00 6C 83 01 00 70 83 21 00 74 83 41 00 78 83 61 00 7C 83 81 00 80 83 A1 00 84 83 C1 00 88 83 E1 00 8C C9 C1 00 90 C9 E1 00 98 CA 01 00 A0 CA 21 00 A8 CA 41 00 B0 CA 61 00 B8 CA 81 00 C0 CA A1 00 C8 CA C1 00 D0 CA E1 00 D8 CB 01 00 E0 CB 21 00 E8 CB 41 00 F0 CB 61 00 F8 CB 81 01 00 CB A1 01 08 CB C1 01 10 CB E1 01 18 38 21 01 20 4E 80 00 20
-
-. 0 100107BC 44
-. 54 C9 10 3A 7C 03 29 D6 39 29 FF FC C1 BD 00 00 7D 29 19 D6 54 00 18 38 7C 09 FC 2E 7D 20 22 14 7C 04 05 2E D1 A9 00 04 4B FF FF B8
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 2, stride = 1
-. 0 1000E854 32
-. 38 09 00 01 FF 80 D8 90 54 00 F8 7E 7E 5B 93 78 2A 00 00 01 7C 10 03 78 3B 80 00 00 40 91 00 6C
-
-. 0 1000E8DC 16
-. 3A 94 00 01 7F 7B 92 14 7F 94 98 40 41 9C FF 84
-
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 2, stride = 1
-. 0 1000EB58 16
-. 80 06 00 00 81 01 00 18 7F 80 40 00 40 9E 16 60
-
-. 0 1000EB68 16
-. 80 07 00 00 80 E1 00 18 7F 80 38 00 40 9E 16 34
-
-. 0 1000EB78 28
-. 80 06 00 04 38 E0 00 00 39 00 00 01 90 E1 00 28 7F 87 00 40 91 01 00 20 40 9C 05 5C
-
-. 0 1000EB94 88
-. 81 21 00 18 38 C6 01 08 81 41 00 18 55 29 F8 7E 90 C1 00 34 55 4A F0 BE 90 01 00 24 91 21 00 2C 91 41 00 30 81 61 00 34 83 21 00 20 83 AB FF 00 80 01 00 18 7F 39 E9 D6 81 81 00 28 2F 8C 00 00 7F 60 CB 96 93 21 00 20 39 3B 00 01 55 29 F8 7E 38 09 FF FF 40 9E 06 60
-
-. 0 1000EBEC 28
-. 2F 9D 00 02 3A E0 00 01 83 E1 00 10 83 81 00 14 83 41 00 1C 92 E1 00 28 41 9E 06 64
-
-. 0 1000F268 20
-. 80 E1 00 20 81 01 00 34 54 F6 F8 7F 82 08 00 00 41 82 00 60
-
-. 0 1000F27C 92
-. 57 69 18 38 7E C9 03 A6 7D 27 4B 78 39 49 FF FC 39 00 00 00 81 61 00 2C 7C 08 E1 D6 7D 28 5A 14 7D 6A E1 D6 54 00 18 38 7C 1F 04 2E 7D 4A 3A 14 7D AB FC 2E 7C 08 B9 D6 7D 08 DA 14 ED 80 68 28 EC 00 68 2A 7D 29 B9 D6 54 00 10 3A 7C 1A 05 2E 55 29 10 3A 7D 89 D5 2E 42 00 FF BC
-
-. 0 1000F2D8 8
-. 2F 9B 00 01 41 BE FD A0
-
-. 0 1000F07C 28
-. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 FB 24
-
-. 0 1000F098 12
-. 80 E1 00 28 2F 87 00 01 40 BE 00 4C
-
-. 0 1000F0A4 20
-. 81 21 00 18 39 00 00 00 91 01 00 24 7F 88 48 40 40 9C 00 38
-
-. 0 1000F0B8 52
-. 81 41 00 14 7D 29 03 A6 80 61 00 10 55 44 10 3A 81 61 00 24 81 81 00 1C 55 60 10 3A 39 6B 00 01 7C 0C 04 2E 91 61 00 24 D0 03 00 00 7C 63 22 14 42 00 FF E0
-
-. 0 1000F0C8 36
-. 81 61 00 24 81 81 00 1C 55 60 10 3A 39 6B 00 01 7C 0C 04 2E 91 61 00 24 D0 03 00 00 7C 63 22 14 42 00 FF E0
-
-. 0 1000F0EC 164
-. 38 60 00 00 80 01 01 14 81 C1 00 38 81 E1 00 3C 7C 08 03 A6 82 01 00 40 82 21 00 44 82 41 00 48 82 61 00 4C 82 81 00 50 82 A1 00 54 82 C1 00 58 82 E1 00 5C 83 01 00 60 83 21 00 64 83 41 00 68 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C C9 C1 00 80 C9 E1 00 88 CA 01 00 90 CA 21 00 98 CA 41 00 A0 CA 61 00 A8 CA 81 00 B0 CA A1 00 B8 CA C1 00 C0 CA E1 00 C8 CB 01 00 D0 CB 21 00 D8 CB 41 00 E0 CB 61 00 E8 CB 81 00 F0 CB A1 00 F8 CB C1 01 00 CB E1 01 08 38 21 01 10 4E 80 00 20
-
-. 0 10003C8C 20
-. 7C 1F 04 2E EC 00 68 24 7C 1F 05 2E 7C 00 4A 14 42 00 FF F0
-
-. 0 10014930 32
-. 55 40 10 3A 55 49 18 38 7C 03 04 2E 7D 69 22 14 7D 4A 2A 14 7C 09 25 2E D1 AB 00 04 42 00 FF E4
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 2, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 2, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 2
-PASS: gsl_fft_complex_forward with signal_noise, n = 2, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 2, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 2, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 2, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 2, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 2, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 2, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 2, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 2, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 2, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 2
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 2, stride = 2
-. 0 10002B38 12
-. 2B 84 00 01 39 6B 00 02 40 9D 00 88
-
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 2, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 2, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 2, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 2, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 2, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 2, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 2, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 2, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 2, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 2
-PASS: gsl_fft_real with signal_real_noise, n = 2, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 2, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 2, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 2, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 2
-PASS: gsl_fft_real_float with signal_real_noise, n = 2, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 2, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 2, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 2, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 2
-PASS: gsl_fft_complex_forward with signal_noise, n = 2, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 2, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 2, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 2, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 2, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 2, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 2, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 2, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 2, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 2, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 2
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 2, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 2, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 2, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 2, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 2, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 2, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 2, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 2, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 2, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 2, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 2
-PASS: gsl_fft_real with signal_real_noise, n = 2, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 2, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 2, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 2, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 2
-PASS: gsl_fft_real_float with signal_real_noise, n = 2, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 2, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 2, stride = 3
-. 0 FEEF8E8 20
-. 80 E9 00 0C 61 4A 00 01 80 07 00 04 7F 80 50 40 41 9C 00 14
-
-. 0 FEEF8FC 12
-. 7D 2B 4B 78 7C E9 3B 78 4B FF FE F0
-
-. 0 FEEFCA0 32
-. 57 AF 10 3A 60 F2 00 01 7D F6 9B 78 39 0A 00 08 92 CA 00 04 7C E3 39 2E 92 43 00 04 4B FF F9 F4
-
-. 0 10006994 16
-. 3B 80 00 01 3B E0 00 00 7F 9C B0 40 41 9D 00 64
-
-PASS: gsl_fft_complex_wavetable_alloc, n = 3, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 3
-. 0 10006F78 8
-. 2F 97 00 03 41 9E 08 1C
-
-. 0 10007798 72
-. 3D 20 AA AA 81 81 00 24 61 29 AA AB 80 E1 00 18 7D 6C 48 16 3A 40 00 00 80 C1 01 88 7F 92 78 40 55 E0 20 36 82 66 00 00 38 80 00 00 7D 27 48 16 55 63 F8 7E 7E 20 9A 14 38 A0 00 00 54 77 08 3C 55 34 F8 7E 40 BC FD 9C
-
-. 0 100077E0 60
-. 81 1E 80 4C 7E 6C 9B 78 81 3E 80 50 7E 35 8B 78 81 5E 80 48 56 96 08 3C 82 1E 80 40 3E 60 43 30 81 DE 80 44 3B A0 00 00 CB 68 00 00 CB 49 00 00 CB 2A 00 00 2F 92 00 00 40 9E 01 64
-
-. 0 1000781C 24
-. CB D0 00 00 CB AE 00 00 FC 20 F0 90 FF E0 E8 90 2F 83 00 00 41 9E 01 2C
-
-. 0 10007834 296
-. 81 61 00 1C FF 80 D8 90 92 61 00 08 57 A6 20 36 6D 60 80 00 57 3B 20 36 90 01 00 0C 7C 05 C1 D6 C8 01 00 08 57 1C 20 36 7C 69 03 A6 FC 00 D0 28 54 07 20 36 FC 40 06 72 7C 04 A2 14 7D 76 22 14 7C 00 C9 D6 7D 26 FA 14 C8 E9 00 08 7D 07 D2 14 7D 06 FC AE 38 84 00 01 7F BD CA 14 7D 6B C9 D6 54 00 20 36 7D 40 FA 14 7D BF 04 AE C8 0A 00 08 7C 05 1A 14 7C C6 DA 14 55 6B 20 36 7C 00 C1 D6 7D 2B FA 14 7D 8B FC AE C9 69 00 08 7D 37 2A 14 FC 8D 60 2A 38 A5 00 01 FC 60 58 2A 7D 29 C1 D6 FD AD 60 28 54 00 20 36 FC 00 58 28 7D 60 D2 14 FD 44 07 32 55 29 20 36 FD 83 07 32 7D 49 D2 14 FD A2 03 72 FC 02 00 32 FD 48 50 28 FD 87 60 28 FD 08 20 2A FD 6A 00 2A FD 2C 68 28 FD 4A 00 28 7D 07 D5 AE FD 8C 68 2A 7C E7 E2 14 FC BF 02 F2 FC 1D 02 B2 FD BD 03 32 FC DF 02 72 FD 9E 03 3A FD 21 2A 7A FD 5E 6A B8 FD 61 32 F8 FC E7 18 2A D8 E8 00 08 7D 5A 05 AE D9 8B 00 08 7D 69 D5 AE D9 2A 00 08 42 00 FF 14
-
-. 0 1000795C 24
-. 3A 52 00 01 7C A5 BA 14 7F 92 78 40 39 8C 00 10 3A B5 00 10 40 BC FC 08
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 3, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 3, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 3, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 3, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 3, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 3, stride = 1
-. 0 FEEECBC 20
-. 81 7A 00 08 81 3A 00 0C 80 0B 00 0C 7C 80 D0 00 40 86 04 DC
-
-. 0 FEEECD0 12
-. 80 A9 00 08 7F 05 D0 00 40 9A 04 D0
-
-. 0 FEEECDC 56
-. 91 69 00 08 91 2B 00 0C 7F BD DA 14 38 7C 00 38 63 A8 00 01 80 C3 00 08 90 7F 00 0C 90 DF 00 08 91 1F 00 04 7F BF E9 2E 93 E6 00 0C 93 E3 00 08 28 9D FF FF 40 85 01 24
-
-. 0 100097BC 16
-. 3B 80 00 01 3B E0 00 00 7F 9C B0 40 41 9D 00 6C
-
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 3, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 3
-. 0 10009DA0 8
-. 2F 97 00 03 41 9E 08 14
-
-. 0 1000A5B8 72
-. 3D 20 AA AA 81 81 00 24 61 29 AA AB 81 01 00 18 7D 6C 48 16 3A 40 00 00 80 E1 01 44 7F 92 78 40 55 E0 18 38 82 87 00 00 38 80 00 00 7D 28 48 16 55 63 F8 7E 7E 20 A2 14 38 A0 00 00 54 77 08 3C 55 33 F8 7E 40 BC FD 9C
-
-. 0 1000A600 60
-. 81 3E 80 D8 7E 8C A3 78 81 5E 80 DC 7E 35 8B 78 81 7E 80 D4 56 76 08 3C 82 1E 80 CC 3E 80 43 30 81 DE 80 D0 3B A0 00 00 CB 69 00 00 CB 4A 00 00 C3 2B 00 00 2F 92 00 00 40 9E 01 80
-
-. 0 1000A63C 24
-. C3 B0 00 00 C3 8E 00 00 FF E0 E8 90 FF C0 E0 90 2F 83 00 00 41 9E 01 48
-
-. 0 1000A654 324
-. 80 E1 00 1C FC 20 D8 90 92 81 00 08 57 A6 18 38 6C E0 80 00 57 3B 18 38 90 01 00 0C 7C 05 C1 D6 C8 01 00 08 57 1C 18 38 7C 69 03 A6 FC 00 D0 28 54 07 18 38 FC 00 00 18 EC 40 06 72 7C 04 9A 14 7D 76 22 14 7C 00 C9 D6 7D 26 FA 14 C0 A9 00 04 38 84 00 01 7C C6 FC 2E 7F BD CA 14 FD 80 28 90 7C C6 DA 14 7D 6B C9 D6 54 00 18 38 7D 40 FA 14 7D 3F 04 2E C1 4A 00 04 FD 60 30 90 7C 05 1A 14 55 6B 18 38 7C 00 C1 D6 7D 2B FA 14 7D 0B FC 2E C0 E9 00 04 7D 77 2A 14 EC 89 40 2A 7D 27 D2 14 EC 6A 38 2A 7D 6B C1 D6 ED 29 40 28 54 00 18 38 FC 00 20 90 7D 40 D2 14 FD A0 18 90 38 A5 00 01 ED 4A 38 28 55 6B 18 38 FC 00 00 72 7D 0B D2 14 FD AD 00 72 FD 6B 00 28 ED 22 02 72 FD 8C 68 28 ED 42 02 B2 FD 60 58 18 FD 80 60 18 EC C6 20 2A EC 0B 50 2A ED AC 48 28 ED 6B 50 28 7C C7 D5 2E ED 8C 48 2A 7C E7 E2 14 ED 3E 00 32 ED 5C 02 F2 ED 1C 03 32 EC FE 03 72 EC A5 18 2A ED 9D 53 3A ED BF 4B 7A ED 7D 42 F8 D0 A9 00 04 EC 1F 38 38 7D 7A 05 2E D1 8A 00 04 7C 0B D5 2E D1 A8 00 04 42 00 FE FC
-
-. 0 1000A798 24
-. 3A 52 00 01 7C A5 BA 14 7F 92 78 40 39 8C 00 08 3A B5 00 08 40 BC FB EC
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 3, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 3, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 3, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 3, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 3, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 3, stride = 1
-. 0 10010AB8 8
-. 3B 80 00 00 40 91 00 64
-
-PASS: gsl_fft_real_wavetable_alloc, n = 3, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 3
-. 0 10010F8C 8
-. 2F 9B 00 03 41 9E 0E 5C
-
-. 0 10011DEC 56
-. 80 E1 00 18 3D 20 AA AA 81 01 00 30 61 29 AA AB 7E A7 8B 96 54 00 20 36 83 88 00 00 7E E0 E2 14 2F 95 00 00 7C 11 48 16 7D 27 48 16 54 1B F8 7E 55 23 F8 7E 41 9E 00 A4
-
-. 0 10011E24 160
-. 81 3E 82 50 57 66 08 3C 81 7E 82 54 39 46 FF FF C9 49 00 00 38 E0 00 00 C9 2B 00 00 39 00 00 00 7E A9 03 A6 7C 08 1A 14 55 4B 18 38 7D 20 1A 14 7C 1D 01 D6 39 6B 00 08 7D 3D 49 D6 54 00 18 38 7D BF 04 AE 55 29 18 38 7C 1D 41 D6 7C 09 FC AE 7D 08 DA 14 FD 6D 00 2A FD AD 00 28 54 00 18 38 7C 1F 04 AE 7D 38 39 D6 FD 8B 02 B2 7C E7 8A 14 FD AD 02 72 7C 18 51 D6 55 29 18 38 FD 80 60 28 7D 4A 8A 14 FC 00 58 2A 7D 6B C1 D6 54 00 18 38 7C 09 CD AE 7D 99 05 AE 7D AB CD AE 42 00 FF 88
-
-. 0 10011EC4 8
-. 2F 9B 00 01 41 BE F8 EC
-
-. 0 1000E4FC 84
-. 54 6A 20 36 54 60 18 38 7C E0 FA 14 7D 4C 53 78 7C 03 41 D6 38 A5 00 01 7D AA FC AE 7D 05 30 50 7F 88 28 40 C8 07 00 00 FD 80 68 50 7D 2A 22 14 54 00 20 36 7C 0A 25 AE 7D 60 22 14 D9 A9 00 08 7C E7 62 14 7C 04 05 AE 7D 4A 62 14 D9 8B 00 08 41 9D FF C0
-
-PASS: gsl_fft_real with signal_real_noise, n = 3, stride = 1
-. 0 1000C6AC 8
-. 3B 80 00 00 40 91 00 64
-
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 3, stride = 1
-. 0 1000CA40 8
-. 2F 9F 00 03 41 9E 08 70
-
-. 0 1000D2B4 48
-. 81 41 00 20 54 00 20 36 81 61 00 34 7E 8A FB 96 81 9E 81 64 82 0B 00 00 83 21 00 18 7F 00 82 14 CB CC 00 00 2F 94 00 00 7F F9 FB 96 41 9E 00 94
-
-. 0 1000D2E4 144
-. FD 3E F0 2A 7E 89 03 A6 57 66 08 3C 38 E0 00 00 1C 07 00 03 7D 07 FA 14 7D 48 FA 14 7D 17 41 D6 7D 26 02 14 39 29 FF FF 55 2B 18 38 39 6B 00 08 7C 1C 01 D6 55 08 18 38 7D 6B E1 D6 54 00 18 38 7D 7D 04 AE 7D 3C 49 D6 7D AB EC AE FD A9 03 72 55 29 18 38 7C 17 39 D6 7C 09 EC AE 7C E7 DA 14 FD 8B 00 28 FC 00 00 2A 7D 57 51 D6 54 00 18 38 FD 4C 68 2A FD 6B 00 2A FD 8C 68 28 55 4A 18 38 7D 7A 05 AE 7D 88 D5 AE 7D 4A D5 AE 42 00 FF 84
-
-. 0 1000D374 8
-. 2F 9B 00 01 41 BE FB 38
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 3, stride = 1
-. 0 10012AA0 8
-. 3B 80 00 00 40 91 00 6C
-
-PASS: gsl_fft_real_wavetable_float_alloc, n = 3, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 3
-. 0 10012F7C 8
-. 2F 9B 00 03 41 9E 0E 9C
-
-. 0 10013E1C 56
-. 80 E1 00 18 3D 20 AA AA 81 01 00 30 61 29 AA AB 7E A7 8B 96 54 00 18 38 83 88 00 00 7E E0 E2 14 2F 95 00 00 7C 11 48 16 7D 27 48 16 54 1B F8 7E 55 23 F8 7E 41 9E 00 B0
-
-. 0 10013E54 172
-. 81 3E 82 A8 57 66 08 3C 81 7E 82 AC 39 46 FF FF C9 29 00 00 38 E0 00 00 C1 0B 00 00 39 00 00 00 7E A9 03 A6 7C 08 1A 14 55 4B 10 3A 7D 20 1A 14 7C 1F 01 D6 39 6B 00 04 7D 3F 49 D6 54 00 10 3A 7D 7D 04 2E 55 29 10 3A 7C 1F 41 D6 7C 09 EC 2E 7D 08 DA 14 ED 4B 00 2A 54 00 10 3A ED 6B 00 28 7D 9D 04 2E 7D 38 39 D6 FD A0 50 90 7C E7 8A 14 FC 00 60 90 ED 6B 02 32 FD AD 02 72 7C 18 51 D6 55 29 10 3A ED 8C 50 2A 7D 4A 8A 14 FC 00 68 28 7D 6B C1 D6 54 00 10 3A 7D 89 CD 2E FC 00 00 18 7C 19 05 2E 7D 6B CD 2E 42 00 FF 7C
-
-. 0 10013F00 8
-. 2F 9B 00 01 41 BE F8 DC
-
-. 0 10010740 84
-. 54 6A 18 38 54 60 10 3A 7C E0 FA 14 7D 4C 53 78 7C 03 41 D6 38 A5 00 01 7D AA FC 2E 7D 05 30 50 7F 88 28 40 C0 07 00 00 FD 80 68 50 7D 2A 22 14 54 00 18 38 7C 0A 25 2E 7D 60 22 14 D1 A9 00 04 7C E7 62 14 7C 04 05 2E 7D 4A 62 14 D1 8B 00 04 41 9D FF C0
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 3, stride = 1
-. 0 1000E86C 8
-. 3B 80 00 00 40 91 00 6C
-
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 3, stride = 1
-. 0 1000EC08 8
-. 2F 9D 00 03 41 9E 08 74
-
-. 0 1000F480 48
-. 81 41 00 20 54 00 18 38 81 61 00 34 7E 6A EB 96 81 9E 81 DC 82 0B 00 00 C3 AC 00 00 7E C0 82 14 80 01 00 18 2F 93 00 00 7F 20 EB 96 41 9E 00 94
-
-. 0 1000F4B0 144
-. ED 3D E8 2A 7E 69 03 A6 57 66 08 3C 38 E0 00 00 1C 07 00 03 7D 07 CA 14 7D 48 CA 14 7D 17 41 D6 7D 26 02 14 39 29 FF FF 55 2B 10 3A 7C 1C 01 D6 39 6B 00 04 55 08 10 3A 7D 3C 49 D6 54 00 10 3A 7D 7F 04 2E 7D 6B E1 D6 55 29 10 3A 7C 09 FC 2E ED 8B 00 28 7D AB FC 2E EC 00 00 2A 7C 17 39 D6 7C E7 DA 14 ED A9 03 72 ED 6B 00 2A 7D 57 51 D6 ED 4C 68 2A ED 8C 68 28 54 00 10 3A 7D 7A 05 2E 55 4A 10 3A 7D 88 D5 2E 7D 4A D5 2E 42 00 FF 84
-
-. 0 1000F540 8
-. 2F 9B 00 01 41 BE FB 38
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 3, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 3, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 3
-PASS: gsl_fft_complex_forward with signal_noise, n = 3, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 3, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 3, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 3, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 3, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 3, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 3, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 3, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 3, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 3, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 3
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 3, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 3, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 3, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 3, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 3, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 3, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 3, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 3, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 3, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 3, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 3
-PASS: gsl_fft_real with signal_real_noise, n = 3, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 3, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 3, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 3, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 3
-PASS: gsl_fft_real_float with signal_real_noise, n = 3, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 3, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 3, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 3, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 3
-PASS: gsl_fft_complex_forward with signal_noise, n = 3, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 3, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 3, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 3, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 3, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 3, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 3, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 3, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 3, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 3, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 3
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 3, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 3, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 3, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 3, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 3, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 3, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 3, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 3, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 3, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 3, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 3
-PASS: gsl_fft_real with signal_real_noise, n = 3, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 3, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 3, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 3, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 3
-. 0 FEF8878 20
-. 80 04 00 00 38 63 FF E4 38 84 FF E8 38 A5 00 06 4B FF FF B4
-
-. 0 FEF883C 24
-. 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 3, stride = 3
-. 0 FEEF994 16
-. 81 29 00 08 80 E9 00 04 7C 87 C8 40 40 84 01 54
-
-. 0 FEEFAF4 16
-. 81 DD 00 04 55 DF 00 38 7D 9F C8 40 41 8C FF F0
-
-. 0 FEEFB04 24
-. 81 7D 00 08 7F 19 F8 50 81 3D 00 0C 82 0B 00 0C 7F 10 E8 00 40 9A 05 AC
-
-. 0 FEEFB1C 12
-. 82 29 00 08 7C 11 E8 00 40 82 05 A0
-
-. 0 FEEFB28 16
-. 91 69 00 08 91 2B 00 0C 28 98 00 0F 41 85 05 54
-
-. 0 FEF0088 60
-. 31 2F FF FF 7C A9 79 10 63 17 00 01 54 A0 10 3A 7D 3D CA 14 7C 0C A3 78 39 1D 00 08 91 3C 00 44 91 9D 00 04 91 3C 00 40 7F 09 C1 2E 93 49 00 0C 92 E9 00 04 93 49 00 08 4B FF F5 F0
-
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 3, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 3, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 4, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 4
-. 0 10006F80 8
-. 2F 97 00 04 41 9E 0A 2C
-
-. 0 100079B0 52
-. 39 C0 00 00 81 81 01 88 7F 8E 78 40 80 C1 00 24 82 6C 00 00 55 E0 20 36 54 DC F0 BE 3B A0 00 00 7E 20 9A 14 38 60 00 00 7E 40 8A 14 1E BC 00 03 40 BC FB 98
-
-. 0 100079E4 68
-. 81 01 01 84 3D 60 43 30 80 E1 00 1C 7E 2C 8B 78 81 3E 80 44 7E 71 9B 78 81 5E 80 50 2F 07 FF FF 1E 08 00 03 91 21 01 7C 55 14 08 3C 57 93 08 3C CA CA 00 00 7D 68 03 A6 3B 60 00 00 2F 8E 00 00 40 9E 01 C0
-
-. 0 10007A28 40
-. 80 DE 80 40 80 E1 01 7C CB 06 00 00 CA E7 00 00 FF 60 C0 90 FF 20 B8 90 FF 80 C0 90 FF 40 B8 90 2F 9C 00 00 41 9E 01 74
-
-. 0 10007A50 368
-. 81 01 00 1C 7D 28 02 A6 57 64 20 36 57 36 20 36 6D 00 80 00 57 17 20 36 90 01 00 0C 7C 03 C1 D6 91 21 00 08 7F 89 03 A6 C8 01 00 08 54 05 20 36 FF A0 B0 28 81 41 01 84 7D 70 EA 14 7D 6B C9 D6 7D 24 FA 14 7C 1D 52 14 C9 29 00 08 7D 54 EA 14 7D 84 FC AE 7C C5 D2 14 7C 00 C9 D6 55 6B 20 36 7D 2B FA 14 7C CB FC AE C8 49 00 08 7D 73 1A 14 3B BD 00 01 54 00 20 36 7D 4A C9 D6 7D 00 FA 14 7C 7F 04 AE C8 88 00 08 7C 15 1A 14 FD 43 30 28 7F 7B CA 14 FD 64 10 28 55 4A 20 36 7D 2A FA 14 7D 0A FC AE C8 E9 00 08 FD 5D 02 B2 7D 23 E2 14 7D 6B C1 D6 FD 7D 02 F2 7C 84 B2 14 38 63 00 01 FC 0C 40 28 FD A9 38 28 7D 29 C1 D6 FC 63 30 2A 55 6B 20 36 FC 84 10 2A 7D 0B D2 14 FD 8C 40 2A FD 29 38 2A 7C 00 C1 D6 FC A0 58 2A 55 29 20 36 FC CD 50 28 7D 49 D2 14 FD 0C 18 28 FC E9 20 28 54 00 20 36 FD AD 50 2A 7C E0 D2 14 FC 00 58 28 FF D9 02 32 FD 77 00 32 FD 5A 01 72 FC 57 03 72 FC 39 01 F2 FF FA 01 B2 FD B8 5B 7A FC FB F1 FA FC DC 51 BA FC 18 10 38 FD 1B 0A 38 FC BC F9 78 FD 8C 18 2A FD 29 20 2A 7D 85 D5 AE 7C A5 BA 14 D9 26 00 08 7C 09 D5 AE D9 AA 00 08 7D 0B D5 AE D8 E8 00 08 7C BA 05 AE D8 C7 00 08 42 00 FE C8
-
-. 0 10007BC0 28
-. 39 CE 00 01 7C 63 AA 14 7F 8E 78 40 3A 31 00 10 39 8C 00 10 3A 52 00 10 40 BC F9 A0
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 4, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 4, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 4, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 4, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 4, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 4, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 4, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 4
-. 0 10009DA8 8
-. 2F 97 00 04 41 9E 0A 40
-
-. 0 1000A7EC 52
-. 39 C0 00 00 81 01 01 44 7F 8E 78 40 81 21 00 24 82 88 00 00 55 E0 18 38 55 3C F0 BE 3B A0 00 00 7E 20 A2 14 38 60 00 00 7E 40 8A 14 1E BC 00 03 40 BC FB 7C
-
-. 0 1000A820 80
-. 81 61 01 40 3D 20 43 30 81 9E 80 CC 57 93 08 3C 81 41 00 1C 1E 0B 00 03 80 FE 80 D0 7D 28 03 A6 81 1E 80 DC 2F 0A FF FF 91 81 01 34 3B 60 00 00 7E 4C 93 78 90 E1 01 38 7E 32 8B 78 CA C8 00 00 7E 91 A3 78 55 74 08 3C 2F 8E 00 00 40 9E 01 C4
-
-. 0 1000A870 40
-. 81 41 01 34 81 61 01 38 C3 0A 00 00 C2 EB 00 00 FF 60 C0 90 FF 40 B8 90 FF 80 C0 90 FF 20 B8 90 2F 9C 00 00 41 9E 01 78
-
-. 0 1000A898 372
-. 80 E1 00 1C 7D 08 02 A6 57 64 18 38 57 36 18 38 6C E0 80 00 57 17 18 38 90 01 00 0C 7C 03 C1 D6 91 01 00 08 7F 89 03 A6 C8 01 00 08 FC 00 B0 28 54 05 18 38 FF A0 00 18 81 21 01 40 7D 70 EA 14 7D 6B C9 D6 7D 54 EA 14 7C 1D 4A 14 7D A4 FC 2E 7D 24 FA 14 C0 E9 00 04 3B BD 00 01 7C 00 C9 D6 55 6B 18 38 7D 2B FA 14 7C AB FC 2E C0 89 00 04 7D 75 1A 14 7F 7B CA 14 7D 4A C9 D6 54 00 18 38 7D 00 FA 14 7C 7F 04 2E C0 C8 00 04 7C 03 E2 14 ED 43 28 28 7C 84 B2 14 55 4A 18 38 EC 06 20 28 7D 2A FA 14 7D 2A FC 2E C1 09 00 04 ED 5D 02 B2 ED 8D 48 28 7D 33 1A 14 ED 67 40 28 7C 00 C1 D6 EC 1D 00 32 7D 45 D2 14 ED AD 48 2A 38 63 00 01 EC E7 40 2A EC 63 28 2A 7D 29 C1 D6 EC C6 20 2A 54 00 18 38 EC 4C 00 2A 7D 00 D2 14 EC 8B 50 28 ED 0D 18 28 7D 6B C1 D6 EC A7 30 28 55 29 18 38 ED 8C 00 28 7C E9 D2 14 ED 6B 50 2A EF FA 02 32 55 6B 18 38 EC 37 03 32 7C CB D2 14 EF D9 00 B2 EC 17 02 F2 ED 5A 01 72 ED 39 01 32 ED 78 0A FA EC BB F9 7A EC 9C F1 3A ED 98 03 38 ED 1B 52 38 EC 5C 48 B8 ED AD 18 2A EC E7 30 2A 7D A5 D5 2E 7C A5 BA 14 D0 EA 00 04 7D 9A 05 2E D1 68 00 04 7D 09 D5 2E D0 A7 00 04 7C 4B D5 2E D0 86 00 04 42 00 FE C8
-
-. 0 1000AA0C 28
-. 39 CE 00 01 7C 63 AA 14 7F 8E 78 40 3A 31 00 08 3A 52 00 08 39 8C 00 08 40 BC F9 74
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 4, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 4, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 4, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 4, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 4, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 4, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 4, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 4
-. 0 10010F94 8
-. 2F 9B 00 04 41 9E 11 B0
-
-. 0 10012148 40
-. 81 61 00 18 54 00 20 36 81 81 00 30 56 3A F0 BE 7E 4B 8B 96 83 8C 00 00 7E E0 E2 14 7E A0 BA 14 2F 92 00 00 41 9E 00 B8
-
-. 0 10012170 180
-. 57 44 08 3C 7E 49 03 A6 38 E4 FF FF 38 A0 00 00 38 C0 00 00 7C 06 72 14 7D 44 3A 14 7D 20 72 14 7C 1D 01 D6 7D 69 72 14 54 E8 18 38 39 08 00 08 54 00 18 38 7D 3D 49 D6 7D BF 04 AE 7D 7D 59 D6 55 29 18 38 7D 29 FC AE 7C 1D 31 D6 55 6B 18 38 7D 6B FC AE 7C C6 D2 14 FD 4D 58 28 54 00 18 38 FD AD 58 2A 7D 9F 04 AE 7D 38 39 D6 FD 40 50 50 7C E7 8A 14 FC 0C 48 2A FD 8C 48 28 7C 18 29 D6 55 29 18 38 FD 60 68 28 7C A5 8A 14 FC 00 68 2A 7D 58 51 D6 54 00 18 38 7C 19 05 AE 7D 89 CD AE 7D 08 C1 D6 55 4A 18 38 7D 48 CD AE 7D 6A CD AE 42 00 FF 64
-
-. 0 10012224 8
-. 2F 9A 00 01 41 BE F5 8C
-
-PASS: gsl_fft_real with signal_real_noise, n = 4, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 4, stride = 1
-. 0 1000CA48 8
-. 2F 9F 00 04 41 9E 0B A8
-
-. 0 1000D5F4 32
-. 81 01 00 20 54 00 20 36 81 21 00 34 55 11 F0 BF 82 09 00 00 7F 00 82 14 7E C0 C2 14 41 82 00 BC
-
-. 0 1000D614 184
-. 7E 29 03 A6 57 63 08 3C 38 A0 00 00 54 A0 10 3A 81 81 00 30 7D 23 02 14 7C 1C 01 D6 39 29 FF FF 55 2A 18 38 7D 63 4A 14 39 4A 00 08 7D 7C 59 D6 54 00 18 38 7D 9D 04 AE 7D 05 62 14 7C E8 62 14 7D 3C 49 D6 55 6B 18 38 7D 4B EC AE 7C C7 62 14 FD 6C 50 28 7D 4A E1 D6 55 29 18 38 7C 09 EC AE FD 8C 50 2A FC 00 00 2A 7D AA EC AE 7C 17 29 D6 7C A5 DA 14 FD AD 68 2A FD 4C 00 28 7D 17 41 D6 FD 8C 00 2A FD 2B 68 2A 54 00 18 38 FD 6B 68 28 7D 9A 05 AE 7C F7 39 D6 55 08 18 38 7D 68 D5 AE 7C D7 31 D6 54 E7 18 38 7D 47 D5 AE 54 C6 18 38 7D 26 D5 AE 42 00 FF 58
-
-. 0 1000D6CC 8
-. 2F 9B 00 01 41 BE F7 E0
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 4, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 4, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 4
-. 0 10012F84 8
-. 2F 9B 00 04 41 9E 12 1C
-
-. 0 100141A4 40
-. 81 81 00 18 54 00 18 38 80 E1 00 30 56 3A F0 BE 7E 4C 8B 96 83 87 00 00 7E E0 E2 14 7F 60 BA 14 2F 92 00 00 41 9E 00 B8
-
-. 0 100141CC 180
-. 57 44 08 3C 7E 49 03 A6 38 E4 FF FF 38 A0 00 00 38 C0 00 00 7C 06 72 14 7D 44 3A 14 7D 20 72 14 7C 1F 01 D6 7D 69 72 14 54 E8 10 3A 39 08 00 04 54 00 10 3A 7D 3F 49 D6 7D BD 04 2E 7D 7F 59 D6 55 29 10 3A 7D 29 EC 2E 7C 1F 31 D6 55 6B 10 3A 7D 6B EC 2E 7C C6 D2 14 ED 4D 58 28 54 00 10 3A ED AD 58 2A 7D 9D 04 2E 7D 38 39 D6 FD 40 50 50 7C E7 8A 14 EC 0C 48 2A ED 8C 48 28 7C 18 29 D6 55 29 10 3A ED 60 68 28 7C A5 8A 14 EC 00 68 2A 7D 58 51 D6 54 00 10 3A 7C 19 05 2E 7D 89 CD 2E 7D 08 C1 D6 55 4A 10 3A 7D 48 CD 2E 7D 6A CD 2E 42 00 FF 64
-
-. 0 10014280 8
-. 2F 9A 00 01 41 BE F5 5C
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 4, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 4, stride = 1
-. 0 1000EC10 8
-. 2F 9D 00 04 41 9E 0B C4
-
-. 0 1000F7D8 32
-. 81 01 00 20 54 00 18 38 81 21 00 34 55 11 F0 BF 82 09 00 00 7E C0 82 14 7F 20 B2 14 41 82 00 BC
-
-. 0 1000F7F8 184
-. 7E 29 03 A6 57 63 08 3C 38 A0 00 00 54 A0 10 3A 81 81 00 30 7D 23 02 14 7C 1C 01 D6 39 29 FF FF 55 2A 10 3A 7D 63 4A 14 39 4A 00 04 7D 7C 59 D6 54 00 10 3A 7D 9F 04 2E 7D 05 62 14 7C E8 62 14 7D 3C 49 D6 55 6B 10 3A 7D 4B FC 2E 7C C7 62 14 ED 6C 50 28 7D 4A E1 D6 55 29 10 3A 7C 09 FC 2E ED 8C 50 2A EC 00 00 2A 7D AA FC 2E 7C 17 29 D6 7C A5 DA 14 ED AD 68 2A ED 4C 00 28 7D 17 41 D6 ED 8C 00 2A ED 2B 68 2A 54 00 10 3A ED 6B 68 28 7D 9A 05 2E 7C F7 39 D6 55 08 10 3A 7D 68 D5 2E 7C D7 31 D6 54 E7 10 3A 7D 47 D5 2E 54 C6 10 3A 7D 26 D5 2E 42 00 FF 58
-
-. 0 1000F8B0 8
-. 2F 9B 00 01 41 BE F7 C8
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 4, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 4, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 4
-PASS: gsl_fft_complex_forward with signal_noise, n = 4, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 4, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 4, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 4, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 4, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 4, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 4, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 4, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 4, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 4, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 4
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 4, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 4, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 4, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 4, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 4, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 4, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 4, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 4, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 4, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 4, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 4
-PASS: gsl_fft_real with signal_real_noise, n = 4, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 4, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 4, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 4, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 4
-PASS: gsl_fft_real_float with signal_real_noise, n = 4, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 4, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 4, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 4, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 4
-PASS: gsl_fft_complex_forward with signal_noise, n = 4, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 4, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 4, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 4, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 4, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 4, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 4, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 4, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 4, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 4, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 4
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 4, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 4, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 4, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 4, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 4, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 4, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 4, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 4, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 4, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 4, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 4
-PASS: gsl_fft_real with signal_real_noise, n = 4, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 4, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 4, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 4, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 4
-PASS: gsl_fft_real_float with signal_real_noise, n = 4, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 4, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 4, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 5, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 5
-. 0 10006F88 8
-. 2F 97 00 05 41 9E 0C BC
-
-. 0 10007C48 80
-. 81 81 01 88 3C 00 CC CC 80 C1 00 18 60 00 CC CD 81 61 00 24 3B 80 00 00 82 6C 00 00 3B 60 00 00 7D 4B 00 16 81 3E 80 54 55 EB 20 36 7E 2B 9A 14 C8 29 00 00 7E 4B 8A 14 7C 06 00 16 55 57 F0 BE 7F AB 92 14 56 F0 10 3A 54 15 F0 BE 48 02 13 01
-
-. 0 10007C98 16
-. 81 3E 80 58 FE E0 08 90 C8 29 00 00 48 02 12 F1
-
-. 0 10007CA8 16
-. 7F 9C 78 40 FF 00 08 90 93 81 00 30 40 BC F8 C4
-
-. 0 10007CB8 64
-. 1C 17 00 03 80 DE 80 44 92 41 01 70 1D D5 00 03 92 21 01 74 7C 08 03 A6 90 C1 01 68 56 B2 08 3C 93 A1 01 6C 56 B1 10 3A 92 61 01 78 56 EC 08 3C 3A C0 00 00 80 E1 00 30 2F 87 00 00 40 9E 02 B8
-
-. 0 10007CF8 48
-. 81 1E 80 40 81 21 01 68 CA 08 00 00 C9 E9 00 00 FE 40 80 90 FE 20 78 90 FE C0 80 90 FE A0 78 90 FE 80 80 90 FE 60 78 90 2F 97 00 00 41 9E 02 34
-
-. 0 10007D28 400
-. 80 C1 00 1C 3C E0 43 30 81 1E 80 50 56 DD 20 36 6C C0 80 00 90 E1 00 08 90 01 00 0C 7C 1C C1 D6 C8 01 00 08 57 33 20 36 C8 48 00 00 57 14 20 36 80 DE 80 5C 7E E9 03 A6 FF 20 10 28 54 03 20 36 C9 C6 00 00 7C 1B AA 14 7D 72 DA 14 7D 4E DA 14 7D 11 DA 14 7C 00 C9 D6 7D 3D FA 14 CB 89 00 08 7C 83 D2 14 7F BD FC AE 3B 7B 00 01 7E D6 CA 14 7D 6B C9 D6 54 00 20 36 7D 20 FA 14 7C FF 04 AE C9 49 00 08 7C 1C BA 14 7F BD 9A 14 7D 4A C9 D6 55 6B 20 36 7C CB FA 14 7D AB FC AE C8 06 00 08 7D 08 C9 D6 55 4A 20 36 7C EA FA 14 7D 8A FC AE C9 67 00 08 7C E8 02 A6 FC 8D 60 2A 7D 50 E2 14 55 08 20 36 FC 60 58 2A 7D 28 FA 14 7C 48 FC AE C8 29 00 08 FD AD 60 28 FD 27 10 2A 81 1E 80 60 FD 0A 08 2A 7D 67 E2 14 FC 00 58 28 7D 2C E2 14 FF 69 20 2A 7C 00 C1 D6 FF 48 18 2A 3B 9C 00 01 FC E7 10 28 C8 48 00 00 FC B7 03 72 7D 29 C1 D6 54 00 20 36 FC D7 00 32 7C E0 D2 14 FD B8 03 72 7D 6B C1 D6 55 29 20 36 FC 18 00 32 7C C9 D2 14 FD 4A 08 28 FD 29 20 28 7D 4A C1 D6 FD 08 18 28 55 6B 20 36 FD 7B 00 B2 7C AB D2 14 FD 9A 00 B2 55 4A 20 36 7D 0A D2 14 FC B8 29 F8 FC D8 32 B8 FC F7 69 FA FD 57 02 BA FD 29 03 B2 FD 08 03 B2 FD 7D 58 28 FD 9C 60 28 FC F9 01 F2 FD 59 02 B2 FC B9 01 72 FC D9 01 B2 FC 0B 48 28 FD AC 40 28
-
-. 0 10007EB8 160
-. FD 6B 48 2A FD 8C 40 2A FC 80 30 2A FC 6D 28 28 FC 4B 50 2A FC 2C 38 28 FD 6B 50 28 FC 00 30 28 FD AD 28 2A FD 8C 38 2A FF CF 02 F2 FF F1 00 32 FC B5 01 32 FC D3 00 B2 FC EF 03 32 FD 51 03 72 FD 35 00 F2 FD 13 00 72 FD 90 F3 3A FD B2 FB 7A FC 76 28 FA FC 34 30 7A FD 70 3A F8 FC 12 50 38 FC 96 49 38 FC 54 40 B8 FF BD D8 2A FF 9C D0 2A 7F A3 D5 AE 7C 63 A2 14 DB 84 00 08 7D 7A 05 AE D9 87 00 08 7C 09 D5 AE D9 A6 00 08 7C 8B D5 AE D8 65 00 08 7C 4A D5 AE D8 28 00 08 42 00 FE 18
-
-. 0 10007F58 72
-. 80 E1 00 30 7F 9C 82 14 81 01 01 78 38 E7 00 01 81 21 01 74 7F 87 78 40 81 41 01 70 81 61 01 6C 39 08 00 10 39 29 00 10 39 4A 00 10 39 6B 00 10 90 E1 00 30 91 01 01 78 91 21 01 74 91 41 01 70 91 61 01 6C 40 BC F5 DC
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 5, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 5, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 5, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 5, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 5, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 5, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 5, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 5
-. 0 10009DB0 8
-. 2F 97 00 05 41 9E 0C E0
-
-. 0 1000AA94 80
-. 81 81 01 44 3C 00 CC CC 80 E1 00 18 60 00 CC CD 81 61 00 24 3B 60 00 00 82 8C 00 00 3B 80 00 00 7D 4B 00 16 81 3E 80 E0 55 EB 18 38 7E 2B A2 14 C8 29 00 00 7E 4B 8A 14 7C 07 00 16 55 57 F0 BE 7F AB 92 14 56 F0 10 3A 54 15 F0 BE 48 01 E4 B5
-
-. 0 1000AAE4 16
-. 81 3E 80 E4 FE E0 08 18 C8 29 00 00 48 01 E4 A5
-
-. 0 1000AAF4 16
-. 7F 9B 78 40 93 61 00 30 FF 00 08 18 40 BC F8 98
-
-. 0 1000AB04 72
-. 1C 17 00 03 80 FE 80 CC 81 1E 80 D0 1D D5 00 03 92 41 01 28 7C 08 03 A6 92 21 01 2C 56 B2 08 3C 90 E1 01 1C 56 B1 10 3A 91 01 01 20 56 EC 08 3C 93 A1 01 24 3A C0 00 00 92 81 01 30 81 21 00 30 2F 89 00 00 40 9E 02 E4
-
-. 0 1000AB4C 52
-. 81 41 01 1C 81 61 01 20 C1 CA 00 00 C0 0B 00 00 FE 80 70 90 D0 01 00 34 FE 60 00 90 FE 40 70 90 FE 20 00 90 FE 00 70 90 FD E0 00 90 2F 97 00 00 41 9E 02 5C
-
-. 0 1000AB80 400
-. 81 21 00 1C 3D 40 43 30 81 7E 80 DC 56 C3 18 38 6D 20 80 00 91 41 00 08 90 01 00 0C 7C 1C C1 D6 C8 01 00 08 57 33 18 38 C8 2B 00 00 57 14 18 38 80 FE 80 E8 7E E9 03 A6 FC 00 08 28 81 1E 80 EC CA C7 00 00 54 1D 18 38 CA A8 00 00 FF 20 00 18 7C 1B AA 14 7D 72 DA 14 7D 4E DA 14 7D 11 DA 14 7C 00 C9 D6 7D 23 FA 14 C3 89 00 04 7C BC BA 14 7F A3 FC 2E 7C 8C E2 14 3B 7B 00 01 7D 6B C9 D6 54 00 18 38 7D 20 FA 14 7C 9F 04 2E C0 A9 00 04 7E D6 CA 14 7C 63 9A 14 7D 4A C9 D6 55 6B 18 38 7C CB FA 14 7C EB FC 2E C1 06 00 04 7C D0 E2 14 7D 08 C9 D6 55 4A 18 38 7C EA FA 14 7D 4A FC 2E C0 C7 00 04 ED 87 50 2A 55 08 18 38 ED 68 30 2A 7D 28 FA 14 7C 68 FC 2E C0 49 00 04 EC E7 50 28 EC 04 18 2A 7D 28 02 A6 ED A5 10 2A 7C A5 C1 D6 ED 08 30 28 EF 60 60 2A 7C 09 E2 14 EF 4D 58 2A 7D 3D D2 14 EC 00 60 28 7C 84 C1 D6 ED AD 58 28 54 A5 18 38 FD 40 D8 90 7D 65 D2 14 FD 20 D0 90 3B 9C 00 01 7C 00 C1 D6 FD 4A 05 72 54 84 18 38 7D 44 D2 14 FD 29 05 72 7C C6 C1 D6 54 00 18 38 7D 00 D2 14 FD 80 E8 90 FD 60 E0 90 FC 00 05 B2 54 C6 18 38 7C E6 D2 14 FD AD 05 B2 EC 84 18 28 EC A5 10 28 C0 41 00 34 FD 8C 50 28 FD 6B 48 28 EC D7 01 F2 ED 57 02 32 EC F8 01 F2 ED 18 02 32 FC 00 00 18 FD A0 68 18 EC D8 31 38 ED 58 51 78
-
-. 0 1000AD10 200
-. FD 80 60 18 FD 60 58 18 EC 97 39 3A EC B7 41 7A ED 2C 00 28 ED 0B 68 28 EC 99 01 32 EC B9 01 72 EC D9 01 B2 ED 59 02 B2 ED 8C 00 2A ED 6B 68 2A EC 09 50 2A ED A8 30 28 EC 6B 20 28 EC EC 28 2A ED 29 50 28 ED 8C 28 28 ED 08 30 2A ED 6B 20 2A EC 22 03 32 EF F3 02 72 EC 82 02 F2 EF D1 00 32 EC AF 01 F2 EC 53 02 32 ED 51 03 72 EC CF 00 F2 EF BD D8 2A EF 9C D0 2A ED 6E 0A FA ED 14 FA 3A 7F BD D5 2E ED B2 F3 7A D3 89 00 04 EC 70 28 FA 7F BD A2 14 ED 8E 23 38 ED 34 12 78 EC 12 50 38 EC F0 31 F8 7D 85 D5 2E D1 6B 00 04 7D 24 D5 2E D1 0A 00 04 7C 1A 05 2E D1 A8 00 04 7C E6 D5 2E D0 67 00 04 42 00 FD FC
-
-. 0 1000ADD8 72
-. 80 E1 00 30 7F 9C 82 14 81 01 01 30 38 E7 00 01 81 21 01 2C 7F 87 78 40 81 41 01 28 81 61 01 24 39 08 00 08 39 29 00 08 39 4A 00 08 39 6B 00 08 90 E1 00 30 91 01 01 30 91 21 01 2C 91 41 01 28 91 61 01 24 40 BC F5 7C
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 5, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 5, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 5, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 5, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 5, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 5, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 5, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 5
-. 0 10010F9C 8
-. 2F 9B 00 05 41 9E 02 78
-
-. 0 10011218 68
-. 81 01 00 18 54 00 20 36 81 21 00 30 3D 60 CC CC 7E 48 8B 96 61 6B CC CD 83 89 00 00 81 3E 82 5C 7E E0 E2 14 7E A0 BA 14 C8 29 00 00 7E 80 AA 14 7C 11 58 16 7D 68 58 16 54 16 F0 BE 55 7A F0 BE 48 01 7D 3D
-
-. 0 1001125C 16
-. 81 3E 82 60 FF 80 08 90 C8 29 00 00 48 01 7D 2D
-
-. 0 1001126C 12
-. 2F 92 00 00 FF 60 08 90 41 9E 01 14
-
-. 0 10011278 272
-. 80 FE 82 64 56 C3 08 3C 81 1E 82 68 FC C0 E0 50 FC A0 08 50 C8 87 00 00 C8 68 00 00 38 A3 FF FF 38 80 00 00 3B 60 00 00 7E 49 03 A6 7C 1B D2 14 7D 03 2A 14 7D 20 D2 14 7C 1D 01 D6 7D 69 D2 14 7D 4B D2 14 55 07 18 38 7D 3D 49 D6 54 00 18 38 7D 7F 04 AE 54 A6 18 38 38 C6 00 08 38 E7 00 08 7D 7D 59 D6 55 29 18 38 7D A9 FC AE 7D 5D 51 D6 55 6B 18 38 7D 4B FC AE FD 8D 50 2A 55 4A 18 38 7C 1D D9 D6 7D 0A FC AE FD AD 50 28 7F 7B B2 14 FC 0B 40 2A 54 00 18 38 FD 3C 03 72 7D 5F 04 AE 7D 38 21 D6 FC E0 60 2A 7C 84 8A 14 FC 00 60 28 FD BB 03 72 7C 18 29 D6 55 29 18 38 FD 87 00 F2 7C A5 8A 14 FD 6B 40 28 FC 00 01 32 7D 18 41 D6 54 00 18 38 FD 8A 60 28 FD 25 4A FA 7C C6 C1 D6 55 08 18 38 FD 66 6A F8 FD 4A 38 2A 7C E7 C1 D6 FD AC 00 28 FD 8C 00 2A 7D 49 CD AE 7D 99 05 AE 7D 66 CD AE 7D A8 CD AE 7D 27 CD AE 42 00 FF 20
-
-. 0 10011388 8
-. 2F 96 00 01 41 9E 04 28
-
-. 0 1000E50C 68
-. 7C 03 41 D6 38 A5 00 01 7D AA FC AE 7D 05 30 50 7F 88 28 40 C8 07 00 00 FD 80 68 50 7D 2A 22 14 54 00 20 36 7C 0A 25 AE 7D 60 22 14 D9 A9 00 08 7C E7 62 14 7C 04 05 AE 7D 4A 62 14 D9 8B 00 08 41 9D FF C0
-
-PASS: gsl_fft_real with signal_real_noise, n = 5, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 5, stride = 1
-. 0 1000CA50 8
-. 2F 9F 00 05 41 9E 0F 9C
-
-. 0 1000D9F0 36
-. 83 21 00 34 54 00 20 36 81 3E 81 70 82 19 00 00 C8 29 00 00 7F 00 82 14 7E C0 C2 14 7E A0 B2 14 48 01 B5 85
-
-. 0 1000DA14 16
-. 81 3E 81 74 FF 20 08 90 C8 29 00 00 48 01 B5 75
-
-. 0 1000DA24 28
-. 80 01 00 20 80 C1 00 18 FF 00 08 90 7E 60 FB 96 2F 93 00 00 7F 26 FB 96 41 9E 01 14
-
-. 0 1000DA40 272
-. 80 FE 81 78 57 66 08 3C 81 1E 81 7C 38 A0 00 00 C8 E7 00 00 7E 69 03 A6 C8 C8 00 00 1D 05 00 05 7C E5 CA 14 7D 26 42 14 7D 1C 41 D6 39 29 FF FF 7C 06 4A 14 54 0A 18 38 7D 7C 49 D6 39 4A 00 08 55 29 18 38 39 29 00 08 55 08 18 38 7C 1C 01 D6 55 6B 18 38 7D 8B EC AE 7D 67 CA 14 7D 08 EC AE 54 00 18 38 7D 4A E1 D6 7C 1D 04 AE FD 2C 00 2A 7D 6A EC AE 7D 29 E1 D6 FD 8C 00 28 7D 4B CA 14 FD 29 48 2A FD B9 02 F2 7C 09 EC AE 7D 2A CA 14 FD 78 02 F2 7C 17 29 D6 7C A5 DA 14 FD 49 01 B2 FD 8C 01 F2 7C F7 39 D6 54 00 18 38 FD B8 68 38 FC 19 58 3A 7D 77 59 D6 54 E7 18 38 FD 48 50 28 FD AD 68 2A FC 00 00 2A 7D 57 51 D6 FD 6A 60 28 55 6B 18 38 FD 8C 50 2A FD 08 48 2A 7D 37 49 D6 FD 4B 68 2A FD 2C 00 2A 55 4A 18 38 FD 8C 00 28 7D 1A 05 AE FD 6B 68 28 55 29 18 38 7D 87 D5 AE 7D 6B D5 AE 7D 4A D5 AE 7D 29 D5 AE 42 00 FF 10
-
-. 0 1000DB50 8
-. 2F 9B 00 01 41 BE F3 5C
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 5, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 5, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 5
-. 0 10012F8C 8
-. 2F 9B 00 05 41 9E 02 78
-
-. 0 10013208 68
-. 81 41 00 18 54 00 18 38 81 81 00 30 3D 60 CC CC 7E 6A 8B 96 61 6B CC CD 83 8C 00 00 81 3E 82 B8 7E E0 E2 14 7F 60 BA 14 C8 29 00 00 7E C0 DA 14 7C 11 58 16 7D 6A 58 16 54 15 F0 BE 55 7A F0 BE 48 01 5D 4D
-
-. 0 1001324C 16
-. 81 3E 82 BC FF 60 08 18 C8 29 00 00 48 01 5D 3D
-
-. 0 1001325C 12
-. 2F 93 00 00 FF 40 08 18 41 9E 01 24
-
-. 0 10013268 288
-. 80 FE 82 C0 56 B4 08 3C 81 1E 82 C4 FC 80 D8 50 FC 60 D0 50 C8 C7 00 00 C8 A8 00 00 38 B4 FF FF 38 80 00 00 38 60 00 00 7E 69 03 A6 7C 03 D2 14 7D 14 2A 14 7D 20 D2 14 7C 1F 01 D6 7D 69 D2 14 7D 4B D2 14 55 07 10 3A 7D 3F 49 D6 54 00 10 3A 7D 5D 04 2E 54 A6 10 3A 38 C6 00 04 38 E7 00 04 7D 7F 59 D6 55 29 10 3A 7D 69 EC 2E 7D 5F 51 D6 55 6B 10 3A 7D 8B EC 2E ED AB 60 2A 55 4A 10 3A 7C 1F 19 D6 7D 0A EC 2E ED 6B 60 28 7C 63 AA 14 EC 0A 40 2A 54 00 10 3A ED 4A 40 28 7D 3D 04 2E 7D 38 21 D6 EC E0 68 2A 7C 84 8A 14 EC 00 68 28 FD A0 48 90 FD 80 38 90 7C 18 29 D6 55 29 10 3A ED 29 38 2A 7C A5 8A 14 FD 8C 01 72 7D 18 41 D6 54 00 10 3A FC 00 01 B2 7D 29 CD 2E FD AD 60 28 ED 9B 02 F2 7C C6 C1 D6 FC 00 00 18 55 08 10 3A FD A0 68 18 ED 7A 02 F2 7C E7 C1 D6 ED 83 62 BA ED 0D 00 28 ED 44 5A B8 ED AD 00 2A 7D B9 05 2E 7D 46 CD 2E 7D 08 CD 2E 7D 87 CD 2E 42 00 FF 10
-
-. 0 10013388 8
-. 2F 95 00 01 41 9E 04 54
-
-. 0 10010750 68
-. 7C 03 41 D6 38 A5 00 01 7D AA FC 2E 7D 05 30 50 7F 88 28 40 C0 07 00 00 FD 80 68 50 7D 2A 22 14 54 00 18 38 7C 0A 25 2E 7D 60 22 14 D1 A9 00 04 7C E7 62 14 7C 04 05 2E 7D 4A 62 14 D1 8B 00 04 41 9D FF C0
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 5, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 5, stride = 1
-. 0 1000EC18 8
-. 2F 9D 00 05 41 9E 0F C0
-
-. 0 1000FBDC 36
-. 83 21 00 34 54 00 18 38 81 3E 81 E8 82 19 00 00 C8 29 00 00 7E C0 82 14 7F 20 B2 14 7E A0 CA 14 48 01 93 99
-
-. 0 1000FC00 16
-. 81 3E 81 EC FF 20 08 18 C8 29 00 00 48 01 93 89
-
-. 0 1000FC10 28
-. 80 01 00 20 80 C1 00 18 FF 00 08 18 7E 40 EB 96 2F 92 00 00 7F 06 EB 96 41 9E 01 24
-
-. 0 1000FC2C 288
-. 80 FE 81 F0 57 65 08 3C 81 1E 81 F4 38 80 00 00 C8 C7 00 00 7E 49 03 A6 C8 A8 00 00 1D 44 00 05 7C C4 C2 14 7C E6 C2 14 7C D7 31 D6 7D 65 52 14 39 6B FF FF 7C 05 5A 14 7D 3C 59 D6 54 08 10 3A 39 08 00 04 55 6B 10 3A 39 6B 00 04 7C 1C 01 D6 55 29 10 3A 7C 09 FC 2E 7D 27 C2 14 54 C6 10 3A 54 00 10 3A 7D 5C 51 D6 7D BF 04 2E ED 00 68 2A EC 00 68 28 55 4A 10 3A 7D 08 E1 D6 7C EA FC 2E ED 08 40 2A FD A0 38 90 FD 80 40 90 7D 6B E1 D6 7D 28 FC 2E FC 00 01 B2 FD 8C 01 72 7D 6B FC 2E 7D 69 C2 14 ED 59 02 72 7C 17 21 D6 ED 38 02 72 7C 84 DA 14 FD AD 60 28 FC 00 00 18 ED 58 52 F8 7C F7 39 D6 FD A0 68 18 54 00 10 3A ED 79 4A FA ED 4A 50 2A ED 8D 00 28 7D 37 49 D6 EC 00 68 2A 54 E7 10 3A ED 6B 58 2A ED AC 50 2A 7D 77 59 D6 EC E7 40 2A ED 20 58 2A 55 29 10 3A EC 00 58 28 ED 8C 50 28 7C FA 05 2E 55 6B 10 3A 7C 06 D5 2E 7D 87 D5 2E 7D A9 D5 2E 7D 2B D5 2E 42 00 FF 00
-
-. 0 1000FD4C 8
-. 2F 9B 00 01 41 BE F3 2C
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 5, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 5, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 5
-PASS: gsl_fft_complex_forward with signal_noise, n = 5, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 5, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 5, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 5, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 5, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 5, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 5, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 5, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 5, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 5, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 5
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 5, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 5, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 5, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 5, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 5, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 5, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 5, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 5, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 5, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 5, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 5
-PASS: gsl_fft_real with signal_real_noise, n = 5, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 5, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 5, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 5, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 5
-PASS: gsl_fft_real_float with signal_real_noise, n = 5, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 5, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 5, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 5, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 5
-PASS: gsl_fft_complex_forward with signal_noise, n = 5, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 5, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 5, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 5, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 5, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 5, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 5, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 5, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 5, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 5, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 5
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 5, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 5, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 5, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 5, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 5, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 5, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 5, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 5, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 5, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 5, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 5
-PASS: gsl_fft_real with signal_real_noise, n = 5, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 5, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 5, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 5, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 5
-PASS: gsl_fft_real_float with signal_real_noise, n = 5, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 5, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 5, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 6, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 6
-. 0 10006F90 8
-. 2F 97 00 06 41 9E 11 2C
-
-. 0 100080C0 88
-. 81 81 00 24 3D 20 AA AA 80 C1 01 88 61 29 AA AB 81 01 00 18 7D 6C 48 16 38 E0 00 00 82 66 00 00 55 E0 20 36 90 E1 00 34 7F 87 78 40 7D 28 48 16 7E 20 9A 14 7E 40 8A 14 55 76 F0 BE 7F A0 92 14 7F 80 EA 14 55 35 F0 BE 39 80 00 00 3A E0 00 00 1E 16 00 05 40 BC F4 64
-
-. 0 10008118 100
-. 81 21 00 1C 1D 55 00 05 1D 76 00 03 80 DE 80 44 2F 09 FF FF 56 A7 10 3A 56 C8 08 3C 56 C9 10 3A 92 21 01 60 1D D5 00 03 91 41 01 40 56 B1 08 3C 91 61 01 48 7C E8 03 A6 90 C1 01 50 3A 80 00 00 93 81 01 54 93 A1 01 58 92 41 01 5C 92 61 01 64 91 01 01 44 91 21 01 4C 81 41 00 34 2F 8A 00 00 40 9E 03 58
-
-. 0 1000817C 76
-. 81 7E 80 40 80 C1 01 50 C8 0B 00 00 D8 01 00 38 C8 06 00 00 CA 01 00 38 D8 01 00 40 FD C0 00 90 80 C1 00 40 80 E1 00 44 FD E0 80 90 FE 60 80 90 D8 01 00 50 90 C1 00 48 90 E1 00 4C FE 40 00 90 FE 20 80 90 2F 96 00 00 41 9E 02 AC
-
-. 0 100081C8 400
-. 80 C1 00 1C 3C E0 43 30 81 1E 80 50 56 9B 20 36 6C C0 80 00 90 E1 00 08 90 01 00 0C 7C 17 C1 D6 C8 48 00 00 57 32 20 36 C8 01 00 08 57 13 20 36 80 FE 80 48 7E C9 03 A6 FC 00 10 28 80 DE 80 4C C8 47 00 00 54 1C 20 36 CA 86 00 00 FE A0 00 B2 7C C8 02 A6 80 E1 01 40 7C 0C AA 14 7D 71 62 14 7D 07 62 14 7C 00 C9 D6 7D 46 62 14 7C 9B FC AE 7D 3B FA 14 CA E1 00 40 C8 29 00 08 7C EE 62 14 7D 6B C9 D6 54 00 20 36 7D 20 FA 14 7C FF 04 AE C9 09 00 08 7F BC D2 14 CB 01 00 48 39 8C 00 01 7D 4A C9 D6 55 6B 20 36 7D 2B FC AE 7C AB FA 14 C9 65 00 08 7E 94 CA 14 80 01 01 48 7F 7B 92 14 7D 08 C9 D6 55 4A 20 36 7C 0A FC AE 7C CA FA 14 C9 A6 00 08 7D 40 BA 14 FC C9 00 2A 80 C1 01 4C 55 08 20 36 7C E7 C9 D6 7D 48 FC AE 7D 28 FA 14 C9 89 00 08 FC AB 68 2A FC 6A 38 2A 81 01 01 44 FC 4C 40 2A 54 E7 20 36 FD 6B 68 28 7F 87 FC AE FD 4A 38 28 7D 27 FA 14 FD 8C 40 28 CB A9 00 08 FC E6 05 32 7D 68 BA 14 7D 37 B2 14 7D 06 BA 14 FD A3 05 32 7C 10 BA 14 7D 29 C1 D6 3A F7 00 01 FD 29 00 28 FD 05 05 32 FC 02 05 32 7D 6B C1 D6 55 29 20 36 FD 75 02 F2 7C E9 D2 14 FD 95 03 32 7D 4A C1 D6 55 6B 20 36 FD 35 02 72 7C CB D2 14 FD 55 02 B2 7D 08 C1 D6 55 4A 20 36 FC E4 38 28 7C AA D2 14 FD BC 68 28 FD 01 40 28 7C 00 C1 D6
-
-. 0 10008358 280
-. FC 1D 00 28 55 08 20 36 FC 84 30 2A 7C 88 D2 14 FC C7 58 2A FF 9C 18 2A 54 00 20 36 FC 6D 60 2A 7C 60 D2 14 FC 21 28 2A FF BD 10 2A FC A8 48 28 FC 40 50 28 FC E7 58 28 FD AD 60 28 FC 00 50 2A FF E6 18 28 FD 08 48 2A FC C6 18 2A FF C5 10 28 FC A5 10 2A C8 41 00 48 FD 87 68 28 FD 68 00 28 FC 42 01 B2 FD 08 00 2A C8 01 00 40 FD 24 E0 28 FD 41 E8 28 D8 41 01 98 FC E7 68 2A C9 A1 00 50 FC 00 03 32 FF 6D 07 F2 FF 57 02 F2 D8 01 01 90 FF 38 01 72 FE CD 07 B2 C9 A1 00 38 FC 6E 02 72 FC 52 01 F2 FF 0E 02 B2 FE F2 02 32 FD 6D 02 FA C8 01 01 98 FD 4F 1A BA FC B0 01 7A FD 13 12 3A FF D1 DF BA FD 8D D3 38 FC D0 C9 B8 FD 2F C2 78 FC F3 B9 F8 FF F1 B7 F8 FC 84 E0 2A FC 21 E8 2A 7C 9C D5 AE 7F 9C 9A 14 D8 3D 00 08 7D 89 D5 AE D9 67 00 08 7C CB D5 AE D8 A6 00 08 7D 2A D5 AE D9 45 00 08 7C E8 D5 AE D9 04 00 08 7F FA 05 AE DB C3 00 08 42 00 FD AC
-
-. 0 10008470 84
-. 80 C1 00 34 7E F7 82 14 80 E1 01 64 38 C6 00 01 81 01 01 60 7F 86 78 40 81 21 01 5C 81 41 01 58 38 E7 00 10 81 61 01 54 39 08 00 10 39 29 00 10 39 4A 00 10 39 6B 00 10 90 C1 00 34 90 E1 01 64 91 01 01 60 91 21 01 5C 91 41 01 58 91 61 01 54 40 BC F0 B8
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 6, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 6, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 6, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 6, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 6, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 6, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 6, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 6
-. 0 10009DB8 8
-. 2F 97 00 06 41 9E 11 88
-
-. 0 1000AF44 88
-. 81 81 00 24 3D 20 AA AA 80 E1 01 44 61 29 AA AB 81 41 00 18 7D 6C 48 16 39 00 00 00 82 87 00 00 55 E0 18 38 91 01 00 38 7F 88 78 40 7D 2A 48 16 7E 20 A2 14 7E 40 8A 14 55 76 F0 BE 7F A0 92 14 7F 80 EA 14 55 35 F0 BE 39 80 00 00 3A E0 00 00 1E 16 00 05 40 BC F4 00
-
-. 0 1000AF9C 108
-. 81 61 00 1C 1C 15 00 03 1C F5 00 05 81 3E 80 CC 1D 16 00 03 81 5E 80 D0 2F 0B FF FF 90 01 00 F0 56 CB 08 3C 56 C0 10 3A 92 21 01 14 7C E8 03 A6 92 81 01 18 56 B1 08 3C 91 01 00 F8 56 AE 10 3A 91 21 01 00 3A 80 00 00 91 41 01 04 93 81 01 08 93 A1 01 0C 92 41 01 10 91 61 00 F4 90 01 00 FC 80 E1 00 38 2F 87 00 00 40 9E 03 48
-
-. 0 1000B008 64
-. 81 01 01 00 80 E1 01 04 C0 08 00 00 D0 01 00 3C C2 61 00 3C C0 07 00 00 FE 40 98 90 D0 01 00 40 FE 20 00 90 D0 01 00 44 FE 00 98 90 FD E0 00 90 D0 01 00 48 FD C0 98 90 2F 96 00 00 41 9E 02 A8
-
-. 0 1000B048 400
-. 80 E1 00 1C 3D 00 43 30 81 3E 80 DC 56 9B 18 38 6C E0 80 00 91 01 00 08 90 01 00 0C 7C 17 C1 D6 C8 29 00 00 57 32 18 38 C8 01 00 08 57 13 18 38 81 1E 80 D4 7E C9 03 A6 FC 00 08 28 80 FE 80 F0 C0 28 00 00 54 1C 18 38 C2 87 00 00 FC 00 00 18 EE A0 00 72 7C E8 02 A6 7C 0C AA 14 7D 71 62 14 7D 4E 62 14 7C 00 C9 D6 81 21 00 F0 7D 07 62 14 7C 9B FC 2E 7C E9 62 14 7D 3B FA 14 7D 6B C9 D6 54 00 18 38 C0 69 00 04 7D 20 FA 14 C1 09 00 04 39 8C 00 01 7C FF 04 2E 7C 17 B2 14 7D 4A C9 D6 55 6B 18 38 7C AB FA 14 7D 2B FC 2E C1 65 00 04 7E 94 CA 14 7F 7B 92 14 7D 08 C9 D6 55 4A 18 38 7C CA FA 14 7C 0A FC 2E C1 A6 00 04 EC C9 00 2A 81 41 00 F4 55 08 18 38 7C E7 C9 D6 7D 28 FA 14 7D 48 FC 2E C1 89 00 04 EC AB 68 2A EC 4A 38 2A 81 01 00 FC EC 2C 40 2A 54 E7 18 38 7D 27 FA 14 ED 29 00 28 ED 6B 68 28 7F E7 FC 2E ED 4A 38 28 C3 C9 00 04 ED 8C 40 28 80 E1 00 F8 ED 06 05 32 7D 2A BA 14 EC E5 05 32 7D 67 BA 14 EC 02 05 32 7D 48 BA 14 ED A1 05 32 7D 10 BA 14 EC E3 38 28 7C 00 C1 D6 ED 04 40 28 7C FC D2 14 ED 35 02 72 3A F7 00 01 ED 75 02 F2 EC 1F 00 28 7D 29 C1 D6 ED BE 68 28 54 00 18 38 ED 55 02 B2 7C C0 D2 14 ED 95 03 32 EC 84 30 2A 7D 6B C1 D6 EC C8 58 2A 55 29 18 38 EC 63 28 2A 7C A9 D2 14 EC A7 48 28
-
-. 0 1000B1D8 276
-. EF FF 10 2A 7D 4A C1 D6 EC 40 60 2A 55 6B 18 38 EF DE 08 2A 7C 8B D2 14 EC 2D 50 28 ED 08 58 28 7D 08 C1 D6 ED AD 50 2A 55 4A 18 38 EC E7 48 2A 7C 6A D2 14 EC 00 60 28 EF 85 08 28 55 08 18 38 ED 67 68 28 7F A8 D2 14 ED 88 00 28 ED 08 00 2A C0 01 00 40 EF A6 10 28 EC E7 68 2A EC C6 10 2A C0 41 00 48 EC A5 08 2A C0 21 00 44 EF 60 03 32 EE E0 02 F2 C0 01 00 48 ED 24 F8 28 ED 43 F0 28 EC 00 07 32 EF 41 01 B2 ED A1 01 72 EC 2F 01 F2 D0 01 01 48 EF 02 07 72 C0 01 00 3C EE D1 02 72 EF 2F 02 32 EC 51 02 B2 ED 10 0A 38 C0 21 01 48 ED 60 DA FA EC B3 D1 7A ED 52 B2 BA EC F0 C9 FA EF 8E C7 3A ED 80 BB 38 EC D3 69 B8 ED 32 12 78 EF AE 0F 78 EC 84 F8 2A EC 63 F0 2A 7C 9C D5 2E 7F 9C 9A 14 D0 67 00 04 7D 9A 05 2E D1 66 00 04 7C C9 D5 2E D0 A5 00 04 7D 2B D5 2E D1 44 00 04 7D 0A D5 2E D0 E3 00 04 7F A8 D5 2E D3 9D 00 04 42 00 FD B4
-
-. 0 1000B2EC 84
-. 80 E1 00 38 7E F7 82 14 81 01 01 18 38 E7 00 01 81 21 01 14 7F 87 78 40 81 41 01 10 81 61 01 0C 39 08 00 08 90 E1 00 38 39 29 00 08 80 E1 01 08 39 4A 00 08 39 6B 00 08 91 01 01 18 38 E7 00 08 91 21 01 14 91 41 01 10 91 61 01 0C 90 E1 01 08 40 BC F0 5C
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 6, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 6, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 6, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 6, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 6, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 6, stride = 1
-. 0 100065C4 20
-. 54 A0 10 3A 38 A5 00 01 7D 26 00 2E 7D 6B 49 D6 42 00 FF F0
-
-. 0 10010A80 32
-. 82 71 00 08 3A 80 00 01 7D C9 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7E 58 73 96 40 9C 00 94
-
-. 0 10010AC0 68
-. 3E A0 43 30 FF C0 E0 90 3B F0 FF FF 7F 9C DA 14 92 A1 00 08 7C 1C C3 96 7F B9 BA 14 3A D6 00 01 3B 5A 00 10 7C 00 C1 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 83 F5
-
-. 0 10010B04 16
-. 7C 39 BD AE FC 20 F8 90 3B 39 00 10 48 01 84 85
-
-. 0 10010B14 12
-. 37 FF FF FF D8 3D 00 08 40 82 FF B0
-
-PASS: gsl_fft_real_wavetable_alloc, n = 6, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 6
-. 0 10011E48 124
-. 7C 08 1A 14 55 4B 18 38 7D 20 1A 14 7C 1D 01 D6 39 6B 00 08 7D 3D 49 D6 54 00 18 38 7D BF 04 AE 55 29 18 38 7C 1D 41 D6 7C 09 FC AE 7D 08 DA 14 FD 6D 00 2A FD AD 00 28 54 00 18 38 7C 1F 04 AE 7D 38 39 D6 FD 8B 02 B2 7C E7 8A 14 FD AD 02 72 7C 18 51 D6 55 29 18 38 FD 80 60 28 7D 4A 8A 14 FC 00 58 2A 7D 6B C1 D6 54 00 18 38 7C 09 CD AE 7D 99 05 AE 7D AB CD AE 42 00 FF 88
-
-. 0 10010F4C 36
-. 81 21 00 24 81 41 00 30 2F 89 00 00 39 31 00 01 83 6A FF 00 55 29 F8 7E 38 09 FF FF 7E 31 D9 D6 40 9E 09 9C
-
-. 0 10011908 32
-. 2F 9B 00 02 39 60 00 00 83 E1 00 20 3B A0 00 01 83 21 00 10 83 01 00 14 91 61 00 24 40 9E F6 68
-
-. 0 100119AC 20
-. 38 05 00 01 3B 60 00 01 54 00 F8 7E 2B 80 00 01 40 9D 00 F8
-
-. 0 100119C0 32
-. 7C 17 03 78 38 9C 00 10 38 71 FF FE 2F 9A 00 00 C8 04 FF F8 C9 04 FF F0 FC E0 00 50 41 9E 00 C4
-
-. 0 100119E0 192
-. 57 69 08 3C 7F 49 03 A6 38 C9 FF FF 38 E3 FF FF 7C C8 33 78 81 41 00 2C 55 0B 18 38 39 6B 00 08 7D 28 52 14 7D 6B E9 D6 54 CA 18 38 39 4A 00 08 7C 1D 49 D6 55 29 18 38 39 29 00 08 7D 6B FC AE 54 EB 18 38 39 6B 00 08 54 00 18 38 7D 29 E9 D6 7D 9F 04 AE FC 07 03 32 7D A9 FC AE 7C 1D 41 D6 7D 08 2A 14 FD 47 03 72 FD A8 03 7A 54 00 18 38 7C 1F 04 AE 7D 38 39 D6 FD 88 53 38 7C E7 8A 14 FD 4B 68 28 7C 18 31 D6 FD 6B 68 2A FD 20 60 28 55 29 18 38 FD 40 50 50 7C C6 8A 14 FC 00 60 2A 7D 4A C1 D6 54 00 18 38 7C 19 05 AE 7D 6B C1 D6 7D 6A CD AE 7D 29 CD AE 7D 4B CD AE 42 00 FF 58
-
-. 0 10011AA0 20
-. 3B 7B 00 01 38 63 FF FE 7F 97 D8 40 38 84 00 10 41 9D FF 1C
-
-. 0 10011AB4 8
-. 70 AB 00 01 40 A2 FC FC
-
-PASS: gsl_fft_real with signal_real_noise, n = 6, stride = 1
-. 0 1000C674 32
-. 82 71 00 08 3A 80 00 01 7D D2 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7D 37 73 96 40 9C 00 94
-
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 6, stride = 1
-. 0 1000D37C 20
-. 38 1B 00 01 3A A0 00 01 54 00 F8 7E 2B 80 00 01 40 9D 01 98
-
-. 0 1000D524 8
-. 73 67 00 01 40 A2 F9 88
-
-. 0 1000D52C 8
-. 2F 94 00 00 41 BE F9 80
-
-. 0 1000D534 160
-. FD 3E F0 2A 7E 89 03 A6 57 66 08 3C 38 FB FF FF 38 A0 00 00 1D 25 00 03 7D 47 FA 14 7D 0A FA 14 7D 57 51 D6 7D 29 DA 14 39 29 FF FF 7C 06 4A 14 55 2B 18 38 7C 1C 01 D6 39 6B 00 08 55 4A 18 38 7C A5 DA 14 7D 3C 49 D6 54 00 18 38 7D 5D 04 AE 7D 6B E1 D6 55 29 18 38 7C 09 EC AE FD 80 50 28 7D AB EC AE FC 00 00 2A 7C 17 39 D6 7C E7 DA 14 FD A9 03 72 FD 60 60 50 7D 17 41 D6 FC 00 50 2A FD 8C 68 28 54 00 18 38 FD 6B 68 28 7C 1A 05 AE 55 08 18 38 7D 8A D5 AE 7D 68 D5 AE 42 00 FF 78
-
-. 0 1000D5D4 28
-. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 F4 04
-
-. 0 1000C9F0 52
-. 81 61 00 34 83 21 00 20 83 EB FF 00 80 01 00 18 7F 39 F9 D6 81 81 00 28 2F 8C 00 00 7F 60 CB 96 93 21 00 20 39 3B 00 01 55 29 F8 7E 38 09 FF FF 40 9E 06 5C
-
-. 0 1000D07C 32
-. 2F 9F 00 02 38 C0 00 00 83 A1 00 1C 3B 80 00 01 83 41 00 10 82 E1 00 14 90 C1 00 28 40 9E F9 A8
-
-. 0 1000D0C4 72
-. 81 61 00 2C 7C 08 E1 D6 7D 28 5A 14 7D 6A E1 D6 54 00 20 36 7C 1D 04 AE 7D 4A 3A 14 7D AB EC AE 7C 08 B9 D6 7D 08 DA 14 FD 80 68 28 FC 00 68 2A 7D 29 B9 D6 54 00 18 38 7C 1A 05 AE 55 29 18 38 7D 89 D5 AE 42 00 FF BC
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 6, stride = 1
-. 0 10012A68 32
-. 82 71 00 08 3A 80 00 01 7D C9 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7E 58 73 96 40 9C 00 9C
-
-. 0 10012AA8 68
-. 3E A0 43 30 FF C0 E0 90 3B F0 FF FF 7F 9C DA 14 92 A1 00 08 7C 1C C3 96 7F B9 BA 14 3A D6 00 01 3B 5A 00 08 7C 00 C1 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 64 0D
-
-. 0 10012AEC 20
-. FC 00 08 18 FC 20 F8 90 7C 19 BD 2E 3B 39 00 08 48 01 64 99
-
-. 0 10012B00 16
-. 37 FF FF FF FC 20 08 18 D0 3D 00 04 40 82 FF A8
-
-PASS: gsl_fft_real_wavetable_float_alloc, n = 6, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 6
-. 0 10013E78 136
-. 7C 08 1A 14 55 4B 10 3A 7D 20 1A 14 7C 1F 01 D6 39 6B 00 04 7D 3F 49 D6 54 00 10 3A 7D 7D 04 2E 55 29 10 3A 7C 1F 41 D6 7C 09 EC 2E 7D 08 DA 14 ED 4B 00 2A 54 00 10 3A ED 6B 00 28 7D 9D 04 2E 7D 38 39 D6 FD A0 50 90 7C E7 8A 14 FC 00 60 90 ED 6B 02 32 FD AD 02 72 7C 18 51 D6 55 29 10 3A ED 8C 50 2A 7D 4A 8A 14 FC 00 68 28 7D 6B C1 D6 54 00 10 3A 7D 89 CD 2E FC 00 00 18 7C 19 05 2E 7D 6B CD 2E 42 00 FF 7C
-
-. 0 10012F3C 36
-. 81 21 00 24 81 41 00 30 2F 89 00 00 39 31 00 01 83 6A FF 00 55 29 F8 7E 38 09 FF FF 7E 31 D9 D6 40 9E 09 D8
-
-. 0 10013934 32
-. 2F 9B 00 02 39 60 00 00 83 A1 00 20 3B E0 00 01 83 21 00 10 83 01 00 14 91 61 00 24 40 9E F6 2C
-
-. 0 100139D8 20
-. 38 04 00 01 3B 60 00 01 54 00 F8 7E 2B 80 00 01 40 9D 00 F8
-
-. 0 100139EC 32
-. 38 7C 00 08 7C 17 03 78 3B 91 FF FE 2F 9A 00 00 C0 03 FF FC C1 03 FF F8 FC E0 00 50 41 9E 00 C4
-
-. 0 10013A0C 192
-. 57 69 08 3C 7F 49 03 A6 38 A9 FF FF 38 DC FF FF 7C A7 2B 78 81 41 00 2C 54 EB 10 3A 39 6B 00 04 54 A8 10 3A 7D 27 52 14 7D 6B F9 D6 54 CA 10 3A 39 08 00 04 39 4A 00 04 7C 1F 49 D6 55 29 10 3A 39 29 00 04 7D 6B EC 2E 54 00 10 3A 7D 29 F9 D6 7D BD 04 2E ED 87 03 72 7C 09 EC 2E 7C 1F 39 D6 7C E7 22 14 ED 88 60 3A EC 07 00 32 54 00 10 3A 7D 38 31 D6 ED 4B 60 28 7C C6 8A 14 ED A8 03 78 7C 1D 04 2E ED 6B 60 2A 7C 18 29 D6 FD 40 50 50 ED 20 68 28 55 29 10 3A EC 00 68 2A 7C A5 8A 14 7D 08 C1 D6 54 00 10 3A 7C 19 05 2E 7D 4A C1 D6 7D 68 CD 2E 7D 29 CD 2E 7D 4A CD 2E 42 00 FF 58
-
-. 0 10013ACC 20
-. 3B 7B 00 01 3B 9C FF FE 7F 97 D8 40 38 63 00 08 41 9D FF 1C
-
-. 0 10013AE0 8
-. 70 8B 00 01 40 A2 FC FC
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 6, stride = 1
-. 0 1000E834 32
-. 82 71 00 08 3A 80 00 01 7D D2 73 78 93 51 01 08 7D CE 99 D6 7F 94 98 40 7D 37 73 96 40 9C 00 9C
-
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 6, stride = 1
-. 0 1000F548 20
-. 38 1B 00 01 3A 80 00 01 54 00 F8 7E 2B 80 00 01 40 9D 01 B0
-
-. 0 1000F708 8
-. 73 67 00 01 40 A2 F9 70
-
-. 0 1000F710 8
-. 2F 93 00 00 41 BE F9 68
-
-. 0 1000F718 160
-. ED 3D E8 2A 7E 69 03 A6 57 66 08 3C 38 FB FF FF 38 A0 00 00 1D 25 00 03 7D 47 CA 14 7D 0A CA 14 7D 57 51 D6 7D 29 DA 14 39 29 FF FF 7C 06 4A 14 55 2B 10 3A 7C 1C 01 D6 39 6B 00 04 55 4A 10 3A 7C A5 DA 14 7D 3C 49 D6 54 00 10 3A 7D 5F 04 2E 55 29 10 3A 7D 6B E1 D6 7C 09 FC 2E ED 80 50 28 7D AB FC 2E EC 00 00 2A 7C 17 39 D6 7C E7 DA 14 ED A9 03 72 FD 60 60 50 EC 00 50 2A 7D 17 41 D6 ED 8C 68 28 ED 6B 68 28 54 00 10 3A 7C 1A 05 2E 7D 8A D5 2E 55 08 10 3A 7D 68 D5 2E 42 00 FF 78
-
-. 0 1000F7B8 28
-. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 F3 E8
-
-. 0 1000EBB8 52
-. 81 61 00 34 83 21 00 20 83 AB FF 00 80 01 00 18 7F 39 E9 D6 81 81 00 28 2F 8C 00 00 7F 60 CB 96 93 21 00 20 39 3B 00 01 55 29 F8 7E 38 09 FF FF 40 9E 06 60
-
-. 0 1000F248 32
-. 2F 9D 00 02 38 C0 00 00 83 E1 00 1C 3B 80 00 01 83 41 00 10 82 E1 00 14 90 C1 00 28 40 9E F9 A4
-
-. 0 1000F290 72
-. 81 61 00 2C 7C 08 E1 D6 7D 28 5A 14 7D 6A E1 D6 54 00 18 38 7C 1F 04 2E 7D 4A 3A 14 7D AB FC 2E 7C 08 B9 D6 7D 08 DA 14 ED 80 68 28 EC 00 68 2A 7D 29 B9 D6 54 00 10 3A 7C 1A 05 2E 55 29 10 3A 7D 89 D5 2E 42 00 FF BC
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 6, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 6, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 6
-PASS: gsl_fft_complex_forward with signal_noise, n = 6, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 6, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 6, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 6, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 6, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 6, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 6, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 6, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 6, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 6, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 6
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 6, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 6, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 6, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 6, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 6, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 6, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 6, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 6, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 6, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 6, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 6
-PASS: gsl_fft_real with signal_real_noise, n = 6, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 6, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 6, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 6, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 6
-PASS: gsl_fft_real_float with signal_real_noise, n = 6, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 6, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 6, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 6, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 6
-PASS: gsl_fft_complex_forward with signal_noise, n = 6, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 6, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 6, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 6, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 6, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 6, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 6, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 6, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 6, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 6, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 6
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 6, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 6, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 6, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 6, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 6, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 6, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 6, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 6, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 6, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 6, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 6
-PASS: gsl_fft_real with signal_real_noise, n = 6, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 6, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 6, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 6, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 6
-PASS: gsl_fft_real_float with signal_real_noise, n = 6, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 6, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 6, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 7, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 7
-. 0 10006F98 8
-. 2F 97 00 07 41 9E 15 EC
-
-. 0 10008588 108
-. 81 81 00 24 3D 20 24 92 80 E1 00 18 61 29 49 25 80 C1 01 88 7D 0C 48 16 55 EA 20 36 82 66 00 00 3A C0 00 00 3A 80 00 00 7D 27 48 16 7E 2A 9A 14 7D 68 60 50 81 9E 80 64 7E 4A 8A 14 55 6B F8 7E C8 2C 00 00 7C 09 38 50 7F AA 92 14 54 00 F8 7E 7D 08 5A 14 7F 8A EA 14 7D 29 02 14 55 10 F0 BE 7F 6A E2 14 55 2E F0 BE 48 02 09 05
-
-. 0 100085F4 28
-. 81 3E 80 68 1C 10 00 06 D8 21 00 60 CB C9 00 00 90 01 01 00 FC 20 F0 90 48 02 08 E9
-
-. 0 10008610 20
-. 81 3E 80 6C D8 21 00 68 CB E9 00 00 FC 20 F8 90 48 02 08 D5
-
-. 0 10008624 16
-. 80 DE 80 64 D8 21 00 70 C8 26 00 00 48 02 09 65
-
-. 0 10008634 12
-. D8 21 00 78 FC 20 F0 90 48 02 09 59
-
-. 0 10008640 12
-. D8 21 00 80 FC 20 F8 90 48 02 09 4D
-
-. 0 1000864C 16
-. 7F 96 78 40 D8 21 00 88 92 C1 00 58 40 BC EF 20
-
-. 0 1000865C 124
-. 80 01 00 1C 1C CE 00 03 1C EE 00 05 81 9E 80 44 1D 0E 00 06 2F 00 FF FF 1D 50 00 03 90 C1 01 08 1D 70 00 05 90 E1 01 0C 55 C0 10 3A 56 06 08 3C 56 07 10 3A 91 81 01 24 92 61 01 3C 55 CC 08 3C 91 01 01 10 7C 08 03 A6 91 41 01 18 3A 60 00 00 91 61 01 20 93 61 01 28 93 81 01 2C 93 A1 01 30 92 41 01 34 92 21 01 38 90 C1 01 14 90 E1 01 1C 81 01 00 58 2F 88 00 00 40 9E 05 AC
-
-. 0 100086D8 160
-. 81 3E 80 40 80 C1 01 24 C8 09 00 00 D8 01 00 90 C8 06 00 00 80 C1 00 90 80 E1 00 94 D8 01 00 98 90 C1 00 A0 90 E1 00 A4 80 E1 00 98 81 01 00 9C 90 E1 00 A8 91 01 00 AC 81 01 00 A0 81 21 00 A4 91 01 00 B0 91 21 00 B4 81 21 00 A8 81 41 00 AC 91 21 00 B8 91 41 00 BC 80 C1 00 B8 80 E1 00 BC 81 41 00 B0 81 61 00 B4 90 C1 00 C8 90 E1 00 CC 91 41 00 C0 91 61 00 C4 91 41 00 D0 91 61 00 D4 90 C1 00 D8 90 E1 00 DC 91 41 00 E0 91 61 00 E4 90 C1 00 E8 90 E1 00 EC 2F 90 00 00 41 9E 04 9C
-
-. 0 10008778 400
-. C8 E1 00 78 3C E0 43 30 C9 01 00 80 7E 09 03 A6 FD A7 38 2A C9 61 00 88 FD 88 40 2A CA E1 00 60 FD 47 40 2A CB 01 00 68 FD AD 40 28 CB 21 00 88 FD 87 60 28 80 DE 80 70 FD 2B 58 2A CB 41 00 70 FD 17 C0 2A C8 46 00 00 FD AD C8 2A 80 C1 01 8C FD 2A 48 2A 81 3E 80 50 FD 8C C8 28 6C C0 80 00 FD 4A C8 28 90 01 00 0C FC E8 D0 2A 90 E1 00 08 FD AD 10 24 80 DE 80 40 7C 16 C1 D6 56 75 20 36 57 31 20 36 57 12 20 36 54 17 20 36 FD 4A 10 24 FD 8C 10 24 FD 29 10 24 FC E7 10 24 FC 17 B8 2A FD 78 C0 2A FC DA D0 2A FC 00 C0 28 FD 77 58 28 FD 08 30 28 FC 00 D0 28 FD 6B D0 2A FE 08 10 24 FE 40 10 24 C8 01 00 08 FE 2B 10 24 C8 49 00 00 FC 00 10 28 C8 46 00 00 FE 67 10 28 FD 20 02 72 FD E0 02 B2 FD C0 03 72 D9 21 00 F8 FC 00 03 32 D8 01 00 F0 7C E8 02 A6 81 21 01 0C 80 C1 01 08 7C 14 72 14 7D 6C A2 14 7C 00 C9 D6 7D 07 A2 14 7E F5 FC AE 7C E9 A2 14 81 21 01 10 7D 46 A2 14 7C C9 A2 14 7D 6B C9 D6 7D 35 FA 14 54 00 20 36 CA C9 00 08 7D 20 FA 14 7C BF 04 AE 7C E7 C9 D6 55 6B 20 36 C8 E9 00 08 7C AB FA 14 7C CB FC AE 7F 77 D2 14 C9 05 00 08 3A 94 00 01 7C C6 C9 D6 54 E7 20 36 7D 67 FA 14 7C 87 FC AE C8 6B 00 08 7D 76 82 14 FD 46 20 28 80 01 01 14 7D 4A C9 D6 54 C6 20 36 7D 26 FA 14 7D 86 FC AE C9 69 00 08
-
-. 0 10008908 400
-. FD 28 18 28 FF 25 60 28 80 C1 01 1C 7D 08 C9 D6 55 4A 20 36 7C 2A FC AE 7C 6A FA 14 C8 43 00 08 FF 07 58 28 FC C6 20 2A 7D 40 B2 14 55 08 20 36 FD 08 18 2A 7D A8 FC AE 7C 88 FA 14 C8 04 00 08 FC A5 60 2A FF ED 08 2A C8 61 00 F8 FC E7 58 2A 80 01 01 18 FF C0 10 2A 7C E6 B2 14 FD AD 08 28 81 21 01 20 FC 00 10 28 80 C1 01 00 FD 86 28 2A 7D 00 B2 14 FD 68 38 2A 7C 09 B2 14 FC 2A C8 28 7D 26 B2 14 FC 49 C0 28 7D 6B C1 D6 FF A5 F8 28 7E 73 CA 14 FF 87 F0 28 7E B5 8A 14 FC 23 00 72 3A D6 00 01 7D 4A C1 D6 55 6B 20 36 FC 43 00 B2 C8 61 00 F0 7C CB D2 14 FF 6D 50 28 FF 40 48 28 7D 08 C1 D6 FC A6 28 28 55 4A 20 36 FC E8 38 28 7C AA D2 14 FF B2 07 72 7C E7 C1 D6 55 08 20 36 FE F7 60 2A 7C 88 D2 14 FE D6 58 2A FC DF 30 28 FD 1E 40 28 7C 00 C1 D6 FD 4D 50 2A 54 E7 20 36 FD 20 48 2A 7C 67 D2 14 FD B9 68 28 FC 18 00 28 7D 29 C1 D6 FF 92 07 32 54 00 20 36 7F A0 D2 14 FE F7 F8 2A FF 63 06 F2 55 29 20 36 7F 89 D2 14 FF 43 06 B2 7E F7 D5 AE 7E F7 92 14 FE D6 F0 2A FC D1 01 B2 FD 11 02 32 FC B0 01 72 FD AE 03 72 FC 0E 00 32 FD 8C F8 2A FD 6B F0 2A FD 4A C8 2A FD 29 C0 2A CB 01 00 B8 FF E0 E8 50 FC 60 08 50 FC 80 10 50 FC F0 01 F2 FD 4F 02 B2 FD 2F 02 72 FD 93 BB 3A CA E1 00 D8 FD 73 B2 FA FF C0 E0 50
-
-. 0 10008A98 376
-. FF FF 28 28 FC 63 68 28 FC 84 00 28 FF BD 30 2A FF 9C 40 2A FD AD D8 2A FC 00 D0 2A FC A5 30 28 FC 42 D0 28 FF DE 38 28 FC 21 D8 28 FC E7 40 28 FC 84 48 2A FD AD 50 2A FC 00 48 2A FF EC F8 2A FF AC E8 2A FF 8B E0 2A FC 42 48 2A FD 8C 28 2A FC 63 50 2A FC 21 50 2A FF CB F0 2A FD 6B 38 2A FC BF 20 28 FC FD 00 28 FC DC 68 2A FF BD 00 2A C8 01 00 C8 FF 9C 68 28 C9 A1 00 A8 FD 4C 10 2A FF FF 20 2A C8 81 00 98 FD 8C 10 28 C8 41 00 D8 FD 2B 08 28 FD 1E 18 2A FD 6B 08 2A FF 64 07 72 FF DE 18 28 C8 61 00 E8 FE A2 01 72 FC 44 07 32 C8 81 00 B8 FF 38 03 32 FE 83 01 F2 C8 61 00 C8 DA DB 00 08 FF 00 02 B2 FC 04 02 F2 FC 97 02 32 CA E1 00 E8 FF 4D 07 F2 FC 2D 07 B2 FD A3 02 72 FC 77 01 B2 CA E1 00 90 FF 97 DF 3A CA E1 00 B0 CB 61 00 A0 FD 77 CA FA CB 21 00 C0 CA E1 00 90 FF DB D7 BA CB 41 00 D0 CB 61 00 E0 FD 39 C2 7A CB 21 00 B0 CB 01 00 A0 FD 1A AA 3A CB 41 00 C0 FC DB A1 BA CB 61 00 D0 FD 99 03 38 C8 01 00 E0 FF B7 17 78 FF F8 0F F8 FD 5A 6A B8 7F AB D5 AE DB 86 00 08 FC BB 21 78 7F EA D5 AE DB C5 00 08 FC E0 19 F8 7D 88 D5 AE D9 64 00 08 7D 47 D5 AE D9 23 00 08 7C BA 05 AE D9 1D 00 08 7C E9 D5 AE D8 DC 00 08 42 00 FC 60
-
-. 0 10008C10 100
-. 80 C1 00 58 80 E1 01 00 38 C6 00 01 81 01 01 3C 7F 86 78 40 81 21 01 38 81 41 01 34 7E D6 3A 14 81 61 01 30 39 08 00 10 80 E1 01 28 39 29 00 10 90 C1 00 58 39 4A 00 10 80 C1 01 2C 39 6B 00 10 38 E7 00 10 91 01 01 3C 38 C6 00 10 91 21 01 38 91 41 01 34 91 61 01 30 90 C1 01 2C 90 E1 01 28 40 BC E9 08
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 7, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 7, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 7, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 7, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 7, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 7, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 7, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 7
-. 0 10009DC0 8
-. 2F 97 00 07 41 9E 16 40
-
-. 0 1000B404 112
-. 81 81 00 18 3D 20 24 92 81 41 00 24 61 29 49 25 81 61 01 44 3A 60 00 00 7D 0A 48 16 80 01 00 24 82 8B 00 00 55 EA 18 38 80 FE 80 F4 3A E0 00 00 7E 2A A2 14 7D 2C 48 16 7E 4A 8A 14 7D 68 00 50 C8 27 00 00 55 6B F8 7E 7F AA 92 14 7C 09 60 50 7D 08 5A 14 54 00 F8 7E 7F 8A EA 14 7D 29 02 14 55 10 F0 BE 7F 6A E2 14 55 2E F0 BE 48 01 DA 85
-
-. 0 1000B474 32
-. 81 3E 80 F8 FC 20 08 18 1C 10 00 06 CB C9 00 00 90 01 00 A8 D0 21 00 4C FC 20 F0 90 48 01 DA 65
-
-. 0 1000B494 24
-. 81 3E 80 FC FC 20 08 18 CB E9 00 00 D0 21 00 50 FC 20 F8 90 48 01 DA 4D
-
-. 0 1000B4AC 20
-. 80 FE 80 F4 FC 20 08 18 D0 21 00 54 C8 27 00 00 48 01 DA D9
-
-. 0 1000B4C0 16
-. FC 20 08 18 D0 21 00 58 FC 20 F0 90 48 01 DA C9
-
-. 0 1000B4D0 16
-. FC 20 08 18 D0 21 00 5C FC 20 F8 90 48 01 DA B9
-
-. 0 1000B4E0 20
-. 39 80 00 00 7F 8C 78 40 FC 20 08 18 D0 21 00 60 40 BC EE A8
-
-. 0 1000B4F4 140
-. 1C EE 00 03 80 01 00 1C 1D 0E 00 05 92 81 00 EC 1D 2E 00 06 90 E1 00 AC 1D 50 00 03 80 FE 80 CC 1D 70 00 05 91 01 00 B4 81 1E 80 D0 2F 00 FF FF 91 21 00 B8 55 C9 08 3C 91 41 00 C4 55 CA 10 3A 91 61 00 CC 7D 60 00 D0 90 E1 00 D0 56 00 08 3C 56 07 10 3A 91 01 00 D4 93 61 00 D8 7D 28 03 A6 93 81 00 DC 3A 80 00 00 93 A1 00 E0 92 41 00 E4 92 21 00 E8 91 41 00 B0 91 61 00 BC 90 01 00 C0 90 E1 00 C8 2F 8C 00 00 40 9E 05 B4
-
-. 0 1000B580 76
-. 81 01 00 D0 80 E1 00 D4 C0 08 00 00 D0 01 00 64 C0 21 00 64 C0 07 00 00 D0 21 00 6C D0 01 00 68 D0 01 00 70 D0 21 00 74 D0 01 00 78 D0 21 00 7C D0 01 00 80 D0 21 00 84 D0 01 00 88 D0 21 00 8C D0 01 00 90 2F 90 00 00 41 9E 05 04
-
-. 0 1000B5CC 400
-. C0 21 00 58 3D 20 43 30 C0 41 00 5C 7E 09 03 A6 FD 80 08 90 C1 21 00 4C C1 A1 00 50 FC 00 10 90 C2 E1 00 50 ED 41 10 2A EC C9 68 2A C0 A1 00 60 FD A0 48 90 C3 41 00 54 FD 0C 60 2A 80 FE 81 00 FC E0 00 2A 81 5E 80 DC FD 20 B8 90 C8 27 00 00 FD 08 00 28 80 E1 00 BC FC 0D 68 2A 91 21 00 08 FD 60 28 90 6C E0 80 00 FC 60 50 90 90 01 00 0C ED 4A 28 28 80 FE 81 04 FC A0 D0 90 7C 17 C1 D6 FC 00 48 28 56 95 18 38 FD 8C 38 28 57 31 18 38 FC 8B 58 2A 57 12 18 38 FC 00 28 28 54 16 18 38 EC E6 D0 2A FD 08 58 2A FC 00 08 24 FD 8C 58 28 D8 01 00 98 FC 63 20 2A C8 01 00 08 FD 65 28 2A FD 4A 08 24 FD 08 08 24 FD 8C 08 24 FC 63 08 24 FC C6 58 28 FC E7 08 24 FC C6 08 24 FC 49 48 2A D8 C1 00 A0 FD AD 10 28 FD AD 28 2A FE 4D 08 24 C8 2A 00 00 FC 00 08 28 C8 27 00 00 FE 67 08 28 FD C0 00 F2 FE 20 02 B2 FE 00 02 32 FD E0 03 32 81 01 00 AC 7C E8 02 A6 81 21 00 B0 7C 13 72 14 7D 48 9A 14 7C 00 C9 D6 7D 09 9A 14 81 21 00 B4 7D 67 9A 14 CA E1 00 98 7C E9 9A 14 81 21 00 B8 7D 6B C9 D6 54 00 18 38 7C C9 9A 14 7C BF 04 2E 7D 35 FA 14 7E 95 FC 2E C2 A9 00 04 7D 20 FA 14 7C E7 C9 D6 55 6B 18 38 C0 E9 00 04 7C AB FA 14 7C CB FC 2E 7F B7 82 14 C1 45 00 04 7F 76 D2 14 7C C6 C9 D6 54 E7 18 38 7D 67 FA 14 7C 87 FC 2E
-
-. 0 1000B75C 400
-. C0 6B 00 04 3A 73 00 01 ED 86 20 28 80 01 00 C0 7D 4A C9 D6 54 C6 18 38 7D 26 FA 14 7D 26 FC 2E C1 09 00 04 ED 6A 18 28 EF A5 48 28 80 E1 00 C4 7D 08 C9 D6 55 4A 18 38 7C 6A FA 14 7C 2A FC 2E C0 43 00 04 EF 87 40 28 EC A5 48 2A 81 21 00 CC 55 08 18 38 EC C6 20 2A 7C 88 FA 14 7D A8 FC 2E C0 04 00 04 EC E7 40 2A EF 6D 08 2A 81 01 00 C8 EF 40 10 2A 81 41 00 A8 ED 4A 18 2A 7F 80 BA 14 EF 26 28 2A 7C 07 BA 14 EC 00 10 28 7C A8 BA 14 EC 4B E0 28 7C 89 BA 14 EF 0A 38 2A 7C 6A BA 14 ED AD 08 28 7F BD C1 D6 EC 2C E8 28 7E 94 CA 14 EC 85 D8 28 7E B5 8A 14 EC 67 D0 28 3A F7 00 01 ED 39 D8 2A 7F 9C C1 D6 EF C0 58 28 57 BD 18 38 EC A6 28 28 7D 3D D2 14 EC DB 30 28 ED 60 58 2A 7C 00 C1 D6 EC 1C 00 28 57 9C 18 38 7D 7C D2 14 ED 18 D0 2A EF ED 60 28 7C A5 C1 D6 EC EA 38 28 54 00 18 38 ED 5A 50 28 7D 40 D2 14 ED 8D 60 2A 7C 84 C1 D6 ED BD 68 28 54 A5 18 38 7D 05 D2 14 ED 6B E0 2A 7C 63 C1 D6 54 84 18 38 7C E4 D2 14 54 63 18 38 FC 4E 00 B2 7C C3 D2 14 FC 97 01 32 FC 77 00 F2 CA E1 00 A0 ED 8C E8 2A FC 2E 00 72 FD 33 02 72 FC D2 01 B2 FC 10 00 32 FF CF 07 B2 FC B7 01 72 FC F7 01 F2 FC 40 10 18 EE 94 C8 2A FD 13 02 32 FD 52 02 B2 FD B0 03 72 FF EF 07 F2 FC 80 20 18 FC 60 18 18 FC 20 08 18 EE B5 C0 2A
-
-. 0 1000B8EC 400
-. FD 71 02 F2 EE 94 D8 2A FC C0 30 18 FF C0 F0 18 FC 00 00 18 FF 60 10 50 FD 91 03 32 FD 20 48 18 EE B5 D0 2A FD 40 50 18 FF E0 F8 18 FC A0 28 18 FC E0 38 18 FD A0 68 18 FF A0 20 50 FF 80 18 50 FF 40 08 50 FD 00 40 18 FD 60 58 18 ED 34 48 2A EF 7B 00 28 EC 84 30 2A EC 00 F0 2A FD 80 60 18 ED 15 40 2A EF BD 28 28 EF 9C 38 28 EC A5 30 28 EC E7 50 28 EF 5A 68 28 EC 21 F8 28 EC 42 F0 28 C3 C1 00 70 EC 63 50 2A ED AD F8 2A C3 E1 00 78 EC 00 58 2A EC 89 20 2A EF 7B 58 2A ED AD 60 2A EC 21 60 2A EC 42 58 2A EF A9 E8 2A EF 88 E0 2A EC 68 18 2A ED 29 28 2A ED 08 38 2A EF 5A 60 2A EC E4 00 28 EC BD D8 28 ED 68 08 28 ED 89 10 2A EC C3 68 2A EC 84 00 2A C0 01 00 80 ED 29 10 28 C0 41 00 90 ED 08 08 2A C0 21 00 88 EC 63 68 28 EF BD D8 2A C3 61 00 68 ED 5C D0 2A EC 42 01 F2 EF 9C D0 28 EE E0 03 32 EF 5B 01 32 D0 41 01 48 ED BB 00 F2 C3 61 00 88 EF 1F 02 72 EE C1 01 72 EC 3F 02 32 EF E0 02 F2 C0 01 00 90 EF 3E 07 72 EC 5E 07 32 EF DB 02 B2 EF 60 01 B2 C0 01 00 64 EC 60 D0 FA C3 41 00 6C C0 01 00 74 EF 9A CF 3A C3 41 00 7C ED 00 C2 3A C0 01 00 84 ED 7A BA FA C2 E1 00 8C C3 41 01 48 ED 40 B2 BA C0 01 00 64 EC D7 D1 BA C3 41 00 7C EC 80 69 38 C2 E1 00 74 C1 A1 00 6C ED 9A FB 38 C0 01 00 8C ED 37 0A 78
-
-. 0 1000BA7C 80
-. C3 E1 00 84 EF AD 17 78 EC E0 D9 F8 7E 96 D5 2E EC BF F1 78 D2 BB 00 04 7E D6 92 14 7C 9D D5 2E D0 69 00 04 7F BC D5 2E D3 8B 00 04 7D 3A 05 2E D1 0A 00 04 7D 85 D5 2E D1 68 00 04 7C A4 D5 2E D1 47 00 04 7C E3 D5 2E D0 C6 00 04 42 00 FC 14
-
-. 0 1000BACC 92
-. 80 E1 00 EC 39 8C 00 01 7F 8C 78 40 81 01 00 E8 38 E7 00 08 81 21 00 E4 81 41 00 E0 39 08 00 08 81 61 00 DC 39 29 00 08 90 E1 00 EC 39 4A 00 08 80 E1 00 D8 39 6B 00 08 80 01 00 A8 38 E7 00 08 91 01 00 E8 7E F7 02 14 91 21 00 E4 91 41 00 E0 91 61 00 DC 90 E1 00 D8 40 BC E8 74
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 7, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 7, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 7, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 7, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 7, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 7, stride = 1
-. 0 10006588 16
-. 7D 28 5B 96 7C 09 59 D6 7F 88 00 00 40 9E FF F0
-
-. 0 10006584 20
-. 39 6B 00 02 7D 28 5B 96 7C 09 59 D6 7F 88 00 00 40 9E FF F0
-
-. 0 10006598 24
-. 54 E0 10 3A 7D 28 4B 78 2F 89 00 01 7D 66 01 2E 38 E7 00 01 40 9E FF DC
-
-PASS: gsl_fft_real_wavetable_alloc, n = 7, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 7
-. 0 10010FA4 76
-. 3C 00 43 30 80 FE 82 6C 90 01 00 08 3A 40 00 00 93 61 00 0C 7E 91 DB 96 C9 A7 00 00 C8 01 00 08 81 3E 82 70 FC 00 68 28 81 01 00 18 CB E9 00 00 81 21 00 30 FF FF 00 24 83 89 00 00 7E 08 8B 96 FC 20 F8 90 7F 48 DB 96 48 01 7F 09
-
-. 0 10010FF0 12
-. FF C0 08 90 FC 20 F8 90 48 01 7F 9D
-
-. 0 10010FFC 12
-. 7F 92 80 40 FF A0 08 90 40 9C 00 D8
-
-. 0 10011008 72
-. 82 FE 82 74 38 60 00 00 82 DE 82 78 56 86 08 3C 38 A0 00 00 7C 18 19 D6 C8 D7 00 00 C8 F6 00 00 38 E0 00 00 39 43 FF FF 7F 6B DB 78 54 04 18 38 2F 07 00 00 C9 36 00 00 C9 57 00 00 FD 00 48 90 FD 60 48 90 41 9A 00 14
-
-. 0 10011060 12
-. 39 00 00 00 7F 88 D8 40 40 9C 00 44
-
-. 0 1001106C 36
-. 7F 69 03 A6 7C A9 2B 78 7C 09 E9 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 18 38 7D 9F 04 AE 41 9E 00 14
-
-. 0 100110A0 12
-. FD 0B 43 3A FD 2A 4B 3A 42 00 FF CC
-
-. 0 10011074 28
-. 7C 09 E9 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 18 38 7D 9F 04 AE 41 9E 00 14
-
-. 0 10011090 28
-. FC 07 02 F2 FD A7 02 B2 FD 46 02 B8 FD 66 6A FA FD 0B 43 3A FD 2A 4B 3A 42 00 FF CC
-
-. 0 100110AC 4
-. 40 9A 08 1C
-
-. 0 100110B0 24
-. 7D 24 CD AE 38 E7 00 01 39 6B FF FF 7F 8B 38 40 7D 4A 32 14 40 9C FF 74
-
-. 0 10011038 24
-. 2F 07 00 00 C9 36 00 00 C9 57 00 00 FD 00 48 90 FD 60 48 90 41 9A 00 14
-
-. 0 10011050 28
-. FC 07 07 72 FD A6 07 72 FC C6 07 BA FC E7 6F B8 39 00 00 00 7F 88 D8 40 40 9C 00 44
-
-. 0 100118C8 8
-. 7F 8B 38 40 40 9D 00 24
-
-. 0 100118D0 32
-. 55 49 18 38 7C 18 51 D6 39 29 00 08 7D 29 C1 D6 54 00 18 38 7D 39 05 AE 7D 09 CD AE 4B FF F7 C8
-
-. 0 100110B4 20
-. 38 E7 00 01 39 6B FF FF 7F 8B 38 40 7D 4A 32 14 40 9C FF 74
-
-. 0 100110C8 20
-. 3A 52 00 01 7C A5 A2 14 7F 92 80 40 7C 63 8A 14 41 9C FF 44
-
-. 0 100110DC 8
-. 2F 94 00 01 41 9E 06 D4
-
-PASS: gsl_fft_real with signal_real_noise, n = 7, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 7, stride = 1
-. 0 1000CA58 76
-. 3C 00 43 30 81 1E 81 84 90 01 00 08 3A 40 00 00 93 E1 00 0C 81 21 00 20 C9 A8 00 00 C8 01 00 08 7D C9 FB 96 81 3E 81 88 FC 00 68 28 81 41 00 34 CB E9 00 00 81 61 00 18 FF FF 00 24 82 0A 00 00 7E 6B FB 96 FC 20 F8 90 48 01 C4 55
-
-. 0 1000CAA4 12
-. FF C0 08 90 FC 20 F8 90 48 01 C4 E9
-
-. 0 1000CAB0 12
-. 7F 92 70 40 FF A0 08 90 40 9C 00 DC
-
-. 0 1000CABC 40
-. 7E BF D9 D6 82 DE 81 8C 80 BE 81 90 3B 20 00 00 3B 00 00 00 38 60 00 00 C9 16 00 00 7F 83 F8 40 C9 25 00 00 40 9C 00 A0
-
-. 0 1000CAE4 40
-. 7C 18 D9 D6 7F 26 CB 78 7C 1C 01 D6 7C 95 91 D6 54 07 18 38 2F 83 00 00 C9 85 00 00 C9 76 00 00 FD 40 60 90 41 9E 00 18
-
-. 0 1000CB20 28
-. 39 00 00 00 39 64 FF FF 57 6A 08 3C 2F 88 00 00 7C 08 F8 50 7F 00 40 00 40 9E 04 8C
-
-. 0 1000CB3C 40
-. C8 05 00 00 7D A7 EC AE FC 0A 00 32 FC 0B 03 78 FD 8C 00 2A 39 08 00 01 7D 6B 52 14 7C 08 F8 50 7F 80 40 40 40 9C FF CC
-
-. 0 1000CB2C 16
-. 2F 88 00 00 7C 08 F8 50 7F 00 40 00 40 9E 04 8C
-
-. 0 1000CFC4 28
-. FD A9 02 B2 55 69 18 38 39 29 00 08 FC 09 02 F2 FD 68 6A F8 FD 48 02 BA 41 9A 00 28
-
-. 0 1000CFE0 36
-. 7D 29 E1 D6 7C 1C 59 D6 7C 09 EC AE FC 0A 00 32 54 00 18 38 7D BD 04 AE FC 0B 03 78 FC 00 00 2A 4B FF FB 4C
-
-. 0 1000CB4C 24
-. FD 8C 00 2A 39 08 00 01 7D 6B 52 14 7C 08 F8 50 7F 80 40 40 40 9C FF CC
-
-. 0 1000CB64 28
-. 7C 17 31 D6 38 63 00 01 7F 83 F8 40 7C C6 9A 14 54 00 18 38 7D 9A 05 AE 41 9C FF 7C
-
-. 0 1000CAF8 20
-. 2F 83 00 00 C9 85 00 00 C9 76 00 00 FD 40 60 90 41 9E 00 18
-
-. 0 1000CB0C 48
-. FC 09 07 B2 FD A9 07 72 FC 08 07 7A FD 08 6F B8 FD 20 00 90 39 00 00 00 39 64 FF FF 57 6A 08 3C 2F 88 00 00 7C 08 F8 50 7F 00 40 00 40 9E 04 8C
-
-. 0 1000CB80 20
-. 3A 52 00 01 7F 18 FA 14 7F 92 70 40 7F 39 DA 14 41 9C FF 40
-
-. 0 1000CB94 8
-. 2F 9B 00 01 41 9E 03 18
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 7, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 7, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 7
-. 0 10012F94 76
-. 3C 00 43 30 80 FE 82 C8 90 01 00 08 3A 40 00 00 93 61 00 0C 7E 91 DB 96 C9 A7 00 00 C8 01 00 08 81 3E 82 CC FC 00 68 28 81 01 00 18 CB E9 00 00 81 21 00 30 FF FF 00 24 83 89 00 00 7E 08 8B 96 FC 20 F8 90 7F 48 DB 96 48 01 5F 19
-
-. 0 10012FE0 12
-. FF C0 08 18 FC 20 F8 90 48 01 5F AD
-
-. 0 10012FEC 12
-. 7F 92 80 40 FF A0 08 18 40 9C 00 D8
-
-. 0 10012FF8 72
-. 82 FE 82 D0 38 60 00 00 82 DE 82 D4 56 86 08 3C 38 A0 00 00 7C 18 19 D6 C0 D7 00 00 C0 F6 00 00 38 E0 00 00 39 43 FF FF 7F 6B DB 78 54 04 10 3A 2F 07 00 00 C1 36 00 00 C1 57 00 00 FD 00 48 90 FD 60 48 90 41 9A 00 14
-
-. 0 10013050 12
-. 39 00 00 00 7F 88 D8 40 40 9C 00 44
-
-. 0 1001305C 36
-. 7F 69 03 A6 7C A9 2B 78 7C 09 F9 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 10 3A 7D 9D 04 2E 41 9E 00 14
-
-. 0 10013090 12
-. ED 0B 43 3A ED 2A 4B 3A 42 00 FF CC
-
-. 0 10013064 28
-. 7C 09 F9 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 10 3A 7D 9D 04 2E 41 9E 00 14
-
-. 0 10013080 28
-. EC 07 02 F2 ED A7 02 B2 ED 46 02 B8 ED 66 6A FA ED 0B 43 3A ED 2A 4B 3A 42 00 FF CC
-
-. 0 1001309C 4
-. 40 9A 08 58
-
-. 0 100130A0 24
-. 7D 24 CD 2E 38 E7 00 01 39 6B FF FF 7F 8B 38 40 7D 4A 32 14 40 9C FF 74
-
-. 0 10013028 24
-. 2F 07 00 00 C1 36 00 00 C1 57 00 00 FD 00 48 90 FD 60 48 90 41 9A 00 14
-
-. 0 10013040 28
-. EC 07 07 72 ED A6 07 72 EC C6 07 BA EC E7 6F B8 39 00 00 00 7F 88 D8 40 40 9C 00 44
-
-. 0 100138F4 8
-. 7F 8B 38 40 40 9D 00 24
-
-. 0 100138FC 32
-. 55 49 10 3A 7C 18 51 D6 39 29 00 04 7D 29 C1 D6 54 00 10 3A 7D 39 05 2E 7D 09 CD 2E 4B FF F7 8C
-
-. 0 100130A4 20
-. 38 E7 00 01 39 6B FF FF 7F 8B 38 40 7D 4A 32 14 40 9C FF 74
-
-. 0 100130B8 20
-. 3A 52 00 01 7C A5 A2 14 7F 92 80 40 7C 63 8A 14 41 9C FF 44
-
-. 0 100130CC 8
-. 2F 94 00 01 41 9E 07 10
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 7, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 7, stride = 1
-. 0 1000EC20 76
-. 3C 00 43 30 80 DE 81 FC 90 01 00 08 3A 40 00 00 93 A1 00 0C C9 A6 00 00 C8 01 00 08 81 3E 82 00 FC 00 68 28 80 E1 00 20 CB E9 00 00 7D C7 EB 96 81 01 00 34 FF FF 00 24 81 21 00 18 82 08 00 00 7E 69 EB 96 FC 20 F8 90 48 01 A2 8D
-
-. 0 1000EC6C 12
-. FF C0 08 18 FC 20 F8 90 48 01 A3 21
-
-. 0 1000EC78 12
-. 7F 92 70 40 FF A0 08 18 40 9C 00 DC
-
-. 0 1000EC84 40
-. 7E BD D9 D6 82 DE 82 04 80 BE 82 08 3B 20 00 00 3B 00 00 00 38 60 00 00 C1 16 00 00 7F 83 E8 40 C1 25 00 00 40 9C 00 A0
-
-. 0 1000ECAC 40
-. 7C 18 D9 D6 7F 26 CB 78 7C 1C 01 D6 7C 95 91 D6 54 07 10 3A 2F 83 00 00 C1 85 00 00 C1 76 00 00 FD 40 60 90 41 9E 00 18
-
-. 0 1000ECE8 28
-. 39 00 00 00 39 64 FF FF 57 6A 08 3C 2F 88 00 00 7C 08 E8 50 7F 00 40 00 40 9E 04 90
-
-. 0 1000ED04 40
-. C0 05 00 00 7D A7 FC 2E EC 0A 00 32 EC 0B 03 78 ED 8C 00 2A 39 08 00 01 7D 6B 52 14 7C 08 E8 50 7F 80 40 40 40 9C FF CC
-
-. 0 1000ECF4 16
-. 2F 88 00 00 7C 08 E8 50 7F 00 40 00 40 9E 04 90
-
-. 0 1000F190 28
-. EC 09 02 B2 55 69 10 3A ED A9 02 F2 39 29 00 04 ED 68 02 F8 ED 48 6A BA 41 9A 00 28
-
-. 0 1000F1AC 36
-. 7D 29 E1 D6 7C 1C 59 D6 7C 09 FC 2E EC 0A 00 32 54 00 10 3A 7D BF 04 2E EC 0B 03 78 EC 00 00 2A 4B FF FB 48
-
-. 0 1000ED14 24
-. ED 8C 00 2A 39 08 00 01 7D 6B 52 14 7C 08 E8 50 7F 80 40 40 40 9C FF CC
-
-. 0 1000ED2C 28
-. 7C 17 31 D6 38 63 00 01 7F 83 E8 40 7C C6 9A 14 54 00 10 3A 7D 9A 05 2E 41 9C FF 7C
-
-. 0 1000ECC0 20
-. 2F 83 00 00 C1 85 00 00 C1 76 00 00 FD 40 60 90 41 9E 00 18
-
-. 0 1000ECD4 48
-. EC 09 07 B2 ED A9 07 72 EC 08 07 7A ED 08 6F B8 FD 20 00 90 39 00 00 00 39 64 FF FF 57 6A 08 3C 2F 88 00 00 7C 08 E8 50 7F 00 40 00 40 9E 04 90
-
-. 0 1000ED48 20
-. 3A 52 00 01 7F 18 EA 14 7F 92 70 40 7F 39 DA 14 41 9C FF 40
-
-. 0 1000ED5C 8
-. 2F 9B 00 01 41 9E 03 1C
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 7, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 7, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 7
-PASS: gsl_fft_complex_forward with signal_noise, n = 7, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 7, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 7, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 7, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 7, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 7, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 7, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 7, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 7, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 7, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 7
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 7, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 7, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 7, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 7, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 7, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 7, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 7, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 7, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 7, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 7, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 7
-PASS: gsl_fft_real with signal_real_noise, n = 7, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 7, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 7, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 7, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 7
-PASS: gsl_fft_real_float with signal_real_noise, n = 7, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 7, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 7, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 7, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 7
-PASS: gsl_fft_complex_forward with signal_noise, n = 7, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 7, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 7, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 7, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 7, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 7, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 7, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 7, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 7, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 7, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 7
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 7, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 7, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 7, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 7, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 7, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 7, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 7, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 7, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 7, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 7, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 7
-PASS: gsl_fft_real with signal_real_noise, n = 7, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 7, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 7, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 7, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 7
-PASS: gsl_fft_real_float with signal_real_noise, n = 7, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 7, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 7, stride = 3
-. 0 100069AC 60
-. 7F FF CA 14 92 81 00 08 7C 1F BB 96 3B 9C 00 01 7F BA C2 14 3A B5 00 01 3B 7B 00 10 7C 00 B9 D6 7F E0 F8 50 93 E1 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 02 25 11
-
-. 0 1000696C 32
-. 82 50 00 08 3A 60 00 01 7D D1 73 78 93 70 01 08 7D CE 91 D6 7F 93 90 40 7E D7 73 96 40 9C 00 8C
-
-PASS: gsl_fft_complex_wavetable_alloc, n = 8, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 8
-. 0 10007BDC 8
-. 2F 8E 00 00 41 BE FE 48
-
-. 0 10007BE4 4
-. 40 9A 00 20
-
-. 0 10007BE8 28
-. CB 11 FF F0 CA F1 FF F8 CB 6C FF F0 CB 2C FF F8 CB 92 FF F0 CB 52 FF F8 4B FF FE 48
-
-. 0 10007A48 8
-. 2F 9C 00 00 41 9E 01 74
-
-. 0 10006F34 40
-. 81 61 01 88 80 01 00 24 82 EB FF 00 81 81 00 28 7C 00 B9 D6 80 C1 00 18 2F 8C 00 00 90 01 00 24 7D E6 03 96 40 9E 06 F4
-
-. 0 1000764C 32
-. 2F 97 00 02 38 E0 00 00 83 E1 00 2C 3B 20 00 01 83 41 00 10 83 01 00 14 90 E1 00 28 40 9E F9 10
-
-. 0 100076D8 132
-. 81 61 01 80 7D 28 FA 14 C9 29 00 08 7C 84 CA 14 7C 05 5A 14 7D 88 FC AE 7C 00 C9 D6 7D 6A D2 14 38 A5 00 01 7D 08 EA 14 54 00 20 36 7D 20 FA 14 7D 1F 04 AE C8 E9 00 08 7C 07 32 14 FC 0C 40 28 7C 00 C1 D6 FD A9 38 28 38 E7 00 01 FD 8C 40 2A FD 66 00 32 54 00 20 36 FD 46 03 72 7D 20 D2 14 7D 8A D5 AE 7D 4A 1A 14 FD A5 5B 7A FC 05 50 38 FD 29 38 2A D9 2B 00 08 7C 1A 05 AE D9 A9 00 08 42 00 FF 80
-
-. 0 100075A0 172
-. 38 60 00 00 80 01 02 84 81 81 01 A4 81 C1 01 A8 7C 08 03 A6 81 E1 01 AC 7D 81 81 20 82 01 01 B0 82 21 01 B4 82 41 01 B8 82 61 01 BC 82 81 01 C0 82 A1 01 C4 82 C1 01 C8 82 E1 01 CC 83 01 01 D0 83 21 01 D4 83 41 01 D8 83 61 01 DC 83 81 01 E0 83 A1 01 E4 83 C1 01 E8 83 E1 01 EC C9 C1 01 F0 C9 E1 01 F8 CA 01 02 00 CA 21 02 08 CA 41 02 10 CA 61 02 18 CA 81 02 20 CA A1 02 28 CA C1 02 30 CA E1 02 38 CB 01 02 40 CB 21 02 48 CB 41 02 50 CB 61 02 58 CB 81 02 60 CB A1 02 68 CB C1 02 70 CB E1 02 78 38 21 02 80 4E 80 00 20
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 8, stride = 1
-. 0 10007C04 40
-. C8 11 FF F8 C9 AC FF F8 C9 92 FF F8 FE E0 00 50 FF 20 68 50 CB 11 FF F0 FF 40 60 50 CB 6C FF F0 CB 92 FF F0 4B FF FE 20
-
-PASS: gsl_fft_complex_inverse with signal_noise, n = 8, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 8, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 8, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 8, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 8, stride = 1
-. 0 100097D4 60
-. 7F FF CA 14 92 81 00 08 7C 1F BB 96 3B 9C 00 01 7F BA C2 14 3A B5 00 01 3B 7B 00 08 7C 00 B9 D6 7F E0 F8 50 93 E1 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 F6 E9
-
-. 0 10009794 32
-. 82 50 00 08 3A 60 00 01 7D D1 73 78 93 70 01 08 7D CE 91 D6 7F 93 90 40 7E D7 73 96 40 9C 00 94
-
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 8, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 8
-. 0 1000AA28 8
-. 2F 8E 00 00 41 BE FE 44
-
-. 0 1000AA30 4
-. 40 9A 00 20
-
-. 0 1000AA34 28
-. C3 11 FF F8 C2 F1 FF FC C3 72 FF F8 C3 52 FF FC C3 8C FF F8 C3 2C FF FC 4B FF FE 44
-
-. 0 1000A890 8
-. 2F 9C 00 00 41 9E 01 78
-
-. 0 10009D5C 40
-. 81 41 01 44 81 81 00 24 82 EA FF 00 81 61 00 28 7D 8C B9 D6 80 01 00 18 2F 8B 00 00 91 81 00 24 7D E0 63 96 40 9E 06 EC
-
-. 0 1000A46C 32
-. 2F 97 00 02 38 E0 00 00 83 E1 00 2C 3B 20 00 01 83 41 00 10 83 01 00 14 90 E1 00 28 40 9E F9 18
-
-. 0 1000A4F8 132
-. 81 61 01 3C 7D 28 FA 14 C1 29 00 04 7C 84 CA 14 7C 05 5A 14 7D 48 FC 2E 7C 00 C9 D6 38 A5 00 01 7D 08 EA 14 54 00 18 38 7D 20 FA 14 7D 1F 04 2E C0 E9 00 04 7C 07 32 14 EC 0A 40 28 7C 00 C1 D6 ED A9 38 28 7D 2A D2 14 ED 4A 40 2A 38 E7 00 01 ED 86 00 32 ED 66 03 72 54 00 18 38 ED 29 38 2A 7D 60 D2 14 ED A5 63 7A 7D 4A D5 2E EC 05 58 38 7D 4A 1A 14 D1 29 00 04 7C 1A 05 2E D1 AB 00 04 42 00 FF 80
-
-. 0 1000A3C0 172
-. 38 60 00 00 80 01 02 34 81 81 01 54 81 C1 01 58 7C 08 03 A6 81 E1 01 5C 7D 81 81 20 82 01 01 60 82 21 01 64 82 41 01 68 82 61 01 6C 82 81 01 70 82 A1 01 74 82 C1 01 78 82 E1 01 7C 83 01 01 80 83 21 01 84 83 41 01 88 83 61 01 8C 83 81 01 90 83 A1 01 94 83 C1 01 98 83 E1 01 9C C9 C1 01 A0 C9 E1 01 A8 CA 01 01 B0 CA 21 01 B8 CA 41 01 C0 CA 61 01 C8 CA 81 01 D0 CA A1 01 D8 CA C1 01 E0 CA E1 01 E8 CB 01 01 F0 CB 21 01 F8 CB 41 02 00 CB 61 02 08 CB 81 02 10 CB A1 02 18 CB C1 02 20 CB E1 02 28 38 21 02 30 4E 80 00 20
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 8, stride = 1
-. 0 1000AA50 40
-. C0 11 FF FC C1 B2 FF FC C1 8C FF FC FE E0 00 50 FF 40 68 50 C3 11 FF F8 FF 20 60 50 C3 72 FF F8 C3 8C FF F8 4B FF FE 1C
-
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 8, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 8, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 8, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 8, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 8, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 8, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 8
-. 0 10012184 160
-. 7C 06 72 14 7D 44 3A 14 7D 20 72 14 7C 1D 01 D6 7D 69 72 14 54 E8 18 38 39 08 00 08 54 00 18 38 7D 3D 49 D6 7D BF 04 AE 7D 7D 59 D6 55 29 18 38 7D 29 FC AE 7C 1D 31 D6 55 6B 18 38 7D 6B FC AE 7C C6 D2 14 FD 4D 58 28 54 00 18 38 FD AD 58 2A 7D 9F 04 AE 7D 38 39 D6 FD 40 50 50 7C E7 8A 14 FC 0C 48 2A FD 8C 48 28 7C 18 29 D6 55 29 18 38 FD 60 68 28 7C A5 8A 14 FC 00 68 2A 7D 58 51 D6 54 00 18 38 7C 19 05 AE 7D 89 CD AE 7D 08 C1 D6 55 4A 18 38 7D 48 CD AE 7D 6A CD AE 42 00 FF 64
-
-. 0 10011ABC 8
-. 2F 9A 00 00 41 BE FC F4
-
-. 0 10011AC4 88
-. 38 E5 FF FF 7F 49 03 A6 7C E8 3B 78 7C 1D 41 D6 81 81 00 2C 54 EA 18 38 7D 68 62 14 39 4A 00 08 7D 38 39 D6 54 00 18 38 7C 1F 04 AE 7D 08 2A 14 7C E7 8A 14 7D 7D 59 D6 55 29 18 38 7C 09 CD AE 55 6B 18 38 7D 4A C1 D6 7C 0B FC AE FC 00 00 50 7C 0A CD AE 42 00 FF B8
-
-. 0 10011B1C 28
-. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 F4 18
-
-. 0 10011B38 4
-. 4B FF FC 98
-
-PASS: gsl_fft_real with signal_real_noise, n = 8, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 8, stride = 1
-. 0 1000D6D4 20
-. 39 FB 00 01 3A 40 00 01 55 E0 F8 7E 2B 80 00 01 40 9D 01 F0
-
-. 0 1000D8D4 8
-. 73 66 00 01 40 A2 F5 D8
-
-. 0 1000D8DC 8
-. 2F 91 00 00 41 BE F5 D0
-
-. 0 1000D8E4 208
-. 80 FE 81 6C 38 9B FF FF 7E 29 03 A6 57 63 08 3C C9 27 00 00 7C 85 23 78 57 7F 10 3A 7D 23 2A 14 54 AB 18 38 55 2A 18 38 7C 1C 29 D6 39 6B 00 08 81 81 00 30 39 4A 00 08 7D 04 62 14 7D 3C 49 D6 54 00 18 38 7D 9D 04 AE 7C E8 62 14 7C C7 62 14 7C A5 FA 14 7D 6B E1 D6 55 29 18 38 7D A9 EC AE FD 4C 68 28 7D 4A E1 D6 7D 6B EC AE FD 8C 68 2A FD 4A 02 72 7C 0A EC AE 7C 17 21 D6 FD 8C 60 2A 7C 84 DA 14 FD AB 00 2A FC 00 58 28 7D 17 41 D6 54 00 18 38 FD AD 02 72 7D 9A 05 AE FC 00 00 2A 7C F7 39 D6 55 08 18 38 FD 6A 68 2A FD 4A 68 28 7C D7 31 D6 FD 60 58 50 54 E7 18 38 7D 48 D5 AE 7C 07 D5 AE 54 C6 18 38 7D 66 D5 AE 42 00 FF 50
-
-. 0 1000D9B4 28
-. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 F0 24
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 8, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 8, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 8
-. 0 100141E0 160
-. 7C 06 72 14 7D 44 3A 14 7D 20 72 14 7C 1F 01 D6 7D 69 72 14 54 E8 10 3A 39 08 00 04 54 00 10 3A 7D 3F 49 D6 7D BD 04 2E 7D 7F 59 D6 55 29 10 3A 7D 29 EC 2E 7C 1F 31 D6 55 6B 10 3A 7D 6B EC 2E 7C C6 D2 14 ED 4D 58 28 54 00 10 3A ED AD 58 2A 7D 9D 04 2E 7D 38 39 D6 FD 40 50 50 7C E7 8A 14 EC 0C 48 2A ED 8C 48 28 7C 18 29 D6 55 29 10 3A ED 60 68 28 7C A5 8A 14 EC 00 68 2A 7D 58 51 D6 54 00 10 3A 7C 19 05 2E 7D 89 CD 2E 7D 08 C1 D6 55 4A 10 3A 7D 48 CD 2E 7D 6A CD 2E 42 00 FF 64
-
-. 0 10013AE8 8
-. 2F 9A 00 00 41 BE FC F4
-
-. 0 10013AF0 88
-. 38 E4 FF FF 7F 49 03 A6 7C E8 3B 78 7C 1F 41 D6 81 81 00 2C 54 EA 10 3A 7D 68 62 14 39 4A 00 04 7D 38 39 D6 54 00 10 3A 7C 1D 04 2E 7D 08 22 14 7C E7 8A 14 7D 7F 59 D6 55 29 10 3A 7C 09 CD 2E 55 6B 10 3A 7D 4A C1 D6 7C 0B EC 2E FC 00 00 50 7C 0A CD 2E 42 00 FF B8
-
-. 0 10013B48 28
-. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 F3 DC
-
-. 0 10013B64 4
-. 4B FF FC 98
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 8, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 8, stride = 1
-. 0 1000F8B8 20
-. 39 FB 00 01 3A 40 00 01 55 E0 F8 7E 2B 80 00 01 40 9D 01 F0
-
-. 0 1000FAB8 8
-. 73 66 00 01 40 A2 F5 C0
-
-. 0 1000FAC0 8
-. 2F 91 00 00 41 BE F5 B8
-
-. 0 1000FAC8 216
-. 80 FE 81 E4 38 9B FF FF 7E 29 03 A6 57 63 08 3C C9 27 00 00 7C 85 23 78 57 7D 10 3A 7D 23 2A 14 54 AB 10 3A 55 2A 10 3A 7C 1C 29 D6 39 6B 00 04 81 81 00 30 39 4A 00 04 7D 04 62 14 7D 3C 49 D6 54 00 10 3A 7D 5F 04 2E 7C E8 62 14 7C C7 62 14 7C A5 EA 14 7D 6B E1 D6 55 29 10 3A 7C 09 FC 2E ED AA 00 28 7D 4A E1 D6 7D 6B FC 2E ED 4A 00 2A 7D 8A FC 2E 7C 17 21 D6 FD AD 02 72 7C 84 DA 14 EC 0B 60 2A ED 8C 58 28 7D 17 41 D6 FD A0 68 18 54 00 10 3A ED 4A 50 2A 7C F7 39 D6 ED 8C 60 2A FC 00 02 72 55 08 10 3A 7D 5A 05 2E 7C D7 31 D6 54 E7 10 3A FC 00 00 18 ED 6D 00 2A 54 C6 10 3A ED AD 00 28 FD 60 58 50 7D A8 D5 2E 7D 87 D5 2E 7D 66 D5 2E 42 00 FF 48
-
-. 0 1000FBA0 28
-. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 F0 00
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 8, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 8, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 8
-PASS: gsl_fft_complex_forward with signal_noise, n = 8, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 8, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 8, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 8, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 8, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 8, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 8, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 8, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 8, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 8, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 8
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 8, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 8, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 8, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 8, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 8, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 8, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 8, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 8, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 8, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 8, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 8
-PASS: gsl_fft_real with signal_real_noise, n = 8, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 8, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 8, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 8, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 8
-PASS: gsl_fft_real_float with signal_real_noise, n = 8, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 8, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 8, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 8, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 8
-PASS: gsl_fft_complex_forward with signal_noise, n = 8, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 8, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 8, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 8, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 8, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 8, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 8, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 8, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 8, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 8, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 8
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 8, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 8, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 8, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 8, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 8, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 8, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 8, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 8, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 8, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 8, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 8
-PASS: gsl_fft_real with signal_real_noise, n = 8, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 8, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 8, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 8, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 8
-PASS: gsl_fft_real_float with signal_real_noise, n = 8, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 8, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 8, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 9, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 9
-. 0 10007974 8
-. 2F 92 00 00 41 BE FE A4
-
-. 0 1000797C 4
-. 40 92 00 18
-
-. 0 10007980 20
-. CB CC FF F0 CB AC FF F8 C8 35 FF F0 CB F5 FF F8 4B FF FE 9C
-
-. 0 1000782C 8
-. 2F 83 00 00 41 9E 01 2C
-
-. 0 1000786C 240
-. 7C 04 A2 14 7D 76 22 14 7C 00 C9 D6 7D 26 FA 14 C8 E9 00 08 7D 07 D2 14 7D 06 FC AE 38 84 00 01 7F BD CA 14 7D 6B C9 D6 54 00 20 36 7D 40 FA 14 7D BF 04 AE C8 0A 00 08 7C 05 1A 14 7C C6 DA 14 55 6B 20 36 7C 00 C1 D6 7D 2B FA 14 7D 8B FC AE C9 69 00 08 7D 37 2A 14 FC 8D 60 2A 38 A5 00 01 FC 60 58 2A 7D 29 C1 D6 FD AD 60 28 54 00 20 36 FC 00 58 28 7D 60 D2 14 FD 44 07 32 55 29 20 36 FD 83 07 32 7D 49 D2 14 FD A2 03 72 FC 02 00 32 FD 48 50 28 FD 87 60 28 FD 08 20 2A FD 6A 00 2A FD 2C 68 28 FD 4A 00 28 7D 07 D5 AE FD 8C 68 2A 7C E7 E2 14 FC BF 02 F2 FC 1D 02 B2 FD BD 03 32 FC DF 02 72 FD 9E 03 3A FD 21 2A 7A FD 5E 6A B8 FD 61 32 F8 FC E7 18 2A D8 E8 00 08 7D 5A 05 AE D9 8B 00 08 7D 69 D5 AE D9 2A 00 08 42 00 FF 14
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 9, stride = 1
-. 0 10007994 28
-. C8 0C FF F8 C9 B5 FF F8 FF A0 00 50 CB CC FF F0 FF E0 68 50 C8 35 FF F0 4B FF FE 80
-
-PASS: gsl_fft_complex_inverse with signal_noise, n = 9, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 9, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 9, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 9, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 9, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 9, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 9
-. 0 1000A7B0 8
-. 2F 92 00 00 41 BE FE 88
-
-. 0 1000A7B8 4
-. 40 92 00 18
-
-. 0 1000A7BC 20
-. C3 AC FF F8 C3 8C FF FC C3 F5 FF F8 C3 D5 FF FC 4B FF FE 80
-
-. 0 1000A64C 8
-. 2F 83 00 00 41 9E 01 48
-
-. 0 1000A690 264
-. 7C 04 9A 14 7D 76 22 14 7C 00 C9 D6 7D 26 FA 14 C0 A9 00 04 38 84 00 01 7C C6 FC 2E 7F BD CA 14 FD 80 28 90 7C C6 DA 14 7D 6B C9 D6 54 00 18 38 7D 40 FA 14 7D 3F 04 2E C1 4A 00 04 FD 60 30 90 7C 05 1A 14 55 6B 18 38 7C 00 C1 D6 7D 2B FA 14 7D 0B FC 2E C0 E9 00 04 7D 77 2A 14 EC 89 40 2A 7D 27 D2 14 EC 6A 38 2A 7D 6B C1 D6 ED 29 40 28 54 00 18 38 FC 00 20 90 7D 40 D2 14 FD A0 18 90 38 A5 00 01 ED 4A 38 28 55 6B 18 38 FC 00 00 72 7D 0B D2 14 FD AD 00 72 FD 6B 00 28 ED 22 02 72 FD 8C 68 28 ED 42 02 B2 FD 60 58 18 FD 80 60 18 EC C6 20 2A EC 0B 50 2A ED AC 48 28 ED 6B 50 28 7C C7 D5 2E ED 8C 48 2A 7C E7 E2 14 ED 3E 00 32 ED 5C 02 F2 ED 1C 03 32 EC FE 03 72 EC A5 18 2A ED 9D 53 3A ED BF 4B 7A ED 7D 42 F8 D0 A9 00 04 EC 1F 38 38 7D 7A 05 2E D1 8A 00 04 7C 0B D5 2E D1 A8 00 04 42 00 FE FC
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 9, stride = 1
-. 0 1000A7D0 28
-. C0 0C FF FC C1 B5 FF FC FF 80 00 50 C3 AC FF F8 FF C0 68 50 C3 F5 FF F8 4B FF FE 64
-
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 9, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 9, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 9, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 9, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 9, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 9, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 9
-. 0 10011ECC 20
-. 38 1B 00 01 3A C0 00 01 54 00 F8 7E 2B 80 00 01 40 9D 01 A4
-
-. 0 10011EE0 64
-. 81 9E 82 50 3B 57 00 10 80 FE 82 54 3B 9C 00 10 7C 14 03 78 57 77 08 3C CB CC 00 00 CB A7 00 00 2F 95 00 00 C8 1C FF F8 C9 BA FF F8 FC 80 00 50 C8 BC FF F0 FC 40 68 50 C8 7A FF F0 41 9E 01 50
-
-. 0 10011F20 332
-. 56 CB 08 3C 7D 36 D8 50 55 29 08 3C 38 AB FF FF 38 89 FF FF FC 20 F0 90 FF E0 E8 90 7C A6 2B 78 7E A9 03 A6 7D 26 1A 14 7C F7 2A 14 7C 09 1A 14 7D 7D 49 D6 54 0A 18 38 55 29 18 38 39 29 00 08 7C 1D 01 D6 39 4A 00 08 55 6B 18 38 7D 8B FC AE 54 CB 18 38 39 6B 00 08 7D 29 E9 D6 54 00 18 38 7D 7F 04 AE FD 04 03 32 54 E8 18 38 FC E2 02 F2 39 08 00 08 7D 4A E9 D6 7D A9 FC AE 54 A9 18 38 FD 44 03 72 39 29 00 08 7C 0A FC AE FD A5 43 7A 7D 6B E9 D6 FD 22 00 32 FC 03 38 3A 7C 1D 31 D6 7C EB FC AE FD 63 4A F8 54 8B 18 38 39 6B 00 08 FD 85 53 38 7C C6 DA 14 54 00 18 38 7D 58 21 D6 FC CD 00 2A 7C 84 8A 14 FD AD 00 28 FD 4C 58 28 FD 26 00 72 7C F8 39 D6 55 4A 18 38 FD 8C 58 2A 7D 7F 04 AE FD 4A 07 F2 7C 18 29 D6 54 E7 18 38 FC 0C 00 72 7C A5 8A 14 FD 27 48 28 FD AD 07 F2 7D 29 C1 D6 54 00 18 38 FC 0B 00 28 FD 09 50 28 7D 08 C1 D6 FD 6B 60 2A FC E7 30 2A FD 80 68 2A FD 00 40 50 7D 79 05 AE 7D 6B C1 D6 FC 00 68 28 FD 29 50 2A 7C E9 CD AE 7C 07 CD AE 7D 28 CD AE 7D 8A CD AE 7D 0B CD AE 42 00 FE DC
-
-. 0 1001206C 20
-. 3A D6 00 01 3B 9C 00 10 7F 94 B0 40 3B 5A 00 10 41 9D FE 84
-
-. 0 10012080 8
-. 73 68 00 01 40 A2 F7 30
-
-PASS: gsl_fft_real with signal_real_noise, n = 9, stride = 1
-. 0 1000C6B4 68
-. 3E A0 43 30 FF C0 E0 90 3B F0 FF FF 7F 9C DA 14 92 A1 00 08 7C 1C BB 96 7F B9 C2 14 3A D6 00 01 3B 5A 00 10 7C 00 B9 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 C8 01
-
-. 0 1000C6F8 16
-. 7C 39 C5 AE FC 20 F8 90 3B 39 00 10 48 01 C8 91
-
-. 0 1000C708 12
-. 37 FF FF FF D8 3D 00 08 40 82 FF B0
-
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 9, stride = 1
-. 0 1000D390 48
-. 80 DE 81 68 7C 13 03 78 3B 18 00 10 3A D0 00 10 57 79 08 3C CB 86 00 00 2F 94 00 00 C8 36 FF F0 CB F6 FF F8 C8 78 FF F0 C8 58 FF F8 41 9E 01 54
-
-. 0 1000D3C0 336
-. 56 A4 08 3C FF A0 E0 90 38 A4 FF FF 38 60 00 00 7E 89 03 A6 1D 03 00 03 7C C5 FA 14 7C 63 DA 14 7D 64 40 50 7D 08 22 14 7D 6B CA 14 39 08 FF FF 39 6B FF FF 7C 19 42 14 55 6A 18 38 54 09 18 38 39 4A 00 08 39 29 00 08 7D 4A E1 D6 55 07 18 38 38 E7 00 08 7D 29 E1 D6 7D 4A EC AE 54 CA 18 38 FD 40 50 50 39 4A 00 08 7C 1C 01 D6 7D 69 EC AE 54 A9 18 38 FC 8B 50 2A 39 29 00 08 FD 6B 50 28 7D 7C 59 D6 54 00 18 38 7D 1D 04 AE FD A4 07 72 FD 6B 07 B2 55 6B 18 38 7C E7 E1 D6 7C 0B EC AE FD 88 00 28 7D 1C 41 D6 FD 08 00 2A 7C C7 EC AE 7C E6 FA 14 FD 8C 07 B2 54 EB 18 38 39 6B 00 08 FD A6 68 28 55 08 18 38 FC 08 07 72 7D 28 EC AE 7C 17 29 D6 7C A5 DA 14 FD 4D 60 28 FD AD 60 2A FC 09 00 28 FC A3 02 B2 7C D7 31 D6 54 00 18 38 FC E1 03 72 FD 42 02 B2 7C F7 39 D6 54 C6 18 38 FD BF 03 72 FD 80 58 2A 7D 29 B9 D6 FC 00 58 28 54 E7 18 38 FD 29 40 2A FC A2 2B 3A 7D 4A B9 D6 FC FF 38 3A 7D 3A 05 AE FC 01 68 38 7D 6B B9 D6 FD 83 53 38 FC C6 20 2A 7C C9 D5 AE 7C 06 D5 AE 7C EA D5 AE 7D 87 D5 AE 7C AB D5 AE 42 00 FE C8
-
-. 0 1000D510 20
-. 3A B5 00 01 3A D6 00 10 7F 93 A8 40 3B 18 00 10 41 9D FE 88
-
-. 0 1000D2F4 128
-. 1C 07 00 03 7D 07 FA 14 7D 48 FA 14 7D 17 41 D6 7D 26 02 14 39 29 FF FF 55 2B 18 38 39 6B 00 08 7C 1C 01 D6 55 08 18 38 7D 6B E1 D6 54 00 18 38 7D 7D 04 AE 7D 3C 49 D6 7D AB EC AE FD A9 03 72 55 29 18 38 7C 17 39 D6 7C 09 EC AE 7C E7 DA 14 FD 8B 00 28 FC 00 00 2A 7D 57 51 D6 54 00 18 38 FD 4C 68 2A FD 6B 00 2A FD 8C 68 28 55 4A 18 38 7D 7A 05 AE 7D 88 D5 AE 7D 4A D5 AE 42 00 FF 84
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 9, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 9, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 9
-. 0 10013F08 20
-. 38 1B 00 01 3A C0 00 01 54 00 F8 7E 2B 80 00 01 40 9D 01 B8
-
-. 0 10013F1C 76
-. 81 9E 82 B0 3B 57 00 08 80 FE 82 AC 3B 9C 00 08 C0 0C 00 00 7C 14 03 78 57 77 08 3C C3 C7 00 00 D0 01 00 38 81 81 00 38 7D 88 03 A6 2F 95 00 00 C0 1C FF FC C1 BA FF FC FC 80 00 50 C0 BC FF F8 FC 40 68 50 C0 7A FF F8 41 9E 01 58
-
-. 0 10013F68 340
-. 56 CB 08 3C 7D 36 D8 50 7D 08 02 A6 55 29 08 3C 38 AB FF FF 91 01 00 38 38 89 FF FF C0 21 00 38 FF E0 F0 90 7C A6 2B 78 7E A9 03 A6 7D 26 1A 14 54 88 10 3A 7C 09 1A 14 7D 7F 49 D6 54 0A 10 3A 55 29 10 3A 39 29 00 04 7C 1F 01 D6 39 4A 00 04 55 6B 10 3A 7D 4B EC 2E 54 CB 10 3A 39 6B 00 04 7D 29 F9 D6 54 00 10 3A 7D 7D 04 2E ED 84 02 B2 39 08 00 04 ED 22 02 F2 7D 4A F9 D6 7D A9 EC 2E 54 A9 10 3A ED 85 63 7A 39 29 00 04 ED A4 03 72 7C 0A EC 2E 7D 6B F9 D6 ED 23 48 3A EC 02 00 32 ED 45 6A B8 7C 1F 31 D6 EC CC 48 2A 7C EB EC 2E ED 63 02 F8 7D 77 2A 14 ED 8C 48 28 55 6A 10 3A 54 00 10 3A 7C F8 21 D6 ED 0A 58 28 7C 1D 04 2E ED 4A 58 2A 39 4A 00 04 ED 66 00 72 7C C6 DA 14 ED 08 07 F2 7C 18 29 D6 ED AA 00 72 54 E7 10 3A ED 67 58 28 7C A5 8A 14 ED 8C 07 F2 7C 84 8A 14 ED A0 68 28 7D 78 59 D6 ED 2B 40 28 54 00 10 3A EC 00 50 2A EC E7 30 2A 7D 29 C1 D6 ED 4D 60 2A FD 20 48 50 55 6B 10 3A ED AD 60 28 7C 19 05 2E ED 6B 40 2A 7D 4A C1 D6 7C E9 CD 2E 7D AB CD 2E 7D 08 C1 D6 7D 6A CD 2E 7D 47 CD 2E 7D 28 CD 2E 42 00 FE DC
-
-. 0 100140BC 20
-. 3A D6 00 01 3B 9C 00 08 7F 94 B0 40 3B 5A 00 08 41 9D FE 7C
-
-. 0 100140D0 8
-. 73 69 00 01 40 A2 F7 0C
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 9, stride = 1
-. 0 1000E874 68
-. 3E A0 43 30 FF C0 E0 90 3B F0 FF FF 7F 9C DA 14 92 A1 00 08 7C 1C BB 96 7F B9 C2 14 3A D6 00 01 3B 5A 00 08 7C 00 B9 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 A6 41
-
-. 0 1000E8B8 20
-. FC 00 08 18 FC 20 F8 90 7C 19 C5 2E 3B 39 00 08 48 01 A6 CD
-
-. 0 1000E8CC 16
-. 37 FF FF FF FC 20 08 18 D0 3D 00 04 40 82 FF A8
-
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 9, stride = 1
-. 0 1000F55C 48
-. 80 DE 81 E0 7C 12 03 78 3A D6 00 08 3A B0 00 08 57 78 08 3C CB 86 00 00 2F 93 00 00 C0 75 FF F8 C0 55 FF FC C0 36 FF F8 C3 F6 FF FC 41 9E 01 6C
-
-. 0 1000F58C 360
-. 56 83 08 3C FF C0 E0 90 38 83 FF FF 3B A0 00 00 7E 69 03 A6 1D 1D 00 03 7C C4 CA 14 7C A6 CA 14 7F BD DA 14 7D 63 40 50 7D 08 1A 14 7D 6B C2 14 39 08 FF FF 39 6B FF FF 7C 18 42 14 55 6A 10 3A 54 09 10 3A 39 4A 00 04 39 29 00 04 7D 4A E1 D6 55 07 10 3A 38 E7 00 04 7D 29 E1 D6 7D 2A FC 2E 54 CA 10 3A FD 20 48 50 39 4A 00 04 7C 1C 01 D6 7D 49 FC 2E 54 89 10 3A EC 8A 48 2A 39 29 00 04 ED 4A 48 28 7D 7C 59 D6 54 00 10 3A 7D 7F 04 2E FD A0 20 90 ED 4A 07 72 55 6B 10 3A 7C E7 E1 D6 7C EB FC 2E FD AD 07 B2 54 AB 10 3A EC AB 38 2A 39 6B 00 04 7D 1C 41 D6 7C C7 FC 2E ED 6B 38 28 FD 80 28 90 FC 00 30 90 55 08 10 3A ED 6B 07 72 7D 08 FC 2E FD 8C 07 B2 7C 17 21 D6 7C 84 DA 14 FC 00 68 28 FD A0 40 90 EC C6 20 2A FC 00 00 18 7C D7 31 D6 FD AD 60 28 54 00 10 3A ED 08 28 2A ED 80 58 28 FD A0 68 18 7C B7 29 D6 EC 00 58 2A 54 C6 10 3A EC E1 03 32 7D 1A 05 2E ED 2D 50 2A ED 63 00 32 7D 29 B9 D6 ED AD 50 28 54 A5 10 3A EC 02 00 32 ED 9F 03 32 7D 4A B9 D6 ED 62 5B 7A EC FF 3A 7A 7C C9 D5 2E ED A3 03 78 ED 21 62 78 7D 6B B9 D6 7D A6 D5 2E 7D 6A D5 2E 7D 25 D5 2E 7C EB D5 2E 42 00 FE B0
-
-. 0 1000F6F4 20
-. 3A 94 00 01 3A B5 00 08 7F 92 A0 40 3A D6 00 08 41 9D FE 70
-
-. 0 1000F4C0 128
-. 1C 07 00 03 7D 07 CA 14 7D 48 CA 14 7D 17 41 D6 7D 26 02 14 39 29 FF FF 55 2B 10 3A 7C 1C 01 D6 39 6B 00 04 55 08 10 3A 7D 3C 49 D6 54 00 10 3A 7D 7F 04 2E 7D 6B E1 D6 55 29 10 3A 7C 09 FC 2E ED 8B 00 28 7D AB FC 2E EC 00 00 2A 7C 17 39 D6 7C E7 DA 14 ED A9 03 72 ED 6B 00 2A 7D 57 51 D6 ED 4C 68 2A ED 8C 68 28 54 00 10 3A 7D 7A 05 2E 55 4A 10 3A 7D 88 D5 2E 7D 4A D5 2E 42 00 FF 84
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 9, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 9, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 9
-PASS: gsl_fft_complex_forward with signal_noise, n = 9, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 9, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 9, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 9, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 9, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 9, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 9, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 9, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 9, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 9, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 9
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 9, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 9, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 9, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 9, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 9, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 9, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 9, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 9, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 9, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 9, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 9
-PASS: gsl_fft_real with signal_real_noise, n = 9, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 9, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 9, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 9, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 9
-PASS: gsl_fft_real_float with signal_real_noise, n = 9, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 9, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 9, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 9, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 9
-PASS: gsl_fft_complex_forward with signal_noise, n = 9, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 9, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 9, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 9, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 9, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 9, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 9, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 9, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 9, stride = 3
-. 0 FEEF88C 16
-. 55 46 BA 7E 28 06 00 14 39 06 00 5B 40 81 00 38
-
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 9, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 9
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 9, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 9, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 9, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 9, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 9, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 9, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 9, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 9, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 9, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 9, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 9
-PASS: gsl_fft_real with signal_real_noise, n = 9, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 9, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 9, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 9, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 9
-PASS: gsl_fft_real_float with signal_real_noise, n = 9, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 9, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 9, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 10, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 10
-. 0 10007FA0 12
-. 80 E1 00 30 2F 87 00 00 41 BE FD 50
-
-. 0 10007FAC 4
-. 40 8E 00 D0
-
-. 0 10007FB0 52
-. 81 41 01 78 81 61 01 74 80 C1 01 70 80 E1 01 6C CA 0A FF F0 C9 EA FF F8 CA 4B FF F0 CA 2B FF F8 CA C6 FF F0 CA A6 FF F8 CA 87 FF F0 CA 67 FF F8 4B FF FD 40
-
-. 0 10007D20 8
-. 2F 97 00 00 41 9E 02 34
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 10, stride = 1
-. 0 1000807C 68
-. 81 01 01 78 81 21 01 74 81 41 01 70 81 61 01 6C C8 08 FF F8 C9 A9 FF F8 C9 8A FF F8 FD E0 00 50 C9 6B FF F8 FE 20 68 50 FE A0 60 50 CA 08 FF F0 FE 60 58 50 CA 49 FF F0 CA CA FF F0 CA 8B FF F0 4B FF FC 64
-
-PASS: gsl_fft_complex_inverse with signal_noise, n = 10, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 10, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 10, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 10, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 10, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 10, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 10
-. 0 1000AE20 12
-. 81 21 00 30 2F 89 00 00 41 BE FD 24
-
-. 0 1000AE2C 4
-. 40 8E 00 D0
-
-. 0 1000AE30 56
-. 80 E1 01 30 81 01 01 28 C0 07 FF FC 81 21 01 24 C1 C7 FF F8 80 E1 01 2C C2 48 FF F8 C2 87 FF F8 C2 67 FF FC C2 28 FF FC C2 09 FF F8 C1 E9 FF FC D0 01 00 34 4B FF FD 14
-
-. 0 1000AB78 8
-. 2F 97 00 00 41 9E 02 5C
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 10, stride = 1
-. 0 1000AEFC 72
-. 81 41 01 30 81 61 01 2C 80 E1 01 28 81 01 01 24 C0 0A FF FC C1 AB FF FC C1 87 FF FC FC 00 00 50 C1 68 FF FC FE 60 68 50 FE 20 60 50 C1 CA FF F8 FD E0 58 50 C2 8B FF F8 C2 47 FF F8 C2 08 FF F8 D0 01 00 34 4B FF FC 38
-
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 10, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 10, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 10, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 10, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 10, stride = 1
-. 0 10010ACC 56
-. 7F 9C DA 14 92 A1 00 08 7C 1C C3 96 7F B9 BA 14 3A D6 00 01 3B 5A 00 10 7C 00 C1 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 83 F5
-
-PASS: gsl_fft_real_wavetable_alloc, n = 10, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 10
-. 0 100112A4 228
-. 7C 1B D2 14 7D 03 2A 14 7D 20 D2 14 7C 1D 01 D6 7D 69 D2 14 7D 4B D2 14 55 07 18 38 7D 3D 49 D6 54 00 18 38 7D 7F 04 AE 54 A6 18 38 38 C6 00 08 38 E7 00 08 7D 7D 59 D6 55 29 18 38 7D A9 FC AE 7D 5D 51 D6 55 6B 18 38 7D 4B FC AE FD 8D 50 2A 55 4A 18 38 7C 1D D9 D6 7D 0A FC AE FD AD 50 28 7F 7B B2 14 FC 0B 40 2A 54 00 18 38 FD 3C 03 72 7D 5F 04 AE 7D 38 21 D6 FC E0 60 2A 7C 84 8A 14 FC 00 60 28 FD BB 03 72 7C 18 29 D6 55 29 18 38 FD 87 00 F2 7C A5 8A 14 FD 6B 40 28 FC 00 01 32 7D 18 41 D6 54 00 18 38 FD 8A 60 28 FD 25 4A FA 7C C6 C1 D6 55 08 18 38 FD 66 6A F8 FD 4A 38 2A 7C E7 C1 D6 FD AC 00 28 FD 8C 00 2A 7D 49 CD AE 7D 99 05 AE 7D 66 CD AE 7D A8 CD AE 7D 27 CD AE 42 00 FF 20
-
-. 0 100119CC 20
-. 2F 9A 00 00 C8 04 FF F8 C9 04 FF F0 FC E0 00 50 41 9E 00 C4
-
-PASS: gsl_fft_real with signal_real_noise, n = 10, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 10, stride = 1
-. 0 1000DB58 20
-. 3A 5B 00 01 3A 80 00 01 56 40 F8 7E 2B 80 00 01 40 9D 02 C0
-
-. 0 1000DE28 8
-. 73 6B 00 01 40 A2 F0 84
-
-. 0 1000DE30 8
-. 2F 93 00 00 41 BE F0 7C
-
-. 0 1000DE38 292
-. 81 9E 81 7C 7E 69 03 A6 80 FE 81 80 57 66 08 3C C8 CC 00 00 38 BB FF FF C8 A7 00 00 38 80 00 00 1D 24 00 05 7C E5 CA 14 7C 84 DA 14 7D 29 DA 14 39 29 FF FF 7C 06 4A 14 7D 7C 49 D6 54 0A 18 38 7D 06 02 14 39 4A 00 08 7C 1C 01 D6 55 6B 18 38 7D 6B EC AE 55 29 18 38 39 29 00 08 FD 6B 58 2A 54 00 18 38 7D 4A E1 D6 7C 1D 04 AE FC 00 00 2A 7D 1C 41 D6 7D AA EC AE FD 8B 00 28 FD 6B 00 2A 7D 29 E1 D6 55 08 18 38 7C E8 EC AE FD AD 68 2A FD 8C 01 72 FD 2B 39 B8 7C 09 EC AE 7D 27 CA 14 7C 17 29 D6 FD 58 03 72 7D 69 CA 14 7D 4B CA 14 FD B9 03 72 7C A5 DA 14 7C F7 39 D6 54 00 18 38 FC 00 00 2A FD 0C 48 28 FD 8C 48 2A FD 59 50 38 7D 37 49 D6 54 E7 18 38 FC 18 68 3A FD 20 60 50 7D 77 59 D6 FD A0 40 50 55 29 18 38 FD 6B 38 2A FD 29 00 28 7D 57 51 D6 FD AD 50 28 FD 8C 00 28 55 6B 18 38 FD 08 50 28 7D 7A 05 AE 55 4A 18 38 7D 87 D5 AE 7D 09 D5 AE 7D AB D5 AE 7D 2A D5 AE 42 00 FF 00
-
-. 0 1000DF5C 28
-. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 EA 7C
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 10, stride = 1
-. 0 10012AB4 56
-. 7F 9C DA 14 92 A1 00 08 7C 1C C3 96 7F B9 BA 14 3A D6 00 01 3B 5A 00 08 7C 00 C1 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 64 0D
-
-PASS: gsl_fft_real_wavetable_float_alloc, n = 10, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 10
-. 0 10013294 244
-. 7C 03 D2 14 7D 14 2A 14 7D 20 D2 14 7C 1F 01 D6 7D 69 D2 14 7D 4B D2 14 55 07 10 3A 7D 3F 49 D6 54 00 10 3A 7D 5D 04 2E 54 A6 10 3A 38 C6 00 04 38 E7 00 04 7D 7F 59 D6 55 29 10 3A 7D 69 EC 2E 7D 5F 51 D6 55 6B 10 3A 7D 8B EC 2E ED AB 60 2A 55 4A 10 3A 7C 1F 19 D6 7D 0A EC 2E ED 6B 60 28 7C 63 AA 14 EC 0A 40 2A 54 00 10 3A ED 4A 40 28 7D 3D 04 2E 7D 38 21 D6 EC E0 68 2A 7C 84 8A 14 EC 00 68 28 FD A0 48 90 FD 80 38 90 7C 18 29 D6 55 29 10 3A ED 29 38 2A 7C A5 8A 14 FD 8C 01 72 7D 18 41 D6 54 00 10 3A FC 00 01 B2 7D 29 CD 2E FD AD 60 28 ED 9B 02 F2 7C C6 C1 D6 FC 00 00 18 55 08 10 3A FD A0 68 18 ED 7A 02 F2 7C E7 C1 D6 ED 83 62 BA ED 0D 00 28 ED 44 5A B8 ED AD 00 2A 7D B9 05 2E 7D 46 CD 2E 7D 08 CD 2E 7D 87 CD 2E 42 00 FF 10
-
-. 0 100139F8 20
-. 2F 9A 00 00 C0 03 FF FC C1 03 FF F8 FC E0 00 50 41 9E 00 C4
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 10, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 10, stride = 1
-. 0 1000FD54 20
-. 3A 3B 00 01 3A 60 00 01 56 20 F8 7E 2B 80 00 01 40 9D 02 E0
-
-. 0 10010044 8
-. 73 6B 00 01 40 A2 F0 34
-
-. 0 1001004C 8
-. 2F 92 00 00 41 BE F0 2C
-
-. 0 10010054 308
-. 81 9E 81 F4 7E 49 03 A6 83 3E 81 F8 57 65 08 3C C8 CC 00 00 38 DB FF FF C8 B9 00 00 38 80 00 00 1D 24 00 05 7C E6 C2 14 7C 84 DA 14 7D 29 DA 14 39 29 FF FF 7C 05 4A 14 7D 7C 49 D6 7D 45 02 14 54 08 10 3A 39 08 00 04 7C 1C 01 D6 55 6B 10 3A 7D 4B FC 2E 55 29 10 3A 39 29 00 04 ED 4A 50 2A 54 00 10 3A 7D 5C 51 D6 7C 1F 04 2E EC 00 00 2A 55 4A 10 3A 7D 08 E1 D6 7C EA FC 2E 7D 47 C2 14 ED 8A 00 28 ED 4A 00 2A FC 00 38 90 7D 29 E1 D6 FD A0 50 90 ED 4A 38 2A FD 8C 01 72 7D 69 FC 2E 7D 2A C2 14 7C 17 31 D6 FD AD 01 B8 7C 08 FC 2E 7D 69 C2 14 FD 80 60 18 7C C6 DA 14 EC 00 00 2A 7C F7 39 D6 FD A0 68 18 54 00 10 3A ED 6B 58 2A 7D 5A 05 2E ED 38 00 32 ED 0C 68 28 7D 57 51 D6 ED 8C 68 2A 54 E7 10 3A EC 19 00 32 ED 39 4A F8 FD A0 40 50 7D 37 49 D6 ED 78 02 FA 55 4A 10 3A FC 00 60 50 ED AD 48 28 7D 77 59 D6 ED 8C 58 28 EC 00 58 28 55 29 10 3A ED 08 48 28 7D 87 D5 2E 55 6B 10 3A 7D 0A D5 2E 7D A9 D5 2E 7C 0B D5 2E 42 00 FE F0
-
-. 0 10010188 28
-. 80 C1 00 34 80 01 00 24 38 C6 00 04 90 C1 00 34 34 C0 FF FF 90 C1 00 24 40 82 EA 18
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 10, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 10, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 10
-PASS: gsl_fft_complex_forward with signal_noise, n = 10, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 10, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 10, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 10, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 10, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 10, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 10, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 10, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 10, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 10, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 10
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 10, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 10, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 10, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 10, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 10, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 10, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 10, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 10, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 10, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 10, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 10
-PASS: gsl_fft_real with signal_real_noise, n = 10, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 10, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 10, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 10, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 10
-PASS: gsl_fft_real_float with signal_real_noise, n = 10, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 10, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 10, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 10, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 10
-PASS: gsl_fft_complex_forward with signal_noise, n = 10, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 10, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 10, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 10, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 10, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 10, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 10, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 10, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 10, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 10, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 10
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 10, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 10, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 10, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 10, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 10, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 10, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 10, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 10, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 10, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 10, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 10
-PASS: gsl_fft_real with signal_real_noise, n = 10, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 10, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 10, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 10, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 10
-PASS: gsl_fft_real_float with signal_real_noise, n = 10, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 10, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 10, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 11, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 11
-. 0 10006FA0 44
-. 81 01 00 18 3B 77 FF FF 81 41 00 24 7C 68 BB 96 81 21 01 88 82 69 00 00 7F 8A BB 96 2F 83 00 00 7D 7B E1 D6 7D 68 03 A6 41 9E 00 3C
-
-. 0 10006FCC 56
-. 7C 69 03 A6 39 40 00 00 38 00 00 00 57 07 20 36 57 28 20 36 7C 0A FC AE 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 AE 7C 00 3A 14 C9 AB 00 08 D9 A9 00 08 42 00 FF E0
-
-. 0 10007004 20
-. 57 69 F8 7E 3A A0 00 01 39 29 00 01 2B 89 00 01 40 9D 00 B4
-
-. 0 10007018 20
-. 7D 3D 4B 78 7C 65 1B 78 38 C0 00 00 7F 86 18 40 40 9C 00 90
-
-. 0 1000702C 140
-. 7C 15 B8 50 7C 69 03 A6 7C 80 19 D6 7D 25 32 14 7C 04 32 14 7D 59 49 D6 38 C6 00 01 7D 79 01 D6 55 4A 20 36 7D AA FC AE 7C EA FA 14 55 6B 20 36 7D 38 49 D6 7C 0B FC AE 7D 0B FA 14 FD AD 00 2A 55 29 20 36 7C 18 01 D6 7D A9 D5 AE 7D 29 D2 14 C9 A8 00 08 C8 07 00 08 54 00 20 36 FC 00 68 2A D8 09 00 08 7D 20 D2 14 7C 0B FC AE 7D AA FC AE FD AD 00 28 7D BA 05 AE C8 07 00 08 C9 A8 00 08 FC 00 68 28 D8 09 00 08 42 00 FF 84
-
-. 0 100070B8 16
-. 3A B5 00 01 7C A5 1A 14 7F 9D A8 40 41 9D FF 5C
-
-. 0 10007020 12
-. 38 C0 00 00 7F 86 18 40 40 9C 00 90
-
-. 0 100070C8 8
-. 2F 83 00 00 41 9E 00 3C
-
-. 0 100070D0 56
-. 7C 69 03 A6 39 40 00 00 38 00 00 00 57 27 20 36 57 08 20 36 7C 0A D4 AE 7D 6A D2 14 7D 20 FA 14 7D 4A 42 14 7C 1F 05 AE 7C 00 3A 14 C9 AB 00 08 D9 A9 00 08 42 00 FF E0
-
-. 0 10007108 20
-. 57 69 F8 7E 39 80 00 01 39 29 00 01 2B 89 00 01 40 9D 00 74
-
-. 0 1000711C 20
-. 7D 27 4B 78 7C 6A 1B 78 38 C0 00 00 7F 86 18 40 40 9C 00 50
-
-. 0 10007130 76
-. 7C 69 03 A6 38 00 00 00 57 28 20 36 7D 2A 32 14 7C 1F 04 AE 7D 29 C1 D6 7D 60 FA 14 38 C6 00 01 55 29 20 36 7D A9 D4 AE 7D 29 D2 14 FC 00 68 2A 7C 1F 05 AE 7C 00 42 14 C9 A9 00 08 C8 0B 00 08 FC 00 68 2A D8 0B 00 08 42 00 FF C4
-
-. 0 1000717C 16
-. 39 8C 00 01 7D 4A 1A 14 7F 87 60 40 41 9D FF 9C
-
-. 0 10007124 12
-. 38 C0 00 00 7F 86 18 40 40 9C 00 50
-
-. 0 1000718C 20
-. 57 69 F8 7E 3A A0 00 01 39 29 00 01 2B 89 00 01 40 9D 01 B4
-
-. 0 100071A0 64
-. 81 9E 80 40 7E D7 79 D6 80 01 00 1C 7D 30 4B 78 28 89 00 01 91 81 01 04 2F 00 FF FF 7C 7D 1B 78 7D 32 4B 78 38 C0 00 00 7C B5 79 D6 7F 86 18 40 7C 15 B8 50 7F 60 19 D6 7C B4 2B 78 40 9C 00 60
-
-. 0 100071E0 92
-. 7C 69 03 A6 38 00 00 00 57 08 20 36 7D 26 EA 14 7C 1A 04 AE 7D 29 C9 D6 7D 40 D2 14 7D 66 DA 14 38 C6 00 01 55 29 20 36 7D 6B C9 D6 7C 09 FD AE 7D 29 FA 14 C8 0A 00 08 D8 09 00 08 55 6B 20 36 7D BA 04 AE 7C 00 42 14 7D AB FD AE 7D 6B FA 14 C8 0A 00 08 D8 0B 00 08 42 00 FF B4
-
-. 0 1000723C 8
-. 39 80 00 01 40 85 01 00
-
-. 0 10007244 20
-. 81 C1 01 04 7C 67 1B 78 82 3E 80 44 2F 85 00 00 40 9E 0D F8
-
-. 0 1000804C 4
-. 40 9A 00 18
-
-. 0 10008050 20
-. 54 A9 20 36 7D 29 9A 14 C9 09 FF F8 C8 E9 FF F0 4B FF F2 00
-
-. 0 10007260 12
-. 38 C0 00 00 7F 86 18 40 40 9C 00 B8
-
-. 0 1000726C 180
-. 7C 0C B8 50 7C 69 03 A6 7C 80 19 D6 7D 44 32 14 7D 27 32 14 7D 4A C1 D6 7C 06 EA 14 7D 06 DA 14 38 C6 00 01 7D 29 C1 D6 55 4A 20 36 7D 6A D2 14 7D 8A D4 AE C8 0B 00 08 FD 88 03 32 55 29 20 36 7C 00 C9 D6 7D 49 D4 AE FC 08 00 32 7D 29 D2 14 FD 47 02 B2 C9 69 00 08 54 00 20 36 7D 08 C9 D6 7D BF 04 AE FD 67 02 F2 7D 60 FA 14 FD 2A 00 28 FD 4A 00 2A 55 08 20 36 7D 28 FA 14 FD AD 48 2A FD 2B 60 2A FD 6B 60 28 7D BF 05 AE C8 0B 00 08 FC 00 48 2A D8 0B 00 08 7D A8 FC AE FD AD 50 2A 7D A8 FD AE C8 09 00 08 FC 00 58 2A D8 09 00 08 42 00 FF 5C
-
-. 0 10007320 32
-. 7C A5 A2 14 39 8C 00 01 7C 05 B3 96 7F 92 60 40 7C E7 1A 14 7C 00 B1 D6 7C A0 28 50 41 9D FF 14
-
-. 0 10007250 8
-. 2F 85 00 00 40 9E 0D F8
-
-. 0 10007340 16
-. 3A B5 00 01 7F BD 1A 14 7F 90 A8 40 41 9D FE 78
-
-. 0 100071C4 28
-. 38 C0 00 00 7C B5 79 D6 7F 86 18 40 7C 15 B8 50 7F 60 19 D6 7C B4 2B 78 40 9C 00 60
-
-. 0 10007350 8
-. 2F 9C 00 00 41 9E 00 3C
-
-. 0 10007358 56
-. 7F 89 03 A6 39 40 00 00 38 00 00 00 57 07 20 36 57 28 20 36 7C 0A FC AE 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 AE 7C 00 3A 14 C9 AB 00 08 D9 A9 00 08 42 00 FF E0
-
-. 0 10007390 12
-. 39 80 00 01 7F 8C B8 40 40 9C 00 68
-
-. 0 1000739C 20
-. 7F 8A E3 78 7C 60 1B 78 38 80 00 00 7F 84 E0 40 40 9C 00 40
-
-. 0 100073B0 60
-. 7F 89 03 A6 7D 20 22 14 7D 6A 22 14 7D 29 C9 D6 38 84 00 01 7D 6B C1 D6 55 29 20 36 7D A9 FC AE 7D 29 FA 14 55 6B 20 36 7D AB D5 AE 7D 6B D2 14 C8 09 00 08 D8 0B 00 08 42 00 FF CC
-
-. 0 100073EC 20
-. 39 8C 00 01 7C 00 1A 14 7F 8C B8 40 7D 4A E2 14 41 9C FF A8
-
-. 0 100073A4 12
-. 38 80 00 00 7F 84 E0 40 40 9C 00 40
-
-. 0 10007400 12
-. 2B 8F 00 01 80 A1 00 24 40 9D 00 68
-
-. 0 10007470 20
-. 3B A0 00 01 7F 86 E3 78 7F 9D 78 40 80 A1 00 24 40 9C 00 F8
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 11, stride = 1
-. 0 10008064 24
-. 54 A9 20 36 7D 29 9A 14 C8 09 FF F8 C8 E9 FF F0 FD 00 00 50 4B FF F1 E8
-
-PASS: gsl_fft_complex_inverse with signal_noise, n = 11, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 11, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 11, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 11, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 11, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 11, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 11
-. 0 10009DC8 44
-. 81 01 00 18 3B 77 FF FF 81 41 00 24 7C 68 BB 96 81 21 01 44 82 89 00 00 7F 8A BB 96 2F 83 00 00 7D 7B E1 D6 7D 68 03 A6 41 9E 00 3C
-
-. 0 10009DF4 56
-. 7C 69 03 A6 39 40 00 00 38 00 00 00 57 07 18 38 57 28 18 38 7C 0A FC 2E 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 2E 7C 00 3A 14 C1 AB 00 04 D1 A9 00 04 42 00 FF E0
-
-. 0 10009E2C 20
-. 57 69 F8 7E 3A A0 00 01 39 29 00 01 2B 89 00 01 40 9D 00 B4
-
-. 0 10009E40 20
-. 7D 3D 4B 78 7C 65 1B 78 38 C0 00 00 7F 86 18 40 40 9C 00 90
-
-. 0 10009E54 140
-. 7C 15 B8 50 7C 69 03 A6 7C 80 19 D6 7D 25 32 14 7C 04 32 14 7D 59 49 D6 38 C6 00 01 7D 79 01 D6 55 4A 18 38 7D AA FC 2E 7C EA FA 14 55 6B 18 38 7D 38 49 D6 7C 0B FC 2E 7D 0B FA 14 ED AD 00 2A 55 29 18 38 7C 18 01 D6 7D A9 D5 2E 7D 29 D2 14 C1 A8 00 04 C0 07 00 04 54 00 18 38 EC 00 68 2A D0 09 00 04 7D 20 D2 14 7C 0B FC 2E 7D AA FC 2E ED AD 00 28 7D BA 05 2E C0 07 00 04 C1 A8 00 04 EC 00 68 28 D0 09 00 04 42 00 FF 84
-
-. 0 10009EE0 16
-. 3A B5 00 01 7C A5 1A 14 7F 9D A8 40 41 9D FF 5C
-
-. 0 10009E48 12
-. 38 C0 00 00 7F 86 18 40 40 9C 00 90
-
-. 0 10009EF0 8
-. 2F 83 00 00 41 9E 00 3C
-
-. 0 10009EF8 56
-. 7C 69 03 A6 39 40 00 00 38 00 00 00 57 27 18 38 57 08 18 38 7C 0A D4 2E 7D 6A D2 14 7D 20 FA 14 7D 4A 42 14 7C 1F 05 2E 7C 00 3A 14 C1 AB 00 04 D1 A9 00 04 42 00 FF E0
-
-. 0 10009F30 20
-. 57 69 F8 7E 39 80 00 01 39 29 00 01 2B 89 00 01 40 9D 00 74
-
-. 0 10009F44 20
-. 7D 27 4B 78 7C 6A 1B 78 38 C0 00 00 7F 86 18 40 40 9C 00 50
-
-. 0 10009F58 76
-. 7C 69 03 A6 38 00 00 00 57 28 18 38 7D 2A 32 14 7C 1F 04 2E 7D 29 C1 D6 7D 60 FA 14 38 C6 00 01 55 29 18 38 7D A9 D4 2E 7D 29 D2 14 EC 00 68 2A 7C 1F 05 2E 7C 00 42 14 C1 A9 00 04 C0 0B 00 04 EC 00 68 2A D0 0B 00 04 42 00 FF C4
-
-. 0 10009FA4 16
-. 39 8C 00 01 7D 4A 1A 14 7F 87 60 40 41 9D FF 9C
-
-. 0 10009F4C 12
-. 38 C0 00 00 7F 86 18 40 40 9C 00 50
-
-. 0 10009FB4 20
-. 57 69 F8 7E 3A A0 00 01 39 29 00 01 2B 89 00 01 40 9D 01 AC
-
-. 0 10009FC8 56
-. 81 81 00 1C 7E D7 79 D6 7D 2E 4B 78 28 89 00 01 2F 0C FF FF 7C 7D 1B 78 7D 32 4B 78 38 C0 00 00 7C B5 79 D6 7F 86 18 40 7C 15 B8 50 7F 60 19 D6 7C B3 2B 78 40 9C 00 60
-
-. 0 1000A000 92
-. 7C 69 03 A6 38 00 00 00 57 08 18 38 7D 26 EA 14 7C 1A 04 2E 7D 29 C9 D6 7D 40 D2 14 7D 66 DA 14 38 C6 00 01 55 29 18 38 7D 6B C9 D6 7C 09 FD 2E 7D 29 FA 14 C0 0A 00 04 D0 09 00 04 55 6B 18 38 7D BA 04 2E 7C 00 42 14 7D AB FD 2E 7D 6B FA 14 C0 0A 00 04 D0 0B 00 04 42 00 FF B4
-
-. 0 1000A05C 8
-. 39 80 00 01 40 85 01 00
-
-. 0 1000A064 20
-. 82 3E 80 CC 7C 67 1B 78 82 1E 80 D0 2F 85 00 00 40 9E 0E 58
-
-. 0 1000AECC 4
-. 40 9A 00 18
-
-. 0 1000AED0 20
-. 54 A9 18 38 7D 29 A2 14 C1 09 FF FC C0 E9 FF F8 4B FF F1 A0
-
-. 0 1000A080 12
-. 38 C0 00 00 7F 86 18 40 40 9C 00 B8
-
-. 0 1000A08C 180
-. 7C 0C B8 50 7C 69 03 A6 7C 80 19 D6 7D 44 32 14 7D 67 32 14 7D 4A C1 D6 7C 06 EA 14 7D 06 DA 14 38 C6 00 01 7D 6B C1 D6 55 4A 18 38 7D 2A D2 14 7D AA D4 2E C1 29 00 04 ED A8 03 72 55 6B 18 38 7C 00 C9 D6 7D 4B D4 2E ED 28 02 72 7D 6B D2 14 ED 47 02 B2 C1 6B 00 04 54 00 18 38 7D 08 C9 D6 7C 1F 04 2E ED 67 02 F2 ED 8A 48 28 7D 20 FA 14 ED 4A 48 2A 55 08 18 38 EC 00 60 2A ED 8B 68 2A ED 6B 68 28 7C 1F 05 2E C0 09 00 04 EC 00 60 2A D0 09 00 04 7D 28 FA 14 7D A8 FC 2E ED AD 50 2A 7D A8 FD 2E C0 09 00 04 EC 00 58 2A D0 09 00 04 42 00 FF 5C
-
-. 0 1000A140 32
-. 7C A5 9A 14 39 8C 00 01 7C 05 B3 96 7F 92 60 40 7C E7 1A 14 7C 00 B1 D6 7C A0 28 50 41 9D FF 14
-
-. 0 1000A070 8
-. 2F 85 00 00 40 9E 0E 58
-
-. 0 1000A160 16
-. 3A B5 00 01 7F BD 1A 14 7F 8E A8 40 41 9D FE 78
-
-. 0 10009FE4 28
-. 38 C0 00 00 7C B5 79 D6 7F 86 18 40 7C 15 B8 50 7F 60 19 D6 7C B3 2B 78 40 9C 00 60
-
-. 0 1000A170 8
-. 2F 9C 00 00 41 9E 00 3C
-
-. 0 1000A178 56
-. 7F 89 03 A6 39 40 00 00 38 00 00 00 57 07 18 38 57 28 18 38 7C 0A FC 2E 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 2E 7C 00 3A 14 C1 AB 00 04 D1 A9 00 04 42 00 FF E0
-
-. 0 1000A1B0 12
-. 39 80 00 01 7F 8C B8 40 40 9C 00 68
-
-. 0 1000A1BC 20
-. 7F 8A E3 78 7C 60 1B 78 38 80 00 00 7F 84 E0 40 40 9C 00 40
-
-. 0 1000A1D0 60
-. 7F 89 03 A6 7D 20 22 14 7D 6A 22 14 7D 29 C9 D6 38 84 00 01 7D 6B C1 D6 55 29 18 38 7D A9 FC 2E 7D 29 FA 14 55 6B 18 38 7D AB D5 2E 7D 6B D2 14 C0 09 00 04 D0 0B 00 04 42 00 FF CC
-
-. 0 1000A20C 20
-. 39 8C 00 01 7C 00 1A 14 7F 8C B8 40 7D 4A E2 14 41 9C FF A8
-
-. 0 1000A1C4 12
-. 38 80 00 00 7F 84 E0 40 40 9C 00 40
-
-. 0 1000A220 12
-. 2B 8F 00 01 80 A1 00 24 40 9D 00 68
-
-. 0 1000A290 20
-. 3B A0 00 01 7F 86 E3 78 7F 9D 78 40 80 A1 00 24 40 9C 00 F8
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 11, stride = 1
-. 0 1000AEE4 24
-. 54 A9 18 38 7D 29 A2 14 C0 09 FF FC C0 E9 FF F8 FD 00 00 50 4B FF F1 88
-
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 11, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 11, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 11, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 11, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 11, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 11, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 11
-PASS: gsl_fft_real with signal_real_noise, n = 11, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 11, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 11, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 11, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 11
-PASS: gsl_fft_real_float with signal_real_noise, n = 11, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 11, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 11, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 11, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 11
-PASS: gsl_fft_complex_forward with signal_noise, n = 11, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 11, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 11, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 11, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 11, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 11, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 11, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 11, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 11, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 11, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 11
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 11, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 11, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 11, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 11, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 11, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 11, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 11, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 11, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 11, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 11, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 11
-PASS: gsl_fft_real with signal_real_noise, n = 11, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 11, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 11, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 11, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 11
-PASS: gsl_fft_real_float with signal_real_noise, n = 11, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 11, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 11, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 11, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 11
-PASS: gsl_fft_complex_forward with signal_noise, n = 11, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 11, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 11, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 11, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 11, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 11, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 11, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 11, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 11, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 11, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 11
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 11, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 11, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 11, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 11, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 11, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 11, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 11, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 11, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 11, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 11, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 11
-PASS: gsl_fft_real with signal_real_noise, n = 11, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 11, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 11, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 11, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 11
-PASS: gsl_fft_real_float with signal_real_noise, n = 11, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 11, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 11, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 12, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 12
-. 0 100084C4 12
-. 81 41 00 34 2F 8A 00 00 41 BE FC B0
-
-. 0 100084D0 4
-. 40 9A 00 54
-
-. 0 100084D4 80
-. 80 E1 01 64 80 C1 01 60 C8 07 FF F0 C8 47 FF F8 81 01 01 54 80 E1 01 58 D8 01 00 38 CA 06 FF F0 C8 06 FF F8 80 C1 01 5C D8 01 00 48 C9 E6 FF F0 C8 08 FF F8 C9 C6 FF F8 CA 67 FF F0 CA 47 FF F8 CA 28 FF F0 D8 41 00 40 D8 01 00 50 4B FF FC A0
-
-. 0 100081C0 8
-. 2F 96 00 00 41 9E 02 AC
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 12, stride = 1
-. 0 10008524 100
-. 80 C1 01 64 80 E1 01 60 81 01 01 5C 81 21 01 58 81 41 01 54 C8 06 FF F8 C9 A7 FF F8 FC 00 00 50 C9 88 FF F8 C9 69 FF F8 FD A0 68 50 C9 4A FF F8 FD C0 60 50 FE 40 58 50 D8 01 00 40 FD 40 50 50 C8 06 FF F0 CA 07 FF F0 C9 E8 FF F0 CA 69 FF F0 CA 2A FF F0 D9 A1 00 48 D9 41 00 50 D8 01 00 38 4B FF FC 3C
-
-PASS: gsl_fft_complex_inverse with signal_noise, n = 12, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 12, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 12, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 12, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 12, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 12, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 12
-. 0 1000B340 12
-. 80 E1 00 38 2F 87 00 00 41 BE FC C0
-
-. 0 1000B34C 4
-. 40 9A 00 54
-
-. 0 1000B350 80
-. 80 E1 01 18 81 01 01 0C C0 07 FF F8 C0 27 FF FC 80 E1 01 14 81 21 01 08 D0 01 00 3C C2 67 FF F8 C0 07 FF FC 80 E1 01 10 D0 01 00 44 C2 47 FF F8 C0 09 FF FC C2 27 FF FC C2 08 FF F8 C1 E8 FF FC C1 C9 FF F8 D0 21 00 40 D0 01 00 48 4B FF FC A4
-
-. 0 1000B040 8
-. 2F 96 00 00 41 9E 02 A8
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 12, stride = 1
-. 0 1000B3A0 100
-. 80 E1 01 18 81 01 01 14 81 21 01 10 81 41 01 0C 81 61 01 08 C0 07 FF FC C1 A8 FF FC FC 00 00 50 C1 89 FF FC C1 6A FF FC FD A0 68 50 C1 4B FF FC FE 20 60 50 FD E0 58 50 D0 01 00 40 FD 40 50 50 C0 07 FF F8 C2 68 FF F8 C2 49 FF F8 C2 0A FF F8 C1 CB FF F8 D1 A1 00 44 D1 41 00 48 D0 01 00 3C 4B FF FC 40
-
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 12, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 12, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 12, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 12, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 12, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 12, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 12
-. 0 10012088 8
-. 2F 95 00 00 41 BE F7 28
-
-. 0 10012090 152
-. 81 3E 82 50 39 1B FF FF 81 5E 82 54 7E A9 03 A6 57 66 08 3C C9 49 00 00 C9 2A 00 00 7D 07 43 78 7C 07 1A 14 7D 66 42 14 7D 20 1A 14 7C 1D 01 D6 55 0A 18 38 39 4A 00 08 7D 3D 49 D6 54 00 18 38 7C 1F 04 AE 7C 1D 39 D6 55 29 18 38 7D 89 FC AE 7C E7 DA 14 FD 60 60 2A 54 00 18 38 FC 00 60 28 7D BF 04 AE 7D 78 59 D6 FD 6B 02 72 FD 80 6A BA 7C 18 41 D6 55 6B 18 38 FD AD 00 28 7D 08 8A 14 7D 4A C1 D6 54 00 18 38 7D 99 05 AE 7D 6A CD AE 7D AB CD AE 42 00 FF 8C
-
-. 0 10012128 28
-. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 EE 0C
-
-. 0 10012144 4
-. 4B FF F6 8C
-
-PASS: gsl_fft_real with signal_real_noise, n = 12, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 12, stride = 1
-. 0 1000D6E8 52
-. 3A 98 00 10 3A 70 00 10 3A B6 00 10 57 78 08 3C 3A 00 00 02 2F 91 00 00 CB D3 FF F0 CB B3 FF F8 CB 94 FF F0 CB 74 FF F8 CB 55 FF F0 CB 35 FF F8 41 9E 01 9C
-
-. 0 1000D71C 400
-. 38 70 FF FF 7D 30 C0 50 7E 29 03 A6 3B E9 FF FF 7C 79 1B 78 57 76 10 3A 7C F8 FA 14 57 EB 18 38 54 E9 18 38 39 6B 00 08 39 29 00 08 7D 58 CA 14 7D 29 E1 D6 55 46 18 38 57 28 18 38 39 08 00 08 38 C6 00 08 7D 6B E1 D6 7D 69 EC AE FD 60 58 50 7C 1C C9 D6 7D 4B EC AE 7F 39 B2 14 FD 40 50 50 7D 3C F9 D6 54 00 18 38 7D 3D 04 AE 7F FF B2 14 80 01 00 30 7D 5C 51 D6 55 29 18 38 7C 29 EC AE 7D 63 02 14 7C AB 02 14 7C 85 02 14 7C FC 39 D6 55 4A 18 38 7C CA EC AE 54 69 18 38 55 6A 18 38 FC E6 08 28 39 29 00 08 7D 08 E1 D6 54 E7 18 38 7C A7 EC AE FC C6 08 2A 54 87 18 38 FD 89 28 28 39 4A 00 08 7C C6 E1 D6 7D A8 EC AE FD 29 28 2A 54 A8 18 38 FC 0D 58 28 39 08 00 08 FD AD 58 2A 38 E7 00 08 7D 06 EC AE 7C 17 19 D6 FC 60 38 28 7C 63 DA 14 FC 48 50 28 FD 08 50 2A FC 00 38 2A 7D 77 59 D6 FC 8C 10 2A 54 00 18 38 FD 6D 40 28 FC FE 00 32 7C B7 29 D6 55 6B 18 38 FC BC 02 F2 FC 39 01 32 7C 97 21 D6 54 A5 18 38 FF F9 00 F2 FC 1D 00 32 7D 29 B9 D6 54 84 18 38 FD 7B 02 F2 FD 49 30 28 FD 8C 10 28 7D 4A B9 D6 FC 7A 08 FA FC FD 3B 3A 7D 08 B9 D6 FC BB 2A BA FD 9E 03 38 7C E7 B9 D6 FD 5C 5A B8 FC 9A F9 38 FD 29 30 2A FD AD 40 2A 7D 3A 05 AE 7D A9 D5 AE 7D 8B D5 AE 7C EA D5 AE 7D 45 D5 AE 7C A8 D5 AE 7C 84 D5 AE
-
-. 0 1000D8AC 8
-. 7C 67 D5 AE 42 00 FE 84
-
-. 0 1000D8B4 32
-. 3A 52 00 01 55 E0 F8 7E 7F 80 90 40 3A 10 00 02 3A 73 00 10 3A 94 00 10 3A B5 00 10 41 9D FE 2C
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 12, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 12, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 12
-. 0 100140D8 8
-. 2F 95 00 00 41 BE F7 04
-
-. 0 100140E0 164
-. 81 5E 82 A8 39 1B FF FF 81 7E 82 AC 7E A9 03 A6 57 66 08 3C C9 2A 00 00 C1 0B 00 00 7D 07 43 78 7C 07 1A 14 7D 66 42 14 7D 20 1A 14 7C 1F 01 D6 55 0A 10 3A 39 4A 00 04 7D 3F 49 D6 54 00 10 3A 7D 7D 04 2E 7C 1F 39 D6 55 29 10 3A 7C 09 EC 2E 7C E7 DA 14 ED 4B 00 28 54 00 10 3A ED 6B 00 2A 7D 9D 04 2E 7D 78 59 D6 FC 00 50 90 FD A0 60 90 ED 6B 02 32 7C 18 41 D6 ED 8C 50 28 FC 00 6A 7A 55 6B 10 3A 7D 08 8A 14 7D 4A C1 D6 54 00 10 3A FC 00 00 18 7C 19 05 2E 7D 6A CD 2E 7D 8B CD 2E 42 00 FF 80
-
-. 0 10014184 28
-. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 ED A0
-
-. 0 100141A0 4
-. 4B FF F6 5C
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 12, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 12, stride = 1
-. 0 1000F8CC 52
-. 3A 70 00 08 3A B9 00 08 3A 96 00 08 57 78 08 3C 3A 00 00 02 2F 91 00 00 C3 F3 FF F8 C3 D3 FF FC C3 B4 FF F8 C3 94 FF FC C3 75 FF F8 C3 55 FF FC 41 9E 01 9C
-
-. 0 1000F900 400
-. 38 70 FF FF 7D 30 C0 50 7E 29 03 A6 3B A9 FF FF 7C 79 1B 78 57 76 10 3A 7C F8 EA 14 57 AB 10 3A 54 E9 10 3A 39 6B 00 04 39 29 00 04 7D 58 CA 14 7D 29 E1 D6 55 46 10 3A 57 28 10 3A 39 08 00 04 38 C6 00 04 7D 6B E1 D6 7D 49 FC 2E FD 40 50 50 7C 1C C9 D6 7D 2B FC 2E 7F 39 B2 14 FD 20 48 50 7D 3C E9 D6 54 00 10 3A 7D 7F 04 2E 7F BD B2 14 80 01 00 30 7D 5C 51 D6 55 29 10 3A 7C 29 FC 2E 7D 63 02 14 7C AB 02 14 7C 85 02 14 7C FC 39 D6 55 4A 10 3A 7C EA FC 2E 54 69 10 3A 55 6A 10 3A EC A7 08 28 39 29 00 04 7D 08 E1 D6 54 E7 10 3A 7C C7 FC 2E EC E7 08 2A 54 87 10 3A ED 8B 30 28 39 4A 00 04 7C C6 E1 D6 7D A8 FC 2E ED 6B 30 2A 54 A8 10 3A EC 0D 50 28 39 08 00 04 ED AD 50 2A 38 E7 00 04 7D 06 FC 2E 7C 17 19 D6 EC 40 28 28 7C 63 DA 14 EC 88 48 28 ED 08 48 2A EC 00 28 2A 7D 77 59 D6 EC 6C 20 2A 54 00 10 3A ED 4D 40 28 ED 2B 38 28 ED 8C 20 28 7C B7 29 D6 EC DF 00 32 55 6B 10 3A EC BD 02 B2 EC 3A 00 F2 EC 9A 00 B2 7C 97 21 D6 EC 1E 00 32 54 A5 10 3A ED 5C 02 B2 EC DE 33 3A 7D 29 B9 D6 EC BC 2A 7A EC 5B 08 BA 54 84 10 3A ED 9F 03 38 ED 3D 52 78 7D 4A B9 D6 EC 7B 20 F8 ED 6B 38 2A ED AD 40 2A 7D 08 B9 D6 7D 7A 05 2E 7D A9 D5 2E 7D 8B D5 2E 7C CA D5 2E 7C E7 B9 D6 7D 25 D5 2E 7C A8 D5 2E 7C 64 D5 2E
-
-. 0 1000FA90 8
-. 7C 47 D5 2E 42 00 FE 84
-
-. 0 1000FA98 32
-. 3A 52 00 01 55 E0 F8 7E 7F 80 90 40 3A 10 00 02 3A 73 00 08 3A 94 00 08 3A B5 00 08 41 9D FE 2C
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 12, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 12, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 12
-PASS: gsl_fft_complex_forward with signal_noise, n = 12, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 12, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 12, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 12, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 12, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 12, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 12, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 12, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 12, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 12, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 12
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 12, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 12, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 12, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 12, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 12, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 12, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 12, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 12, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 12, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 12, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 12
-PASS: gsl_fft_real with signal_real_noise, n = 12, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 12, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 12, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 12, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 12
-PASS: gsl_fft_real_float with signal_real_noise, n = 12, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 12, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 12, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 12, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 12
-PASS: gsl_fft_complex_forward with signal_noise, n = 12, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 12, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 12, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 12, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 12, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 12, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 12, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 12, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 12, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 12, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 12
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 12, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 12, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 12, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 12, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 12, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 12, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 12, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 12, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 12, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 12, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 12
-PASS: gsl_fft_real with signal_real_noise, n = 12, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 12, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 12, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 12, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 12
-PASS: gsl_fft_real_float with signal_real_noise, n = 12, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 12, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 12, stride = 3
-. 0 FE0BE7C 36
-. 81 3E 0E 80 C8 69 00 00 FD A3 28 2A FC 0D 18 28 D9 A1 00 20 80 E1 00 20 81 01 00 24 FC 65 00 28 41 9D 00 08
-
-. 0 FE0BEA4 212
-. FC A3 00 F2 81 3E 0E BC 81 9E 0E C0 55 04 28 34 CB E9 00 00 C9 AC 00 00 81 5E 0E 7C FC E3 01 72 80 FE 0E C4 FC 85 6F FA 7C C4 52 14 C9 47 00 00 CB E6 00 10 C9 86 00 08 FD 23 50 2A FD 07 01 32 C8 86 00 18 80 BE 0E C8 FD 7F 50 2A 81 7E 0E CC C8 C5 00 00 FD 29 50 28 FD A8 61 3A C8 0B 00 00 80 7E 0E D0 FD 6B 50 28 FD 85 01 BA C8 03 00 00 FC FF 58 28 FC DF 6A 3A 7D A4 54 AE FD 47 20 2A FD 03 48 28 FF EC 01 7A FC EA 30 FA FC 8D 00 F2 FD 2B 02 72 FC C8 10 2A FC 7F 01 72 FC 0B 39 BA FD 44 00 B2 FC A9 68 2A FD 8D 00 F2 FD 0D 28 28 FF E0 50 28 FC E8 48 2A FC DF 60 28 FD 66 38 2A FD A5 58 2A FC 85 68 28 FC AB 20 2A FF 85 08 00 40 9D 00 68
-
-. 0 FE0BFB8 36
-. 83 E1 00 54 83 C1 00 30 7F E8 03 A6 CB A1 00 38 83 E1 00 34 CB C1 00 40 CB E1 00 48 38 21 00 50 4E 80 00 20
-
-. 0 FE0E274 32
-. 81 7E 0F DC 80 DE 0F F0 C9 0B 00 00 C9 46 00 00 FC 0C 52 3A FD 81 00 2A FC 0C 08 00 41 82 FE FC
-
-PASS: gsl_fft_complex_wavetable_alloc, n = 13, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 13
-PASS: gsl_fft_complex_forward with signal_noise, n = 13, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 13, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 13, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 13, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 13, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 13, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 13, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 13
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 13, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 13, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 13, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 13, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 13, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 13, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 13, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 13
-PASS: gsl_fft_real with signal_real_noise, n = 13, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 13, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 13, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 13, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 13
-PASS: gsl_fft_real_float with signal_real_noise, n = 13, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 13, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 13, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 13, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 13
-PASS: gsl_fft_complex_forward with signal_noise, n = 13, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 13, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 13, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 13, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 13, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 13, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 13, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 13, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 13, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 13, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 13
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 13, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 13, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 13, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 13, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 13, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 13, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 13, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 13, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 13, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 13, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 13
-PASS: gsl_fft_real with signal_real_noise, n = 13, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 13, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 13, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 13, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 13
-PASS: gsl_fft_real_float with signal_real_noise, n = 13, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 13, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 13, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 13, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 13
-PASS: gsl_fft_complex_forward with signal_noise, n = 13, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 13, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 13, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 13, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 13, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 13, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 13, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 13, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 13, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 13, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 13
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 13, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 13, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 13, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 13, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 13, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 13, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 13, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 13, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 13, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 13, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 13
-PASS: gsl_fft_real with signal_real_noise, n = 13, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 13, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 13, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 13, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 13
-PASS: gsl_fft_real_float with signal_real_noise, n = 13, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 13, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 13, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 14, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 14
-. 0 10008C74 12
-. 81 01 00 58 2F 88 00 00 41 BE FA 5C
-
-. 0 10008C80 4
-. 40 9A 00 80
-
-. 0 10008C84 124
-. 80 E1 01 3C 80 C1 01 38 C8 07 FF F0 C8 47 FF F8 D8 01 00 90 D8 41 00 98 C8 06 FF F0 C8 46 FF F8 80 C1 01 34 D8 01 00 A0 D8 41 00 A8 C8 06 FF F0 C8 46 FF F8 80 C1 01 30 D8 01 00 B0 D8 41 00 B8 C8 06 FF F0 C8 46 FF F8 80 C1 01 2C D8 01 00 C0 D8 41 00 C8 C8 06 FF F0 C8 46 FF F8 80 C1 01 28 D8 01 00 D0 D8 41 00 D8 C8 06 FF F0 C8 46 FF F8 D8 01 00 E0 D8 41 00 E8 4B FF FA 74
-
-. 0 10008770 8
-. 2F 90 00 00 41 9E 04 9C
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 14, stride = 1
-. 0 10008D00 148
-. 80 C1 01 3C 80 E1 01 38 81 01 01 34 81 21 01 30 81 41 01 2C 81 61 01 28 C8 06 FF F8 C9 A7 FF F8 FC 00 00 50 C9 88 FF F8 C9 69 FF F8 FD A0 68 50 C9 4A FF F8 FD 80 60 50 C9 2B FF F8 FD 60 58 50 FD 40 50 50 D8 01 00 98 FD 20 48 50 C8 06 FF F0 C8 47 FF F0 C8 68 FF F0 C8 89 FF F0 C8 AA FF F0 C8 CB FF F0 D9 A1 00 A8 D9 81 00 B8 D9 61 00 C8 D9 41 00 D8 D9 21 00 E8 D8 01 00 90 D8 41 00 A0 D8 61 00 B0 D8 81 00 C0 D8 A1 00 D0 D8 C1 00 E0 4B FF F9 E0
-
-PASS: gsl_fft_complex_inverse with signal_noise, n = 14, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 14, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 14, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 14, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 14, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 14, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 14
-. 0 1000BB28 8
-. 2F 8C 00 00 41 BE FA 54
-
-. 0 1000BB30 4
-. 40 9A 00 80
-
-. 0 1000BB34 124
-. 80 E1 00 EC C0 07 FF F8 C0 27 FF FC 80 E1 00 E8 D0 01 00 64 D0 21 00 68 C0 07 FF F8 C0 27 FF FC 80 E1 00 E4 D0 01 00 6C D0 21 00 70 C0 07 FF F8 C0 27 FF FC 80 E1 00 E0 D0 01 00 74 D0 21 00 78 C0 07 FF F8 C0 27 FF FC 80 E1 00 DC D0 01 00 7C D0 21 00 80 C0 07 FF F8 C0 27 FF FC 80 E1 00 D8 D0 01 00 84 D0 21 00 88 C0 07 FF F8 C0 27 FF FC D0 01 00 8C D0 21 00 90 4B FF FA 18
-
-. 0 1000B5C4 8
-. 2F 90 00 00 41 9E 05 04
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 14, stride = 1
-. 0 1000BBB0 160
-. 80 E1 00 EC 81 01 00 E8 C0 07 FF FC C1 A8 FF FC FC 00 00 50 80 E1 00 D8 81 01 00 EC FD A0 68 50 81 21 00 E4 81 41 00 E0 81 61 00 DC C1 27 FF FC D0 01 00 68 80 E1 00 E8 FD 20 48 50 C0 08 FF F8 C1 89 FF FC C1 6A FF FC C1 4B FF FC FD 80 60 50 D0 01 00 64 FD 60 58 50 C0 07 FF F8 FD 40 50 50 80 E1 00 D8 D0 01 00 6C C0 29 FF F8 C0 4A FF F8 C0 AB FF F8 C0 07 FF F8 D1 A1 00 70 D1 81 00 78 D1 61 00 80 D1 41 00 88 D1 21 00 90 D0 21 00 74 D0 41 00 7C D0 A1 00 84 D0 01 00 8C 4B FF F9 78
-
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 14, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 14, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 14, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 14, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 14, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 14, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 14
-. 0 10011954 80
-. 81 21 00 2C 7D 78 39 D6 7C E7 8A 14 7C 08 4A 14 7C 1D 01 D6 55 6B 18 38 7D 3D 41 D6 54 00 18 38 7D BF 04 AE 7D 08 2A 14 55 29 18 38 7C 18 51 D6 7C 09 FC AE 7D 4A 8A 14 FD 80 68 28 FC 00 68 2A 54 00 18 38 7C 0B CD AE 7D 99 05 AE 42 00 FF B4
-
-. 0 100110E4 20
-. 39 F4 00 01 3A 60 00 01 55 E0 F8 7E 2B 80 00 01 40 9D 0A A4
-
-. 0 10011B98 8
-. 72 80 00 01 40 A2 FC 18
-
-. 0 10011BA0 52
-. 3C 00 43 30 80 FE 82 6C 90 01 00 08 3A 40 00 00 93 61 00 0C C9 A7 00 00 C8 01 00 08 81 3E 82 7C FC 00 68 28 CB E9 00 00 FF FF 00 24 FC 20 F8 90 48 01 73 25
-
-. 0 10011BD4 12
-. FF 80 08 90 FC 20 F8 90 48 01 73 B9
-
-. 0 10011BE0 12
-. 7F 92 80 40 FC 20 08 50 40 BC FB CC
-
-. 0 10011BEC 40
-. 82 FE 82 74 56 6A 08 3C 82 DE 82 78 38 C0 00 00 38 A0 00 00 38 E0 00 00 C8 77 00 00 7F 87 D8 40 C8 96 00 00 40 9C 00 FC
-
-. 0 10011C14 32
-. 2F 87 00 00 C8 B6 00 00 C9 37 00 00 FC C0 28 90 FD 40 28 90 FC E0 48 90 FD 00 28 90 41 9E 00 14
-
-. 0 10011C44 12
-. 39 00 00 00 7F 88 D8 40 40 9C 00 74
-
-. 0 10011C50 36
-. 7D 25 52 14 7F 69 03 A6 39 29 FF FF 7C 1D 49 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 18 38 41 9E 00 28
-
-. 0 10011C98 40
-. 7C 1F 04 AE FD A8 00 32 FC 07 00 32 FD 6A 03 72 FD 8A 00 32 FC 09 58 38 FD A9 63 7A FC A5 00 2A FC C6 68 2A 42 00 FF A0
-
-. 0 10011C5C 24
-. 7C 1D 49 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 18 38 41 9E 00 28
-
-. 0 10011C74 76
-. FC 08 07 32 FD 68 00 72 FD A4 02 B2 FD 84 02 72 FC 07 00 7A FD 23 6A 78 FD 43 62 BA FC E7 5F 38 FD 00 00 90 7C 1F 04 AE FD A8 00 32 FC 07 00 32 FD 6A 03 72 FD 8A 00 32 FC 09 58 38 FD A9 63 7A FC A5 00 2A FC C6 68 2A 42 00 FF A0
-
-. 0 10011CC0 16
-. 38 07 00 01 7D 27 D8 50 7F 80 48 40 40 9C 00 AC
-
-. 0 10011CD0 60
-. 7D 27 A1 D6 7F 80 D8 40 7C 07 03 78 55 29 08 3C 7D 26 4A 14 7D 29 52 14 39 29 FF FF 55 2B 18 38 7D 38 49 D6 39 6B 00 08 7D 6B C1 D6 55 29 18 38 7C A9 CD AE 7C CB CD AE 41 9C FF 0C
-
-. 0 10011C34 28
-. FC 04 07 72 FD A3 07 72 FC 63 07 BA FC 84 6F B8 39 00 00 00 7F 88 D8 40 40 9C 00 74
-
-. 0 10011D78 8
-. 7F 80 48 00 41 9E 00 44
-
-. 0 10011DC0 44
-. 7D 27 A1 D6 7F 80 D8 40 7C 07 03 78 55 29 08 3C 7D 26 4A 14 7D 29 52 14 39 29 FF FF 7D 38 49 D6 55 29 18 38 7C A9 CD AE 4B FF FF 20
-
-. 0 10011D08 4
-. 41 9C FF 0C
-
-. 0 10011D80 64
-. 7D 29 A1 D6 7F 80 D8 40 FC 00 30 50 7C 07 03 78 55 29 08 3C 7D 26 4A 14 7D 2A 48 50 39 29 FF FF 55 2B 18 38 7D 38 49 D6 39 6B 00 08 7D 6B C1 D6 55 29 18 38 7C A9 CD AE 7C 0B CD AE 4B FF FF 4C
-
-. 0 10011D0C 20
-. 3A 52 00 01 7C A5 A2 14 7F 92 80 40 7C C6 8A 14 41 9C FE E4
-
-. 0 10011D20 28
-. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 F2 14
-
-. 0 10011D3C 4
-. 4B FF FA 94
-
-PASS: gsl_fft_real with signal_real_noise, n = 14, stride = 1
-. 0 1000C6C0 56
-. 7F 9C DA 14 92 A1 00 08 7C 1C BB 96 7F B9 C2 14 3A D6 00 01 3B 5A 00 10 7C 00 B9 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 C8 01
-
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 14, stride = 1
-. 0 1000D114 20
-. 38 1B 00 01 3B 00 00 01 54 00 F8 7E 2B 80 00 01 40 9D 00 F8
-
-. 0 1000D128 28
-. 7C 15 03 78 3B F0 00 10 3B 3B FF FF 2F 96 00 00 C8 DF FF F0 C8 FF FF F8 41 9E 00 C8
-
-. 0 1000D144 196
-. 57 09 08 3C 57 2B 08 3C 38 C9 FF FF 7E C9 03 A6 38 8B FF FF 7C C5 33 78 57 63 08 3C 54 A9 18 38 54 8B 18 38 39 29 00 08 39 6B 00 08 7D 29 E1 D6 81 81 00 2C 54 C8 18 38 7D 46 62 14 55 47 18 38 7D 6B E1 D6 7D 29 EC AE 39 08 00 08 38 E7 00 08 7D 3C 29 D6 7D 0B EC AE 7C A5 1A 14 FD 89 40 2A FD 29 40 28 7C 1C 21 D6 55 29 18 38 7D 69 EC AE FD 46 03 32 7C 84 1A 14 FD 87 03 32 54 00 18 38 7D 57 51 D6 7D BD 04 AE FC 0B 68 28 7C 17 31 D6 FD 6B 68 2A 55 4A 18 38 FD 47 50 3A 7C C6 DA 14 FC 06 60 38 7D 08 B9 D6 54 00 18 38 7D 7A 05 AE 7C E7 B9 D6 7D 28 D5 AE 7C 0A D5 AE 7D 47 D5 AE 42 00 FF 5C
-
-. 0 1000D208 20
-. 3B 18 00 01 3B 39 FF FF 7F 95 C0 40 3B FF 00 10 41 9D FF 1C
-
-. 0 1000D134 16
-. 2F 96 00 00 C8 DF FF F0 C8 FF FF F8 41 9E 00 C8
-
-. 0 1000D21C 8
-. 73 79 00 01 40 A2 FC 90
-
-. 0 1000CAD0 20
-. 38 60 00 00 C9 16 00 00 7F 83 F8 40 C9 25 00 00 40 9C 00 A0
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 14, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 14, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 14
-. 0 10013980 80
-. 81 21 00 2C 7D 78 39 D6 7C E7 8A 14 7C 08 4A 14 7C 1F 01 D6 55 6B 10 3A 7D 3F 41 D6 54 00 10 3A 7D BD 04 2E 7D 08 22 14 55 29 10 3A 7C 18 51 D6 7C 09 EC 2E 7D 4A 8A 14 ED 80 68 28 EC 00 68 2A 54 00 10 3A 7C 0B CD 2E 7D 99 05 2E 42 00 FF B4
-
-. 0 100130D4 20
-. 39 F4 00 01 3A 60 00 01 55 E0 F8 7E 2B 80 00 01 40 9D 0A E0
-
-. 0 10013BC4 8
-. 72 80 00 01 40 A2 FC 18
-
-. 0 10013BCC 52
-. 3C 00 43 30 80 FE 82 C8 90 01 00 08 3A 40 00 00 93 61 00 0C C9 A7 00 00 C8 01 00 08 81 3E 82 D8 FC 00 68 28 CB E9 00 00 FF FF 00 24 FC 20 F8 90 48 01 52 F9
-
-. 0 10013C00 12
-. FF 80 08 18 FC 20 F8 90 48 01 53 8D
-
-. 0 10013C0C 16
-. 7F 92 80 40 FC 20 08 18 FC 20 08 50 40 BC FB C8
-
-. 0 10013C1C 40
-. 82 FE 82 D0 56 6A 08 3C 82 DE 82 D4 38 C0 00 00 38 A0 00 00 38 E0 00 00 C0 77 00 00 7F 87 D8 40 C0 96 00 00 40 9C 00 FC
-
-. 0 10013C44 32
-. 2F 87 00 00 C0 B6 00 00 C1 17 00 00 FC C0 28 90 FD 40 28 90 FC E0 40 90 FD 20 28 90 41 9E 00 14
-
-. 0 10013C74 12
-. 39 00 00 00 7F 88 D8 40 40 9C 00 74
-
-. 0 10013C80 36
-. 7D 25 52 14 7F 69 03 A6 39 29 FF FF 7C 1F 49 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 10 3A 41 9E 00 28
-
-. 0 10013CC8 40
-. 7C 1D 04 2E ED A7 00 32 EC 09 00 32 ED 6A 03 72 ED 8A 00 32 EC 08 58 3A ED A8 63 78 EC C6 00 2A EC A5 68 2A 42 00 FF A0
-
-. 0 10013C8C 24
-. 7C 1F 49 D6 2F 88 00 00 7D 29 D2 14 39 08 00 01 54 00 10 3A 41 9E 00 28
-
-. 0 10013CA4 76
-. EC 09 07 32 ED 89 00 72 ED 64 02 B2 EC 07 00 7A ED A4 02 32 EC E7 67 38 ED 03 5A 38 ED 43 6A BA FD 20 00 90 7C 1D 04 2E ED A7 00 32 EC 09 00 32 ED 6A 03 72 ED 8A 00 32 EC 08 58 3A ED A8 63 78 EC C6 00 2A EC A5 68 2A 42 00 FF A0
-
-. 0 10013CF0 16
-. 38 07 00 01 7D 27 D8 50 7F 80 48 40 40 9C 00 AC
-
-. 0 10013D00 60
-. 7D 27 A1 D6 7F 80 D8 40 7C 07 03 78 55 29 08 3C 7D 26 4A 14 7D 29 52 14 39 29 FF FF 55 2B 10 3A 7D 38 49 D6 39 6B 00 04 7D 6B C1 D6 55 29 10 3A 7C A9 CD 2E 7C CB CD 2E 41 9C FF 0C
-
-. 0 10013C64 28
-. EC 04 07 72 ED A3 07 72 EC 63 07 BA EC 84 6F B8 39 00 00 00 7F 88 D8 40 40 9C 00 74
-
-. 0 10013DA8 8
-. 7F 80 48 00 41 9E 00 44
-
-. 0 10013DF0 44
-. 7D 27 A1 D6 7F 80 D8 40 7C 07 03 78 55 29 08 3C 7D 26 4A 14 7D 29 52 14 39 29 FF FF 7D 38 49 D6 55 29 10 3A 7C A9 CD 2E 4B FF FF 20
-
-. 0 10013D38 4
-. 41 9C FF 0C
-
-. 0 10013DB0 64
-. 7D 29 A1 D6 7F 80 D8 40 FC 00 30 50 7C 07 03 78 55 29 08 3C 7D 26 4A 14 7D 2A 48 50 39 29 FF FF 55 2B 10 3A 7D 38 49 D6 39 6B 00 04 7D 6B C1 D6 55 29 10 3A 7C A9 CD 2E 7C 0B CD 2E 4B FF FF 4C
-
-. 0 10013D3C 20
-. 3A 52 00 01 7C A5 A2 14 7F 92 80 40 7C C6 8A 14 41 9C FE E4
-
-. 0 10013D50 28
-. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 F1 D4
-
-. 0 10013D6C 4
-. 4B FF FA 90
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 14, stride = 1
-. 0 1000E880 56
-. 7F 9C DA 14 92 A1 00 08 7C 1C BB 96 7F B9 C2 14 3A D6 00 01 3B 5A 00 08 7C 00 B9 D6 7F 80 E0 50 93 81 00 0C CB E1 00 08 FF FF F0 28 FF FF 07 72 FC 20 F8 90 48 01 A6 41
-
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 14, stride = 1
-. 0 1000F2E0 20
-. 38 1B 00 01 3B 00 00 01 54 00 F8 7E 2B 80 00 01 40 9D 00 F8
-
-. 0 1000F2F4 28
-. 7C 15 03 78 3B B0 00 08 3B 3B FF FF 2F 96 00 00 C0 DD FF F8 C0 FD FF FC 41 9E 00 C8
-
-. 0 1000F310 196
-. 57 09 08 3C 57 2B 08 3C 38 C9 FF FF 7E C9 03 A6 38 8B FF FF 7C C5 33 78 57 63 08 3C 54 A9 10 3A 54 8B 10 3A 39 29 00 04 39 6B 00 04 7D 29 E1 D6 81 81 00 2C 54 C8 10 3A 7D 46 62 14 55 47 10 3A 7D 6B E1 D6 7D 29 FC 2E 39 08 00 04 38 E7 00 04 7D 3C 29 D6 7D 0B FC 2E 7C A5 1A 14 EC 09 40 2A ED 29 40 28 7C 1C 21 D6 55 29 10 3A 7D A9 FC 2E ED 46 00 32 EC 07 00 32 7C 84 1A 14 54 00 10 3A 7D 57 51 D6 7D 9F 04 2E ED 6D 60 28 7C 17 31 D6 ED AD 60 2A 55 4A 10 3A ED 47 52 FA 7C C6 DA 14 ED 66 02 F8 7D 08 B9 D6 54 00 10 3A 7D BA 05 2E 7C E7 B9 D6 7D 28 D5 2E 7D 6A D5 2E 7D 47 D5 2E 42 00 FF 5C
-
-. 0 1000F3D4 20
-. 3B 18 00 01 3B 39 FF FF 7F 95 C0 40 3B BD 00 08 41 9D FF 1C
-
-. 0 1000F300 16
-. 2F 96 00 00 C0 DD FF F8 C0 FD FF FC 41 9E 00 C8
-
-. 0 1000F3E8 8
-. 73 79 00 01 40 A2 FC 90
-
-. 0 1000EC98 20
-. 38 60 00 00 C1 16 00 00 7F 83 E8 40 C1 25 00 00 40 9C 00 A0
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 14, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 14, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 14
-PASS: gsl_fft_complex_forward with signal_noise, n = 14, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 14, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 14, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 14, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 14, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 14, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 14, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 14, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 14, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 14, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 14
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 14, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 14, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 14, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 14, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 14, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 14, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 14, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 14, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 14, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 14, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 14
-PASS: gsl_fft_real with signal_real_noise, n = 14, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 14, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 14, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 14, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 14
-PASS: gsl_fft_real_float with signal_real_noise, n = 14, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 14, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 14, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 14, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 14
-PASS: gsl_fft_complex_forward with signal_noise, n = 14, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 14, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 14, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 14, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 14, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 14, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 14, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 14, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 14, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 14, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 14
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 14, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 14, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 14, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 14, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 14, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 14, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 14, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 14, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 14, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 14, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 14
-PASS: gsl_fft_real with signal_real_noise, n = 14, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 14, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 14, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 14, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 14
-PASS: gsl_fft_real_float with signal_real_noise, n = 14, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 14, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 14, stride = 3
-. 0 FE0CB98 20
-. 83 1E 0F 64 FD A0 F8 90 CB 98 00 00 FE 1F E0 00 40 91 07 50
-
-. 0 FE0D2F8 8
-. FD A0 F8 50 4B FF F8 B0
-
-. 0 FE0CBAC 192
-. C8 26 00 00 83 7E 0F 84 FD 01 68 2A 80 DE 0F 88 C8 9B 00 00 FD 48 08 28 D9 01 00 30 81 61 00 30 81 81 00 34 FD 6D 50 28 55 99 28 34 7F 59 52 14 7D 59 54 AE C8 FA 00 10 FD 0B 02 F2 C8 5A 00 18 C8 BA 00 08 FC 07 20 2A FC CB 20 2A FC 68 1F BA FD 2B 02 32 FC 20 20 28 FD A8 D6 FA FD 89 00 F2 FD 27 08 28 FC 66 20 28 FF CC 28 BA FD AD EA 3A FF 67 F3 3A FF 49 10 2A FC A1 00 F2 FD 9A DA FA CB 66 00 00 FC 8D 02 32 FC 4B 18 28 FF C5 50 2A FC EA 01 32 FC C1 60 BA FD 0A F0 28 FC 06 38 28 FD 68 28 2A FD 20 58 2A FC 3E 48 2A FF BE 08 28 FF 49 E8 2A FC 7A 0E FA FC 83 08 00 41 86 06 98
-
-. 0 FE0D300 4
-. 41 B1 F7 58
-
-. 0 FE0D304 8
-. FC 20 08 50 4B FF FA B8
-
-PASS: gsl_fft_complex_wavetable_alloc, n = 15, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 15
-. 0 FE0DBA4 20
-. FF 1F E8 00 81 3E 0F 88 CB A9 00 00 FC 84 07 72 40 99 03 30
-
-. 0 FE0DEE4 8
-. 81 3E 0F B8 4B FF FC D4
-
-. 0 FE0DBBC 20
-. C8 A9 00 00 FC 1F 21 7A FC C1 00 2A FE 06 08 00 41 B2 F5 78
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 15, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 15, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 15, stride = 1
-. 0 FE0EAC4 20
-. CB C6 00 00 FF A0 20 90 FC E0 10 90 FF 82 F0 00 41 9D 00 08
-
-. 0 FE0EADC 32
-. C8 AA 00 00 FD A5 38 2A FD 8D 28 28 D9 A1 00 30 81 41 00 30 81 61 00 34 FC 27 60 28 41 9D 00 08
-
-. 0 FE0EB00 188
-. FD 21 00 72 C8 C5 00 00 C8 84 00 00 C9 07 00 00 55 67 28 34 81 5E 0F E0 7C A7 42 14 FC A9 21 BA C8 9D 00 00 C9 4A 00 00 C8 C3 00 00 FC 61 50 2A FD A5 42 7A 7C A7 44 AE FD 03 50 28 C8 65 00 08 FD 85 50 2A FD 6D 02 72 FD 8C 50 28 FC E1 40 28 FC 01 5F 7A C9 65 00 10 FC E7 E8 2A FD 45 60 28 FD AB 00 32 C8 05 00 18 FC C9 21 BA FD 21 02 72 FD 0C 02 32 FD 4A 18 2A FD 8C 01 F2 FC 80 68 28 FD A9 01 B2 FC 6A 00 72 FC E4 60 28 FC 8B 40 28 FC 25 03 72 FD 6B 20 28 FC 07 18 28 FD 2B 40 28 FD 40 08 28 FC CA 48 2A FC 24 30 2A FD 04 08 28 FC 86 40 2A FF 84 F0 00 40 9D 01 D4
-
-. 0 FE0ED8C 20
-. 83 BE 0F E4 FC 9F F0 00 C8 1D 00 00 FC 84 00 32 40 85 00 F0
-
-. 0 FE0EE8C 8
-. 81 3E 10 18 4B FF FF 14
-
-. 0 FE0EDA4 16
-. C9 69 00 00 FC FF 02 F2 FC 04 38 28 4B FF FE 2C
-
-. 0 FE0EBDC 12
-. FD 81 00 2A FF 0C 08 00 41 9A 00 60
-
-. 0 FE0EC44 8
-. 2F 9F 00 00 41 BE F5 44
-
-PASS: gsl_fft_complex_forward with signal_pulse, n = 15, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 15, stride = 1
-. 0 FE0EDA0 20
-. 81 3E 10 10 C9 69 00 00 FC FF 02 F2 FC 04 38 28 4B FF FE 2C
-
-PASS: gsl_fft_complex_forward with signal_exp, n = 15, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 15, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 15
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 15, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 15, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 15, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 15, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 15, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 15, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 15, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 15
-. 0 10011F00 32
-. 2F 95 00 00 C8 1C FF F8 C9 BA FF F8 FC 80 00 50 C8 BC FF F0 FC 40 68 50 C8 7A FF F0 41 9E 01 50
-
-PASS: gsl_fft_real with signal_real_noise, n = 15, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 15, stride = 1
-. 0 1000DB6C 60
-. 39 D8 00 10 3A 35 00 10 39 F6 00 10 3A 10 00 10 57 78 08 3C 2F 93 00 00 CA F0 FF F0 CA D0 FF F8 CA AE FF F0 CA 8E FF F8 CA 6F FF F0 CA 4F FF F8 CA 31 FF F0 CA 11 FF F8 41 9E 02 64
-
-. 0 1000DBA8 400
-. 81 3E 81 80 56 96 08 3C 81 5E 81 7C 3B F6 FF FF C9 E9 00 00 3A A0 00 00 C9 CA 00 00 7E 69 03 A6 1C F5 00 05 7C 7F CA 14 7E B5 DA 14 7D 76 38 50 7C E7 B2 14 7D 6B C2 14 38 E7 FF FF 39 6B FF FF 7C 18 3A 14 7C D8 5A 14 55 6A 18 38 54 C9 18 38 39 4A 00 08 39 29 00 08 7D 18 02 14 7D 29 E1 D6 54 05 18 38 55 04 18 38 38 A5 00 08 38 84 00 08 7D 4A E1 D6 7D 09 EC AE 54 E9 18 38 FD 00 40 50 39 29 00 08 7C 1C 01 D6 7C 8A EC AE 7D 43 CA 14 FC 80 20 50 7D 1C 41 D6 54 00 18 38 7C FD 04 AE 7C 0A CA 14 7C DC 31 D6 55 08 18 38 7D 48 EC AE 7D 00 CA 14 7D 7C 59 D6 54 C6 18 38 7C A6 EC AE 55 46 18 38 38 C6 00 08 FC CA 28 2A 7C A5 E1 D6 55 6B 18 38 7C 6B EC AE FD 4A 28 28 57 EB 18 38 FD A7 18 2A 39 6B 00 08 7C 84 E1 D6 7D 65 EC AE FC B9 02 B2 54 05 18 38 38 A5 00 08 FD 8B 20 2A 7C 04 EC AE FF 6D 30 2A 7C FC 39 D6 FD AD 30 28 FD 20 40 2A 55 04 18 38 FC 00 40 28 38 84 00 08 FD 1B 03 B2 7D 29 E1 D6 54 E7 18 38 FF 4C 48 2A 7C 47 EC AE FD 8C 48 28 54 67 18 38 FC D9 00 32 38 E7 00 08 7C 29 EC AE 7C 77 19 D6 FD 3A 03 B2 FD 58 02 B2 7D 37 F9 D6 54 63 18 38 FC 18 00 32 7F FF DA 14 FC E7 18 28 FD 6B 20 28 7D 57 51 D6 FD AD 03 F2 55 29 18 38 FD 8C 03 F2 7C 17 01 D6 55 4A 18 38 FD 02 40 28 FD 21 48 28 FC B8 29 F8
-
-. 0 1000DD38 208
-. 7D 17 41 D6 54 00 18 38 FC D8 32 F8 FC F9 51 FA 7D 6B B9 D6 55 08 18 38 FD 79 02 FA FD 49 60 28 FC 08 68 28 7C E7 B9 D6 FD 08 68 2A FD 29 60 2A FD A0 30 2A FD 8A 28 28 7C C6 B9 D6 FC 88 58 2A FC 69 38 28 FD 08 58 28 FD 29 38 2A 7C A5 B9 D6 FC 00 30 28 FD 4A 28 2A FF F6 02 32 7C 84 B9 D6 FF D4 00 32 FF B2 03 72 FF 90 01 32 FD 76 02 72 FC F4 02 B2 FC D2 03 32 FC B0 00 F2 FD 37 FA 7A FD 55 F2 BA FD 93 EB 3A FC 71 E0 FA FD 17 5A 38 FC 15 38 38 FD B3 33 78 FC 91 29 38 FC 42 D8 2A FC 21 D0 2A 7C 49 D5 AE 7C 2B D5 AE 7D 03 D5 AE 7D 27 D5 AE 7C 0A D5 AE 7D 46 D5 AE 7D BA 05 AE 7D 85 D5 AE 7C 88 D5 AE 7C 64 D5 AE 42 00 FD C4
-
-. 0 1000DE08 32
-. 3A 94 00 01 56 40 F8 7E 7F 80 A0 40 3A 10 00 10 39 CE 00 10 39 EF 00 10 3A 31 00 10 41 9D FD 5C
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 15, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 15, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 15
-. 0 10013F48 32
-. 2F 95 00 00 C0 1C FF FC C1 BA FF FC FC 80 00 50 C0 BC FF F8 FC 40 68 50 C0 7A FF F8 41 9E 01 58
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 15, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 15, stride = 1
-. 0 1000FD68 60
-. 39 96 00 08 39 F5 00 08 39 D9 00 08 3A 10 00 08 57 76 08 3C 2F 92 00 00 C2 F0 FF F8 C2 D0 FF FC C2 AC FF F8 C2 8C FF FC C2 6E FF F8 C2 4E FF FC C2 2F FF F8 C2 0F FF FC 41 9E 02 84
-
-. 0 1000FDA4 400
-. 81 3E 81 F8 56 75 08 3C 81 5E 81 F4 3B 35 FF FF C9 E9 00 00 3A 80 00 00 C9 CA 00 00 7E 49 03 A6 1C F4 00 05 7F B9 C2 14 7C 7D C2 14 7E 94 DA 14 7D 75 38 50 7C E7 AA 14 7D 6B B2 14 38 E7 FF FF 39 6B FF FF 7C 16 3A 14 7C D6 5A 14 55 6A 10 3A 54 C9 10 3A 39 4A 00 04 39 29 00 04 7D 16 02 14 7D 29 E1 D6 54 05 10 3A 55 04 10 3A 38 A5 00 04 38 84 00 04 7D 4A E1 D6 7C 89 FC 2E 54 E9 10 3A FC 80 20 50 39 29 00 04 7C 1C 01 D6 7C 6A FC 2E FC 60 18 50 7D 1C 41 D6 54 00 10 3A 7C BF 04 2E 7C DC 31 D6 55 08 10 3A 7C C8 FC 2E 7D 7C 59 D6 54 C6 10 3A 7F E6 FC 2E 57 A6 10 3A 38 C6 00 04 ED 66 F8 2A 7C A5 E1 D6 55 6B 10 3A 7F CB FC 2E EC C6 F8 28 7D 63 C2 14 EC 05 F0 2A 55 6A 10 3A 7C 84 E1 D6 7C E5 FC 2E EC A5 F0 28 54 65 10 3A ED A7 18 2A 38 A5 00 04 EF 60 58 2A 39 4A 00 04 7D 04 FC 2E 7C FC 39 D6 EC 00 58 28 ED 88 20 2A FD 40 D8 90 7D 29 E1 D6 54 E7 10 3A EF 4D 60 2A 7C 47 FC 2E ED AD 60 28 7C EB C2 14 FD 4A 03 B2 54 E8 10 3A 7C 29 FC 2E 57 29 10 3A FD 20 D0 90 7C 17 C9 D6 39 29 00 04 39 08 00 04 FD 29 03 B2 7F 39 DA 14 7F B7 E9 D6 54 00 10 3A FD 80 10 90 FD 60 08 90 FC 00 03 F2 7C 77 19 D6 57 BD 10 3A FD AD 03 F2 ED 08 20 28 FD 8C 50 28 7D 77 59 D6 FD 6B 48 28 54 63 10 3A EC E7 18 28 FC 00 00 18
-
-. 0 1000FF34 240
-. FD A0 68 18 7C F7 39 D6 FD 80 60 18 55 6B 10 3A FD 60 58 18 ED 39 01 B2 ED 59 02 32 7D 29 B9 D6 EC D8 01 B2 54 E7 10 3A ED 18 02 32 ED 38 49 78 ED 58 51 F8 7C C6 B9 D6 EC 8C 00 28 EC 6B 68 28 EC B9 31 7A EC F9 41 FA 7C A5 B9 D6 ED 8C 00 2A ED 6B 68 2A EC 04 50 2A ED A3 48 28 7D 4A B9 D6 ED 0C 38 2A EC CB 28 28 ED 8C 38 28 ED 6B 28 2A 7D 08 B9 D6 EC 84 50 28 EC 63 48 2A ED 56 03 32 ED 34 01 32 EC F2 00 32 EC B0 02 32 EF F6 02 F2 EF D4 00 F2 EF B2 03 72 EF 90 01 B2 EC 42 D8 2A EC 21 D0 2A ED 77 52 FA EC 75 48 FA 7C 5A 05 2E ED B3 3B 7A 7C 29 D5 2E EC D1 29 BA ED 97 FB 38 EC 95 F1 38 EC 13 E8 38 ED 11 E2 38 7D 9D D5 2E 7D 66 D5 2E 7C 83 D5 2E 7C 65 D5 2E 7C 0B D5 2E 7D AA D5 2E 7D 07 D5 2E 7C C8 D5 2E 42 00 FD A4
-
-. 0 10010024 32
-. 3A 73 00 01 56 20 F8 7E 7F 80 98 40 3A 10 00 08 39 8C 00 08 39 CE 00 08 39 EF 00 08 41 9D FD 3C
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 15, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 15, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 15
-PASS: gsl_fft_complex_forward with signal_noise, n = 15, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 15, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 15, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 15, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 15, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 15, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 15, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 15, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 15, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 15, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 15
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 15, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 15, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 15, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 15, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 15, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 15, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 15, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 15, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 15, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 15, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 15
-PASS: gsl_fft_real with signal_real_noise, n = 15, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 15, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 15, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 15, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 15
-PASS: gsl_fft_real_float with signal_real_noise, n = 15, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 15, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 15, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 15, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 15
-PASS: gsl_fft_complex_forward with signal_noise, n = 15, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 15, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 15, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 15, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 15, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 15, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 15, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 15, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 15, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 15, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 15
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 15, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 15, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 15, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 15, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 15, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 15, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 15, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 15, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 15, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 15, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 15
-PASS: gsl_fft_real with signal_real_noise, n = 15, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 15, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 15, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 15, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 15
-PASS: gsl_fft_real_float with signal_real_noise, n = 15, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 15, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 15, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 16, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 16
-. 0 10007A84 316
-. 81 41 01 84 7D 70 EA 14 7D 6B C9 D6 7D 24 FA 14 7C 1D 52 14 C9 29 00 08 7D 54 EA 14 7D 84 FC AE 7C C5 D2 14 7C 00 C9 D6 55 6B 20 36 7D 2B FA 14 7C CB FC AE C8 49 00 08 7D 73 1A 14 3B BD 00 01 54 00 20 36 7D 4A C9 D6 7D 00 FA 14 7C 7F 04 AE C8 88 00 08 7C 15 1A 14 FD 43 30 28 7F 7B CA 14 FD 64 10 28 55 4A 20 36 7D 2A FA 14 7D 0A FC AE C8 E9 00 08 FD 5D 02 B2 7D 23 E2 14 7D 6B C1 D6 FD 7D 02 F2 7C 84 B2 14 38 63 00 01 FC 0C 40 28 FD A9 38 28 7D 29 C1 D6 FC 63 30 2A 55 6B 20 36 FC 84 10 2A 7D 0B D2 14 FD 8C 40 2A FD 29 38 2A 7C 00 C1 D6 FC A0 58 2A 55 29 20 36 FC CD 50 28 7D 49 D2 14 FD 0C 18 28 FC E9 20 28 54 00 20 36 FD AD 50 2A 7C E0 D2 14 FC 00 58 28 FF D9 02 32 FD 77 00 32 FD 5A 01 72 FC 57 03 72 FC 39 01 F2 FF FA 01 B2 FD B8 5B 7A FC FB F1 FA FC DC 51 BA FC 18 10 38 FD 1B 0A 38 FC BC F9 78 FD 8C 18 2A FD 29 20 2A 7D 85 D5 AE 7C A5 BA 14 D9 26 00 08 7C 09 D5 AE D9 AA 00 08 7D 0B D5 AE D8 E8 00 08 7C BA 05 AE D8 C7 00 08 42 00 FE C8
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 16, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 16, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 16, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 16, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 16, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 16, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 16, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 16
-. 0 1000A8D0 316
-. 81 21 01 40 7D 70 EA 14 7D 6B C9 D6 7D 54 EA 14 7C 1D 4A 14 7D A4 FC 2E 7D 24 FA 14 C0 E9 00 04 3B BD 00 01 7C 00 C9 D6 55 6B 18 38 7D 2B FA 14 7C AB FC 2E C0 89 00 04 7D 75 1A 14 7F 7B CA 14 7D 4A C9 D6 54 00 18 38 7D 00 FA 14 7C 7F 04 2E C0 C8 00 04 7C 03 E2 14 ED 43 28 28 7C 84 B2 14 55 4A 18 38 EC 06 20 28 7D 2A FA 14 7D 2A FC 2E C1 09 00 04 ED 5D 02 B2 ED 8D 48 28 7D 33 1A 14 ED 67 40 28 7C 00 C1 D6 EC 1D 00 32 7D 45 D2 14 ED AD 48 2A 38 63 00 01 EC E7 40 2A EC 63 28 2A 7D 29 C1 D6 EC C6 20 2A 54 00 18 38 EC 4C 00 2A 7D 00 D2 14 EC 8B 50 28 ED 0D 18 28 7D 6B C1 D6 EC A7 30 28 55 29 18 38 ED 8C 00 28 7C E9 D2 14 ED 6B 50 2A EF FA 02 32 55 6B 18 38 EC 37 03 32 7C CB D2 14 EF D9 00 B2 EC 17 02 F2 ED 5A 01 72 ED 39 01 32 ED 78 0A FA EC BB F9 7A EC 9C F1 3A ED 98 03 38 ED 1B 52 38 EC 5C 48 B8 ED AD 18 2A EC E7 30 2A 7D A5 D5 2E 7C A5 BA 14 D0 EA 00 04 7D 9A 05 2E D1 68 00 04 7D 09 D5 2E D0 A7 00 04 7C 4B D5 2E D0 86 00 04 42 00 FE C8
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 16, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 16, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 16, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 16, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 16, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 16, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 16, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 16
-. 0 1001222C 20
-. 3A 1A 00 01 3A 60 00 01 56 00 F8 7E 2B 80 00 01 40 9D 01 FC
-
-. 0 10012240 60
-. 3A D5 00 10 3A 9C 00 10 3A B7 00 10 57 57 08 3C 2F 92 00 00 C8 14 FF F8 C9 B5 FF F8 C9 96 FF F8 FC 20 00 50 FF C0 68 50 C8 54 FF F0 FF 80 60 50 CB F5 FF F0 CB B6 FF F0 41 9E 01 A4
-
-. 0 1001227C 400
-. 56 67 08 3C 7D 33 D0 50 55 29 08 3C 3B 87 FF FF 7E 49 03 A6 38 69 FF FF 7F 9B E3 78 7C 1B 72 14 57 66 18 38 7D 60 72 14 54 09 18 38 7D 0B 72 14 39 29 00 08 55 0A 18 38 7D 29 E9 D6 39 4A 00 08 55 67 18 38 38 E7 00 08 7D 4A E9 D6 7D 49 FC AE 38 C6 00 08 FD 21 02 B2 7C B7 E2 14 7C 97 1A 14 7C 1D 01 D6 7C AA FC AE 54 69 18 38 FD 7C 01 72 57 8A 18 38 39 4A 00 08 7D 7D 59 D6 54 00 18 38 7D 9F 04 AE 39 29 00 08 FC 01 03 32 7D 1D 41 D6 55 6B 18 38 7C EB FC AE FD 82 4B 38 FC DE 01 F2 7C E7 E9 D6 55 08 18 38 7D 08 FC AE FD 42 02 BA 54 88 18 38 FC 9C 02 32 39 08 00 08 7D A7 FC AE 7C C6 E9 D6 FD 1D 5A 38 54 A7 18 38 38 E7 00 08 FD 3E 03 72 7C 1D D9 D6 7D 66 FC AE FD BF 33 7A 7F 7B D2 14 FC BD 21 7A 54 00 18 38 7D 78 19 D6 FC CC 40 28 7C 1F 04 AE FC FF 49 F8 7C 63 8A 14 FC 8B 68 28 7C 18 E1 D6 FD 2A 28 28 55 6B 18 38 FD 6B 68 2A 7F 9C 8A 14 FC C0 30 50 FD 4A 28 2A 7C B8 29 D6 FD A0 38 28 54 00 18 38 FC 00 38 2A FC 64 30 28 FC AB 50 28 7C 98 21 D6 FD 20 48 50 54 A5 18 38 FD 8C 40 2A FC A0 28 50 7D 4A C1 D6 FC ED 48 2A FD 00 60 28 54 84 18 38 FC 60 18 50 FC 00 60 2A 7C E7 C1 D6 FD 6B 50 2A FD AD 48 28 FC 84 30 2A 7C 19 05 AE 7D 6A CD AE 7D 08 C1 D6 7D A5 CD AE 7C 87 CD AE 7D 04 CD AE 7D 29 C1 D6
-
-. 0 1001240C 16
-. 7C A8 CD AE 7C EB CD AE 7C 69 CD AE 42 00 FE 80
-
-. 0 1001241C 28
-. 3A 73 00 01 56 00 F8 7E 7F 80 98 40 3A 94 00 10 3A B5 00 10 3A D6 00 10 41 9D FE 1C
-
-. 0 10012438 8
-. 73 40 00 01 40 A2 F3 78
-
-. 0 10012440 8
-. 2F 92 00 00 41 BE F3 70
-
-. 0 10012448 196
-. 56 67 08 3C 7E 49 03 A6 38 C7 FF FF 80 FE 82 58 57 44 08 3C 38 BA FF FF C9 07 00 00 7C 05 72 14 7D 44 32 14 7D 60 72 14 7C 1D 01 D6 7D 2B 72 14 55 48 18 38 54 C7 18 38 7D 3D 49 D6 54 00 18 38 7C 1F 04 AE 38 E7 00 08 39 08 00 08 7D 7D 59 D6 55 29 18 38 7D A9 FC AE FD 80 68 2A 7C 1D 29 D6 FC 00 68 28 55 6B 18 38 7D 4B FC AE FD 8C 02 32 7C A5 D2 14 FC 00 02 32 54 00 18 38 7D BF 04 AE 7D 58 51 D6 FD 60 50 50 FD 4A 60 28 FD 2D 00 28 7C 18 31 D6 FD 6B 60 28 FD AD 00 2A 55 4A 18 38 7C C6 8A 14 7C E7 C1 D6 54 00 18 38 7D B9 05 AE 7D 08 C1 D6 7D 67 CD AE 7D 2A CD AE 7D 48 CD AE 42 00 FF 5C
-
-. 0 1001250C 28
-. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 EA 28
-
-. 0 10012528 4
-. 4B FF F2 A8
-
-PASS: gsl_fft_real with signal_real_noise, n = 16, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 16, stride = 1
-. 0 1000D620 172
-. 54 A0 10 3A 81 81 00 30 7D 23 02 14 7C 1C 01 D6 39 29 FF FF 55 2A 18 38 7D 63 4A 14 39 4A 00 08 7D 7C 59 D6 54 00 18 38 7D 9D 04 AE 7D 05 62 14 7C E8 62 14 7D 3C 49 D6 55 6B 18 38 7D 4B EC AE 7C C7 62 14 FD 6C 50 28 7D 4A E1 D6 55 29 18 38 7C 09 EC AE FD 8C 50 2A FC 00 00 2A 7D AA EC AE 7C 17 29 D6 7C A5 DA 14 FD AD 68 2A FD 4C 00 28 7D 17 41 D6 FD 8C 00 2A FD 2B 68 2A 54 00 18 38 FD 6B 68 28 7D 9A 05 AE 7C F7 39 D6 55 08 18 38 7D 68 D5 AE 7C D7 31 D6 54 E7 18 38 7D 47 D5 AE 54 C6 18 38 7D 26 D5 AE 42 00 FF 58
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 16, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 16, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 16
-. 0 10014288 20
-. 3A 1A 00 01 3A 60 00 01 56 00 F8 7E 2B 80 00 01 40 9D 01 FC
-
-. 0 1001429C 60
-. 3A B7 00 08 3A DB 00 08 3A 9C 00 08 57 57 08 3C 2F 92 00 00 C0 14 FF FC C1 B5 FF FC C1 96 FF FC FC 20 00 50 FF C0 68 50 C0 54 FF F8 FF 80 60 50 C3 F5 FF F8 C3 B6 FF F8 41 9E 01 A4
-
-. 0 100142D8 400
-. 56 68 08 3C 7D 33 D0 50 55 29 08 3C 3B 88 FF FF 7E 49 03 A6 38 69 FF FF 7F 9B E3 78 7C 1B 72 14 57 66 10 3A 7D 60 72 14 54 09 10 3A 7D 0B 72 14 39 29 00 04 55 0A 10 3A 7D 29 F9 D6 39 4A 00 04 55 67 10 3A 38 E7 00 04 7D 4A F9 D6 7D 49 EC 2E 38 C6 00 04 ED 21 02 B2 7C B7 E2 14 7C 97 1A 14 7C 1F 01 D6 7C EA EC 2E 57 89 10 3A EC 9C 01 F2 54 6A 10 3A 39 29 00 04 7D 7F 59 D6 54 00 10 3A 7D 7D 04 2E 39 4A 00 04 ED 22 4A F8 7D 1F 41 D6 55 6B 10 3A 7D 0B EC 2E ED 61 02 F2 54 AB 10 3A ED 9E 02 32 39 6B 00 04 7C E7 F9 D6 55 08 10 3A 7C 08 EC 2E ED 42 5A BA 54 88 10 3A EC 9D 20 38 39 08 00 04 EC 1C 00 32 7C C6 F9 D6 7D A7 EC 2E EC A9 20 28 ED 9F 63 7A 7C 1F D9 D6 EC FD 01 FA ED BE 03 72 7D 66 EC 2E FC A0 28 50 7F 7B D2 14 EC 6B 60 28 EC CA 38 28 54 00 10 3A ED 1F 6A 38 7C 1D 04 2E ED 4A 38 2A 7C 18 E1 D6 ED 6B 60 2A 7F 9C 8A 14 ED A0 40 28 ED 29 20 2A EC E3 28 28 7C F8 19 D6 ED 8B 50 28 54 00 10 3A FC C0 30 50 7C 63 8A 14 EC 00 40 2A 7C B8 29 D6 FD 80 60 50 EC 8D 30 2A 54 E7 10 3A ED 00 48 28 FC E0 38 50 7C 98 21 D6 EC 00 48 2A ED 6B 50 2A 54 A5 10 3A ED AD 30 28 EC 63 28 2A 7C 19 05 2E 7D 29 C1 D6 54 84 10 3A 7D 6B C1 D6 7D 69 CD 2E 7D A5 CD 2E 7D 08 C1 D6 7C 6B CD 2E 7D 04 CD 2E 7D 4A C1 D6
-
-. 0 10014468 16
-. 7D 88 CD 2E 7C 87 CD 2E 7C EA CD 2E 42 00 FE 80
-
-. 0 10014478 28
-. 3A 73 00 01 56 00 F8 7E 7F 80 98 40 3A 94 00 08 3A B5 00 08 3A D6 00 08 41 9D FE 1C
-
-. 0 10014494 8
-. 73 48 00 01 40 A2 F3 48
-
-. 0 1001449C 8
-. 2F 92 00 00 41 BE F3 40
-
-. 0 100144A4 204
-. 81 3E 82 B4 56 68 08 3C 38 C8 FF FF 7E 49 03 A6 57 44 08 3C C9 09 00 00 38 BA FF FF 7C 05 72 14 7D 44 32 14 7D 60 72 14 7C 1F 01 D6 7D 2B 72 14 55 47 10 3A 54 C8 10 3A 7D 3F 49 D6 54 00 10 3A 7D BD 04 2E 39 08 00 04 38 E7 00 04 55 29 10 3A 7D 7F 59 D6 7D 89 EC 2E EC 0D 60 2A ED AD 60 28 7C 1F 29 D6 55 6B 10 3A 7D 6B EC 2E 7C A5 D2 14 FD 40 58 50 54 00 10 3A FC 00 02 32 7D 9D 04 2E 7D 38 31 D6 7C C6 8A 14 FD AD 02 32 FC 00 00 18 7D 58 51 D6 55 29 10 3A FD A0 68 18 ED 6B 00 28 ED 4A 00 28 7D 08 C1 D6 ED 2C 68 28 ED 8C 68 2A 55 4A 10 3A 7C E7 C1 D6 7D 89 CD 2E 7D 48 CD 2E 7D 2A CD 2E 7D 67 CD 2E 42 00 FF 54
-
-. 0 10014570 28
-. 80 E1 00 30 80 01 00 1C 38 E7 00 04 90 E1 00 30 34 E0 FF FF 90 E1 00 1C 40 82 E9 B4
-
-. 0 1001458C 4
-. 4B FF F2 70
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 16, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 16, stride = 1
-. 0 1000F804 172
-. 54 A0 10 3A 81 81 00 30 7D 23 02 14 7C 1C 01 D6 39 29 FF FF 55 2A 10 3A 7D 63 4A 14 39 4A 00 04 7D 7C 59 D6 54 00 10 3A 7D 9F 04 2E 7D 05 62 14 7C E8 62 14 7D 3C 49 D6 55 6B 10 3A 7D 4B FC 2E 7C C7 62 14 ED 6C 50 28 7D 4A E1 D6 55 29 10 3A 7C 09 FC 2E ED 8C 50 2A EC 00 00 2A 7D AA FC 2E 7C 17 29 D6 7C A5 DA 14 ED AD 68 2A ED 4C 00 28 7D 17 41 D6 ED 8C 00 2A ED 2B 68 2A 54 00 10 3A ED 6B 68 28 7D 9A 05 2E 7C F7 39 D6 55 08 10 3A 7D 68 D5 2E 7C D7 31 D6 54 E7 10 3A 7D 47 D5 2E 54 C6 10 3A 7D 26 D5 2E 42 00 FF 58
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 16, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 16, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 16
-PASS: gsl_fft_complex_forward with signal_noise, n = 16, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 16, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 16, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 16, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 16, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 16, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 16, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 16, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 16, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 16, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 16
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 16, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 16, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 16, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 16, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 16, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 16, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 16, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 16, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 16, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 16, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 16
-PASS: gsl_fft_real with signal_real_noise, n = 16, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 16, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 16, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 16, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 16
-PASS: gsl_fft_real_float with signal_real_noise, n = 16, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 16, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 16, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 16, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 16
-PASS: gsl_fft_complex_forward with signal_noise, n = 16, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 16, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 16, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 16, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 16, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 16, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 16, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 16, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 16, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 16, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 16
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 16, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 16, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 16, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 16, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 16, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 16, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 16, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 16, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 16, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 16, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 16
-PASS: gsl_fft_real with signal_real_noise, n = 16, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 16, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 16, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 16, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 16
-PASS: gsl_fft_real_float with signal_real_noise, n = 16, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 16, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 16, stride = 3
-. 0 FE0D438 16
-. CB BD 00 00 FC E0 F0 90 FF 9E E8 00 41 9D 00 08
-
-. 0 FE0D44C 32
-. C9 0A 00 00 FC A8 38 2A FF 65 40 28 D8 A1 00 30 81 41 00 30 81 61 00 34 FC 27 D8 28 41 9D 00 08
-
-. 0 FE0D470 188
-. FF 41 00 72 C9 47 00 00 C8 66 00 00 55 6A 28 34 C8 E5 00 00 7C EA 42 14 83 1E 0F 84 FF 9A 1A BA C8 A4 00 00 C8 18 00 00 C9 63 00 00 FD 81 00 2A C8 67 00 08 FD BC 3E BA 7F 8A 44 AE FD 0C 00 28 FC DC 00 2A FF 6D 06 B2 FD 86 00 28 C8 07 00 18 FD 21 40 28 FC 81 D8 BA CB 67 00 10 FC E9 10 2A FD 5C 60 28 FD BB 01 32 FC DA 59 7A FD 21 06 B2 FD 6C 01 F2 FF 4C 02 32 FC 8A 18 2A FC A0 68 28 FD 29 01 B2 FD 44 00 72 FD BB D0 28 FC 85 58 28 FC 7C 02 72 FD 84 50 28 FC DB 68 28 FC 2C 18 28 FD 66 D0 28 FC 01 58 2A FC 2D 00 2A FC ED 08 28 FC 80 38 2A FC 04 E8 00 40 81 05 5C
-
-. 0 FE0DA84 20
-. 81 1E 0F 88 FF 9F E8 00 CB 48 00 00 FC 84 06 B2 40 9D 02 F0
-
-. 0 FE0DD84 8
-. 81 3E 0F B8 4B FF FD 14
-
-. 0 FE0DA9C 16
-. C9 69 00 00 FC BF 02 F2 FC 04 28 28 4B FF FA A4
-
-. 0 FE0D54C 12
-. FC 81 00 2A FC 84 08 00 41 86 02 6C
-
-. 0 FE0D7C0 8
-. 57 E0 F8 7F 41 A2 F2 94
-
-PASS: gsl_fft_complex_wavetable_alloc, n = 17, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 17
-PASS: gsl_fft_complex_forward with signal_noise, n = 17, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 17, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 17, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 17, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 17, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 17, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 17, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 17
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 17, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 17, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 17, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 17, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 17, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 17, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 17, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 17
-PASS: gsl_fft_real with signal_real_noise, n = 17, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 17, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 17, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 17, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 17
-PASS: gsl_fft_real_float with signal_real_noise, n = 17, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 17, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 17, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 17, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 17
-PASS: gsl_fft_complex_forward with signal_noise, n = 17, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 17, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 17, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 17, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 17, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 17, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 17, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 17, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 17, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 17, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 17
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 17, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 17, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 17, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 17, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 17, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 17, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 17, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 17, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 17, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 17, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 17
-PASS: gsl_fft_real with signal_real_noise, n = 17, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 17, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 17, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 17, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 17
-PASS: gsl_fft_real_float with signal_real_noise, n = 17, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 17, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 17, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 17, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 17
-PASS: gsl_fft_complex_forward with signal_noise, n = 17, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 17, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 17, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 17, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 17, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 17, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 17, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 17, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 17, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 17, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 17
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 17, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 17, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 17, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 17, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 17, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 17, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 17, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 17, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 17, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 17, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 17
-PASS: gsl_fft_real with signal_real_noise, n = 17, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 17, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 17, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 17, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 17
-PASS: gsl_fft_real_float with signal_real_noise, n = 17, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 17, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 17, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 18, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 18
-. 0 FE0EBBC 20
-. FC 1F F0 00 81 1E 0F E4 CB C8 00 00 FC 84 07 B2 40 81 02 B8
-
-. 0 FE0EE84 8
-. 81 3E 10 18 4B FF FD 4C
-
-. 0 FE0EBD4 20
-. C9 29 00 00 FC 1F 22 7A FD 81 00 2A FF 0C 08 00 41 9A 00 60
-
-. 0 FE0EC4C 4
-. 4B FF FA 28
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 18, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 18, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 18, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 18, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 18, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 18, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 18, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 18
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 18, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 18, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 18, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 18, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 18, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 18, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 18, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 18
-. 0 10011F44 296
-. 7D 26 1A 14 7C F7 2A 14 7C 09 1A 14 7D 7D 49 D6 54 0A 18 38 55 29 18 38 39 29 00 08 7C 1D 01 D6 39 4A 00 08 55 6B 18 38 7D 8B FC AE 54 CB 18 38 39 6B 00 08 7D 29 E9 D6 54 00 18 38 7D 7F 04 AE FD 04 03 32 54 E8 18 38 FC E2 02 F2 39 08 00 08 7D 4A E9 D6 7D A9 FC AE 54 A9 18 38 FD 44 03 72 39 29 00 08 7C 0A FC AE FD A5 43 7A 7D 6B E9 D6 FD 22 00 32 FC 03 38 3A 7C 1D 31 D6 7C EB FC AE FD 63 4A F8 54 8B 18 38 39 6B 00 08 FD 85 53 38 7C C6 DA 14 54 00 18 38 7D 58 21 D6 FC CD 00 2A 7C 84 8A 14 FD AD 00 28 FD 4C 58 28 FD 26 00 72 7C F8 39 D6 55 4A 18 38 FD 8C 58 2A 7D 7F 04 AE FD 4A 07 F2 7C 18 29 D6 54 E7 18 38 FC 0C 00 72 7C A5 8A 14 FD 27 48 28 FD AD 07 F2 7D 29 C1 D6 54 00 18 38 FC 0B 00 28 FD 09 50 28 7D 08 C1 D6 FD 6B 60 2A FC E7 30 2A FD 80 68 2A FD 00 40 50 7D 79 05 AE 7D 6B C1 D6 FC 00 68 28 FD 29 50 2A 7C E9 CD AE 7C 07 CD AE 7D 28 CD AE 7D 8A CD AE 7D 0B CD AE 42 00 FE DC
-
-PASS: gsl_fft_real with signal_real_noise, n = 18, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 18, stride = 1
-. 0 1000D3A8 24
-. 2F 94 00 00 C8 36 FF F0 CB F6 FF F8 C8 78 FF F0 C8 58 FF F8 41 9E 01 54
-
-. 0 1000D548 140
-. 1D 25 00 03 7D 47 FA 14 7D 0A FA 14 7D 57 51 D6 7D 29 DA 14 39 29 FF FF 7C 06 4A 14 55 2B 18 38 7C 1C 01 D6 39 6B 00 08 55 4A 18 38 7C A5 DA 14 7D 3C 49 D6 54 00 18 38 7D 5D 04 AE 7D 6B E1 D6 55 29 18 38 7C 09 EC AE FD 80 50 28 7D AB EC AE FC 00 00 2A 7C 17 39 D6 7C E7 DA 14 FD A9 03 72 FD 60 60 50 7D 17 41 D6 FC 00 50 2A FD 8C 68 28 54 00 18 38 FD 6B 68 28 7C 1A 05 AE 55 08 18 38 7D 8A D5 AE 7D 68 D5 AE 42 00 FF 78
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 18, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 18, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 18
-. 0 10013F94 296
-. 7D 26 1A 14 54 88 10 3A 7C 09 1A 14 7D 7F 49 D6 54 0A 10 3A 55 29 10 3A 39 29 00 04 7C 1F 01 D6 39 4A 00 04 55 6B 10 3A 7D 4B EC 2E 54 CB 10 3A 39 6B 00 04 7D 29 F9 D6 54 00 10 3A 7D 7D 04 2E ED 84 02 B2 39 08 00 04 ED 22 02 F2 7D 4A F9 D6 7D A9 EC 2E 54 A9 10 3A ED 85 63 7A 39 29 00 04 ED A4 03 72 7C 0A EC 2E 7D 6B F9 D6 ED 23 48 3A EC 02 00 32 ED 45 6A B8 7C 1F 31 D6 EC CC 48 2A 7C EB EC 2E ED 63 02 F8 7D 77 2A 14 ED 8C 48 28 55 6A 10 3A 54 00 10 3A 7C F8 21 D6 ED 0A 58 28 7C 1D 04 2E ED 4A 58 2A 39 4A 00 04 ED 66 00 72 7C C6 DA 14 ED 08 07 F2 7C 18 29 D6 ED AA 00 72 54 E7 10 3A ED 67 58 28 7C A5 8A 14 ED 8C 07 F2 7C 84 8A 14 ED A0 68 28 7D 78 59 D6 ED 2B 40 28 54 00 10 3A EC 00 50 2A EC E7 30 2A 7D 29 C1 D6 ED 4D 60 2A FD 20 48 50 55 6B 10 3A ED AD 60 28 7C 19 05 2E ED 6B 40 2A 7D 4A C1 D6 7C E9 CD 2E 7D AB CD 2E 7D 08 C1 D6 7D 6A CD 2E 7D 47 CD 2E 7D 28 CD 2E 42 00 FE DC
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 18, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 18, stride = 1
-. 0 1000F574 24
-. 2F 93 00 00 C0 75 FF F8 C0 55 FF FC C0 36 FF F8 C3 F6 FF FC 41 9E 01 6C
-
-. 0 1000F72C 140
-. 1D 25 00 03 7D 47 CA 14 7D 0A CA 14 7D 57 51 D6 7D 29 DA 14 39 29 FF FF 7C 06 4A 14 55 2B 10 3A 7C 1C 01 D6 39 6B 00 04 55 4A 10 3A 7C A5 DA 14 7D 3C 49 D6 54 00 10 3A 7D 5F 04 2E 55 29 10 3A 7D 6B E1 D6 7C 09 FC 2E ED 80 50 28 7D AB FC 2E EC 00 00 2A 7C 17 39 D6 7C E7 DA 14 ED A9 03 72 FD 60 60 50 EC 00 50 2A 7D 17 41 D6 ED 8C 68 28 ED 6B 68 28 54 00 10 3A 7C 1A 05 2E 7D 8A D5 2E 55 08 10 3A 7D 68 D5 2E 42 00 FF 78
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 18, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 18, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 18
-PASS: gsl_fft_complex_forward with signal_noise, n = 18, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 18, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 18, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 18, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 18, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 18, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 18, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 18, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 18, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 18, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 18
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 18, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 18, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 18, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 18, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 18, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 18, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 18, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 18, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 18, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 18, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 18
-PASS: gsl_fft_real with signal_real_noise, n = 18, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 18, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 18, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 18, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 18
-PASS: gsl_fft_real_float with signal_real_noise, n = 18, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 18, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 18, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 18, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 18
-PASS: gsl_fft_complex_forward with signal_noise, n = 18, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 18, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 18, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 18, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 18, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 18, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 18, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 18, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 18, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 18, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 18
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 18, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 18, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 18, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 18, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 18, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 18, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 18, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 18, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 18, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 18, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 18
-PASS: gsl_fft_real with signal_real_noise, n = 18, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 18, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 18, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 18, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 18
-PASS: gsl_fft_real_float with signal_real_noise, n = 18, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 18, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 18, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 19, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 19
-PASS: gsl_fft_complex_forward with signal_noise, n = 19, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 19, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 19, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 19, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 19, stride = 1
-. 0 FE0DBB8 24
-. 81 3E 0F 9C C8 A9 00 00 FC 1F 21 7A FC C1 00 2A FE 06 08 00 41 B2 F5 78
-
-PASS: gsl_fft_complex_forward with signal_exp, n = 19, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 19, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 19
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 19, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 19, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 19, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 19, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 19, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 19, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 19, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 19
-PASS: gsl_fft_real with signal_real_noise, n = 19, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 19, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 19, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 19, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 19
-PASS: gsl_fft_real_float with signal_real_noise, n = 19, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 19, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 19, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 19, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 19
-PASS: gsl_fft_complex_forward with signal_noise, n = 19, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 19, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 19, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 19, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 19, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 19, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 19, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 19, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 19, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 19, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 19
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 19, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 19, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 19, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 19, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 19, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 19, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 19, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 19, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 19, stride = 2
-. 0 FEEF554 12
-. 7F 80 F8 28 7F A0 F9 2D 40 A2 FF F8
-
-PASS: gsl_fft_real_wavetable_alloc, n = 19, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 19
-PASS: gsl_fft_real with signal_real_noise, n = 19, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 19, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 19, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 19, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 19
-PASS: gsl_fft_real_float with signal_real_noise, n = 19, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 19, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 19, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 19, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 19
-PASS: gsl_fft_complex_forward with signal_noise, n = 19, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 19, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 19, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 19, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 19, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 19, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 19, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 19, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 19, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 19, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 19
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 19, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 19, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 19, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 19, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 19, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 19, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 19, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 19, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 19, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 19, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 19
-PASS: gsl_fft_real with signal_real_noise, n = 19, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 19, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 19, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 19, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 19
-PASS: gsl_fft_real_float with signal_real_noise, n = 19, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 19, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 19, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 20, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 20
-PASS: gsl_fft_complex_forward with signal_noise, n = 20, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 20, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 20, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 20, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 20, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 20, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 20, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 20
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 20, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 20, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 20, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 20, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 20, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 20, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 20, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 20
-. 0 10012250 44
-. 2F 92 00 00 C8 14 FF F8 C9 B5 FF F8 C9 96 FF F8 FC 20 00 50 FF C0 68 50 C8 54 FF F0 FF 80 60 50 CB F5 FF F0 CB B6 FF F0 41 9E 01 A4
-
-PASS: gsl_fft_real with signal_real_noise, n = 20, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 20, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 20, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 20, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 20
-. 0 100142AC 44
-. 2F 92 00 00 C0 14 FF FC C1 B5 FF FC C1 96 FF FC FC 20 00 50 FF C0 68 50 C0 54 FF F8 FF 80 60 50 C3 F5 FF F8 C3 B6 FF F8 41 9E 01 A4
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 20, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 20, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 20, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 20, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 20
-PASS: gsl_fft_complex_forward with signal_noise, n = 20, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 20, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 20, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 20, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 20, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 20, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 20, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 20, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 20, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 20, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 20
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 20, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 20, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 20, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 20, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 20, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 20, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 20, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 20, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 20, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 20, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 20
-PASS: gsl_fft_real with signal_real_noise, n = 20, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 20, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 20, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 20, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 20
-PASS: gsl_fft_real_float with signal_real_noise, n = 20, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 20, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 20, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 20, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 20
-PASS: gsl_fft_complex_forward with signal_noise, n = 20, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 20, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 20, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 20, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 20, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 20, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 20, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 20, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 20, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 20, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 20
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 20, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 20, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 20, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 20, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 20, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 20, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 20, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 20, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 20, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 20, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 20
-PASS: gsl_fft_real with signal_real_noise, n = 20, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 20, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 20, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 20, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 20
-PASS: gsl_fft_real_float with signal_real_noise, n = 20, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 20, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 20, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 21, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 21
-PASS: gsl_fft_complex_forward with signal_noise, n = 21, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 21, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 21, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 21, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 21, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 21, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 21, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 21
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 21, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 21, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 21, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 21, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 21, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 21, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 21, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 21
-. 0 100110F8 20
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-
-. 0 1001110C 36
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-
-. 0 10011130 36
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-
-. 0 10011164 12
-. 39 00 00 00 7F 88 D8 40 40 9C 09 D0
-
-. 0 10011170 20
-. 7D 36 62 14 7F 69 03 A6 39 49 FF FF 7D 65 98 50 48 00 00 78
-
-. 0 100111F8 16
-. 2F 88 00 00 55 60 20 36 7D 20 E2 14 41 BE FF 80
-
-. 0 10011184 72
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-
-. 0 100111DC 28
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-
-. 0 10011208 16
-. C8 09 00 08 7D 3C 04 AE FD 80 00 50 4B FF FF 78
-
-. 0 1001118C 64
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-
-. 0 100111CC 44
-. FC 04 02 32 FD A4 01 F2 FC E3 01 F8 FD 03 6A 3A FC 08 03 32 FD A8 02 B2 FC 07 02 BA FD A7 6B 38 FC C6 00 2A FC A5 68 2A 42 40 09 48
-
-. 0 10011B3C 12
-. 7D 27 D8 50 7F 89 38 40 40 9D 01 FC
-
-. 0 10011B48 44
-. 54 C9 18 38 7C 18 31 D6 39 29 00 08 7D 29 C1 D6 54 00 18 38 7C B9 05 AE 7C C9 CD AE 38 E7 00 01 7C C6 BA 14 7F 87 D8 40 41 9C F5 CC
-
-. 0 1001113C 24
-. 2F 87 00 00 C8 A3 00 00 C8 E4 00 00 FC C0 28 90 FD 00 28 90 41 9E 00 14
-
-. 0 10011154 28
-. FC 04 07 72 FD A3 07 72 FC 63 07 BA FC 84 6F B8 39 00 00 00 7F 88 D8 40 40 9C 09 D0
-
-. 0 10011D40 56
-. 7D 29 A1 D6 FC 00 30 50 55 29 08 3C 7D 35 4A 14 7D 2C 48 50 39 29 FF FF 55 2B 18 38 7D 38 49 D6 39 6B 00 08 7D 6B C1 D6 55 29 18 38 7C A9 CD AE 7C 0B CD AE 4B FF FD F0
-
-. 0 10011B64 16
-. 38 E7 00 01 7C C6 BA 14 7F 87 D8 40 41 9C F5 CC
-
-. 0 10011B74 20
-. 3A 52 00 01 7E D6 A2 14 7F 92 80 40 7E B5 8A 14 41 9C F5 98
-
-. 0 10011B88 16
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-
-PASS: gsl_fft_real with signal_real_noise, n = 21, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 21, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 21, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 21, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 21
-. 0 100130E8 20
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-
-. 0 100130FC 36
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-
-. 0 10013120 36
-. 7D 35 62 14 56 97 08 3C 38 C9 FF FF 2F 87 00 00 C0 A3 00 00 C0 E4 00 00 FC C0 28 90 FD 00 28 90 41 9E 00 14
-
-. 0 10013154 12
-. 39 00 00 00 7F 88 D8 40 40 9C 0A 0C
-
-. 0 10013160 20
-. 7D 36 62 14 7F 69 03 A6 39 49 FF FF 7D 65 98 50 48 00 00 78
-
-. 0 100131E8 16
-. 2F 88 00 00 55 60 18 38 7D 20 E2 14 41 BE FF 80
-
-. 0 10013174 72
-. C1 24 00 00 C1 83 00 00 55 49 10 3A 7C 1F 51 D6 39 29 00 04 7D 65 5A 14 39 08 00 01 7D 29 F9 D6 54 00 10 3A 7D 7D 04 2E 7D 4A D2 14 39 6B FF FF ED AC 02 F2 7C 09 EC 2E ED 8C 00 32 ED 49 68 3A ED 89 62 F8 41 9E 00 14
-
-. 0 100131CC 28
-. EC 08 03 32 ED A8 02 B2 EC 07 02 BA ED A7 6B 38 EC C6 00 2A EC A5 68 2A 42 40 09 84
-
-. 0 100131F8 16
-. C0 09 00 04 7D 3C 04 2E FD 80 00 50 4B FF FF 78
-
-. 0 1001317C 64
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-
-. 0 100131BC 44
-. EC 04 02 32 ED A4 01 F2 EC E3 01 F8 ED 03 6A 3A EC 08 03 32 ED A8 02 B2 EC 07 02 BA ED A7 6B 38 EC C6 00 2A EC A5 68 2A 42 40 09 84
-
-. 0 10013B68 12
-. 7D 27 D8 50 7F 89 38 40 40 9D 02 00
-
-. 0 10013B74 44
-. 54 C9 10 3A 7C 18 31 D6 39 29 00 04 7D 29 C1 D6 54 00 10 3A 7C B9 05 2E 7C C9 CD 2E 38 E7 00 01 7C C6 BA 14 7F 87 D8 40 41 9C F5 90
-
-. 0 1001312C 24
-. 2F 87 00 00 C0 A3 00 00 C0 E4 00 00 FC C0 28 90 FD 00 28 90 41 9E 00 14
-
-. 0 10013144 28
-. EC 04 07 72 ED A3 07 72 EC 63 07 BA EC 84 6F B8 39 00 00 00 7F 88 D8 40 40 9C 0A 0C
-
-. 0 10013D70 56
-. 7D 29 A1 D6 FC 00 30 50 55 29 08 3C 7D 35 4A 14 7D 2C 48 50 39 29 FF FF 55 2B 10 3A 7D 38 49 D6 39 6B 00 04 7D 6B C1 D6 55 29 10 3A 7C A9 CD 2E 7C 0B CD 2E 4B FF FD EC
-
-. 0 10013B90 16
-. 38 E7 00 01 7C C6 BA 14 7F 87 D8 40 41 9C F5 90
-
-. 0 10013BA0 20
-. 3A 52 00 01 7E D6 A2 14 7F 92 80 40 7E B5 8A 14 41 9C F5 5C
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-. 0 10013BB4 16
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-
-PASS: gsl_fft_real_float with signal_real_noise, n = 21, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 21, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 21, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 21, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 21
-PASS: gsl_fft_complex_forward with signal_noise, n = 21, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 21, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 21, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 21, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 21, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 21, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 21, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 21, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 21, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 21, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 21
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 21, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 21, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 21, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 21, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 21, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 21, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 21, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 21, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 21, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 21, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 21
-PASS: gsl_fft_real with signal_real_noise, n = 21, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 21, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 21, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 21, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 21
-PASS: gsl_fft_real_float with signal_real_noise, n = 21, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 21, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 21, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 21, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 21
-PASS: gsl_fft_complex_forward with signal_noise, n = 21, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 21, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 21, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 21, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 21, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 21, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 21, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 21, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 21, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 21, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 21
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 21, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 21, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 21, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 21, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 21, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 21, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 21, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 21, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 21, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 21, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 21
-PASS: gsl_fft_real with signal_real_noise, n = 21, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 21, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 21, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 21, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 21
-PASS: gsl_fft_real_float with signal_real_noise, n = 21, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 21, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 21, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 22, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 22
-. 0 10007770 8
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-. 0 10007778 4
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-. 0 1000777C 12
-. C8 BC FF F0 C8 DC FF F8 4B FF FF 34
-
-. 0 100076B8 8
-. 2F 86 00 00 41 9E 00 A0
-
-. 0 10006FE0 36
-. 7C 0A FC AE 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 AE 7C 00 3A 14 C9 AB 00 08 D9 A9 00 08 42 00 FF E0
-
-. 0 10007038 128
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-
-. 0 100070E4 36
-. 7C 0A D4 AE 7D 6A D2 14 7D 20 FA 14 7D 4A 42 14 7C 1F 05 AE 7C 00 3A 14 C9 AB 00 08 D9 A9 00 08 42 00 FF E0
-
-. 0 1000713C 64
-. 7D 2A 32 14 7C 1F 04 AE 7D 29 C1 D6 7D 60 FA 14 38 C6 00 01 55 29 20 36 7D A9 D4 AE 7D 29 D2 14 FC 00 68 2A 7C 1F 05 AE 7C 00 42 14 C9 A9 00 08 C8 0B 00 08 FC 00 68 2A D8 0B 00 08 42 00 FF C4
-
-. 0 100071EC 80
-. 7D 26 EA 14 7C 1A 04 AE 7D 29 C9 D6 7D 40 D2 14 7D 66 DA 14 38 C6 00 01 55 29 20 36 7D 6B C9 D6 7C 09 FD AE 7D 29 FA 14 C8 0A 00 08 D8 09 00 08 55 6B 20 36 7D BA 04 AE 7C 00 42 14 7D AB FD AE 7D 6B FA 14 C8 0A 00 08 D8 0B 00 08 42 00 FF B4
-
-. 0 10007278 168
-. 7D 44 32 14 7D 27 32 14 7D 4A C1 D6 7C 06 EA 14 7D 06 DA 14 38 C6 00 01 7D 29 C1 D6 55 4A 20 36 7D 6A D2 14 7D 8A D4 AE C8 0B 00 08 FD 88 03 32 55 29 20 36 7C 00 C9 D6 7D 49 D4 AE FC 08 00 32 7D 29 D2 14 FD 47 02 B2 C9 69 00 08 54 00 20 36 7D 08 C9 D6 7D BF 04 AE FD 67 02 F2 7D 60 FA 14 FD 2A 00 28 FD 4A 00 2A 55 08 20 36 7D 28 FA 14 FD AD 48 2A FD 2B 60 2A FD 6B 60 28 7D BF 05 AE C8 0B 00 08 FC 00 48 2A D8 0B 00 08 7D A8 FC AE FD AD 50 2A 7D A8 FD AE C8 09 00 08 FC 00 58 2A D8 09 00 08 42 00 FF 5C
-
-. 0 1000736C 36
-. 7C 0A FC AE 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 AE 7C 00 3A 14 C9 AB 00 08 D9 A9 00 08 42 00 FF E0
-
-. 0 100073B4 56
-. 7D 20 22 14 7D 6A 22 14 7D 29 C9 D6 38 84 00 01 7D 6B C1 D6 55 29 20 36 7D A9 FC AE 7D 29 FA 14 55 6B 20 36 7D AB D5 AE 7D 6B D2 14 C8 09 00 08 D8 0B 00 08 42 00 FF CC
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 22, stride = 1
-. 0 10007788 16
-. C8 1C FF F8 C8 BC FF F0 FC C0 00 50 4B FF FF 24
-
-PASS: gsl_fft_complex_inverse with signal_noise, n = 22, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 22, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 22, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 22, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 22, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 22, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 22
-. 0 1000A590 8
-. 2F 9B 00 00 41 BE FF 3C
-
-. 0 1000A598 4
-. 40 9A 00 10
-
-. 0 1000A59C 12
-. C0 BC FF F8 C0 DC FF FC 4B FF FF 34
-
-. 0 1000A4D8 8
-. 2F 86 00 00 41 9E 00 A0
-
-. 0 10009E08 36
-. 7C 0A FC 2E 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 2E 7C 00 3A 14 C1 AB 00 04 D1 A9 00 04 42 00 FF E0
-
-. 0 10009E60 128
-. 7D 25 32 14 7C 04 32 14 7D 59 49 D6 38 C6 00 01 7D 79 01 D6 55 4A 18 38 7D AA FC 2E 7C EA FA 14 55 6B 18 38 7D 38 49 D6 7C 0B FC 2E 7D 0B FA 14 ED AD 00 2A 55 29 18 38 7C 18 01 D6 7D A9 D5 2E 7D 29 D2 14 C1 A8 00 04 C0 07 00 04 54 00 18 38 EC 00 68 2A D0 09 00 04 7D 20 D2 14 7C 0B FC 2E 7D AA FC 2E ED AD 00 28 7D BA 05 2E C0 07 00 04 C1 A8 00 04 EC 00 68 28 D0 09 00 04 42 00 FF 84
-
-. 0 10009F0C 36
-. 7C 0A D4 2E 7D 6A D2 14 7D 20 FA 14 7D 4A 42 14 7C 1F 05 2E 7C 00 3A 14 C1 AB 00 04 D1 A9 00 04 42 00 FF E0
-
-. 0 10009F64 64
-. 7D 2A 32 14 7C 1F 04 2E 7D 29 C1 D6 7D 60 FA 14 38 C6 00 01 55 29 18 38 7D A9 D4 2E 7D 29 D2 14 EC 00 68 2A 7C 1F 05 2E 7C 00 42 14 C1 A9 00 04 C0 0B 00 04 EC 00 68 2A D0 0B 00 04 42 00 FF C4
-
-. 0 1000A00C 80
-. 7D 26 EA 14 7C 1A 04 2E 7D 29 C9 D6 7D 40 D2 14 7D 66 DA 14 38 C6 00 01 55 29 18 38 7D 6B C9 D6 7C 09 FD 2E 7D 29 FA 14 C0 0A 00 04 D0 09 00 04 55 6B 18 38 7D BA 04 2E 7C 00 42 14 7D AB FD 2E 7D 6B FA 14 C0 0A 00 04 D0 0B 00 04 42 00 FF B4
-
-. 0 1000A098 168
-. 7D 44 32 14 7D 67 32 14 7D 4A C1 D6 7C 06 EA 14 7D 06 DA 14 38 C6 00 01 7D 6B C1 D6 55 4A 18 38 7D 2A D2 14 7D AA D4 2E C1 29 00 04 ED A8 03 72 55 6B 18 38 7C 00 C9 D6 7D 4B D4 2E ED 28 02 72 7D 6B D2 14 ED 47 02 B2 C1 6B 00 04 54 00 18 38 7D 08 C9 D6 7C 1F 04 2E ED 67 02 F2 ED 8A 48 28 7D 20 FA 14 ED 4A 48 2A 55 08 18 38 EC 00 60 2A ED 8B 68 2A ED 6B 68 28 7C 1F 05 2E C0 09 00 04 EC 00 60 2A D0 09 00 04 7D 28 FA 14 7D A8 FC 2E ED AD 50 2A 7D A8 FD 2E C0 09 00 04 EC 00 58 2A D0 09 00 04 42 00 FF 5C
-
-. 0 1000A18C 36
-. 7C 0A FC 2E 7D 6A FA 14 7D 20 D2 14 7D 4A 42 14 7C 1A 05 2E 7C 00 3A 14 C1 AB 00 04 D1 A9 00 04 42 00 FF E0
-
-. 0 1000A1D4 56
-. 7D 20 22 14 7D 6A 22 14 7D 29 C9 D6 38 84 00 01 7D 6B C1 D6 55 29 18 38 7D A9 FC 2E 7D 29 FA 14 55 6B 18 38 7D AB D5 2E 7D 6B D2 14 C0 09 00 04 D0 0B 00 04 42 00 FF CC
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 22, stride = 1
-. 0 1000A5A8 16
-. C0 1C FF FC C0 BC FF F8 FC C0 00 50 4B FF FF 24
-
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 22, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 22, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 22, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 22, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 22, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 22, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 22
-PASS: gsl_fft_real with signal_real_noise, n = 22, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 22, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 22, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 22, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 22
-PASS: gsl_fft_real_float with signal_real_noise, n = 22, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 22, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 22, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 22, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 22
-PASS: gsl_fft_complex_forward with signal_noise, n = 22, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 22, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 22, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 22, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 22, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 22, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 22, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 22, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 22, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 22, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 22
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 22, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 22, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 22, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 22, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 22, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 22, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 22, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 22, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 22, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 22, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 22
-PASS: gsl_fft_real with signal_real_noise, n = 22, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 22, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 22, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 22, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 22
-PASS: gsl_fft_real_float with signal_real_noise, n = 22, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 22, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 22, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 22, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 22
-PASS: gsl_fft_complex_forward with signal_noise, n = 22, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 22, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 22, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 22, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 22, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 22, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 22, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 22, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 22, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 22, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 22
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 22, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 22, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 22, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 22, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 22, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 22, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 22, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 22, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 22, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 22, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 22
-PASS: gsl_fft_real with signal_real_noise, n = 22, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 22, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 22, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 22, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 22
-PASS: gsl_fft_real_float with signal_real_noise, n = 22, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 22, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 22, stride = 3
-. 0 FE0E084 8
-. FC 00 F8 90 40 99 02 D8
-
-. 0 FE0E360 8
-. FC 00 F8 50 4B FF FD 28
-
-. 0 FE0E08C 200
-. FD 46 00 2A 81 1E 0F E0 80 BE 0F E4 FD 0A 30 28 D9 41 00 30 81 21 00 30 81 41 00 34 FD 40 40 28 55 40 28 34 C8 08 00 00 7C E0 32 14 7C C6 04 AE FC 2A 02 B2 C9 07 00 10 FD 2A 00 2A FD 86 00 2A FC E1 20 FA C8 67 00 08 FD 8C 00 28 FD 29 00 28 C8 07 00 18 FD A7 28 7A FC 8A 48 28 FC E6 60 28 FD 6D 00 72 FC A1 17 BA FD A8 02 F2 FD 6A 00 72 FC 47 18 2A FC 2C 02 72 FD 8C 01 32 FF C0 68 28 FC 8B 01 72 FC E2 02 B2 FD A8 08 28 FC 7E 60 28 CB C5 00 00 FC 46 01 32 FD 83 38 28 FD 08 68 28 FC 0C 10 28 FD 48 08 28 FD 20 50 2A FC CD 48 2A FD 6D 30 28 FC 20 30 90 FC A9 58 2A FC 85 37 BA FF 84 30 00 41 9E 00 3C
-
-PASS: gsl_fft_complex_wavetable_alloc, n = 23, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 23
-PASS: gsl_fft_complex_forward with signal_noise, n = 23, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 23, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 23, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 23, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 23, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 23, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 23, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 23
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 23, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 23, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 23, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 23, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 23, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 23, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 23, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 23
-PASS: gsl_fft_real with signal_real_noise, n = 23, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 23, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 23, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 23, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 23
-PASS: gsl_fft_real_float with signal_real_noise, n = 23, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 23, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 23, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 23, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 23
-PASS: gsl_fft_complex_forward with signal_noise, n = 23, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 23, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 23, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 23, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 23, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 23, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 23, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 23, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 23, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 23, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 23
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 23, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 23, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 23, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 23, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 23, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 23, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 23, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 23, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 23, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 23, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 23
-PASS: gsl_fft_real with signal_real_noise, n = 23, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 23, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 23, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 23, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 23
-PASS: gsl_fft_real_float with signal_real_noise, n = 23, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 23, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 23, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 23, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 23
-PASS: gsl_fft_complex_forward with signal_noise, n = 23, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 23, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 23, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 23, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 23, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 23, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 23, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 23, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 23, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 23, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 23
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 23, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 23, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 23, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 23, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 23, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 23, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 23, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 23, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 23, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 23, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 23
-PASS: gsl_fft_real with signal_real_noise, n = 23, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 23, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 23, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 23, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 23
-PASS: gsl_fft_real_float with signal_real_noise, n = 23, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 23, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 23, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 24, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 24
-PASS: gsl_fft_complex_forward with signal_noise, n = 24, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 24, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 24, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 24, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 24, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 24, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 24, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 24
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 24, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 24, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 24, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 24, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 24, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 24, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 24, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 24
-. 0 100120B0 120
-. 7C 07 1A 14 7D 66 42 14 7D 20 1A 14 7C 1D 01 D6 55 0A 18 38 39 4A 00 08 7D 3D 49 D6 54 00 18 38 7C 1F 04 AE 7C 1D 39 D6 55 29 18 38 7D 89 FC AE 7C E7 DA 14 FD 60 60 2A 54 00 18 38 FC 00 60 28 7D BF 04 AE 7D 78 59 D6 FD 6B 02 72 FD 80 6A BA 7C 18 41 D6 55 6B 18 38 FD AD 00 28 7D 08 8A 14 7D 4A C1 D6 54 00 18 38 7D 99 05 AE 7D 6A CD AE 7D AB CD AE 42 00 FF 8C
-
-PASS: gsl_fft_real with signal_real_noise, n = 24, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 24, stride = 1
-. 0 1000D6FC 32
-. 2F 91 00 00 CB D3 FF F0 CB B3 FF F8 CB 94 FF F0 CB 74 FF F8 CB 55 FF F0 CB 35 FF F8 41 9E 01 9C
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 24, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 24, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 24
-. 0 10014100 132
-. 7C 07 1A 14 7D 66 42 14 7D 20 1A 14 7C 1F 01 D6 55 0A 10 3A 39 4A 00 04 7D 3F 49 D6 54 00 10 3A 7D 7D 04 2E 7C 1F 39 D6 55 29 10 3A 7C 09 EC 2E 7C E7 DA 14 ED 4B 00 28 54 00 10 3A ED 6B 00 2A 7D 9D 04 2E 7D 78 59 D6 FC 00 50 90 FD A0 60 90 ED 6B 02 32 7C 18 41 D6 ED 8C 50 28 FC 00 6A 7A 55 6B 10 3A 7D 08 8A 14 7D 4A C1 D6 54 00 10 3A FC 00 00 18 7C 19 05 2E 7D 6A CD 2E 7D 8B CD 2E 42 00 FF 80
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 24, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 24, stride = 1
-. 0 1000F8E0 32
-. 2F 91 00 00 C3 F3 FF F8 C3 D3 FF FC C3 B4 FF F8 C3 94 FF FC C3 75 FF F8 C3 55 FF FC 41 9E 01 9C
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 24, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 24, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 24
-PASS: gsl_fft_complex_forward with signal_noise, n = 24, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 24, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 24, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 24, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 24, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 24, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 24, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 24, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 24, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 24, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 24
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 24, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 24, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 24, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 24, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 24, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 24, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 24, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 24, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 24, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 24, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 24
-PASS: gsl_fft_real with signal_real_noise, n = 24, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 24, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 24, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 24, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 24
-PASS: gsl_fft_real_float with signal_real_noise, n = 24, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 24, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 24, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 24, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 24
-PASS: gsl_fft_complex_forward with signal_noise, n = 24, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 24, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 24, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 24, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 24, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 24, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 24, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 24, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 24, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 24, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 24
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 24, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 24, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 24, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 24, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 24, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 24, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 24, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 24, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 24, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 24, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 24
-PASS: gsl_fft_real with signal_real_noise, n = 24, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 24, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 24, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 24, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 24
-PASS: gsl_fft_real_float with signal_real_noise, n = 24, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 24, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 24, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 25, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 25
-. 0 10007D6C 400
-. 7C 1B AA 14 7D 72 DA 14 7D 4E DA 14 7D 11 DA 14 7C 00 C9 D6 7D 3D FA 14 CB 89 00 08 7C 83 D2 14 7F BD FC AE 3B 7B 00 01 7E D6 CA 14 7D 6B C9 D6 54 00 20 36 7D 20 FA 14 7C FF 04 AE C9 49 00 08 7C 1C BA 14 7F BD 9A 14 7D 4A C9 D6 55 6B 20 36 7C CB FA 14 7D AB FC AE C8 06 00 08 7D 08 C9 D6 55 4A 20 36 7C EA FA 14 7D 8A FC AE C9 67 00 08 7C E8 02 A6 FC 8D 60 2A 7D 50 E2 14 55 08 20 36 FC 60 58 2A 7D 28 FA 14 7C 48 FC AE C8 29 00 08 FD AD 60 28 FD 27 10 2A 81 1E 80 60 FD 0A 08 2A 7D 67 E2 14 FC 00 58 28 7D 2C E2 14 FF 69 20 2A 7C 00 C1 D6 FF 48 18 2A 3B 9C 00 01 FC E7 10 28 C8 48 00 00 FC B7 03 72 7D 29 C1 D6 54 00 20 36 FC D7 00 32 7C E0 D2 14 FD B8 03 72 7D 6B C1 D6 55 29 20 36 FC 18 00 32 7C C9 D2 14 FD 4A 08 28 FD 29 20 28 7D 4A C1 D6 FD 08 18 28 55 6B 20 36 FD 7B 00 B2 7C AB D2 14 FD 9A 00 B2 55 4A 20 36 7D 0A D2 14 FC B8 29 F8 FC D8 32 B8 FC F7 69 FA FD 57 02 BA FD 29 03 B2 FD 08 03 B2 FD 7D 58 28 FD 9C 60 28 FC F9 01 F2 FD 59 02 B2 FC B9 01 72 FC D9 01 B2 FC 0B 48 28 FD AC 40 28 FD 6B 48 2A FD 8C 40 2A FC 80 30 2A FC 6D 28 28 FC 4B 50 2A FC 2C 38 28 FD 6B 50 28 FC 00 30 28 FD AD 28 2A FD 8C 38 2A FF CF 02 F2 FF F1 00 32 FC B5 01 32 FC D3 00 B2 FC EF 03 32 FD 51 03 72 FD 35 00 F2
-
-. 0 10007EFC 92
-. FD 13 00 72 FD 90 F3 3A FD B2 FB 7A FC 76 28 FA FC 34 30 7A FD 70 3A F8 FC 12 50 38 FC 96 49 38 FC 54 40 B8 FF BD D8 2A FF 9C D0 2A 7F A3 D5 AE 7C 63 A2 14 DB 84 00 08 7D 7A 05 AE D9 87 00 08 7C 09 D5 AE D9 A6 00 08 7C 8B D5 AE D8 65 00 08 7C 4A D5 AE D8 28 00 08 42 00 FE 18
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 25, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 25, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 25, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 25, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 25, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 25, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 25, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 25
-. 0 1000ABD0 400
-. 7C 1B AA 14 7D 72 DA 14 7D 4E DA 14 7D 11 DA 14 7C 00 C9 D6 7D 23 FA 14 C3 89 00 04 7C BC BA 14 7F A3 FC 2E 7C 8C E2 14 3B 7B 00 01 7D 6B C9 D6 54 00 18 38 7D 20 FA 14 7C 9F 04 2E C0 A9 00 04 7E D6 CA 14 7C 63 9A 14 7D 4A C9 D6 55 6B 18 38 7C CB FA 14 7C EB FC 2E C1 06 00 04 7C D0 E2 14 7D 08 C9 D6 55 4A 18 38 7C EA FA 14 7D 4A FC 2E C0 C7 00 04 ED 87 50 2A 55 08 18 38 ED 68 30 2A 7D 28 FA 14 7C 68 FC 2E C0 49 00 04 EC E7 50 28 EC 04 18 2A 7D 28 02 A6 ED A5 10 2A 7C A5 C1 D6 ED 08 30 28 EF 60 60 2A 7C 09 E2 14 EF 4D 58 2A 7D 3D D2 14 EC 00 60 28 7C 84 C1 D6 ED AD 58 28 54 A5 18 38 FD 40 D8 90 7D 65 D2 14 FD 20 D0 90 3B 9C 00 01 7C 00 C1 D6 FD 4A 05 72 54 84 18 38 7D 44 D2 14 FD 29 05 72 7C C6 C1 D6 54 00 18 38 7D 00 D2 14 FD 80 E8 90 FD 60 E0 90 FC 00 05 B2 54 C6 18 38 7C E6 D2 14 FD AD 05 B2 EC 84 18 28 EC A5 10 28 C0 41 00 34 FD 8C 50 28 FD 6B 48 28 EC D7 01 F2 ED 57 02 32 EC F8 01 F2 ED 18 02 32 FC 00 00 18 FD A0 68 18 EC D8 31 38 ED 58 51 78 FD 80 60 18 FD 60 58 18 EC 97 39 3A EC B7 41 7A ED 2C 00 28 ED 0B 68 28 EC 99 01 32 EC B9 01 72 EC D9 01 B2 ED 59 02 B2 ED 8C 00 2A ED 6B 68 2A EC 09 50 2A ED A8 30 28 EC 6B 20 28 EC EC 28 2A ED 29 50 28 ED 8C 28 28 ED 08 30 2A ED 6B 20 2A
-
-. 0 1000AD60 120
-. EC 22 03 32 EF F3 02 72 EC 82 02 F2 EF D1 00 32 EC AF 01 F2 EC 53 02 32 ED 51 03 72 EC CF 00 F2 EF BD D8 2A EF 9C D0 2A ED 6E 0A FA ED 14 FA 3A 7F BD D5 2E ED B2 F3 7A D3 89 00 04 EC 70 28 FA 7F BD A2 14 ED 8E 23 38 ED 34 12 78 EC 12 50 38 EC F0 31 F8 7D 85 D5 2E D1 6B 00 04 7D 24 D5 2E D1 0A 00 04 7C 1A 05 2E D1 A8 00 04 7C E6 D5 2E D0 67 00 04 42 00 FD FC
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 25, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 25, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 25, stride = 1
-. 0 FEC3310 12
-. 7D 40 18 28 7D 20 19 2D 40 A2 FF F8
-
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 25, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 25, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 25, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 25, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 25
-. 0 10011390 20
-. 3A 16 00 01 3A 60 00 01 56 00 F8 7E 2B 80 00 01 40 9D 02 FC
-
-. 0 100113A4 108
-. 81 3E 82 64 3A F7 00 10 3B 9C 00 10 7E E8 03 A6 FE 40 E0 50 39 F4 00 10 FE 20 D8 50 39 95 00 10 93 81 00 28 56 D7 08 3C C9 C9 00 00 7D 68 02 A6 81 41 00 28 2F 92 00 00 C9 8C FF F8 C8 0A FF F8 C9 AB FF F8 FE A0 60 50 C9 6F FF F8 FF 20 00 50 FE E0 68 50 CB 4A FF F0 FE 60 58 50 CB 0B FF F0 CA CC FF F0 CA 8F FF F0 41 9E 02 60
-
-. 0 10011410 400
-. 56 69 08 3C 80 FE 82 68 3B 69 FF FF 7E 93 B0 50 FE 00 70 90 C9 E7 00 00 3A A0 00 00 7F 7C DB 78 7E 49 03 A6 7D 7C D2 14 7C 0B D2 14 7D 1D 59 D6 7D 20 D2 14 7D 49 D2 14 54 07 18 38 55 26 18 38 55 45 18 38 7C 1D 01 D6 55 6B 18 38 39 6B 00 08 38 E7 00 08 38 C6 00 08 7D 3D 49 D6 38 A5 00 08 55 08 18 38 54 00 18 38 7C E8 FC AE 7D 5F 04 AE 7D 5D 51 D6 55 29 18 38 7D 29 FC AE FC 39 01 F2 57 89 18 38 FC 17 02 B2 39 29 00 08 7D 6B E9 D6 55 4A 18 38 7C AA FC AE FD B5 02 72 57 6A 18 38 FD 93 01 72 39 4A 00 08 7C E7 E9 D6 7D 0B FC AE 56 8B 08 3C FC 79 02 32 7D 6B AA 14 39 6B FF FF 7C C6 E9 D6 7D 67 FC AE FD 1A 0A 3A 7C F7 5A 14 55 64 18 38 FC 57 02 F2 54 E3 18 38 7C A5 E9 D6 7C C6 FC AE FD 78 02 FA 38 84 00 08 38 63 00 08 FF F5 01 B2 7E B5 8A 14 7C 85 FC AE 7D 29 E9 D6 FC D6 69 BA FF D3 01 32 7C 1D E1 D6 7F A9 FC AE FC 94 61 3A 7D 37 DA 14 7D 17 4A 14 FD 36 FA 78 55 26 18 38 54 00 18 38 55 05 18 38 FC B4 F1 78 7C 3F 04 AE 38 C6 00 08 7C 18 D9 D6 FC FA 19 F8 38 A5 00 08 7F 9C B2 14 FD 58 12 B8 7F 7B 8A 14 7D 38 49 D6 54 00 18 38 FD AB 30 2A FC 08 20 2A FD 87 28 2A FC 6A 48 2A 7D 18 41 D6 FF C0 68 2A 55 29 18 38 FD 4A 48 28 FF EC 18 2A FC 00 68 28 7D 78 59 D6 FD 3E 03 F2 55 08 18 38 FD 6B 30 28
-
-. 0 10011410 204
-. FC 5C 02 B2 7C F8 39 D6 55 6B 18 38 FD 5B 02 B2 FC E7 28 28 7D 4A C1 D6 FC 00 04 32 54 E7 18 38 FD 8C 18 28 FD BF 03 F2 7C C6 C1 D6 FD 3D 48 28 FC DC 02 F2 7C A5 C1 D6 FD 7B 02 F2 FD 08 20 28 FC 51 11 FA 7C 84 C1 D6 FD 8C 04 32 FC F2 51 F8 7C 63 C1 D6 FD 49 00 28 FD A1 68 28 FD 29 00 2A FC D1 32 3A FD 12 5A 38 FC 0D 60 28 FC AA 10 28 FD 69 38 28 FD AD 60 2A FC 80 30 2A FC 21 F8 2A FD 8D 40 2A FF BD F0 2A FD 60 58 50 7C 39 05 AE FC A0 28 50 FD AD 40 28 7F AA CD AE FD 29 38 2A FC 00 30 28 FD 4A 10 2A 7D A9 CD AE 7D 26 CD AE 7C 08 CD AE 7D 45 CD AE 7D 8B CD AE 7D 64 CD AE 7C 87 CD AE 7C A3 CD AE 42 00 FD CC
-
-. 0 1001166C 48
-. 3A 73 00 01 56 00 F8 7E 7D 28 02 A6 7F 80 98 40 81 01 00 28 39 8C 00 10 39 EF 00 10 39 08 00 10 39 29 00 10 91 01 00 28 7D 28 03 A6 41 9D FD 38
-
-. 0 100113D0 64
-. 7D 68 02 A6 81 41 00 28 2F 92 00 00 C9 8C FF F8 C8 0A FF F8 C9 AB FF F8 FE A0 60 50 C9 6F FF F8 FF 20 00 50 FE E0 68 50 CB 4A FF F0 FE 60 58 50 CB 0B FF F0 CA CC FF F0 CA 8F FF F0 41 9E 02 60
-
-. 0 1001169C 8
-. 72 CA 00 01 40 82 01 14
-
-PASS: gsl_fft_real with signal_real_noise, n = 25, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 25, stride = 1
-. 0 1000DB80 40
-. 2F 93 00 00 CA F0 FF F0 CA D0 FF F8 CA AE FF F0 CA 8E FF F8 CA 6F FF F0 CA 4F FF F8 CA 31 FF F0 CA 11 FF F8 41 9E 02 64
-
-. 0 1000DA5C 244
-. 1D 05 00 05 7C E5 CA 14 7D 26 42 14 7D 1C 41 D6 39 29 FF FF 7C 06 4A 14 54 0A 18 38 7D 7C 49 D6 39 4A 00 08 55 29 18 38 39 29 00 08 55 08 18 38 7C 1C 01 D6 55 6B 18 38 7D 8B EC AE 7D 67 CA 14 7D 08 EC AE 54 00 18 38 7D 4A E1 D6 7C 1D 04 AE FD 2C 00 2A 7D 6A EC AE 7D 29 E1 D6 FD 8C 00 28 7D 4B CA 14 FD 29 48 2A FD B9 02 F2 7C 09 EC AE 7D 2A CA 14 FD 78 02 F2 7C 17 29 D6 7C A5 DA 14 FD 49 01 B2 FD 8C 01 F2 7C F7 39 D6 54 00 18 38 FD B8 68 38 FC 19 58 3A 7D 77 59 D6 54 E7 18 38 FD 48 50 28 FD AD 68 2A FC 00 00 2A 7D 57 51 D6 FD 6A 60 28 55 6B 18 38 FD 8C 50 2A FD 08 48 2A 7D 37 49 D6 FD 4B 68 2A FD 2C 00 2A 55 4A 18 38 FD 8C 00 28 7D 1A 05 AE FD 6B 68 28 55 29 18 38 7D 87 D5 AE 7D 6B D5 AE 7D 4A D5 AE 7D 29 D5 AE 42 00 FF 10
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 25, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 25, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 25
-. 0 10013390 20
-. 3A 55 00 01 3A 80 00 01 56 40 F8 7E 2B 80 00 01 40 9D 03 18
-
-. 0 100133A4 100
-. 3A F7 00 08 3B 9C 00 08 7E E8 03 A6 FD E0 D8 50 FD C0 D0 50 39 F6 00 08 39 9B 00 08 93 81 00 28 56 B7 08 3C 7D 48 02 A6 81 21 00 28 2F 93 00 00 C1 8C FF FC C0 09 FF FC C1 AA FF FC FE 80 60 50 C1 6F FF FC FF 00 00 50 FE C0 68 50 C3 29 FF F8 FE 40 58 50 C2 EA FF F8 C2 AC FF F8 C2 6F FF F8 41 9E 02 84
-
-. 0 10013408 400
-. 56 89 08 3C 81 7E 82 C0 80 FE 82 C4 3B 89 FF FF 7E 14 A8 50 CA 2B 00 00 CA 07 00 00 3A C0 00 00 7F 9B E3 78 7E 69 03 A6 7D 7B D2 14 7C 0B D2 14 7D 1F 59 D6 7D 20 D2 14 7D 49 D2 14 54 07 10 3A 55 26 10 3A 55 45 10 3A 7C 1F 01 D6 55 6B 10 3A 39 6B 00 04 38 E7 00 04 38 C6 00 04 7D 3F 49 D6 38 A5 00 04 55 08 10 3A 54 00 10 3A 7C C8 EC 2E 7D 1D 04 2E 7D 5F 51 D6 55 29 10 3A 7C 89 EC 2E EC B8 01 B2 EC F6 02 32 57 69 10 3A EC 54 01 32 39 29 00 04 7D 6B F9 D6 55 4A 10 3A 7C 6A EC 2E 57 8A 10 3A 39 4A 00 04 EC 32 00 F2 7C E7 F9 D6 7D 6B EC 2E EC B9 2A FA ED 78 02 F2 7C C6 F9 D6 7C 07 EC 2E EC F7 38 3A EC 16 00 32 7C A5 F9 D6 7D 86 EC 2E EC D9 59 B8 EC 55 13 3A ED 94 03 32 7D A5 EC 2E ED 17 02 38 7D 29 F9 D6 EC 33 0B 7A ED B2 03 72 EC 95 61 38 EC 05 08 2A 7C 1F D9 D6 ED 87 10 2A 7F C9 EC 2E EC 73 68 F8 56 09 08 3C ED 68 20 2A 7D 29 B2 14 EF 80 60 2A 54 00 10 3A ED A6 18 2A 7F FD 04 2E EC 00 60 28 7C 17 E2 14 FD 40 E0 90 39 29 FF FF EF AD 58 2A 7D 17 02 14 ED AD 58 28 7C 97 4A 14 FD 4A 04 32 54 07 10 3A 55 06 10 3A 55 25 10 3A 54 83 10 3A FD 80 E8 90 7D 78 E1 D6 FD 20 F0 90 38 E7 00 04 38 C6 00 04 FD 8C 04 32 38 A5 00 04 38 63 00 04 7C 18 01 D6 FC 00 04 72 55 6B 10 3A 7F 7B AA 14 ED 08 20 28
-
-. 0 10013598 240
-. 7E D6 8A 14 FD 29 50 28 7D 18 41 D6 FD 60 F8 90 54 00 10 3A FD AD 04 72 7F 9C 8A 14 EC C6 18 28 7D 38 49 D6 FC 00 00 18 55 08 10 3A EC E7 10 28 FD 6B 60 28 FD 20 48 18 7C 98 21 D6 ED 5B 02 32 55 29 10 3A ED 1A 02 32 EC 89 00 28 ED 4E 51 BA 7D 4A C1 D6 FD A0 68 18 54 84 10 3A ED 29 00 2A EC A5 08 28 FD 60 58 18 7C E7 C1 D6 EC CF 41 B8 ED 9B 01 F2 EC FA 01 F2 EC 0B 68 28 7C C6 C1 D6 ED 8E 61 7A ED 6B 68 2A EC 64 50 28 ED 09 30 28 7C A5 C1 D6 EC AF 39 78 ED A0 60 2A EF FF E8 2A 7C 63 C1 D6 EC EB 28 2A EF DE E0 2A FD 00 40 50 7F EB CD 2E FC 60 18 50 ED 6B 28 28 7F CA CD 2E ED 29 30 2A EC 00 60 28 EC 84 50 2A 7D 79 05 2E 7D 27 CD 2E 7C 08 CD 2E 7C 86 CD 2E 7C E9 CD 2E 7D 05 CD 2E 7D A4 CD 2E 7C 63 CD 2E 42 00 FD AC
-
-. 0 10013688 48
-. 3A 94 00 01 56 40 F8 7E 7D 28 02 A6 7F 80 A0 40 81 01 00 28 39 8C 00 08 39 EF 00 08 39 08 00 08 39 29 00 08 91 01 00 28 7D 28 03 A6 41 9D FD 14
-
-. 0 100133C8 64
-. 7D 48 02 A6 81 21 00 28 2F 93 00 00 C1 8C FF FC C0 09 FF FC C1 AA FF FC FE 80 60 50 C1 6F FF FC FF 00 00 50 FE C0 68 50 C3 29 FF F8 FE 40 58 50 C2 EA FF F8 C2 AC FF F8 C2 6F FF F8 41 9E 02 84
-
-. 0 100136B8 8
-. 72 AA 00 01 40 82 01 24
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 25, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 25, stride = 1
-. 0 1000FD7C 40
-. 2F 92 00 00 C2 F0 FF F8 C2 D0 FF FC C2 AC FF F8 C2 8C FF FC C2 6E FF F8 C2 4E FF FC C2 2F FF F8 C2 0F FF FC 41 9E 02 84
-
-. 0 1000FC48 260
-. 1D 44 00 05 7C C4 C2 14 7C E6 C2 14 7C D7 31 D6 7D 65 52 14 39 6B FF FF 7C 05 5A 14 7D 3C 59 D6 54 08 10 3A 39 08 00 04 55 6B 10 3A 39 6B 00 04 7C 1C 01 D6 55 29 10 3A 7C 09 FC 2E 7D 27 C2 14 54 C6 10 3A 54 00 10 3A 7D 5C 51 D6 7D BF 04 2E ED 00 68 2A EC 00 68 28 55 4A 10 3A 7D 08 E1 D6 7C EA FC 2E ED 08 40 2A FD A0 38 90 FD 80 40 90 7D 6B E1 D6 7D 28 FC 2E FC 00 01 B2 FD 8C 01 72 7D 6B FC 2E 7D 69 C2 14 ED 59 02 72 7C 17 21 D6 ED 38 02 72 7C 84 DA 14 FD AD 60 28 FC 00 00 18 ED 58 52 F8 7C F7 39 D6 FD A0 68 18 54 00 10 3A ED 79 4A FA ED 4A 50 2A ED 8D 00 28 7D 37 49 D6 EC 00 68 2A 54 E7 10 3A ED 6B 58 2A ED AC 50 2A 7D 77 59 D6 EC E7 40 2A ED 20 58 2A 55 29 10 3A EC 00 58 28 ED 8C 50 28 7C FA 05 2E 55 6B 10 3A 7C 06 D5 2E 7D 87 D5 2E 7D A9 D5 2E 7D 2B D5 2E 42 00 FF 00
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 25, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 25, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 25
-PASS: gsl_fft_complex_forward with signal_noise, n = 25, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 25, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 25, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 25, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 25, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 25, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 25, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 25, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 25, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 25, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 25
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 25, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 25, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 25, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 25, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 25, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 25, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 25, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 25, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 25, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 25, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 25
-PASS: gsl_fft_real with signal_real_noise, n = 25, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 25, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 25, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 25, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 25
-PASS: gsl_fft_real_float with signal_real_noise, n = 25, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 25, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 25, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 25, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 25
-PASS: gsl_fft_complex_forward with signal_noise, n = 25, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 25, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 25, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 25, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 25, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 25, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 25, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 25, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 25, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 25, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 25
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 25, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 25, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 25, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 25, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 25, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 25, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 25, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 25, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 25, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 25, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 25
-PASS: gsl_fft_real with signal_real_noise, n = 25, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 25, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 25, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 25, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 25
-PASS: gsl_fft_real_float with signal_real_noise, n = 25, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 25, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 25, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 26, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 26
-PASS: gsl_fft_complex_forward with signal_noise, n = 26, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 26, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 26, stride = 1
-. 0 FE0D040 20
-. 83 FE 0F 68 FC 1F 00 00 C8 5F 00 00 FD AD 00 B2 40 81 0E AC
-
-. 0 FE0DEFC 8
-. 81 3E 0F BC 4B FF F1 58
-
-. 0 FE0D058 24
-. C8 A9 00 00 FC 1F 69 7A C8 21 00 10 FD 21 00 2A FF 01 48 00 41 9A 00 D8
-
-PASS: gsl_fft_complex_forward with signal_pulse, n = 26, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 26, stride = 1
-. 0 FE0D054 28
-. 81 3E 0F A0 C8 A9 00 00 FC 1F 69 7A C8 21 00 10 FD 21 00 2A FF 01 48 00 41 9A 00 D8
-
-PASS: gsl_fft_complex_forward with signal_exp, n = 26, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 26, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 26
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 26, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 26, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 26, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 26, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 26, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 26, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 26, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 26
-PASS: gsl_fft_real with signal_real_noise, n = 26, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 26, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 26, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 26, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 26
-PASS: gsl_fft_real_float with signal_real_noise, n = 26, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 26, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 26, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 26, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 26
-PASS: gsl_fft_complex_forward with signal_noise, n = 26, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 26, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 26, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 26, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 26, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 26, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 26, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 26, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 26, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 26, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 26
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 26, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 26, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 26, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 26, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 26, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 26, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 26, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 26, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 26, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 26, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 26
-PASS: gsl_fft_real with signal_real_noise, n = 26, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 26, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 26, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 26, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 26
-PASS: gsl_fft_real_float with signal_real_noise, n = 26, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 26, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 26, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 26, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 26
-PASS: gsl_fft_complex_forward with signal_noise, n = 26, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 26, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 26, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 26, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 26, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 26, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 26, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 26, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 26, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 26, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 26
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 26, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 26, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 26, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 26, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 26, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 26, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 26, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 26, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 26, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 26, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 26
-PASS: gsl_fft_real with signal_real_noise, n = 26, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 26, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 26, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 26, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 26
-PASS: gsl_fft_real_float with signal_real_noise, n = 26, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 26, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 26, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 27, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 27
-PASS: gsl_fft_complex_forward with signal_noise, n = 27, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 27, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 27, stride = 1
-. 0 FE0DEEC 8
-. 81 3E 0F B8 4B FF FF 04
-
-. 0 FE0DDF4 16
-. CB A9 00 00 FF 7F 07 72 FC 06 D8 28 4B FF F2 00
-
-PASS: gsl_fft_complex_forward with signal_pulse, n = 27, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 27, stride = 1
-. 0 FE0EBD0 24
-. 81 3E 10 10 C9 29 00 00 FC 1F 22 7A FD 81 00 2A FF 0C 08 00 41 9A 00 60
-
-. 0 FE0CFF4 24
-. 81 3E 0F 9C C8 09 00 00 FC 1F 30 3A FF 81 00 2A FF 1C 08 00 41 BA FA 50
-
-PASS: gsl_fft_complex_forward with signal_exp, n = 27, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 27, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 27
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 27, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 27, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 27, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 27, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 27, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 27, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 27, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 27
-PASS: gsl_fft_real with signal_real_noise, n = 27, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 27, stride = 1
-. 0 1000D3D4 316
-. 1D 03 00 03 7C C5 FA 14 7C 63 DA 14 7D 64 40 50 7D 08 22 14 7D 6B CA 14 39 08 FF FF 39 6B FF FF 7C 19 42 14 55 6A 18 38 54 09 18 38 39 4A 00 08 39 29 00 08 7D 4A E1 D6 55 07 18 38 38 E7 00 08 7D 29 E1 D6 7D 4A EC AE 54 CA 18 38 FD 40 50 50 39 4A 00 08 7C 1C 01 D6 7D 69 EC AE 54 A9 18 38 FC 8B 50 2A 39 29 00 08 FD 6B 50 28 7D 7C 59 D6 54 00 18 38 7D 1D 04 AE FD A4 07 72 FD 6B 07 B2 55 6B 18 38 7C E7 E1 D6 7C 0B EC AE FD 88 00 28 7D 1C 41 D6 FD 08 00 2A 7C C7 EC AE 7C E6 FA 14 FD 8C 07 B2 54 EB 18 38 39 6B 00 08 FD A6 68 28 55 08 18 38 FC 08 07 72 7D 28 EC AE 7C 17 29 D6 7C A5 DA 14 FD 4D 60 28 FD AD 60 2A FC 09 00 28 FC A3 02 B2 7C D7 31 D6 54 00 18 38 FC E1 03 72 FD 42 02 B2 7C F7 39 D6 54 C6 18 38 FD BF 03 72 FD 80 58 2A 7D 29 B9 D6 FC 00 58 28 54 E7 18 38 FD 29 40 2A FC A2 2B 3A 7D 4A B9 D6 FC FF 38 3A 7D 3A 05 AE FC 01 68 38 7D 6B B9 D6 FD 83 53 38 FC C6 20 2A 7C C9 D5 AE 7C 06 D5 AE 7C EA D5 AE 7D 87 D5 AE 7C AB D5 AE 42 00 FE C8
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 27, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 27, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 27
-PASS: gsl_fft_real_float with signal_real_noise, n = 27, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 27, stride = 1
-. 0 1000F5A0 340
-. 1D 1D 00 03 7C C4 CA 14 7C A6 CA 14 7F BD DA 14 7D 63 40 50 7D 08 1A 14 7D 6B C2 14 39 08 FF FF 39 6B FF FF 7C 18 42 14 55 6A 10 3A 54 09 10 3A 39 4A 00 04 39 29 00 04 7D 4A E1 D6 55 07 10 3A 38 E7 00 04 7D 29 E1 D6 7D 2A FC 2E 54 CA 10 3A FD 20 48 50 39 4A 00 04 7C 1C 01 D6 7D 49 FC 2E 54 89 10 3A EC 8A 48 2A 39 29 00 04 ED 4A 48 28 7D 7C 59 D6 54 00 10 3A 7D 7F 04 2E FD A0 20 90 ED 4A 07 72 55 6B 10 3A 7C E7 E1 D6 7C EB FC 2E FD AD 07 B2 54 AB 10 3A EC AB 38 2A 39 6B 00 04 7D 1C 41 D6 7C C7 FC 2E ED 6B 38 28 FD 80 28 90 FC 00 30 90 55 08 10 3A ED 6B 07 72 7D 08 FC 2E FD 8C 07 B2 7C 17 21 D6 7C 84 DA 14 FC 00 68 28 FD A0 40 90 EC C6 20 2A FC 00 00 18 7C D7 31 D6 FD AD 60 28 54 00 10 3A ED 08 28 2A ED 80 58 28 FD A0 68 18 7C B7 29 D6 EC 00 58 2A 54 C6 10 3A EC E1 03 32 7D 1A 05 2E ED 2D 50 2A ED 63 00 32 7D 29 B9 D6 ED AD 50 28 54 A5 10 3A EC 02 00 32 ED 9F 03 32 7D 4A B9 D6 ED 62 5B 7A EC FF 3A 7A 7C C9 D5 2E ED A3 03 78 ED 21 62 78 7D 6B B9 D6 7D A6 D5 2E 7D 6A D5 2E 7D 25 D5 2E 7C EB D5 2E 42 00 FE B0
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 27, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 27, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 27
-PASS: gsl_fft_complex_forward with signal_noise, n = 27, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 27, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 27, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 27, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 27, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 27, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 27, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 27, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 27, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 27, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 27
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 27, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 27, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 27, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 27, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 27, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 27, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 27, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 27, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 27, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 27, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 27
-PASS: gsl_fft_real with signal_real_noise, n = 27, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 27, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 27, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 27, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 27
-PASS: gsl_fft_real_float with signal_real_noise, n = 27, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 27, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 27, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 27, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 27
-PASS: gsl_fft_complex_forward with signal_noise, n = 27, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 27, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 27, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 27, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 27, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 27, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 27, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 27, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 27, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 27, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 27
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 27, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 27, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 27, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 27, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 27, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 27, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 27, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 27, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 27, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 27, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 27
-PASS: gsl_fft_real with signal_real_noise, n = 27, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 27, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 27, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 27, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 27
-PASS: gsl_fft_real_float with signal_real_noise, n = 27, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 27, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 27, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 28, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 28
-PASS: gsl_fft_complex_forward with signal_noise, n = 28, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 28, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 28, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 28, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 28, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 28, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 28, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 28
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 28, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 28, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 28, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 28, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 28, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 28, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 28, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 28
-PASS: gsl_fft_real with signal_real_noise, n = 28, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 28, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 28, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 28, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 28
-PASS: gsl_fft_real_float with signal_real_noise, n = 28, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 28, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 28, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 28, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 28
-PASS: gsl_fft_complex_forward with signal_noise, n = 28, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 28, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 28, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 28, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 28, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 28, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 28, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 28, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 28, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 28, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 28
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 28, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 28, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 28, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 28, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 28, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 28, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 28, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 28, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 28, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 28, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 28
-PASS: gsl_fft_real with signal_real_noise, n = 28, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 28, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 28, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 28, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 28
-PASS: gsl_fft_real_float with signal_real_noise, n = 28, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 28, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 28, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 28, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 28
-PASS: gsl_fft_complex_forward with signal_noise, n = 28, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 28, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 28, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 28, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 28, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 28, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 28, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 28, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 28, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 28, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 28
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 28, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 28, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 28, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 28, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 28, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 28, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 28, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 28, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 28, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 28, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 28
-PASS: gsl_fft_real with signal_real_noise, n = 28, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 28, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 28, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 28, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 28
-PASS: gsl_fft_real_float with signal_real_noise, n = 28, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 28, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 28, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 29, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 29
-PASS: gsl_fft_complex_forward with signal_noise, n = 29, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 29, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 29, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 29, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 29, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 29, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 29, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 29
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 29, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 29, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 29, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 29, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 29, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 29, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 29, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 29
-PASS: gsl_fft_real with signal_real_noise, n = 29, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 29, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 29, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 29, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 29
-PASS: gsl_fft_real_float with signal_real_noise, n = 29, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 29, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 29, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 29, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 29
-PASS: gsl_fft_complex_forward with signal_noise, n = 29, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 29, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 29, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 29, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 29, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 29, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 29, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 29, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 29, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 29, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 29
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 29, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 29, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 29, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 29, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 29, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 29, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 29, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 29, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 29, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 29, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 29
-PASS: gsl_fft_real with signal_real_noise, n = 29, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 29, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 29, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 29, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 29
-PASS: gsl_fft_real_float with signal_real_noise, n = 29, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 29, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 29, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 29, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 29
-PASS: gsl_fft_complex_forward with signal_noise, n = 29, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 29, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 29, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 29, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 29, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 29, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 29, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 29, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 29, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 29, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 29
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 29, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 29, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 29, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 29, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 29, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 29, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 29, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 29, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 29, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 29, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 29
-PASS: gsl_fft_real with signal_real_noise, n = 29, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 29, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 29, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 29, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 29
-PASS: gsl_fft_real_float with signal_real_noise, n = 29, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 29, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 29, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 30, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 30
-PASS: gsl_fft_complex_forward with signal_noise, n = 30, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 30, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 30, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 30, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 30, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 30, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 30, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 30
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 30, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 30, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 30, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 30, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 30, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 30, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 30, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 30
-PASS: gsl_fft_real with signal_real_noise, n = 30, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 30, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 30, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 30, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 30
-PASS: gsl_fft_real_float with signal_real_noise, n = 30, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 30, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 30, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 30, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 30
-PASS: gsl_fft_complex_forward with signal_noise, n = 30, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 30, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 30, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 30, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 30, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 30, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 30, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 30, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 30, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 30, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 30
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 30, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 30, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 30, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 30, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 30, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 30, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 30, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 30, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 30, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 30, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 30
-PASS: gsl_fft_real with signal_real_noise, n = 30, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 30, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 30, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 30, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 30
-PASS: gsl_fft_real_float with signal_real_noise, n = 30, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 30, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 30, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 30, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 30
-PASS: gsl_fft_complex_forward with signal_noise, n = 30, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 30, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 30, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 30, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 30, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 30, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 30, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 30, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 30, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 30, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 30
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 30, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 30, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 30, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 30, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 30, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 30, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 30, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 30, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 30, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 30, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 30
-PASS: gsl_fft_real with signal_real_noise, n = 30, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 30, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 30, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 30, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 30
-PASS: gsl_fft_real_float with signal_real_noise, n = 30, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 30, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 30, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 31, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 31
-PASS: gsl_fft_complex_forward with signal_noise, n = 31, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 31, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 31, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 31, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 31, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 31, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 31, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 31
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 31, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 31, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 31, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 31, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 31, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 31, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 31, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 31
-PASS: gsl_fft_real with signal_real_noise, n = 31, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 31, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 31, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 31, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 31
-PASS: gsl_fft_real_float with signal_real_noise, n = 31, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 31, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 31, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 31, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 31
-PASS: gsl_fft_complex_forward with signal_noise, n = 31, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 31, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 31, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 31, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 31, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 31, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 31, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 31, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 31, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 31, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 31
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 31, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 31, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 31, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 31, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 31, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 31, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 31, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 31, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 31, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 31, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 31
-PASS: gsl_fft_real with signal_real_noise, n = 31, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 31, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 31, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 31, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 31
-PASS: gsl_fft_real_float with signal_real_noise, n = 31, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 31, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 31, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 31, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 31
-PASS: gsl_fft_complex_forward with signal_noise, n = 31, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 31, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 31, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 31, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 31, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 31, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 31, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 31, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 31, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 31, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 31
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 31, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 31, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 31, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 31, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 31, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 31, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 31, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 31, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 31, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 31, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 31
-PASS: gsl_fft_real with signal_real_noise, n = 31, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 31, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 31, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 31, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 31
-PASS: gsl_fft_real_float with signal_real_noise, n = 31, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 31, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 31, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 32, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 32
-PASS: gsl_fft_complex_forward with signal_noise, n = 32, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 32, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 32, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 32, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 32, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 32, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 32, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 32
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 32, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 32, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 32, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 32, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 32, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 32, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 32, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 32
-. 0 10012298 388
-. 7C 1B 72 14 57 66 18 38 7D 60 72 14 54 09 18 38 7D 0B 72 14 39 29 00 08 55 0A 18 38 7D 29 E9 D6 39 4A 00 08 55 67 18 38 38 E7 00 08 7D 4A E9 D6 7D 49 FC AE 38 C6 00 08 FD 21 02 B2 7C B7 E2 14 7C 97 1A 14 7C 1D 01 D6 7C AA FC AE 54 69 18 38 FD 7C 01 72 57 8A 18 38 39 4A 00 08 7D 7D 59 D6 54 00 18 38 7D 9F 04 AE 39 29 00 08 FC 01 03 32 7D 1D 41 D6 55 6B 18 38 7C EB FC AE FD 82 4B 38 FC DE 01 F2 7C E7 E9 D6 55 08 18 38 7D 08 FC AE FD 42 02 BA 54 88 18 38 FC 9C 02 32 39 08 00 08 7D A7 FC AE 7C C6 E9 D6 FD 1D 5A 38 54 A7 18 38 38 E7 00 08 FD 3E 03 72 7C 1D D9 D6 7D 66 FC AE FD BF 33 7A 7F 7B D2 14 FC BD 21 7A 54 00 18 38 7D 78 19 D6 FC CC 40 28 7C 1F 04 AE FC FF 49 F8 7C 63 8A 14 FC 8B 68 28 7C 18 E1 D6 FD 2A 28 28 55 6B 18 38 FD 6B 68 2A 7F 9C 8A 14 FC C0 30 50 FD 4A 28 2A 7C B8 29 D6 FD A0 38 28 54 00 18 38 FC 00 38 2A FC 64 30 28 FC AB 50 28 7C 98 21 D6 FD 20 48 50 54 A5 18 38 FD 8C 40 2A FC A0 28 50 7D 4A C1 D6 FC ED 48 2A FD 00 60 28 54 84 18 38 FC 60 18 50 FC 00 60 2A 7C E7 C1 D6 FD 6B 50 2A FD AD 48 28 FC 84 30 2A 7C 19 05 AE 7D 6A CD AE 7D 08 C1 D6 7D A5 CD AE 7C 87 CD AE 7D 04 CD AE 7D 29 C1 D6 7C A8 CD AE 7C EB CD AE 7C 69 CD AE 42 00 FE 80
-
-. 0 10012464 168
-. 7C 05 72 14 7D 44 32 14 7D 60 72 14 7C 1D 01 D6 7D 2B 72 14 55 48 18 38 54 C7 18 38 7D 3D 49 D6 54 00 18 38 7C 1F 04 AE 38 E7 00 08 39 08 00 08 7D 7D 59 D6 55 29 18 38 7D A9 FC AE FD 80 68 2A 7C 1D 29 D6 FC 00 68 28 55 6B 18 38 7D 4B FC AE FD 8C 02 32 7C A5 D2 14 FC 00 02 32 54 00 18 38 7D BF 04 AE 7D 58 51 D6 FD 60 50 50 FD 4A 60 28 FD 2D 00 28 7C 18 31 D6 FD 6B 60 28 FD AD 00 2A 55 4A 18 38 7C C6 8A 14 7C E7 C1 D6 54 00 18 38 7D B9 05 AE 7D 08 C1 D6 7D 67 CD AE 7D 2A CD AE 7D 48 CD AE 42 00 FF 5C
-
-PASS: gsl_fft_real with signal_real_noise, n = 32, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 32, stride = 1
-. 0 1000D900 180
-. 7D 23 2A 14 54 AB 18 38 55 2A 18 38 7C 1C 29 D6 39 6B 00 08 81 81 00 30 39 4A 00 08 7D 04 62 14 7D 3C 49 D6 54 00 18 38 7D 9D 04 AE 7C E8 62 14 7C C7 62 14 7C A5 FA 14 7D 6B E1 D6 55 29 18 38 7D A9 EC AE FD 4C 68 28 7D 4A E1 D6 7D 6B EC AE FD 8C 68 2A FD 4A 02 72 7C 0A EC AE 7C 17 21 D6 FD 8C 60 2A 7C 84 DA 14 FD AB 00 2A FC 00 58 28 7D 17 41 D6 54 00 18 38 FD AD 02 72 7D 9A 05 AE FC 00 00 2A 7C F7 39 D6 55 08 18 38 FD 6A 68 2A FD 4A 68 28 7C D7 31 D6 FD 60 58 50 54 E7 18 38 7D 48 D5 AE 7C 07 D5 AE 54 C6 18 38 7D 66 D5 AE 42 00 FF 50
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 32, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 32, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 32
-. 0 100142F4 388
-. 7C 1B 72 14 57 66 10 3A 7D 60 72 14 54 09 10 3A 7D 0B 72 14 39 29 00 04 55 0A 10 3A 7D 29 F9 D6 39 4A 00 04 55 67 10 3A 38 E7 00 04 7D 4A F9 D6 7D 49 EC 2E 38 C6 00 04 ED 21 02 B2 7C B7 E2 14 7C 97 1A 14 7C 1F 01 D6 7C EA EC 2E 57 89 10 3A EC 9C 01 F2 54 6A 10 3A 39 29 00 04 7D 7F 59 D6 54 00 10 3A 7D 7D 04 2E 39 4A 00 04 ED 22 4A F8 7D 1F 41 D6 55 6B 10 3A 7D 0B EC 2E ED 61 02 F2 54 AB 10 3A ED 9E 02 32 39 6B 00 04 7C E7 F9 D6 55 08 10 3A 7C 08 EC 2E ED 42 5A BA 54 88 10 3A EC 9D 20 38 39 08 00 04 EC 1C 00 32 7C C6 F9 D6 7D A7 EC 2E EC A9 20 28 ED 9F 63 7A 7C 1F D9 D6 EC FD 01 FA ED BE 03 72 7D 66 EC 2E FC A0 28 50 7F 7B D2 14 EC 6B 60 28 EC CA 38 28 54 00 10 3A ED 1F 6A 38 7C 1D 04 2E ED 4A 38 2A 7C 18 E1 D6 ED 6B 60 2A 7F 9C 8A 14 ED A0 40 28 ED 29 20 2A EC E3 28 28 7C F8 19 D6 ED 8B 50 28 54 00 10 3A FC C0 30 50 7C 63 8A 14 EC 00 40 2A 7C B8 29 D6 FD 80 60 50 EC 8D 30 2A 54 E7 10 3A ED 00 48 28 FC E0 38 50 7C 98 21 D6 EC 00 48 2A ED 6B 50 2A 54 A5 10 3A ED AD 30 28 EC 63 28 2A 7C 19 05 2E 7D 29 C1 D6 54 84 10 3A 7D 6B C1 D6 7D 69 CD 2E 7D A5 CD 2E 7D 08 C1 D6 7C 6B CD 2E 7D 04 CD 2E 7D 4A C1 D6 7D 88 CD 2E 7C 87 CD 2E 7C EA CD 2E 42 00 FE 80
-
-. 0 100144C0 176
-. 7C 05 72 14 7D 44 32 14 7D 60 72 14 7C 1F 01 D6 7D 2B 72 14 55 47 10 3A 54 C8 10 3A 7D 3F 49 D6 54 00 10 3A 7D BD 04 2E 39 08 00 04 38 E7 00 04 55 29 10 3A 7D 7F 59 D6 7D 89 EC 2E EC 0D 60 2A ED AD 60 28 7C 1F 29 D6 55 6B 10 3A 7D 6B EC 2E 7C A5 D2 14 FD 40 58 50 54 00 10 3A FC 00 02 32 7D 9D 04 2E 7D 38 31 D6 7C C6 8A 14 FD AD 02 32 FC 00 00 18 7D 58 51 D6 55 29 10 3A FD A0 68 18 ED 6B 00 28 ED 4A 00 28 7D 08 C1 D6 ED 2C 68 28 ED 8C 68 2A 55 4A 10 3A 7C E7 C1 D6 7D 89 CD 2E 7D 48 CD 2E 7D 2A CD 2E 7D 67 CD 2E 42 00 FF 54
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 32, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 32, stride = 1
-. 0 1000FAE4 188
-. 7D 23 2A 14 54 AB 10 3A 55 2A 10 3A 7C 1C 29 D6 39 6B 00 04 81 81 00 30 39 4A 00 04 7D 04 62 14 7D 3C 49 D6 54 00 10 3A 7D 5F 04 2E 7C E8 62 14 7C C7 62 14 7C A5 EA 14 7D 6B E1 D6 55 29 10 3A 7C 09 FC 2E ED AA 00 28 7D 4A E1 D6 7D 6B FC 2E ED 4A 00 2A 7D 8A FC 2E 7C 17 21 D6 FD AD 02 72 7C 84 DA 14 EC 0B 60 2A ED 8C 58 28 7D 17 41 D6 FD A0 68 18 54 00 10 3A ED 4A 50 2A 7C F7 39 D6 ED 8C 60 2A FC 00 02 72 55 08 10 3A 7D 5A 05 2E 7C D7 31 D6 54 E7 10 3A FC 00 00 18 ED 6D 00 2A 54 C6 10 3A ED AD 00 28 FD 60 58 50 7D A8 D5 2E 7D 87 D5 2E 7D 66 D5 2E 42 00 FF 48
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 32, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 32, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 32
-PASS: gsl_fft_complex_forward with signal_noise, n = 32, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 32, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 32, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 32, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 32, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 32, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 32, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 32, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 32, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 32, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 32
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 32, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 32, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 32, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 32, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 32, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 32, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 32, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 32, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 32, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 32, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 32
-PASS: gsl_fft_real with signal_real_noise, n = 32, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 32, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 32, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 32, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 32
-PASS: gsl_fft_real_float with signal_real_noise, n = 32, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 32, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 32, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 32, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 32
-PASS: gsl_fft_complex_forward with signal_noise, n = 32, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 32, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 32, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 32, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 32, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 32, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 32, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 32, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 32, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 32, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 32
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 32, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 32, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 32, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 32, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 32, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 32, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 32, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 32, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 32, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 32, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 32
-PASS: gsl_fft_real with signal_real_noise, n = 32, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 32, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 32, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 32, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 32
-PASS: gsl_fft_real_float with signal_real_noise, n = 32, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 32, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 32, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 33, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 33
-PASS: gsl_fft_complex_forward with signal_noise, n = 33, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 33, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 33, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 33, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 33, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 33, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 33, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 33
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 33, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 33, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 33, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 33, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 33, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 33, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 33, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 33
-PASS: gsl_fft_real with signal_real_noise, n = 33, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 33, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 33, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 33, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 33
-PASS: gsl_fft_real_float with signal_real_noise, n = 33, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 33, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 33, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 33, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 33
-PASS: gsl_fft_complex_forward with signal_noise, n = 33, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 33, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 33, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 33, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 33, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 33, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 33, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 33, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 33, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 33, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 33
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 33, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 33, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 33, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 33, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 33, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 33, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 33, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 33, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 33, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 33, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 33
-PASS: gsl_fft_real with signal_real_noise, n = 33, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 33, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 33, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 33, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 33
-PASS: gsl_fft_real_float with signal_real_noise, n = 33, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 33, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 33, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 33, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 33
-PASS: gsl_fft_complex_forward with signal_noise, n = 33, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 33, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 33, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 33, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 33, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 33, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 33, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 33, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 33, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 33, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 33
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 33, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 33, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 33, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 33, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 33, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 33, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 33, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 33, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 33, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 33, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 33
-PASS: gsl_fft_real with signal_real_noise, n = 33, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 33, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 33, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 33, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 33
-PASS: gsl_fft_real_float with signal_real_noise, n = 33, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 33, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 33, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 34, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 34
-PASS: gsl_fft_complex_forward with signal_noise, n = 34, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 34, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 34, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 34, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 34, stride = 1
-. 0 FE0DA98 20
-. 81 3E 0F 9C C9 69 00 00 FC BF 02 F2 FC 04 28 28 4B FF FA A4
-
-PASS: gsl_fft_complex_forward with signal_exp, n = 34, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 34, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 34
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 34, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 34, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 34, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 34, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 34, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 34, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 34, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 34
-PASS: gsl_fft_real with signal_real_noise, n = 34, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 34, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 34, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 34, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 34
-PASS: gsl_fft_real_float with signal_real_noise, n = 34, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 34, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 34, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 34, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 34
-PASS: gsl_fft_complex_forward with signal_noise, n = 34, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 34, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 34, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 34, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 34, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 34, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 34, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 34, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 34, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 34, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 34
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 34, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 34, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 34, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 34, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 34, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 34, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 34, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 34, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 34, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 34, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 34
-PASS: gsl_fft_real with signal_real_noise, n = 34, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 34, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 34, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 34, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 34
-PASS: gsl_fft_real_float with signal_real_noise, n = 34, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 34, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 34, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 34, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 34
-PASS: gsl_fft_complex_forward with signal_noise, n = 34, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 34, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 34, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 34, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 34, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 34, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 34, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 34, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 34, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 34, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 34
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 34, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 34, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 34, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 34, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 34, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 34, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 34, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 34, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 34, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 34, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 34
-PASS: gsl_fft_real with signal_real_noise, n = 34, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 34, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 34, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 34, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 34
-PASS: gsl_fft_real_float with signal_real_noise, n = 34, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 34, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 34, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 35, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 35
-PASS: gsl_fft_complex_forward with signal_noise, n = 35, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 35, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 35, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 35, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 35, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 35, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 35, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 35
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 35, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 35, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 35, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 35, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 35, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 35, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 35, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 35
-. 0 10011100 12
-. 3A 40 00 00 7F 92 80 40 40 9C 0A 80
-
-PASS: gsl_fft_real with signal_real_noise, n = 35, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 35, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 35, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 35, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 35
-. 0 100130F0 12
-. 3A 40 00 00 7F 92 80 40 40 9C 0A BC
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 35, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 35, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 35, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 35, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 35
-PASS: gsl_fft_complex_forward with signal_noise, n = 35, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 35, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 35, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 35, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 35, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 35, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 35, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 35, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 35, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 35, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 35
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 35, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 35, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 35, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 35, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 35, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 35, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 35, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 35, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 35, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 35, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 35
-PASS: gsl_fft_real with signal_real_noise, n = 35, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 35, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 35, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 35, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 35
-PASS: gsl_fft_real_float with signal_real_noise, n = 35, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 35, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 35, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 35, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 35
-PASS: gsl_fft_complex_forward with signal_noise, n = 35, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 35, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 35, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 35, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 35, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 35, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 35, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 35, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 35, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 35, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 35
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 35, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 35, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 35, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 35, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 35, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 35, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 35, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 35, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 35, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 35, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 35
-PASS: gsl_fft_real with signal_real_noise, n = 35, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 35, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 35, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 35, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 35
-PASS: gsl_fft_real_float with signal_real_noise, n = 35, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 35, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 35, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 36, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 36
-. 0 10008218 400
-. 7C C8 02 A6 80 E1 01 40 7C 0C AA 14 7D 71 62 14 7D 07 62 14 7C 00 C9 D6 7D 46 62 14 7C 9B FC AE 7D 3B FA 14 CA E1 00 40 C8 29 00 08 7C EE 62 14 7D 6B C9 D6 54 00 20 36 7D 20 FA 14 7C FF 04 AE C9 09 00 08 7F BC D2 14 CB 01 00 48 39 8C 00 01 7D 4A C9 D6 55 6B 20 36 7D 2B FC AE 7C AB FA 14 C9 65 00 08 7E 94 CA 14 80 01 01 48 7F 7B 92 14 7D 08 C9 D6 55 4A 20 36 7C 0A FC AE 7C CA FA 14 C9 A6 00 08 7D 40 BA 14 FC C9 00 2A 80 C1 01 4C 55 08 20 36 7C E7 C9 D6 7D 48 FC AE 7D 28 FA 14 C9 89 00 08 FC AB 68 2A FC 6A 38 2A 81 01 01 44 FC 4C 40 2A 54 E7 20 36 FD 6B 68 28 7F 87 FC AE FD 4A 38 28 7D 27 FA 14 FD 8C 40 28 CB A9 00 08 FC E6 05 32 7D 68 BA 14 7D 37 B2 14 7D 06 BA 14 FD A3 05 32 7C 10 BA 14 7D 29 C1 D6 3A F7 00 01 FD 29 00 28 FD 05 05 32 FC 02 05 32 7D 6B C1 D6 55 29 20 36 FD 75 02 F2 7C E9 D2 14 FD 95 03 32 7D 4A C1 D6 55 6B 20 36 FD 35 02 72 7C CB D2 14 FD 55 02 B2 7D 08 C1 D6 55 4A 20 36 FC E4 38 28 7C AA D2 14 FD BC 68 28 FD 01 40 28 7C 00 C1 D6 FC 1D 00 28 55 08 20 36 FC 84 30 2A 7C 88 D2 14 FC C7 58 2A FF 9C 18 2A 54 00 20 36 FC 6D 60 2A 7C 60 D2 14 FC 21 28 2A FF BD 10 2A FC A8 48 28 FC 40 50 28 FC E7 58 28 FD AD 60 28 FC 00 50 2A FF E6 18 28 FD 08 48 2A FC C6 18 2A FF C5 10 28
-
-. 0 100083A8 200
-. FC A5 10 2A C8 41 00 48 FD 87 68 28 FD 68 00 28 FC 42 01 B2 FD 08 00 2A C8 01 00 40 FD 24 E0 28 FD 41 E8 28 D8 41 01 98 FC E7 68 2A C9 A1 00 50 FC 00 03 32 FF 6D 07 F2 FF 57 02 F2 D8 01 01 90 FF 38 01 72 FE CD 07 B2 C9 A1 00 38 FC 6E 02 72 FC 52 01 F2 FF 0E 02 B2 FE F2 02 32 FD 6D 02 FA C8 01 01 98 FD 4F 1A BA FC B0 01 7A FD 13 12 3A FF D1 DF BA FD 8D D3 38 FC D0 C9 B8 FD 2F C2 78 FC F3 B9 F8 FF F1 B7 F8 FC 84 E0 2A FC 21 E8 2A 7C 9C D5 AE 7F 9C 9A 14 D8 3D 00 08 7D 89 D5 AE D9 67 00 08 7C CB D5 AE D8 A6 00 08 7D 2A D5 AE D9 45 00 08 7C E8 D5 AE D9 04 00 08 7F FA 05 AE DB C3 00 08 42 00 FD AC
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 36, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 36, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 36, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 36, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 36, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 36, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 36, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 36
-. 0 1000B09C 400
-. 7C E8 02 A6 7C 0C AA 14 7D 71 62 14 7D 4E 62 14 7C 00 C9 D6 81 21 00 F0 7D 07 62 14 7C 9B FC 2E 7C E9 62 14 7D 3B FA 14 7D 6B C9 D6 54 00 18 38 C0 69 00 04 7D 20 FA 14 C1 09 00 04 39 8C 00 01 7C FF 04 2E 7C 17 B2 14 7D 4A C9 D6 55 6B 18 38 7C AB FA 14 7D 2B FC 2E C1 65 00 04 7E 94 CA 14 7F 7B 92 14 7D 08 C9 D6 55 4A 18 38 7C CA FA 14 7C 0A FC 2E C1 A6 00 04 EC C9 00 2A 81 41 00 F4 55 08 18 38 7C E7 C9 D6 7D 28 FA 14 7D 48 FC 2E C1 89 00 04 EC AB 68 2A EC 4A 38 2A 81 01 00 FC EC 2C 40 2A 54 E7 18 38 7D 27 FA 14 ED 29 00 28 ED 6B 68 28 7F E7 FC 2E ED 4A 38 28 C3 C9 00 04 ED 8C 40 28 80 E1 00 F8 ED 06 05 32 7D 2A BA 14 EC E5 05 32 7D 67 BA 14 EC 02 05 32 7D 48 BA 14 ED A1 05 32 7D 10 BA 14 EC E3 38 28 7C 00 C1 D6 ED 04 40 28 7C FC D2 14 ED 35 02 72 3A F7 00 01 ED 75 02 F2 EC 1F 00 28 7D 29 C1 D6 ED BE 68 28 54 00 18 38 ED 55 02 B2 7C C0 D2 14 ED 95 03 32 EC 84 30 2A 7D 6B C1 D6 EC C8 58 2A 55 29 18 38 EC 63 28 2A 7C A9 D2 14 EC A7 48 28 EF FF 10 2A 7D 4A C1 D6 EC 40 60 2A 55 6B 18 38 EF DE 08 2A 7C 8B D2 14 EC 2D 50 28 ED 08 58 28 7D 08 C1 D6 ED AD 50 2A 55 4A 18 38 EC E7 48 2A 7C 6A D2 14 EC 00 60 28 EF 85 08 28 55 08 18 38 ED 67 68 28 7F A8 D2 14 ED 88 00 28 ED 08 00 2A C0 01 00 40
-
-. 0 1000B22C 192
-. EF A6 10 28 EC E7 68 2A EC C6 10 2A C0 41 00 48 EC A5 08 2A C0 21 00 44 EF 60 03 32 EE E0 02 F2 C0 01 00 48 ED 24 F8 28 ED 43 F0 28 EC 00 07 32 EF 41 01 B2 ED A1 01 72 EC 2F 01 F2 D0 01 01 48 EF 02 07 72 C0 01 00 3C EE D1 02 72 EF 2F 02 32 EC 51 02 B2 ED 10 0A 38 C0 21 01 48 ED 60 DA FA EC B3 D1 7A ED 52 B2 BA EC F0 C9 FA EF 8E C7 3A ED 80 BB 38 EC D3 69 B8 ED 32 12 78 EF AE 0F 78 EC 84 F8 2A EC 63 F0 2A 7C 9C D5 2E 7F 9C 9A 14 D0 67 00 04 7D 9A 05 2E D1 66 00 04 7C C9 D5 2E D0 A5 00 04 7D 2B D5 2E D1 44 00 04 7D 0A D5 2E D0 E3 00 04 7F A8 D5 2E D3 9D 00 04 42 00 FD B4
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 36, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 36, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 36, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 36, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 36, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 36, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 36, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 36
-PASS: gsl_fft_real with signal_real_noise, n = 36, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 36, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 36, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 36, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 36
-PASS: gsl_fft_real_float with signal_real_noise, n = 36, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 36, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 36, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 36, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 36
-PASS: gsl_fft_complex_forward with signal_noise, n = 36, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 36, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 36, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 36, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 36, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 36, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 36, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 36, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 36, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 36, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 36
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 36, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 36, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 36, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 36, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 36, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 36, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 36, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 36, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 36, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 36, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 36
-PASS: gsl_fft_real with signal_real_noise, n = 36, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 36, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 36, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 36, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 36
-PASS: gsl_fft_real_float with signal_real_noise, n = 36, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 36, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 36, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 36, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 36
-PASS: gsl_fft_complex_forward with signal_noise, n = 36, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 36, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 36, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 36, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 36, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 36, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 36, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 36, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 36, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 36, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 36
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 36, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 36, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 36, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 36, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 36, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 36, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 36, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 36, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 36, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 36, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 36
-PASS: gsl_fft_real with signal_real_noise, n = 36, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 36, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 36, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 36, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 36
-PASS: gsl_fft_real_float with signal_real_noise, n = 36, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 36, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 36, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 37, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 37
-PASS: gsl_fft_complex_forward with signal_noise, n = 37, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 37, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 37, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 37, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 37, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 37, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 37, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 37
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 37, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 37, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 37, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 37, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 37, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 37, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 37, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 37
-PASS: gsl_fft_real with signal_real_noise, n = 37, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 37, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 37, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 37, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 37
-PASS: gsl_fft_real_float with signal_real_noise, n = 37, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 37, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 37, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 37, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 37
-PASS: gsl_fft_complex_forward with signal_noise, n = 37, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 37, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 37, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 37, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 37, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 37, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 37, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 37, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 37, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 37, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 37
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 37, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 37, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 37, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 37, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 37, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 37, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 37, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 37, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 37, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 37, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 37
-PASS: gsl_fft_real with signal_real_noise, n = 37, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 37, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 37, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 37, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 37
-PASS: gsl_fft_real_float with signal_real_noise, n = 37, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 37, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 37, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 37, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 37
-PASS: gsl_fft_complex_forward with signal_noise, n = 37, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 37, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 37, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 37, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 37, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 37, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 37, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 37, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 37, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 37, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 37
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 37, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 37, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 37, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 37, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 37, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 37, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 37, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 37, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 37, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 37, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 37
-PASS: gsl_fft_real with signal_real_noise, n = 37, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 37, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 37, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 37, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 37
-PASS: gsl_fft_real_float with signal_real_noise, n = 37, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 37, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 37, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 38, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 38
-PASS: gsl_fft_complex_forward with signal_noise, n = 38, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 38, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 38, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 38, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 38, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 38, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 38, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 38
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 38, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 38, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 38, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 38, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 38, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 38, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 38, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 38
-PASS: gsl_fft_real with signal_real_noise, n = 38, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 38, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 38, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 38, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 38
-PASS: gsl_fft_real_float with signal_real_noise, n = 38, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 38, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 38, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 38, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 38
-PASS: gsl_fft_complex_forward with signal_noise, n = 38, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 38, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 38, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 38, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 38, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 38, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 38, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 38, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 38, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 38, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 38
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 38, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 38, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 38, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 38, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 38, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 38, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 38, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 38, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 38, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 38, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 38
-PASS: gsl_fft_real with signal_real_noise, n = 38, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 38, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 38, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 38, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 38
-PASS: gsl_fft_real_float with signal_real_noise, n = 38, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 38, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 38, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 38, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 38
-PASS: gsl_fft_complex_forward with signal_noise, n = 38, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 38, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 38, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 38, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 38, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 38, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 38, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 38, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 38, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 38, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 38
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 38, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 38, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 38, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 38, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 38, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 38, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 38, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 38, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 38, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 38, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 38
-PASS: gsl_fft_real with signal_real_noise, n = 38, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 38, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 38, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 38, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 38
-PASS: gsl_fft_real_float with signal_real_noise, n = 38, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 38, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 38, stride = 3
-. 0 FE0C97C 144
-. 83 BE 0F 58 83 9E 0E 88 C9 1D 00 00 83 7E 0F 5C FC BF 40 2A C8 9C 00 00 C8 3B 00 00 83 5E 0E 84 FC 05 40 28 83 3E 0F 60 FD 64 00 72 CB BA 00 00 FD A4 00 32 FD 3F 00 28 FC 4B 00 32 FC 6D 00 32 FF C4 02 72 FD 03 00 32 C8 19 00 00 FF 62 02 72 FF 9E 02 72 FF 46 E8 2A FD BF 40 2A FD 5C 02 72 FD 9A D9 FA FC BF 68 28 FC 8C 57 FA FC 25 40 2A FD 64 08 2A FC 4D 58 2A FC 6D 10 28 FC 20 10 90 FF C3 58 2A FC FE 10 3A FE 07 10 00 41 92 00 50
-
-PASS: gsl_fft_complex_wavetable_alloc, n = 39, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 39
-PASS: gsl_fft_complex_forward with signal_noise, n = 39, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 39, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 39, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 39, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 39, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 39, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 39, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 39
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 39, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 39, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 39, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 39, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 39, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 39, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 39, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 39
-PASS: gsl_fft_real with signal_real_noise, n = 39, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 39, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 39, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 39, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 39
-PASS: gsl_fft_real_float with signal_real_noise, n = 39, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 39, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 39, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 39, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 39
-PASS: gsl_fft_complex_forward with signal_noise, n = 39, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 39, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 39, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 39, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 39, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 39, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 39, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 39, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 39, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 39, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 39
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 39, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 39, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 39, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 39, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 39, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 39, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 39, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 39, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 39, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 39, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 39
-PASS: gsl_fft_real with signal_real_noise, n = 39, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 39, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 39, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 39, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 39
-PASS: gsl_fft_real_float with signal_real_noise, n = 39, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 39, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 39, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 39, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 39
-PASS: gsl_fft_complex_forward with signal_noise, n = 39, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 39, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 39, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 39, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 39, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 39, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 39, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 39, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 39, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 39, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 39
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 39, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 39, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 39, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 39, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 39, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 39, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 39, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 39, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 39, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 39, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 39
-PASS: gsl_fft_real with signal_real_noise, n = 39, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 39, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 39, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 39, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 39
-PASS: gsl_fft_real_float with signal_real_noise, n = 39, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 39, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 39, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 40, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 40
-. 0 FE0D52C 20
-. FE 1F E8 00 80 9E 0F 88 CB A4 00 00 FC 84 07 72 40 91 08 40
-
-. 0 FE0DD7C 8
-. 81 3E 0F B8 4B FF F7 C4
-
-. 0 FE0D544 20
-. C9 09 00 00 FC 1F 22 3A FC 81 00 2A FC 84 08 00 41 86 02 6C
-
-. 0 FE0DBD0 16
-. CB BD 00 00 FC 20 F0 90 FF 9E E8 00 41 9D 00 08
-
-. 0 FE0DBE4 12
-. FC 40 E0 90 38 61 00 10 48 01 76 01
-
-. 0 FE25858 8
-. FF 8C 68 00 40 9D 00 F4
-
-. 0 FE2589C 8
-. FF 83 F0 00 40 9D 00 60
-
-. 0 FE25900 80
-. FD 7E 60 28 83 C1 00 18 CB 01 00 20 CB 21 00 28 FC AB 08 2A CB 61 00 38 CB 81 00 40 CB A1 00 48 FC E5 10 2A CB C1 00 50 CB E1 00 58 FC 27 D0 2A FC 4C 08 2A FD 2C 10 28 D8 43 00 00 FF 49 08 2A DB 43 00 08 CB 41 00 30 38 21 00 60 4E 80 00 20
-
-. 0 FE0DBF0 12
-. C9 A1 00 18 FC 8D E8 00 40 85 02 C4
-
-. 0 FE0DBFC 20
-. 80 BE 0F 8C FF 1F E8 00 CB 85 00 00 FD AD 07 32 40 99 03 14
-
-. 0 FE0DF20 8
-. 81 3E 0F BC 4B FF F2 08
-
-. 0 FE0D12C 24
-. C8 29 00 00 FC 1F 68 7A C8 21 00 10 FF 41 00 2A FE 01 D0 00 40 92 04 70
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 40, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 40, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 40, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 40, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 40, stride = 1
-. 0 FE0D540 24
-. 81 3E 0F 9C C9 09 00 00 FC 1F 22 3A FC 81 00 2A FC 84 08 00 41 86 02 6C
-
-. 0 FE0DBE0 16
-. FC 20 F0 50 FC 40 E0 90 38 61 00 10 48 01 76 01
-
-. 0 FE0DC10 8
-. 81 3E 0F A0 4B FF F5 18
-
-PASS: gsl_fft_complex_forward with signal_exp, n = 40, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 40, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 40
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 40, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 40, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 40, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 40, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 40, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 40, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 40, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 40
-PASS: gsl_fft_real with signal_real_noise, n = 40, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 40, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 40, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 40, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 40
-PASS: gsl_fft_real_float with signal_real_noise, n = 40, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 40, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 40, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 40, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 40
-PASS: gsl_fft_complex_forward with signal_noise, n = 40, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 40, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 40, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 40, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 40, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 40, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 40, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 40, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 40, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 40, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 40
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 40, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 40, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 40, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 40, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 40, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 40, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 40, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 40, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 40, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 40, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 40
-PASS: gsl_fft_real with signal_real_noise, n = 40, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 40, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 40, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 40, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 40
-PASS: gsl_fft_real_float with signal_real_noise, n = 40, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 40, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 40, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 40, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 40
-PASS: gsl_fft_complex_forward with signal_noise, n = 40, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 40, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 40, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 40, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 40, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 40, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 40, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 40, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 40, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 40, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 40
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 40, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 40, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 40, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 40, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 40, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 40, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 40, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 40, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 40, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 40, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 40
-PASS: gsl_fft_real with signal_real_noise, n = 40, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 40, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 40, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 40, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 40
-PASS: gsl_fft_real_float with signal_real_noise, n = 40, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 40, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 40, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 41, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 41
-PASS: gsl_fft_complex_forward with signal_noise, n = 41, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 41, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 41, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 41, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 41, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 41, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 41, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 41
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 41, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 41, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 41, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 41, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 41, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 41, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 41, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 41
-PASS: gsl_fft_real with signal_real_noise, n = 41, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 41, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 41, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 41, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 41
-PASS: gsl_fft_real_float with signal_real_noise, n = 41, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 41, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 41, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 41, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 41
-PASS: gsl_fft_complex_forward with signal_noise, n = 41, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 41, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 41, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 41, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 41, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 41, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 41, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 41, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 41, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 41, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 41
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 41, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 41, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 41, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 41, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 41, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 41, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 41, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 41, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 41, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 41, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 41
-PASS: gsl_fft_real with signal_real_noise, n = 41, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 41, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 41, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 41, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 41
-PASS: gsl_fft_real_float with signal_real_noise, n = 41, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 41, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 41, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 41, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 41
-PASS: gsl_fft_complex_forward with signal_noise, n = 41, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 41, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 41, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 41, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 41, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 41, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 41, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 41, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 41, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 41, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 41
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 41, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 41, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 41, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 41, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 41, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 41, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 41, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 41, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 41, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 41, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 41
-PASS: gsl_fft_real with signal_real_noise, n = 41, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 41, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 41, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 41, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 41
-PASS: gsl_fft_real_float with signal_real_noise, n = 41, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 41, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 41, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 42, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 42
-PASS: gsl_fft_complex_forward with signal_noise, n = 42, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 42, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 42, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 42, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 42, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 42, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 42, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 42
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 42, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 42, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 42, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 42, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 42, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 42, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 42, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 42
-. 0 100119F4 172
-. 81 41 00 2C 55 0B 18 38 39 6B 00 08 7D 28 52 14 7D 6B E9 D6 54 CA 18 38 39 4A 00 08 7C 1D 49 D6 55 29 18 38 39 29 00 08 7D 6B FC AE 54 EB 18 38 39 6B 00 08 54 00 18 38 7D 29 E9 D6 7D 9F 04 AE FC 07 03 32 7D A9 FC AE 7C 1D 41 D6 7D 08 2A 14 FD 47 03 72 FD A8 03 7A 54 00 18 38 7C 1F 04 AE 7D 38 39 D6 FD 88 53 38 7C E7 8A 14 FD 4B 68 28 7C 18 31 D6 FD 6B 68 2A FD 20 60 28 55 29 18 38 FD 40 50 50 7C C6 8A 14 FC 00 60 2A 7D 4A C1 D6 54 00 18 38 7C 19 05 AE 7D 6B C1 D6 7D 6A CD AE 7D 29 CD AE 7D 4B CD AE 42 00 FF 58
-
-PASS: gsl_fft_real with signal_real_noise, n = 42, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 42, stride = 1
-. 0 1000D160 168
-. 54 A9 18 38 54 8B 18 38 39 29 00 08 39 6B 00 08 7D 29 E1 D6 81 81 00 2C 54 C8 18 38 7D 46 62 14 55 47 18 38 7D 6B E1 D6 7D 29 EC AE 39 08 00 08 38 E7 00 08 7D 3C 29 D6 7D 0B EC AE 7C A5 1A 14 FD 89 40 2A FD 29 40 28 7C 1C 21 D6 55 29 18 38 7D 69 EC AE FD 46 03 32 7C 84 1A 14 FD 87 03 32 54 00 18 38 7D 57 51 D6 7D BD 04 AE FC 0B 68 28 7C 17 31 D6 FD 6B 68 2A 55 4A 18 38 FD 47 50 3A 7C C6 DA 14 FC 06 60 38 7D 08 B9 D6 54 00 18 38 7D 7A 05 AE 7C E7 B9 D6 7D 28 D5 AE 7C 0A D5 AE 7D 47 D5 AE 42 00 FF 5C
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 42, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 42, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 42
-. 0 10013A20 172
-. 81 41 00 2C 54 EB 10 3A 39 6B 00 04 54 A8 10 3A 7D 27 52 14 7D 6B F9 D6 54 CA 10 3A 39 08 00 04 39 4A 00 04 7C 1F 49 D6 55 29 10 3A 39 29 00 04 7D 6B EC 2E 54 00 10 3A 7D 29 F9 D6 7D BD 04 2E ED 87 03 72 7C 09 EC 2E 7C 1F 39 D6 7C E7 22 14 ED 88 60 3A EC 07 00 32 54 00 10 3A 7D 38 31 D6 ED 4B 60 28 7C C6 8A 14 ED A8 03 78 7C 1D 04 2E ED 6B 60 2A 7C 18 29 D6 FD 40 50 50 ED 20 68 28 55 29 10 3A EC 00 68 2A 7C A5 8A 14 7D 08 C1 D6 54 00 10 3A 7C 19 05 2E 7D 4A C1 D6 7D 68 CD 2E 7D 29 CD 2E 7D 4A CD 2E 42 00 FF 58
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 42, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 42, stride = 1
-. 0 1000F32C 168
-. 54 A9 10 3A 54 8B 10 3A 39 29 00 04 39 6B 00 04 7D 29 E1 D6 81 81 00 2C 54 C8 10 3A 7D 46 62 14 55 47 10 3A 7D 6B E1 D6 7D 29 FC 2E 39 08 00 04 38 E7 00 04 7D 3C 29 D6 7D 0B FC 2E 7C A5 1A 14 EC 09 40 2A ED 29 40 28 7C 1C 21 D6 55 29 10 3A 7D A9 FC 2E ED 46 00 32 EC 07 00 32 7C 84 1A 14 54 00 10 3A 7D 57 51 D6 7D 9F 04 2E ED 6D 60 28 7C 17 31 D6 ED AD 60 2A 55 4A 10 3A ED 47 52 FA 7C C6 DA 14 ED 66 02 F8 7D 08 B9 D6 54 00 10 3A 7D BA 05 2E 7C E7 B9 D6 7D 28 D5 2E 7D 6A D5 2E 7D 47 D5 2E 42 00 FF 5C
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 42, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 42, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 42
-PASS: gsl_fft_complex_forward with signal_noise, n = 42, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 42, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 42, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 42, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 42, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 42, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 42, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 42, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 42, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 42, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 42
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 42, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 42, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 42, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 42, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 42, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 42, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 42, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 42, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 42, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 42, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 42
-PASS: gsl_fft_real with signal_real_noise, n = 42, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 42, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 42, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 42, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 42
-PASS: gsl_fft_real_float with signal_real_noise, n = 42, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 42, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 42, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 42, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 42
-PASS: gsl_fft_complex_forward with signal_noise, n = 42, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 42, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 42, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 42, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 42, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 42, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 42, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 42, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 42, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 42, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 42
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 42, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 42, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 42, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 42, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 42, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 42, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 42, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 42, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 42, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 42, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 42
-PASS: gsl_fft_real with signal_real_noise, n = 42, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 42, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 42, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 42, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 42
-PASS: gsl_fft_real_float with signal_real_noise, n = 42, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 42, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 42, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 43, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 43
-PASS: gsl_fft_complex_forward with signal_noise, n = 43, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 43, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 43, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 43, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 43, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 43, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 43, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 43
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 43, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 43, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 43, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 43, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 43, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 43, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 43, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 43
-PASS: gsl_fft_real with signal_real_noise, n = 43, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 43, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 43, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 43, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 43
-PASS: gsl_fft_real_float with signal_real_noise, n = 43, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 43, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 43, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 43, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 43
-PASS: gsl_fft_complex_forward with signal_noise, n = 43, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 43, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 43, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 43, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 43, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 43, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 43, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 43, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 43, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 43, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 43
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 43, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 43, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 43, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 43, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 43, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 43, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 43, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 43, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 43, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 43, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 43
-PASS: gsl_fft_real with signal_real_noise, n = 43, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 43, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 43, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 43, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 43
-PASS: gsl_fft_real_float with signal_real_noise, n = 43, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 43, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 43, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 43, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 43
-PASS: gsl_fft_complex_forward with signal_noise, n = 43, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 43, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 43, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 43, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 43, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 43, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 43, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 43, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 43, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 43, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 43
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 43, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 43, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 43, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 43, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 43, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 43, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 43, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 43, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 43, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 43, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 43
-PASS: gsl_fft_real with signal_real_noise, n = 43, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 43, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 43, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 43, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 43
-PASS: gsl_fft_real_float with signal_real_noise, n = 43, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 43, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 43, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 44, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 44
-PASS: gsl_fft_complex_forward with signal_noise, n = 44, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 44, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 44, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 44, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 44, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 44, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 44, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 44
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 44, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 44, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 44, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 44, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 44, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 44, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 44, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 44
-PASS: gsl_fft_real with signal_real_noise, n = 44, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 44, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 44, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 44, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 44
-PASS: gsl_fft_real_float with signal_real_noise, n = 44, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 44, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 44, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 44, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 44
-PASS: gsl_fft_complex_forward with signal_noise, n = 44, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 44, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 44, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 44, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 44, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 44, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 44, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 44, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 44, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 44, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 44
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 44, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 44, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 44, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 44, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 44, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 44, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 44, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 44, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 44, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 44, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 44
-PASS: gsl_fft_real with signal_real_noise, n = 44, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 44, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 44, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 44, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 44
-PASS: gsl_fft_real_float with signal_real_noise, n = 44, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 44, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 44, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 44, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 44
-PASS: gsl_fft_complex_forward with signal_noise, n = 44, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 44, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 44, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 44, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 44, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 44, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 44, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 44, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 44, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 44, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 44
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 44, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 44, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 44, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 44, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 44, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 44, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 44, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 44, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 44, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 44, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 44
-PASS: gsl_fft_real with signal_real_noise, n = 44, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 44, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 44, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 44, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 44
-PASS: gsl_fft_real_float with signal_real_noise, n = 44, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 44, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 44, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 45, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 45
-PASS: gsl_fft_complex_forward with signal_noise, n = 45, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 45, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 45, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 45, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 45, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 45, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 45, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 45
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 45, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 45, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 45, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 45, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 45, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 45, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 45, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 45
-PASS: gsl_fft_real with signal_real_noise, n = 45, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 45, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 45, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 45, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 45
-PASS: gsl_fft_real_float with signal_real_noise, n = 45, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 45, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 45, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 45, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 45
-PASS: gsl_fft_complex_forward with signal_noise, n = 45, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 45, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 45, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 45, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 45, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 45, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 45, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 45, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 45, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 45, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 45
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 45, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 45, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 45, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 45, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 45, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 45, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 45, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 45, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 45, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 45, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 45
-PASS: gsl_fft_real with signal_real_noise, n = 45, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 45, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 45, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 45, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 45
-PASS: gsl_fft_real_float with signal_real_noise, n = 45, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 45, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 45, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 45, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 45
-PASS: gsl_fft_complex_forward with signal_noise, n = 45, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 45, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 45, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 45, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 45, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 45, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 45, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 45, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 45, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 45, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 45
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 45, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 45, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 45, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 45, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 45, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 45, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 45, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 45, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 45, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 45, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 45
-PASS: gsl_fft_real with signal_real_noise, n = 45, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 45, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 45, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 45, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 45
-PASS: gsl_fft_real_float with signal_real_noise, n = 45, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 45, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 45, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 46, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 46
-PASS: gsl_fft_complex_forward with signal_noise, n = 46, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 46, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 46, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 46, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 46, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 46, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 46, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 46
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 46, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 46, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 46, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 46, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 46, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 46, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 46, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 46
-PASS: gsl_fft_real with signal_real_noise, n = 46, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 46, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 46, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 46, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 46
-PASS: gsl_fft_real_float with signal_real_noise, n = 46, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 46, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 46, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 46, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 46
-PASS: gsl_fft_complex_forward with signal_noise, n = 46, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 46, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 46, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 46, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 46, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 46, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 46, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 46, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 46, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 46, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 46
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 46, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 46, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 46, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 46, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 46, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 46, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 46, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 46, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 46, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 46, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 46
-PASS: gsl_fft_real with signal_real_noise, n = 46, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 46, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 46, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 46, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 46
-PASS: gsl_fft_real_float with signal_real_noise, n = 46, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 46, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 46, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 46, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 46
-PASS: gsl_fft_complex_forward with signal_noise, n = 46, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 46, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 46, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 46, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 46, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 46, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 46, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 46, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 46, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 46, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 46
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 46, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 46, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 46, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 46, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 46, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 46, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 46, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 46, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 46, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 46, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 46
-PASS: gsl_fft_real with signal_real_noise, n = 46, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 46, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 46, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 46, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 46
-PASS: gsl_fft_real_float with signal_real_noise, n = 46, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 46, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 46, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 47, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 47
-PASS: gsl_fft_complex_forward with signal_noise, n = 47, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 47, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 47, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 47, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 47, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 47, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 47, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 47
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 47, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 47, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 47, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 47, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 47, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 47, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 47, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 47
-PASS: gsl_fft_real with signal_real_noise, n = 47, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 47, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 47, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 47, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 47
-PASS: gsl_fft_real_float with signal_real_noise, n = 47, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 47, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 47, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 47, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 47
-PASS: gsl_fft_complex_forward with signal_noise, n = 47, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 47, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 47, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 47, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 47, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 47, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 47, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 47, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 47, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 47, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 47
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 47, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 47, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 47, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 47, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 47, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 47, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 47, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 47, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 47, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 47, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 47
-PASS: gsl_fft_real with signal_real_noise, n = 47, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 47, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 47, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 47, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 47
-PASS: gsl_fft_real_float with signal_real_noise, n = 47, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 47, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 47, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 47, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 47
-PASS: gsl_fft_complex_forward with signal_noise, n = 47, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 47, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 47, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 47, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 47, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 47, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 47, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 47, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 47, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 47, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 47
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 47, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 47, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 47, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 47, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 47, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 47, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 47, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 47, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 47, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 47, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 47
-PASS: gsl_fft_real with signal_real_noise, n = 47, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 47, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 47, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 47, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 47
-PASS: gsl_fft_real_float with signal_real_noise, n = 47, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 47, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 47, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 48, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 48
-PASS: gsl_fft_complex_forward with signal_noise, n = 48, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 48, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 48, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 48, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 48, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 48, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 48, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 48
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 48, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 48, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 48, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 48, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 48, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 48, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 48, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 48
-PASS: gsl_fft_real with signal_real_noise, n = 48, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 48, stride = 1
-. 0 1000D734 384
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-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 48, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 48, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 48
-PASS: gsl_fft_real_float with signal_real_noise, n = 48, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 48, stride = 1
-. 0 1000F918 384
-. 7C F8 EA 14 57 AB 10 3A 54 E9 10 3A 39 6B 00 04 39 29 00 04 7D 58 CA 14 7D 29 E1 D6 55 46 10 3A 57 28 10 3A 39 08 00 04 38 C6 00 04 7D 6B E1 D6 7D 49 FC 2E FD 40 50 50 7C 1C C9 D6 7D 2B FC 2E 7F 39 B2 14 FD 20 48 50 7D 3C E9 D6 54 00 10 3A 7D 7F 04 2E 7F BD B2 14 80 01 00 30 7D 5C 51 D6 55 29 10 3A 7C 29 FC 2E 7D 63 02 14 7C AB 02 14 7C 85 02 14 7C FC 39 D6 55 4A 10 3A 7C EA FC 2E 54 69 10 3A 55 6A 10 3A EC A7 08 28 39 29 00 04 7D 08 E1 D6 54 E7 10 3A 7C C7 FC 2E EC E7 08 2A 54 87 10 3A ED 8B 30 28 39 4A 00 04 7C C6 E1 D6 7D A8 FC 2E ED 6B 30 2A 54 A8 10 3A EC 0D 50 28 39 08 00 04 ED AD 50 2A 38 E7 00 04 7D 06 FC 2E 7C 17 19 D6 EC 40 28 28 7C 63 DA 14 EC 88 48 28 ED 08 48 2A EC 00 28 2A 7D 77 59 D6 EC 6C 20 2A 54 00 10 3A ED 4D 40 28 ED 2B 38 28 ED 8C 20 28 7C B7 29 D6 EC DF 00 32 55 6B 10 3A EC BD 02 B2 EC 3A 00 F2 EC 9A 00 B2 7C 97 21 D6 EC 1E 00 32 54 A5 10 3A ED 5C 02 B2 EC DE 33 3A 7D 29 B9 D6 EC BC 2A 7A EC 5B 08 BA 54 84 10 3A ED 9F 03 38 ED 3D 52 78 7D 4A B9 D6 EC 7B 20 F8 ED 6B 38 2A ED AD 40 2A 7D 08 B9 D6 7D 7A 05 2E 7D A9 D5 2E 7D 8B D5 2E 7C CA D5 2E 7C E7 B9 D6 7D 25 D5 2E 7C A8 D5 2E 7C 64 D5 2E 7C 47 D5 2E 42 00 FE 84
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 48, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 48, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 48
-PASS: gsl_fft_complex_forward with signal_noise, n = 48, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 48, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 48, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 48, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 48, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 48, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 48, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 48, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 48, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 48, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 48
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 48, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 48, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 48, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 48, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 48, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 48, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 48, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 48, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 48, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 48, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 48
-PASS: gsl_fft_real with signal_real_noise, n = 48, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 48, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 48, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 48, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 48
-PASS: gsl_fft_real_float with signal_real_noise, n = 48, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 48, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 48, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 48, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 48
-PASS: gsl_fft_complex_forward with signal_noise, n = 48, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 48, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 48, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 48, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 48, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 48, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 48, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 48, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 48, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 48, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 48
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 48, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 48, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 48, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 48, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 48, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 48, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 48, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 48, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 48, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 48, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 48
-PASS: gsl_fft_real with signal_real_noise, n = 48, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 48, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 48, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 48, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 48
-PASS: gsl_fft_real_float with signal_real_noise, n = 48, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 48, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 48, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 49, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 49
-. 0 FE0D6D8 12
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-
-. 0 FE0D804 16
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-
-. 0 FE0D6EC 24
-. C9 BD 00 00 38 61 00 10 FC 22 68 28 FC 82 08 28 FC 44 68 28 48 01 8B DD
-
-. 0 FE262DC 12
-. 94 21 FF D0 7C 08 02 A6 48 04 CD CD
-
-. 0 FE262E8 68
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-
-. 0 FE2632C 24
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-
-. 0 FE26410 4
-. 4B FF F6 5D
-
-. 0 FE25A6C 12
-. 94 21 FF 90 7C A8 02 A6 48 04 D6 3D
-
-. 0 FE25A78 400
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-
-. 0 FE25C08 4
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-. 0 FE25C0C 12
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-
-. 0 FE25C18 8
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-. 0 FE262B4 28
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-
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-
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-
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-
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-
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-. 0 1000886C 400
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-
-. 0 100089FC 400
-. 7C 00 C1 D6 FD 4D 50 2A 54 E7 20 36 FD 20 48 2A 7C 67 D2 14 FD B9 68 28 FC 18 00 28 7D 29 C1 D6 FF 92 07 32 54 00 20 36 7F A0 D2 14 FE F7 F8 2A FF 63 06 F2 55 29 20 36 7F 89 D2 14 FF 43 06 B2 7E F7 D5 AE 7E F7 92 14 FE D6 F0 2A FC D1 01 B2 FD 11 02 32 FC B0 01 72 FD AE 03 72 FC 0E 00 32 FD 8C F8 2A FD 6B F0 2A FD 4A C8 2A FD 29 C0 2A CB 01 00 B8 FF E0 E8 50 FC 60 08 50 FC 80 10 50 FC F0 01 F2 FD 4F 02 B2 FD 2F 02 72 FD 93 BB 3A CA E1 00 D8 FD 73 B2 FA FF C0 E0 50 FF FF 28 28 FC 63 68 28 FC 84 00 28 FF BD 30 2A FF 9C 40 2A FD AD D8 2A FC 00 D0 2A FC A5 30 28 FC 42 D0 28 FF DE 38 28 FC 21 D8 28 FC E7 40 28 FC 84 48 2A FD AD 50 2A FC 00 48 2A FF EC F8 2A FF AC E8 2A FF 8B E0 2A FC 42 48 2A FD 8C 28 2A FC 63 50 2A FC 21 50 2A FF CB F0 2A FD 6B 38 2A FC BF 20 28 FC FD 00 28 FC DC 68 2A FF BD 00 2A C8 01 00 C8 FF 9C 68 28 C9 A1 00 A8 FD 4C 10 2A FF FF 20 2A C8 81 00 98 FD 8C 10 28 C8 41 00 D8 FD 2B 08 28 FD 1E 18 2A FD 6B 08 2A FF 64 07 72 FF DE 18 28 C8 61 00 E8 FE A2 01 72 FC 44 07 32 C8 81 00 B8 FF 38 03 32 FE 83 01 F2 C8 61 00 C8 DA DB 00 08 FF 00 02 B2 FC 04 02 F2 FC 97 02 32 CA E1 00 E8 FF 4D 07 F2 FC 2D 07 B2 FD A3 02 72 FC 77 01 B2 CA E1 00 90 FF 97 DF 3A CA E1 00 B0 CB 61 00 A0
-
-. 0 10008B8C 132
-. FD 77 CA FA CB 21 00 C0 CA E1 00 90 FF DB D7 BA CB 41 00 D0 CB 61 00 E0 FD 39 C2 7A CB 21 00 B0 CB 01 00 A0 FD 1A AA 3A CB 41 00 C0 FC DB A1 BA CB 61 00 D0 FD 99 03 38 C8 01 00 E0 FF B7 17 78 FF F8 0F F8 FD 5A 6A B8 7F AB D5 AE DB 86 00 08 FC BB 21 78 7F EA D5 AE DB C5 00 08 FC E0 19 F8 7D 88 D5 AE D9 64 00 08 7D 47 D5 AE D9 23 00 08 7C BA 05 AE D9 1D 00 08 7C E9 D5 AE D8 DC 00 08 42 00 FC 60
-
-PASS: gsl_fft_complex_forward with signal_noise, n = 49, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 49, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 49, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 49, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 49, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 49, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 49, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 49
-. 0 1000B6DC 400
-. 81 01 00 AC 7C E8 02 A6 81 21 00 B0 7C 13 72 14 7D 48 9A 14 7C 00 C9 D6 7D 09 9A 14 81 21 00 B4 7D 67 9A 14 CA E1 00 98 7C E9 9A 14 81 21 00 B8 7D 6B C9 D6 54 00 18 38 7C C9 9A 14 7C BF 04 2E 7D 35 FA 14 7E 95 FC 2E C2 A9 00 04 7D 20 FA 14 7C E7 C9 D6 55 6B 18 38 C0 E9 00 04 7C AB FA 14 7C CB FC 2E 7F B7 82 14 C1 45 00 04 7F 76 D2 14 7C C6 C9 D6 54 E7 18 38 7D 67 FA 14 7C 87 FC 2E C0 6B 00 04 3A 73 00 01 ED 86 20 28 80 01 00 C0 7D 4A C9 D6 54 C6 18 38 7D 26 FA 14 7D 26 FC 2E C1 09 00 04 ED 6A 18 28 EF A5 48 28 80 E1 00 C4 7D 08 C9 D6 55 4A 18 38 7C 6A FA 14 7C 2A FC 2E C0 43 00 04 EF 87 40 28 EC A5 48 2A 81 21 00 CC 55 08 18 38 EC C6 20 2A 7C 88 FA 14 7D A8 FC 2E C0 04 00 04 EC E7 40 2A EF 6D 08 2A 81 01 00 C8 EF 40 10 2A 81 41 00 A8 ED 4A 18 2A 7F 80 BA 14 EF 26 28 2A 7C 07 BA 14 EC 00 10 28 7C A8 BA 14 EC 4B E0 28 7C 89 BA 14 EF 0A 38 2A 7C 6A BA 14 ED AD 08 28 7F BD C1 D6 EC 2C E8 28 7E 94 CA 14 EC 85 D8 28 7E B5 8A 14 EC 67 D0 28 3A F7 00 01 ED 39 D8 2A 7F 9C C1 D6 EF C0 58 28 57 BD 18 38 EC A6 28 28 7D 3D D2 14 EC DB 30 28 ED 60 58 2A 7C 00 C1 D6 EC 1C 00 28 57 9C 18 38 7D 7C D2 14 ED 18 D0 2A EF ED 60 28 7C A5 C1 D6 EC EA 38 28 54 00 18 38 ED 5A 50 28 7D 40 D2 14 ED 8D 60 2A
-
-. 0 1000B86C 400
-. 7C 84 C1 D6 ED BD 68 28 54 A5 18 38 7D 05 D2 14 ED 6B E0 2A 7C 63 C1 D6 54 84 18 38 7C E4 D2 14 54 63 18 38 FC 4E 00 B2 7C C3 D2 14 FC 97 01 32 FC 77 00 F2 CA E1 00 A0 ED 8C E8 2A FC 2E 00 72 FD 33 02 72 FC D2 01 B2 FC 10 00 32 FF CF 07 B2 FC B7 01 72 FC F7 01 F2 FC 40 10 18 EE 94 C8 2A FD 13 02 32 FD 52 02 B2 FD B0 03 72 FF EF 07 F2 FC 80 20 18 FC 60 18 18 FC 20 08 18 EE B5 C0 2A FD 71 02 F2 EE 94 D8 2A FC C0 30 18 FF C0 F0 18 FC 00 00 18 FF 60 10 50 FD 91 03 32 FD 20 48 18 EE B5 D0 2A FD 40 50 18 FF E0 F8 18 FC A0 28 18 FC E0 38 18 FD A0 68 18 FF A0 20 50 FF 80 18 50 FF 40 08 50 FD 00 40 18 FD 60 58 18 ED 34 48 2A EF 7B 00 28 EC 84 30 2A EC 00 F0 2A FD 80 60 18 ED 15 40 2A EF BD 28 28 EF 9C 38 28 EC A5 30 28 EC E7 50 28 EF 5A 68 28 EC 21 F8 28 EC 42 F0 28 C3 C1 00 70 EC 63 50 2A ED AD F8 2A C3 E1 00 78 EC 00 58 2A EC 89 20 2A EF 7B 58 2A ED AD 60 2A EC 21 60 2A EC 42 58 2A EF A9 E8 2A EF 88 E0 2A EC 68 18 2A ED 29 28 2A ED 08 38 2A EF 5A 60 2A EC E4 00 28 EC BD D8 28 ED 68 08 28 ED 89 10 2A EC C3 68 2A EC 84 00 2A C0 01 00 80 ED 29 10 28 C0 41 00 90 ED 08 08 2A C0 21 00 88 EC 63 68 28 EF BD D8 2A C3 61 00 68 ED 5C D0 2A EC 42 01 F2 EF 9C D0 28 EE E0 03 32 EF 5B 01 32 D0 41 01 48
-
-. 0 1000B9FC 208
-. ED BB 00 F2 C3 61 00 88 EF 1F 02 72 EE C1 01 72 EC 3F 02 32 EF E0 02 F2 C0 01 00 90 EF 3E 07 72 EC 5E 07 32 EF DB 02 B2 EF 60 01 B2 C0 01 00 64 EC 60 D0 FA C3 41 00 6C C0 01 00 74 EF 9A CF 3A C3 41 00 7C ED 00 C2 3A C0 01 00 84 ED 7A BA FA C2 E1 00 8C C3 41 01 48 ED 40 B2 BA C0 01 00 64 EC D7 D1 BA C3 41 00 7C EC 80 69 38 C2 E1 00 74 C1 A1 00 6C ED 9A FB 38 C0 01 00 8C ED 37 0A 78 C3 E1 00 84 EF AD 17 78 EC E0 D9 F8 7E 96 D5 2E EC BF F1 78 D2 BB 00 04 7E D6 92 14 7C 9D D5 2E D0 69 00 04 7F BC D5 2E D3 8B 00 04 7D 3A 05 2E D1 0A 00 04 7D 85 D5 2E D1 68 00 04 7C A4 D5 2E D1 47 00 04 7C E3 D5 2E D0 C6 00 04 42 00 FC 14
-
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 49, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 49, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 49, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 49, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 49, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 49, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 49, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 49
-. 0 1001101C 52
-. 7C 18 19 D6 C8 D7 00 00 C8 F6 00 00 38 E0 00 00 39 43 FF FF 7F 6B DB 78 54 04 18 38 2F 07 00 00 C9 36 00 00 C9 57 00 00 FD 00 48 90 FD 60 48 90 41 9A 00 14
-
-PASS: gsl_fft_real with signal_real_noise, n = 49, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 49, stride = 1
-. 0 1000CB9C 24
-. 38 1B 00 01 39 E0 00 01 54 0B F8 7E 7C 08 03 A6 2B 8B 00 01 40 9D 01 8C
-
-. 0 1000CBB4 24
-. 83 3E 81 8C 7D 74 5B 78 83 1E 81 90 3A 40 00 00 7F 92 70 40 40 9C 01 60
-
-. 0 1000CBCC 40
-. 20 CF 00 00 7E C6 79 14 55 EC 08 3C 3A 20 00 00 3A A0 00 00 38 60 00 00 C8 B9 00 00 7F 83 F8 40 C8 D8 00 00 40 9C 01 24
-
-. 0 1000CBF4 40
-. 7D 31 62 14 7D 74 78 50 38 A9 FF FF 38 8B 00 01 2C 83 00 00 C9 18 00 00 C9 39 00 00 FC E0 40 90 FD 40 40 90 41 86 00 18
-
-. 0 1000CC30 12
-. 39 00 00 00 7F 88 F8 40 40 9C 00 80
-
-. 0 1000CC3C 48
-. 7C 15 D9 D6 7F E9 03 A6 57 67 08 3C 7D 20 62 14 7C CC 00 50 39 49 FF FF 2F 88 00 00 55 49 18 38 39 69 00 08 7D 28 F8 50 7F 09 40 40 41 9E 00 14
-
-. 0 1000CC7C 4
-. 40 99 03 9C
-
-. 0 1000CC80 56
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-
-. 0 1000CC54 24
-. 2F 88 00 00 55 49 18 38 39 69 00 08 7D 28 F8 50 7F 09 40 40 41 9E 00 14
-
-. 0 1000CC6C 20
-. FC 06 02 B2 FD A6 02 72 FD 25 02 78 FD 45 6A BA 40 99 03 9C
-
-. 0 1000D018 52
-. 7D 29 D9 D6 55 29 08 3C 7D 26 4A 14 39 29 FF FF 55 2B 18 38 7D 3C 49 D6 39 6B 00 08 7D 6B E1 D6 55 29 18 38 7D 89 EC AE 7C 0B EC AE FD 60 00 50 4B FF FC 4C
-
-. 0 1000CC94 36
-. FD AA 03 32 39 08 00 01 7D 4A 3A 14 FC 0A 02 F2 FD A9 6A FA FC 09 03 38 FC E7 68 2A FD 08 00 2A 42 00 FF A0
-
-. 0 1000CCB8 16
-. 7C 00 00 26 54 00 3F FE 7E C7 03 79 41 82 03 88
-
-. 0 1000CCC8 76
-. C9 39 00 00 C9 58 00 00 FD AA 02 32 54 A9 18 38 7C 17 29 D6 39 29 00 08 FC 0A 01 F2 38 63 00 01 7F 83 F8 40 FD A9 69 FA 7D 74 22 14 7D 29 B9 D6 54 00 18 38 FC 09 02 38 38 8B FF FF 7C A5 9A 14 7C 1A 05 AE 7D A9 D5 AE 41 9C FE F4
-
-. 0 1000CC04 24
-. 2C 83 00 00 C9 18 00 00 C9 39 00 00 FC E0 40 90 FD 40 40 90 41 86 00 18
-
-. 0 1000CC1C 32
-. FC 06 07 B2 FD A6 07 72 FC 05 07 7A FC A5 6F B8 FC C0 00 90 39 00 00 00 7F 88 F8 40 40 9C 00 80
-
-. 0 1000D04C 20
-. 54 89 20 36 7D 29 82 14 C9 49 FF F8 C9 29 FF F0 4B FF FC 74
-
-. 0 1000CCD0 68
-. FD AA 02 32 54 A9 18 38 7C 17 29 D6 39 29 00 08 FC 0A 01 F2 38 63 00 01 7F 83 F8 40 FD A9 69 FA 7D 74 22 14 7D 29 B9 D6 54 00 18 38 FC 09 02 38 38 8B FF FF 7C A5 9A 14 7C 1A 05 AE 7D A9 D5 AE 41 9C FE F4
-
-. 0 1000CD14 20
-. 3A 52 00 01 7E B5 FA 14 7F 92 70 40 7E 31 DA 14 41 9C FE BC
-
-. 0 1000CD28 20
-. 7D 08 02 A6 39 EF 00 01 55 00 F8 7E 7F 80 78 40 41 9D FE 88
-
-. 0 1000CBC0 12
-. 3A 40 00 00 7F 92 70 40 40 9C 01 60
-
-. 0 1000CD3C 8
-. 73 69 00 01 40 82 01 70
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 49, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 49, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 49
-. 0 1001300C 52
-. 7C 18 19 D6 C0 D7 00 00 C0 F6 00 00 38 E0 00 00 39 43 FF FF 7F 6B DB 78 54 04 10 3A 2F 07 00 00 C1 36 00 00 C1 57 00 00 FD 00 48 90 FD 60 48 90 41 9A 00 14
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 49, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 49, stride = 1
-. 0 1000ED64 24
-. 38 1B 00 01 39 E0 00 01 54 0B F8 7E 7C 08 03 A6 2B 8B 00 01 40 9D 01 8C
-
-. 0 1000ED7C 24
-. 83 3E 82 04 7D 74 5B 78 83 1E 82 08 3A 40 00 00 7F 92 70 40 40 9C 01 60
-
-. 0 1000ED94 40
-. 20 CF 00 00 7E C6 79 14 55 EC 08 3C 3A 20 00 00 3A A0 00 00 38 60 00 00 C0 B9 00 00 7F 83 E8 40 C0 D8 00 00 40 9C 01 24
-
-. 0 1000EDBC 40
-. 7D 31 62 14 7D 74 78 50 38 A9 FF FF 38 8B 00 01 2C 83 00 00 C1 18 00 00 C1 39 00 00 FC E0 40 90 FD 40 40 90 41 86 00 18
-
-. 0 1000EDF8 12
-. 39 00 00 00 7F 88 E8 40 40 9C 00 80
-
-. 0 1000EE04 48
-. 7C 15 D9 D6 7F A9 03 A6 57 67 08 3C 7D 20 62 14 7C CC 00 50 39 49 FF FF 2F 88 00 00 55 49 10 3A 39 69 00 04 7D 28 E8 50 7F 09 40 40 41 9E 00 14
-
-. 0 1000EE44 4
-. 40 99 03 A0
-
-. 0 1000EE48 56
-. 7C 1C 51 D6 7D 2B E1 D6 54 00 10 3A 7D 9F 04 2E 7D 69 FC 2E ED AA 03 32 39 08 00 01 EC 0A 02 F2 7D 4A 3A 14 ED A9 6A FA EC 09 03 38 EC E7 68 2A ED 08 00 2A 42 00 FF A0
-
-. 0 1000EE1C 24
-. 2F 88 00 00 55 49 10 3A 39 69 00 04 7D 28 E8 50 7F 09 40 40 41 9E 00 14
-
-. 0 1000EE34 20
-. EC 06 02 B2 ED A6 02 72 ED 25 02 78 ED 45 6A BA 40 99 03 A0
-
-. 0 1000F1E4 52
-. 7D 29 D9 D6 55 29 08 3C 7D 26 4A 14 39 29 FF FF 55 2B 10 3A 7D 3C 49 D6 39 6B 00 04 7D 6B E1 D6 55 29 10 3A 7D 89 FC 2E 7C 0B FC 2E FD 60 00 50 4B FF FC 48
-
-. 0 1000EE5C 36
-. ED AA 03 32 39 08 00 01 EC 0A 02 F2 7D 4A 3A 14 ED A9 6A FA EC 09 03 38 EC E7 68 2A ED 08 00 2A 42 00 FF A0
-
-. 0 1000EE80 16
-. 7C 00 00 26 54 00 3F FE 7E C7 03 79 41 82 03 8C
-
-. 0 1000EE90 76
-. C1 39 00 00 C1 58 00 00 54 A9 10 3A ED AA 02 32 EC 0A 01 F2 7C 17 29 D6 39 29 00 04 38 63 00 01 ED A9 69 FA 7F 83 E8 40 EC 09 02 38 7D 29 B9 D6 54 00 10 3A 7D 74 22 14 7C 1A 05 2E 38 8B FF FF 7C A5 9A 14 7D A9 D5 2E 41 9C FE F4
-
-. 0 1000EDCC 24
-. 2C 83 00 00 C1 18 00 00 C1 39 00 00 FC E0 40 90 FD 40 40 90 41 86 00 18
-
-. 0 1000EDE4 32
-. EC 06 07 B2 ED A6 07 72 EC 05 07 7A EC A5 6F B8 FC C0 00 90 39 00 00 00 7F 88 E8 40 40 9C 00 80
-
-. 0 1000F218 20
-. 54 89 18 38 7D 29 82 14 C1 49 FF FC C1 29 FF F8 4B FF FC 70
-
-. 0 1000EE98 68
-. 54 A9 10 3A ED AA 02 32 EC 0A 01 F2 7C 17 29 D6 39 29 00 04 38 63 00 01 ED A9 69 FA 7F 83 E8 40 EC 09 02 38 7D 29 B9 D6 54 00 10 3A 7D 74 22 14 7C 1A 05 2E 38 8B FF FF 7C A5 9A 14 7D A9 D5 2E 41 9C FE F4
-
-. 0 1000EEDC 20
-. 3A 52 00 01 7E B5 EA 14 7F 92 70 40 7E 31 DA 14 41 9C FE BC
-
-. 0 1000EEF0 20
-. 7D 08 02 A6 39 EF 00 01 55 00 F8 7E 7F 80 78 40 41 9D FE 88
-
-. 0 1000ED88 12
-. 3A 40 00 00 7F 92 70 40 40 9C 01 60
-
-. 0 1000EF04 8
-. 73 69 00 01 40 82 01 74
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 49, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 49, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 49
-PASS: gsl_fft_complex_forward with signal_noise, n = 49, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 49, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 49, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 49, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 49, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 49, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 49, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 49, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 49, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 49, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 49
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 49, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 49, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 49, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 49, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 49, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 49, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 49, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 49, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 49, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 49, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 49
-PASS: gsl_fft_real with signal_real_noise, n = 49, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 49, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 49, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 49, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 49
-PASS: gsl_fft_real_float with signal_real_noise, n = 49, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 49, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 49, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 49, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 49
-PASS: gsl_fft_complex_forward with signal_noise, n = 49, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 49, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 49, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 49, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 49, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 49, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 49, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 49, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 49, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 49, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 49
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 49, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 49, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 49, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 49, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 49, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 49, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 49, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 49, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 49, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 49, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 49
-PASS: gsl_fft_real with signal_real_noise, n = 49, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 49, stride = 3
-. 0 FEE0DB4 12
-. 7C 00 18 28 7D 20 19 2D 40 A2 FF F8
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 49, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 49, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 49
-PASS: gsl_fft_real_float with signal_real_noise, n = 49, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 49, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 49, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 50, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 50
-PASS: gsl_fft_complex_forward with signal_noise, n = 50, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 50, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 50, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 50, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 50, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 50, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 50, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 50
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 50, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 50, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 50, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 50, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 50, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 50, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 50, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 50
-. 0 10011434 400
-. 7D 7C D2 14 7C 0B D2 14 7D 1D 59 D6 7D 20 D2 14 7D 49 D2 14 54 07 18 38 55 26 18 38 55 45 18 38 7C 1D 01 D6 55 6B 18 38 39 6B 00 08 38 E7 00 08 38 C6 00 08 7D 3D 49 D6 38 A5 00 08 55 08 18 38 54 00 18 38 7C E8 FC AE 7D 5F 04 AE 7D 5D 51 D6 55 29 18 38 7D 29 FC AE FC 39 01 F2 57 89 18 38 FC 17 02 B2 39 29 00 08 7D 6B E9 D6 55 4A 18 38 7C AA FC AE FD B5 02 72 57 6A 18 38 FD 93 01 72 39 4A 00 08 7C E7 E9 D6 7D 0B FC AE 56 8B 08 3C FC 79 02 32 7D 6B AA 14 39 6B FF FF 7C C6 E9 D6 7D 67 FC AE FD 1A 0A 3A 7C F7 5A 14 55 64 18 38 FC 57 02 F2 54 E3 18 38 7C A5 E9 D6 7C C6 FC AE FD 78 02 FA 38 84 00 08 38 63 00 08 FF F5 01 B2 7E B5 8A 14 7C 85 FC AE 7D 29 E9 D6 FC D6 69 BA FF D3 01 32 7C 1D E1 D6 7F A9 FC AE FC 94 61 3A 7D 37 DA 14 7D 17 4A 14 FD 36 FA 78 55 26 18 38 54 00 18 38 55 05 18 38 FC B4 F1 78 7C 3F 04 AE 38 C6 00 08 7C 18 D9 D6 FC FA 19 F8 38 A5 00 08 7F 9C B2 14 FD 58 12 B8 7F 7B 8A 14 7D 38 49 D6 54 00 18 38 FD AB 30 2A FC 08 20 2A FD 87 28 2A FC 6A 48 2A 7D 18 41 D6 FF C0 68 2A 55 29 18 38 FD 4A 48 28 FF EC 18 2A FC 00 68 28 7D 78 59 D6 FD 3E 03 F2 55 08 18 38 FD 6B 30 28 FC 5C 02 B2 7C F8 39 D6 55 6B 18 38 FD 5B 02 B2 FC E7 28 28 7D 4A C1 D6 FC 00 04 32 54 E7 18 38 FD 8C 18 28
-
-. 0 100115C4 168
-. FD BF 03 F2 7C C6 C1 D6 FD 3D 48 28 FC DC 02 F2 7C A5 C1 D6 FD 7B 02 F2 FD 08 20 28 FC 51 11 FA 7C 84 C1 D6 FD 8C 04 32 FC F2 51 F8 7C 63 C1 D6 FD 49 00 28 FD A1 68 28 FD 29 00 2A FC D1 32 3A FD 12 5A 38 FC 0D 60 28 FC AA 10 28 FD 69 38 28 FD AD 60 2A FC 80 30 2A FC 21 F8 2A FD 8D 40 2A FF BD F0 2A FD 60 58 50 7C 39 05 AE FC A0 28 50 FD AD 40 28 7F AA CD AE FD 29 38 2A FC 00 30 28 FD 4A 10 2A 7D A9 CD AE 7D 26 CD AE 7C 08 CD AE 7D 45 CD AE 7D 8B CD AE 7D 64 CD AE 7C 87 CD AE 7C A3 CD AE 42 00 FD CC
-
-PASS: gsl_fft_real with signal_real_noise, n = 50, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 50, stride = 1
-. 0 1000DE58 260
-. 1D 24 00 05 7C E5 CA 14 7C 84 DA 14 7D 29 DA 14 39 29 FF FF 7C 06 4A 14 7D 7C 49 D6 54 0A 18 38 7D 06 02 14 39 4A 00 08 7C 1C 01 D6 55 6B 18 38 7D 6B EC AE 55 29 18 38 39 29 00 08 FD 6B 58 2A 54 00 18 38 7D 4A E1 D6 7C 1D 04 AE FC 00 00 2A 7D 1C 41 D6 7D AA EC AE FD 8B 00 28 FD 6B 00 2A 7D 29 E1 D6 55 08 18 38 7C E8 EC AE FD AD 68 2A FD 8C 01 72 FD 2B 39 B8 7C 09 EC AE 7D 27 CA 14 7C 17 29 D6 FD 58 03 72 7D 69 CA 14 7D 4B CA 14 FD B9 03 72 7C A5 DA 14 7C F7 39 D6 54 00 18 38 FC 00 00 2A FD 0C 48 28 FD 8C 48 2A FD 59 50 38 7D 37 49 D6 54 E7 18 38 FC 18 68 3A FD 20 60 50 7D 77 59 D6 FD A0 40 50 55 29 18 38 FD 6B 38 2A FD 29 00 28 7D 57 51 D6 FD AD 50 28 FD 8C 00 28 55 6B 18 38 FD 08 50 28 7D 7A 05 AE 55 4A 18 38 7D 87 D5 AE 7D 09 D5 AE 7D AB D5 AE 7D 2A D5 AE 42 00 FF 00
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 50, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 50, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 50
-. 0 10013430 400
-. 7D 7B D2 14 7C 0B D2 14 7D 1F 59 D6 7D 20 D2 14 7D 49 D2 14 54 07 10 3A 55 26 10 3A 55 45 10 3A 7C 1F 01 D6 55 6B 10 3A 39 6B 00 04 38 E7 00 04 38 C6 00 04 7D 3F 49 D6 38 A5 00 04 55 08 10 3A 54 00 10 3A 7C C8 EC 2E 7D 1D 04 2E 7D 5F 51 D6 55 29 10 3A 7C 89 EC 2E EC B8 01 B2 EC F6 02 32 57 69 10 3A EC 54 01 32 39 29 00 04 7D 6B F9 D6 55 4A 10 3A 7C 6A EC 2E 57 8A 10 3A 39 4A 00 04 EC 32 00 F2 7C E7 F9 D6 7D 6B EC 2E EC B9 2A FA ED 78 02 F2 7C C6 F9 D6 7C 07 EC 2E EC F7 38 3A EC 16 00 32 7C A5 F9 D6 7D 86 EC 2E EC D9 59 B8 EC 55 13 3A ED 94 03 32 7D A5 EC 2E ED 17 02 38 7D 29 F9 D6 EC 33 0B 7A ED B2 03 72 EC 95 61 38 EC 05 08 2A 7C 1F D9 D6 ED 87 10 2A 7F C9 EC 2E EC 73 68 F8 56 09 08 3C ED 68 20 2A 7D 29 B2 14 EF 80 60 2A 54 00 10 3A ED A6 18 2A 7F FD 04 2E EC 00 60 28 7C 17 E2 14 FD 40 E0 90 39 29 FF FF EF AD 58 2A 7D 17 02 14 ED AD 58 28 7C 97 4A 14 FD 4A 04 32 54 07 10 3A 55 06 10 3A 55 25 10 3A 54 83 10 3A FD 80 E8 90 7D 78 E1 D6 FD 20 F0 90 38 E7 00 04 38 C6 00 04 FD 8C 04 32 38 A5 00 04 38 63 00 04 7C 18 01 D6 FC 00 04 72 55 6B 10 3A 7F 7B AA 14 ED 08 20 28 7E D6 8A 14 FD 29 50 28 7D 18 41 D6 FD 60 F8 90 54 00 10 3A FD AD 04 72 7F 9C 8A 14 EC C6 18 28 7D 38 49 D6 FC 00 00 18
-
-. 0 100135C0 200
-. 55 08 10 3A EC E7 10 28 FD 6B 60 28 FD 20 48 18 7C 98 21 D6 ED 5B 02 32 55 29 10 3A ED 1A 02 32 EC 89 00 28 ED 4E 51 BA 7D 4A C1 D6 FD A0 68 18 54 84 10 3A ED 29 00 2A EC A5 08 28 FD 60 58 18 7C E7 C1 D6 EC CF 41 B8 ED 9B 01 F2 EC FA 01 F2 EC 0B 68 28 7C C6 C1 D6 ED 8E 61 7A ED 6B 68 2A EC 64 50 28 ED 09 30 28 7C A5 C1 D6 EC AF 39 78 ED A0 60 2A EF FF E8 2A 7C 63 C1 D6 EC EB 28 2A EF DE E0 2A FD 00 40 50 7F EB CD 2E FC 60 18 50 ED 6B 28 28 7F CA CD 2E ED 29 30 2A EC 00 60 28 EC 84 50 2A 7D 79 05 2E 7D 27 CD 2E 7C 08 CD 2E 7C 86 CD 2E 7C E9 CD 2E 7D 05 CD 2E 7D A4 CD 2E 7C 63 CD 2E 42 00 FD AC
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 50, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 50, stride = 1
-. 0 10010074 276
-. 1D 24 00 05 7C E6 C2 14 7C 84 DA 14 7D 29 DA 14 39 29 FF FF 7C 05 4A 14 7D 7C 49 D6 7D 45 02 14 54 08 10 3A 39 08 00 04 7C 1C 01 D6 55 6B 10 3A 7D 4B FC 2E 55 29 10 3A 39 29 00 04 ED 4A 50 2A 54 00 10 3A 7D 5C 51 D6 7C 1F 04 2E EC 00 00 2A 55 4A 10 3A 7D 08 E1 D6 7C EA FC 2E 7D 47 C2 14 ED 8A 00 28 ED 4A 00 2A FC 00 38 90 7D 29 E1 D6 FD A0 50 90 ED 4A 38 2A FD 8C 01 72 7D 69 FC 2E 7D 2A C2 14 7C 17 31 D6 FD AD 01 B8 7C 08 FC 2E 7D 69 C2 14 FD 80 60 18 7C C6 DA 14 EC 00 00 2A 7C F7 39 D6 FD A0 68 18 54 00 10 3A ED 6B 58 2A 7D 5A 05 2E ED 38 00 32 ED 0C 68 28 7D 57 51 D6 ED 8C 68 2A 54 E7 10 3A EC 19 00 32 ED 39 4A F8 FD A0 40 50 7D 37 49 D6 ED 78 02 FA 55 4A 10 3A FC 00 60 50 ED AD 48 28 7D 77 59 D6 ED 8C 58 28 EC 00 58 28 55 29 10 3A ED 08 48 28 7D 87 D5 2E 55 6B 10 3A 7D 0A D5 2E 7D A9 D5 2E 7C 0B D5 2E 42 00 FE F0
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 50, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 50, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 50
-PASS: gsl_fft_complex_forward with signal_noise, n = 50, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 50, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 50, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 50, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 50, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 50, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 50, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 50, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 50, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 50, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 50
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 50, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 50, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 50, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 50, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 50, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 50, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 50, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 50, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 50, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 50, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 50
-PASS: gsl_fft_real with signal_real_noise, n = 50, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 50, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 50, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 50, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 50
-PASS: gsl_fft_real_float with signal_real_noise, n = 50, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 50, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 50, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 50, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 50
-PASS: gsl_fft_complex_forward with signal_noise, n = 50, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 50, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 50, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 50, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 50, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 50, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 50, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 50, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 50, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 50, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 50
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 50, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 50, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 50, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 50, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 50, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 50, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 50, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 50, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 50, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 50, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 50
-PASS: gsl_fft_real with signal_real_noise, n = 50, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 50, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 50, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 50, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 50
-PASS: gsl_fft_real_float with signal_real_noise, n = 50, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 50, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 50, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 51, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 51
-PASS: gsl_fft_complex_forward with signal_noise, n = 51, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 51, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 51, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 51, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 51, stride = 1
-. 0 FE0D6E4 32
-. C9 5C 00 00 FC 5F 50 28 C9 BD 00 00 38 61 00 10 FC 22 68 28 FC 82 08 28 FC 44 68 28 48 01 8B DD
-
-PASS: gsl_fft_complex_forward with signal_exp, n = 51, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 51, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 51
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 51, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 51, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 51, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 51, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 51, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 51, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 51, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 51
-PASS: gsl_fft_real with signal_real_noise, n = 51, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 51, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 51, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 51, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 51
-PASS: gsl_fft_real_float with signal_real_noise, n = 51, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 51, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 51, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 51, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 51
-PASS: gsl_fft_complex_forward with signal_noise, n = 51, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 51, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 51, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 51, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 51, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 51, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 51, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 51, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 51, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 51, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 51
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 51, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 51, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 51, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 51, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 51, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 51, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 51, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 51, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 51, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 51, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 51
-PASS: gsl_fft_real with signal_real_noise, n = 51, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 51, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 51, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 51, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 51
-PASS: gsl_fft_real_float with signal_real_noise, n = 51, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 51, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 51, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 51, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 51
-PASS: gsl_fft_complex_forward with signal_noise, n = 51, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 51, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 51, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 51, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 51, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 51, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 51, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 51, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 51, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 51, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 51
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 51, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 51, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 51, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 51, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 51, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 51, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 51, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 51, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 51, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 51, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 51
-PASS: gsl_fft_real with signal_real_noise, n = 51, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 51, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 51, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 51, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 51
-PASS: gsl_fft_real_float with signal_real_noise, n = 51, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 51, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 51, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 52, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 52
-PASS: gsl_fft_complex_forward with signal_noise, n = 52, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 52, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 52, stride = 1
-. 0 FE0BC44 20
-. 83 BE 0E A4 FC 9E 00 00 C8 5D 00 00 FD AD 00 B2 40 85 01 84
-
-. 0 FE0BDD8 16
-. 81 3E 0E AC C8 29 00 00 FC 1E 68 7A 4B FF FE C0
-
-. 0 FE0BCA4 16
-. C9 A1 00 10 FD 8D 00 2A FF 8D 60 00 41 9E 00 E4
-
-PASS: gsl_fft_complex_forward with signal_pulse, n = 52, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 52, stride = 1
-. 0 FE0BC58 16
-. 81 3E 0E A8 C8 29 00 00 FC 1E 68 7A 48 00 00 40
-
-PASS: gsl_fft_complex_forward with signal_exp, n = 52, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 52, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 52
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 52, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 52, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 52, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 52, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 52, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 52, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 52, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 52
-PASS: gsl_fft_real with signal_real_noise, n = 52, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 52, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 52, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 52, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 52
-PASS: gsl_fft_real_float with signal_real_noise, n = 52, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 52, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 52, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 52, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 52
-PASS: gsl_fft_complex_forward with signal_noise, n = 52, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 52, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 52, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 52, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 52, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 52, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 52, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 52, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 52, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 52, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 52
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 52, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 52, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 52, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 52, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 52, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 52, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 52, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 52, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 52, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 52, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 52
-PASS: gsl_fft_real with signal_real_noise, n = 52, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 52, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 52, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 52, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 52
-PASS: gsl_fft_real_float with signal_real_noise, n = 52, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 52, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 52, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 52, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 52
-PASS: gsl_fft_complex_forward with signal_noise, n = 52, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 52, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 52, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 52, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 52, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 52, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 52, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 52, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 52, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 52, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 52
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 52, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 52, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 52, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 52, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 52, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 52, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 52, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 52, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 52, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 52, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 52
-PASS: gsl_fft_real with signal_real_noise, n = 52, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 52, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 52, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 52, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 52
-PASS: gsl_fft_real_float with signal_real_noise, n = 52, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 52, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 52, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 53, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 53
-PASS: gsl_fft_complex_forward with signal_noise, n = 53, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 53, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 53, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 53, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 53, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 53, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 53, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 53
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 53, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 53, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 53, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 53, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 53, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 53, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 53, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 53
-PASS: gsl_fft_real with signal_real_noise, n = 53, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 53, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 53, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 53, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 53
-PASS: gsl_fft_real_float with signal_real_noise, n = 53, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 53, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 53, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 53, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 53
-PASS: gsl_fft_complex_forward with signal_noise, n = 53, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 53, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 53, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 53, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 53, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 53, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 53, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 53, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 53, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 53, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 53
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 53, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 53, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 53, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 53, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 53, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 53, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 53, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 53, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 53, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 53, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 53
-PASS: gsl_fft_real with signal_real_noise, n = 53, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 53, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 53, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 53, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 53
-PASS: gsl_fft_real_float with signal_real_noise, n = 53, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 53, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 53, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 53, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 53
-PASS: gsl_fft_complex_forward with signal_noise, n = 53, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 53, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 53, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 53, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 53, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 53, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 53, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 53, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 53, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 53, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 53
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 53, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 53, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 53, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 53, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 53, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 53, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 53, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 53, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 53, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 53, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 53
-PASS: gsl_fft_real with signal_real_noise, n = 53, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 53, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 53, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 53, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 53
-PASS: gsl_fft_real_float with signal_real_noise, n = 53, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 53, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 53, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 54, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 54
-PASS: gsl_fft_complex_forward with signal_noise, n = 54, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 54, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 54, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 54, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 54, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 54, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 54, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 54
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 54, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 54, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 54, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 54, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 54, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 54, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 54, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 54
-PASS: gsl_fft_real with signal_real_noise, n = 54, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 54, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 54, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 54, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 54
-PASS: gsl_fft_real_float with signal_real_noise, n = 54, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 54, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 54, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 54, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 54
-PASS: gsl_fft_complex_forward with signal_noise, n = 54, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 54, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 54, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 54, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 54, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 54, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 54, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 54, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 54, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 54, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 54
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 54, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 54, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 54, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 54, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 54, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 54, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 54, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 54, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 54, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 54, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 54
-PASS: gsl_fft_real with signal_real_noise, n = 54, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 54, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 54, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 54, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 54
-PASS: gsl_fft_real_float with signal_real_noise, n = 54, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 54, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 54, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 54, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 54
-PASS: gsl_fft_complex_forward with signal_noise, n = 54, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 54, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 54, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 54, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 54, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 54, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 54, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 54, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 54, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 54, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 54
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 54, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 54, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 54, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 54, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 54, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 54, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 54, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 54, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 54, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 54, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 54
-PASS: gsl_fft_real with signal_real_noise, n = 54, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 54, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 54, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 54, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 54
-PASS: gsl_fft_real_float with signal_real_noise, n = 54, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 54, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 54, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 55, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 55
-PASS: gsl_fft_complex_forward with signal_noise, n = 55, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 55, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 55, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 55, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 55, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 55, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 55, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 55
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 55, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 55, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 55, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 55, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 55, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 55, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 55, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 55
-PASS: gsl_fft_real with signal_real_noise, n = 55, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 55, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 55, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 55, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 55
-PASS: gsl_fft_real_float with signal_real_noise, n = 55, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 55, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 55, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 55, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 55
-PASS: gsl_fft_complex_forward with signal_noise, n = 55, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 55, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 55, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 55, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 55, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 55, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 55, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 55, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 55, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 55, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 55
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 55, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 55, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 55, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 55, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 55, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 55, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 55, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 55, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 55, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 55, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 55
-PASS: gsl_fft_real with signal_real_noise, n = 55, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 55, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 55, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 55, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 55
-PASS: gsl_fft_real_float with signal_real_noise, n = 55, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 55, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 55, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 55, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 55
-PASS: gsl_fft_complex_forward with signal_noise, n = 55, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 55, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 55, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 55, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 55, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 55, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 55, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 55, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 55, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 55, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 55
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 55, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 55, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 55, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 55, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 55, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 55, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 55, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 55, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 55, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 55, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 55
-PASS: gsl_fft_real with signal_real_noise, n = 55, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 55, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 55, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 55, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 55
-PASS: gsl_fft_real_float with signal_real_noise, n = 55, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 55, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 55, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 56, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 56
-PASS: gsl_fft_complex_forward with signal_noise, n = 56, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 56, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 56, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 56, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 56, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 56, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 56, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 56
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 56, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 56, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 56, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 56, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 56, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 56, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 56, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 56
-. 0 10011AD0 76
-. 7C 1D 41 D6 81 81 00 2C 54 EA 18 38 7D 68 62 14 39 4A 00 08 7D 38 39 D6 54 00 18 38 7C 1F 04 AE 7D 08 2A 14 7C E7 8A 14 7D 7D 59 D6 55 29 18 38 7C 09 CD AE 55 6B 18 38 7D 4A C1 D6 7C 0B FC AE FC 00 00 50 7C 0A CD AE 42 00 FF B8
-
-PASS: gsl_fft_real with signal_real_noise, n = 56, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 56, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 56, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 56, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 56
-. 0 10013AFC 76
-. 7C 1F 41 D6 81 81 00 2C 54 EA 10 3A 7D 68 62 14 39 4A 00 04 7D 38 39 D6 54 00 10 3A 7C 1D 04 2E 7D 08 22 14 7C E7 8A 14 7D 7F 59 D6 55 29 10 3A 7C 09 CD 2E 55 6B 10 3A 7D 4A C1 D6 7C 0B EC 2E FC 00 00 50 7C 0A CD 2E 42 00 FF B8
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 56, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 56, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 56, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 56, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 56
-PASS: gsl_fft_complex_forward with signal_noise, n = 56, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 56, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 56, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 56, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 56, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 56, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 56, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 56, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 56, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 56, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 56
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 56, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 56, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 56, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 56, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 56, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 56, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 56, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 56, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 56, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 56, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 56
-PASS: gsl_fft_real with signal_real_noise, n = 56, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 56, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 56, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 56, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 56
-PASS: gsl_fft_real_float with signal_real_noise, n = 56, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 56, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 56, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 56, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 56
-PASS: gsl_fft_complex_forward with signal_noise, n = 56, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 56, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 56, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 56, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 56, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 56, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 56, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 56, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 56, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 56, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 56
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 56, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 56, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 56, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 56, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 56, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 56, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 56, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 56, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 56, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 56, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 56
-PASS: gsl_fft_real with signal_real_noise, n = 56, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 56, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 56, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 56, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 56
-PASS: gsl_fft_real_float with signal_real_noise, n = 56, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 56, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 56, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 57, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 57
-PASS: gsl_fft_complex_forward with signal_noise, n = 57, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 57, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 57, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 57, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 57, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 57, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 57, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 57
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 57, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 57, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 57, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 57, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 57, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 57, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 57, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 57
-PASS: gsl_fft_real with signal_real_noise, n = 57, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 57, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 57, stride = 1
-. 0 FEF19B8 12
-. 7F A0 F8 28 7C 00 F9 2D 40 A2 FF F8
-
-PASS: gsl_fft_real_wavetable_float_alloc, n = 57, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 57
-PASS: gsl_fft_real_float with signal_real_noise, n = 57, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 57, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 57, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 57, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 57
-PASS: gsl_fft_complex_forward with signal_noise, n = 57, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 57, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 57, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 57, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 57, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 57, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 57, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 57, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 57, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 57, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 57
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 57, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 57, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 57, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 57, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 57, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 57, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 57, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 57, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 57, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 57, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 57
-PASS: gsl_fft_real with signal_real_noise, n = 57, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 57, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 57, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 57, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 57
-PASS: gsl_fft_real_float with signal_real_noise, n = 57, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 57, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 57, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 57, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 57
-PASS: gsl_fft_complex_forward with signal_noise, n = 57, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 57, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 57, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 57, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 57, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 57, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 57, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 57, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 57, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 57, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 57
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 57, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 57, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 57, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 57, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 57, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 57, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 57, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 57, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 57, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 57, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 57
-PASS: gsl_fft_real with signal_real_noise, n = 57, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 57, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 57, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 57, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 57
-PASS: gsl_fft_real_float with signal_real_noise, n = 57, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 57, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 57, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 58, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 58
-PASS: gsl_fft_complex_forward with signal_noise, n = 58, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 58, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 58, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 58, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 58, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 58, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 58, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 58
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 58, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 58, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 58, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 58, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 58, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 58, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 58, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 58
-PASS: gsl_fft_real with signal_real_noise, n = 58, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 58, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 58, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 58, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 58
-PASS: gsl_fft_real_float with signal_real_noise, n = 58, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 58, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 58, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 58, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 58
-PASS: gsl_fft_complex_forward with signal_noise, n = 58, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 58, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 58, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 58, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 58, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 58, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 58, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 58, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 58, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 58, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 58
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 58, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 58, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 58, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 58, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 58, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 58, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 58, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 58, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 58, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 58, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 58
-PASS: gsl_fft_real with signal_real_noise, n = 58, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 58, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 58, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 58, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 58
-PASS: gsl_fft_real_float with signal_real_noise, n = 58, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 58, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 58, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 58, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 58
-PASS: gsl_fft_complex_forward with signal_noise, n = 58, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 58, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 58, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 58, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 58, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 58, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 58, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 58, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 58, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 58, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 58
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 58, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 58, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 58, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 58, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 58, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 58, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 58, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 58, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 58, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 58, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 58
-PASS: gsl_fft_real with signal_real_noise, n = 58, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 58, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 58, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 58, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 58
-PASS: gsl_fft_real_float with signal_real_noise, n = 58, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 58, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 58, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 59, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 59
-PASS: gsl_fft_complex_forward with signal_noise, n = 59, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 59, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 59, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 59, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 59, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 59, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 59, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 59
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 59, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 59, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 59, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 59, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 59, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 59, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 59, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 59
-PASS: gsl_fft_real with signal_real_noise, n = 59, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 59, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 59, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 59, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 59
-PASS: gsl_fft_real_float with signal_real_noise, n = 59, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 59, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 59, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 59, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 59
-PASS: gsl_fft_complex_forward with signal_noise, n = 59, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 59, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 59, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 59, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 59, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 59, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 59, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 59, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 59, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 59, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 59
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 59, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 59, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 59, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 59, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 59, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 59, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 59, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 59, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 59, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 59, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 59
-PASS: gsl_fft_real with signal_real_noise, n = 59, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 59, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 59, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 59, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 59
-PASS: gsl_fft_real_float with signal_real_noise, n = 59, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 59, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 59, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 59, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 59
-PASS: gsl_fft_complex_forward with signal_noise, n = 59, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 59, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 59, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 59, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 59, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 59, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 59, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 59, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 59, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 59, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 59
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 59, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 59, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 59, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 59, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 59, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 59, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 59, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 59, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 59, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 59, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 59
-PASS: gsl_fft_real with signal_real_noise, n = 59, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 59, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 59, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 59, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 59
-PASS: gsl_fft_real_float with signal_real_noise, n = 59, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 59, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 59, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 60, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 60
-PASS: gsl_fft_complex_forward with signal_noise, n = 60, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 60, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 60, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 60, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 60, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 60, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 60, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 60
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 60, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 60, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 60, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 60, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 60, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 60, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 60, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 60
-PASS: gsl_fft_real with signal_real_noise, n = 60, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 60, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 60, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 60, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 60
-PASS: gsl_fft_real_float with signal_real_noise, n = 60, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 60, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 60, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 60, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 60
-PASS: gsl_fft_complex_forward with signal_noise, n = 60, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 60, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 60, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 60, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 60, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 60, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 60, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 60, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 60, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 60, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 60
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 60, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 60, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 60, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 60, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 60, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 60, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 60, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 60, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 60, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 60, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 60
-PASS: gsl_fft_real with signal_real_noise, n = 60, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 60, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 60, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 60, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 60
-PASS: gsl_fft_real_float with signal_real_noise, n = 60, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 60, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 60, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 60, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 60
-PASS: gsl_fft_complex_forward with signal_noise, n = 60, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 60, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 60, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 60, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 60, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 60, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 60, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 60, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 60, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 60, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 60
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 60, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 60, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 60, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 60, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 60, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 60, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 60, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 60, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 60, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 60, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 60
-PASS: gsl_fft_real with signal_real_noise, n = 60, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 60, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 60, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 60, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 60
-PASS: gsl_fft_real_float with signal_real_noise, n = 60, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 60, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 60, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 61, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 61
-PASS: gsl_fft_complex_forward with signal_noise, n = 61, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 61, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 61, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 61, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 61, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 61, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 61, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 61
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 61, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 61, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 61, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 61, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 61, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 61, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 61, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 61
-PASS: gsl_fft_real with signal_real_noise, n = 61, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 61, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 61, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 61, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 61
-PASS: gsl_fft_real_float with signal_real_noise, n = 61, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 61, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 61, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 61, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 61
-PASS: gsl_fft_complex_forward with signal_noise, n = 61, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 61, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 61, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 61, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 61, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 61, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 61, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 61, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 61, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 61, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 61
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 61, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 61, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 61, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 61, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 61, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 61, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 61, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 61, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 61, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 61, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 61
-PASS: gsl_fft_real with signal_real_noise, n = 61, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 61, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 61, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 61, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 61
-PASS: gsl_fft_real_float with signal_real_noise, n = 61, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 61, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 61, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 61, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 61
-PASS: gsl_fft_complex_forward with signal_noise, n = 61, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 61, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 61, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 61, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 61, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 61, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 61, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 61, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 61, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 61, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 61
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 61, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 61, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 61, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 61, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 61, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 61, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 61, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 61, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 61, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 61, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 61
-PASS: gsl_fft_real with signal_real_noise, n = 61, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 61, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 61, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 61, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 61
-PASS: gsl_fft_real_float with signal_real_noise, n = 61, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 61, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 61, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 62, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 62
-PASS: gsl_fft_complex_forward with signal_noise, n = 62, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 62, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 62, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 62, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 62, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 62, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 62, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 62
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 62, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 62, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 62, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 62, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 62, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 62, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 62, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 62
-PASS: gsl_fft_real with signal_real_noise, n = 62, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 62, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 62, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 62, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 62
-PASS: gsl_fft_real_float with signal_real_noise, n = 62, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 62, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 62, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 62, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 62
-PASS: gsl_fft_complex_forward with signal_noise, n = 62, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 62, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 62, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 62, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 62, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 62, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 62, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 62, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 62, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 62, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 62
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 62, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 62, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 62, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 62, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 62, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 62, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 62, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 62, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 62, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 62, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 62
-PASS: gsl_fft_real with signal_real_noise, n = 62, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 62, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 62, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 62, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 62
-PASS: gsl_fft_real_float with signal_real_noise, n = 62, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 62, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 62, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 62, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 62
-PASS: gsl_fft_complex_forward with signal_noise, n = 62, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 62, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 62, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 62, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 62, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 62, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 62, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 62, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 62, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 62, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 62
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 62, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 62, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 62, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 62, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 62, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 62, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 62, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 62, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 62, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 62, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 62
-PASS: gsl_fft_real with signal_real_noise, n = 62, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 62, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 62, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 62, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 62
-PASS: gsl_fft_real_float with signal_real_noise, n = 62, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 62, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 62, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 63, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 63
-PASS: gsl_fft_complex_forward with signal_noise, n = 63, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 63, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 63, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 63, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 63, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 63, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 63, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 63
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 63, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 63, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 63, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 63, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 63, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 63, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 63, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 63
-PASS: gsl_fft_real with signal_real_noise, n = 63, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 63, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 63, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 63, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 63
-PASS: gsl_fft_real_float with signal_real_noise, n = 63, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 63, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 63, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 63, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 63
-PASS: gsl_fft_complex_forward with signal_noise, n = 63, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 63, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 63, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 63, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 63, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 63, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 63, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 63, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 63, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 63, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 63
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 63, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 63, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 63, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 63, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 63, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 63, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 63, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 63, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 63, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 63, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 63
-PASS: gsl_fft_real with signal_real_noise, n = 63, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 63, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 63, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 63, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 63
-PASS: gsl_fft_real_float with signal_real_noise, n = 63, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 63, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 63, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 63, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 63
-PASS: gsl_fft_complex_forward with signal_noise, n = 63, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 63, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 63, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 63, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 63, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 63, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 63, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 63, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 63, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 63, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 63
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 63, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 63, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 63, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 63, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 63, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 63, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 63, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 63, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 63, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 63, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 63
-PASS: gsl_fft_real with signal_real_noise, n = 63, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 63, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 63, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 63, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 63
-PASS: gsl_fft_real_float with signal_real_noise, n = 63, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 63, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 63, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 64, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 64
-PASS: gsl_fft_complex_forward with signal_noise, n = 64, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 64, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 64, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 64, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 64, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 64, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 64, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 64
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 64, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 64, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 64, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 64, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 64, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 64, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 64, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 64
-PASS: gsl_fft_real with signal_real_noise, n = 64, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 64, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 64, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 64, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 64
-PASS: gsl_fft_real_float with signal_real_noise, n = 64, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 64, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 64, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 64, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 64
-PASS: gsl_fft_complex_forward with signal_noise, n = 64, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 64, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 64, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 64, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 64, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 64, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 64, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 64, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 64, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 64, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 64
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 64, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 64, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 64, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 64, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 64, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 64, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 64, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 64, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 64, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 64, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 64
-PASS: gsl_fft_real with signal_real_noise, n = 64, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 64, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 64, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 64, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 64
-PASS: gsl_fft_real_float with signal_real_noise, n = 64, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 64, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 64, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 64, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 64
-PASS: gsl_fft_complex_forward with signal_noise, n = 64, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 64, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 64, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 64, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 64, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 64, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 64, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 64, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 64, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 64, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 64
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 64, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 64, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 64, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 64, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 64, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 64, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 64, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 64, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 64, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 64, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 64
-PASS: gsl_fft_real with signal_real_noise, n = 64, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 64, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 64, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 64, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 64
-PASS: gsl_fft_real_float with signal_real_noise, n = 64, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 64, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 64, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 65, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 65
-PASS: gsl_fft_complex_forward with signal_noise, n = 65, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 65, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 65, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 65, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 65, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 65, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 65, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 65
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 65, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 65, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 65, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 65, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 65, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 65, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 65, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 65
-PASS: gsl_fft_real with signal_real_noise, n = 65, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 65, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 65, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 65, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 65
-PASS: gsl_fft_real_float with signal_real_noise, n = 65, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 65, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 65, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 65, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 65
-PASS: gsl_fft_complex_forward with signal_noise, n = 65, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 65, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 65, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 65, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 65, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 65, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 65, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 65, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 65, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 65, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 65
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 65, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 65, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 65, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 65, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 65, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 65, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 65, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 65, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 65, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 65, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 65
-PASS: gsl_fft_real with signal_real_noise, n = 65, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 65, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 65, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 65, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 65
-PASS: gsl_fft_real_float with signal_real_noise, n = 65, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 65, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 65, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 65, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 65
-PASS: gsl_fft_complex_forward with signal_noise, n = 65, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 65, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 65, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 65, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 65, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 65, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 65, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 65, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 65, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 65, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 65
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 65, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 65, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 65, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 65, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 65, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 65, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 65, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 65, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 65, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 65, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 65
-PASS: gsl_fft_real with signal_real_noise, n = 65, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 65, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 65, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 65, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 65
-PASS: gsl_fft_real_float with signal_real_noise, n = 65, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 65, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 65, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 66, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 66
-PASS: gsl_fft_complex_forward with signal_noise, n = 66, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 66, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 66, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 66, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 66, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 66, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 66, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 66
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 66, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 66, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 66, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 66, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 66, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 66, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 66, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 66
-PASS: gsl_fft_real with signal_real_noise, n = 66, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 66, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 66, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 66, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 66
-PASS: gsl_fft_real_float with signal_real_noise, n = 66, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 66, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 66, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 66, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 66
-PASS: gsl_fft_complex_forward with signal_noise, n = 66, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 66, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 66, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 66, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 66, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 66, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 66, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 66, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 66, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 66, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 66
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 66, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 66, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 66, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 66, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 66, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 66, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 66, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 66, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 66, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 66, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 66
-PASS: gsl_fft_real with signal_real_noise, n = 66, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 66, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 66, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 66, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 66
-PASS: gsl_fft_real_float with signal_real_noise, n = 66, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 66, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 66, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 66, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 66
-PASS: gsl_fft_complex_forward with signal_noise, n = 66, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 66, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 66, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 66, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 66, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 66, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 66, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 66, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 66, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 66, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 66
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 66, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 66, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 66, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 66, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 66, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 66, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 66, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 66, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 66, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 66, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 66
-PASS: gsl_fft_real with signal_real_noise, n = 66, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 66, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 66, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 66, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 66
-PASS: gsl_fft_real_float with signal_real_noise, n = 66, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 66, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 66, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 67, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 67
-PASS: gsl_fft_complex_forward with signal_noise, n = 67, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 67, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 67, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 67, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 67, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 67, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 67, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 67
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 67, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 67, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 67, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 67, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 67, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 67, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 67, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 67
-PASS: gsl_fft_real with signal_real_noise, n = 67, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 67, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 67, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 67, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 67
-PASS: gsl_fft_real_float with signal_real_noise, n = 67, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 67, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 67, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 67, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 67
-PASS: gsl_fft_complex_forward with signal_noise, n = 67, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 67, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 67, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 67, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 67, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 67, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 67, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 67, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 67, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 67, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 67
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 67, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 67, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 67, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 67, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 67, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 67, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 67, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 67, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 67, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 67, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 67
-PASS: gsl_fft_real with signal_real_noise, n = 67, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 67, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 67, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 67, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 67
-PASS: gsl_fft_real_float with signal_real_noise, n = 67, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 67, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 67, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 67, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 67
-PASS: gsl_fft_complex_forward with signal_noise, n = 67, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 67, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 67, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 67, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 67, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 67, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 67, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 67, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 67, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 67, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 67
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 67, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 67, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 67, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 67, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 67, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 67, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 67, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 67, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 67, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 67, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 67
-PASS: gsl_fft_real with signal_real_noise, n = 67, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 67, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 67, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 67, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 67
-PASS: gsl_fft_real_float with signal_real_noise, n = 67, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 67, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 67, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 68, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 68
-PASS: gsl_fft_complex_forward with signal_noise, n = 68, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 68, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 68, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 68, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 68, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 68, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 68, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 68
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 68, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 68, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 68, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 68, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 68, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 68, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 68, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 68
-PASS: gsl_fft_real with signal_real_noise, n = 68, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 68, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 68, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 68, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 68
-PASS: gsl_fft_real_float with signal_real_noise, n = 68, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 68, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 68, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 68, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 68
-PASS: gsl_fft_complex_forward with signal_noise, n = 68, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 68, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 68, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 68, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 68, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 68, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 68, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 68, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 68, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 68, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 68
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 68, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 68, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 68, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 68, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 68, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 68, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 68, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 68, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 68, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 68, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 68
-PASS: gsl_fft_real with signal_real_noise, n = 68, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 68, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 68, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 68, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 68
-PASS: gsl_fft_real_float with signal_real_noise, n = 68, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 68, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 68, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 68, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 68
-PASS: gsl_fft_complex_forward with signal_noise, n = 68, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 68, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 68, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 68, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 68, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 68, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 68, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 68, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 68, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 68, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 68
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 68, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 68, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 68, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 68, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 68, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 68, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 68, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 68, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 68, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 68, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 68
-PASS: gsl_fft_real with signal_real_noise, n = 68, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 68, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 68, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 68, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 68
-PASS: gsl_fft_real_float with signal_real_noise, n = 68, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 68, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 68, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 69, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 69
-PASS: gsl_fft_complex_forward with signal_noise, n = 69, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 69, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 69, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 69, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 69, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 69, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 69, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 69
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 69, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 69, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 69, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 69, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 69, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 69, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 69, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 69
-PASS: gsl_fft_real with signal_real_noise, n = 69, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 69, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 69, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 69, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 69
-PASS: gsl_fft_real_float with signal_real_noise, n = 69, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 69, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 69, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 69, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 69
-PASS: gsl_fft_complex_forward with signal_noise, n = 69, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 69, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 69, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 69, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 69, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 69, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 69, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 69, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 69, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 69, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 69
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 69, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 69, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 69, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 69, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 69, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 69, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 69, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 69, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 69, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 69, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 69
-PASS: gsl_fft_real with signal_real_noise, n = 69, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 69, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 69, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 69, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 69
-PASS: gsl_fft_real_float with signal_real_noise, n = 69, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 69, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 69, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 69, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 69
-PASS: gsl_fft_complex_forward with signal_noise, n = 69, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 69, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 69, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 69, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 69, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 69, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 69, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 69, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 69, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 69, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 69
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 69, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 69, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 69, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 69, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 69, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 69, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 69, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 69, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 69, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 69, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 69
-PASS: gsl_fft_real with signal_real_noise, n = 69, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 69, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 69, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 69, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 69
-PASS: gsl_fft_real_float with signal_real_noise, n = 69, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 69, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 69, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 70, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 70
-PASS: gsl_fft_complex_forward with signal_noise, n = 70, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 70, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 70, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 70, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 70, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 70, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 70, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 70
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 70, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 70, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 70, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 70, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 70, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 70, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 70, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 70
-PASS: gsl_fft_real with signal_real_noise, n = 70, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 70, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 70, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 70, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 70
-PASS: gsl_fft_real_float with signal_real_noise, n = 70, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 70, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 70, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 70, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 70
-PASS: gsl_fft_complex_forward with signal_noise, n = 70, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 70, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 70, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 70, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 70, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 70, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 70, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 70, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 70, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 70, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 70
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 70, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 70, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 70, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 70, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 70, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 70, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 70, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 70, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 70, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 70, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 70
-PASS: gsl_fft_real with signal_real_noise, n = 70, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 70, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 70, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 70, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 70
-PASS: gsl_fft_real_float with signal_real_noise, n = 70, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 70, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 70, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 70, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 70
-PASS: gsl_fft_complex_forward with signal_noise, n = 70, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 70, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 70, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 70, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 70, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 70, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 70, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 70, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 70, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 70, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 70
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 70, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 70, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 70, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 70, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 70, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 70, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 70, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 70, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 70, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 70, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 70
-PASS: gsl_fft_real with signal_real_noise, n = 70, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 70, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 70, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 70, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 70
-PASS: gsl_fft_real_float with signal_real_noise, n = 70, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 70, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 70, stride = 3
-. 0 FE0D5E8 240
-. C8 0A 00 00 C9 3D 00 00 FD 00 38 28 FD 40 48 50 FC 68 00 28 D9 01 00 30 81 41 00 30 81 61 00 34 FC 83 38 2A FC 40 20 50 FD 22 00 B2 C8 E5 00 00 CB C6 00 00 55 6B 28 34 CB 87 00 00 7C AB 42 14 80 FE 0F 84 FF A9 3F BA C8 83 00 00 CB 47 00 00 C8 C4 00 00 FF 62 D0 2A C8 65 00 08 FD 7D E2 7A 7F AB 44 AE 80 7E 0F 88 FD 9D D0 2A FD 1B D0 28 FC 2B 02 72 C9 65 00 18 FF CC D0 28 FC 02 40 28 FD A2 0A BA C8 25 00 10 FC E0 50 2A FC BD F0 28 FF 81 03 72 FF 69 21 BA FF 42 02 72 FC 9E 02 32 FD 45 18 2A FD 9E 01 F2 FC 0B E0 28 FD 3A 06 F2 CB 43 00 00 FC 6A 00 B2 FF 81 20 28 FD A0 60 28 FC BD 02 72 FF C1 E0 28 FC CD 18 28 FC FE 20 28 FC 46 28 28 FF 62 38 2A FC 3C D8 2A FD 7C 08 28 FF BB 58 2A FD 5D 0E BA FE 0A 08 00 41 92 00 68
-
-PASS: gsl_fft_complex_wavetable_alloc, n = 71, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 71
-PASS: gsl_fft_complex_forward with signal_noise, n = 71, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 71, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 71, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 71, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 71, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 71, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 71, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 71
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 71, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 71, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 71, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 71, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 71, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 71, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 71, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 71
-PASS: gsl_fft_real with signal_real_noise, n = 71, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 71, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 71, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 71, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 71
-PASS: gsl_fft_real_float with signal_real_noise, n = 71, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 71, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 71, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 71, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 71
-PASS: gsl_fft_complex_forward with signal_noise, n = 71, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 71, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 71, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 71, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 71, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 71, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 71, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 71, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 71, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 71, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 71
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 71, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 71, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 71, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 71, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 71, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 71, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 71, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 71, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 71, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 71, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 71
-PASS: gsl_fft_real with signal_real_noise, n = 71, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 71, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 71, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 71, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 71
-PASS: gsl_fft_real_float with signal_real_noise, n = 71, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 71, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 71, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 71, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 71
-PASS: gsl_fft_complex_forward with signal_noise, n = 71, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 71, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 71, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 71, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 71, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 71, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 71, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 71, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 71, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 71, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 71
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 71, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 71, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 71, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 71, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 71, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 71, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 71, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 71, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 71, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 71, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 71
-PASS: gsl_fft_real with signal_real_noise, n = 71, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 71, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 71, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 71, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 71
-PASS: gsl_fft_real_float with signal_real_noise, n = 71, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 71, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 71, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 72, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 72
-PASS: gsl_fft_complex_forward with signal_noise, n = 72, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 72, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 72, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 72, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 72, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 72, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 72, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 72
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 72, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 72, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 72, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 72, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 72, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 72, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 72, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 72
-PASS: gsl_fft_real with signal_real_noise, n = 72, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 72, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 72, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 72, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 72
-PASS: gsl_fft_real_float with signal_real_noise, n = 72, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 72, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 72, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 72, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 72
-PASS: gsl_fft_complex_forward with signal_noise, n = 72, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 72, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 72, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 72, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 72, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 72, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 72, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 72, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 72, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 72, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 72
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 72, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 72, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 72, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 72, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 72, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 72, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 72, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 72, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 72, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 72, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 72
-PASS: gsl_fft_real with signal_real_noise, n = 72, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 72, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 72, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 72, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 72
-PASS: gsl_fft_real_float with signal_real_noise, n = 72, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 72, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 72, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 72, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 72
-PASS: gsl_fft_complex_forward with signal_noise, n = 72, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 72, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 72, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 72, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 72, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 72, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 72, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 72, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 72, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 72, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 72
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 72, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 72, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 72, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 72, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 72, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 72, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 72, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 72, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 72, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 72, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 72
-PASS: gsl_fft_real with signal_real_noise, n = 72, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 72, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 72, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 72, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 72
-PASS: gsl_fft_real_float with signal_real_noise, n = 72, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 72, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 72, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 73, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 73
-PASS: gsl_fft_complex_forward with signal_noise, n = 73, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 73, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 73, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 73, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 73, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 73, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 73, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 73
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 73, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 73, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 73, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 73, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 73, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 73, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 73, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 73
-PASS: gsl_fft_real with signal_real_noise, n = 73, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 73, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 73, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 73, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 73
-PASS: gsl_fft_real_float with signal_real_noise, n = 73, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 73, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 73, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 73, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 73
-PASS: gsl_fft_complex_forward with signal_noise, n = 73, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 73, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 73, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 73, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 73, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 73, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 73, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 73, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 73, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 73, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 73
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 73, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 73, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 73, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 73, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 73, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 73, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 73, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 73, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 73, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 73, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 73
-PASS: gsl_fft_real with signal_real_noise, n = 73, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 73, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 73, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 73, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 73
-PASS: gsl_fft_real_float with signal_real_noise, n = 73, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 73, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 73, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 73, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 73
-PASS: gsl_fft_complex_forward with signal_noise, n = 73, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 73, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 73, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 73, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 73, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 73, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 73, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 73, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 73, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 73, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 73
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 73, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 73, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 73, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 73, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 73, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 73, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 73, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 73, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 73, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 73, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 73
-PASS: gsl_fft_real with signal_real_noise, n = 73, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 73, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 73, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 73, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 73
-PASS: gsl_fft_real_float with signal_real_noise, n = 73, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 73, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 73, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 74, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 74
-PASS: gsl_fft_complex_forward with signal_noise, n = 74, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 74, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 74, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 74, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 74, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 74, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 74, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 74
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 74, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 74, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 74, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 74, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 74, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 74, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 74, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 74
-PASS: gsl_fft_real with signal_real_noise, n = 74, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 74, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 74, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 74, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 74
-PASS: gsl_fft_real_float with signal_real_noise, n = 74, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 74, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 74, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 74, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 74
-PASS: gsl_fft_complex_forward with signal_noise, n = 74, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 74, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 74, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 74, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 74, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 74, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 74, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 74, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 74, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 74, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 74
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 74, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 74, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 74, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 74, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 74, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 74, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 74, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 74, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 74, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 74, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 74
-PASS: gsl_fft_real with signal_real_noise, n = 74, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 74, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 74, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 74, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 74
-PASS: gsl_fft_real_float with signal_real_noise, n = 74, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 74, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 74, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 74, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 74
-PASS: gsl_fft_complex_forward with signal_noise, n = 74, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 74, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 74, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 74, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 74, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 74, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 74, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 74, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 74, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 74, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 74
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 74, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 74, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 74, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 74, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 74, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 74, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 74, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 74, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 74, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 74, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 74
-PASS: gsl_fft_real with signal_real_noise, n = 74, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 74, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 74, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 74, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 74
-PASS: gsl_fft_real_float with signal_real_noise, n = 74, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 74, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 74, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 75, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 75
-PASS: gsl_fft_complex_forward with signal_noise, n = 75, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 75, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 75, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 75, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 75, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 75, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 75, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 75
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 75, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 75, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 75, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 75, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 75, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 75, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 75, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 75
-PASS: gsl_fft_real with signal_real_noise, n = 75, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 75, stride = 1
-. 0 1000DBC8 400
-. 1C F5 00 05 7C 7F CA 14 7E B5 DA 14 7D 76 38 50 7C E7 B2 14 7D 6B C2 14 38 E7 FF FF 39 6B FF FF 7C 18 3A 14 7C D8 5A 14 55 6A 18 38 54 C9 18 38 39 4A 00 08 39 29 00 08 7D 18 02 14 7D 29 E1 D6 54 05 18 38 55 04 18 38 38 A5 00 08 38 84 00 08 7D 4A E1 D6 7D 09 EC AE 54 E9 18 38 FD 00 40 50 39 29 00 08 7C 1C 01 D6 7C 8A EC AE 7D 43 CA 14 FC 80 20 50 7D 1C 41 D6 54 00 18 38 7C FD 04 AE 7C 0A CA 14 7C DC 31 D6 55 08 18 38 7D 48 EC AE 7D 00 CA 14 7D 7C 59 D6 54 C6 18 38 7C A6 EC AE 55 46 18 38 38 C6 00 08 FC CA 28 2A 7C A5 E1 D6 55 6B 18 38 7C 6B EC AE FD 4A 28 28 57 EB 18 38 FD A7 18 2A 39 6B 00 08 7C 84 E1 D6 7D 65 EC AE FC B9 02 B2 54 05 18 38 38 A5 00 08 FD 8B 20 2A 7C 04 EC AE FF 6D 30 2A 7C FC 39 D6 FD AD 30 28 FD 20 40 2A 55 04 18 38 FC 00 40 28 38 84 00 08 FD 1B 03 B2 7D 29 E1 D6 54 E7 18 38 FF 4C 48 2A 7C 47 EC AE FD 8C 48 28 54 67 18 38 FC D9 00 32 38 E7 00 08 7C 29 EC AE 7C 77 19 D6 FD 3A 03 B2 FD 58 02 B2 7D 37 F9 D6 54 63 18 38 FC 18 00 32 7F FF DA 14 FC E7 18 28 FD 6B 20 28 7D 57 51 D6 FD AD 03 F2 55 29 18 38 FD 8C 03 F2 7C 17 01 D6 55 4A 18 38 FD 02 40 28 FD 21 48 28 FC B8 29 F8 7D 17 41 D6 54 00 18 38 FC D8 32 F8 FC F9 51 FA 7D 6B B9 D6 55 08 18 38 FD 79 02 FA FD 49 60 28
-
-. 0 1000DD58 176
-. FC 08 68 28 7C E7 B9 D6 FD 08 68 2A FD 29 60 2A FD A0 30 2A FD 8A 28 28 7C C6 B9 D6 FC 88 58 2A FC 69 38 28 FD 08 58 28 FD 29 38 2A 7C A5 B9 D6 FC 00 30 28 FD 4A 28 2A FF F6 02 32 7C 84 B9 D6 FF D4 00 32 FF B2 03 72 FF 90 01 32 FD 76 02 72 FC F4 02 B2 FC D2 03 32 FC B0 00 F2 FD 37 FA 7A FD 55 F2 BA FD 93 EB 3A FC 71 E0 FA FD 17 5A 38 FC 15 38 38 FD B3 33 78 FC 91 29 38 FC 42 D8 2A FC 21 D0 2A 7C 49 D5 AE 7C 2B D5 AE 7D 03 D5 AE 7D 27 D5 AE 7C 0A D5 AE 7D 46 D5 AE 7D BA 05 AE 7D 85 D5 AE 7C 88 D5 AE 7C 64 D5 AE 42 00 FD C4
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 75, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 75, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 75
-PASS: gsl_fft_real_float with signal_real_noise, n = 75, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 75, stride = 1
-. 0 1000FDC4 400
-. 1C F4 00 05 7F B9 C2 14 7C 7D C2 14 7E 94 DA 14 7D 75 38 50 7C E7 AA 14 7D 6B B2 14 38 E7 FF FF 39 6B FF FF 7C 16 3A 14 7C D6 5A 14 55 6A 10 3A 54 C9 10 3A 39 4A 00 04 39 29 00 04 7D 16 02 14 7D 29 E1 D6 54 05 10 3A 55 04 10 3A 38 A5 00 04 38 84 00 04 7D 4A E1 D6 7C 89 FC 2E 54 E9 10 3A FC 80 20 50 39 29 00 04 7C 1C 01 D6 7C 6A FC 2E FC 60 18 50 7D 1C 41 D6 54 00 10 3A 7C BF 04 2E 7C DC 31 D6 55 08 10 3A 7C C8 FC 2E 7D 7C 59 D6 54 C6 10 3A 7F E6 FC 2E 57 A6 10 3A 38 C6 00 04 ED 66 F8 2A 7C A5 E1 D6 55 6B 10 3A 7F CB FC 2E EC C6 F8 28 7D 63 C2 14 EC 05 F0 2A 55 6A 10 3A 7C 84 E1 D6 7C E5 FC 2E EC A5 F0 28 54 65 10 3A ED A7 18 2A 38 A5 00 04 EF 60 58 2A 39 4A 00 04 7D 04 FC 2E 7C FC 39 D6 EC 00 58 28 ED 88 20 2A FD 40 D8 90 7D 29 E1 D6 54 E7 10 3A EF 4D 60 2A 7C 47 FC 2E ED AD 60 28 7C EB C2 14 FD 4A 03 B2 54 E8 10 3A 7C 29 FC 2E 57 29 10 3A FD 20 D0 90 7C 17 C9 D6 39 29 00 04 39 08 00 04 FD 29 03 B2 7F 39 DA 14 7F B7 E9 D6 54 00 10 3A FD 80 10 90 FD 60 08 90 FC 00 03 F2 7C 77 19 D6 57 BD 10 3A FD AD 03 F2 ED 08 20 28 FD 8C 50 28 7D 77 59 D6 FD 6B 48 28 54 63 10 3A EC E7 18 28 FC 00 00 18 FD A0 68 18 7C F7 39 D6 FD 80 60 18 55 6B 10 3A FD 60 58 18 ED 39 01 B2 ED 59 02 32 7D 29 B9 D6
-
-. 0 1000FF54 208
-. EC D8 01 B2 54 E7 10 3A ED 18 02 32 ED 38 49 78 ED 58 51 F8 7C C6 B9 D6 EC 8C 00 28 EC 6B 68 28 EC B9 31 7A EC F9 41 FA 7C A5 B9 D6 ED 8C 00 2A ED 6B 68 2A EC 04 50 2A ED A3 48 28 7D 4A B9 D6 ED 0C 38 2A EC CB 28 28 ED 8C 38 28 ED 6B 28 2A 7D 08 B9 D6 EC 84 50 28 EC 63 48 2A ED 56 03 32 ED 34 01 32 EC F2 00 32 EC B0 02 32 EF F6 02 F2 EF D4 00 F2 EF B2 03 72 EF 90 01 B2 EC 42 D8 2A EC 21 D0 2A ED 77 52 FA EC 75 48 FA 7C 5A 05 2E ED B3 3B 7A 7C 29 D5 2E EC D1 29 BA ED 97 FB 38 EC 95 F1 38 EC 13 E8 38 ED 11 E2 38 7D 9D D5 2E 7D 66 D5 2E 7C 83 D5 2E 7C 65 D5 2E 7C 0B D5 2E 7D AA D5 2E 7D 07 D5 2E 7C C8 D5 2E 42 00 FD A4
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 75, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 75, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 75
-PASS: gsl_fft_complex_forward with signal_noise, n = 75, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 75, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 75, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 75, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 75, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 75, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 75, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 75, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 75, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 75, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 75
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 75, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 75, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 75, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 75, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 75, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 75, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 75, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 75, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 75, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 75, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 75
-PASS: gsl_fft_real with signal_real_noise, n = 75, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 75, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 75, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 75, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 75
-PASS: gsl_fft_real_float with signal_real_noise, n = 75, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 75, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 75, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 75, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 75
-PASS: gsl_fft_complex_forward with signal_noise, n = 75, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 75, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 75, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 75, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 75, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 75, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 75, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 75, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 75, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 75, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 75
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 75, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 75, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 75, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 75, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 75, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 75, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 75, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 75, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 75, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 75, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 75
-PASS: gsl_fft_real with signal_real_noise, n = 75, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 75, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 75, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 75, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 75
-PASS: gsl_fft_real_float with signal_real_noise, n = 75, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 75, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 75, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 76, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 76
-PASS: gsl_fft_complex_forward with signal_noise, n = 76, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 76, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 76, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 76, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 76, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 76, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 76, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 76
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 76, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 76, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 76, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 76, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 76, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 76, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 76, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 76
-PASS: gsl_fft_real with signal_real_noise, n = 76, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 76, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 76, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 76, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 76
-PASS: gsl_fft_real_float with signal_real_noise, n = 76, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 76, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 76, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 76, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 76
-PASS: gsl_fft_complex_forward with signal_noise, n = 76, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 76, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 76, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 76, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 76, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 76, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 76, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 76, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 76, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 76, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 76
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 76, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 76, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 76, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 76, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 76, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 76, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 76, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 76, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 76, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 76, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 76
-PASS: gsl_fft_real with signal_real_noise, n = 76, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 76, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 76, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 76, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 76
-PASS: gsl_fft_real_float with signal_real_noise, n = 76, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 76, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 76, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 76, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 76
-PASS: gsl_fft_complex_forward with signal_noise, n = 76, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 76, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 76, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 76, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 76, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 76, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 76, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 76, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 76, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 76, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 76
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 76, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 76, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 76, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 76, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 76, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 76, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 76, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 76, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 76, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 76, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 76
-PASS: gsl_fft_real with signal_real_noise, n = 76, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 76, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 76, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 76, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 76
-PASS: gsl_fft_real_float with signal_real_noise, n = 76, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 76, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 76, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 77, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 77
-PASS: gsl_fft_complex_forward with signal_noise, n = 77, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 77, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 77, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 77, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 77, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 77, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 77, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 77
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 77, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 77, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 77, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 77, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 77, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 77, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 77, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 77
-PASS: gsl_fft_real with signal_real_noise, n = 77, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 77, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 77, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 77, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 77
-PASS: gsl_fft_real_float with signal_real_noise, n = 77, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 77, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 77, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 77, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 77
-PASS: gsl_fft_complex_forward with signal_noise, n = 77, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 77, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 77, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 77, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 77, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 77, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 77, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 77, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 77, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 77, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 77
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 77, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 77, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 77, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 77, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 77, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 77, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 77, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 77, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 77, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 77, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 77
-PASS: gsl_fft_real with signal_real_noise, n = 77, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 77, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 77, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 77, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 77
-PASS: gsl_fft_real_float with signal_real_noise, n = 77, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 77, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 77, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 77, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 77
-PASS: gsl_fft_complex_forward with signal_noise, n = 77, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 77, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 77, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 77, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 77, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 77, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 77, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 77, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 77, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 77, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 77
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 77, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 77, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 77, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 77, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 77, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 77, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 77, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 77, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 77, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 77, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 77
-PASS: gsl_fft_real with signal_real_noise, n = 77, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 77, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 77, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 77, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 77
-PASS: gsl_fft_real_float with signal_real_noise, n = 77, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 77, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 77, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 78, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 78
-PASS: gsl_fft_complex_forward with signal_noise, n = 78, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 78, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 78, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 78, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 78, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 78, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 78, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 78
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 78, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 78, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 78, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 78, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 78, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 78, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 78, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 78
-PASS: gsl_fft_real with signal_real_noise, n = 78, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 78, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 78, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 78, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 78
-PASS: gsl_fft_real_float with signal_real_noise, n = 78, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 78, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 78, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 78, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 78
-PASS: gsl_fft_complex_forward with signal_noise, n = 78, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 78, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 78, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 78, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 78, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 78, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 78, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 78, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 78, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 78, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 78
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 78, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 78, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 78, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 78, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 78, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 78, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 78, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 78, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 78, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 78, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 78
-PASS: gsl_fft_real with signal_real_noise, n = 78, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 78, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 78, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 78, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 78
-PASS: gsl_fft_real_float with signal_real_noise, n = 78, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 78, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 78, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 78, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 78
-PASS: gsl_fft_complex_forward with signal_noise, n = 78, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 78, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 78, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 78, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 78, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 78, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 78, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 78, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 78, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 78, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 78
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 78, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 78, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 78, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 78, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 78, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 78, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 78, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 78, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 78, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 78, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 78
-PASS: gsl_fft_real with signal_real_noise, n = 78, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 78, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 78, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 78, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 78
-PASS: gsl_fft_real_float with signal_real_noise, n = 78, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 78, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 78, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 79, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 79
-PASS: gsl_fft_complex_forward with signal_noise, n = 79, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 79, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 79, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 79, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 79, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 79, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 79, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 79
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 79, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 79, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 79, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 79, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 79, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 79, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 79, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 79
-PASS: gsl_fft_real with signal_real_noise, n = 79, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 79, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 79, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 79, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 79
-PASS: gsl_fft_real_float with signal_real_noise, n = 79, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 79, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 79, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 79, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 79
-PASS: gsl_fft_complex_forward with signal_noise, n = 79, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 79, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 79, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 79, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 79, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 79, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 79, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 79, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 79, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 79, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 79
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 79, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 79, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 79, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 79, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 79, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 79, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 79, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 79, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 79, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 79, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 79
-PASS: gsl_fft_real with signal_real_noise, n = 79, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 79, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 79, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 79, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 79
-PASS: gsl_fft_real_float with signal_real_noise, n = 79, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 79, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 79, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 79, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 79
-PASS: gsl_fft_complex_forward with signal_noise, n = 79, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 79, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 79, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 79, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 79, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 79, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 79, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 79, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 79, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 79, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 79
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 79, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 79, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 79, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 79, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 79, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 79, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 79, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 79, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 79, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 79, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 79
-PASS: gsl_fft_real with signal_real_noise, n = 79, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 79, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 79, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 79, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 79
-PASS: gsl_fft_real_float with signal_real_noise, n = 79, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 79, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 79, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 80, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 80
-PASS: gsl_fft_complex_forward with signal_noise, n = 80, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 80, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 80, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 80, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 80, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 80, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 80, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 80
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 80, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 80, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 80, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 80, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 80, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 80, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 80, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 80
-PASS: gsl_fft_real with signal_real_noise, n = 80, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 80, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 80, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 80, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 80
-PASS: gsl_fft_real_float with signal_real_noise, n = 80, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 80, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 80, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 80, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 80
-PASS: gsl_fft_complex_forward with signal_noise, n = 80, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 80, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 80, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 80, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 80, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 80, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 80, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 80, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 80, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 80, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 80
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 80, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 80, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 80, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 80, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 80, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 80, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 80, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 80, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 80, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 80, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 80
-PASS: gsl_fft_real with signal_real_noise, n = 80, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 80, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 80, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 80, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 80
-PASS: gsl_fft_real_float with signal_real_noise, n = 80, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 80, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 80, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 80, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 80
-PASS: gsl_fft_complex_forward with signal_noise, n = 80, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 80, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 80, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 80, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 80, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 80, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 80, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 80, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 80, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 80, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 80
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 80, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 80, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 80, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 80, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 80, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 80, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 80, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 80, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 80, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 80, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 80
-PASS: gsl_fft_real with signal_real_noise, n = 80, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 80, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 80, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 80, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 80
-PASS: gsl_fft_real_float with signal_real_noise, n = 80, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 80, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 80, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 81, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 81
-PASS: gsl_fft_complex_forward with signal_noise, n = 81, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 81, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 81, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 81, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 81, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 81, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 81, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 81
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 81, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 81, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 81, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 81, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 81, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 81, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 81, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 81
-PASS: gsl_fft_real with signal_real_noise, n = 81, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 81, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 81, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 81, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 81
-PASS: gsl_fft_real_float with signal_real_noise, n = 81, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 81, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 81, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 81, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 81
-PASS: gsl_fft_complex_forward with signal_noise, n = 81, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 81, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 81, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 81, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 81, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 81, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 81, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 81, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 81, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 81, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 81
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 81, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 81, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 81, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 81, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 81, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 81, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 81, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 81, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 81, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 81, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 81
-PASS: gsl_fft_real with signal_real_noise, n = 81, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 81, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 81, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 81, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 81
-PASS: gsl_fft_real_float with signal_real_noise, n = 81, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 81, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 81, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 81, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 81
-PASS: gsl_fft_complex_forward with signal_noise, n = 81, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 81, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 81, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 81, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 81, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 81, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 81, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 81, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 81, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 81, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 81
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 81, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 81, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 81, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 81, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 81, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 81, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 81, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 81, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 81, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 81, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 81
-PASS: gsl_fft_real with signal_real_noise, n = 81, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 81, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 81, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 81, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 81
-PASS: gsl_fft_real_float with signal_real_noise, n = 81, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 81, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 81, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 82, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 82
-PASS: gsl_fft_complex_forward with signal_noise, n = 82, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 82, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 82, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 82, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 82, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 82, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 82, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 82
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 82, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 82, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 82, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 82, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 82, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 82, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 82, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 82
-PASS: gsl_fft_real with signal_real_noise, n = 82, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 82, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 82, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 82, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 82
-PASS: gsl_fft_real_float with signal_real_noise, n = 82, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 82, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 82, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 82, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 82
-PASS: gsl_fft_complex_forward with signal_noise, n = 82, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 82, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 82, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 82, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 82, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 82, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 82, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 82, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 82, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 82, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 82
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 82, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 82, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 82, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 82, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 82, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 82, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 82, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 82, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 82, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 82, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 82
-PASS: gsl_fft_real with signal_real_noise, n = 82, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 82, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 82, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 82, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 82
-PASS: gsl_fft_real_float with signal_real_noise, n = 82, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 82, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 82, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 82, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 82
-PASS: gsl_fft_complex_forward with signal_noise, n = 82, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 82, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 82, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 82, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 82, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 82, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 82, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 82, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 82, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 82, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 82
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 82, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 82, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 82, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 82, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 82, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 82, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 82, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 82, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 82, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 82, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 82
-PASS: gsl_fft_real with signal_real_noise, n = 82, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 82, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 82, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 82, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 82
-PASS: gsl_fft_real_float with signal_real_noise, n = 82, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 82, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 82, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 83, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 83
-PASS: gsl_fft_complex_forward with signal_noise, n = 83, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 83, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 83, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 83, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 83, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 83, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 83, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 83
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 83, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 83, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 83, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 83, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 83, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 83, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 83, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 83
-PASS: gsl_fft_real with signal_real_noise, n = 83, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 83, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 83, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 83, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 83
-PASS: gsl_fft_real_float with signal_real_noise, n = 83, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 83, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 83, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 83, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 83
-PASS: gsl_fft_complex_forward with signal_noise, n = 83, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 83, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 83, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 83, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 83, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 83, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 83, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 83, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 83, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 83, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 83
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 83, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 83, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 83, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 83, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 83, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 83, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 83, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 83, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 83, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 83, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 83
-PASS: gsl_fft_real with signal_real_noise, n = 83, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 83, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 83, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 83, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 83
-PASS: gsl_fft_real_float with signal_real_noise, n = 83, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 83, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 83, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 83, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 83
-PASS: gsl_fft_complex_forward with signal_noise, n = 83, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 83, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 83, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 83, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 83, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 83, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 83, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 83, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 83, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 83, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 83
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 83, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 83, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 83, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 83, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 83, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 83, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 83, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 83, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 83, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 83, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 83
-PASS: gsl_fft_real with signal_real_noise, n = 83, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 83, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 83, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 83, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 83
-PASS: gsl_fft_real_float with signal_real_noise, n = 83, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 83, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 83, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 84, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 84
-PASS: gsl_fft_complex_forward with signal_noise, n = 84, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 84, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 84, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 84, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 84, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 84, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 84, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 84
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 84, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 84, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 84, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 84, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 84, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 84, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 84, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 84
-PASS: gsl_fft_real with signal_real_noise, n = 84, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 84, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 84, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 84, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 84
-PASS: gsl_fft_real_float with signal_real_noise, n = 84, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 84, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 84, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 84, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 84
-PASS: gsl_fft_complex_forward with signal_noise, n = 84, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 84, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 84, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 84, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 84, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 84, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 84, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 84, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 84, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 84, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 84
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 84, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 84, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 84, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 84, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 84, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 84, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 84, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 84, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 84, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 84, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 84
-PASS: gsl_fft_real with signal_real_noise, n = 84, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 84, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 84, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 84, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 84
-PASS: gsl_fft_real_float with signal_real_noise, n = 84, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 84, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 84, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 84, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 84
-PASS: gsl_fft_complex_forward with signal_noise, n = 84, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 84, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 84, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 84, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 84, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 84, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 84, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 84, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 84, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 84, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 84
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 84, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 84, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 84, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 84, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 84, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 84, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 84, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 84, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 84, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 84, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 84
-PASS: gsl_fft_real with signal_real_noise, n = 84, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 84, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 84, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 84, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 84
-PASS: gsl_fft_real_float with signal_real_noise, n = 84, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 84, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 84, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 85, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 85
-PASS: gsl_fft_complex_forward with signal_noise, n = 85, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 85, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 85, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 85, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 85, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 85, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 85, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 85
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 85, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 85, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 85, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 85, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 85, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 85, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 85, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 85
-PASS: gsl_fft_real with signal_real_noise, n = 85, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 85, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 85, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 85, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 85
-PASS: gsl_fft_real_float with signal_real_noise, n = 85, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 85, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 85, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 85, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 85
-PASS: gsl_fft_complex_forward with signal_noise, n = 85, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 85, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 85, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 85, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 85, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 85, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 85, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 85, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 85, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 85, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 85
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 85, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 85, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 85, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 85, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 85, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 85, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 85, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 85, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 85, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 85, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 85
-PASS: gsl_fft_real with signal_real_noise, n = 85, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 85, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 85, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 85, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 85
-PASS: gsl_fft_real_float with signal_real_noise, n = 85, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 85, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 85, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 85, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 85
-PASS: gsl_fft_complex_forward with signal_noise, n = 85, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 85, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 85, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 85, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 85, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 85, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 85, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 85, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 85, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 85, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 85
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 85, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 85, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 85, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 85, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 85, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 85, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 85, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 85, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 85, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 85, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 85
-PASS: gsl_fft_real with signal_real_noise, n = 85, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 85, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 85, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 85, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 85
-PASS: gsl_fft_real_float with signal_real_noise, n = 85, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 85, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 85, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 86, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 86
-PASS: gsl_fft_complex_forward with signal_noise, n = 86, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 86, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 86, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 86, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 86, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 86, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 86, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 86
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 86, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 86, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 86, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 86, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 86, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 86, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 86, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 86
-PASS: gsl_fft_real with signal_real_noise, n = 86, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 86, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 86, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 86, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 86
-PASS: gsl_fft_real_float with signal_real_noise, n = 86, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 86, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 86, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 86, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 86
-PASS: gsl_fft_complex_forward with signal_noise, n = 86, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 86, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 86, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 86, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 86, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 86, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 86, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 86, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 86, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 86, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 86
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 86, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 86, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 86, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 86, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 86, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 86, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 86, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 86, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 86, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 86, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 86
-PASS: gsl_fft_real with signal_real_noise, n = 86, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 86, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 86, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 86, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 86
-PASS: gsl_fft_real_float with signal_real_noise, n = 86, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 86, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 86, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 86, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 86
-PASS: gsl_fft_complex_forward with signal_noise, n = 86, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 86, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 86, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 86, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 86, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 86, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 86, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 86, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 86, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 86, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 86
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 86, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 86, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 86, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 86, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 86, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 86, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 86, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 86, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 86, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 86, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 86
-PASS: gsl_fft_real with signal_real_noise, n = 86, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 86, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 86, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 86, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 86
-PASS: gsl_fft_real_float with signal_real_noise, n = 86, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 86, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 86, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 87, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 87
-PASS: gsl_fft_complex_forward with signal_noise, n = 87, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 87, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 87, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 87, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 87, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 87, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 87, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 87
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 87, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 87, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 87, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 87, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 87, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 87, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 87, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 87
-PASS: gsl_fft_real with signal_real_noise, n = 87, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 87, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 87, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 87, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 87
-PASS: gsl_fft_real_float with signal_real_noise, n = 87, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 87, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 87, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 87, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 87
-PASS: gsl_fft_complex_forward with signal_noise, n = 87, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 87, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 87, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 87, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 87, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 87, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 87, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 87, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 87, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 87, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 87
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 87, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 87, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 87, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 87, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 87, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 87, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 87, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 87, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 87, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 87, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 87
-PASS: gsl_fft_real with signal_real_noise, n = 87, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 87, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 87, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 87, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 87
-PASS: gsl_fft_real_float with signal_real_noise, n = 87, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 87, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 87, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 87, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 87
-PASS: gsl_fft_complex_forward with signal_noise, n = 87, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 87, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 87, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 87, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 87, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 87, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 87, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 87, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 87, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 87, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 87
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 87, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 87, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 87, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 87, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 87, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 87, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 87, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 87, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 87, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 87, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 87
-PASS: gsl_fft_real with signal_real_noise, n = 87, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 87, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 87, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 87, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 87
-PASS: gsl_fft_real_float with signal_real_noise, n = 87, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 87, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 87, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 88, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 88
-PASS: gsl_fft_complex_forward with signal_noise, n = 88, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 88, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 88, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 88, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 88, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 88, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 88, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 88
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 88, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 88, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 88, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 88, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 88, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 88, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 88, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 88
-PASS: gsl_fft_real with signal_real_noise, n = 88, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 88, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 88, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 88, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 88
-PASS: gsl_fft_real_float with signal_real_noise, n = 88, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 88, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 88, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 88, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 88
-PASS: gsl_fft_complex_forward with signal_noise, n = 88, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 88, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 88, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 88, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 88, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 88, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 88, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 88, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 88, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 88, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 88
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 88, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 88, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 88, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 88, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 88, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 88, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 88, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 88, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 88, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 88, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 88
-PASS: gsl_fft_real with signal_real_noise, n = 88, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 88, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 88, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 88, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 88
-PASS: gsl_fft_real_float with signal_real_noise, n = 88, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 88, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 88, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 88, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 88
-PASS: gsl_fft_complex_forward with signal_noise, n = 88, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 88, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 88, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 88, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 88, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 88, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 88, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 88, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 88, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 88, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 88
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 88, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 88, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 88, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 88, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 88, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 88, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 88, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 88, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 88, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 88, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 88
-PASS: gsl_fft_real with signal_real_noise, n = 88, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 88, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 88, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 88, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 88
-PASS: gsl_fft_real_float with signal_real_noise, n = 88, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 88, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 88, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 89, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 89
-PASS: gsl_fft_complex_forward with signal_noise, n = 89, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 89, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 89, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 89, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 89, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 89, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 89, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 89
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 89, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 89, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 89, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 89, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 89, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 89, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 89, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 89
-PASS: gsl_fft_real with signal_real_noise, n = 89, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 89, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 89, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 89, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 89
-PASS: gsl_fft_real_float with signal_real_noise, n = 89, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 89, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 89, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 89, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 89
-PASS: gsl_fft_complex_forward with signal_noise, n = 89, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 89, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 89, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 89, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 89, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 89, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 89, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 89, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 89, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 89, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 89
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 89, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 89, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 89, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 89, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 89, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 89, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 89, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 89, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 89, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 89, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 89
-PASS: gsl_fft_real with signal_real_noise, n = 89, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 89, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 89, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 89, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 89
-PASS: gsl_fft_real_float with signal_real_noise, n = 89, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 89, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 89, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 89, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 89
-PASS: gsl_fft_complex_forward with signal_noise, n = 89, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 89, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 89, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 89, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 89, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 89, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 89, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 89, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 89, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 89, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 89
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 89, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 89, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 89, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 89, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 89, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 89, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 89, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 89, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 89, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 89, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 89
-PASS: gsl_fft_real with signal_real_noise, n = 89, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 89, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 89, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 89, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 89
-PASS: gsl_fft_real_float with signal_real_noise, n = 89, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 89, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 89, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 90, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 90
-PASS: gsl_fft_complex_forward with signal_noise, n = 90, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 90, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 90, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 90, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 90, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 90, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 90, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 90
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 90, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 90, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 90, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 90, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 90, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 90, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 90, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 90
-PASS: gsl_fft_real with signal_real_noise, n = 90, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 90, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 90, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 90, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 90
-PASS: gsl_fft_real_float with signal_real_noise, n = 90, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 90, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 90, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 90, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 90
-PASS: gsl_fft_complex_forward with signal_noise, n = 90, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 90, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 90, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 90, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 90, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 90, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 90, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 90, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 90, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 90, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 90
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 90, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 90, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 90, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 90, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 90, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 90, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 90, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 90, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 90, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 90, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 90
-PASS: gsl_fft_real with signal_real_noise, n = 90, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 90, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 90, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 90, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 90
-PASS: gsl_fft_real_float with signal_real_noise, n = 90, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 90, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 90, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 90, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 90
-PASS: gsl_fft_complex_forward with signal_noise, n = 90, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 90, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 90, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 90, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 90, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 90, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 90, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 90, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 90, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 90, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 90
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 90, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 90, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 90, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 90, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 90, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 90, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 90, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 90, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 90, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 90, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 90
-PASS: gsl_fft_real with signal_real_noise, n = 90, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 90, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 90, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 90, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 90
-PASS: gsl_fft_real_float with signal_real_noise, n = 90, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 90, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 90, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 91, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 91
-PASS: gsl_fft_complex_forward with signal_noise, n = 91, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 91, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 91, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 91, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 91, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 91, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 91, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 91
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 91, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 91, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 91, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 91, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 91, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 91, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 91, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 91
-PASS: gsl_fft_real with signal_real_noise, n = 91, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 91, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 91, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 91, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 91
-PASS: gsl_fft_real_float with signal_real_noise, n = 91, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 91, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 91, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 91, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 91
-PASS: gsl_fft_complex_forward with signal_noise, n = 91, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 91, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 91, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 91, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 91, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 91, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 91, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 91, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 91, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 91, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 91
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 91, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 91, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 91, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 91, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 91, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 91, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 91, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 91, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 91, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 91, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 91
-PASS: gsl_fft_real with signal_real_noise, n = 91, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 91, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 91, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 91, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 91
-PASS: gsl_fft_real_float with signal_real_noise, n = 91, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 91, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 91, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 91, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 91
-PASS: gsl_fft_complex_forward with signal_noise, n = 91, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 91, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 91, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 91, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 91, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 91, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 91, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 91, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 91, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 91, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 91
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 91, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 91, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 91, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 91, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 91, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 91, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 91, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 91, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 91, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 91, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 91
-PASS: gsl_fft_real with signal_real_noise, n = 91, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 91, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 91, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 91, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 91
-PASS: gsl_fft_real_float with signal_real_noise, n = 91, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 91, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 91, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 92, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 92
-PASS: gsl_fft_complex_forward with signal_noise, n = 92, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 92, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 92, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 92, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 92, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 92, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 92, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 92
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 92, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 92, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 92, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 92, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 92, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 92, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 92, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 92
-PASS: gsl_fft_real with signal_real_noise, n = 92, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 92, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 92, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 92, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 92
-PASS: gsl_fft_real_float with signal_real_noise, n = 92, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 92, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 92, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 92, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 92
-PASS: gsl_fft_complex_forward with signal_noise, n = 92, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 92, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 92, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 92, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 92, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 92, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 92, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 92, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 92, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 92, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 92
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 92, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 92, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 92, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 92, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 92, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 92, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 92, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 92, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 92, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 92, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 92
-PASS: gsl_fft_real with signal_real_noise, n = 92, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 92, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 92, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 92, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 92
-PASS: gsl_fft_real_float with signal_real_noise, n = 92, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 92, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 92, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 92, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 92
-PASS: gsl_fft_complex_forward with signal_noise, n = 92, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 92, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 92, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 92, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 92, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 92, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 92, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 92, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 92, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 92, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 92
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 92, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 92, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 92, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 92, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 92, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 92, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 92, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 92, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 92, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 92, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 92
-PASS: gsl_fft_real with signal_real_noise, n = 92, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 92, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 92, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 92, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 92
-PASS: gsl_fft_real_float with signal_real_noise, n = 92, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 92, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 92, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 93, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 93
-PASS: gsl_fft_complex_forward with signal_noise, n = 93, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 93, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 93, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 93, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 93, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 93, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 93, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 93
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 93, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 93, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 93, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 93, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 93, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 93, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 93, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 93
-PASS: gsl_fft_real with signal_real_noise, n = 93, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 93, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 93, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 93, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 93
-PASS: gsl_fft_real_float with signal_real_noise, n = 93, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 93, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 93, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 93, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 93
-PASS: gsl_fft_complex_forward with signal_noise, n = 93, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 93, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 93, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 93, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 93, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 93, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 93, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 93, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 93, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 93, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 93
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 93, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 93, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 93, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 93, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 93, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 93, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 93, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 93, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 93, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 93, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 93
-PASS: gsl_fft_real with signal_real_noise, n = 93, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 93, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 93, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 93, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 93
-PASS: gsl_fft_real_float with signal_real_noise, n = 93, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 93, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 93, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 93, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 93
-PASS: gsl_fft_complex_forward with signal_noise, n = 93, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 93, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 93, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 93, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 93, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 93, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 93, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 93, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 93, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 93, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 93
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 93, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 93, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 93, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 93, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 93, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 93, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 93, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 93, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 93, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 93, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 93
-PASS: gsl_fft_real with signal_real_noise, n = 93, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 93, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 93, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 93, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 93
-PASS: gsl_fft_real_float with signal_real_noise, n = 93, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 93, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 93, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 94, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 94
-PASS: gsl_fft_complex_forward with signal_noise, n = 94, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 94, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 94, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 94, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 94, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 94, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 94, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 94
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 94, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 94, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 94, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 94, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 94, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 94, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 94, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 94
-PASS: gsl_fft_real with signal_real_noise, n = 94, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 94, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 94, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 94, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 94
-PASS: gsl_fft_real_float with signal_real_noise, n = 94, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 94, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 94, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 94, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 94
-PASS: gsl_fft_complex_forward with signal_noise, n = 94, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 94, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 94, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 94, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 94, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 94, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 94, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 94, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 94, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 94, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 94
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 94, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 94, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 94, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 94, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 94, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 94, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 94, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 94, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 94, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 94, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 94
-PASS: gsl_fft_real with signal_real_noise, n = 94, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 94, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 94, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 94, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 94
-PASS: gsl_fft_real_float with signal_real_noise, n = 94, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 94, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 94, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 94, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 94
-PASS: gsl_fft_complex_forward with signal_noise, n = 94, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 94, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 94, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 94, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 94, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 94, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 94, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 94, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 94, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 94, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 94
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 94, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 94, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 94, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 94, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 94, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 94, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 94, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 94, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 94, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 94, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 94
-PASS: gsl_fft_real with signal_real_noise, n = 94, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 94, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 94, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 94, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 94
-PASS: gsl_fft_real_float with signal_real_noise, n = 94, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 94, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 94, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 95, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 95
-PASS: gsl_fft_complex_forward with signal_noise, n = 95, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 95, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 95, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 95, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 95, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 95, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 95, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 95
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 95, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 95, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 95, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 95, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 95, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 95, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 95, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 95
-PASS: gsl_fft_real with signal_real_noise, n = 95, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 95, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 95, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 95, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 95
-PASS: gsl_fft_real_float with signal_real_noise, n = 95, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 95, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 95, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 95, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 95
-PASS: gsl_fft_complex_forward with signal_noise, n = 95, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 95, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 95, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 95, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 95, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 95, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 95, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 95, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 95, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 95, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 95
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 95, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 95, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 95, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 95, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 95, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 95, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 95, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 95, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 95, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 95, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 95
-PASS: gsl_fft_real with signal_real_noise, n = 95, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 95, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 95, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 95, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 95
-PASS: gsl_fft_real_float with signal_real_noise, n = 95, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 95, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 95, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 95, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 95
-PASS: gsl_fft_complex_forward with signal_noise, n = 95, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 95, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 95, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 95, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 95, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 95, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 95, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 95, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 95, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 95, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 95
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 95, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 95, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 95, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 95, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 95, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 95, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 95, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 95, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 95, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 95, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 95
-PASS: gsl_fft_real with signal_real_noise, n = 95, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 95, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 95, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 95, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 95
-PASS: gsl_fft_real_float with signal_real_noise, n = 95, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 95, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 95, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 96, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 96
-PASS: gsl_fft_complex_forward with signal_noise, n = 96, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 96, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 96, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 96, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 96, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 96, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 96, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 96
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 96, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 96, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 96, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 96, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 96, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 96, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 96, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 96
-PASS: gsl_fft_real with signal_real_noise, n = 96, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 96, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 96, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 96, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 96
-PASS: gsl_fft_real_float with signal_real_noise, n = 96, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 96, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 96, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 96, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 96
-PASS: gsl_fft_complex_forward with signal_noise, n = 96, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 96, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 96, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 96, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 96, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 96, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 96, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 96, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 96, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 96, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 96
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 96, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 96, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 96, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 96, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 96, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 96, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 96, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 96, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 96, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 96, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 96
-PASS: gsl_fft_real with signal_real_noise, n = 96, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 96, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 96, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 96, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 96
-PASS: gsl_fft_real_float with signal_real_noise, n = 96, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 96, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 96, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 96, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 96
-PASS: gsl_fft_complex_forward with signal_noise, n = 96, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 96, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 96, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 96, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 96, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 96, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 96, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 96, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 96, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 96, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 96
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 96, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 96, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 96, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 96, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 96, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 96, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 96, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 96, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 96, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 96, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 96
-PASS: gsl_fft_real with signal_real_noise, n = 96, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 96, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 96, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 96, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 96
-PASS: gsl_fft_real_float with signal_real_noise, n = 96, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 96, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 96, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 97, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 97
-PASS: gsl_fft_complex_forward with signal_noise, n = 97, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 97, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 97, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 97, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 97, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 97, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 97, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 97
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 97, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 97, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 97, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 97, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 97, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 97, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 97, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 97
-PASS: gsl_fft_real with signal_real_noise, n = 97, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 97, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 97, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 97, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 97
-PASS: gsl_fft_real_float with signal_real_noise, n = 97, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 97, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 97, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 97, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 97
-PASS: gsl_fft_complex_forward with signal_noise, n = 97, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 97, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 97, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 97, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 97, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 97, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 97, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 97, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 97, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 97, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 97
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 97, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 97, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 97, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 97, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 97, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 97, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 97, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 97, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 97, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 97, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 97
-PASS: gsl_fft_real with signal_real_noise, n = 97, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 97, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 97, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 97, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 97
-PASS: gsl_fft_real_float with signal_real_noise, n = 97, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 97, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 97, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 97, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 97
-PASS: gsl_fft_complex_forward with signal_noise, n = 97, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 97, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 97, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 97, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 97, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 97, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 97, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 97, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 97, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 97, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 97
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 97, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 97, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 97, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 97, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 97, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 97, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 97, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 97, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 97, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 97, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 97
-PASS: gsl_fft_real with signal_real_noise, n = 97, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 97, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 97, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 97, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 97
-PASS: gsl_fft_real_float with signal_real_noise, n = 97, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 97, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 97, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 98, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 98
-PASS: gsl_fft_complex_forward with signal_noise, n = 98, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 98, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 98, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 98, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 98, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 98, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 98, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 98
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 98, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 98, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 98, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 98, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 98, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 98, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 98, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 98
-. 0 10011C00 20
-. 38 E0 00 00 C8 77 00 00 7F 87 D8 40 C8 96 00 00 40 9C 00 FC
-
-PASS: gsl_fft_real with signal_real_noise, n = 98, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 98, stride = 1
-. 0 1000CBE0 20
-. 38 60 00 00 C8 B9 00 00 7F 83 F8 40 C8 D8 00 00 40 9C 01 24
-
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 98, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 98, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 98
-. 0 10013C30 20
-. 38 E0 00 00 C0 77 00 00 7F 87 D8 40 C0 96 00 00 40 9C 00 FC
-
-PASS: gsl_fft_real_float with signal_real_noise, n = 98, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 98, stride = 1
-. 0 1000EDA8 20
-. 38 60 00 00 C0 B9 00 00 7F 83 E8 40 C0 D8 00 00 40 9C 01 24
-
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 98, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 98, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 98
-PASS: gsl_fft_complex_forward with signal_noise, n = 98, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 98, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 98, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 98, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 98, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 98, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 98, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 98, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 98, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 98, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 98
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 98, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 98, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 98, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 98, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 98, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 98, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 98, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 98, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 98, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 98, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 98
-PASS: gsl_fft_real with signal_real_noise, n = 98, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 98, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 98, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 98, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 98
-PASS: gsl_fft_real_float with signal_real_noise, n = 98, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 98, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 98, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 98, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 98
-PASS: gsl_fft_complex_forward with signal_noise, n = 98, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 98, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 98, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 98, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 98, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 98, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 98, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 98, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 98, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 98, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 98
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 98, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 98, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 98, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 98, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 98, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 98, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 98, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 98, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 98, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 98, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 98
-PASS: gsl_fft_real with signal_real_noise, n = 98, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 98, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 98, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 98, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 98
-PASS: gsl_fft_real_float with signal_real_noise, n = 98, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 98, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 98, stride = 3
-PASS: gsl_fft_complex_wavetable_alloc, n = 99, stride = 1
-PASS: gsl_fft_complex_workspace_alloc, n = 99
-PASS: gsl_fft_complex_forward with signal_noise, n = 99, stride = 1
-PASS: gsl_fft_complex_inverse with signal_noise, n = 99, stride = 1
-PASS: gsl_fft_complex_backward with signal_noise, n = 99, stride = 1
-PASS: gsl_fft_complex_forward with signal_pulse, n = 99, stride = 1
-PASS: gsl_fft_complex_forward with signal_constant, n = 99, stride = 1
-PASS: gsl_fft_complex_forward with signal_exp, n = 99, stride = 1
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 99, stride = 1
-PASS: gsl_fft_complex_workspace_float_alloc, n = 99
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 99, stride = 1
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 99, stride = 1
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 99, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 99, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 99, stride = 1
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 99, stride = 1
-PASS: gsl_fft_real_wavetable_alloc, n = 99, stride = 1
-PASS: gsl_fft_real_workspace_alloc, n = 99
-PASS: gsl_fft_real with signal_real_noise, n = 99, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 99, stride = 1
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 99, stride = 1
-PASS: gsl_fft_real_wavetable_float_alloc, n = 99, stride = 1
-PASS: gsl_fft_real_workspace_float_alloc, n = 99
-PASS: gsl_fft_real_float with signal_real_noise, n = 99, stride = 1
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 99, stride = 1
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 99, stride = 1
-PASS: gsl_fft_complex_wavetable_alloc, n = 99, stride = 2
-PASS: gsl_fft_complex_workspace_alloc, n = 99
-PASS: gsl_fft_complex_forward with signal_noise, n = 99, stride = 2
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 99, stride = 2
-PASS: gsl_fft_complex_inverse with signal_noise, n = 99, stride = 2
-PASS: gsl_fft_complex_inverse other data untouched, n = 99, stride = 2
-PASS: gsl_fft_complex_backward with signal_noise, n = 99, stride = 2
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 99, stride = 2
-PASS: gsl_fft_complex_forward with signal_pulse, n = 99, stride = 2
-PASS: gsl_fft_complex_forward with signal_constant, n = 99, stride = 2
-PASS: gsl_fft_complex_forward with signal_exp, n = 99, stride = 2
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 99, stride = 2
-PASS: gsl_fft_complex_workspace_float_alloc, n = 99
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 99, stride = 2
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 99, stride = 2
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 99, stride = 2
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 99, stride = 2
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 99, stride = 2
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 99, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 99, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 99, stride = 2
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 99, stride = 2
-PASS: gsl_fft_real_wavetable_alloc, n = 99, stride = 2
-PASS: gsl_fft_real_workspace_alloc, n = 99
-PASS: gsl_fft_real with signal_real_noise, n = 99, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 99, stride = 2
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 99, stride = 2
-PASS: gsl_fft_real_wavetable_float_alloc, n = 99, stride = 2
-PASS: gsl_fft_real_workspace_float_alloc, n = 99
-PASS: gsl_fft_real_float with signal_real_noise, n = 99, stride = 2
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 99, stride = 2
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 99, stride = 2
-PASS: gsl_fft_complex_wavetable_alloc, n = 99, stride = 3
-PASS: gsl_fft_complex_workspace_alloc, n = 99
-PASS: gsl_fft_complex_forward with signal_noise, n = 99, stride = 3
-PASS: gsl_fft_complex_forward avoids unstrided data, n = 99, stride = 3
-PASS: gsl_fft_complex_inverse with signal_noise, n = 99, stride = 3
-PASS: gsl_fft_complex_inverse other data untouched, n = 99, stride = 3
-PASS: gsl_fft_complex_backward with signal_noise, n = 99, stride = 3
-PASS: gsl_fft_complex_backward avoids unstrided data, n = 99, stride = 3
-PASS: gsl_fft_complex_forward with signal_pulse, n = 99, stride = 3
-PASS: gsl_fft_complex_forward with signal_constant, n = 99, stride = 3
-PASS: gsl_fft_complex_forward with signal_exp, n = 99, stride = 3
-PASS: gsl_fft_complex_wavetable_float_alloc, n = 99, stride = 3
-PASS: gsl_fft_complex_workspace_float_alloc, n = 99
-PASS: gsl_fft_complex_float_forward with signal_noise, n = 99, stride = 3
-PASS: gsl_fft_complex_float_forward avoids unstrided data, n = 99, stride = 3
-PASS: gsl_fft_complex_float_inverse with signal_noise, n = 99, stride = 3
-PASS: gsl_fft_complex_float_inverse other data untouched, n = 99, stride = 3
-PASS: gsl_fft_complex_float_backward with signal_noise, n = 99, stride = 3
-PASS: gsl_fft_complex_float_backward avoids unstrided data, n = 99, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_pulse, n = 99, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_constant, n = 99, stride = 3
-PASS: gsl_fft_complex_float_forward with signal_exp, n = 99, stride = 3
-PASS: gsl_fft_real_wavetable_alloc, n = 99, stride = 3
-PASS: gsl_fft_real_workspace_alloc, n = 99
-PASS: gsl_fft_real with signal_real_noise, n = 99, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_alloc, n = 99, stride = 3
-PASS: gsl_fft_halfcomplex with data from signal_noise, n = 99, stride = 3
-PASS: gsl_fft_real_wavetable_float_alloc, n = 99, stride = 3
-PASS: gsl_fft_real_workspace_float_alloc, n = 99
-PASS: gsl_fft_real_float with signal_real_noise, n = 99, stride = 3
-PASS: gsl_fft_halfcomplex_wavetable_float_alloc, n = 99, stride = 3
-PASS: gsl_fft_halfcomplex_float with data from signal_noise, n = 99, stride = 3
-. 0 10004744 12
-. 3C 60 10 00 38 63 47 88 48 01 0C A9
-
-. 0 10004750 4
-. 4B FF DB B5
-
-. 0 10002304 56
-. 7C 08 02 A6 94 21 FF C0 38 60 00 00 92 C1 00 18 92 E1 00 1C 90 01 00 44 93 01 00 20 3B 01 00 08 93 21 00 24 93 41 00 28 93 61 00 2C 93 81 00 30 93 A1 00 34 48 00 45 09
-
-. 0 10006A98 20
-. 80 7E 80 00 38 A0 00 21 80 9E 80 14 38 C0 00 01 48 00 E8 B5
-
-. 0 1001535C 56
-. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 A1 00 14 90 01 00 24 80 1E FF F0 7F C0 F2 14 7C 60 1B 78 81 3E 80 00 81 29 00 00 2F 89 00 00 41 9E 00 24
-
-. 0 10015394 8
-. 7D 28 03 A6 4E 80 00 21
-
-. 0 10004788 4
-. 4E 80 00 20
-
-. 0 1001539C 24
-. 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 38 21 00 20 4E 80 00 20
-
-. 0 10006AAC 8
-. 38 60 00 00 4B FF FF 7C
-
-. 0 10006A2C 108
-. 80 01 00 94 81 C1 00 20 81 E1 00 24 7C 08 03 A6 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
-
-. 0 1000233C 24
-. 30 03 FF FF 7F 80 19 10 3C 80 10 01 38 84 70 B8 7F 83 E3 78 48 01 32 99
-
-PASS: trap for n = 0 in gsl_fft_complex_wavetable_alloc
-. 0 10002354 8
-. 38 60 00 00 48 00 E5 ED
-
-. 0 10010BD0 20
-. 80 7E 80 00 38 A0 00 21 80 9E 82 40 38 C0 00 01 48 00 47 7D
-
-. 0 10010BE4 8
-. 38 60 00 00 4B FF FF 64
-
-. 0 1000235C 24
-. 3C 80 10 01 30 03 FF FF 7F A0 19 10 38 84 70 EC 7F A3 EB 78 48 01 32 79
-
-. 0 1001563C 44
-. D8 21 00 28 D8 41 00 30 D8 61 00 38 D8 81 00 40 D8 A1 00 48 D8 C1 00 50 D8 E1 00 58 D9 01 00 60 91 7D 00 00 7C 9D 23 78 40 9E 00 54
-
-. 0 FECAE1C 68
-. D8 21 00 28 D8 41 00 30 D8 61 00 38 D8 81 00 40 D8 A1 00 48 D8 C1 00 50 D8 E1 00 58 D9 01 00 60 38 C1 00 98 39 21 00 08 39 00 00 01 38 E0 00 00 99 01 00 70 98 E1 00 71 90 C1 00 74 91 21 00 78 4B FF 80 79
-
-PASS: trap for n = 0 in gsl_fft_real_wavetable_alloc
-. 0 10002374 8
-. 38 60 00 00 48 00 A1 C9
-
-. 0 1000C7B4 20
-. 80 7E 80 00 38 A0 00 21 80 9E 81 50 38 C0 00 01 48 00 8B 99
-
-. 0 1000C7C8 8
-. 38 60 00 00 4B FF FF 74
-
-. 0 1000237C 24
-. 3C 80 10 01 31 23 FF FF 7C 09 19 10 38 84 71 1C 7C 03 03 78 48 01 32 59
-
-PASS: trap for n = 0 in gsl_fft_halfcomplex_wavetable_alloc
-. 0 10002394 8
-. 38 60 00 00 48 00 47 C1
-
-. 0 10006BEC 12
-. 80 7E 80 00 80 9E 80 14 48 00 E7 69
-
-. 0 10006BF8 36
-. 38 00 00 00 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 1000239C 16
-. 3C 80 10 01 7F 83 E3 78 38 84 71 54 48 01 32 41
-
-PASS: trap for n = 0 in gsl_fft_complex_workspace_alloc
-. 0 100023AC 8
-. 38 60 00 00 48 00 E8 DD
-
-. 0 10010D20 12
-. 80 7E 80 00 80 9E 82 40 48 00 46 35
-
-. 0 10010D2C 36
-. 38 00 00 00 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 100023B4 16
-. 3C 80 10 01 38 84 71 88 7F A3 EB 78 48 01 32 29
-
-PASS: trap for n = 0 in gsl_fft_real_workspace_alloc
-. 0 100023C4 8
-. 38 60 00 0A 48 00 44 79
-
-. 0 100023CC 16
-. 3B A1 00 10 7C 7B 1B 78 38 60 00 0A 48 00 A1 69
-
-. 0 100023DC 16
-. 3B 80 00 03 7C 76 1B 78 38 60 00 0A 48 00 E5 5D
-
-. 0 100023EC 12
-. 7C 77 1B 78 38 60 00 0A 48 00 47 65
-
-. 0 100023F8 12
-. 7C 7A 1B 78 38 60 00 0A 48 00 E8 8D
-
-. 0 10002404 28
-. 7F 66 DB 78 7C 79 1B 78 7F 47 D3 78 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 6A A1
-
-. 0 10007C2C 20
-. 80 7E 80 00 38 A0 00 6B 80 9E 80 34 38 C0 00 01 48 00 D7 21
-
-. 0 10007C40 8
-. 38 60 00 01 4B FF F9 60
-
-. 0 10002420 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 71 B8 48 01 31 B9
-
-PASS: trap for n = 0 in gsl_fft_complex_forward
-. 0 10002434 24
-. 7E E6 BB 78 7F 27 CB 78 38 A0 00 00 7F 03 C3 78 38 80 00 01 48 00 E9 D1
-
-. 0 1001252C 20
-. 80 7E 80 00 38 A0 00 36 80 9E 82 4C 38 C0 00 01 48 00 2E 21
-
-. 0 10012540 8
-. 38 60 00 01 4B FF F2 E4
-
-. 0 1000244C 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 71 E4 48 01 31 8D
-
-PASS: trap for n = 0 in gsl_fft_real_transform
-. 0 10002460 24
-. 7E C6 B3 78 7F 27 CB 78 38 A0 00 00 7F 03 C3 78 38 80 00 01 48 00 A4 45
-
-. 0 1000D9D4 20
-. 80 7E 80 00 38 A0 00 58 80 9E 81 5C 38 C0 00 01 48 00 79 79
-
-. 0 1000D9E8 8
-. 38 60 00 01 4B FF F5 38
-
-. 0 10002478 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 72 10 48 01 31 61
-
-PASS: trap for n = 0 in gsl_fft_halfcomplex_transform
-. 0 1000248C 16
-. 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 6D 35
-
-. 0 10006834 8
-. 38 21 00 10 4E 80 00 20
-
-. 0 100091B0 20
-. 80 7E 80 7C 38 A0 00 5A 80 9E 80 80 38 C0 00 04 48 00 C1 9D
-
-. 0 100091C4 8
-. 38 60 00 04 4B FF FF 94
-
-. 0 1000249C 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 72 40 48 01 31 3D
-
-PASS: trap for n = 0 in gsl_fft_complex_radix2_forward
-. 0 100024B0 24
-. 7F 66 DB 78 7F 47 D3 78 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 69 D5
-
-. 0 100024C8 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 72 74 48 01 31 11
-
-PASS: trap for n = 0 in gsl_fft_complex_backward
-. 0 100024DC 16
-. 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 6D 09
-
-. 0 100024EC 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 72 A0 48 01 30 ED
-
-PASS: trap for n = 0 in gsl_fft_complex_radix2_backward
-. 0 10002500 24
-. 7F 66 DB 78 7F 47 D3 78 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 68 BD
-
-. 0 10002518 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 72 D4 48 01 30 C1
-
-PASS: trap for n = 0 in gsl_fft_complex_inverse
-. 0 1000252C 16
-. 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 6C E1
-
-. 0 1000253C 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 73 00 48 01 30 9D
-
-PASS: trap for n = 0 in gsl_fft_complex_radix2_inverse
-. 0 10002550 16
-. 38 A0 00 11 7F A3 EB 78 38 80 00 01 48 00 6C 71
-
-. 0 10002560 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 73 34 48 01 30 79
-
-PASS: trap for n != 2^k in gsl_fft_complex_radix2_forward
-. 0 10002574 16
-. 38 A0 00 11 7F A3 EB 78 38 80 00 01 48 00 6C 71
-
-. 0 10002584 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 73 68 48 01 30 55
-
-PASS: trap for n != 2^k in gsl_fft_complex_radix2_backward
-. 0 10002598 16
-. 38 A0 00 11 7F A3 EB 78 38 80 00 01 48 00 6C 75
-
-. 0 100025A8 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 73 A0 48 01 30 31
-
-PASS: trap for n != 2^k in gsl_fft_complex_radix2_inverse
-. 0 100025BC 28
-. 7F 66 DB 78 7F 47 D3 78 93 9B 00 00 38 A0 00 04 38 80 00 01 7F A3 EB 78 48 00 68 E9
-
-. 0 10008D94 20
-. 80 7E 80 38 38 A0 00 75 80 9E 80 34 38 C0 00 04 48 00 C5 B9
-
-. 0 10008DA8 8
-. 38 60 00 04 4B FF E7 F8
-
-. 0 100025D8 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 73 D4 48 01 30 01
-
-PASS: trap for n != nw in gsl_fft_complex_forward
-. 0 100025EC 28
-. 7F 66 DB 78 7F 47 D3 78 93 9B 00 00 38 A0 00 04 38 80 00 01 7F A3 EB 78 48 00 68 95
-
-. 0 10002608 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 74 00 48 01 2F D1
-
-PASS: trap for n != nw in gsl_fft_complex_backward
-. 0 1000261C 28
-. 7F 66 DB 78 7F 47 D3 78 93 9B 00 00 38 A0 00 04 7F A3 EB 78 38 80 00 01 48 00 67 9D
-
-. 0 10002638 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 74 30 48 01 2F A1
-
-PASS: trap for n != nw in gsl_fft_complex_inverse
-. 0 1000264C 28
-. 7E E6 BB 78 7F 27 CB 78 93 97 00 00 38 A0 00 04 38 80 00 01 7F 03 C3 78 48 00 E7 B5
-
-. 0 10012548 20
-. 80 7E 80 38 38 A0 00 40 80 9E 82 4C 38 C0 00 04 48 00 2E 05
-
-. 0 1001255C 8
-. 38 60 00 04 4B FF F2 C8
-
-. 0 10002668 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 74 5C 48 01 2F 71
-
-PASS: trap for n != nw in gsl_fft_real_transform
-. 0 1000267C 28
-. 7E C6 B3 78 7F 27 CB 78 38 A0 00 04 93 96 00 00 7F 03 C3 78 38 80 00 01 48 00 A2 25
-
-. 0 1000DF98 20
-. 80 7E 80 38 38 A0 00 62 80 9E 81 5C 38 C0 00 04 48 00 73 B5
-
-. 0 1000DFAC 8
-. 38 60 00 04 4B FF EF 74
-
-. 0 10002698 20
-. 3C 80 10 01 38 84 74 88 20 03 00 00 7C 60 19 14 48 01 2F 41
-
-PASS: trap for n != nw in gsl_fft_halfcomplex_transform
-. 0 100026AC 8
-. 7E C3 B3 78 48 00 A1 BD
-
-. 0 100026B4 8
-. 7E E3 BB 78 48 00 E6 CD
-
-. 0 100026BC 8
-. 7F 63 DB 78 48 00 45 91
-
-. 0 100026C4 8
-. 7F 23 CB 78 48 00 E7 05
-
-. 0 100026CC 8
-. 7F 43 D3 78 48 00 45 C9
-
-. 0 100026D4 48
-. 80 01 00 44 82 C1 00 18 82 E1 00 1C 7C 08 03 A6 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 38 21 00 40 4E 80 00 20
-
-. 0 10004754 4
-. 4B FF FB 01
-
-. 0 10004254 56
-. 7C 08 02 A6 94 21 FF C0 38 60 00 00 92 C1 00 18 92 E1 00 1C 90 01 00 44 93 01 00 20 3B 01 00 08 93 21 00 24 93 41 00 28 93 61 00 2C 93 81 00 30 93 A1 00 34 48 00 53 E1
-
-. 0 100098C8 20
-. 80 7E 80 00 38 A0 00 21 80 9E 80 14 38 C0 00 01 48 00 BA 85
-
-. 0 100098DC 8
-. 38 60 00 00 4B FF FF 7C
-
-. 0 1000985C 108
-. 80 01 00 94 81 C1 00 20 81 E1 00 24 7C 08 03 A6 82 01 00 28 82 21 00 2C 82 41 00 30 82 61 00 34 82 81 00 38 82 A1 00 3C 82 C1 00 40 82 E1 00 44 83 01 00 48 83 21 00 4C 83 41 00 50 83 61 00 54 83 81 00 58 83 A1 00 5C 83 C1 00 60 83 E1 00 64 CB 61 00 68 CB 81 00 70 CB A1 00 78 CB C1 00 80 CB E1 00 88 38 21 00 90 4E 80 00 20
-
-. 0 1000428C 24
-. 30 03 FF FF 7F 80 19 10 3C 80 10 01 38 84 7C 6C 7F 83 E3 78 48 01 13 49
-
-PASS: trap for n = 0 in gsl_fft_complex_wavetable_float_alloc
-. 0 100042A4 8
-. 38 60 00 00 48 00 E6 85
-
-. 0 10012BC0 20
-. 80 7E 80 00 38 A0 00 21 80 9E 82 40 38 C0 00 01 48 00 27 8D
-
-. 0 10012BD4 8
-. 38 60 00 00 4B FF FF 64
-
-. 0 100042AC 24
-. 3C 80 10 01 30 03 FF FF 7F A0 19 10 38 84 7C A4 7F A3 EB 78 48 01 13 29
-
-PASS: trap for n = 0 in gsl_fft_real_wavetable_float_alloc
-. 0 100042C4 8
-. 38 60 00 00 48 00 A4 39
-
-. 0 1000E97C 20
-. 80 7E 80 00 38 A0 00 21 80 9E 81 50 38 C0 00 01 48 00 69 D1
-
-. 0 1000E990 8
-. 38 60 00 00 4B FF FF 74
-
-. 0 100042CC 24
-. 3C 80 10 01 31 23 FF FF 7C 09 19 10 38 84 7C DC 7C 03 03 78 48 01 13 09
-
-PASS: trap for n = 0 in gsl_fft_halfcomplex_wavetable_float_alloc
-. 0 100042E4 8
-. 38 60 00 00 48 00 56 A1
-
-. 0 10009A1C 12
-. 80 7E 80 00 80 9E 80 14 48 00 B9 39
-
-. 0 10009A28 36
-. 38 00 00 00 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 100042EC 16
-. 3C 80 10 01 7F 83 E3 78 38 84 7D 18 48 01 12 F1
-
-PASS: trap for n = 0 in gsl_fft_complex_workspace_float_alloc
-. 0 100042FC 8
-. 38 60 00 00 48 00 E9 7D
-
-. 0 10012D10 12
-. 80 7E 80 00 80 9E 82 40 48 00 26 45
-
-. 0 10012D1C 36
-. 38 00 00 00 7C 03 03 78 80 01 00 24 83 A1 00 14 83 C1 00 18 7C 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 10004304 16
-. 3C 80 10 01 38 84 7D 50 7F A3 EB 78 48 01 12 D9
-
-PASS: trap for n = 0 in gsl_fft_real_workspace_float_alloc
-. 0 10004314 8
-. 38 60 00 0A 48 00 53 51
-
-. 0 1000431C 16
-. 3B A1 00 0C 7C 7B 1B 78 38 60 00 0A 48 00 A3 D9
-
-. 0 1000432C 16
-. 3B 80 00 03 7C 76 1B 78 38 60 00 0A 48 00 E5 F5
-
-. 0 1000433C 12
-. 7C 77 1B 78 38 60 00 0A 48 00 56 45
-
-. 0 10004348 12
-. 7C 7A 1B 78 38 60 00 0A 48 00 E9 2D
-
-. 0 10004354 28
-. 7F 66 DB 78 7C 79 1B 78 7F 47 D3 78 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 7A 11
-
-. 0 1000AA78 20
-. 80 7E 80 00 38 A0 00 6B 80 9E 80 34 38 C0 00 01 48 00 A8 D5
-
-. 0 1000AA8C 8
-. 38 60 00 01 4B FF F9 34
-
-. 0 10004370 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7D 88 48 01 12 69
-
-PASS: trap for n = 0 in gsl_fft_complex_float_forward
-. 0 10004384 24
-. 7E E6 BB 78 7F 27 CB 78 38 A0 00 00 7F 03 C3 78 38 80 00 01 48 00 EA 71
-
-. 0 10014590 20
-. 80 7E 80 00 38 A0 00 36 80 9E 82 4C 38 C0 00 01 48 00 0D BD
-
-. 0 100145A4 8
-. 38 60 00 01 4B FF F2 AC
-
-. 0 1000439C 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7D B8 48 01 12 3D
-
-PASS: trap for n = 0 in gsl_fft_real_float_transform
-. 0 100043B0 24
-. 7E C6 B3 78 7F 27 CB 78 38 A0 00 00 7F 03 C3 78 38 80 00 01 48 00 A6 BD
-
-. 0 1000FBC0 20
-. 80 7E 80 00 38 A0 00 58 80 9E 81 5C 38 C0 00 01 48 00 57 8D
-
-. 0 1000FBD4 8
-. 38 60 00 01 4B FF F5 18
-
-. 0 100043C8 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7D E8 48 01 12 11
-
-PASS: trap for n = 0 in gsl_fft_halfcomplex_float_transform
-. 0 100043DC 16
-. 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 7C AD
-
-. 0 1000C094 20
-. 7C 08 02 A6 94 21 FF F0 38 C0 FF FF 90 01 00 14 4B FF FD 01
-
-. 0 1000BDA4 124
-. 94 21 FF 90 7C 08 02 A6 42 9F 00 05 93 C1 00 40 7F C8 02 A6 2F 85 00 01 90 01 00 74 93 41 00 30 7C DA 33 78 80 1E FF F0 93 81 00 38 7C BC 2B 78 93 A1 00 3C 7F C0 F2 14 93 E1 00 44 7C 9D 23 78 7C 7F 1B 78 DB 61 00 48 DB 81 00 50 38 60 00 00 DB A1 00 58 DB C1 00 60 DB E1 00 68 92 81 00 18 92 A1 00 1C 92 C1 00 20 92 E1 00 24 93 01 00 28 93 21 00 2C 93 61 00 34 41 9E 02 08
-
-. 0 1000BE20 8
-. 7C A3 2B 78 4B FF A9 D5
-
-. 0 1000BE28 12
-. 2F 83 FF FF 7C 79 1B 78 41 9E 02 48
-
-. 0 1000C078 20
-. 80 7E 80 7C 38 A0 00 5A 80 9E 80 80 38 C0 00 04 48 00 92 D5
-
-. 0 1000C08C 8
-. 38 60 00 04 4B FF FF 94
-
-. 0 1000C024 84
-. 80 01 00 74 82 81 00 18 82 A1 00 1C 7C 08 03 A6 82 C1 00 20 82 E1 00 24 83 01 00 28 83 21 00 2C 83 41 00 30 83 61 00 34 83 81 00 38 83 A1 00 3C 83 C1 00 40 83 E1 00 44 CB 61 00 48 CB 81 00 50 CB A1 00 58 CB C1 00 60 CB E1 00 68 38 21 00 70 4E 80 00 20
-
-. 0 1000C0A8 16
-. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-. 0 100043EC 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7E 20 48 01 11 ED
-
-PASS: trap for n = 0 in gsl_fft_complex_float_radix2_forward
-. 0 10004400 24
-. 7F 66 DB 78 7F 47 D3 78 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 79 45
-
-. 0 10004418 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7E 58 48 01 11 C1
-
-PASS: trap for n = 0 in gsl_fft_complex_float_backward
-. 0 1000442C 16
-. 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 7C 81
-
-. 0 1000C0B8 20
-. 7C 08 02 A6 94 21 FF F0 38 C0 00 01 90 01 00 14 4B FF FC DD
-
-. 0 1000C0CC 16
-. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-. 0 1000443C 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7E 8C 48 01 11 9D
-
-PASS: trap for n = 0 in gsl_fft_complex_float_radix2_backward
-. 0 10004450 24
-. 7F 66 DB 78 7F 47 D3 78 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 78 29
-
-. 0 10004468 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7E C4 48 01 11 71
-
-PASS: trap for n = 0 in gsl_fft_complex_float_inverse
-. 0 1000447C 16
-. 38 A0 00 00 7F A3 EB 78 38 80 00 01 48 00 7C 59
-
-. 0 1000C0E0 64
-. 94 21 FF E0 7C 08 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 01 00 24 38 C0 00 01 7C 7F 1B 78 93 81 00 10 80 1E FF F0 7C 9C 23 78 93 A1 00 14 7C BD 2B 78 7F C0 F2 14 4B FF FC 89
-
-. 0 1000C120 8
-. 2C 03 00 00 40 82 00 68
-
-. 0 1000C18C 32
-. 80 01 00 24 83 81 00 10 83 A1 00 14 7C 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 1000448C 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7E F4 48 01 11 4D
-
-PASS: trap for n = 0 in gsl_fft_complex_float_radix2_inverse
-. 0 100044A0 16
-. 38 A0 00 11 7F A3 EB 78 38 80 00 01 48 00 7B E9
-
-. 0 100044B0 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7F 2C 48 01 11 29
-
-PASS: trap for n != 2^k in gsl_fft_complex_float_radix2_forward
-. 0 100044C4 16
-. 38 A0 00 11 7F A3 EB 78 38 80 00 01 48 00 7B E9
-
-. 0 100044D4 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7F 68 48 01 11 05
-
-PASS: trap for n != 2^k in gsl_fft_complex_float_radix2_backward
-. 0 100044E8 16
-. 38 A0 00 11 7F A3 EB 78 38 80 00 01 48 00 7B ED
-
-. 0 100044F8 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7F A4 48 01 10 E1
-
-PASS: trap for n != 2^k in gsl_fft_complex_float_radix2_inverse
-. 0 1000450C 28
-. 7F 66 DB 78 7F 47 D3 78 93 9B 00 00 38 A0 00 04 38 80 00 01 7F A3 EB 78 48 00 78 59
-
-. 0 1000BC50 20
-. 80 7E 80 38 38 A0 00 75 80 9E 80 34 38 C0 00 04 48 00 96 FD
-
-. 0 1000BC64 8
-. 38 60 00 04 4B FF E7 5C
-
-. 0 10004528 20
-. 3C 80 10 01 20 03 00 00 7C 60 19 14 38 84 7F E0 48 01 10 B1
-
-PASS: trap for n != nw in gsl_fft_complex_float_forward
-. 0 1000453C 28
-. 7F 66 DB 78 7F 47 D3 78 93 9B 00 00 38 A0 00 04 38 80 00 01 7F A3 EB 78 48 00 78 05
-
-. 0 10004558 20
-. 3C 80 10 02 20 03 00 00 7C 60 19 14 38 84 80 14 48 01 10 81
-
-PASS: trap for n != nw in gsl_fft_complex_float_backward
-. 0 1000456C 28
-. 7F 66 DB 78 7F 47 D3 78 93 9B 00 00 38 A0 00 04 7F A3 EB 78 38 80 00 01 48 00 77 09
-
-. 0 10004588 20
-. 3C 80 10 02 20 03 00 00 7C 60 19 14 38 84 80 48 48 01 10 51
-
-PASS: trap for n != nw in gsl_fft_complex_float_inverse
-. 0 1000459C 28
-. 7E E6 BB 78 7F 27 CB 78 93 97 00 00 38 A0 00 04 38 80 00 01 7F 03 C3 78 48 00 E8 55
-
-. 0 100145AC 20
-. 80 7E 80 38 38 A0 00 40 80 9E 82 4C 38 C0 00 04 48 00 0D A1
-
-. 0 100145C0 8
-. 38 60 00 04 4B FF F2 90
-
-. 0 100045B8 20
-. 3C 80 10 02 20 03 00 00 7C 60 19 14 38 84 80 7C 48 01 10 21
-
-PASS: trap for n != nw in gsl_fft_real_float_transform
-. 0 100045CC 28
-. 7E C6 B3 78 7F 27 CB 78 38 A0 00 04 93 96 00 00 7F 03 C3 78 38 80 00 01 48 00 A4 9D
-
-. 0 100101C4 20
-. 80 7E 80 38 38 A0 00 62 80 9E 81 5C 38 C0 00 04 48 00 51 89
-
-. 0 100101D8 8
-. 38 60 00 04 4B FF EF 14
-
-. 0 100045E8 20
-. 3C 80 10 02 38 84 80 B0 20 03 00 00 7C 60 19 14 48 01 0F F1
-
-PASS: trap for n != nw in gsl_fft_halfcomplex_float_transform
-. 0 100045FC 8
-. 7E C3 B3 78 48 00 A4 35
-
-. 0 10004604 8
-. 7E E3 BB 78 48 00 E7 6D
-
-. 0 1000460C 8
-. 7F 63 DB 78 48 00 54 71
-
-. 0 10004614 8
-. 7F 23 CB 78 48 00 E7 A5
-
-. 0 1000461C 8
-. 7F 43 D3 78 48 00 54 A9
-
-. 0 10004624 48
-. 80 01 00 44 82 C1 00 18 82 E1 00 1C 7C 08 03 A6 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 38 21 00 40 4E 80 00 20
-
-. 0 10004758 4
-. 48 01 1B 2D
-
-. 0 10016284 52
-. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 38 60 00 01 90 01 00 14 80 1E FF F0 7F C0 F2 14 81 3E 80 10 80 09 00 00 2F 80 00 00 40 9E 00 38
-
-. 0 100162B8 28
-. 81 3E 80 04 38 60 00 00 81 7E 80 00 80 A9 00 00 80 8B 00 00 7F 85 20 00 41 9E 00 1C
-
-. 0 100162EC 20
-. 80 01 00 14 83 C1 00 08 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-. 0 1000475C 4
-. 48 02 48 21
-
-. 0 10028F7C 8
-. 39 60 00 44 4B FF FF 4C
-
-. 0 FEB3B98 12
-. 94 21 FF E0 7C 08 02 A6 48 11 42 B1
-
-. 0 FEB3BA4 44
-. 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 93 81 00 10 7C 7C 1B 78 93 A1 00 14 83 FE 1A FC 90 01 00 24 80 1F 00 00 2F 80 00 00 41 9E 00 CC
-
-. 0 FEB3BD0 16
-. 81 3F 00 00 80 69 00 04 2C 03 00 00 41 82 00 78
-
-. 0 FEB3BE0 8
-. 7D 2A 4B 78 48 00 00 18
-
-. 0 FEB3BFC 36
-. 80 AA 00 04 39 25 FF FF 55 24 20 36 91 2A 00 04 7D 64 52 14 80 0B 00 08 39 6B 00 08 2F 80 00 03 41 9E 00 54
-
-. 0 FEB3C20 12
-. 2C 80 00 02 2F 00 00 04 40 BD FF C0
-
-. 0 FEB3C2C 4
-. 40 9A FF C0
-
-. 0 FEB3C30 20
-. 81 0B 00 04 7F 84 E3 78 80 6B 00 08 7D 09 03 A6 4E 80 04 21
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-. 0 1001654C 68
-. 94 21 FF E0 7C A8 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 93 A1 00 14 90 A1 00 24 80 9E FF F0 7F C4 F2 14 81 7E 80 0C 80 7E 80 08 7C 0B 18 50 7C 09 16 70 2F 89 00 00 3B E9 FF FF 41 9E 00 28
-
-. 0 100165B4 4
-. 48 00 02 69
-
-. 0 1001681C 16
-. 94 21 FF F0 7C 08 02 A6 90 01 00 14 4B FE 9F 05
-
-. 0 1000072C 36
-. 7C 08 02 A6 94 21 FF F0 93 C1 00 08 3F C0 10 03 93 E1 00 0C 90 01 00 14 88 1E 8F FC 2F 80 00 00 40 9E 00 34
-
-. 0 10000750 8
-. 3F E0 10 03 48 00 00 14
-
-. 0 10000768 16
-. 81 7F 8E 74 81 2B 00 00 2F 89 00 00 40 9E FF E4
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-. 0 10000778 32
-. 38 00 00 01 98 1E 8F FC 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
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-. 0 1001682C 16
-. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
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-. 0 100165B8 28
-. 81 01 00 24 83 A1 00 14 83 C1 00 18 7D 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 FEB3C44 16
-. 81 5F 00 00 81 8A 00 04 2C 8C 00 00 40 86 FF AC
-
-. 0 2547BAE0 12
-. 94 21 FF A0 7C 08 02 A6 48 01 B5 19
-
-. 0 2547BAEC 132
-. 93 C1 00 58 7F C8 02 A6 7D 80 00 26 91 C1 00 18 92 41 00 28 81 DE 04 F4 82 5E 04 C8 91 E1 00 1C 39 E0 00 0F 92 01 00 20 3A 00 00 00 92 21 00 24 3A 20 01 68 92 C1 00 38 3A C0 00 00 93 E1 00 5C 7C 3F 0B 78 92 61 00 2C 92 81 00 30 92 A1 00 34 92 E1 00 3C 93 01 00 40 93 21 00 44 93 41 00 48 93 61 00 4C 93 81 00 50 93 A1 00 54 90 01 00 64 91 81 00 14 80 92 03 F8 38 72 01 80 7C 89 03 A6 4E 80 04 21
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-. 0 2547BB70 20
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-. 0 2547BBAC 16
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-. 0 2547BBD8 8
-. 7E F3 BB 79 41 82 01 10
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-. 0 2547BCEC 24
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-. 0 2547BD04 4
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-. 0 2547BD6C 12
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-. 0 2547BB60 16
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-. 0 2547BB84 8
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-. 0 2547BB8C 48
-. 39 0A 00 1E 81 61 00 00 55 07 00 36 7D 50 53 78 7C C7 00 D0 7D 61 31 6E 38 A1 00 17 54 B6 00 36 7D 71 90 2E 3A E0 00 00 2E 0B 00 00 41 92 00 20
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-. 0 2547BBBC 16
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-. 0 2547BCD0 28
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-. 0 2547BBD0 8
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-. 0 2547BBE0 12
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-. 0 2547BBEC 12
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-. 0 2547BBF8 12
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-. 0 2547BC04 12
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-. 0 2547BC14 16
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-. 0 2547BC24 12
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-. 0 2547BC30 32
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-. 0 2547BC50 12
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-. 0 2547BC6C 12
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-. 0 2547BC64 8
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-. 0 2547BC88 12
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-. 0 2547BC3C 20
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-. 0 2547BC94 4
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-. 0 2547BD08 12
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-. 0 2547BD14 24
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-. 0 2547BD2C 8
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-. 0 2547BD34 12
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-. 0 2547BDE8 12
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-. 0 2547BDF4 12
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-. 0 2547BE00 12
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-. 0 2547BE0C 8
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-. 0 2547BE54 12
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-. 0 2547BE60 20
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-. 0 FFDEF80 16
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-. 0 FFDE904 52
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-. 0 FFDE938 12
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-. 0 FFDE944 12
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-. 0 FFEF17C 8
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-. 0 FFEF13C 32
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-. 0 FEB3F44 12
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-. 0 FEB3F50 72
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-. 0 FEB3F98 28
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-. 0 FEB4010 12
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-. 0 FEB401C 4
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-. 0 FEB40B4 60
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-
-. 0 FF5FE10 12
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-. 0 FF5FE1C 64
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-
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-
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-
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-
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-
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-
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-
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-
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-
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-
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-
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-
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-
-. 0 FDF9C30 12
-. 80 1E 80 04 2F 80 00 00 41 9E 00 10
-
-. 0 FDF9C3C 12
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-
-. 0 FE75404 8
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-
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-
-. 0 FDF9C48 8
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-
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-
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-
-. 0 FE2A848 16
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-
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-
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-
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-
-. 0 FE9B5C8 36
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-
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-
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-. 2F 9D 00 00 3B BD FF FF 40 9E FF E8
-
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-
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-. 81 EE 00 00 71 E9 00 80 40 82 01 AC
-
-. 0 2547BD84 100
-. 81 41 00 00 81 CA 00 04 81 8A FF B4 7D C8 03 A6 81 EA FF BC 81 CA FF B8 7D 80 81 20 82 0A FF C0 82 2A FF C4 82 4A FF C8 82 6A FF CC 82 8A FF D0 82 AA FF D4 82 CA FF D8 82 EA FF DC 83 0A FF E0 83 2A FF E4 83 4A FF E8 83 6A FF EC 83 8A FF F0 83 AA FF F4 83 CA FF F8 83 EA FF FC 7D 41 53 78 4E 80 00 20
-
-. 0 FEB3C54 20
-. 80 7F 00 00 80 03 00 00 2F 00 00 00 90 1F 00 00 41 9A FF 64
-
-. 0 FEB3BC8 8
-. 2F 80 00 00 41 9E 00 CC
-
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-. 83 FE 1B BC 83 BE 1C 38 7F 9F E8 40 40 9C 00 1C
-
-. 0 FEB3CA8 16
-. 81 5F 00 00 3B FF 00 04 7D 49 03 A6 4E 80 04 21
-
-. 0 FEECB0C 12
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-
-. 0 FEECB18 32
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-
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-. 94 21 FF B0 7C 88 02 A6 48 0D B9 89
-
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-. 93 C1 00 48 7F C8 02 A6 92 C1 00 28 90 81 00 54 7D 80 00 26 92 E1 00 2C 3A E0 00 00 82 DE 1B 48 93 E1 00 4C 7C 7F 1B 78 81 36 00 B8 93 01 00 30 31 69 FF FF 7C 0B 49 10 93 21 00 34 2D 80 00 00 93 41 00 38 93 61 00 3C 93 81 00 40 93 A1 00 44 91 81 00 24 40 8E 02 48
-
-. 0 FEEC524 20
-. 80 7E 05 E4 92 E1 00 14 90 61 00 10 2E 1F 00 00 41 92 00 50
-
-. 0 FEEC584 24
-. 83 1E 1B EC 83 3E 05 EC 83 F8 00 00 83 99 00 00 2C 9F 00 00 41 86 01 28
-
-. 0 FEEC59C 16
-. 83 5E 05 E8 3B 60 00 00 93 FA 00 00 41 92 00 5C
-
-. 0 FEEC604 12
-. 80 7F 00 60 2F 03 00 00 40 99 01 44
-
-. 0 FEEC750 16
-. 81 7F 00 14 81 3F 00 10 7C 8B 48 40 40 A5 FE B4
-
-. 0 FEEC610 12
-. 89 5F 00 46 2C 0A 00 00 40 82 00 44
-
-. 0 FEEC61C 4
-. 40 99 00 40
-
-. 0 FEEC65C 4
-. 41 92 00 44
-
-. 0 FEEC6A0 16
-. 80 19 00 00 93 7A 00 00 7F 9C 00 00 41 9E 00 9C
-
-. 0 FEEC748 8
-. 83 FF 00 34 4B FF FF 6C
-
-. 0 FEEC6B8 8
-. 2C 1F 00 00 40 82 FE E8
-
-. 0 FEEC5A4 8
-. 93 FA 00 00 41 92 00 5C
-
-. 0 FEEC6C0 4
-. 41 92 00 38
-
-. 0 FEEC6F8 4
-. 40 8E 00 88
-
-. 0 FEEC6FC 68
-. 7E E3 BB 78 81 81 00 24 82 E1 00 54 82 C1 00 28 7D 81 81 20 7E E8 03 A6 83 01 00 30 82 E1 00 2C 83 21 00 34 83 41 00 38 83 61 00 3C 83 81 00 40 83 A1 00 44 83 C1 00 48 83 E1 00 4C 38 21 00 50 4E 80 00 20
-
-. 0 FEECB38 20
-. 81 3E 1B EC 7C 7C 1B 78 83 E9 00 00 2F 9F 00 00 41 9E 00 80
-
-. 0 FEECB4C 8
-. 3B A0 FF FF 48 00 00 14
-
-. 0 FEECB64 20
-. 80 1F 00 00 70 09 00 02 54 03 EF FE 2F 83 00 00 40 A2 FF E0
-
-. 0 FEECB54 16
-. 93 BF 00 60 83 FF 00 34 2F 1F 00 00 41 9A 00 68
-
-. 0 FEECB78 8
-. 70 09 10 00 41 9E 00 08
-
-. 0 FEECB84 24
-. 80 DF 00 60 7F E3 FB 78 38 80 00 00 38 A0 00 00 2C 86 00 00 41 86 FF BC
-
-. 0 FEECB9C 28
-. 89 9F 00 46 7D 8A 07 74 7D 0A FA 14 80 E8 00 98 81 67 00 2C 7D 69 03 A6 4E 80 04 21
-
-. 0 FEE8C4C 24
-. 7C 08 02 A6 94 21 FF F0 93 E1 00 08 7C 7F 1B 78 90 01 00 14 48 00 33 3D
-
-. 0 FEEBF9C 68
-. 7D 48 02 A6 94 21 FF E0 93 81 00 10 7C BC 2B 78 93 A1 00 14 7C 9D 23 78 91 41 00 24 93 E1 00 1C 7C 7F 1B 78 93 C1 00 18 89 03 00 46 7D 07 07 74 7C C7 1A 14 80 86 00 98 81 64 00 30 7D 69 03 A6 4E 80 04 21
-
-. 0 FEEBFE0 32
-. 20 1D 00 00 7D 20 E9 14 2F 83 FF FF 21 7C 00 00 7C 0B E1 14 7D 2B 03 79 38 60 00 00 41 9E 00 54
-
-. 0 FEEC000 20
-. 7F A4 EB 78 7F E3 FB 78 38 BF 00 48 38 C0 00 00 40 82 00 60
-
-. 0 FEEC070 16
-. 81 9F 00 00 38 9F 00 47 61 80 00 02 4B FF FF AC
-
-. 0 FEEC028 8
-. 90 1F 00 00 4B FF FB 51
-
-. 0 FEEBBB8 16
-. 80 03 00 00 7D 23 4B 78 70 0B 00 01 40 A2 00 1C
-
-. 0 FEEBBC8 20
-. 80 DF 00 20 7C A9 30 50 38 85 0F FF 54 84 00 26 48 06 26 A5
-
-. 0 FF4E27C 8
-. 38 00 00 5B 44 00 00 02
-
-. 0 FF4E284 4
-. 4C A3 00 20
-
-. 0 FEEBC20 40
-. 80 61 00 24 90 1F 00 00 83 61 00 0C 7C 68 03 A6 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 FEEC030 64
-. 38 A0 00 00 7F E3 FB 78 90 BF 00 0C 90 BF 00 18 90 BF 00 14 90 BF 00 10 90 BF 00 08 90 BF 00 04 83 81 00 24 83 A1 00 14 7F 88 03 A6 83 C1 00 18 83 81 00 10 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 FEE8C64 12
-. 2F 83 00 00 38 60 00 00 41 9E 00 24
-
-. 0 FEE8C70 52
-. 80 9F 00 1C 7F E3 FB 78 90 9F 00 08 90 9F 00 18 90 9F 00 14 90 9F 00 10 90 9F 00 0C 90 9F 00 04 80 A1 00 14 83 E1 00 08 38 21 00 10 7C A8 03 A6 4E 80 00 20
-
-. 0 FEECBB8 16
-. 93 BF 00 60 83 FF 00 34 2F 1F 00 00 40 9A FF A0
-
-. 0 FEECB80 4
-. 41 A2 FF D4
-
-. 0 FEECBC8 36
-. 80 81 00 24 7F 83 E3 78 83 A1 00 14 83 81 00 10 7C 88 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-. 0 FEB3CB8 8
-. 7F 9F E8 40 41 9C FF EC
-
-. 0 FEB3CC0 8
-. 7F 83 E3 78 48 06 21 41
-
-. 0 FF15E04 8
-. 94 21 FF E0 48 0B 20 49
-
-. 0 FF15E0C 40
-. 93 C1 00 18 7F C8 02 A6 93 A1 00 14 93 E1 00 1C 7C 7F 1B 78 81 3E 1C 4C 7F A9 12 14 38 00 00 EA 7F E3 FB 78 44 00 00 02
-
-==3281==
+++ /dev/null
-==== BB 0 _start(0x254804D4) approx BBs exec'd 0 ====
-
- 0x254804D4: 7C230B78 or r3,r1,r1
- 0: GETL R1, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x254804D8: 38800000 li r4,0
- 3: MOVL $0x0, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x254804DC: 3821FFF0 addi r1,r1,-16
- 6: GETL R1, t4
- 7: ADDL $0xFFFFFFF0, t4
- 8: PUTL t4, R1
- 9: INCEIPL $4
-
- 0x254804E0: 90810000 stw r4,0(r1)
- 10: GETL R4, t6
- 11: GETL R1, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x254804E4: 4BFF1581 bl 0x25471A64
- 14: MOVL $0x254804E8, t10
- 15: PUTL t10, LR
- 16: JMPo-c $0x25471A64 ($4)
-
-
-. 0 254804D4 20
-. 7C 23 0B 78 38 80 00 00 38 21 FF F0 90 81 00 00 4B FF 15 81
-
-==== BB 1 _dl_start(0x25471A64) approx BBs exec'd 0 ====
-
- 0x25471A64: 7C0802A6 mflr r0
- 0: GETL LR, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x25471A68: 3960004B li r11,75
- 3: MOVL $0x4B, t2
- 4: PUTL t2, R11
- 5: INCEIPL $4
-
- 0x25471A6C: 9421FD50 stwu r1,-688(r1)
- 6: GETL R1, t4
- 7: GETL R1, t6
- 8: ADDL $0xFFFFFD50, t6
- 9: PUTL t6, R1
- 10: STL t4, (t6)
- 11: INCEIPL $4
-
- 0x25471A70: 7D6903A6 mtctr r11
- 12: GETL R11, t8
- 13: PUTL t8, CTR
- 14: INCEIPL $4
-
- 0x25471A74: 92E1028C stw r23,652(r1)
- 15: GETL R23, t10
- 16: GETL R1, t12
- 17: ADDL $0x28C, t12
- 18: STL t10, (t12)
- 19: INCEIPL $4
-
- 0x25471A78: 900102B4 stw r0,692(r1)
- 20: GETL R0, t14
- 21: GETL R1, t16
- 22: ADDL $0x2B4, t16
- 23: STL t14, (t16)
- 24: INCEIPL $4
-
- 0x25471A7C: 7C771B78 or r23,r3,r3
- 25: GETL R3, t18
- 26: PUTL t18, R23
- 27: INCEIPL $4
-
- 0x25471A80: 93010290 stw r24,656(r1)
- 28: GETL R24, t20
- 29: GETL R1, t22
- 30: ADDL $0x290, t22
- 31: STL t20, (t22)
- 32: INCEIPL $4
-
- 0x25471A84: 38000000 li r0,0
- 33: MOVL $0x0, t24
- 34: PUTL t24, R0
- 35: INCEIPL $4
-
- 0x25471A88: 93210294 stw r25,660(r1)
- 36: GETL R25, t26
- 37: GETL R1, t28
- 38: ADDL $0x294, t28
- 39: STL t26, (t28)
- 40: INCEIPL $4
-
- 0x25471A8C: 39210030 addi r9,r1,48
- 41: GETL R1, t30
- 42: ADDL $0x30, t30
- 43: PUTL t30, R9
- 44: INCEIPL $4
-
- 0x25471A90: 93410298 stw r26,664(r1)
- 45: GETL R26, t32
- 46: GETL R1, t34
- 47: ADDL $0x298, t34
- 48: STL t32, (t34)
- 49: INCEIPL $4
-
- 0x25471A94: 9361029C stw r27,668(r1)
- 50: GETL R27, t36
- 51: GETL R1, t38
- 52: ADDL $0x29C, t38
- 53: STL t36, (t38)
- 54: INCEIPL $4
-
- 0x25471A98: 938102A0 stw r28,672(r1)
- 55: GETL R28, t40
- 56: GETL R1, t42
- 57: ADDL $0x2A0, t42
- 58: STL t40, (t42)
- 59: INCEIPL $4
-
- 0x25471A9C: 93A102A4 stw r29,676(r1)
- 60: GETL R29, t44
- 61: GETL R1, t46
- 62: ADDL $0x2A4, t46
- 63: STL t44, (t46)
- 64: INCEIPL $4
-
- 0x25471AA0: 93C102A8 stw r30,680(r1)
- 65: GETL R30, t48
- 66: GETL R1, t50
- 67: ADDL $0x2A8, t50
- 68: STL t48, (t50)
- 69: INCEIPL $4
-
- 0x25471AA4: 93E102AC stw r31,684(r1)
- 70: GETL R31, t52
- 71: GETL R1, t54
- 72: ADDL $0x2AC, t54
- 73: STL t52, (t54)
- 74: INCEIPL $4
-
- 0x25471AA8: 90090000 stw r0,0(r9)
- 75: GETL R0, t56
- 76: GETL R9, t58
- 77: STL t56, (t58)
- 78: INCEIPL $4
-
- 0x25471AAC: 39290004 addi r9,r9,4
- 79: GETL R9, t60
- 80: ADDL $0x4, t60
- 81: PUTL t60, R9
- 82: INCEIPL $4
-
- 0x25471AB0: 4200FFF8 bc 16,0,0x25471AA8
- 83: GETL CTR, t62
- 84: ADDL $0xFFFFFFFF, t62
- 85: PUTL t62, CTR
- 86: JIFZL t62, $0x25471AB4
- 87: JMPo $0x25471AA8 ($4)
-
-
-. 0 25471A64 80
-. 7C 08 02 A6 39 60 00 4B 94 21 FD 50 7D 69 03 A6 92 E1 02 8C 90 01 02 B4 7C 77 1B 78 93 01 02 90 38 00 00 00 93 21 02 94 39 21 00 30 93 41 02 98 93 61 02 9C 93 81 02 A0 93 A1 02 A4 93 C1 02 A8 93 E1 02 AC 90 09 00 00 39 29 00 04 42 00 FF F8
-
-==== BB 2 (0x25471AA8) approx BBs exec'd 0 ====
-
- 0x25471AA8: 90090000 stw r0,0(r9)
- 0: GETL R0, t0
- 1: GETL R9, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0x25471AAC: 39290004 addi r9,r9,4
- 4: GETL R9, t4
- 5: ADDL $0x4, t4
- 6: PUTL t4, R9
- 7: INCEIPL $4
-
- 0x25471AB0: 4200FFF8 bc 16,0,0x25471AA8
- 8: GETL CTR, t6
- 9: ADDL $0xFFFFFFFF, t6
- 10: PUTL t6, CTR
- 11: JIFZL t6, $0x25471AB4
- 12: JMPo $0x25471AA8 ($4)
-
-
-. 0 25471AA8 12
-. 90 09 00 00 39 29 00 04 42 00 FF F8
-
-==== BB 3 (0x25471AB4) approx BBs exec'd 0 ====
-
- 0x25471AB4: 48000009 bl 0x25471ABC
- 0: MOVL $0x25471AB8, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x25471ABC ($4)
-
-
-. 0 25471AB4 4
-. 48 00 00 09
-
-==== BB 4 (0x25471ABC) approx BBs exec'd 0 ====
-
- 0x25471ABC: 7CE802A6 mflr r7
- 0: GETL LR, t0
- 1: PUTL t0, R7
- 2: INCEIPL $4
-
- 0x25471AC0: 3B010010 addi r24,r1,16
- 3: GETL R1, t2
- 4: ADDL $0x10, t2
- 5: PUTL t2, R24
- 6: INCEIPL $4
-
- 0x25471AC4: 4802553D bl 0x25497000
- 7: MOVL $0x25471AC8, t4
- 8: PUTL t4, LR
- 9: JMPo-c $0x25497000 ($4)
-
-
-. 0 25471ABC 12
-. 7C E8 02 A6 3B 01 00 10 48 02 55 3D
-
-==== BB 5 (0x25497000) approx BBs exec'd 0 ====
-
- 0x25497000: 4E800021 blrl
- 0: GETL LR, t0
- 1: MOVL $0x25497004, t2
- 2: PUTL t2, LR
- 3: JMPo-r t0 ($4)
-
-
-. 0 25497000 4
-. 4E 80 00 21
-
-==== BB 6 (0x25471AC8) approx BBs exec'd 0 ====
-
- 0x25471AC8: 7D4802A6 mflr r10
- 0: GETL LR, t0
- 1: PUTL t0, R10
- 2: INCEIPL $4
-
- 0x25471ACC: 81870000 lwz r12,0(r7)
- 3: GETL R7, t2
- 4: LDL (t2), t4
- 5: PUTL t4, R12
- 6: INCEIPL $4
-
- 0x25471AD0: 810A0000 lwz r8,0(r10)
- 7: GETL R10, t6
- 8: LDL (t6), t8
- 9: PUTL t8, R8
- 10: INCEIPL $4
-
- 0x25471AD4: 5586302E rlwinm r6,r12,6,0,23
- 11: GETL R12, t10
- 12: ROLL $0x6, t10
- 13: ANDL $0xFFFFFF00, t10
- 14: PUTL t10, R6
- 15: INCEIPL $4
-
- 0x25471AD8: 7CC43670 srawi r4,r6,6
- 16: GETL R6, t12
- 17: SARL $0x6, t12 (-wCa)
- 18: PUTL t12, R4
- 19: INCEIPL $4
-
- 0x25471ADC: 7CA83850 subf r5,r8,r7
- 20: GETL R8, t14
- 21: GETL R7, t16
- 22: SUBL t14, t16
- 23: PUTL t16, R5
- 24: INCEIPL $4
-
- 0x25471AE0: 39010030 addi r8,r1,48
- 25: GETL R1, t18
- 26: ADDL $0x30, t18
- 27: PUTL t18, R8
- 28: INCEIPL $4
-
- 0x25471AE4: 7CE52214 add r7,r5,r4
- 29: GETL R5, t20
- 30: GETL R4, t22
- 31: ADDL t20, t22
- 32: PUTL t22, R7
- 33: INCEIPL $4
-
- 0x25471AE8: 90E10010 stw r7,16(r1)
- 34: GETL R7, t24
- 35: GETL R1, t26
- 36: ADDL $0x10, t26
- 37: STL t24, (t26)
- 38: INCEIPL $4
-
- 0x25471AEC: 806A0000 lwz r3,0(r10)
- 39: GETL R10, t28
- 40: LDL (t28), t30
- 41: PUTL t30, R3
- 42: INCEIPL $4
-
- 0x25471AF0: 7C07182E lwzx r0,r7,r3
- 43: GETL R3, t32
- 44: GETL R7, t34
- 45: ADDL t34, t32
- 46: LDL (t32), t36
- 47: PUTL t36, R0
- 48: INCEIPL $4
-
- 0x25471AF4: 7D271A14 add r9,r7,r3
- 49: GETL R7, t38
- 50: GETL R3, t40
- 51: ADDL t38, t40
- 52: PUTL t40, R9
- 53: INCEIPL $4
-
- 0x25471AF8: 91210018 stw r9,24(r1)
- 54: GETL R9, t42
- 55: GETL R1, t44
- 56: ADDL $0x18, t44
- 57: STL t42, (t44)
- 58: INCEIPL $4
-
- 0x25471AFC: 7D2A4B78 or r10,r9,r9
- 59: GETL R9, t46
- 60: PUTL t46, R10
- 61: INCEIPL $4
-
- 0x25471B00: 2F800000 cmpi cr7,r0,0
- 62: GETL R0, t48
- 63: CMP0L t48, t50 (-rSo)
- 64: ICRFL t50, $0x7, CR
- 65: INCEIPL $4
-
- 0x25471B04: 419E0068 bc 12,30,0x25471B6C
- 66: Js30o $0x25471B6C
-
-
-. 0 25471AC8 64
-. 7D 48 02 A6 81 87 00 00 81 0A 00 00 55 86 30 2E 7C C4 36 70 7C A8 38 50 39 01 00 30 7C E5 22 14 90 E1 00 10 80 6A 00 00 7C 07 18 2E 7D 27 1A 14 91 21 00 18 7D 2A 4B 78 2F 80 00 00 41 9E 00 68
-
-==== BB 7 (0x25471B08) approx BBs exec'd 0 ====
-
- 0x25471B08: 3FE06FFF lis r31,28671
- 0: MOVL $0x6FFF0000, t0
- 1: PUTL t0, R31
- 2: INCEIPL $4
-
- 0x25471B0C: 3F607000 lis r27,28672
- 3: MOVL $0x70000000, t2
- 4: PUTL t2, R27
- 5: INCEIPL $4
-
- 0x25471B10: 3F406FFF lis r26,28671
- 6: MOVL $0x6FFF0000, t4
- 7: PUTL t4, R26
- 8: INCEIPL $4
-
- 0x25471B14: 3F206FFF lis r25,28671
- 9: MOVL $0x6FFF0000, t6
- 10: PUTL t6, R25
- 11: INCEIPL $4
-
- 0x25471B18: 3FA06FFF lis r29,28671
- 12: MOVL $0x6FFF0000, t8
- 13: PUTL t8, R29
- 14: INCEIPL $4
-
- 0x25471B1C: 3F806FFF lis r28,28671
- 15: MOVL $0x6FFF0000, t10
- 16: PUTL t10, R28
- 17: INCEIPL $4
-
- 0x25471B20: 7C0B0378 or r11,r0,r0
- 18: GETL R0, t12
- 19: PUTL t12, R11
- 20: INCEIPL $4
-
- 0x25471B24: 63E6FFFF ori r6,r31,0xFFFF
- 21: MOVL $0x6FFFFFFF, t14
- 22: PUTL t14, R6
- 23: INCEIPL $4
-
- 0x25471B28: 63650021 ori r5,r27,0x21
- 24: MOVL $0x70000021, t16
- 25: PUTL t16, R5
- 26: INCEIPL $4
-
- 0x25471B2C: 6344FDFF ori r4,r26,0xFDFF
- 27: MOVL $0x6FFFFDFF, t18
- 28: PUTL t18, R4
- 29: INCEIPL $4
-
- 0x25471B30: 6323FE34 ori r3,r25,0xFE34
- 30: MOVL $0x6FFFFE34, t20
- 31: PUTL t20, R3
- 32: INCEIPL $4
-
- 0x25471B34: 63BDFEFF ori r29,r29,0xFEFF
- 33: MOVL $0x6FFFFEFF, t22
- 34: PUTL t22, R29
- 35: INCEIPL $4
-
- 0x25471B38: 639CFF40 ori r28,r28,0xFF40
- 36: MOVL $0x6FFFFF40, t24
- 37: PUTL t24, R28
- 38: INCEIPL $4
-
- 0x25471B3C: 2C0B0021 cmpi cr0,r11,33
- 39: GETL R11, t26
- 40: MOVL $0x21, t30
- 41: CMPL t26, t30, t28 (-rSo)
- 42: ICRFL t28, $0x0, CR
- 43: INCEIPL $4
-
- 0x25471B40: 5560103A rlwinm r0,r11,2,0,29
- 44: GETL R11, t32
- 45: SHLL $0x2, t32
- 46: PUTL t32, R0
- 47: INCEIPL $4
-
- 0x25471B44: 40810018 bc 4,1,0x25471B5C
- 48: Jc01o $0x25471B5C
-
-
-. 0 25471B08 64
-. 3F E0 6F FF 3F 60 70 00 3F 40 6F FF 3F 20 6F FF 3F A0 6F FF 3F 80 6F FF 7C 0B 03 78 63 E6 FF FF 63 65 00 21 63 44 FD FF 63 23 FE 34 63 BD FE FF 63 9C FF 40 2C 0B 00 21 55 60 10 3A 40 81 00 18
-
-==== BB 8 (0x25471B5C) approx BBs exec'd 0 ====
-
- 0x25471B5C: 7D48012E stwx r10,r8,r0
- 0: GETL R0, t0
- 1: GETL R8, t2
- 2: ADDL t2, t0
- 3: GETL R10, t4
- 4: STL t4, (t0)
- 5: INCEIPL $4
-
- 0x25471B60: 856A0008 lwzu r11,8(r10)
- 6: GETL R10, t6
- 7: ADDL $0x8, t6
- 8: PUTL t6, R10
- 9: LDL (t6), t8
- 10: PUTL t8, R11
- 11: INCEIPL $4
-
- 0x25471B64: 2C8B0000 cmpi cr1,r11,0
- 12: GETL R11, t10
- 13: CMP0L t10, t12 (-rSo)
- 14: ICRFL t12, $0x1, CR
- 15: INCEIPL $4
-
- 0x25471B68: 4086FFD4 bc 4,6,0x25471B3C
- 16: Jc06o $0x25471B3C
-
-
-. 0 25471B5C 16
-. 7D 48 01 2E 85 6A 00 08 2C 8B 00 00 40 86 FF D4
-
-==== BB 9 (0x25471B3C) approx BBs exec'd 0 ====
-
- 0x25471B3C: 2C0B0021 cmpi cr0,r11,33
- 0: GETL R11, t0
- 1: MOVL $0x21, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x25471B40: 5560103A rlwinm r0,r11,2,0,29
- 5: GETL R11, t6
- 6: SHLL $0x2, t6
- 7: PUTL t6, R0
- 8: INCEIPL $4
-
- 0x25471B44: 40810018 bc 4,1,0x25471B5C
- 9: Jc01o $0x25471B5C
-
-
-. 0 25471B3C 12
-. 2C 0B 00 21 55 60 10 3A 40 81 00 18
-
-==== BB 10 (0x25471B48) approx BBs exec'd 0 ====
-
- 0x25471B48: 7C0B3050 subf r0,r11,r6
- 0: GETL R11, t0
- 1: GETL R6, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25471B4C: 2880000F cmpli cr1,r0,15
- 5: GETL R0, t4
- 6: MOVL $0xF, t8
- 7: CMPUL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x1, CR
- 9: INCEIPL $4
-
- 0x25471B50: 418502D8 bc 12,5,0x25471E28
- 10: Js05o $0x25471E28
-
-
-. 0 25471B48 12
-. 7C 0B 30 50 28 80 00 0F 41 85 02 D8
-
-==== BB 11 (0x25471B54) approx BBs exec'd 0 ====
-
- 0x25471B54: 7C0B2850 subf r0,r11,r5
- 0: GETL R11, t0
- 1: GETL R5, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25471B58: 5400103A rlwinm r0,r0,2,0,29
- 5: GETL R0, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x25471B5C: 7D48012E stwx r10,r8,r0
- 9: GETL R0, t6
- 10: GETL R8, t8
- 11: ADDL t8, t6
- 12: GETL R10, t10
- 13: STL t10, (t6)
- 14: INCEIPL $4
-
- 0x25471B60: 856A0008 lwzu r11,8(r10)
- 15: GETL R10, t12
- 16: ADDL $0x8, t12
- 17: PUTL t12, R10
- 18: LDL (t12), t14
- 19: PUTL t14, R11
- 20: INCEIPL $4
-
- 0x25471B64: 2C8B0000 cmpi cr1,r11,0
- 21: GETL R11, t16
- 22: CMP0L t16, t18 (-rSo)
- 23: ICRFL t18, $0x1, CR
- 24: INCEIPL $4
-
- 0x25471B68: 4086FFD4 bc 4,6,0x25471B3C
- 25: Jc06o $0x25471B3C
-
-
-. 0 25471B54 24
-. 7C 0B 28 50 54 00 10 3A 7D 48 01 2E 85 6A 00 08 2C 8B 00 00 40 86 FF D4
-
-==== BB 12 (0x25471E28) approx BBs exec'd 0 ====
-
- 0x25471E28: 5579083C rlwinm r25,r11,1,0,30
- 0: GETL R11, t0
- 1: SHLL $0x1, t0
- 2: PUTL t0, R25
- 3: INCEIPL $4
-
- 0x25471E2C: 7F2C0E70 srawi r12,r25,1
- 4: GETL R25, t2
- 5: SARL $0x1, t2 (-wCa)
- 6: PUTL t2, R12
- 7: INCEIPL $4
-
- 0x25471E30: 7D8960F8 nor r9,r12,r12
- 8: GETL R12, t4
- 9: NOTL t4
- 10: PUTL t4, R9
- 11: INCEIPL $4
-
- 0x25471E34: 200C0031 subfic r0,r12,49
- 12: GETL R12, t6
- 13: MOVL $0x31, t8
- 14: SBBL t6, t8 (-wCa)
- 15: PUTL t8, R0
- 16: INCEIPL $4
-
- 0x25471E38: 2B090002 cmpli cr6,r9,2
- 17: GETL R9, t10
- 18: MOVL $0x2, t14
- 19: CMPUL t10, t14, t12 (-rSo)
- 20: ICRFL t12, $0x6, CR
- 21: INCEIPL $4
-
- 0x25471E3C: 40B9FD1C bc 5,25,0x25471B58
- 22: Jc25o $0x25471B58
-
-
-. 0 25471E28 24
-. 55 79 08 3C 7F 2C 0E 70 7D 89 60 F8 20 0C 00 31 2B 09 00 02 40 B9 FD 1C
-
-==== BB 13 (0x25471E40) approx BBs exec'd 0 ====
-
- 0x25471E40: 7F4B2050 subf r26,r11,r4
- 0: GETL R11, t0
- 1: GETL R4, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0x25471E44: 2B9A000B cmpli cr7,r26,11
- 5: GETL R26, t4
- 6: MOVL $0xB, t8
- 7: CMPUL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x7, CR
- 9: INCEIPL $4
-
- 0x25471E48: 419D0010 bc 12,29,0x25471E58
- 10: Js29o $0x25471E58
-
-
-. 0 25471E40 12
-. 7F 4B 20 50 2B 9A 00 0B 41 9D 00 10
-
-==== BB 14 (0x25471E4C) approx BBs exec'd 0 ====
-
- 0x25471E4C: 7C0B1850 subf r0,r11,r3
- 0: GETL R11, t0
- 1: GETL R3, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25471E50: 5400103A rlwinm r0,r0,2,0,29
- 5: GETL R0, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x25471E54: 4BFFFD08 b 0x25471B5C
- 9: JMPo $0x25471B5C ($4)
-
-
-. 0 25471E4C 12
-. 7C 0B 18 50 54 00 10 3A 4B FF FD 08
-
-==== BB 15 (0x25471B6C) approx BBs exec'd 0 ====
-
- 0x25471B6C: 81780000 lwz r11,0(r24)
- 0: GETL R24, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R11
- 3: INCEIPL $4
-
- 0x25471B70: 2F0B0000 cmpi cr6,r11,0
- 4: GETL R11, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x6, CR
- 7: INCEIPL $4
-
- 0x25471B74: 419A00B0 bc 12,26,0x25471C24
- 8: Js26o $0x25471C24
-
-
-. 0 25471B6C 12
-. 81 78 00 00 2F 0B 00 00 41 9A 00 B0
-
-==== BB 16 (0x25471B78) approx BBs exec'd 0 ====
-
- 0x25471B78: 81280010 lwz r9,16(r8)
- 0: GETL R8, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25471B7C: 2F890000 cmpi cr7,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x25471B80: 419E0010 bc 12,30,0x25471B90
- 9: Js30o $0x25471B90
-
-
-. 0 25471B78 12
-. 81 28 00 10 2F 89 00 00 41 9E 00 10
-
-==== BB 17 (0x25471B84) approx BBs exec'd 0 ====
-
- 0x25471B84: 81490004 lwz r10,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x25471B88: 7C6A5A14 add r3,r10,r11
- 5: GETL R10, t4
- 6: GETL R11, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x25471B8C: 90690004 stw r3,4(r9)
- 10: GETL R3, t8
- 11: GETL R9, t10
- 12: ADDL $0x4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25471B90: 8128000C lwz r9,12(r8)
- 15: GETL R8, t12
- 16: ADDL $0xC, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25471B94: 2C090000 cmpi cr0,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x0, CR
- 23: INCEIPL $4
-
- 0x25471B98: 41820010 bc 12,2,0x25471BA8
- 24: Js02o $0x25471BA8
-
-
-. 0 25471B84 24
-. 81 49 00 04 7C 6A 5A 14 90 69 00 04 81 28 00 0C 2C 09 00 00 41 82 00 10
-
-==== BB 18 (0x25471B9C) approx BBs exec'd 0 ====
-
- 0x25471B9C: 80A90004 lwz r5,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25471BA0: 7C855A14 add r4,r5,r11
- 5: GETL R5, t4
- 6: GETL R11, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R4
- 9: INCEIPL $4
-
- 0x25471BA4: 90890004 stw r4,4(r9)
- 10: GETL R4, t8
- 11: GETL R9, t10
- 12: ADDL $0x4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25471BA8: 81280014 lwz r9,20(r8)
- 15: GETL R8, t12
- 16: ADDL $0x14, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25471BAC: 2C890000 cmpi cr1,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x1, CR
- 23: INCEIPL $4
-
- 0x25471BB0: 41860010 bc 12,6,0x25471BC0
- 24: Js06o $0x25471BC0
-
-
-. 0 25471B9C 24
-. 80 A9 00 04 7C 85 5A 14 90 89 00 04 81 28 00 14 2C 89 00 00 41 86 00 10
-
-==== BB 19 (0x25471BB4) approx BBs exec'd 0 ====
-
- 0x25471BB4: 80E90004 lwz r7,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x25471BB8: 7CC75A14 add r6,r7,r11
- 5: GETL R7, t4
- 6: GETL R11, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R6
- 9: INCEIPL $4
-
- 0x25471BBC: 90C90004 stw r6,4(r9)
- 10: GETL R6, t8
- 11: GETL R9, t10
- 12: ADDL $0x4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25471BC0: 81280018 lwz r9,24(r8)
- 15: GETL R8, t12
- 16: ADDL $0x18, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25471BC4: 2F090000 cmpi cr6,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x6, CR
- 23: INCEIPL $4
-
- 0x25471BC8: 419A0010 bc 12,26,0x25471BD8
- 24: Js26o $0x25471BD8
-
-
-. 0 25471BB4 24
-. 80 E9 00 04 7C C7 5A 14 90 C9 00 04 81 28 00 18 2F 09 00 00 41 9A 00 10
-
-==== BB 20 (0x25471BCC) approx BBs exec'd 0 ====
-
- 0x25471BCC: 83A90004 lwz r29,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x25471BD0: 7F9D5A14 add r28,r29,r11
- 5: GETL R29, t4
- 6: GETL R11, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R28
- 9: INCEIPL $4
-
- 0x25471BD4: 93890004 stw r28,4(r9)
- 10: GETL R28, t8
- 11: GETL R9, t10
- 12: ADDL $0x4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25471BD8: 8128001C lwz r9,28(r8)
- 15: GETL R8, t12
- 16: ADDL $0x1C, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25471BDC: 2F890000 cmpi cr7,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x7, CR
- 23: INCEIPL $4
-
- 0x25471BE0: 419E0010 bc 12,30,0x25471BF0
- 24: Js30o $0x25471BF0
-
-
-. 0 25471BCC 24
-. 83 A9 00 04 7F 9D 5A 14 93 89 00 04 81 28 00 1C 2F 89 00 00 41 9E 00 10
-
-==== BB 21 (0x25471BE4) approx BBs exec'd 0 ====
-
- 0x25471BE4: 80090004 lwz r0,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25471BE8: 7FE05A14 add r31,r0,r11
- 5: GETL R0, t4
- 6: GETL R11, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R31
- 9: INCEIPL $4
-
- 0x25471BEC: 93E90004 stw r31,4(r9)
- 10: GETL R31, t8
- 11: GETL R9, t10
- 12: ADDL $0x4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25471BF0: 8128005C lwz r9,92(r8)
- 15: GETL R8, t12
- 16: ADDL $0x5C, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25471BF4: 2C090000 cmpi cr0,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x0, CR
- 23: INCEIPL $4
-
- 0x25471BF8: 41820010 bc 12,2,0x25471C08
- 24: Js02o $0x25471C08
-
-
-. 0 25471BE4 24
-. 80 09 00 04 7F E0 5A 14 93 E9 00 04 81 28 00 5C 2C 09 00 00 41 82 00 10
-
-==== BB 22 (0x25471BFC) approx BBs exec'd 0 ====
-
- 0x25471BFC: 83290004 lwz r25,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R25
- 4: INCEIPL $4
-
- 0x25471C00: 7D995A14 add r12,r25,r11
- 5: GETL R25, t4
- 6: GETL R11, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R12
- 9: INCEIPL $4
-
- 0x25471C04: 91890004 stw r12,4(r9)
- 10: GETL R12, t8
- 11: GETL R9, t10
- 12: ADDL $0x4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25471C08: 812800C4 lwz r9,196(r8)
- 15: GETL R8, t12
- 16: ADDL $0xC4, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25471C0C: 2C890000 cmpi cr1,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x1, CR
- 23: INCEIPL $4
-
- 0x25471C10: 41860010 bc 12,6,0x25471C20
- 24: Js06o $0x25471C20
-
-
-. 0 25471BFC 24
-. 83 29 00 04 7D 99 5A 14 91 89 00 04 81 28 00 C4 2C 89 00 00 41 86 00 10
-
-==== BB 23 (0x25471C14) approx BBs exec'd 0 ====
-
- 0x25471C14: 83490004 lwz r26,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0x25471C18: 7D1A5A14 add r8,r26,r11
- 5: GETL R26, t4
- 6: GETL R11, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R8
- 9: INCEIPL $4
-
- 0x25471C1C: 91090004 stw r8,4(r9)
- 10: GETL R8, t8
- 11: GETL R9, t10
- 12: ADDL $0x4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25471C20: 80E10010 lwz r7,16(r1)
- 15: GETL R1, t12
- 16: ADDL $0x10, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R7
- 19: INCEIPL $4
-
- 0x25471C24: 2F070000 cmpi cr6,r7,0
- 20: GETL R7, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x6, CR
- 23: INCEIPL $4
-
- 0x25471C28: 3960FFFF li r11,-1
- 24: MOVL $0xFFFFFFFF, t20
- 25: PUTL t20, R11
- 26: INCEIPL $4
-
- 0x25471C2C: 9161023C stw r11,572(r1)
- 27: GETL R11, t22
- 28: GETL R1, t24
- 29: ADDL $0x23C, t24
- 30: STL t22, (t24)
- 31: INCEIPL $4
-
- 0x25471C30: 409A0010 bc 4,26,0x25471C40
- 32: Jc26o $0x25471C40
-
-
-. 0 25471C14 32
-. 83 49 00 04 7D 1A 5A 14 91 09 00 04 80 E1 00 10 2F 07 00 00 39 60 FF FF 91 61 02 3C 40 9A 00 10
-
-==== BB 24 (0x25471C40) approx BBs exec'd 0 ====
-
- 0x25471C40: 7F03C378 or r3,r24,r24
- 0: GETL R24, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25471C44: 38800000 li r4,0
- 3: MOVL $0x0, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x25471C48: 38A00000 li r5,0
- 6: MOVL $0x0, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x25471C4C: 3B600000 li r27,0
- 9: MOVL $0x0, t6
- 10: PUTL t6, R27
- 11: INCEIPL $4
-
- 0x25471C50: 4800EBE1 bl 0x25480830
- 12: MOVL $0x25471C54, t8
- 13: PUTL t8, LR
- 14: JMPo-c $0x25480830 ($4)
-
-
-. 0 25471C40 20
-. 7F 03 C3 78 38 80 00 00 38 A0 00 00 3B 60 00 00 48 00 EB E1
-
-==== BB 25 __elf_machine_runtime_setup(0x25480830) approx BBs exec'd 0 ====
-
- 0x25480830: 7CC802A6 mflr r6
- 0: GETL LR, t0
- 1: PUTL t0, R6
- 2: INCEIPL $4
-
- 0x25480834: 9421FFD0 stwu r1,-48(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFFD0, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0x25480838: 7D800026 mfcr r12
- 9: GETL CR, t6
- 10: PUTL t6, R12
- 11: INCEIPL $4
-
- 0x2548083C: 480167C5 bl 0x25497000
- 12: MOVL $0x25480840, t8
- 13: PUTL t8, LR
- 14: JMPo-c $0x25497000 ($4)
-
-
-. 0 25480830 16
-. 7C C8 02 A6 94 21 FF D0 7D 80 00 26 48 01 67 C5
-
-==== BB 26 (0x25480840) approx BBs exec'd 0 ====
-
- 0x25480840: 93210014 stw r25,20(r1)
- 0: GETL R25, t0
- 1: GETL R1, t2
- 2: ADDL $0x14, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25480844: 7C992378 or r25,r4,r4
- 5: GETL R4, t4
- 6: PUTL t4, R25
- 7: INCEIPL $4
-
- 0x25480848: 90C10034 stw r6,52(r1)
- 8: GETL R6, t6
- 9: GETL R1, t8
- 10: ADDL $0x34, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2548084C: 8003007C lwz r0,124(r3)
- 13: GETL R3, t10
- 14: ADDL $0x7C, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R0
- 17: INCEIPL $4
-
- 0x25480850: 93A10024 stw r29,36(r1)
- 18: GETL R29, t14
- 19: GETL R1, t16
- 20: ADDL $0x24, t16
- 21: STL t14, (t16)
- 22: INCEIPL $4
-
- 0x25480854: 7C7D1B78 or r29,r3,r3
- 23: GETL R3, t18
- 24: PUTL t18, R29
- 25: INCEIPL $4
-
- 0x25480858: 2F800000 cmpi cr7,r0,0
- 26: GETL R0, t20
- 27: CMP0L t20, t22 (-rSo)
- 28: ICRFL t22, $0x7, CR
- 29: INCEIPL $4
-
- 0x2548085C: 93C10028 stw r30,40(r1)
- 30: GETL R30, t24
- 31: GETL R1, t26
- 32: ADDL $0x28, t26
- 33: STL t24, (t26)
- 34: INCEIPL $4
-
- 0x25480860: 92E1000C stw r23,12(r1)
- 35: GETL R23, t28
- 36: GETL R1, t30
- 37: ADDL $0xC, t30
- 38: STL t28, (t30)
- 39: INCEIPL $4
-
- 0x25480864: 7FC802A6 mflr r30
- 40: GETL LR, t32
- 41: PUTL t32, R30
- 42: INCEIPL $4
-
- 0x25480868: 93010010 stw r24,16(r1)
- 43: GETL R24, t34
- 44: GETL R1, t36
- 45: ADDL $0x10, t36
- 46: STL t34, (t36)
- 47: INCEIPL $4
-
- 0x2548086C: 93410018 stw r26,24(r1)
- 48: GETL R26, t38
- 49: GETL R1, t40
- 50: ADDL $0x18, t40
- 51: STL t38, (t40)
- 52: INCEIPL $4
-
- 0x25480870: 9361001C stw r27,28(r1)
- 53: GETL R27, t42
- 54: GETL R1, t44
- 55: ADDL $0x1C, t44
- 56: STL t42, (t44)
- 57: INCEIPL $4
-
- 0x25480874: 93810020 stw r28,32(r1)
- 58: GETL R28, t46
- 59: GETL R1, t48
- 60: ADDL $0x20, t48
- 61: STL t46, (t48)
- 62: INCEIPL $4
-
- 0x25480878: 93E1002C stw r31,44(r1)
- 63: GETL R31, t50
- 64: GETL R1, t52
- 65: ADDL $0x2C, t52
- 66: STL t50, (t52)
- 67: INCEIPL $4
-
- 0x2548087C: 91810008 stw r12,8(r1)
- 68: GETL R12, t54
- 69: GETL R1, t56
- 70: ADDL $0x8, t56
- 71: STL t54, (t56)
- 72: INCEIPL $4
-
- 0x25480880: 419E0294 bc 12,30,0x25480B14
- 73: Js30o $0x25480B14
-
-
-. 0 25480840 68
-. 93 21 00 14 7C 99 23 78 90 C1 00 34 80 03 00 7C 93 A1 00 24 7C 7D 1B 78 2F 80 00 00 93 C1 00 28 92 E1 00 0C 7F C8 02 A6 93 01 00 10 93 41 00 18 93 61 00 1C 93 81 00 20 93 E1 00 2C 91 81 00 08 41 9E 02 94
-
-==== BB 27 (0x25480884) approx BBs exec'd 0 ====
-
- 0x25480884: 82E30028 lwz r23,40(r3)
- 0: GETL R3, t0
- 1: ADDL $0x28, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R23
- 4: INCEIPL $4
-
- 0x25480888: 3D40AAAA lis r10,-21846
- 5: MOVL $0xAAAA0000, t4
- 6: PUTL t4, R10
- 7: INCEIPL $4
-
- 0x2548088C: 6148AAAB ori r8,r10,0xAAAB
- 8: MOVL $0xAAAAAAAB, t6
- 9: PUTL t6, R8
- 10: INCEIPL $4
-
- 0x25480890: 8083002C lwz r4,44(r3)
- 11: GETL R3, t8
- 12: ADDL $0x2C, t8
- 13: LDL (t8), t10
- 14: PUTL t10, R4
- 15: INCEIPL $4
-
- 0x25480894: 80F70004 lwz r7,4(r23)
- 16: GETL R23, t12
- 17: ADDL $0x4, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R7
- 20: INCEIPL $4
-
- 0x25480898: 83E40004 lwz r31,4(r4)
- 21: GETL R4, t16
- 22: ADDL $0x4, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R31
- 25: INCEIPL $4
-
- 0x2548089C: 7D674016 mulhwu r11,r7,r8
- 26: GETL R7, t20
- 27: GETL R8, t22
- 28: UMULHL t20, t22
- 29: PUTL t22, R11
- 30: INCEIPL $4
-
- 0x254808A0: 557BE8FE rlwinm r27,r11,29,3,31
- 31: GETL R11, t24
- 32: SHRL $0x3, t24
- 33: PUTL t24, R27
- 34: INCEIPL $4
-
- 0x254808A4: 281B2000 cmpli cr0,r27,8192
- 35: GETL R27, t26
- 36: MOVL $0x2000, t30
- 37: CMPUL t26, t30, t28 (-rSo)
- 38: ICRFL t28, $0x0, CR
- 39: INCEIPL $4
-
- 0x254808A8: 5763083C rlwinm r3,r27,1,0,30
- 40: GETL R27, t32
- 41: SHLL $0x1, t32
- 42: PUTL t32, R3
- 43: INCEIPL $4
-
- 0x254808AC: 38030012 addi r0,r3,18
- 44: GETL R3, t34
- 45: ADDL $0x12, t34
- 46: PUTL t34, R0
- 47: INCEIPL $4
-
- 0x254808B0: 7D201A14 add r9,r0,r3
- 48: GETL R0, t36
- 49: GETL R3, t38
- 50: ADDL t36, t38
- 51: PUTL t38, R9
- 52: INCEIPL $4
-
- 0x254808B4: 3AE9C000 addi r23,r9,-16384
- 53: GETL R9, t40
- 54: ADDL $0xFFFFC000, t40
- 55: PUTL t40, R23
- 56: INCEIPL $4
-
- 0x254808B8: 4081029C bc 4,1,0x25480B54
- 57: Jc01o $0x25480B54
-
-
-. 0 25480884 56
-. 82 E3 00 28 3D 40 AA AA 61 48 AA AB 80 83 00 2C 80 F7 00 04 83 E4 00 04 7D 67 40 16 55 7B E8 FE 28 1B 20 00 57 63 08 3C 38 03 00 12 7D 20 1A 14 3A E9 C0 00 40 81 02 9C
-
-==== BB 28 (0x25480B54) approx BBs exec'd 0 ====
-
- 0x25480B54: 7C170378 or r23,r0,r0
- 0: GETL R0, t0
- 1: PUTL t0, R23
- 2: INCEIPL $4
-
- 0x25480B58: 4BFFFD64 b 0x254808BC
- 3: JMPo $0x254808BC ($4)
-
-
-. 0 25480B54 8
-. 7C 17 03 78 4B FF FD 64
-
-==== BB 29 (0x254808BC) approx BBs exec'd 0 ====
-
- 0x254808BC: 56E8103A rlwinm r8,r23,2,0,29
- 0: GETL R23, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R8
- 3: INCEIPL $4
-
- 0x254808C0: 2E190000 cmpi cr4,r25,0
- 4: GETL R25, t2
- 5: CMP0L t2, t4 (-rSo)
- 6: ICRFL t4, $0x4, CR
- 7: INCEIPL $4
-
- 0x254808C4: 7F48FA14 add r26,r8,r31
- 8: GETL R8, t6
- 9: GETL R31, t8
- 10: ADDL t6, t8
- 11: PUTL t8, R26
- 12: INCEIPL $4
-
- 0x254808C8: 3C607D69 lis r3,32105
- 13: MOVL $0x7D690000, t10
- 14: PUTL t10, R3
- 15: INCEIPL $4
-
- 0x254808CC: 3CFA0001 addis r7,r26,1
- 16: GETL R26, t12
- 17: ADDL $0x10000, t12
- 18: PUTL t12, R7
- 19: INCEIPL $4
-
- 0x254808D0: 574B043E rlwinm r11,r26,0,16,31
- 20: GETL R26, t14
- 21: ANDL $0xFFFF, t14
- 22: PUTL t14, R11
- 23: INCEIPL $4
-
- 0x254808D4: 38878000 addi r4,r7,-32768
- 24: GETL R7, t16
- 25: ADDL $0xFFFF8000, t16
- 26: PUTL t16, R4
- 27: INCEIPL $4
-
- 0x254808D8: 3CC04E80 lis r6,20096
- 28: MOVL $0x4E800000, t18
- 29: PUTL t18, R6
- 30: INCEIPL $4
-
- 0x254808DC: 5489843E rlwinm r9,r4,16,16,31
- 31: GETL R4, t20
- 32: SHRL $0x10, t20
- 33: PUTL t20, R9
- 34: INCEIPL $4
-
- 0x254808E0: 6560816B oris r0,r11,0x816B
- 35: GETL R11, t22
- 36: ORL $0x816B0000, t22
- 37: PUTL t22, R0
- 38: INCEIPL $4
-
- 0x254808E4: 652C3D6B oris r12,r9,0x3D6B
- 39: GETL R9, t24
- 40: ORL $0x3D6B0000, t24
- 41: PUTL t24, R12
- 42: INCEIPL $4
-
- 0x254808E8: 607C03A6 ori r28,r3,0x3A6
- 43: MOVL $0x7D6903A6, t26
- 44: PUTL t26, R28
- 45: INCEIPL $4
-
- 0x254808EC: 60D80420 ori r24,r6,0x420
- 46: MOVL $0x4E800420, t28
- 47: PUTL t28, R24
- 48: INCEIPL $4
-
- 0x254808F0: 919F0000 stw r12,0(r31)
- 49: GETL R12, t30
- 50: GETL R31, t32
- 51: STL t30, (t32)
- 52: INCEIPL $4
-
- 0x254808F4: 901F0004 stw r0,4(r31)
- 53: GETL R0, t34
- 54: GETL R31, t36
- 55: ADDL $0x4, t36
- 56: STL t34, (t36)
- 57: INCEIPL $4
-
- 0x254808F8: 939F0008 stw r28,8(r31)
- 58: GETL R28, t38
- 59: GETL R31, t40
- 60: ADDL $0x8, t40
- 61: STL t38, (t40)
- 62: INCEIPL $4
-
- 0x254808FC: 931F000C stw r24,12(r31)
- 63: GETL R24, t42
- 64: GETL R31, t44
- 65: ADDL $0xC, t44
- 66: STL t42, (t44)
- 67: INCEIPL $4
-
- 0x25480900: 41920178 bc 12,18,0x25480A78
- 68: Js18o $0x25480A78
-
-
-. 0 254808BC 72
-. 56 E8 10 3A 2E 19 00 00 7F 48 FA 14 3C 60 7D 69 3C FA 00 01 57 4B 04 3E 38 87 80 00 3C C0 4E 80 54 89 84 3E 65 60 81 6B 65 2C 3D 6B 60 7C 03 A6 60 D8 04 20 91 9F 00 00 90 1F 00 04 93 9F 00 08 93 1F 00 0C 41 92 01 78
-
-==== BB 30 (0x25480A78) approx BBs exec'd 0 ====
-
- 0x25480A78: 817E04F0 lwz r11,1264(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4F0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25480A7C: 3159FFFF addic r10,r25,-1
- 5: GETL R25, t4
- 6: ADCL $0xFFFFFFFF, t4 (-wCa)
- 7: PUTL t4, R10
- 8: INCEIPL $4
-
- 0x25480A80: 7CAAC910 subfe r5,r10,r25
- 9: GETL R10, t6
- 10: GETL R25, t8
- 11: SBBL t6, t8 (-rCa-wCa)
- 12: PUTL t8, R5
- 13: INCEIPL $4
-
- 0x25480A84: 314BFFFF addic r10,r11,-1
- 14: GETL R11, t10
- 15: ADCL $0xFFFFFFFF, t10 (-wCa)
- 16: PUTL t10, R10
- 17: INCEIPL $4
-
- 0x25480A88: 7C8A5910 subfe r4,r10,r11
- 18: GETL R10, t12
- 19: GETL R11, t14
- 20: SBBL t12, t14 (-rCa-wCa)
- 21: PUTL t14, R4
- 22: INCEIPL $4
-
- 0x25480A8C: 7CAA2039 and. r10,r5,r4
- 23: GETL R5, t16
- 24: GETL R4, t18
- 25: ANDL t16, t18
- 26: PUTL t18, R10
- 27: CMP0L t18, t20 (-rSo)
- 28: ICRFL t20, $0x0, CR
- 29: INCEIPL $4
-
- 0x25480A90: 39400004 li r10,4
- 30: MOVL $0x4, t22
- 31: PUTL t22, R10
- 32: INCEIPL $4
-
- 0x25480A94: 41820010 bc 12,2,0x25480AA4
- 33: Js02o $0x25480AA4
-
-
-. 0 25480A78 32
-. 81 7E 04 F0 31 59 FF FF 7C AA C9 10 31 4B FF FF 7C 8A 59 10 7C AA 20 39 39 40 00 04 41 82 00 10
-
-==== BB 31 (0x25480AA4) approx BBs exec'd 0 ====
-
- 0x25480AA4: 419200B8 bc 12,18,0x25480B5C
- 0: Js18o $0x25480B5C
-
-
-. 0 25480AA4 4
-. 41 92 00 B8
-
-==== BB 32 (0x25480B5C) approx BBs exec'd 0 ====
-
- 0x25480B5C: 39600006 li r11,6
- 0: MOVL $0x6, t0
- 1: PUTL t0, R11
- 2: INCEIPL $4
-
- 0x25480B60: 4BFFFF4C b 0x25480AAC
- 3: JMPo $0x25480AAC ($4)
-
-
-. 0 25480B5C 8
-. 39 60 00 06 4B FF FF 4C
-
-==== BB 33 (0x25480AAC) approx BBs exec'd 0 ====
-
- 0x25480AAC: 39200000 li r9,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R9
- 2: INCEIPL $4
-
- 0x25480AB0: 48000014 b 0x25480AC4
- 3: JMPo $0x25480AC4 ($4)
-
-
-. 0 25480AAC 8
-. 39 20 00 00 48 00 00 14
-
-==== BB 34 (0x25480AC4) approx BBs exec'd 0 ====
-
- 0x25480AC4: 7E095840 cmpl cr4,r9,r11
- 0: GETL R9, t0
- 1: GETL R11, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x4, CR
- 4: INCEIPL $4
-
- 0x25480AC8: 4190FFEC bc 12,16,0x25480AB4
- 5: Js16o $0x25480AB4
-
-
-. 0 25480AC4 8
-. 7E 09 58 40 41 90 FF EC
-
-==== BB 35 (0x25480AB4) approx BBs exec'd 0 ====
-
- 0x25480AB4: 553A103A rlwinm r26,r9,2,0,29
- 0: GETL R9, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R26
- 3: INCEIPL $4
-
- 0x25480AB8: 7EFAFA14 add r23,r26,r31
- 4: GETL R26, t2
- 5: GETL R31, t4
- 6: ADDL t2, t4
- 7: PUTL t4, R23
- 8: INCEIPL $4
-
- 0x25480ABC: 7C00B86C dcbst r0,r23
- 9: INCEIPL $4
-
- 0x25480AC0: 7D295214 add r9,r9,r10
- 10: GETL R9, t6
- 11: GETL R10, t8
- 12: ADDL t6, t8
- 13: PUTL t8, R9
- 14: INCEIPL $4
-
- 0x25480AC4: 7E095840 cmpl cr4,r9,r11
- 15: GETL R9, t10
- 16: GETL R11, t12
- 17: CMPUL t10, t12, t14 (-rSo)
- 18: ICRFL t14, $0x4, CR
- 19: INCEIPL $4
-
- 0x25480AC8: 4190FFEC bc 12,16,0x25480AB4
- 20: Js16o $0x25480AB4
-
-
-. 0 25480AB4 24
-. 55 3A 10 3A 7E FA FA 14 7C 00 B8 6C 7D 29 52 14 7E 09 58 40 41 90 FF EC
-
-==== BB 36 (0x25480ACC) approx BBs exec'd 0 ====
-
- 0x25480ACC: 5568103A rlwinm r8,r11,2,0,29
- 0: GETL R11, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R8
- 3: INCEIPL $4
-
- 0x25480AD0: 7CE8FA14 add r7,r8,r31
- 4: GETL R8, t2
- 5: GETL R31, t4
- 6: ADDL t2, t4
- 7: PUTL t4, R7
- 8: INCEIPL $4
-
- 0x25480AD4: 3927FFFC addi r9,r7,-4
- 9: GETL R7, t6
- 10: ADDL $0xFFFFFFFC, t6
- 11: PUTL t6, R9
- 12: INCEIPL $4
-
- 0x25480AD8: 7C00486C dcbst r0,r9
- 13: INCEIPL $4
-
- 0x25480ADC: 7C0004AC sync
- 14: INCEIPL $4
-
- 0x25480AE0: 39200000 li r9,0
- 15: MOVL $0x0, t8
- 16: PUTL t8, R9
- 17: INCEIPL $4
-
- 0x25480AE4: 48000014 b 0x25480AF8
- 18: JMPo $0x25480AF8 ($4)
-
-
-. 0 25480ACC 28
-. 55 68 10 3A 7C E8 FA 14 39 27 FF FC 7C 00 48 6C 7C 00 04 AC 39 20 00 00 48 00 00 14
-
-==== BB 37 (0x25480AF8) approx BBs exec'd 0 ====
-
- 0x25480AF8: 7F895840 cmpl cr7,r9,r11
- 0: GETL R9, t0
- 1: GETL R11, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x7, CR
- 4: INCEIPL $4
-
- 0x25480AFC: 419CFFEC bc 12,28,0x25480AE8
- 5: Js28o $0x25480AE8
-
-
-. 0 25480AF8 8
-. 7F 89 58 40 41 9C FF EC
-
-==== BB 38 (0x25480AE8) approx BBs exec'd 0 ====
-
- 0x25480AE8: 553B103A rlwinm r27,r9,2,0,29
- 0: GETL R9, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R27
- 3: INCEIPL $4
-
- 0x25480AEC: 7CDBFA14 add r6,r27,r31
- 4: GETL R27, t2
- 5: GETL R31, t4
- 6: ADDL t2, t4
- 7: PUTL t4, R6
- 8: INCEIPL $4
-
- 0x25480AF0: 7C0037AC icbi r0,r6
- 9: GETL R6, t6
- 10: CALLM_So
- 11: PUSHL t6
- 12: CALLMo $0x68
- 13: CALLM_Eo
- 14: INCEIPL $4
-
- 0x25480AF4: 7D295214 add r9,r9,r10
- 15: GETL R9, t8
- 16: GETL R10, t10
- 17: ADDL t8, t10
- 18: PUTL t10, R9
- 19: INCEIPL $4
-
- 0x25480AF8: 7F895840 cmpl cr7,r9,r11
- 20: GETL R9, t12
- 21: GETL R11, t14
- 22: CMPUL t12, t14, t16 (-rSo)
- 23: ICRFL t16, $0x7, CR
- 24: INCEIPL $4
-
- 0x25480AFC: 419CFFEC bc 12,28,0x25480AE8
- 25: Js28o $0x25480AE8
-
-
-. 0 25480AE8 24
-. 55 3B 10 3A 7C DB FA 14 7C 00 37 AC 7D 29 52 14 7F 89 58 40 41 9C FF EC
-
-==== BB 39 (0x25480B00) approx BBs exec'd 0 ====
-
- 0x25480B00: 7C68FA14 add r3,r8,r31
- 0: GETL R8, t0
- 1: GETL R31, t2
- 2: ADDL t0, t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25480B04: 3BE3FFFC addi r31,r3,-4
- 5: GETL R3, t4
- 6: ADDL $0xFFFFFFFC, t4
- 7: PUTL t4, R31
- 8: INCEIPL $4
-
- 0x25480B08: 7C00FFAC icbi r0,r31
- 9: GETL R31, t6
- 10: CALLM_So
- 11: PUSHL t6
- 12: CALLMo $0x68
- 13: CALLM_Eo
- 14: INCEIPL $4
-
- 0x25480B0C: 7C0004AC sync
- 15: INCEIPL $4
-
- 0x25480B10: 4C00012C 16: INCEIPL $4
-
- 0x25480B14: 7F23CB78 or r3,r25,r25
- 17: GETL R25, t8
- 18: PUTL t8, R3
- 19: INCEIPL $4
-
- 0x25480B18: 81010008 lwz r8,8(r1)
- 20: GETL R1, t10
- 21: ADDL $0x8, t10
- 22: LDL (t10), t12
- 23: PUTL t12, R8
- 24: INCEIPL $4
-
- 0x25480B1C: 83210034 lwz r25,52(r1)
- 25: GETL R1, t14
- 26: ADDL $0x34, t14
- 27: LDL (t14), t16
- 28: PUTL t16, R25
- 29: INCEIPL $4
-
- 0x25480B20: 82E1000C lwz r23,12(r1)
- 30: GETL R1, t18
- 31: ADDL $0xC, t18
- 32: LDL (t18), t20
- 33: PUTL t20, R23
- 34: INCEIPL $4
-
- 0x25480B24: 7D008120 mtcrf 0x8,r8
- 35: GETL R8, t22
- 36: ICRFL t22, $0x4, CR
- 37: INCEIPL $4
-
- 0x25480B28: 7F2803A6 mtlr r25
- 38: GETL R25, t24
- 39: PUTL t24, LR
- 40: INCEIPL $4
-
- 0x25480B2C: 83010010 lwz r24,16(r1)
- 41: GETL R1, t26
- 42: ADDL $0x10, t26
- 43: LDL (t26), t28
- 44: PUTL t28, R24
- 45: INCEIPL $4
-
- 0x25480B30: 83210014 lwz r25,20(r1)
- 46: GETL R1, t30
- 47: ADDL $0x14, t30
- 48: LDL (t30), t32
- 49: PUTL t32, R25
- 50: INCEIPL $4
-
- 0x25480B34: 83410018 lwz r26,24(r1)
- 51: GETL R1, t34
- 52: ADDL $0x18, t34
- 53: LDL (t34), t36
- 54: PUTL t36, R26
- 55: INCEIPL $4
-
- 0x25480B38: 8361001C lwz r27,28(r1)
- 56: GETL R1, t38
- 57: ADDL $0x1C, t38
- 58: LDL (t38), t40
- 59: PUTL t40, R27
- 60: INCEIPL $4
-
- 0x25480B3C: 83810020 lwz r28,32(r1)
- 61: GETL R1, t42
- 62: ADDL $0x20, t42
- 63: LDL (t42), t44
- 64: PUTL t44, R28
- 65: INCEIPL $4
-
- 0x25480B40: 83A10024 lwz r29,36(r1)
- 66: GETL R1, t46
- 67: ADDL $0x24, t46
- 68: LDL (t46), t48
- 69: PUTL t48, R29
- 70: INCEIPL $4
-
- 0x25480B44: 83C10028 lwz r30,40(r1)
- 71: GETL R1, t50
- 72: ADDL $0x28, t50
- 73: LDL (t50), t52
- 74: PUTL t52, R30
- 75: INCEIPL $4
-
- 0x25480B48: 83E1002C lwz r31,44(r1)
- 76: GETL R1, t54
- 77: ADDL $0x2C, t54
- 78: LDL (t54), t56
- 79: PUTL t56, R31
- 80: INCEIPL $4
-
- 0x25480B4C: 38210030 addi r1,r1,48
- 81: GETL R1, t58
- 82: ADDL $0x30, t58
- 83: PUTL t58, R1
- 84: INCEIPL $4
-
- 0x25480B50: 4E800020 blr
- 85: GETL LR, t60
- 86: JMPo-r t60 ($4)
-
-
-. 0 25480B00 84
-. 7C 68 FA 14 3B E3 FF FC 7C 00 FF AC 7C 00 04 AC 4C 00 01 2C 7F 23 CB 78 81 01 00 08 83 21 00 34 82 E1 00 0C 7D 00 81 20 7F 28 03 A6 83 01 00 10 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
-
-==== BB 40 (0x25471C54) approx BBs exec'd 0 ====
-
- 0x25471C54: 38E00000 li r7,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R7
- 2: INCEIPL $4
-
- 0x25471C58: 8161004C lwz r11,76(r1)
- 3: GETL R1, t2
- 4: ADDL $0x4C, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R11
- 7: INCEIPL $4
-
- 0x25471C5C: 39400001 li r10,1
- 8: MOVL $0x1, t6
- 9: PUTL t6, R10
- 10: INCEIPL $4
-
- 0x25471C60: 91410264 stw r10,612(r1)
- 11: GETL R10, t8
- 12: GETL R1, t10
- 13: ADDL $0x264, t10
- 14: STL t8, (t10)
- 15: INCEIPL $4
-
- 0x25471C64: 2C0B0000 cmpi cr0,r11,0
- 16: GETL R11, t12
- 17: CMP0L t12, t14 (-rSo)
- 18: ICRFL t14, $0x0, CR
- 19: INCEIPL $4
-
- 0x25471C68: 93610260 stw r27,608(r1)
- 20: GETL R27, t16
- 21: GETL R1, t18
- 22: ADDL $0x260, t18
- 23: STL t16, (t18)
- 24: INCEIPL $4
-
- 0x25471C6C: 93610270 stw r27,624(r1)
- 25: GETL R27, t20
- 26: GETL R1, t22
- 27: ADDL $0x270, t22
- 28: STL t20, (t22)
- 29: INCEIPL $4
-
- 0x25471C70: 93610258 stw r27,600(r1)
- 30: GETL R27, t24
- 31: GETL R1, t26
- 32: ADDL $0x258, t26
- 33: STL t24, (t26)
- 34: INCEIPL $4
-
- 0x25471C74: 9361026C stw r27,620(r1)
- 35: GETL R27, t28
- 36: GETL R1, t30
- 37: ADDL $0x26C, t30
- 38: STL t28, (t30)
- 39: INCEIPL $4
-
- 0x25471C78: 90E10254 stw r7,596(r1)
- 40: GETL R7, t32
- 41: GETL R1, t34
- 42: ADDL $0x254, t34
- 43: STL t32, (t34)
- 44: INCEIPL $4
-
- 0x25471C7C: 41820018 bc 12,2,0x25471C94
- 45: Js02o $0x25471C94
-
-
-. 0 25471C54 44
-. 38 E0 00 00 81 61 00 4C 39 40 00 01 91 41 02 64 2C 0B 00 00 93 61 02 60 93 61 02 70 93 61 02 58 93 61 02 6C 90 E1 02 54 41 82 00 18
-
-==== BB 41 (0x25471C80) approx BBs exec'd 0 ====
-
- 0x25471C80: 80AB0004 lwz r5,4(r11)
- 0: GETL R11, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25471C84: 80810050 lwz r4,80(r1)
- 5: GETL R1, t4
- 6: ADDL $0x50, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R4
- 9: INCEIPL $4
-
- 0x25471C88: 90A10250 stw r5,592(r1)
- 10: GETL R5, t8
- 11: GETL R1, t10
- 12: ADDL $0x250, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25471C8C: 80E40004 lwz r7,4(r4)
- 15: GETL R4, t12
- 16: ADDL $0x4, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R7
- 19: INCEIPL $4
-
- 0x25471C90: 90E10254 stw r7,596(r1)
- 20: GETL R7, t16
- 21: GETL R1, t18
- 22: ADDL $0x254, t18
- 23: STL t16, (t18)
- 24: INCEIPL $4
-
- 0x25471C94: 2C830000 cmpi cr1,r3,0
- 25: GETL R3, t20
- 26: CMP0L t20, t22 (-rSo)
- 27: ICRFL t22, $0x1, CR
- 28: INCEIPL $4
-
- 0x25471C98: 41860010 bc 12,6,0x25471CA8
- 29: Js06o $0x25471CA8
-
-
-. 0 25471C80 28
-. 80 AB 00 04 80 81 00 50 90 A1 02 50 80 E4 00 04 90 E1 02 54 2C 83 00 00 41 86 00 10
-
-==== BB 42 (0x25471CA8) approx BBs exec'd 0 ====
-
- 0x25471CA8: 3B610008 addi r27,r1,8
- 0: GETL R1, t0
- 1: ADDL $0x8, t0
- 2: PUTL t0, R27
- 3: INCEIPL $4
-
- 0x25471CAC: 3B200002 li r25,2
- 4: MOVL $0x2, t2
- 5: PUTL t2, R25
- 6: INCEIPL $4
-
- 0x25471CB0: 814100D0 lwz r10,208(r1)
- 7: GETL R1, t4
- 8: ADDL $0xD0, t4
- 9: LDL (t4), t6
- 10: PUTL t6, R10
- 11: INCEIPL $4
-
- 0x25471CB4: 81210048 lwz r9,72(r1)
- 12: GETL R1, t8
- 13: ADDL $0x48, t8
- 14: LDL (t8), t10
- 15: PUTL t10, R9
- 16: INCEIPL $4
-
- 0x25471CB8: 2F8A0000 cmpi cr7,r10,0
- 17: GETL R10, t12
- 18: CMP0L t12, t14 (-rSo)
- 19: ICRFL t14, $0x7, CR
- 20: INCEIPL $4
-
- 0x25471CBC: 811B0248 lwz r8,584(r27)
- 21: GETL R27, t16
- 22: ADDL $0x248, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R8
- 25: INCEIPL $4
-
- 0x25471CC0: 817B024C lwz r11,588(r27)
- 26: GETL R27, t20
- 27: ADDL $0x24C, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R11
- 30: INCEIPL $4
-
- 0x25471CC4: 83490004 lwz r26,4(r9)
- 31: GETL R9, t24
- 32: ADDL $0x4, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R26
- 35: INCEIPL $4
-
- 0x25471CC8: 39200000 li r9,0
- 36: MOVL $0x0, t28
- 37: PUTL t28, R9
- 38: INCEIPL $4
-
- 0x25471CCC: 7F885A14 add r28,r8,r11
- 39: GETL R8, t30
- 40: GETL R11, t32
- 41: ADDL t30, t32
- 42: PUTL t32, R28
- 43: INCEIPL $4
-
- 0x25471CD0: 83A10010 lwz r29,16(r1)
- 44: GETL R1, t34
- 45: ADDL $0x10, t34
- 46: LDL (t34), t36
- 47: PUTL t36, R29
- 48: INCEIPL $4
-
- 0x25471CD4: 419E0008 bc 12,30,0x25471CDC
- 49: Js30o $0x25471CDC
-
-
-. 0 25471CA8 48
-. 3B 61 00 08 3B 20 00 02 81 41 00 D0 81 21 00 48 2F 8A 00 00 81 1B 02 48 81 7B 02 4C 83 49 00 04 39 20 00 00 7F 88 5A 14 83 A1 00 10 41 9E 00 08
-
-==== BB 43 (0x25471CD8) approx BBs exec'd 0 ====
-
- 0x25471CD8: 812A0004 lwz r9,4(r10)
- 0: GETL R10, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25471CDC: 3CA0AAAA lis r5,-21846
- 5: MOVL $0xAAAA0000, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x25471CE0: 60A4AAAB ori r4,r5,0xAAAB
- 8: MOVL $0xAAAAAAAB, t6
- 9: PUTL t6, R4
- 10: INCEIPL $4
-
- 0x25471CE4: 7D4B2016 mulhwu r10,r11,r4
- 11: GETL R11, t8
- 12: GETL R4, t10
- 13: UMULHL t8, t10
- 14: PUTL t10, R10
- 15: INCEIPL $4
-
- 0x25471CE8: 7D0B4378 or r11,r8,r8
- 16: GETL R8, t12
- 17: PUTL t12, R11
- 18: INCEIPL $4
-
- 0x25471CEC: 5540E8FE rlwinm r0,r10,29,3,31
- 19: GETL R10, t14
- 20: SHRL $0x3, t14
- 21: PUTL t14, R0
- 22: INCEIPL $4
-
- 0x25471CF0: 7C004840 cmpl cr0,r0,r9
- 23: GETL R0, t16
- 24: GETL R9, t18
- 25: CMPUL t16, t18, t20 (-rSo)
- 26: ICRFL t20, $0x0, CR
- 27: INCEIPL $4
-
- 0x25471CF4: 40810008 bc 4,1,0x25471CFC
- 28: Jc01o $0x25471CFC
-
-
-. 0 25471CD8 32
-. 81 2A 00 04 3C A0 AA AA 60 A4 AA AB 7D 4B 20 16 7D 0B 43 78 55 40 E8 FE 7C 00 48 40 40 81 00 08
-
-==== BB 44 (0x25471CF8) approx BBs exec'd 0 ====
-
- 0x25471CF8: 7D204B78 or r0,r9,r9
- 0: GETL R9, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x25471CFC: 1C60000C mulli r3,r0,12
- 3: GETL R0, t2
- 4: MULL $0xC, t2
- 5: PUTL t2, R3
- 6: INCEIPL $4
-
- 0x25471D00: 7FEB1A14 add r31,r11,r3
- 7: GETL R11, t4
- 8: GETL R3, t6
- 9: ADDL t4, t6
- 10: PUTL t6, R31
- 11: INCEIPL $4
-
- 0x25471D04: 7F8BF840 cmpl cr7,r11,r31
- 12: GETL R11, t8
- 13: GETL R31, t10
- 14: CMPUL t8, t10, t12 (-rSo)
- 15: ICRFL t12, $0x7, CR
- 16: INCEIPL $4
-
- 0x25471D08: 409C0020 bc 4,28,0x25471D28
- 17: Jc28o $0x25471D28
-
-
-. 0 25471CF8 20
-. 7D 20 4B 78 1C 60 00 0C 7F EB 1A 14 7F 8B F8 40 40 9C 00 20
-
-==== BB 45 (0x25471D0C) approx BBs exec'd 0 ====
-
- 0x25471D0C: 818B0008 lwz r12,8(r11)
- 0: GETL R11, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R12
- 4: INCEIPL $4
-
- 0x25471D10: 80CB0000 lwz r6,0(r11)
- 5: GETL R11, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R6
- 8: INCEIPL $4
-
- 0x25471D14: 396B000C addi r11,r11,12
- 9: GETL R11, t8
- 10: ADDL $0xC, t8
- 11: PUTL t8, R11
- 12: INCEIPL $4
-
- 0x25471D18: 7CECEA14 add r7,r12,r29
- 13: GETL R12, t10
- 14: GETL R29, t12
- 15: ADDL t10, t12
- 16: PUTL t12, R7
- 17: INCEIPL $4
-
- 0x25471D1C: 7F8BF840 cmpl cr7,r11,r31
- 18: GETL R11, t14
- 19: GETL R31, t16
- 20: CMPUL t14, t16, t18 (-rSo)
- 21: ICRFL t18, $0x7, CR
- 22: INCEIPL $4
-
- 0x25471D20: 7CE6E92E stwx r7,r6,r29
- 23: GETL R29, t20
- 24: GETL R6, t22
- 25: ADDL t22, t20
- 26: GETL R7, t24
- 27: STL t24, (t20)
- 28: INCEIPL $4
-
- 0x25471D24: 419CFFE8 bc 12,28,0x25471D0C
- 29: Js28o $0x25471D0C
-
-
-. 0 25471D0C 28
-. 81 8B 00 08 80 CB 00 00 39 6B 00 0C 7C EC EA 14 7F 8B F8 40 7C E6 E9 2E 41 9C FF E8
-
-==== BB 46 (0x25471D28) approx BBs exec'd 0 ====
-
- 0x25471D28: 7C9FE040 cmpl cr1,r31,r28
- 0: GETL R31, t0
- 1: GETL R28, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x1, CR
- 4: INCEIPL $4
-
- 0x25471D2C: 4084008C bc 4,4,0x25471DB8
- 5: Jc04o $0x25471DB8
-
-
-. 0 25471D28 8
-. 7C 9F E0 40 40 84 00 8C
-
-==== BB 47 (0x25471D30) approx BBs exec'd 0 ====
-
- 0x25471D30: 811F0004 lwz r8,4(r31)
- 0: GETL R31, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x25471D34: 817F0000 lwz r11,0(r31)
- 5: GETL R31, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R11
- 8: INCEIPL $4
-
- 0x25471D38: 550A063E rlwinm r10,r8,0,24,31
- 9: GETL R8, t8
- 10: ANDL $0xFF, t8
- 11: PUTL t8, R10
- 12: INCEIPL $4
-
- 0x25471D3C: 5500E136 rlwinm r0,r8,28,4,27
- 13: GETL R8, t10
- 14: ROLL $0x1C, t10
- 15: ANDL $0xFFFFFF0, t10
- 16: PUTL t10, R0
- 17: INCEIPL $4
-
- 0x25471D40: 2F0A0016 cmpi cr6,r10,22
- 18: GETL R10, t12
- 19: MOVL $0x16, t16
- 20: CMPL t12, t16, t14 (-rSo)
- 21: ICRFL t14, $0x6, CR
- 22: INCEIPL $4
-
- 0x25471D44: 7CC0D214 add r6,r0,r26
- 23: GETL R0, t18
- 24: GETL R26, t20
- 25: ADDL t18, t20
- 26: PUTL t20, R6
- 27: INCEIPL $4
-
- 0x25471D48: 7D0BEA14 add r8,r11,r29
- 28: GETL R11, t22
- 29: GETL R29, t24
- 30: ADDL t22, t24
- 31: PUTL t24, R8
- 32: INCEIPL $4
-
- 0x25471D4C: 419A00C4 bc 12,26,0x25471E10
- 33: Js26o $0x25471E10
-
-
-. 0 25471D30 32
-. 81 1F 00 04 81 7F 00 00 55 0A 06 3E 55 00 E1 36 2F 0A 00 16 7C C0 D2 14 7D 0B EA 14 41 9A 00 C4
-
-==== BB 48 (0x25471D50) approx BBs exec'd 0 ====
-
- 0x25471D50: 2F8A0000 cmpi cr7,r10,0
- 0: GETL R10, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x25471D54: 419E0058 bc 12,30,0x25471DAC
- 4: Js30o $0x25471DAC
-
-
-. 0 25471D50 8
-. 2F 8A 00 00 41 9E 00 58
-
-==== BB 49 (0x25471D58) approx BBs exec'd 0 ====
-
- 0x25471D58: 8966000C lbz r11,12(r6)
- 0: GETL R6, t0
- 1: ADDL $0xC, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25471D5C: 5569E13F rlwinm. r9,r11,28,4,31
- 5: GETL R11, t4
- 6: SHRL $0x4, t4
- 7: PUTL t4, R9
- 8: CMP0L t4, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x25471D60: 4182014C bc 12,2,0x25471EAC
- 11: Js02o $0x25471EAC
-
-
-. 0 25471D58 12
-. 89 66 00 0C 55 69 E1 3F 41 82 01 4C
-
-==== BB 50 (0x25471D64) approx BBs exec'd 0 ====
-
- 0x25471D64: A006000E lhz r0,14(r6)
- 0: GETL R6, t0
- 1: ADDL $0xE, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25471D68: 2F000000 cmpi cr6,r0,0
- 5: GETL R0, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x25471D6C: 39200000 li r9,0
- 9: MOVL $0x0, t8
- 10: PUTL t8, R9
- 11: INCEIPL $4
-
- 0x25471D70: 419A0008 bc 12,26,0x25471D78
- 12: Js26o $0x25471D78
-
-
-. 0 25471D64 16
-. A0 06 00 0E 2F 00 00 00 39 20 00 00 41 9A 00 08
-
-==== BB 51 (0x25471D74) approx BBs exec'd 0 ====
-
- 0x25471D74: 81210010 lwz r9,16(r1)
- 0: GETL R1, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25471D78: 80A60004 lwz r5,4(r6)
- 5: GETL R6, t4
- 6: ADDL $0x4, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R5
- 9: INCEIPL $4
-
- 0x25471D7C: 7D292A14 add r9,r9,r5
- 10: GETL R9, t8
- 11: GETL R5, t10
- 12: ADDL t8, t10
- 13: PUTL t10, R9
- 14: INCEIPL $4
-
- 0x25471D80: 2F8A0001 cmpi cr7,r10,1
- 15: GETL R10, t12
- 16: MOVL $0x1, t16
- 17: CMPL t12, t16, t14 (-rSo)
- 18: ICRFL t14, $0x7, CR
- 19: INCEIPL $4
-
- 0x25471D84: 807F0008 lwz r3,8(r31)
- 20: GETL R31, t18
- 21: ADDL $0x8, t18
- 22: LDL (t18), t20
- 23: PUTL t20, R3
- 24: INCEIPL $4
-
- 0x25471D88: 7D291A14 add r9,r9,r3
- 25: GETL R9, t22
- 26: GETL R3, t24
- 27: ADDL t22, t24
- 28: PUTL t24, R9
- 29: INCEIPL $4
-
- 0x25471D8C: 419E0078 bc 12,30,0x25471E04
- 30: Js30o $0x25471E04
-
-
-. 0 25471D74 28
-. 81 21 00 10 80 A6 00 04 7D 29 2A 14 2F 8A 00 01 80 7F 00 08 7D 29 1A 14 41 9E 00 78
-
-==== BB 52 (0x25471D90) approx BBs exec'd 0 ====
-
- 0x25471D90: 2C0A0014 cmpi cr0,r10,20
- 0: GETL R10, t0
- 1: MOVL $0x14, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x25471D94: 41820070 bc 12,2,0x25471E04
- 5: Js02o $0x25471E04
-
-
-. 0 25471D90 8
-. 2C 0A 00 14 41 82 00 70
-
-==== BB 53 (0x25471E04) approx BBs exec'd 0 ====
-
- 0x25471E04: 3BFF000C addi r31,r31,12
- 0: GETL R31, t0
- 1: ADDL $0xC, t0
- 2: PUTL t0, R31
- 3: INCEIPL $4
-
- 0x25471E08: 91280000 stw r9,0(r8)
- 4: GETL R9, t2
- 5: GETL R8, t4
- 6: STL t2, (t4)
- 7: INCEIPL $4
-
- 0x25471E0C: 4BFFFFA4 b 0x25471DB0
- 8: JMPo $0x25471DB0 ($4)
-
-
-. 0 25471E04 12
-. 3B FF 00 0C 91 28 00 00 4B FF FF A4
-
-==== BB 54 (0x25471DB0) approx BBs exec'd 0 ====
-
- 0x25471DB0: 7C9FE040 cmpl cr1,r31,r28
- 0: GETL R31, t0
- 1: GETL R28, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x1, CR
- 4: INCEIPL $4
-
- 0x25471DB4: 4184FF7C bc 12,4,0x25471D30
- 5: Js04o $0x25471D30
-
-
-. 0 25471DB0 8
-. 7C 9F E0 40 41 84 FF 7C
-
-==== BB 55 (0x25471D98) approx BBs exec'd 0 ====
-
- 0x25471D98: 7F03C378 or r3,r24,r24
- 0: GETL R24, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25471D9C: 7FE4FB78 or r4,r31,r31
- 3: GETL R31, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x25471DA0: 38A00000 li r5,0
- 6: MOVL $0x0, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x25471DA4: 7CC73378 or r7,r6,r6
- 9: GETL R6, t6
- 10: PUTL t6, R7
- 11: INCEIPL $4
-
- 0x25471DA8: 4800EF01 bl 0x25480CA8
- 12: MOVL $0x25471DAC, t8
- 13: PUTL t8, LR
- 14: JMPo-c $0x25480CA8 ($4)
-
-
-. 0 25471D98 20
-. 7F 03 C3 78 7F E4 FB 78 38 A0 00 00 7C C7 33 78 48 00 EF 01
-
-==== BB 56 __process_machine_rela(0x25480CA8) approx BBs exec'd 0 ====
-
- 0x25480CA8: 2B8A004D cmpli cr7,r10,77
- 0: GETL R10, t0
- 1: MOVL $0x4D, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0x25480CAC: 7C0802A6 mflr r0
- 5: GETL LR, t6
- 6: PUTL t6, R0
- 7: INCEIPL $4
-
- 0x25480CB0: 9421FFD0 stwu r1,-48(r1)
- 8: GETL R1, t8
- 9: GETL R1, t10
- 10: ADDL $0xFFFFFFD0, t10
- 11: PUTL t10, R1
- 12: STL t8, (t10)
- 13: INCEIPL $4
-
- 0x25480CB4: 4801634D bl 0x25497000
- 14: MOVL $0x25480CB8, t12
- 15: PUTL t12, LR
- 16: JMPo-c $0x25497000 ($4)
-
-
-. 0 25480CA8 16
-. 2B 8A 00 4D 7C 08 02 A6 94 21 FF D0 48 01 63 4D
-
-==== BB 57 (0x25480CB8) approx BBs exec'd 0 ====
-
- 0x25480CB8: 93410018 stw r26,24(r1)
- 0: GETL R26, t0
- 1: GETL R1, t2
- 2: ADDL $0x18, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25480CBC: 7D3A4B78 or r26,r9,r9
- 5: GETL R9, t4
- 6: PUTL t4, R26
- 7: INCEIPL $4
-
- 0x25480CC0: 9361001C stw r27,28(r1)
- 8: GETL R27, t6
- 9: GETL R1, t8
- 10: ADDL $0x1C, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x25480CC4: 7CDB3378 or r27,r6,r6
- 13: GETL R6, t10
- 14: PUTL t10, R27
- 15: INCEIPL $4
-
- 0x25480CC8: 93810020 stw r28,32(r1)
- 16: GETL R28, t12
- 17: GETL R1, t14
- 18: ADDL $0x20, t14
- 19: STL t12, (t14)
- 20: INCEIPL $4
-
- 0x25480CCC: 7C9C2378 or r28,r4,r4
- 21: GETL R4, t16
- 22: PUTL t16, R28
- 23: INCEIPL $4
-
- 0x25480CD0: 93A10024 stw r29,36(r1)
- 24: GETL R29, t18
- 25: GETL R1, t20
- 26: ADDL $0x24, t20
- 27: STL t18, (t20)
- 28: INCEIPL $4
-
- 0x25480CD4: 7CBD2B78 or r29,r5,r5
- 29: GETL R5, t22
- 30: PUTL t22, R29
- 31: INCEIPL $4
-
- 0x25480CD8: 93C10028 stw r30,40(r1)
- 32: GETL R30, t24
- 33: GETL R1, t26
- 34: ADDL $0x28, t26
- 35: STL t24, (t26)
- 36: INCEIPL $4
-
- 0x25480CDC: 7FC802A6 mflr r30
- 37: GETL LR, t28
- 38: PUTL t28, R30
- 39: INCEIPL $4
-
- 0x25480CE0: 93E1002C stw r31,44(r1)
- 40: GETL R31, t30
- 41: GETL R1, t32
- 42: ADDL $0x2C, t32
- 43: STL t30, (t32)
- 44: INCEIPL $4
-
- 0x25480CE4: 7D5F5378 or r31,r10,r10
- 45: GETL R10, t34
- 46: PUTL t34, R31
- 47: INCEIPL $4
-
- 0x25480CE8: 90010034 stw r0,52(r1)
- 48: GETL R0, t36
- 49: GETL R1, t38
- 50: ADDL $0x34, t38
- 51: STL t36, (t38)
- 52: INCEIPL $4
-
- 0x25480CEC: 90610008 stw r3,8(r1)
- 53: GETL R3, t40
- 54: GETL R1, t42
- 55: ADDL $0x8, t42
- 56: STL t40, (t42)
- 57: INCEIPL $4
-
- 0x25480CF0: 90E10010 stw r7,16(r1)
- 58: GETL R7, t44
- 59: GETL R1, t46
- 60: ADDL $0x10, t46
- 61: STL t44, (t46)
- 62: INCEIPL $4
-
- 0x25480CF4: 9101000C stw r8,12(r1)
- 63: GETL R8, t48
- 64: GETL R1, t50
- 65: ADDL $0xC, t50
- 66: STL t48, (t50)
- 67: INCEIPL $4
-
- 0x25480CF8: 419D0140 bc 12,29,0x25480E38
- 68: Js29o $0x25480E38
-
-
-. 0 25480CB8 68
-. 93 41 00 18 7D 3A 4B 78 93 61 00 1C 7C DB 33 78 93 81 00 20 7C 9C 23 78 93 A1 00 24 7C BD 2B 78 93 C1 00 28 7F C8 02 A6 93 E1 00 2C 7D 5F 53 78 90 01 00 34 90 61 00 08 90 E1 00 10 91 01 00 0C 41 9D 01 40
-
-==== BB 58 (0x25480CFC) approx BBs exec'd 0 ====
-
- 0x25480CFC: 817E0450 lwz r11,1104(r30)
- 0: GETL R30, t0
- 1: ADDL $0x450, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25480D00: 5544103A rlwinm r4,r10,2,0,29
- 5: GETL R10, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R4
- 8: INCEIPL $4
-
- 0x25480D04: 7C64582E lwzx r3,r4,r11
- 9: GETL R11, t6
- 10: GETL R4, t8
- 11: ADDL t8, t6
- 12: LDL (t6), t10
- 13: PUTL t10, R3
- 14: INCEIPL $4
-
- 0x25480D08: 7D235A14 add r9,r3,r11
- 15: GETL R3, t12
- 16: GETL R11, t14
- 17: ADDL t12, t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25480D0C: 7D2903A6 mtctr r9
- 20: GETL R9, t16
- 21: PUTL t16, CTR
- 22: INCEIPL $4
-
- 0x25480D10: 4E800420 bctr
- 23: GETL CTR, t18
- 24: JMPo t18 ($4)
-
-
-. 0 25480CFC 24
-. 81 7E 04 50 55 44 10 3A 7C 64 58 2E 7D 23 5A 14 7D 29 03 A6 4E 80 04 20
-
-==== BB 59 (0x25480FD8) approx BBs exec'd 0 ====
-
- 0x25480FD8: 80A1000C lwz r5,12(r1)
- 0: GETL R1, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25480FDC: 7FA5D050 subf r29,r5,r26
- 5: GETL R5, t4
- 6: GETL R26, t6
- 7: SUBL t4, t6
- 8: PUTL t6, R29
- 9: INCEIPL $4
-
- 0x25480FE0: 57BF3032 rlwinm r31,r29,6,0,25
- 10: GETL R29, t8
- 11: SHLL $0x6, t8
- 12: PUTL t8, R31
- 13: INCEIPL $4
-
- 0x25480FE4: 7FE93670 srawi r9,r31,6
- 14: GETL R31, t10
- 15: SARL $0x6, t10 (-wCa)
- 16: PUTL t10, R9
- 17: INCEIPL $4
-
- 0x25480FE8: 7F89E800 cmp cr7,r9,r29
- 18: GETL R9, t12
- 19: GETL R29, t14
- 20: CMPL t12, t14, t16 (-rSo)
- 21: ICRFL t16, $0x7, CR
- 22: INCEIPL $4
-
- 0x25480FEC: 419E0254 bc 12,30,0x25481240
- 23: Js30o $0x25481240
-
-
-. 0 25480FD8 24
-. 80 A1 00 0C 7F A5 D0 50 57 BF 30 32 7F E9 36 70 7F 89 E8 00 41 9E 02 54
-
-==== BB 60 (0x25481240) approx BBs exec'd 0 ====
-
- 0x25481240: 553A01BA rlwinm r26,r9,0,6,29
- 0: GETL R9, t0
- 1: ANDL $0x3FFFFFC, t0
- 2: PUTL t0, R26
- 3: INCEIPL $4
-
- 0x25481244: 67404800 oris r0,r26,0x4800
- 4: GETL R26, t2
- 5: ORL $0x48000000, t2
- 6: PUTL t2, R0
- 7: INCEIPL $4
-
- 0x25481248: 90050000 stw r0,0(r5)
- 8: GETL R0, t4
- 9: GETL R5, t6
- 10: STL t4, (t6)
- 11: INCEIPL $4
-
- 0x2548124C: 4BFFFBB4 b 0x25480E00
- 12: JMPo $0x25480E00 ($4)
-
-
-. 0 25481240 16
-. 55 3A 01 BA 67 40 48 00 90 05 00 00 4B FF FB B4
-
-==== BB 61 (0x25480E00) approx BBs exec'd 0 ====
-
- 0x25480E00: 7C00286C dcbst r0,r5
- 0: INCEIPL $4
-
- 0x25480E04: 7C0004AC sync
- 1: INCEIPL $4
-
- 0x25480E08: 8381000C lwz r28,12(r1)
- 2: GETL R1, t0
- 3: ADDL $0xC, t0
- 4: LDL (t0), t2
- 5: PUTL t2, R28
- 6: INCEIPL $4
-
- 0x25480E0C: 7C00E7AC icbi r0,r28
- 7: GETL R28, t4
- 8: CALLM_So
- 9: PUSHL t4
- 10: CALLMo $0x68
- 11: CALLM_Eo
- 12: INCEIPL $4
-
- 0x25480E10: 80610034 lwz r3,52(r1)
- 13: GETL R1, t6
- 14: ADDL $0x34, t6
- 15: LDL (t6), t8
- 16: PUTL t8, R3
- 17: INCEIPL $4
-
- 0x25480E14: 83410018 lwz r26,24(r1)
- 18: GETL R1, t10
- 19: ADDL $0x18, t10
- 20: LDL (t10), t12
- 21: PUTL t12, R26
- 22: INCEIPL $4
-
- 0x25480E18: 8361001C lwz r27,28(r1)
- 23: GETL R1, t14
- 24: ADDL $0x1C, t14
- 25: LDL (t14), t16
- 26: PUTL t16, R27
- 27: INCEIPL $4
-
- 0x25480E1C: 7C6803A6 mtlr r3
- 28: GETL R3, t18
- 29: PUTL t18, LR
- 30: INCEIPL $4
-
- 0x25480E20: 83810020 lwz r28,32(r1)
- 31: GETL R1, t20
- 32: ADDL $0x20, t20
- 33: LDL (t20), t22
- 34: PUTL t22, R28
- 35: INCEIPL $4
-
- 0x25480E24: 83A10024 lwz r29,36(r1)
- 36: GETL R1, t24
- 37: ADDL $0x24, t24
- 38: LDL (t24), t26
- 39: PUTL t26, R29
- 40: INCEIPL $4
-
- 0x25480E28: 83C10028 lwz r30,40(r1)
- 41: GETL R1, t28
- 42: ADDL $0x28, t28
- 43: LDL (t28), t30
- 44: PUTL t30, R30
- 45: INCEIPL $4
-
- 0x25480E2C: 83E1002C lwz r31,44(r1)
- 46: GETL R1, t32
- 47: ADDL $0x2C, t32
- 48: LDL (t32), t34
- 49: PUTL t34, R31
- 50: INCEIPL $4
-
- 0x25480E30: 38210030 addi r1,r1,48
- 51: GETL R1, t36
- 52: ADDL $0x30, t36
- 53: PUTL t36, R1
- 54: INCEIPL $4
-
- 0x25480E34: 4E800020 blr
- 55: GETL LR, t38
- 56: JMPo-r t38 ($4)
-
-
-. 0 25480E00 56
-. 7C 00 28 6C 7C 00 04 AC 83 81 00 0C 7C 00 E7 AC 80 61 00 34 83 41 00 18 83 61 00 1C 7C 68 03 A6 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
-
-==== BB 62 (0x25471DAC) approx BBs exec'd 0 ====
-
- 0x25471DAC: 3BFF000C addi r31,r31,12
- 0: GETL R31, t0
- 1: ADDL $0xC, t0
- 2: PUTL t0, R31
- 3: INCEIPL $4
-
- 0x25471DB0: 7C9FE040 cmpl cr1,r31,r28
- 4: GETL R31, t2
- 5: GETL R28, t4
- 6: CMPUL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x25471DB4: 4184FF7C bc 12,4,0x25471D30
- 9: Js04o $0x25471D30
-
-
-. 0 25471DAC 12
-. 3B FF 00 0C 7C 9F E0 40 41 84 FF 7C
-
-==== BB 63 (0x25471DB8) approx BBs exec'd 0 ====
-
- 0x25471DB8: 3739FFFF addic. r25,r25,-1
- 0: GETL R25, t0
- 1: ADCL $0xFFFFFFFF, t0 (-wCa)
- 2: PUTL t0, R25
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x25471DBC: 3B7B000C addi r27,r27,12
- 6: GETL R27, t4
- 7: ADDL $0xC, t4
- 8: PUTL t4, R27
- 9: INCEIPL $4
-
- 0x25471DC0: 4080FEF0 bc 4,0,0x25471CB0
- 10: Jc00o $0x25471CB0
-
-
-. 0 25471DB8 12
-. 37 39 FF FF 3B 7B 00 0C 40 80 FE F0
-
-==== BB 64 (0x25471CB0) approx BBs exec'd 0 ====
-
- 0x25471CB0: 814100D0 lwz r10,208(r1)
- 0: GETL R1, t0
- 1: ADDL $0xD0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x25471CB4: 81210048 lwz r9,72(r1)
- 5: GETL R1, t4
- 6: ADDL $0x48, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R9
- 9: INCEIPL $4
-
- 0x25471CB8: 2F8A0000 cmpi cr7,r10,0
- 10: GETL R10, t8
- 11: CMP0L t8, t10 (-rSo)
- 12: ICRFL t10, $0x7, CR
- 13: INCEIPL $4
-
- 0x25471CBC: 811B0248 lwz r8,584(r27)
- 14: GETL R27, t12
- 15: ADDL $0x248, t12
- 16: LDL (t12), t14
- 17: PUTL t14, R8
- 18: INCEIPL $4
-
- 0x25471CC0: 817B024C lwz r11,588(r27)
- 19: GETL R27, t16
- 20: ADDL $0x24C, t16
- 21: LDL (t16), t18
- 22: PUTL t18, R11
- 23: INCEIPL $4
-
- 0x25471CC4: 83490004 lwz r26,4(r9)
- 24: GETL R9, t20
- 25: ADDL $0x4, t20
- 26: LDL (t20), t22
- 27: PUTL t22, R26
- 28: INCEIPL $4
-
- 0x25471CC8: 39200000 li r9,0
- 29: MOVL $0x0, t24
- 30: PUTL t24, R9
- 31: INCEIPL $4
-
- 0x25471CCC: 7F885A14 add r28,r8,r11
- 32: GETL R8, t26
- 33: GETL R11, t28
- 34: ADDL t26, t28
- 35: PUTL t28, R28
- 36: INCEIPL $4
-
- 0x25471CD0: 83A10010 lwz r29,16(r1)
- 37: GETL R1, t30
- 38: ADDL $0x10, t30
- 39: LDL (t30), t32
- 40: PUTL t32, R29
- 41: INCEIPL $4
-
- 0x25471CD4: 419E0008 bc 12,30,0x25471CDC
- 42: Js30o $0x25471CDC
-
-
-. 0 25471CB0 40
-. 81 41 00 D0 81 21 00 48 2F 8A 00 00 81 1B 02 48 81 7B 02 4C 83 49 00 04 39 20 00 00 7F 88 5A 14 83 A1 00 10 41 9E 00 08
-
-==== BB 65 (0x25471CFC) approx BBs exec'd 0 ====
-
- 0x25471CFC: 1C60000C mulli r3,r0,12
- 0: GETL R0, t0
- 1: MULL $0xC, t0
- 2: PUTL t0, R3
- 3: INCEIPL $4
-
- 0x25471D00: 7FEB1A14 add r31,r11,r3
- 4: GETL R11, t2
- 5: GETL R3, t4
- 6: ADDL t2, t4
- 7: PUTL t4, R31
- 8: INCEIPL $4
-
- 0x25471D04: 7F8BF840 cmpl cr7,r11,r31
- 9: GETL R11, t6
- 10: GETL R31, t8
- 11: CMPUL t6, t8, t10 (-rSo)
- 12: ICRFL t10, $0x7, CR
- 13: INCEIPL $4
-
- 0x25471D08: 409C0020 bc 4,28,0x25471D28
- 14: Jc28o $0x25471D28
-
-
-. 0 25471CFC 16
-. 1C 60 00 0C 7F EB 1A 14 7F 8B F8 40 40 9C 00 20
-
-==== BB 66 (0x25471DC4) approx BBs exec'd 0 ====
-
- 0x25471DC4: 7EE3BB78 or r3,r23,r23
- 0: GETL R23, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25471DC8: 7F04C378 or r4,r24,r24
- 3: GETL R24, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x25471DCC: 4BFFFBBD bl 0x25471988
- 6: MOVL $0x25471DD0, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0x25471988 ($4)
-
-
-. 0 25471DC4 12
-. 7E E3 BB 78 7F 04 C3 78 4B FF FB BD
-
-==== BB 67 _dl_start_final(0x25471988) approx BBs exec'd 0 ====
-
- 0x25471988: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547198C: 7D2802A6 mflr r9
- 6: GETL LR, t4
- 7: PUTL t4, R9
- 8: INCEIPL $4
-
- 0x25471990: 48025671 bl 0x25497000
- 9: MOVL $0x25471994, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 25471988 12
-. 94 21 FF E0 7D 28 02 A6 48 02 56 71
-
-==== BB 68 (0x25471994) approx BBs exec'd 0 ====
-
- 0x25471994: 93C10018 stw r30,24(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x18, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25471998: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x2547199C: 93A10014 stw r29,20(r1)
- 8: GETL R29, t6
- 9: GETL R1, t8
- 10: ADDL $0x14, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x254719A0: 91210024 stw r9,36(r1)
- 13: GETL R9, t10
- 14: GETL R1, t12
- 15: ADDL $0x24, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x254719A4: 38A0012C li r5,300
- 18: MOVL $0x12C, t14
- 19: PUTL t14, R5
- 20: INCEIPL $4
-
- 0x254719A8: 80040000 lwz r0,0(r4)
- 21: GETL R4, t16
- 22: LDL (t16), t18
- 23: PUTL t18, R0
- 24: INCEIPL $4
-
- 0x254719AC: 83BE04C8 lwz r29,1224(r30)
- 25: GETL R30, t20
- 26: ADDL $0x4C8, t20
- 27: LDL (t20), t22
- 28: PUTL t22, R29
- 29: INCEIPL $4
-
- 0x254719B0: 81840008 lwz r12,8(r4)
- 30: GETL R4, t24
- 31: ADDL $0x8, t24
- 32: LDL (t24), t26
- 33: PUTL t26, R12
- 34: INCEIPL $4
-
- 0x254719B4: 38840020 addi r4,r4,32
- 35: GETL R4, t28
- 36: ADDL $0x20, t28
- 37: PUTL t28, R4
- 38: INCEIPL $4
-
- 0x254719B8: 901D01B8 stw r0,440(r29)
- 39: GETL R0, t30
- 40: GETL R29, t32
- 41: ADDL $0x1B8, t32
- 42: STL t30, (t32)
- 43: INCEIPL $4
-
- 0x254719BC: 919D01C0 stw r12,448(r29)
- 44: GETL R12, t34
- 45: GETL R29, t36
- 46: ADDL $0x1C0, t36
- 47: STL t34, (t36)
- 48: INCEIPL $4
-
- 0x254719C0: 9361000C stw r27,12(r1)
- 49: GETL R27, t38
- 50: GETL R1, t40
- 51: ADDL $0xC, t40
- 52: STL t38, (t40)
- 53: INCEIPL $4
-
- 0x254719C4: 7C7B1B78 or r27,r3,r3
- 54: GETL R3, t42
- 55: PUTL t42, R27
- 56: INCEIPL $4
-
- 0x254719C8: 93810010 stw r28,16(r1)
- 57: GETL R28, t44
- 58: GETL R1, t46
- 59: ADDL $0x10, t46
- 60: STL t44, (t46)
- 61: INCEIPL $4
-
- 0x254719CC: 387D01D8 addi r3,r29,472
- 62: GETL R29, t48
- 63: ADDL $0x1D8, t48
- 64: PUTL t48, R3
- 65: INCEIPL $4
-
- 0x254719D0: 3B9D01B8 addi r28,r29,440
- 66: GETL R29, t50
- 67: ADDL $0x1B8, t50
- 68: PUTL t50, R28
- 69: INCEIPL $4
-
- 0x254719D4: 4801220D bl 0x25483BE0
- 70: MOVL $0x254719D8, t52
- 71: PUTL t52, LR
- 72: JMPo-c $0x25483BE0 ($4)
-
-
-. 0 25471994 68
-. 93 C1 00 18 7F C8 02 A6 93 A1 00 14 91 21 00 24 38 A0 01 2C 80 04 00 00 83 BE 04 C8 81 84 00 08 38 84 00 20 90 1D 01 B8 91 9D 01 C0 93 61 00 0C 7C 7B 1B 78 93 81 00 10 38 7D 01 D8 3B 9D 01 B8 48 01 22 0D
-
-==== BB 69 memcpy(0x25483BE0) approx BBs exec'd 0 ====
-
- 0x25483BE0: 2B85000F cmpli cr7,r5,15
- 0: GETL R5, t0
- 1: MOVL $0xF, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0x25483BE4: 7C0802A6 mflr r0
- 5: GETL LR, t6
- 6: PUTL t6, R0
- 7: INCEIPL $4
-
- 0x25483BE8: 9421FFE0 stwu r1,-32(r1)
- 8: GETL R1, t8
- 9: GETL R1, t10
- 10: ADDL $0xFFFFFFE0, t10
- 11: PUTL t10, R1
- 12: STL t8, (t10)
- 13: INCEIPL $4
-
- 0x25483BEC: 9361000C stw r27,12(r1)
- 14: GETL R27, t12
- 15: GETL R1, t14
- 16: ADDL $0xC, t14
- 17: STL t12, (t14)
- 18: INCEIPL $4
-
- 0x25483BF0: 7C7B1B78 or r27,r3,r3
- 19: GETL R3, t16
- 20: PUTL t16, R27
- 21: INCEIPL $4
-
- 0x25483BF4: 93A10014 stw r29,20(r1)
- 22: GETL R29, t18
- 23: GETL R1, t20
- 24: ADDL $0x14, t20
- 25: STL t18, (t20)
- 26: INCEIPL $4
-
- 0x25483BF8: 7C9D2378 or r29,r4,r4
- 27: GETL R4, t22
- 28: PUTL t22, R29
- 29: INCEIPL $4
-
- 0x25483BFC: 93E1001C stw r31,28(r1)
- 30: GETL R31, t24
- 31: GETL R1, t26
- 32: ADDL $0x1C, t26
- 33: STL t24, (t26)
- 34: INCEIPL $4
-
- 0x25483C00: 7C7F1B78 or r31,r3,r3
- 35: GETL R3, t28
- 36: PUTL t28, R31
- 37: INCEIPL $4
-
- 0x25483C04: 93810010 stw r28,16(r1)
- 38: GETL R28, t30
- 39: GETL R1, t32
- 40: ADDL $0x10, t32
- 41: STL t30, (t32)
- 42: INCEIPL $4
-
- 0x25483C08: 93C10018 stw r30,24(r1)
- 43: GETL R30, t34
- 44: GETL R1, t36
- 45: ADDL $0x18, t36
- 46: STL t34, (t36)
- 47: INCEIPL $4
-
- 0x25483C0C: 90010024 stw r0,36(r1)
- 48: GETL R0, t38
- 49: GETL R1, t40
- 50: ADDL $0x24, t40
- 51: STL t38, (t40)
- 52: INCEIPL $4
-
- 0x25483C10: 409D0058 bc 4,29,0x25483C68
- 53: Jc29o $0x25483C68
-
-
-. 0 25483BE0 52
-. 2B 85 00 0F 7C 08 02 A6 94 21 FF E0 93 61 00 0C 7C 7B 1B 78 93 A1 00 14 7C 9D 23 78 93 E1 00 1C 7C 7F 1B 78 93 81 00 10 93 C1 00 18 90 01 00 24 40 9D 00 58
-
-==== BB 70 (0x25483C14) approx BBs exec'd 0 ====
-
- 0x25483C14: 7C8300D0 neg r4,r3
- 0: GETL R3, t0
- 1: NEGL t0
- 2: PUTL t0, R4
- 3: INCEIPL $4
-
- 0x25483C18: 548307BE rlwinm r3,r4,0,30,31
- 4: GETL R4, t2
- 5: ANDL $0x3, t2
- 6: PUTL t2, R3
- 7: INCEIPL $4
-
- 0x25483C1C: 7C691B79 or. r9,r3,r3
- 8: GETL R3, t4
- 9: PUTL t4, R9
- 10: CMP0L t4, t6 (-rSo)
- 11: ICRFL t6, $0x0, CR
- 12: INCEIPL $4
-
- 0x25483C20: 7F832850 subf r28,r3,r5
- 13: GETL R3, t8
- 14: GETL R5, t10
- 15: SUBL t8, t10
- 16: PUTL t10, R28
- 17: INCEIPL $4
-
- 0x25483C24: 4182001C bc 12,2,0x25483C40
- 18: Js02o $0x25483C40
-
-
-. 0 25483C14 20
-. 7C 83 00 D0 54 83 07 BE 7C 69 1B 79 7F 83 28 50 41 82 00 1C
-
-==== BB 71 (0x25483C40) approx BBs exec'd 0 ====
-
- 0x25483C40: 73A00003 andi. r0,r29,0x3
- 0: GETL R29, t0
- 1: ANDL $0x3, t0
- 2: PUTL t0, R0
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x25483C44: 4082006C bc 4,2,0x25483CB0
- 6: Jc02o $0x25483CB0
-
-
-. 0 25483C40 8
-. 73 A0 00 03 40 82 00 6C
-
-==== BB 72 (0x25483C48) approx BBs exec'd 0 ====
-
- 0x25483C48: 7FE3FB78 or r3,r31,r31
- 0: GETL R31, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25483C4C: 7FA4EB78 or r4,r29,r29
- 3: GETL R29, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x25483C50: 5785F0BE rlwinm r5,r28,30,2,31
- 6: GETL R28, t4
- 7: SHRL $0x2, t4
- 8: PUTL t4, R5
- 9: INCEIPL $4
-
- 0x25483C54: 48000071 bl 0x25483CC4
- 10: MOVL $0x25483C58, t6
- 11: PUTL t6, LR
- 12: JMPo-c $0x25483CC4 ($4)
-
-
-. 0 25483C48 16
-. 7F E3 FB 78 7F A4 EB 78 57 85 F0 BE 48 00 00 71
-
-==== BB 73 _wordcopy_fwd_aligned(0x25483CC4) approx BBs exec'd 0 ====
-
- 0x25483CC4: 54A0077E rlwinm r0,r5,0,29,31
- 0: GETL R5, t0
- 1: ANDL $0x7, t0
- 2: PUTL t0, R0
- 3: INCEIPL $4
-
- 0x25483CC8: 7D8802A6 mflr r12
- 4: GETL LR, t2
- 5: PUTL t2, R12
- 6: INCEIPL $4
-
- 0x25483CCC: 2B800007 cmpli cr7,r0,7
- 7: GETL R0, t4
- 8: MOVL $0x7, t8
- 9: CMPUL t4, t8, t6 (-rSo)
- 10: ICRFL t6, $0x7, CR
- 11: INCEIPL $4
-
- 0x25483CD0: 48013331 bl 0x25497000
- 12: MOVL $0x25483CD4, t10
- 13: PUTL t10, LR
- 14: JMPo-c $0x25497000 ($4)
-
-
-. 0 25483CC4 16
-. 54 A0 07 7E 7D 88 02 A6 2B 80 00 07 48 01 33 31
-
-==== BB 74 (0x25483CD4) approx BBs exec'd 0 ====
-
- 0x25483CD4: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25483CD8: 93C10008 stw r30,8(r1)
- 6: GETL R30, t4
- 7: GETL R1, t6
- 8: ADDL $0x8, t6
- 9: STL t4, (t6)
- 10: INCEIPL $4
-
- 0x25483CDC: 7FC802A6 mflr r30
- 11: GETL LR, t8
- 12: PUTL t8, R30
- 13: INCEIPL $4
-
- 0x25483CE0: 7D8803A6 mtlr r12
- 14: GETL R12, t10
- 15: PUTL t10, LR
- 16: INCEIPL $4
-
- 0x25483CE4: 419D0028 bc 12,29,0x25483D0C
- 17: Js29o $0x25483D0C
-
-
-. 0 25483CD4 20
-. 94 21 FF F0 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 41 9D 00 28
-
-==== BB 75 (0x25483CE8) approx BBs exec'd 0 ====
-
- 0x25483CE8: 817E0490 lwz r11,1168(r30)
- 0: GETL R30, t0
- 1: ADDL $0x490, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25483CEC: 5400103A rlwinm r0,r0,2,0,29
- 5: GETL R0, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x25483CF0: 7CCB002E lwzx r6,r11,r0
- 9: GETL R0, t6
- 10: GETL R11, t8
- 11: ADDL t8, t6
- 12: LDL (t6), t10
- 13: PUTL t10, R6
- 14: INCEIPL $4
-
- 0x25483CF4: 7D265A14 add r9,r6,r11
- 15: GETL R6, t12
- 16: GETL R11, t14
- 17: ADDL t12, t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25483CF8: 7D2903A6 mtctr r9
- 20: GETL R9, t16
- 21: PUTL t16, CTR
- 22: INCEIPL $4
-
- 0x25483CFC: 4E800420 bctr
- 23: GETL CTR, t18
- 24: JMPo t18 ($4)
-
-
-. 0 25483CE8 24
-. 81 7E 04 90 54 00 10 3A 7C CB 00 2E 7D 26 5A 14 7D 29 03 A6 4E 80 04 20
-
-==== BB 76 (0x25483D94) approx BBs exec'd 0 ====
-
- 0x25483D94: 81240000 lwz r9,0(r4)
- 0: GETL R4, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0x25483D98: 3863FFE8 addi r3,r3,-24
- 4: GETL R3, t4
- 5: ADDL $0xFFFFFFE8, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25483D9C: 3884FFEC addi r4,r4,-20
- 8: GETL R4, t6
- 9: ADDL $0xFFFFFFEC, t6
- 10: PUTL t6, R4
- 11: INCEIPL $4
-
- 0x25483DA0: 38A50005 addi r5,r5,5
- 12: GETL R5, t8
- 13: ADDL $0x5, t8
- 14: PUTL t8, R5
- 15: INCEIPL $4
-
- 0x25483DA4: 4BFFFF98 b 0x25483D3C
- 16: JMPo $0x25483D3C ($4)
-
-
-. 0 25483D94 20
-. 81 24 00 00 38 63 FF E8 38 84 FF EC 38 A5 00 05 4B FF FF 98
-
-==== BB 77 (0x25483D3C) approx BBs exec'd 0 ====
-
- 0x25483D3C: 80040018 lwz r0,24(r4)
- 0: GETL R4, t0
- 1: ADDL $0x18, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25483D40: 91230018 stw r9,24(r3)
- 5: GETL R9, t4
- 6: GETL R3, t6
- 7: ADDL $0x18, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x25483D44: 34A5FFF8 addic. r5,r5,-8
- 10: GETL R5, t8
- 11: ADCL $0xFFFFFFF8, t8 (-wCa)
- 12: PUTL t8, R5
- 13: CMP0L t8, t10 (-rSo)
- 14: ICRFL t10, $0x0, CR
- 15: INCEIPL $4
-
- 0x25483D48: 8124001C lwz r9,28(r4)
- 16: GETL R4, t12
- 17: ADDL $0x1C, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R9
- 20: INCEIPL $4
-
- 0x25483D4C: 9003001C stw r0,28(r3)
- 21: GETL R0, t16
- 22: GETL R3, t18
- 23: ADDL $0x1C, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x25483D50: 38840020 addi r4,r4,32
- 26: GETL R4, t20
- 27: ADDL $0x20, t20
- 28: PUTL t20, R4
- 29: INCEIPL $4
-
- 0x25483D54: 38630020 addi r3,r3,32
- 30: GETL R3, t22
- 31: ADDL $0x20, t22
- 32: PUTL t22, R3
- 33: INCEIPL $4
-
- 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
- 34: Jc02o $0x25483D0C
-
-
-. 0 25483D3C 32
-. 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
-
-==== BB 78 (0x25483D0C) approx BBs exec'd 0 ====
-
- 0x25483D0C: 80040000 lwz r0,0(r4)
- 0: GETL R4, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x25483D10: 91230000 stw r9,0(r3)
- 4: GETL R9, t4
- 5: GETL R3, t6
- 6: STL t4, (t6)
- 7: INCEIPL $4
-
- 0x25483D14: 81240004 lwz r9,4(r4)
- 8: GETL R4, t8
- 9: ADDL $0x4, t8
- 10: LDL (t8), t10
- 11: PUTL t10, R9
- 12: INCEIPL $4
-
- 0x25483D18: 90030004 stw r0,4(r3)
- 13: GETL R0, t12
- 14: GETL R3, t14
- 15: ADDL $0x4, t14
- 16: STL t12, (t14)
- 17: INCEIPL $4
-
- 0x25483D1C: 80040008 lwz r0,8(r4)
- 18: GETL R4, t16
- 19: ADDL $0x8, t16
- 20: LDL (t16), t18
- 21: PUTL t18, R0
- 22: INCEIPL $4
-
- 0x25483D20: 91230008 stw r9,8(r3)
- 23: GETL R9, t20
- 24: GETL R3, t22
- 25: ADDL $0x8, t22
- 26: STL t20, (t22)
- 27: INCEIPL $4
-
- 0x25483D24: 8124000C lwz r9,12(r4)
- 28: GETL R4, t24
- 29: ADDL $0xC, t24
- 30: LDL (t24), t26
- 31: PUTL t26, R9
- 32: INCEIPL $4
-
- 0x25483D28: 9003000C stw r0,12(r3)
- 33: GETL R0, t28
- 34: GETL R3, t30
- 35: ADDL $0xC, t30
- 36: STL t28, (t30)
- 37: INCEIPL $4
-
- 0x25483D2C: 80040010 lwz r0,16(r4)
- 38: GETL R4, t32
- 39: ADDL $0x10, t32
- 40: LDL (t32), t34
- 41: PUTL t34, R0
- 42: INCEIPL $4
-
- 0x25483D30: 91230010 stw r9,16(r3)
- 43: GETL R9, t36
- 44: GETL R3, t38
- 45: ADDL $0x10, t38
- 46: STL t36, (t38)
- 47: INCEIPL $4
-
- 0x25483D34: 81240014 lwz r9,20(r4)
- 48: GETL R4, t40
- 49: ADDL $0x14, t40
- 50: LDL (t40), t42
- 51: PUTL t42, R9
- 52: INCEIPL $4
-
- 0x25483D38: 90030014 stw r0,20(r3)
- 53: GETL R0, t44
- 54: GETL R3, t46
- 55: ADDL $0x14, t46
- 56: STL t44, (t46)
- 57: INCEIPL $4
-
- 0x25483D3C: 80040018 lwz r0,24(r4)
- 58: GETL R4, t48
- 59: ADDL $0x18, t48
- 60: LDL (t48), t50
- 61: PUTL t50, R0
- 62: INCEIPL $4
-
- 0x25483D40: 91230018 stw r9,24(r3)
- 63: GETL R9, t52
- 64: GETL R3, t54
- 65: ADDL $0x18, t54
- 66: STL t52, (t54)
- 67: INCEIPL $4
-
- 0x25483D44: 34A5FFF8 addic. r5,r5,-8
- 68: GETL R5, t56
- 69: ADCL $0xFFFFFFF8, t56 (-wCa)
- 70: PUTL t56, R5
- 71: CMP0L t56, t58 (-rSo)
- 72: ICRFL t58, $0x0, CR
- 73: INCEIPL $4
-
- 0x25483D48: 8124001C lwz r9,28(r4)
- 74: GETL R4, t60
- 75: ADDL $0x1C, t60
- 76: LDL (t60), t62
- 77: PUTL t62, R9
- 78: INCEIPL $4
-
- 0x25483D4C: 9003001C stw r0,28(r3)
- 79: GETL R0, t64
- 80: GETL R3, t66
- 81: ADDL $0x1C, t66
- 82: STL t64, (t66)
- 83: INCEIPL $4
-
- 0x25483D50: 38840020 addi r4,r4,32
- 84: GETL R4, t68
- 85: ADDL $0x20, t68
- 86: PUTL t68, R4
- 87: INCEIPL $4
-
- 0x25483D54: 38630020 addi r3,r3,32
- 88: GETL R3, t70
- 89: ADDL $0x20, t70
- 90: PUTL t70, R3
- 91: INCEIPL $4
-
- 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
- 92: Jc02o $0x25483D0C
-
-
-. 0 25483D0C 80
-. 80 04 00 00 91 23 00 00 81 24 00 04 90 03 00 04 80 04 00 08 91 23 00 08 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
-
-==== BB 79 (0x25483D5C) approx BBs exec'd 0 ====
-
- 0x25483D5C: 83C10008 lwz r30,8(r1)
- 0: GETL R1, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R30
- 4: INCEIPL $4
-
- 0x25483D60: 38210010 addi r1,r1,16
- 5: GETL R1, t4
- 6: ADDL $0x10, t4
- 7: PUTL t4, R1
- 8: INCEIPL $4
-
- 0x25483D64: 91230000 stw r9,0(r3)
- 9: GETL R9, t6
- 10: GETL R3, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x25483D68: 4E800020 blr
- 13: GETL LR, t10
- 14: JMPo-r t10 ($4)
-
-
-. 0 25483D5C 16
-. 83 C1 00 08 38 21 00 10 91 23 00 00 4E 80 00 20
-
-==== BB 80 (0x25483C58) approx BBs exec'd 0 ====
-
- 0x25483C58: 5786003A rlwinm r6,r28,0,0,29
- 0: GETL R28, t0
- 1: ANDL $0xFFFFFFFC, t0
- 2: PUTL t0, R6
- 3: INCEIPL $4
-
- 0x25483C5C: 578507BE rlwinm r5,r28,0,30,31
- 4: GETL R28, t2
- 5: ANDL $0x3, t2
- 6: PUTL t2, R5
- 7: INCEIPL $4
-
- 0x25483C60: 7FFF3214 add r31,r31,r6
- 8: GETL R31, t4
- 9: GETL R6, t6
- 10: ADDL t4, t6
- 11: PUTL t6, R31
- 12: INCEIPL $4
-
- 0x25483C64: 7FBD3214 add r29,r29,r6
- 13: GETL R29, t8
- 14: GETL R6, t10
- 15: ADDL t8, t10
- 16: PUTL t10, R29
- 17: INCEIPL $4
-
- 0x25483C68: 2C850000 cmpi cr1,r5,0
- 18: GETL R5, t12
- 19: CMP0L t12, t14 (-rSo)
- 20: ICRFL t14, $0x1, CR
- 21: INCEIPL $4
-
- 0x25483C6C: 4186001C bc 12,6,0x25483C88
- 22: Js06o $0x25483C88
-
-
-. 0 25483C58 24
-. 57 86 00 3A 57 85 07 BE 7F FF 32 14 7F BD 32 14 2C 85 00 00 41 86 00 1C
-
-==== BB 81 (0x25483C88) approx BBs exec'd 0 ====
-
- 0x25483C88: 81010024 lwz r8,36(r1)
- 0: GETL R1, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x25483C8C: 7F63DB78 or r3,r27,r27
- 5: GETL R27, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25483C90: 83810010 lwz r28,16(r1)
- 8: GETL R1, t6
- 9: ADDL $0x10, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R28
- 12: INCEIPL $4
-
- 0x25483C94: 8361000C lwz r27,12(r1)
- 13: GETL R1, t10
- 14: ADDL $0xC, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R27
- 17: INCEIPL $4
-
- 0x25483C98: 7D0803A6 mtlr r8
- 18: GETL R8, t14
- 19: PUTL t14, LR
- 20: INCEIPL $4
-
- 0x25483C9C: 83A10014 lwz r29,20(r1)
- 21: GETL R1, t16
- 22: ADDL $0x14, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R29
- 25: INCEIPL $4
-
- 0x25483CA0: 83C10018 lwz r30,24(r1)
- 26: GETL R1, t20
- 27: ADDL $0x18, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R30
- 30: INCEIPL $4
-
- 0x25483CA4: 83E1001C lwz r31,28(r1)
- 31: GETL R1, t24
- 32: ADDL $0x1C, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R31
- 35: INCEIPL $4
-
- 0x25483CA8: 38210020 addi r1,r1,32
- 36: GETL R1, t28
- 37: ADDL $0x20, t28
- 38: PUTL t28, R1
- 39: INCEIPL $4
-
- 0x25483CAC: 4E800020 blr
- 40: GETL LR, t30
- 41: JMPo-r t30 ($4)
-
-
-. 0 25483C88 40
-. 81 01 00 24 7F 63 DB 78 83 81 00 10 83 61 00 0C 7D 08 03 A6 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 82 (0x254719D8) approx BBs exec'd 0 ====
-
- 0x254719D8: 7F83E378 or r3,r28,r28
- 0: GETL R28, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x254719DC: 48006B91 bl 0x2547856C
- 3: MOVL $0x254719E0, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x2547856C ($4)
-
-
-. 0 254719D8 8
-. 7F 83 E3 78 48 00 6B 91
-
-==== BB 83 _dl_setup_hash(0x2547856C) approx BBs exec'd 0 ====
-
- 0x2547856C: 81230030 lwz r9,48(r3)
- 0: GETL R3, t0
- 1: ADDL $0x30, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25478570: 9421FFF0 stwu r1,-16(r1)
- 5: GETL R1, t4
- 6: GETL R1, t6
- 7: ADDL $0xFFFFFFF0, t6
- 8: PUTL t6, R1
- 9: STL t4, (t6)
- 10: INCEIPL $4
-
- 0x25478574: 2F890000 cmpi cr7,r9,0
- 11: GETL R9, t8
- 12: CMP0L t8, t10 (-rSo)
- 13: ICRFL t10, $0x7, CR
- 14: INCEIPL $4
-
- 0x25478578: 419E0024 bc 12,30,0x2547859C
- 15: Js30o $0x2547859C
-
-
-. 0 2547856C 16
-. 81 23 00 30 94 21 FF F0 2F 89 00 00 41 9E 00 24
-
-==== BB 84 (0x2547857C) approx BBs exec'd 0 ====
-
- 0x2547857C: 81690004 lwz r11,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25478580: 814B0000 lwz r10,0(r11)
- 5: GETL R11, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R10
- 8: INCEIPL $4
-
- 0x25478584: 388B0008 addi r4,r11,8
- 9: GETL R11, t8
- 10: ADDL $0x8, t8
- 11: PUTL t8, R4
- 12: INCEIPL $4
-
- 0x25478588: 90830170 stw r4,368(r3)
- 13: GETL R4, t10
- 14: GETL R3, t12
- 15: ADDL $0x170, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x2547858C: 5549103A rlwinm r9,r10,2,0,29
- 18: GETL R10, t14
- 19: SHLL $0x2, t14
- 20: PUTL t14, R9
- 21: INCEIPL $4
-
- 0x25478590: 9143016C stw r10,364(r3)
- 22: GETL R10, t16
- 23: GETL R3, t18
- 24: ADDL $0x16C, t18
- 25: STL t16, (t18)
- 26: INCEIPL $4
-
- 0x25478594: 7C044A14 add r0,r4,r9
- 27: GETL R4, t20
- 28: GETL R9, t22
- 29: ADDL t20, t22
- 30: PUTL t22, R0
- 31: INCEIPL $4
-
- 0x25478598: 90030174 stw r0,372(r3)
- 32: GETL R0, t24
- 33: GETL R3, t26
- 34: ADDL $0x174, t26
- 35: STL t24, (t26)
- 36: INCEIPL $4
-
- 0x2547859C: 38210010 addi r1,r1,16
- 37: GETL R1, t28
- 38: ADDL $0x10, t28
- 39: PUTL t28, R1
- 40: INCEIPL $4
-
- 0x254785A0: 4E800020 blr
- 41: GETL LR, t30
- 42: JMPo-r t30 ($4)
-
-
-. 0 2547857C 40
-. 81 69 00 04 81 4B 00 00 38 8B 00 08 90 83 01 70 55 49 10 3A 91 43 01 6C 7C 04 4A 14 90 03 01 74 38 21 00 10 4E 80 00 20
-
-==== BB 85 (0x254719E0) approx BBs exec'd 0 ====
-
- 0x254719E0: 80FE04FC lwz r7,1276(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4FC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x254719E4: 80DE0500 lwz r6,1280(r30)
- 5: GETL R30, t4
- 6: ADDL $0x500, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R6
- 9: INCEIPL $4
-
- 0x254719E8: 3940FFFF li r10,-1
- 10: MOVL $0xFFFFFFFF, t8
- 11: PUTL t8, R10
- 12: INCEIPL $4
-
- 0x254719EC: 80BE04A4 lwz r5,1188(r30)
- 13: GETL R30, t10
- 14: ADDL $0x4A4, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R5
- 17: INCEIPL $4
-
- 0x254719F0: 39000001 li r8,1
- 18: MOVL $0x1, t14
- 19: PUTL t14, R8
- 20: INCEIPL $4
-
- 0x254719F4: 817E04C0 lwz r11,1216(r30)
- 21: GETL R30, t16
- 22: ADDL $0x4C0, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R11
- 25: INCEIPL $4
-
- 0x254719F8: 7F63DB78 or r3,r27,r27
- 26: GETL R27, t20
- 27: PUTL t20, R3
- 28: INCEIPL $4
-
- 0x254719FC: 809E0024 lwz r4,36(r30)
- 29: GETL R30, t22
- 30: ADDL $0x24, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R4
- 33: INCEIPL $4
-
- 0x25471A00: 915D03E4 stw r10,996(r29)
- 34: GETL R10, t26
- 35: GETL R29, t28
- 36: ADDL $0x3E4, t28
- 37: STL t26, (t28)
- 38: INCEIPL $4
-
- 0x25471A04: 939D01CC stw r28,460(r29)
- 39: GETL R28, t30
- 40: GETL R29, t32
- 41: ADDL $0x1CC, t32
- 42: STL t30, (t32)
- 43: INCEIPL $4
-
- 0x25471A08: 911D0330 stw r8,816(r29)
- 44: GETL R8, t34
- 45: GETL R29, t36
- 46: ADDL $0x330, t36
- 47: STL t34, (t36)
- 48: INCEIPL $4
-
- 0x25471A0C: 90FD0358 stw r7,856(r29)
- 49: GETL R7, t38
- 50: GETL R29, t40
- 51: ADDL $0x358, t40
- 52: STL t38, (t40)
- 53: INCEIPL $4
-
- 0x25471A10: 90DD035C stw r6,860(r29)
- 54: GETL R6, t42
- 55: GETL R29, t44
- 56: ADDL $0x35C, t44
- 57: STL t42, (t44)
- 58: INCEIPL $4
-
- 0x25471A14: 90BD0360 stw r5,864(r29)
- 59: GETL R5, t46
- 60: GETL R29, t48
- 61: ADDL $0x360, t48
- 62: STL t46, (t48)
- 63: INCEIPL $4
-
- 0x25471A18: 902B0000 stw r1,0(r11)
- 64: GETL R1, t50
- 65: GETL R11, t52
- 66: STL t50, (t52)
- 67: INCEIPL $4
-
- 0x25471A1C: 4800D629 bl 0x2547F044
- 68: MOVL $0x25471A20, t54
- 69: PUTL t54, LR
- 70: JMPo-c $0x2547F044 ($4)
-
-
-. 0 254719E0 64
-. 80 FE 04 FC 80 DE 05 00 39 40 FF FF 80 BE 04 A4 39 00 00 01 81 7E 04 C0 7F 63 DB 78 80 9E 00 24 91 5D 03 E4 93 9D 01 CC 91 1D 03 30 90 FD 03 58 90 DD 03 5C 90 BD 03 60 90 2B 00 00 48 00 D6 29
-
-==== BB 86 _dl_sysdep_start(0x2547F044) approx BBs exec'd 0 ====
-
- 0x2547F044: 7D8802A6 mflr r12
- 0: GETL LR, t0
- 1: PUTL t0, R12
- 2: INCEIPL $4
-
- 0x2547F048: 9421FDE0 stwu r1,-544(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFDE0, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0x2547F04C: 38E30004 addi r7,r3,4
- 9: GETL R3, t6
- 10: ADDL $0x4, t6
- 11: PUTL t6, R7
- 12: INCEIPL $4
-
- 0x2547F050: 48017FB1 bl 0x25497000
- 13: MOVL $0x2547F054, t8
- 14: PUTL t8, LR
- 15: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547F044 16
-. 7D 88 02 A6 94 21 FD E0 38 E3 00 04 48 01 7F B1
-
-==== BB 87 (0x2547F054) approx BBs exec'd 0 ====
-
- 0x2547F054: 93C10218 stw r30,536(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x218, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547F058: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x2547F05C: 91810224 stw r12,548(r1)
- 8: GETL R12, t6
- 9: GETL R1, t8
- 10: ADDL $0x224, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2547F060: 81030000 lwz r8,0(r3)
- 13: GETL R3, t10
- 14: LDL (t10), t12
- 15: PUTL t12, R8
- 16: INCEIPL $4
-
- 0x2547F064: 80BE04C0 lwz r5,1216(r30)
- 17: GETL R30, t14
- 18: ADDL $0x4C0, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R5
- 21: INCEIPL $4
-
- 0x2547F068: 5506103A rlwinm r6,r8,2,0,29
- 22: GETL R8, t18
- 23: SHLL $0x2, t18
- 24: PUTL t18, R6
- 25: INCEIPL $4
-
- 0x2547F06C: 813E04D4 lwz r9,1236(r30)
- 26: GETL R30, t20
- 27: ADDL $0x4D4, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R9
- 30: INCEIPL $4
-
- 0x2547F070: 7D463A14 add r10,r6,r7
- 31: GETL R6, t24
- 32: GETL R7, t26
- 33: ADDL t24, t26
- 34: PUTL t26, R10
- 35: INCEIPL $4
-
- 0x2547F074: 90650000 stw r3,0(r5)
- 36: GETL R3, t28
- 37: GETL R5, t30
- 38: STL t28, (t30)
- 39: INCEIPL $4
-
- 0x2547F078: 800A0004 lwz r0,4(r10)
- 40: GETL R10, t32
- 41: ADDL $0x4, t32
- 42: LDL (t32), t34
- 43: PUTL t34, R0
- 44: INCEIPL $4
-
- 0x2547F07C: 394A0004 addi r10,r10,4
- 45: GETL R10, t36
- 46: ADDL $0x4, t36
- 47: PUTL t36, R10
- 48: INCEIPL $4
-
- 0x2547F080: 807E04D0 lwz r3,1232(r30)
- 49: GETL R30, t38
- 50: ADDL $0x4D0, t38
- 51: LDL (t38), t40
- 52: PUTL t40, R3
- 53: INCEIPL $4
-
- 0x2547F084: 2F800000 cmpi cr7,r0,0
- 54: GETL R0, t42
- 55: CMP0L t42, t44 (-rSo)
- 56: ICRFL t44, $0x7, CR
- 57: INCEIPL $4
-
- 0x2547F088: 817E04B8 lwz r11,1208(r30)
- 58: GETL R30, t46
- 59: ADDL $0x4B8, t46
- 60: LDL (t46), t48
- 61: PUTL t48, R11
- 62: INCEIPL $4
-
- 0x2547F08C: 92A101F4 stw r21,500(r1)
- 63: GETL R21, t50
- 64: GETL R1, t52
- 65: ADDL $0x1F4, t52
- 66: STL t50, (t52)
- 67: INCEIPL $4
-
- 0x2547F090: 3AA00000 li r21,0
- 68: MOVL $0x0, t54
- 69: PUTL t54, R21
- 70: INCEIPL $4
-
- 0x2547F094: 92C101F8 stw r22,504(r1)
- 71: GETL R22, t56
- 72: GETL R1, t58
- 73: ADDL $0x1F8, t58
- 74: STL t56, (t58)
- 75: INCEIPL $4
-
- 0x2547F098: 3AC00000 li r22,0
- 76: MOVL $0x0, t60
- 77: PUTL t60, R22
- 78: INCEIPL $4
-
- 0x2547F09C: 92E101FC stw r23,508(r1)
- 79: GETL R23, t62
- 80: GETL R1, t64
- 81: ADDL $0x1FC, t64
- 82: STL t62, (t64)
- 83: INCEIPL $4
-
- 0x2547F0A0: 7C972378 or r23,r4,r4
- 84: GETL R4, t66
- 85: PUTL t66, R23
- 86: INCEIPL $4
-
- 0x2547F0A4: 93010200 stw r24,512(r1)
- 87: GETL R24, t68
- 88: GETL R1, t70
- 89: ADDL $0x200, t70
- 90: STL t68, (t70)
- 91: INCEIPL $4
-
- 0x2547F0A8: 3B000000 li r24,0
- 92: MOVL $0x0, t72
- 93: PUTL t72, R24
- 94: INCEIPL $4
-
- 0x2547F0AC: 93210204 stw r25,516(r1)
- 95: GETL R25, t74
- 96: GETL R1, t76
- 97: ADDL $0x204, t76
- 98: STL t74, (t76)
- 99: INCEIPL $4
-
- 0x2547F0B0: 3B200000 li r25,0
- 100: MOVL $0x0, t78
- 101: PUTL t78, R25
- 102: INCEIPL $4
-
- 0x2547F0B4: 93E1021C stw r31,540(r1)
- 103: GETL R31, t80
- 104: GETL R1, t82
- 105: ADDL $0x21C, t82
- 106: STL t80, (t82)
- 107: INCEIPL $4
-
- 0x2547F0B8: 3BE00000 li r31,0
- 108: MOVL $0x0, t84
- 109: PUTL t84, R31
- 110: INCEIPL $4
-
- 0x2547F0BC: 93410208 stw r26,520(r1)
- 111: GETL R26, t86
- 112: GETL R1, t88
- 113: ADDL $0x208, t88
- 114: STL t86, (t88)
- 115: INCEIPL $4
-
- 0x2547F0C0: 9361020C stw r27,524(r1)
- 116: GETL R27, t90
- 117: GETL R1, t92
- 118: ADDL $0x20C, t92
- 119: STL t90, (t92)
- 120: INCEIPL $4
-
- 0x2547F0C4: 93810210 stw r28,528(r1)
- 121: GETL R28, t94
- 122: GETL R1, t96
- 123: ADDL $0x210, t96
- 124: STL t94, (t96)
- 125: INCEIPL $4
-
- 0x2547F0C8: 93A10214 stw r29,532(r1)
- 126: GETL R29, t98
- 127: GETL R1, t100
- 128: ADDL $0x214, t100
- 129: STL t98, (t100)
- 130: INCEIPL $4
-
- 0x2547F0CC: 91030000 stw r8,0(r3)
- 131: GETL R8, t102
- 132: GETL R3, t104
- 133: STL t102, (t104)
- 134: INCEIPL $4
-
- 0x2547F0D0: 90E90000 stw r7,0(r9)
- 135: GETL R7, t106
- 136: GETL R9, t108
- 137: STL t106, (t108)
- 138: INCEIPL $4
-
- 0x2547F0D4: 914B0000 stw r10,0(r11)
- 139: GETL R10, t110
- 140: GETL R11, t112
- 141: STL t110, (t112)
- 142: INCEIPL $4
-
- 0x2547F0D8: 419E0010 bc 12,30,0x2547F0E8
- 143: Js30o $0x2547F0E8
-
-
-. 0 2547F054 136
-. 93 C1 02 18 7F C8 02 A6 91 81 02 24 81 03 00 00 80 BE 04 C0 55 06 10 3A 81 3E 04 D4 7D 46 3A 14 90 65 00 00 80 0A 00 04 39 4A 00 04 80 7E 04 D0 2F 80 00 00 81 7E 04 B8 92 A1 01 F4 3A A0 00 00 92 C1 01 F8 3A C0 00 00 92 E1 01 FC 7C 97 23 78 93 01 02 00 3B 00 00 00 93 21 02 04 3B 20 00 00 93 E1 02 1C 3B E0 00 00 93 41 02 08 93 61 02 0C 93 81 02 10 93 A1 02 14 91 03 00 00 90 E9 00 00 91 4B 00 00 41 9E 00 10
-
-==== BB 88 (0x2547F0DC) approx BBs exec'd 0 ====
-
- 0x2547F0DC: 848A0004 lwzu r4,4(r10)
- 0: GETL R10, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R10
- 3: LDL (t0), t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x2547F0E0: 2F840000 cmpi cr7,r4,0
- 6: GETL R4, t4
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x7, CR
- 9: INCEIPL $4
-
- 0x2547F0E4: 409EFFF8 bc 4,30,0x2547F0DC
- 10: Jc30o $0x2547F0DC
-
-
-. 0 2547F0DC 12
-. 84 8A 00 04 2F 84 00 00 40 9E FF F8
-
-==== BB 89 (0x2547F0E8) approx BBs exec'd 0 ====
-
- 0x2547F0E8: 3B6A0013 addi r27,r10,19
- 0: GETL R10, t0
- 1: ADDL $0x13, t0
- 2: PUTL t0, R27
- 3: INCEIPL $4
-
- 0x2547F0EC: 380A0004 addi r0,r10,4
- 4: GETL R10, t2
- 5: ADDL $0x4, t2
- 6: PUTL t2, R0
- 7: INCEIPL $4
-
- 0x2547F0F0: 576B0036 rlwinm r11,r27,0,0,27
- 8: GETL R27, t4
- 9: ANDL $0xFFFFFFF0, t4
- 10: PUTL t4, R11
- 11: INCEIPL $4
-
- 0x2547F0F4: 834B0000 lwz r26,0(r11)
- 12: GETL R11, t6
- 13: LDL (t6), t8
- 14: PUTL t8, R26
- 15: INCEIPL $4
-
- 0x2547F0F8: 2F9A0010 cmpi cr7,r26,16
- 16: GETL R26, t10
- 17: MOVL $0x10, t14
- 18: CMPL t10, t14, t12 (-rSo)
- 19: ICRFL t12, $0x7, CR
- 20: INCEIPL $4
-
- 0x2547F0FC: 419D0008 bc 12,29,0x2547F104
- 21: Js29o $0x2547F104
-
-
-. 0 2547F0E8 24
-. 3B 6A 00 13 38 0A 00 04 57 6B 00 36 83 4B 00 00 2F 9A 00 10 41 9D 00 08
-
-==== BB 90 (0x2547F104) approx BBs exec'd 0 ====
-
- 0x2547F104: 7C080378 or r8,r0,r0
- 0: GETL R0, t0
- 1: PUTL t0, R8
- 2: INCEIPL $4
-
- 0x2547F108: 835E04F4 lwz r26,1268(r30)
- 3: GETL R30, t2
- 4: ADDL $0x4F4, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R26
- 7: INCEIPL $4
-
- 0x2547F10C: 81680000 lwz r11,0(r8)
- 8: GETL R8, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R11
- 11: INCEIPL $4
-
- 0x2547F110: 3B800000 li r28,0
- 12: MOVL $0x0, t10
- 13: PUTL t10, R28
- 14: INCEIPL $4
-
- 0x2547F114: 813E03EC lwz r9,1004(r30)
- 15: GETL R30, t12
- 16: ADDL $0x3EC, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x2547F118: 2C0B0000 cmpi cr0,r11,0
- 20: GETL R11, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x0, CR
- 23: INCEIPL $4
-
- 0x2547F11C: 83BE04E0 lwz r29,1248(r30)
- 24: GETL R30, t20
- 25: ADDL $0x4E0, t20
- 26: LDL (t20), t22
- 27: PUTL t22, R29
- 28: INCEIPL $4
-
- 0x2547F120: 90090000 stw r0,0(r9)
- 29: GETL R0, t24
- 30: GETL R9, t26
- 31: STL t24, (t26)
- 32: INCEIPL $4
-
- 0x2547F124: 93A101E0 stw r29,480(r1)
- 33: GETL R29, t28
- 34: GETL R1, t30
- 35: ADDL $0x1E0, t30
- 36: STL t28, (t30)
- 37: INCEIPL $4
-
- 0x2547F128: 939A000C stw r28,12(r26)
- 38: GETL R28, t32
- 39: GETL R26, t34
- 40: ADDL $0xC, t34
- 41: STL t32, (t34)
- 42: INCEIPL $4
-
- 0x2547F12C: 4182004C bc 12,2,0x2547F178
- 43: Js02o $0x2547F178
-
-
-. 0 2547F104 44
-. 7C 08 03 78 83 5E 04 F4 81 68 00 00 3B 80 00 00 81 3E 03 EC 2C 0B 00 00 83 BE 04 E0 90 09 00 00 93 A1 01 E0 93 9A 00 0C 41 82 00 4C
-
-==== BB 91 (0x2547F130) approx BBs exec'd 0 ====
-
- 0x2547F130: 7D6A5B78 or r10,r11,r11
- 0: GETL R11, t0
- 1: PUTL t0, R10
- 2: INCEIPL $4
-
- 0x2547F134: 380AFFFD addi r0,r10,-3
- 3: GETL R10, t2
- 4: ADDL $0xFFFFFFFD, t2
- 5: PUTL t2, R0
- 6: INCEIPL $4
-
- 0x2547F138: 28800014 cmpli cr1,r0,20
- 7: GETL R0, t4
- 8: MOVL $0x14, t8
- 9: CMPUL t4, t8, t6 (-rSo)
- 10: ICRFL t6, $0x1, CR
- 11: INCEIPL $4
-
- 0x2547F13C: 41850024 bc 12,5,0x2547F160
- 12: Js05o $0x2547F160
-
-
-. 0 2547F130 16
-. 7D 6A 5B 78 38 0A FF FD 28 80 00 14 41 85 00 24
-
-==== BB 92 (0x2547F140) approx BBs exec'd 0 ====
-
- 0x2547F140: 817E03F4 lwz r11,1012(r30)
- 0: GETL R30, t0
- 1: ADDL $0x3F4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547F144: 5405103A rlwinm r5,r0,2,0,29
- 5: GETL R0, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x2547F148: 7C65582E lwzx r3,r5,r11
- 9: GETL R11, t6
- 10: GETL R5, t8
- 11: ADDL t8, t6
- 12: LDL (t6), t10
- 13: PUTL t10, R3
- 14: INCEIPL $4
-
- 0x2547F14C: 7CE35A14 add r7,r3,r11
- 15: GETL R3, t12
- 16: GETL R11, t14
- 17: ADDL t12, t14
- 18: PUTL t14, R7
- 19: INCEIPL $4
-
- 0x2547F150: 7CE903A6 mtctr r7
- 20: GETL R7, t16
- 21: PUTL t16, CTR
- 22: INCEIPL $4
-
- 0x2547F154: 4E800420 bctr
- 23: GETL CTR, t18
- 24: JMPo t18 ($4)
-
-
-. 0 2547F140 24
-. 81 7E 03 F4 54 05 10 3A 7C 65 58 2E 7C E3 5A 14 7C E9 03 A6 4E 80 04 20
-
-==== BB 93 (0x2547F160) approx BBs exec'd 0 ====
-
- 0x2547F160: 38A00001 li r5,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x2547F164: 7CAB5030 slw r11,r5,r10
- 3: GETL R5, t4
- 4: GETL R10, t2
- 5: SHLL t2, t4
- 6: PUTL t4, R11
- 7: INCEIPL $4
-
- 0x2547F168: 85480008 lwzu r10,8(r8)
- 8: GETL R8, t6
- 9: ADDL $0x8, t6
- 10: PUTL t6, R8
- 11: LDL (t6), t8
- 12: PUTL t8, R10
- 13: INCEIPL $4
-
- 0x2547F16C: 7FFF5B78 or r31,r31,r11
- 14: GETL R31, t10
- 15: GETL R11, t12
- 16: ORL t12, t10
- 17: PUTL t10, R31
- 18: INCEIPL $4
-
- 0x2547F170: 2F8A0000 cmpi cr7,r10,0
- 19: GETL R10, t14
- 20: CMP0L t14, t16 (-rSo)
- 21: ICRFL t16, $0x7, CR
- 22: INCEIPL $4
-
- 0x2547F174: 409EFFC0 bc 4,30,0x2547F134
- 23: Jc30o $0x2547F134
-
-
-. 0 2547F160 24
-. 38 A0 00 01 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FF C0
-
-==== BB 94 (0x2547F134) approx BBs exec'd 0 ====
-
- 0x2547F134: 380AFFFD addi r0,r10,-3
- 0: GETL R10, t0
- 1: ADDL $0xFFFFFFFD, t0
- 2: PUTL t0, R0
- 3: INCEIPL $4
-
- 0x2547F138: 28800014 cmpli cr1,r0,20
- 4: GETL R0, t2
- 5: MOVL $0x14, t6
- 6: CMPUL t2, t6, t4 (-rSo)
- 7: ICRFL t4, $0x1, CR
- 8: INCEIPL $4
-
- 0x2547F13C: 41850024 bc 12,5,0x2547F160
- 9: Js05o $0x2547F160
-
-
-. 0 2547F134 12
-. 38 0A FF FD 28 80 00 14 41 85 00 24
-
-==== BB 95 (0x2547F3D4) approx BBs exec'd 0 ====
-
- 0x2547F3D4: 813E04F0 lwz r9,1264(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4F0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547F3D8: 2F090000 cmpi cr6,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x2547F3DC: 41BAFD84 bc 13,26,0x2547F160
- 9: Js26o $0x2547F160
-
-
-. 0 2547F3D4 12
-. 81 3E 04 F0 2F 09 00 00 41 BA FD 84
-
-==== BB 96 (0x2547F3E0) approx BBs exec'd 0 ====
-
- 0x2547F3E0: 80680004 lwz r3,4(r8)
- 0: GETL R8, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x2547F3E4: 90690000 stw r3,0(r9)
- 5: GETL R3, t4
- 6: GETL R9, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0x2547F3E8: 81480000 lwz r10,0(r8)
- 9: GETL R8, t8
- 10: LDL (t8), t10
- 11: PUTL t10, R10
- 12: INCEIPL $4
-
- 0x2547F3EC: 38A00001 li r5,1
- 13: MOVL $0x1, t12
- 14: PUTL t12, R5
- 15: INCEIPL $4
-
- 0x2547F3F0: 7CAB5030 slw r11,r5,r10
- 16: GETL R5, t16
- 17: GETL R10, t14
- 18: SHLL t14, t16
- 19: PUTL t16, R11
- 20: INCEIPL $4
-
- 0x2547F3F4: 85480008 lwzu r10,8(r8)
- 21: GETL R8, t18
- 22: ADDL $0x8, t18
- 23: PUTL t18, R8
- 24: LDL (t18), t20
- 25: PUTL t20, R10
- 26: INCEIPL $4
-
- 0x2547F3F8: 7FFF5B78 or r31,r31,r11
- 27: GETL R31, t22
- 28: GETL R11, t24
- 29: ORL t24, t22
- 30: PUTL t22, R31
- 31: INCEIPL $4
-
- 0x2547F3FC: 2F8A0000 cmpi cr7,r10,0
- 32: GETL R10, t26
- 33: CMP0L t26, t28 (-rSo)
- 34: ICRFL t28, $0x7, CR
- 35: INCEIPL $4
-
- 0x2547F400: 409EFD34 bc 4,30,0x2547F134
- 36: Jc30o $0x2547F134
-
-
-. 0 2547F3E0 36
-. 80 68 00 04 90 69 00 00 81 48 00 00 38 A0 00 01 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FD 34
-
-==== BB 97 (0x2547F158) approx BBs exec'd 0 ====
-
- 0x2547F158: 83A80004 lwz r29,4(r8)
- 0: GETL R8, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x2547F15C: 93BA003C stw r29,60(r26)
- 5: GETL R29, t4
- 6: GETL R26, t6
- 7: ADDL $0x3C, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x2547F160: 38A00001 li r5,1
- 10: MOVL $0x1, t8
- 11: PUTL t8, R5
- 12: INCEIPL $4
-
- 0x2547F164: 7CAB5030 slw r11,r5,r10
- 13: GETL R5, t12
- 14: GETL R10, t10
- 15: SHLL t10, t12
- 16: PUTL t12, R11
- 17: INCEIPL $4
-
- 0x2547F168: 85480008 lwzu r10,8(r8)
- 18: GETL R8, t14
- 19: ADDL $0x8, t14
- 20: PUTL t14, R8
- 21: LDL (t14), t16
- 22: PUTL t16, R10
- 23: INCEIPL $4
-
- 0x2547F16C: 7FFF5B78 or r31,r31,r11
- 24: GETL R31, t18
- 25: GETL R11, t20
- 26: ORL t20, t18
- 27: PUTL t18, R31
- 28: INCEIPL $4
-
- 0x2547F170: 2F8A0000 cmpi cr7,r10,0
- 29: GETL R10, t22
- 30: CMP0L t22, t24 (-rSo)
- 31: ICRFL t24, $0x7, CR
- 32: INCEIPL $4
-
- 0x2547F174: 409EFFC0 bc 4,30,0x2547F134
- 33: Jc30o $0x2547F134
-
-
-. 0 2547F158 32
-. 83 A8 00 04 93 BA 00 3C 38 A0 00 01 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FF C0
-
-==== BB 98 (0x2547F4BC) approx BBs exec'd 0 ====
-
- 0x2547F4BC: 81480004 lwz r10,4(r8)
- 0: GETL R8, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x2547F4C0: 915A0004 stw r10,4(r26)
- 5: GETL R10, t4
- 6: GETL R26, t6
- 7: ADDL $0x4, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x2547F4C4: 81480000 lwz r10,0(r8)
- 10: GETL R8, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R10
- 13: INCEIPL $4
-
- 0x2547F4C8: 4BFFFF24 b 0x2547F3EC
- 14: JMPo $0x2547F3EC ($4)
-
-
-. 0 2547F4BC 16
-. 81 48 00 04 91 5A 00 04 81 48 00 00 4B FF FF 24
-
-==== BB 99 (0x2547F3EC) approx BBs exec'd 0 ====
-
- 0x2547F3EC: 38A00001 li r5,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x2547F3F0: 7CAB5030 slw r11,r5,r10
- 3: GETL R5, t4
- 4: GETL R10, t2
- 5: SHLL t2, t4
- 6: PUTL t4, R11
- 7: INCEIPL $4
-
- 0x2547F3F4: 85480008 lwzu r10,8(r8)
- 8: GETL R8, t6
- 9: ADDL $0x8, t6
- 10: PUTL t6, R8
- 11: LDL (t6), t8
- 12: PUTL t8, R10
- 13: INCEIPL $4
-
- 0x2547F3F8: 7FFF5B78 or r31,r31,r11
- 14: GETL R31, t10
- 15: GETL R11, t12
- 16: ORL t12, t10
- 17: PUTL t10, R31
- 18: INCEIPL $4
-
- 0x2547F3FC: 2F8A0000 cmpi cr7,r10,0
- 19: GETL R10, t14
- 20: CMP0L t14, t16 (-rSo)
- 21: ICRFL t16, $0x7, CR
- 22: INCEIPL $4
-
- 0x2547F400: 409EFD34 bc 4,30,0x2547F134
- 23: Jc30o $0x2547F134
-
-
-. 0 2547F3EC 24
-. 38 A0 00 01 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FD 34
-
-==== BB 100 (0x2547F418) approx BBs exec'd 0 ====
-
- 0x2547F418: 81280004 lwz r9,4(r8)
- 0: GETL R8, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547F41C: 913A001C stw r9,28(r26)
- 5: GETL R9, t4
- 6: GETL R26, t6
- 7: ADDL $0x1C, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x2547F420: 81480000 lwz r10,0(r8)
- 10: GETL R8, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R10
- 13: INCEIPL $4
-
- 0x2547F424: 4BFFFFC8 b 0x2547F3EC
- 14: JMPo $0x2547F3EC ($4)
-
-
-. 0 2547F418 16
-. 81 28 00 04 91 3A 00 1C 81 48 00 00 4B FF FF C8
-
-==== BB 101 (0x2547F4EC) approx BBs exec'd 0 ====
-
- 0x2547F4EC: 38A00001 li r5,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x2547F4F0: 82C80004 lwz r22,4(r8)
- 3: GETL R8, t2
- 4: ADDL $0x4, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R22
- 7: INCEIPL $4
-
- 0x2547F4F4: 7CAB5030 slw r11,r5,r10
- 8: GETL R5, t8
- 9: GETL R10, t6
- 10: SHLL t6, t8
- 11: PUTL t8, R11
- 12: INCEIPL $4
-
- 0x2547F4F8: 85480008 lwzu r10,8(r8)
- 13: GETL R8, t10
- 14: ADDL $0x8, t10
- 15: PUTL t10, R8
- 16: LDL (t10), t12
- 17: PUTL t12, R10
- 18: INCEIPL $4
-
- 0x2547F4FC: 7FFF5B78 or r31,r31,r11
- 19: GETL R31, t14
- 20: GETL R11, t16
- 21: ORL t16, t14
- 22: PUTL t14, R31
- 23: INCEIPL $4
-
- 0x2547F500: 2F8A0000 cmpi cr7,r10,0
- 24: GETL R10, t18
- 25: CMP0L t18, t20 (-rSo)
- 26: ICRFL t20, $0x7, CR
- 27: INCEIPL $4
-
- 0x2547F504: 409EFC30 bc 4,30,0x2547F134
- 28: Jc30o $0x2547F134
-
-
-. 0 2547F4EC 28
-. 38 A0 00 01 82 C8 00 04 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FC 30
-
-==== BB 102 (0x2547F4CC) approx BBs exec'd 0 ====
-
- 0x2547F4CC: 38A00001 li r5,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x2547F4D0: 82A80004 lwz r21,4(r8)
- 3: GETL R8, t2
- 4: ADDL $0x4, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R21
- 7: INCEIPL $4
-
- 0x2547F4D4: 7CAB5030 slw r11,r5,r10
- 8: GETL R5, t8
- 9: GETL R10, t6
- 10: SHLL t6, t8
- 11: PUTL t8, R11
- 12: INCEIPL $4
-
- 0x2547F4D8: 85480008 lwzu r10,8(r8)
- 13: GETL R8, t10
- 14: ADDL $0x8, t10
- 15: PUTL t10, R8
- 16: LDL (t10), t12
- 17: PUTL t12, R10
- 18: INCEIPL $4
-
- 0x2547F4DC: 7FFF5B78 or r31,r31,r11
- 19: GETL R31, t14
- 20: GETL R11, t16
- 21: ORL t16, t14
- 22: PUTL t14, R31
- 23: INCEIPL $4
-
- 0x2547F4E0: 2F8A0000 cmpi cr7,r10,0
- 24: GETL R10, t18
- 25: CMP0L t18, t20 (-rSo)
- 26: ICRFL t20, $0x7, CR
- 27: INCEIPL $4
-
- 0x2547F4E4: 409EFC50 bc 4,30,0x2547F134
- 28: Jc30o $0x2547F134
-
-
-. 0 2547F4CC 28
-. 38 A0 00 01 82 A8 00 04 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FC 50
-
-==== BB 103 (0x2547F494) approx BBs exec'd 0 ====
-
- 0x2547F494: 80080004 lwz r0,4(r8)
- 0: GETL R8, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x2547F498: 38A00001 li r5,1
- 5: MOVL $0x1, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x2547F49C: 81480000 lwz r10,0(r8)
- 8: GETL R8, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R10
- 11: INCEIPL $4
-
- 0x2547F4A0: 900101E0 stw r0,480(r1)
- 12: GETL R0, t10
- 13: GETL R1, t12
- 14: ADDL $0x1E0, t12
- 15: STL t10, (t12)
- 16: INCEIPL $4
-
- 0x2547F4A4: 7CAB5030 slw r11,r5,r10
- 17: GETL R5, t16
- 18: GETL R10, t14
- 19: SHLL t14, t16
- 20: PUTL t16, R11
- 21: INCEIPL $4
-
- 0x2547F4A8: 85480008 lwzu r10,8(r8)
- 22: GETL R8, t18
- 23: ADDL $0x8, t18
- 24: PUTL t18, R8
- 25: LDL (t18), t20
- 26: PUTL t20, R10
- 27: INCEIPL $4
-
- 0x2547F4AC: 7FFF5B78 or r31,r31,r11
- 28: GETL R31, t22
- 29: GETL R11, t24
- 30: ORL t24, t22
- 31: PUTL t22, R31
- 32: INCEIPL $4
-
- 0x2547F4B0: 2F8A0000 cmpi cr7,r10,0
- 33: GETL R10, t26
- 34: CMP0L t26, t28 (-rSo)
- 35: ICRFL t28, $0x7, CR
- 36: INCEIPL $4
-
- 0x2547F4B4: 409EFC80 bc 4,30,0x2547F134
- 37: Jc30o $0x2547F134
-
-
-. 0 2547F494 36
-. 80 08 00 04 38 A0 00 01 81 48 00 00 90 01 01 E0 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FC 80
-
-==== BB 104 (0x2547F470) approx BBs exec'd 0 ====
-
- 0x2547F470: 38A00001 li r5,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x2547F474: 80C80004 lwz r6,4(r8)
- 3: GETL R8, t2
- 4: ADDL $0x4, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R6
- 7: INCEIPL $4
-
- 0x2547F478: 7CAB5030 slw r11,r5,r10
- 8: GETL R5, t8
- 9: GETL R10, t6
- 10: SHLL t6, t8
- 11: PUTL t8, R11
- 12: INCEIPL $4
-
- 0x2547F47C: 85480008 lwzu r10,8(r8)
- 13: GETL R8, t10
- 14: ADDL $0x8, t10
- 15: PUTL t10, R8
- 16: LDL (t10), t12
- 17: PUTL t12, R10
- 18: INCEIPL $4
-
- 0x2547F480: 7F393278 xor r25,r25,r6
- 19: GETL R25, t14
- 20: GETL R6, t16
- 21: XORL t14, t16
- 22: PUTL t16, R25
- 23: INCEIPL $4
-
- 0x2547F484: 7FFF5B78 or r31,r31,r11
- 24: GETL R31, t18
- 25: GETL R11, t20
- 26: ORL t20, t18
- 27: PUTL t18, R31
- 28: INCEIPL $4
-
- 0x2547F488: 2F8A0000 cmpi cr7,r10,0
- 29: GETL R10, t22
- 30: CMP0L t22, t24 (-rSo)
- 31: ICRFL t24, $0x7, CR
- 32: INCEIPL $4
-
- 0x2547F48C: 409EFCA8 bc 4,30,0x2547F134
- 33: Jc30o $0x2547F134
-
-
-. 0 2547F470 32
-. 38 A0 00 01 80 C8 00 04 7C AB 50 30 85 48 00 08 7F 39 32 78 7F FF 5B 78 2F 8A 00 00 40 9E FC A8
-
-==== BB 105 (0x2547F44C) approx BBs exec'd 0 ====
-
- 0x2547F44C: 38A00001 li r5,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x2547F450: 81880004 lwz r12,4(r8)
- 3: GETL R8, t2
- 4: ADDL $0x4, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R12
- 7: INCEIPL $4
-
- 0x2547F454: 7CAB5030 slw r11,r5,r10
- 8: GETL R5, t8
- 9: GETL R10, t6
- 10: SHLL t6, t8
- 11: PUTL t8, R11
- 12: INCEIPL $4
-
- 0x2547F458: 85480008 lwzu r10,8(r8)
- 13: GETL R8, t10
- 14: ADDL $0x8, t10
- 15: PUTL t10, R8
- 16: LDL (t10), t12
- 17: PUTL t12, R10
- 18: INCEIPL $4
-
- 0x2547F45C: 7F186278 xor r24,r24,r12
- 19: GETL R24, t14
- 20: GETL R12, t16
- 21: XORL t14, t16
- 22: PUTL t16, R24
- 23: INCEIPL $4
-
- 0x2547F460: 7FFF5B78 or r31,r31,r11
- 24: GETL R31, t18
- 25: GETL R11, t20
- 26: ORL t20, t18
- 27: PUTL t18, R31
- 28: INCEIPL $4
-
- 0x2547F464: 2F8A0000 cmpi cr7,r10,0
- 29: GETL R10, t22
- 30: CMP0L t22, t24 (-rSo)
- 31: ICRFL t24, $0x7, CR
- 32: INCEIPL $4
-
- 0x2547F468: 409EFCCC bc 4,30,0x2547F134
- 33: Jc30o $0x2547F134
-
-
-. 0 2547F44C 32
-. 38 A0 00 01 81 88 00 04 7C AB 50 30 85 48 00 08 7F 18 62 78 7F FF 5B 78 2F 8A 00 00 40 9E FC CC
-
-==== BB 106 (0x2547F3A4) approx BBs exec'd 0 ====
-
- 0x2547F3A4: 83680004 lwz r27,4(r8)
- 0: GETL R8, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R27
- 4: INCEIPL $4
-
- 0x2547F3A8: 38A00001 li r5,1
- 5: MOVL $0x1, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x2547F3AC: 809E04B4 lwz r4,1204(r30)
- 8: GETL R30, t6
- 9: ADDL $0x4B4, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R4
- 12: INCEIPL $4
-
- 0x2547F3B0: 3BE0FFFF li r31,-1
- 13: MOVL $0xFFFFFFFF, t10
- 14: PUTL t10, R31
- 15: INCEIPL $4
-
- 0x2547F3B4: 81480000 lwz r10,0(r8)
- 16: GETL R8, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R10
- 19: INCEIPL $4
-
- 0x2547F3B8: 93640000 stw r27,0(r4)
- 20: GETL R27, t16
- 21: GETL R4, t18
- 22: STL t16, (t18)
- 23: INCEIPL $4
-
- 0x2547F3BC: 7CAB5030 slw r11,r5,r10
- 24: GETL R5, t22
- 25: GETL R10, t20
- 26: SHLL t20, t22
- 27: PUTL t22, R11
- 28: INCEIPL $4
-
- 0x2547F3C0: 85480008 lwzu r10,8(r8)
- 29: GETL R8, t24
- 30: ADDL $0x8, t24
- 31: PUTL t24, R8
- 32: LDL (t24), t26
- 33: PUTL t26, R10
- 34: INCEIPL $4
-
- 0x2547F3C4: 7FFF5B78 or r31,r31,r11
- 35: GETL R31, t28
- 36: GETL R11, t30
- 37: ORL t30, t28
- 38: PUTL t28, R31
- 39: INCEIPL $4
-
- 0x2547F3C8: 2F8A0000 cmpi cr7,r10,0
- 40: GETL R10, t32
- 41: CMP0L t32, t34 (-rSo)
- 42: ICRFL t34, $0x7, CR
- 43: INCEIPL $4
-
- 0x2547F3CC: 409EFD68 bc 4,30,0x2547F134
- 44: Jc30o $0x2547F134
-
-
-. 0 2547F3A4 44
-. 83 68 00 04 38 A0 00 01 80 9E 04 B4 3B E0 FF FF 81 48 00 00 93 64 00 00 7C AB 50 30 85 48 00 08 7F FF 5B 78 2F 8A 00 00 40 9E FD 68
-
-==== BB 107 (0x2547F3D0) approx BBs exec'd 0 ====
-
- 0x2547F3D0: 4BFFFDA8 b 0x2547F178
- 0: JMPo $0x2547F178 ($4)
-
-
-. 0 2547F3D0 4
-. 4B FF FD A8
-
-==== BB 108 (0x2547F178) approx BBs exec'd 0 ====
-
- 0x2547F178: 38610050 addi r3,r1,80
- 0: GETL R1, t0
- 1: ADDL $0x50, t0
- 2: PUTL t0, R3
- 3: INCEIPL $4
-
- 0x2547F17C: 4800364D bl 0x254827C8
- 4: MOVL $0x2547F180, t2
- 5: PUTL t2, LR
- 6: JMPo-c $0x254827C8 ($4)
-
-
-. 0 2547F178 8
-. 38 61 00 50 48 00 36 4D
-
-==== BB 109 uname(0x254827C8) approx BBs exec'd 0 ====
-
- 0x254827C8: 3800007A li r0,122
- 0: MOVL $0x7A, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x254827CC: 44000002 sc
- 3: JMPo-sys $0x254827D0 ($4)
-
-
-. 0 254827C8 8
-. 38 00 00 7A 44 00 00 02
-
-==== BB 110 (0x254827D0) approx BBs exec'd 0 ====
-
- 0x254827D0: 4CA30020 bclr 5,3
- 0: GETL LR, t0
- 1: Jc03o-r t0
-
-
-. 0 254827D0 4
-. 4C A3 00 20
-
-==== BB 111 (0x2547F180) approx BBs exec'd 0 ====
-
- 0x2547F180: 2C030000 cmpi cr0,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0x2547F184: 3BA10010 addi r29,r1,16
- 4: GETL R1, t4
- 5: ADDL $0x10, t4
- 6: PUTL t4, R29
- 7: INCEIPL $4
-
- 0x2547F188: 408201DC bc 4,2,0x2547F364
- 8: Jc02o $0x2547F364
-
-
-. 0 2547F180 12
-. 2C 03 00 00 3B A1 00 10 40 82 01 DC
-
-==== BB 112 (0x2547F18C) approx BBs exec'd 0 ====
-
- 0x2547F18C: 3BA100D2 addi r29,r1,210
- 0: GETL R1, t0
- 1: ADDL $0xD2, t0
- 2: PUTL t0, R29
- 3: INCEIPL $4
-
- 0x2547F190: 893D0000 lbz r9,0(r29)
- 4: GETL R29, t2
- 5: LDB (t2), t4
- 6: PUTL t4, R9
- 7: INCEIPL $4
-
- 0x2547F194: 7FA3EB78 or r3,r29,r29
- 8: GETL R29, t6
- 9: PUTL t6, R3
- 10: INCEIPL $4
-
- 0x2547F198: 38E00000 li r7,0
- 11: MOVL $0x0, t8
- 12: PUTL t8, R7
- 13: INCEIPL $4
-
- 0x2547F19C: 39000000 li r8,0
- 14: MOVL $0x0, t10
- 15: PUTL t10, R8
- 16: INCEIPL $4
-
- 0x2547F1A0: 3949FFD0 addi r10,r9,-48
- 17: GETL R9, t12
- 18: ADDL $0xFFFFFFD0, t12
- 19: PUTL t12, R10
- 20: INCEIPL $4
-
- 0x2547F1A4: 2B8A0009 cmpli cr7,r10,9
- 21: GETL R10, t14
- 22: MOVL $0x9, t18
- 23: CMPUL t14, t18, t16 (-rSo)
- 24: ICRFL t16, $0x7, CR
- 25: INCEIPL $4
-
- 0x2547F1A8: 419D0068 bc 12,29,0x2547F210
- 26: Js29o $0x2547F210
-
-
-. 0 2547F18C 32
-. 3B A1 00 D2 89 3D 00 00 7F A3 EB 78 38 E0 00 00 39 00 00 00 39 49 FF D0 2B 8A 00 09 41 9D 00 68
-
-==== BB 113 (0x2547F1AC) approx BBs exec'd 0 ====
-
- 0x2547F1AC: 89630001 lbz r11,1(r3)
- 0: GETL R3, t0
- 1: ADDL $0x1, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547F1B0: 3929FFD0 addi r9,r9,-48
- 5: GETL R9, t4
- 6: ADDL $0xFFFFFFD0, t4
- 7: PUTL t4, R9
- 8: INCEIPL $4
-
- 0x2547F1B4: 39430001 addi r10,r3,1
- 9: GETL R3, t6
- 10: ADDL $0x1, t6
- 11: PUTL t6, R10
- 12: INCEIPL $4
-
- 0x2547F1B8: 380BFFD0 addi r0,r11,-48
- 13: GETL R11, t8
- 14: ADDL $0xFFFFFFD0, t8
- 15: PUTL t8, R0
- 16: INCEIPL $4
-
- 0x2547F1BC: 2B800009 cmpli cr7,r0,9
- 17: GETL R0, t10
- 18: MOVL $0x9, t14
- 19: CMPUL t10, t14, t12 (-rSo)
- 20: ICRFL t12, $0x7, CR
- 21: INCEIPL $4
-
- 0x2547F1C0: 419D0020 bc 12,29,0x2547F1E0
- 22: Js29o $0x2547F1E0
-
-
-. 0 2547F1AC 24
-. 89 63 00 01 39 29 FF D0 39 43 00 01 38 0B FF D0 2B 80 00 09 41 9D 00 20
-
-==== BB 114 (0x2547F1E0) approx BBs exec'd 0 ====
-
- 0x2547F1E0: 2C8B002E cmpi cr1,r11,46
- 0: GETL R11, t0
- 1: MOVL $0x2E, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0x2547F1E4: 54FB402E rlwinm r27,r7,8,0,23
- 5: GETL R7, t6
- 6: SHLL $0x8, t6
- 7: PUTL t6, R27
- 8: INCEIPL $4
-
- 0x2547F1E8: 7F674B78 or r7,r27,r9
- 9: GETL R27, t8
- 10: GETL R9, t10
- 11: ORL t10, t8
- 12: PUTL t8, R7
- 13: INCEIPL $4
-
- 0x2547F1EC: 39080001 addi r8,r8,1
- 14: GETL R8, t12
- 15: ADDL $0x1, t12
- 16: PUTL t12, R8
- 17: INCEIPL $4
-
- 0x2547F1F0: 386A0001 addi r3,r10,1
- 18: GETL R10, t14
- 19: ADDL $0x1, t14
- 20: PUTL t14, R3
- 21: INCEIPL $4
-
- 0x2547F1F4: 40860014 bc 4,6,0x2547F208
- 22: Jc06o $0x2547F208
-
-
-. 0 2547F1E0 24
-. 2C 8B 00 2E 54 FB 40 2E 7F 67 4B 78 39 08 00 01 38 6A 00 01 40 86 00 14
-
-==== BB 115 (0x2547F1F8) approx BBs exec'd 0 ====
-
- 0x2547F1F8: 892A0001 lbz r9,1(r10)
- 0: GETL R10, t0
- 1: ADDL $0x1, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547F1FC: 3B89FFD0 addi r28,r9,-48
- 5: GETL R9, t4
- 6: ADDL $0xFFFFFFD0, t4
- 7: PUTL t4, R28
- 8: INCEIPL $4
-
- 0x2547F200: 281C0009 cmpli cr0,r28,9
- 9: GETL R28, t6
- 10: MOVL $0x9, t10
- 11: CMPUL t6, t10, t8 (-rSo)
- 12: ICRFL t8, $0x0, CR
- 13: INCEIPL $4
-
- 0x2547F204: 4081FFA8 bc 4,1,0x2547F1AC
- 14: Jc01o $0x2547F1AC
-
-
-. 0 2547F1F8 16
-. 89 2A 00 01 3B 89 FF D0 28 1C 00 09 40 81 FF A8
-
-==== BB 116 (0x2547F208) approx BBs exec'd 0 ====
-
- 0x2547F208: 2F080002 cmpi cr6,r8,2
- 0: GETL R8, t0
- 1: MOVL $0x2, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x6, CR
- 4: INCEIPL $4
-
- 0x2547F20C: 41990010 bc 12,25,0x2547F21C
- 5: Js25o $0x2547F21C
-
-
-. 0 2547F208 8
-. 2F 08 00 02 41 99 00 10
-
-==== BB 117 (0x2547F21C) approx BBs exec'd 0 ====
-
- 0x2547F21C: 3CA00002 lis r5,2
- 0: MOVL $0x20000, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x2547F220: 60AB0204 ori r11,r5,0x204
- 3: MOVL $0x20204, t2
- 4: PUTL t2, R11
- 5: INCEIPL $4
-
- 0x2547F224: 7F875840 cmpl cr7,r7,r11
- 6: GETL R7, t4
- 7: GETL R11, t6
- 8: CMPUL t4, t6, t8 (-rSo)
- 9: ICRFL t8, $0x7, CR
- 10: INCEIPL $4
-
- 0x2547F228: 409D03B4 bc 4,29,0x2547F5DC
- 11: Jc29o $0x2547F5DC
-
-
-. 0 2547F21C 16
-. 3C A0 00 02 60 AB 02 04 7F 87 58 40 40 9D 03 B4
-
-==== BB 118 (0x2547F22C) approx BBs exec'd 0 ====
-
- 0x2547F22C: 90FA0008 stw r7,8(r26)
- 0: GETL R7, t0
- 1: GETL R26, t2
- 2: ADDL $0x8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547F230: 3880006E li r4,110
- 5: MOVL $0x6E, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0x2547F234: 48003BCD bl 0x25482E00
- 8: MOVL $0x2547F238, t6
- 9: PUTL t6, LR
- 10: JMPo-c $0x25482E00 ($4)
-
-
-. 0 2547F22C 12
-. 90 FA 00 08 38 80 00 6E 48 00 3B CD
-
-==== BB 119 strchr(0x25482E00) approx BBs exec'd 0 ====
-
- 0x25482E00: 5084442E rlwimi r4,r4,8,16,23
- 0: GETL R4, t0
- 1: GETL R4, t2
- 2: ROLL $0x8, t2
- 3: ANDL $0xFF00, t2
- 4: ANDL $0xFFFF00FF, t0
- 5: ORL t0, t2
- 6: PUTL t2, R4
- 7: INCEIPL $4
-
- 0x25482E04: 3960FFFF li r11,-1
- 8: MOVL $0xFFFFFFFF, t4
- 9: PUTL t4, R11
- 10: INCEIPL $4
-
- 0x25482E08: 5084801E rlwimi r4,r4,16,0,15
- 11: GETL R4, t6
- 12: GETL R4, t8
- 13: ROLL $0x10, t8
- 14: ANDL $0xFFFF0000, t8
- 15: ANDL $0xFFFF, t6
- 16: ORL t6, t8
- 17: PUTL t8, R4
- 18: INCEIPL $4
-
- 0x25482E0C: 546A1EF8 rlwinm r10,r3,3,27,28
- 19: GETL R3, t10
- 20: ROLL $0x3, t10
- 21: ANDL $0x18, t10
- 22: PUTL t10, R10
- 23: INCEIPL $4
-
- 0x25482E10: 3CC0FEFF lis r6,-257
- 24: MOVL $0xFEFF0000, t12
- 25: PUTL t12, R6
- 26: INCEIPL $4
-
- 0x25482E14: 3CE07F7F lis r7,32639
- 27: MOVL $0x7F7F0000, t14
- 28: PUTL t14, R7
- 29: INCEIPL $4
-
- 0x25482E18: 5468003A rlwinm r8,r3,0,0,29
- 30: GETL R3, t16
- 31: ANDL $0xFFFFFFFC, t16
- 32: PUTL t16, R8
- 33: INCEIPL $4
-
- 0x25482E1C: 38C6FEFF addi r6,r6,-257
- 34: MOVL $0xFEFEFEFF, t18
- 35: PUTL t18, R6
- 36: INCEIPL $4
-
- 0x25482E20: 38E77F7F addi r7,r7,32639
- 37: MOVL $0x7F7F7F7F, t20
- 38: PUTL t20, R7
- 39: INCEIPL $4
-
- 0x25482E24: 80A80000 lwz r5,0(r8)
- 40: GETL R8, t22
- 41: LDL (t22), t24
- 42: PUTL t24, R5
- 43: INCEIPL $4
-
- 0x25482E28: 7D6B5430 srw r11,r11,r10
- 44: GETL R11, t28
- 45: GETL R10, t26
- 46: SHRL t26, t28
- 47: PUTL t28, R11
- 48: INCEIPL $4
-
- 0x25482E2C: 7CA55B38 orc r5,r5,r11
- 49: GETL R5, t30
- 50: GETL R11, t32
- 51: NOTL t32
- 52: ORL t30, t32
- 53: PUTL t32, R5
- 54: INCEIPL $4
-
- 0x25482E30: 7C062A14 add r0,r6,r5
- 55: GETL R6, t34
- 56: GETL R5, t36
- 57: ADDL t34, t36
- 58: PUTL t36, R0
- 59: INCEIPL $4
-
- 0x25482E34: 7CE928F8 nor r9,r7,r5
- 60: GETL R7, t38
- 61: GETL R5, t40
- 62: ORL t40, t38
- 63: NOTL t38
- 64: PUTL t38, R9
- 65: INCEIPL $4
-
- 0x25482E38: 7C004839 and. r0,r0,r9
- 66: GETL R0, t42
- 67: GETL R9, t44
- 68: ANDL t42, t44
- 69: PUTL t44, R0
- 70: CMP0L t44, t46 (-rSo)
- 71: ICRFL t46, $0x0, CR
- 72: INCEIPL $4
-
- 0x25482E3C: 7C8C2A78 xor r12,r4,r5
- 73: GETL R4, t48
- 74: GETL R5, t50
- 75: XORL t48, t50
- 76: PUTL t50, R12
- 77: INCEIPL $4
-
- 0x25482E40: 7D8C5B38 orc r12,r12,r11
- 78: GETL R12, t52
- 79: GETL R11, t54
- 80: NOTL t54
- 81: ORL t52, t54
- 82: PUTL t54, R12
- 83: INCEIPL $4
-
- 0x25482E44: 48000020 b 0x25482E64
- 84: JMPo $0x25482E64 ($4)
-
-
-. 0 25482E00 72
-. 50 84 44 2E 39 60 FF FF 50 84 80 1E 54 6A 1E F8 3C C0 FE FF 3C E0 7F 7F 54 68 00 3A 38 C6 FE FF 38 E7 7F 7F 80 A8 00 00 7D 6B 54 30 7C A5 5B 38 7C 06 2A 14 7C E9 28 F8 7C 00 48 39 7C 8C 2A 78 7D 8C 5B 38 48 00 00 20
-
-==== BB 120 (0x25482E64) approx BBs exec'd 0 ====
-
- 0x25482E64: 7C066214 add r0,r6,r12
- 0: GETL R6, t0
- 1: GETL R12, t2
- 2: ADDL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25482E68: 7CE960F8 nor r9,r7,r12
- 5: GETL R7, t4
- 6: GETL R12, t6
- 7: ORL t6, t4
- 8: NOTL t4
- 9: PUTL t4, R9
- 10: INCEIPL $4
-
- 0x25482E6C: 4182FFDC bc 12,2,0x25482E48
- 11: Js02o $0x25482E48
-
-
-. 0 25482E64 12
-. 7C 06 62 14 7C E9 60 F8 41 82 FF DC
-
-==== BB 121 (0x25482E48) approx BBs exec'd 0 ====
-
- 0x25482E48: 84A80004 lwzu r5,4(r8)
- 0: GETL R8, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R8
- 3: LDL (t0), t2
- 4: PUTL t2, R5
- 5: INCEIPL $4
-
- 0x25482E4C: 7C004839 and. r0,r0,r9
- 6: GETL R0, t4
- 7: GETL R9, t6
- 8: ANDL t4, t6
- 9: PUTL t6, R0
- 10: CMP0L t6, t8 (-rSo)
- 11: ICRFL t8, $0x0, CR
- 12: INCEIPL $4
-
- 0x25482E50: 7C062A14 add r0,r6,r5
- 13: GETL R6, t10
- 14: GETL R5, t12
- 15: ADDL t10, t12
- 16: PUTL t12, R0
- 17: INCEIPL $4
-
- 0x25482E54: 7CE928F8 nor r9,r7,r5
- 18: GETL R7, t14
- 19: GETL R5, t16
- 20: ORL t16, t14
- 21: NOTL t14
- 22: PUTL t14, R9
- 23: INCEIPL $4
-
- 0x25482E58: 4082005C bc 4,2,0x25482EB4
- 24: Jc02o $0x25482EB4
-
-
-. 0 25482E48 20
-. 84 A8 00 04 7C 00 48 39 7C 06 2A 14 7C E9 28 F8 40 82 00 5C
-
-==== BB 122 (0x25482E5C) approx BBs exec'd 0 ====
-
- 0x25482E5C: 7C004839 and. r0,r0,r9
- 0: GETL R0, t0
- 1: GETL R9, t2
- 2: ANDL t0, t2
- 3: PUTL t2, R0
- 4: CMP0L t2, t4 (-rSo)
- 5: ICRFL t4, $0x0, CR
- 6: INCEIPL $4
-
- 0x25482E60: 7C8C2A78 xor r12,r4,r5
- 7: GETL R4, t6
- 8: GETL R5, t8
- 9: XORL t6, t8
- 10: PUTL t8, R12
- 11: INCEIPL $4
-
- 0x25482E64: 7C066214 add r0,r6,r12
- 12: GETL R6, t10
- 13: GETL R12, t12
- 14: ADDL t10, t12
- 15: PUTL t12, R0
- 16: INCEIPL $4
-
- 0x25482E68: 7CE960F8 nor r9,r7,r12
- 17: GETL R7, t14
- 18: GETL R12, t16
- 19: ORL t16, t14
- 20: NOTL t14
- 21: PUTL t14, R9
- 22: INCEIPL $4
-
- 0x25482E6C: 4182FFDC bc 12,2,0x25482E48
- 23: Js02o $0x25482E48
-
-
-. 0 25482E5C 20
-. 7C 00 48 39 7C 8C 2A 78 7C 06 62 14 7C E9 60 F8 41 82 FF DC
-
-==== BB 123 (0x25482E70) approx BBs exec'd 0 ====
-
- 0x25482E70: 7C004839 and. r0,r0,r9
- 0: GETL R0, t0
- 1: GETL R9, t2
- 2: ANDL t0, t2
- 3: PUTL t2, R0
- 4: CMP0L t2, t4 (-rSo)
- 5: ICRFL t4, $0x0, CR
- 6: INCEIPL $4
-
- 0x25482E74: 38600000 li r3,0
- 7: MOVL $0x0, t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x25482E78: 4D820020 bclr 12,2
- 10: GETL LR, t8
- 11: Js02o-r t8
-
-
-. 0 25482E70 12
-. 7C 00 48 39 38 60 00 00 4D 82 00 20
-
-==== BB 124 (0x2547F238) approx BBs exec'd 0 ====
-
- 0x2547F238: 2C830000 cmpi cr1,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x2547F23C: 418602F4 bc 12,6,0x2547F530
- 4: Js06o $0x2547F530
-
-
-. 0 2547F238 8
-. 2C 83 00 00 41 86 02 F4
-
-==== BB 125 (0x2547F530) approx BBs exec'd 0 ====
-
- 0x2547F530: 813A0008 lwz r9,8(r26)
- 0: GETL R26, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547F534: 3C000002 lis r0,2
- 5: MOVL $0x20000, t4
- 6: PUTL t4, R0
- 7: INCEIPL $4
-
- 0x2547F538: 60030544 ori r3,r0,0x544
- 8: MOVL $0x20544, t6
- 9: PUTL t6, R3
- 10: INCEIPL $4
-
- 0x2547F53C: 7C891840 cmpl cr1,r9,r3
- 11: GETL R9, t8
- 12: GETL R3, t10
- 13: CMPUL t8, t10, t12 (-rSo)
- 14: ICRFL t12, $0x1, CR
- 15: INCEIPL $4
-
- 0x2547F540: 41A5FD24 bc 13,5,0x2547F264
- 16: Js05o $0x2547F264
-
-
-. 0 2547F530 20
-. 81 3A 00 08 3C 00 00 02 60 03 05 44 7C 89 18 40 41 A5 FD 24
-
-==== BB 126 (0x2547F264) approx BBs exec'd 0 ====
-
- 0x2547F264: 2F1FFFFF cmpi cr6,r31,-1
- 0: GETL R31, t0
- 1: MOVL $0xFFFFFFFF, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x6, CR
- 4: INCEIPL $4
-
- 0x2547F268: 83BE04B4 lwz r29,1204(r30)
- 5: GETL R30, t6
- 6: ADDL $0x4B4, t6
- 7: LDL (t6), t8
- 8: PUTL t8, R29
- 9: INCEIPL $4
-
- 0x2547F26C: 419A0030 bc 12,26,0x2547F29C
- 10: Js26o $0x2547F29C
-
-
-. 0 2547F264 12
-. 2F 1F FF FF 83 BE 04 B4 41 9A 00 30
-
-==== BB 127 (0x2547F29C) approx BBs exec'd 0 ====
-
- 0x2547F29C: 831A0004 lwz r24,4(r26)
- 0: GETL R26, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R24
- 4: INCEIPL $4
-
- 0x2547F2A0: 2F980000 cmpi cr7,r24,0
- 5: GETL R24, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x2547F2A4: 409E000C bc 4,30,0x2547F2B0
- 9: Jc30o $0x2547F2B0
-
-
-. 0 2547F29C 12
-. 83 1A 00 04 2F 98 00 00 40 9E 00 0C
-
-==== BB 128 (0x2547F2B0) approx BBs exec'd 0 ====
-
- 0x2547F2B0: 38600000 li r3,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547F2B4: 839E0500 lwz r28,1280(r30)
- 3: GETL R30, t2
- 4: ADDL $0x500, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R28
- 7: INCEIPL $4
-
- 0x2547F2B8: 48001119 bl 0x254803D0
- 8: MOVL $0x2547F2BC, t6
- 9: PUTL t6, LR
- 10: JMPo-c $0x254803D0 ($4)
-
-
-. 0 2547F2B0 12
-. 38 60 00 00 83 9E 05 00 48 00 11 19
-
-==== BB 129 brk(0x254803D0) approx BBs exec'd 0 ====
-
- 0x254803D0: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x254803D4: 90610008 stw r3,8(r1)
- 6: GETL R3, t4
- 7: GETL R1, t6
- 8: ADDL $0x8, t6
- 9: STL t4, (t6)
- 10: INCEIPL $4
-
- 0x254803D8: 3800002D li r0,45
- 11: MOVL $0x2D, t8
- 12: PUTL t8, R0
- 13: INCEIPL $4
-
- 0x254803DC: 44000002 sc
- 14: JMPo-sys $0x254803E0 ($4)
-
-
-. 0 254803D0 16
-. 94 21 FF F0 90 61 00 08 38 00 00 2D 44 00 00 02
-
-==== BB 130 (0x254803E0) approx BBs exec'd 0 ====
-
- 0x254803E0: 80C10008 lwz r6,8(r1)
- 0: GETL R1, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x254803E4: 7C8802A6 mflr r4
- 5: GETL LR, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0x254803E8: 48016C19 bl 0x25497000
- 8: MOVL $0x254803EC, t6
- 9: PUTL t6, LR
- 10: JMPo-c $0x25497000 ($4)
-
-
-. 0 254803E0 12
-. 80 C1 00 08 7C 88 02 A6 48 01 6C 19
-
-==== BB 131 (0x254803EC) approx BBs exec'd 0 ====
-
- 0x254803EC: 7CA802A6 mflr r5
- 0: GETL LR, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x254803F0: 80A50504 lwz r5,1284(r5)
- 3: GETL R5, t2
- 4: ADDL $0x504, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x254803F4: 7C8803A6 mtlr r4
- 8: GETL R4, t6
- 9: PUTL t6, LR
- 10: INCEIPL $4
-
- 0x254803F8: 90650000 stw r3,0(r5)
- 11: GETL R3, t8
- 12: GETL R5, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x254803FC: 7C061840 cmpl cr0,r6,r3
- 15: GETL R6, t12
- 16: GETL R3, t14
- 17: CMPUL t12, t14, t16 (-rSo)
- 18: ICRFL t16, $0x0, CR
- 19: INCEIPL $4
-
- 0x25480400: 38210010 addi r1,r1,16
- 20: GETL R1, t18
- 21: ADDL $0x10, t18
- 22: PUTL t18, R1
- 23: INCEIPL $4
-
- 0x25480404: 38600000 li r3,0
- 24: MOVL $0x0, t20
- 25: PUTL t20, R3
- 26: INCEIPL $4
-
- 0x25480408: 4CA10020 bclr 5,1
- 27: GETL LR, t22
- 28: Jc01o-r t22
-
-
-. 0 254803EC 32
-. 7C A8 02 A6 80 A5 05 04 7C 88 03 A6 90 65 00 00 7C 06 18 40 38 21 00 10 38 60 00 00 4C A1 00 20
-
-==== BB 132 (0x2547F2BC) approx BBs exec'd 0 ====
-
- 0x2547F2BC: 813E0504 lwz r9,1284(r30)
- 0: GETL R30, t0
- 1: ADDL $0x504, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547F2C0: 809A0004 lwz r4,4(r26)
- 5: GETL R26, t4
- 6: ADDL $0x4, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R4
- 9: INCEIPL $4
-
- 0x2547F2C4: 81690000 lwz r11,0(r9)
- 10: GETL R9, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R11
- 13: INCEIPL $4
-
- 0x2547F2C8: 7F2400D0 neg r25,r4
- 14: GETL R4, t12
- 15: NEGL t12
- 16: PUTL t12, R25
- 17: INCEIPL $4
-
- 0x2547F2CC: 7C8BE040 cmpl cr1,r11,r28
- 18: GETL R11, t14
- 19: GETL R28, t16
- 20: CMPUL t14, t16, t18 (-rSo)
- 21: ICRFL t18, $0x1, CR
- 22: INCEIPL $4
-
- 0x2547F2D0: 7F645A14 add r27,r4,r11
- 23: GETL R4, t20
- 24: GETL R11, t22
- 25: ADDL t20, t22
- 26: PUTL t22, R27
- 27: INCEIPL $4
-
- 0x2547F2D4: 399BFFFF addi r12,r27,-1
- 28: GETL R27, t24
- 29: ADDL $0xFFFFFFFF, t24
- 30: PUTL t24, R12
- 31: INCEIPL $4
-
- 0x2547F2D8: 7D83C838 and r3,r12,r25
- 32: GETL R12, t26
- 33: GETL R25, t28
- 34: ANDL t26, t28
- 35: PUTL t28, R3
- 36: INCEIPL $4
-
- 0x2547F2DC: 408402D8 bc 4,4,0x2547F5B4
- 37: Jc04o $0x2547F5B4
-
-
-. 0 2547F2BC 36
-. 81 3E 05 04 80 9A 00 04 81 69 00 00 7F 24 00 D0 7C 8B E0 40 7F 64 5A 14 39 9B FF FF 7D 83 C8 38 40 84 02 D8
-
-==== BB 133 (0x2547F2E0) approx BBs exec'd 0 ====
-
- 0x2547F2E0: 807A000C lwz r3,12(r26)
- 0: GETL R26, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x2547F2E4: 2C030000 cmpi cr0,r3,0
- 5: GETL R3, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x2547F2E8: 4182000C bc 12,2,0x2547F2F4
- 9: Js02o $0x2547F2F4
-
-
-. 0 2547F2E0 12
-. 80 7A 00 0C 2C 03 00 00 41 82 00 0C
-
-==== BB 134 (0x2547F2F4) approx BBs exec'd 0 ====
-
- 0x2547F2F4: 38600000 li r3,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547F2F8: 4800111D bl 0x25480414
- 3: MOVL $0x2547F2FC, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x25480414 ($4)
-
-
-. 0 2547F2F4 8
-. 38 60 00 00 48 00 11 1D
-
-==== BB 135 sbrk(0x25480414) approx BBs exec'd 0 ====
-
- 0x25480414: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25480418: 7C8802A6 mflr r4
- 6: GETL LR, t4
- 7: PUTL t4, R4
- 8: INCEIPL $4
-
- 0x2548041C: 48016BE5 bl 0x25497000
- 9: MOVL $0x25480420, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 25480414 12
-. 94 21 FF E0 7C 88 02 A6 48 01 6B E5
-
-==== BB 136 (0x25480420) approx BBs exec'd 0 ====
-
- 0x25480420: 93C10018 stw r30,24(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x18, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25480424: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x25480428: 93E1001C stw r31,28(r1)
- 8: GETL R31, t6
- 9: GETL R1, t8
- 10: ADDL $0x1C, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2548042C: 90810024 stw r4,36(r1)
- 13: GETL R4, t10
- 14: GETL R1, t12
- 15: ADDL $0x24, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x25480430: 93A10014 stw r29,20(r1)
- 18: GETL R29, t14
- 19: GETL R1, t16
- 20: ADDL $0x14, t16
- 21: STL t14, (t16)
- 22: INCEIPL $4
-
- 0x25480434: 7C7D1B78 or r29,r3,r3
- 23: GETL R3, t18
- 24: PUTL t18, R29
- 25: INCEIPL $4
-
- 0x25480438: 83FE0504 lwz r31,1284(r30)
- 26: GETL R30, t20
- 27: ADDL $0x504, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R31
- 30: INCEIPL $4
-
- 0x2548043C: 38600000 li r3,0
- 31: MOVL $0x0, t24
- 32: PUTL t24, R3
- 33: INCEIPL $4
-
- 0x25480440: 801F0000 lwz r0,0(r31)
- 34: GETL R31, t26
- 35: LDL (t26), t28
- 36: PUTL t28, R0
- 37: INCEIPL $4
-
- 0x25480444: 2F800000 cmpi cr7,r0,0
- 38: GETL R0, t30
- 39: CMP0L t30, t32 (-rSo)
- 40: ICRFL t32, $0x7, CR
- 41: INCEIPL $4
-
- 0x25480448: 419E003C bc 12,30,0x25480484
- 42: Js30o $0x25480484
-
-
-. 0 25480420 44
-. 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 81 00 24 93 A1 00 14 7C 7D 1B 78 83 FE 05 04 38 60 00 00 80 1F 00 00 2F 80 00 00 41 9E 00 3C
-
-==== BB 137 (0x2548044C) approx BBs exec'd 0 ====
-
- 0x2548044C: 813E049C lwz r9,1180(r30)
- 0: GETL R30, t0
- 1: ADDL $0x49C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25480450: 80A90000 lwz r5,0(r9)
- 5: GETL R9, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R5
- 8: INCEIPL $4
-
- 0x25480454: 2C050000 cmpi cr0,r5,0
- 9: GETL R5, t8
- 10: CMP0L t8, t10 (-rSo)
- 11: ICRFL t10, $0x0, CR
- 12: INCEIPL $4
-
- 0x25480458: 4082002C bc 4,2,0x25480484
- 13: Jc02o $0x25480484
-
-
-. 0 2548044C 16
-. 81 3E 04 9C 80 A9 00 00 2C 05 00 00 40 82 00 2C
-
-==== BB 138 (0x2548045C) approx BBs exec'd 0 ====
-
- 0x2548045C: 2F1D0000 cmpi cr6,r29,0
- 0: GETL R29, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x25480460: 409A003C bc 4,26,0x2548049C
- 4: Jc26o $0x2548049C
-
-
-. 0 2548045C 8
-. 2F 1D 00 00 40 9A 00 3C
-
-==== BB 139 (0x25480464) approx BBs exec'd 0 ====
-
- 0x25480464: 807F0000 lwz r3,0(r31)
- 0: GETL R31, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R3
- 3: INCEIPL $4
-
- 0x25480468: 80C10024 lwz r6,36(r1)
- 4: GETL R1, t4
- 5: ADDL $0x24, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R6
- 8: INCEIPL $4
-
- 0x2548046C: 83A10014 lwz r29,20(r1)
- 9: GETL R1, t8
- 10: ADDL $0x14, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R29
- 13: INCEIPL $4
-
- 0x25480470: 83C10018 lwz r30,24(r1)
- 14: GETL R1, t12
- 15: ADDL $0x18, t12
- 16: LDL (t12), t14
- 17: PUTL t14, R30
- 18: INCEIPL $4
-
- 0x25480474: 7CC803A6 mtlr r6
- 19: GETL R6, t16
- 20: PUTL t16, LR
- 21: INCEIPL $4
-
- 0x25480478: 83E1001C lwz r31,28(r1)
- 22: GETL R1, t18
- 23: ADDL $0x1C, t18
- 24: LDL (t18), t20
- 25: PUTL t20, R31
- 26: INCEIPL $4
-
- 0x2548047C: 38210020 addi r1,r1,32
- 27: GETL R1, t22
- 28: ADDL $0x20, t22
- 29: PUTL t22, R1
- 30: INCEIPL $4
-
- 0x25480480: 4E800020 blr
- 31: GETL LR, t24
- 32: JMPo-r t24 ($4)
-
-
-. 0 25480464 32
-. 80 7F 00 00 80 C1 00 24 83 A1 00 14 83 C1 00 18 7C C8 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 140 (0x2547F2FC) approx BBs exec'd 0 ====
-
- 0x2547F2FC: 7F83E000 cmp cr7,r3,r28
- 0: GETL R3, t0
- 1: GETL R28, t2
- 2: CMPL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x7, CR
- 4: INCEIPL $4
-
- 0x2547F300: 419E02C4 bc 12,30,0x2547F5C4
- 5: Js30o $0x2547F5C4
-
-
-. 0 2547F2FC 8
-. 7F 83 E0 00 41 9E 02 C4
-
-==== BB 141 (0x2547F304) approx BBs exec'd 0 ====
-
- 0x2547F304: 80BD0000 lwz r5,0(r29)
- 0: GETL R29, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R5
- 3: INCEIPL $4
-
- 0x2547F308: 2C850000 cmpi cr1,r5,0
- 4: GETL R5, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x1, CR
- 7: INCEIPL $4
-
- 0x2547F30C: 408602A0 bc 4,6,0x2547F5AC
- 8: Jc06o $0x2547F5AC
-
-
-. 0 2547F304 12
-. 80 BD 00 00 2C 85 00 00 40 86 02 A0
-
-==== BB 142 (0x2547F310) approx BBs exec'd 0 ====
-
- 0x2547F310: 7EC3B378 or r3,r22,r22
- 0: GETL R22, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547F314: 7EE803A6 mtlr r23
- 3: GETL R23, t2
- 4: PUTL t2, LR
- 5: INCEIPL $4
-
- 0x2547F318: 7EA4AB78 or r4,r21,r21
- 6: GETL R21, t4
- 7: PUTL t4, R4
- 8: INCEIPL $4
-
- 0x2547F31C: 38A101E0 addi r5,r1,480
- 9: GETL R1, t6
- 10: ADDL $0x1E0, t6
- 11: PUTL t6, R5
- 12: INCEIPL $4
-
- 0x2547F320: 4E800021 blrl
- 13: GETL LR, t8
- 14: MOVL $0x2547F324, t10
- 15: PUTL t10, LR
- 16: JMPo-r t8 ($4)
-
-
-. 0 2547F310 20
-. 7E C3 B3 78 7E E8 03 A6 7E A4 AB 78 38 A1 01 E0 4E 80 00 21
-
-==== BB 143 dl_main(0x254721F0) approx BBs exec'd 0 ====
-
- 0x254721F0: 9421FF30 stwu r1,-208(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFF30, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x254721F4: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x254721F8: 48024E09 bl 0x25497000
- 9: MOVL $0x254721FC, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 254721F0 12
-. 94 21 FF 30 7C 08 02 A6 48 02 4E 09
-
-==== BB 144 (0x254721FC) approx BBs exec'd 0 ====
-
- 0x254721FC: 93C100C8 stw r30,200(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0xC8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25472200: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x25472204: 92010090 stw r16,144(r1)
- 8: GETL R16, t6
- 9: GETL R1, t8
- 10: ADDL $0x90, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x25472208: 900100D4 stw r0,212(r1)
- 13: GETL R0, t10
- 14: GETL R1, t12
- 15: ADDL $0xD4, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x2547220C: 7D600026 mfcr r11
- 18: GETL CR, t14
- 19: PUTL t14, R11
- 20: INCEIPL $4
-
- 0x25472210: 91C10088 stw r14,136(r1)
- 21: GETL R14, t16
- 22: GETL R1, t18
- 23: ADDL $0x88, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x25472214: 821E04B4 lwz r16,1204(r30)
- 26: GETL R30, t20
- 27: ADDL $0x4B4, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R16
- 30: INCEIPL $4
-
- 0x25472218: 819E04B8 lwz r12,1208(r30)
- 31: GETL R30, t24
- 32: ADDL $0x4B8, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R12
- 35: INCEIPL $4
-
- 0x2547221C: 81500000 lwz r10,0(r16)
- 36: GETL R16, t28
- 37: LDL (t28), t30
- 38: PUTL t30, R10
- 39: INCEIPL $4
-
- 0x25472220: 81DE04C8 lwz r14,1224(r30)
- 40: GETL R30, t32
- 41: ADDL $0x4C8, t32
- 42: LDL (t32), t34
- 43: PUTL t34, R14
- 44: INCEIPL $4
-
- 0x25472224: 2F8A0000 cmpi cr7,r10,0
- 45: GETL R10, t36
- 46: CMP0L t36, t38 (-rSo)
- 47: ICRFL t38, $0x7, CR
- 48: INCEIPL $4
-
- 0x25472228: 813E0020 lwz r9,32(r30)
- 49: GETL R30, t40
- 50: ADDL $0x20, t40
- 51: LDL (t40), t42
- 52: PUTL t42, R9
- 53: INCEIPL $4
-
- 0x2547222C: 91610084 stw r11,132(r1)
- 54: GETL R11, t44
- 55: GETL R1, t46
- 56: ADDL $0x84, t46
- 57: STL t44, (t46)
- 58: INCEIPL $4
-
- 0x25472230: 811E04D8 lwz r8,1240(r30)
- 59: GETL R30, t48
- 60: ADDL $0x4D8, t48
- 61: LDL (t48), t50
- 62: PUTL t50, R8
- 63: INCEIPL $4
-
- 0x25472234: 816C0000 lwz r11,0(r12)
- 64: GETL R12, t52
- 65: LDL (t52), t54
- 66: PUTL t54, R11
- 67: INCEIPL $4
-
- 0x25472238: 80FE04B0 lwz r7,1200(r30)
- 68: GETL R30, t56
- 69: ADDL $0x4B0, t56
- 70: LDL (t56), t58
- 71: PUTL t58, R7
- 72: INCEIPL $4
-
- 0x2547223C: 80DE001C lwz r6,28(r30)
- 73: GETL R30, t60
- 74: ADDL $0x1C, t60
- 75: LDL (t60), t62
- 76: PUTL t62, R6
- 77: INCEIPL $4
-
- 0x25472240: 801E04A8 lwz r0,1192(r30)
- 78: GETL R30, t64
- 79: ADDL $0x4A8, t64
- 80: LDL (t64), t66
- 81: PUTL t66, R0
- 82: INCEIPL $4
-
- 0x25472244: 93E100CC stw r31,204(r1)
- 83: GETL R31, t68
- 84: GETL R1, t70
- 85: ADDL $0xCC, t70
- 86: STL t68, (t70)
- 87: INCEIPL $4
-
- 0x25472248: 7C3F0B78 or r31,r1,r1
- 88: GETL R1, t72
- 89: PUTL t72, R31
- 90: INCEIPL $4
-
- 0x2547224C: 91E1008C stw r15,140(r1)
- 91: GETL R15, t74
- 92: GETL R1, t76
- 93: ADDL $0x8C, t76
- 94: STL t74, (t76)
- 95: INCEIPL $4
-
- 0x25472250: 92410098 stw r18,152(r1)
- 96: GETL R18, t78
- 97: GETL R1, t80
- 98: ADDL $0x98, t80
- 99: STL t78, (t80)
- 100: INCEIPL $4
-
- 0x25472254: 3A400000 li r18,0
- 101: MOVL $0x0, t82
- 102: PUTL t82, R18
- 103: INCEIPL $4
-
- 0x25472258: 9261009C stw r19,156(r1)
- 104: GETL R19, t84
- 105: GETL R1, t86
- 106: ADDL $0x9C, t86
- 107: STL t84, (t86)
- 108: INCEIPL $4
-
- 0x2547225C: 3A600000 li r19,0
- 109: MOVL $0x0, t88
- 110: PUTL t88, R19
- 111: INCEIPL $4
-
- 0x25472260: 928100A0 stw r20,160(r1)
- 112: GETL R20, t90
- 113: GETL R1, t92
- 114: ADDL $0xA0, t92
- 115: STL t90, (t92)
- 116: INCEIPL $4
-
- 0x25472264: 3A800000 li r20,0
- 117: MOVL $0x0, t94
- 118: PUTL t94, R20
- 119: INCEIPL $4
-
- 0x25472268: 92A100A4 stw r21,164(r1)
- 120: GETL R21, t96
- 121: GETL R1, t98
- 122: ADDL $0xA4, t98
- 123: STL t96, (t98)
- 124: INCEIPL $4
-
- 0x2547226C: 3AA00000 li r21,0
- 125: MOVL $0x0, t100
- 126: PUTL t100, R21
- 127: INCEIPL $4
-
- 0x25472270: 92C100A8 stw r22,168(r1)
- 128: GETL R22, t102
- 129: GETL R1, t104
- 130: ADDL $0xA8, t104
- 131: STL t102, (t104)
- 132: INCEIPL $4
-
- 0x25472274: 7CB62B78 or r22,r5,r5
- 133: GETL R5, t106
- 134: PUTL t106, R22
- 135: INCEIPL $4
-
- 0x25472278: 92E100AC stw r23,172(r1)
- 136: GETL R23, t108
- 137: GETL R1, t110
- 138: ADDL $0xAC, t110
- 139: STL t108, (t110)
- 140: INCEIPL $4
-
- 0x2547227C: 7C972378 or r23,r4,r4
- 141: GETL R4, t112
- 142: PUTL t112, R23
- 143: INCEIPL $4
-
- 0x25472280: 930100B0 stw r24,176(r1)
- 144: GETL R24, t114
- 145: GETL R1, t116
- 146: ADDL $0xB0, t116
- 147: STL t114, (t116)
- 148: INCEIPL $4
-
- 0x25472284: 7C781B78 or r24,r3,r3
- 149: GETL R3, t118
- 150: PUTL t118, R24
- 151: INCEIPL $4
-
- 0x25472288: 932100B4 stw r25,180(r1)
- 152: GETL R25, t120
- 153: GETL R1, t122
- 154: ADDL $0xB4, t122
- 155: STL t120, (t122)
- 156: INCEIPL $4
-
- 0x2547228C: 3B200000 li r25,0
- 157: MOVL $0x0, t124
- 158: PUTL t124, R25
- 159: INCEIPL $4
-
- 0x25472290: 912E03FC stw r9,1020(r14)
- 160: GETL R9, t126
- 161: GETL R14, t128
- 162: ADDL $0x3FC, t128
- 163: STL t126, (t128)
- 164: INCEIPL $4
-
- 0x25472294: 92210094 stw r17,148(r1)
- 165: GETL R17, t130
- 166: GETL R1, t132
- 167: ADDL $0x94, t132
- 168: STL t130, (t132)
- 169: INCEIPL $4
-
- 0x25472298: 934100B8 stw r26,184(r1)
- 170: GETL R26, t134
- 171: GETL R1, t136
- 172: ADDL $0xB8, t136
- 173: STL t134, (t136)
- 174: INCEIPL $4
-
- 0x2547229C: 936100BC stw r27,188(r1)
- 175: GETL R27, t138
- 176: GETL R1, t140
- 177: ADDL $0xBC, t140
- 178: STL t138, (t140)
- 179: INCEIPL $4
-
- 0x254722A0: 938100C0 stw r28,192(r1)
- 180: GETL R28, t142
- 181: GETL R1, t144
- 182: ADDL $0xC0, t144
- 183: STL t142, (t144)
- 184: INCEIPL $4
-
- 0x254722A4: 93A100C4 stw r29,196(r1)
- 185: GETL R29, t146
- 186: GETL R1, t148
- 187: ADDL $0xC4, t148
- 188: STL t146, (t148)
- 189: INCEIPL $4
-
- 0x254722A8: 910E01B4 stw r8,436(r14)
- 190: GETL R8, t150
- 191: GETL R14, t152
- 192: ADDL $0x1B4, t152
- 193: STL t150, (t152)
- 194: INCEIPL $4
-
- 0x254722AC: 90EE042C stw r7,1068(r14)
- 195: GETL R7, t154
- 196: GETL R14, t156
- 197: ADDL $0x42C, t156
- 198: STL t154, (t156)
- 199: INCEIPL $4
-
- 0x254722B0: 90CE03F8 stw r6,1016(r14)
- 200: GETL R6, t158
- 201: GETL R14, t160
- 202: ADDL $0x3F8, t160
- 203: STL t158, (t160)
- 204: INCEIPL $4
-
- 0x254722B4: 900E0404 stw r0,1028(r14)
- 205: GETL R0, t162
- 206: GETL R14, t164
- 207: ADDL $0x404, t164
- 208: STL t162, (t164)
- 209: INCEIPL $4
-
- 0x254722B8: 917F0038 stw r11,56(r31)
- 210: GETL R11, t166
- 211: GETL R31, t168
- 212: ADDL $0x38, t168
- 213: STL t166, (t168)
- 214: INCEIPL $4
-
- 0x254722BC: 81FE04F4 lwz r15,1268(r30)
- 215: GETL R30, t170
- 216: ADDL $0x4F4, t170
- 217: LDL (t170), t172
- 218: PUTL t172, R15
- 219: INCEIPL $4
-
- 0x254722C0: 813E007C lwz r9,124(r30)
- 220: GETL R30, t174
- 221: ADDL $0x7C, t174
- 222: LDL (t174), t176
- 223: PUTL t176, R9
- 224: INCEIPL $4
-
- 0x254722C4: 419E0008 bc 12,30,0x254722CC
- 225: Js30o $0x254722CC
-
-
-. 0 254721FC 204
-. 93 C1 00 C8 7F C8 02 A6 92 01 00 90 90 01 00 D4 7D 60 00 26 91 C1 00 88 82 1E 04 B4 81 9E 04 B8 81 50 00 00 81 DE 04 C8 2F 8A 00 00 81 3E 00 20 91 61 00 84 81 1E 04 D8 81 6C 00 00 80 FE 04 B0 80 DE 00 1C 80 1E 04 A8 93 E1 00 CC 7C 3F 0B 78 91 E1 00 8C 92 41 00 98 3A 40 00 00 92 61 00 9C 3A 60 00 00 92 81 00 A0 3A 80 00 00 92 A1 00 A4 3A A0 00 00 92 C1 00 A8 7C B6 2B 78 92 E1 00 AC 7C 97 23 78 93 01 00 B0 7C 78 1B 78 93 21 00 B4 3B 20 00 00 91 2E 03 FC 92 21 00 94 93 41 00 B8 93 61 00 BC 93 81 00 C0 93 A1 00 C4 91 0E 01 B4 90 EE 04 2C 90 CE 03 F8 90 0E 04 04 91 7F 00 38 81 FE 04 F4 81 3E 00 7C 41 9E 00 08
-
-==== BB 145 (0x254722CC) approx BBs exec'd 0 ====
-
- 0x254722CC: 823E0040 lwz r17,64(r30)
- 0: GETL R30, t0
- 1: ADDL $0x40, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R17
- 4: INCEIPL $4
-
- 0x254722D0: 912F0054 stw r9,84(r15)
- 5: GETL R9, t4
- 6: GETL R15, t6
- 7: ADDL $0x54, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x254722D4: 387F0038 addi r3,r31,56
- 10: GETL R31, t8
- 11: ADDL $0x38, t8
- 12: PUTL t8, R3
- 13: INCEIPL $4
-
- 0x254722D8: 4800D951 bl 0x2547FC28
- 14: MOVL $0x254722DC, t10
- 15: PUTL t10, LR
- 16: JMPo-c $0x2547FC28 ($4)
-
-
-. 0 254722CC 16
-. 82 3E 00 40 91 2F 00 54 38 7F 00 38 48 00 D9 51
-
-==== BB 146 _dl_next_ld_env_entry(0x2547FC28) approx BBs exec'd 0 ====
-
- 0x2547FC28: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547FC2C: 39400000 li r10,0
- 6: MOVL $0x0, t4
- 7: PUTL t4, R10
- 8: INCEIPL $4
-
- 0x2547FC30: 81630000 lwz r11,0(r3)
- 9: GETL R3, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R11
- 12: INCEIPL $4
-
- 0x2547FC34: 812B0000 lwz r9,0(r11)
- 13: GETL R11, t10
- 14: LDL (t10), t12
- 15: PUTL t12, R9
- 16: INCEIPL $4
-
- 0x2547FC38: 2F890000 cmpi cr7,r9,0
- 17: GETL R9, t14
- 18: CMP0L t14, t16 (-rSo)
- 19: ICRFL t16, $0x7, CR
- 20: INCEIPL $4
-
- 0x2547FC3C: 419E001C bc 12,30,0x2547FC58
- 21: Js30o $0x2547FC58
-
-
-. 0 2547FC28 24
-. 94 21 FF F0 39 40 00 00 81 63 00 00 81 2B 00 00 2F 89 00 00 41 9E 00 1C
-
-==== BB 147 (0x2547FC40) approx BBs exec'd 0 ====
-
- 0x2547FC40: 88090000 lbz r0,0(r9)
- 0: GETL R9, t0
- 1: LDB (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x2547FC44: 2C00004C cmpi cr0,r0,76
- 4: GETL R0, t4
- 5: MOVL $0x4C, t8
- 6: CMPL t4, t8, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x2547FC48: 4182001C bc 12,2,0x2547FC64
- 9: Js02o $0x2547FC64
-
-
-. 0 2547FC40 12
-. 88 09 00 00 2C 00 00 4C 41 82 00 1C
-
-==== BB 148 (0x2547FC4C) approx BBs exec'd 0 ====
-
- 0x2547FC4C: 852B0004 lwzu r9,4(r11)
- 0: GETL R11, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R11
- 3: LDL (t0), t2
- 4: PUTL t2, R9
- 5: INCEIPL $4
-
- 0x2547FC50: 2F890000 cmpi cr7,r9,0
- 6: GETL R9, t4
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x7, CR
- 9: INCEIPL $4
-
- 0x2547FC54: 409EFFEC bc 4,30,0x2547FC40
- 10: Jc30o $0x2547FC40
-
-
-. 0 2547FC4C 12
-. 85 2B 00 04 2F 89 00 00 40 9E FF EC
-
-==== BB 149 (0x2547FC64) approx BBs exec'd 0 ====
-
- 0x2547FC64: 88890001 lbz r4,1(r9)
- 0: GETL R9, t0
- 1: ADDL $0x1, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547FC68: 2C840044 cmpi cr1,r4,68
- 5: GETL R4, t4
- 6: MOVL $0x44, t8
- 7: CMPL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x1, CR
- 9: INCEIPL $4
-
- 0x2547FC6C: 4086FFE0 bc 4,6,0x2547FC4C
- 10: Jc06o $0x2547FC4C
-
-
-. 0 2547FC64 12
-. 88 89 00 01 2C 84 00 44 40 86 FF E0
-
-==== BB 150 (0x2547FC70) approx BBs exec'd 0 ====
-
- 0x2547FC70: 88A90002 lbz r5,2(r9)
- 0: GETL R9, t0
- 1: ADDL $0x2, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x2547FC74: 2F05005F cmpi cr6,r5,95
- 5: GETL R5, t4
- 6: MOVL $0x5F, t8
- 7: CMPL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x6, CR
- 9: INCEIPL $4
-
- 0x2547FC78: 409AFFD4 bc 4,26,0x2547FC4C
- 10: Jc26o $0x2547FC4C
-
-
-. 0 2547FC70 12
-. 88 A9 00 02 2F 05 00 5F 40 9A FF D4
-
-==== BB 151 (0x2547FC7C) approx BBs exec'd 0 ====
-
- 0x2547FC7C: 38CB0004 addi r6,r11,4
- 0: GETL R11, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R6
- 3: INCEIPL $4
-
- 0x2547FC80: 39490003 addi r10,r9,3
- 4: GETL R9, t2
- 5: ADDL $0x3, t2
- 6: PUTL t2, R10
- 7: INCEIPL $4
-
- 0x2547FC84: 90C30000 stw r6,0(r3)
- 8: GETL R6, t4
- 9: GETL R3, t6
- 10: STL t4, (t6)
- 11: INCEIPL $4
-
- 0x2547FC88: 4BFFFFD0 b 0x2547FC58
- 12: JMPo $0x2547FC58 ($4)
-
-
-. 0 2547FC7C 16
-. 38 CB 00 04 39 49 00 03 90 C3 00 00 4B FF FF D0
-
-==== BB 152 (0x2547FC58) approx BBs exec'd 0 ====
-
- 0x2547FC58: 7D435378 or r3,r10,r10
- 0: GETL R10, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547FC5C: 38210010 addi r1,r1,16
- 3: GETL R1, t2
- 4: ADDL $0x10, t2
- 5: PUTL t2, R1
- 6: INCEIPL $4
-
- 0x2547FC60: 4E800020 blr
- 7: GETL LR, t4
- 8: JMPo-r t4 ($4)
-
-
-. 0 2547FC58 12
-. 7D 43 53 78 38 21 00 10 4E 80 00 20
-
-==== BB 153 (0x254722DC) approx BBs exec'd 0 ====
-
- 0x254722DC: 7C7D1B79 or. r29,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R29
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x254722E0: 41820064 bc 12,2,0x25472344
- 5: Js02o $0x25472344
-
-
-. 0 254722DC 8
-. 7C 7D 1B 79 41 82 00 64
-
-==== BB 154 (0x254722E4) approx BBs exec'd 0 ====
-
- 0x254722E4: 881D0000 lbz r0,0(r29)
- 0: GETL R29, t0
- 1: LDB (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x254722E8: 39600000 li r11,0
- 4: MOVL $0x0, t4
- 5: PUTL t4, R11
- 6: INCEIPL $4
-
- 0x254722EC: 7C090379 or. r9,r0,r0
- 7: GETL R0, t6
- 8: PUTL t6, R9
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x0, CR
- 11: INCEIPL $4
-
- 0x254722F0: 40A20018 bc 5,2,0x25472308
- 12: Jc02o $0x25472308
-
-
-. 0 254722E4 16
-. 88 1D 00 00 39 60 00 00 7C 09 03 79 40 A2 00 18
-
-==== BB 155 (0x25472308) approx BBs exec'd 0 ====
-
- 0x25472308: 2C89003D cmpi cr1,r9,61
- 0: GETL R9, t0
- 1: MOVL $0x3D, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0x2547230C: 4086FFEC bc 4,6,0x254722F8
- 5: Jc06o $0x254722F8
-
-
-. 0 25472308 8
-. 2C 89 00 3D 40 86 FF EC
-
-==== BB 156 (0x254722F8) approx BBs exec'd 0 ====
-
- 0x254722F8: 396B0001 addi r11,r11,1
- 0: GETL R11, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R11
- 3: INCEIPL $4
-
- 0x254722FC: 7C1D58AE lbzx r0,r29,r11
- 4: GETL R11, t2
- 5: GETL R29, t4
- 6: ADDL t4, t2
- 7: LDB (t2), t6
- 8: PUTL t6, R0
- 9: INCEIPL $4
-
- 0x25472300: 7C090379 or. r9,r0,r0
- 10: GETL R0, t8
- 11: PUTL t8, R9
- 12: CMP0L t8, t10 (-rSo)
- 13: ICRFL t10, $0x0, CR
- 14: INCEIPL $4
-
- 0x25472304: 4182000C bc 12,2,0x25472310
- 15: Js02o $0x25472310
-
-
-. 0 254722F8 16
-. 39 6B 00 01 7C 1D 58 AE 7C 09 03 79 41 82 00 0C
-
-==== BB 157 (0x25472310) approx BBs exec'd 0 ====
-
- 0x25472310: 2D80003D cmpi cr3,r0,61
- 0: GETL R0, t0
- 1: MOVL $0x3D, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x3, CR
- 4: INCEIPL $4
-
- 0x25472314: 408EFFC0 bc 4,14,0x254722D4
- 5: Jc14o $0x254722D4
-
-
-. 0 25472310 8
-. 2D 80 00 3D 40 8E FF C0
-
-==== BB 158 (0x25472318) approx BBs exec'd 0 ====
-
- 0x25472318: 380BFFFC addi r0,r11,-4
- 0: GETL R11, t0
- 1: ADDL $0xFFFFFFFC, t0
- 2: PUTL t0, R0
- 3: INCEIPL $4
-
- 0x2547231C: 2A000010 cmpli cr4,r0,16
- 4: GETL R0, t2
- 5: MOVL $0x10, t6
- 6: CMPUL t2, t6, t4 (-rSo)
- 7: ICRFL t4, $0x4, CR
- 8: INCEIPL $4
-
- 0x25472320: 41B1FFB4 bc 13,17,0x254722D4
- 9: Js17o $0x254722D4
-
-
-. 0 25472318 12
-. 38 0B FF FC 2A 00 00 10 41 B1 FF B4
-
-==== BB 159 (0x25472324) approx BBs exec'd 0 ====
-
- 0x25472324: 80BE0080 lwz r5,128(r30)
- 0: GETL R30, t0
- 1: ADDL $0x80, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25472328: 541A103A rlwinm r26,r0,2,0,29
- 5: GETL R0, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R26
- 8: INCEIPL $4
-
- 0x2547232C: 7C9A282E lwzx r4,r26,r5
- 9: GETL R5, t6
- 10: GETL R26, t8
- 11: ADDL t8, t6
- 12: LDL (t6), t10
- 13: PUTL t10, R4
- 14: INCEIPL $4
-
- 0x25472330: 7C642A14 add r3,r4,r5
- 15: GETL R4, t12
- 16: GETL R5, t14
- 17: ADDL t12, t14
- 18: PUTL t14, R3
- 19: INCEIPL $4
-
- 0x25472334: 7C6903A6 mtctr r3
- 20: GETL R3, t16
- 21: PUTL t16, CTR
- 22: INCEIPL $4
-
- 0x25472338: 4E800420 bctr
- 23: GETL CTR, t18
- 24: JMPo t18 ($4)
-
-
-. 0 25472324 24
-. 80 BE 00 80 54 1A 10 3A 7C 9A 28 2E 7C 64 2A 14 7C 69 03 A6 4E 80 04 20
-
-==== BB 160 (0x25473248) approx BBs exec'd 0 ====
-
- 0x25473248: 809E00C4 lwz r4,196(r30)
- 0: GETL R30, t0
- 1: ADDL $0xC4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547324C: 7FA3EB78 or r3,r29,r29
- 5: GETL R29, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25473250: 38A0000C li r5,12
- 8: MOVL $0xC, t6
- 9: PUTL t6, R5
- 10: INCEIPL $4
-
- 0x25473254: 48010045 bl 0x25483298
- 11: MOVL $0x25473258, t8
- 12: PUTL t8, LR
- 13: JMPo-c $0x25483298 ($4)
-
-
-. 0 25473248 16
-. 80 9E 00 C4 7F A3 EB 78 38 A0 00 0C 48 01 00 45
-
-==== BB 161 memcmp(0x25483298) approx BBs exec'd 0 ====
-
- 0x25483298: 2B85000F cmpli cr7,r5,15
- 0: GETL R5, t0
- 1: MOVL $0xF, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0x2548329C: 9421FFE0 stwu r1,-32(r1)
- 5: GETL R1, t6
- 6: GETL R1, t8
- 7: ADDL $0xFFFFFFE0, t8
- 8: PUTL t8, R1
- 9: STL t6, (t8)
- 10: INCEIPL $4
-
- 0x254832A0: 93810010 stw r28,16(r1)
- 11: GETL R28, t10
- 12: GETL R1, t12
- 13: ADDL $0x10, t12
- 14: STL t10, (t12)
- 15: INCEIPL $4
-
- 0x254832A4: 7C6B1B78 or r11,r3,r3
- 16: GETL R3, t14
- 17: PUTL t14, R11
- 18: INCEIPL $4
-
- 0x254832A8: 93A10014 stw r29,20(r1)
- 19: GETL R29, t16
- 20: GETL R1, t18
- 21: ADDL $0x14, t18
- 22: STL t16, (t18)
- 23: INCEIPL $4
-
- 0x254832AC: 93C10018 stw r30,24(r1)
- 24: GETL R30, t20
- 25: GETL R1, t22
- 26: ADDL $0x18, t22
- 27: STL t20, (t22)
- 28: INCEIPL $4
-
- 0x254832B0: 93E1001C stw r31,28(r1)
- 29: GETL R31, t24
- 30: GETL R1, t26
- 31: ADDL $0x1C, t26
- 32: STL t24, (t26)
- 33: INCEIPL $4
-
- 0x254832B4: 409D00BC bc 4,29,0x25483370
- 34: Jc29o $0x25483370
-
-
-. 0 25483298 32
-. 2B 85 00 0F 94 21 FF E0 93 81 00 10 7C 6B 1B 78 93 A1 00 14 93 C1 00 18 93 E1 00 1C 40 9D 00 BC
-
-==== BB 162 (0x25483370) approx BBs exec'd 0 ====
-
- 0x25483370: 2C050000 cmpi cr0,r5,0
- 0: GETL R5, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0x25483374: 41820024 bc 12,2,0x25483398
- 4: Js02o $0x25483398
-
-
-. 0 25483370 8
-. 2C 05 00 00 41 82 00 24
-
-==== BB 163 (0x25483378) approx BBs exec'd 0 ====
-
- 0x25483378: 898B0000 lbz r12,0(r11)
- 0: GETL R11, t0
- 1: LDB (t0), t2
- 2: PUTL t2, R12
- 3: INCEIPL $4
-
- 0x2548337C: 396B0001 addi r11,r11,1
- 4: GETL R11, t4
- 5: ADDL $0x1, t4
- 6: PUTL t4, R11
- 7: INCEIPL $4
-
- 0x25483380: 8BA40000 lbz r29,0(r4)
- 8: GETL R4, t6
- 9: LDB (t6), t8
- 10: PUTL t8, R29
- 11: INCEIPL $4
-
- 0x25483384: 38840001 addi r4,r4,1
- 12: GETL R4, t10
- 13: ADDL $0x1, t10
- 14: PUTL t10, R4
- 15: INCEIPL $4
-
- 0x25483388: 7C7D6051 subf. r3,r29,r12
- 16: GETL R29, t12
- 17: GETL R12, t14
- 18: SUBL t12, t14
- 19: PUTL t14, R3
- 20: CMP0L t14, t16 (-rSo)
- 21: ICRFL t16, $0x0, CR
- 22: INCEIPL $4
-
- 0x2548338C: 40820010 bc 4,2,0x2548339C
- 23: Jc02o $0x2548339C
-
-
-. 0 25483378 24
-. 89 8B 00 00 39 6B 00 01 8B A4 00 00 38 84 00 01 7C 7D 60 51 40 82 00 10
-
-==== BB 164 (0x25483390) approx BBs exec'd 0 ====
-
- 0x25483390: 34A5FFFF addic. r5,r5,-1
- 0: GETL R5, t0
- 1: ADCL $0xFFFFFFFF, t0 (-wCa)
- 2: PUTL t0, R5
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x25483394: 4082FFE4 bc 4,2,0x25483378
- 6: Jc02o $0x25483378
-
-
-. 0 25483390 8
-. 34 A5 FF FF 40 82 FF E4
-
-==== BB 165 (0x25483398) approx BBs exec'd 0 ====
-
- 0x25483398: 38600000 li r3,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2548339C: 83810010 lwz r28,16(r1)
- 3: GETL R1, t2
- 4: ADDL $0x10, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R28
- 7: INCEIPL $4
-
- 0x254833A0: 83A10014 lwz r29,20(r1)
- 8: GETL R1, t6
- 9: ADDL $0x14, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R29
- 12: INCEIPL $4
-
- 0x254833A4: 83C10018 lwz r30,24(r1)
- 13: GETL R1, t10
- 14: ADDL $0x18, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R30
- 17: INCEIPL $4
-
- 0x254833A8: 83E1001C lwz r31,28(r1)
- 18: GETL R1, t14
- 19: ADDL $0x1C, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R31
- 22: INCEIPL $4
-
- 0x254833AC: 38210020 addi r1,r1,32
- 23: GETL R1, t18
- 24: ADDL $0x20, t18
- 25: PUTL t18, R1
- 26: INCEIPL $4
-
- 0x254833B0: 4E800020 blr
- 27: GETL LR, t20
- 28: JMPo-r t20 ($4)
-
-
-. 0 25483398 28
-. 38 60 00 00 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 166 (0x25473258) approx BBs exec'd 0 ====
-
- 0x25473258: 2F830000 cmpi cr7,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x2547325C: 409E0428 bc 4,30,0x25473684
- 4: Jc30o $0x25473684
-
-
-. 0 25473258 8
-. 2F 83 00 00 40 9E 04 28
-
-==== BB 167 (0x25473260) approx BBs exec'd 0 ====
-
- 0x25473260: 813E004C lwz r9,76(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25473264: 381D000D addi r0,r29,13
- 5: GETL R29, t4
- 6: ADDL $0xD, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x25473268: 90090000 stw r0,0(r9)
- 9: GETL R0, t6
- 10: GETL R9, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2547326C: 4BFFF068 b 0x254722D4
- 13: JMPo $0x254722D4 ($4)
-
-
-. 0 25473260 16
-. 81 3E 00 4C 38 1D 00 0D 90 09 00 00 4B FF F0 68
-
-==== BB 168 (0x254722D4) approx BBs exec'd 0 ====
-
- 0x254722D4: 387F0038 addi r3,r31,56
- 0: GETL R31, t0
- 1: ADDL $0x38, t0
- 2: PUTL t0, R3
- 3: INCEIPL $4
-
- 0x254722D8: 4800D951 bl 0x2547FC28
- 4: MOVL $0x254722DC, t2
- 5: PUTL t2, LR
- 6: JMPo-c $0x2547FC28 ($4)
-
-
-. 0 254722D4 8
-. 38 7F 00 38 48 00 D9 51
-
-==== BB 169 (0x25473218) approx BBs exec'd 0 ====
-
- 0x25473218: 809E00C0 lwz r4,192(r30)
- 0: GETL R30, t0
- 1: ADDL $0xC0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547321C: 7FA3EB78 or r3,r29,r29
- 5: GETL R29, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25473220: 38A00007 li r5,7
- 8: MOVL $0x7, t6
- 9: PUTL t6, R5
- 10: INCEIPL $4
-
- 0x25473224: 48010075 bl 0x25483298
- 11: MOVL $0x25473228, t8
- 12: PUTL t8, LR
- 13: JMPo-c $0x25483298 ($4)
-
-
-. 0 25473218 16
-. 80 9E 00 C0 7F A3 EB 78 38 A0 00 07 48 01 00 75
-
-==== BB 170 (0x2548339C) approx BBs exec'd 0 ====
-
- 0x2548339C: 83810010 lwz r28,16(r1)
- 0: GETL R1, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R28
- 4: INCEIPL $4
-
- 0x254833A0: 83A10014 lwz r29,20(r1)
- 5: GETL R1, t4
- 6: ADDL $0x14, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R29
- 9: INCEIPL $4
-
- 0x254833A4: 83C10018 lwz r30,24(r1)
- 10: GETL R1, t8
- 11: ADDL $0x18, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R30
- 14: INCEIPL $4
-
- 0x254833A8: 83E1001C lwz r31,28(r1)
- 15: GETL R1, t12
- 16: ADDL $0x1C, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R31
- 19: INCEIPL $4
-
- 0x254833AC: 38210020 addi r1,r1,32
- 20: GETL R1, t16
- 21: ADDL $0x20, t16
- 22: PUTL t16, R1
- 23: INCEIPL $4
-
- 0x254833B0: 4E800020 blr
- 24: GETL LR, t18
- 25: JMPo-r t18 ($4)
-
-
-. 0 2548339C 24
-. 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 171 (0x25473228) approx BBs exec'd 0 ====
-
- 0x25473228: 2C830000 cmpi cr1,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x2547322C: 4086048C bc 4,6,0x254736B8
- 4: Jc06o $0x254736B8
-
-
-. 0 25473228 8
-. 2C 83 00 00 40 86 04 8C
-
-==== BB 172 (0x254736B8) approx BBs exec'd 0 ====
-
- 0x254736B8: 809E00E0 lwz r4,224(r30)
- 0: GETL R30, t0
- 1: ADDL $0xE0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x254736BC: 7FA3EB78 or r3,r29,r29
- 5: GETL R29, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x254736C0: 38A00007 li r5,7
- 8: MOVL $0x7, t6
- 9: PUTL t6, R5
- 10: INCEIPL $4
-
- 0x254736C4: 4800FBD5 bl 0x25483298
- 11: MOVL $0x254736C8, t8
- 12: PUTL t8, LR
- 13: JMPo-c $0x25483298 ($4)
-
-
-. 0 254736B8 16
-. 80 9E 00 E0 7F A3 EB 78 38 A0 00 07 48 00 FB D5
-
-==== BB 173 (0x254736C8) approx BBs exec'd 0 ====
-
- 0x254736C8: 2C030000 cmpi cr0,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0x254736CC: 40820088 bc 4,2,0x25473754
- 4: Jc02o $0x25473754
-
-
-. 0 254736C8 8
-. 2C 03 00 00 40 82 00 88
-
-==== BB 174 (0x254736D0) approx BBs exec'd 0 ====
-
- 0x254736D0: 38FD0008 addi r7,r29,8
- 0: GETL R29, t0
- 1: ADDL $0x8, t0
- 2: PUTL t0, R7
- 3: INCEIPL $4
-
- 0x254736D4: 90F10000 stw r7,0(r17)
- 4: GETL R7, t2
- 5: GETL R17, t4
- 6: STL t2, (t4)
- 7: INCEIPL $4
-
- 0x254736D8: 4BFFEBFC b 0x254722D4
- 8: JMPo $0x254722D4 ($4)
-
-
-. 0 254736D0 12
-. 38 FD 00 08 90 F1 00 00 4B FF EB FC
-
-==== BB 175 (0x25472344) approx BBs exec'd 0 ====
-
- 0x25472344: 83700000 lwz r27,0(r16)
- 0: GETL R16, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R27
- 3: INCEIPL $4
-
- 0x25472348: 933F0030 stw r25,48(r31)
- 4: GETL R25, t4
- 5: GETL R31, t6
- 6: ADDL $0x30, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0x2547234C: 2D9B0000 cmpi cr3,r27,0
- 9: GETL R27, t8
- 10: CMP0L t8, t10 (-rSo)
- 11: ICRFL t10, $0x3, CR
- 12: INCEIPL $4
-
- 0x25472350: 408E128C bc 4,14,0x254735DC
- 13: Jc14o $0x254735DC
-
-
-. 0 25472344 16
-. 83 70 00 00 93 3F 00 30 2D 9B 00 00 40 8E 12 8C
-
-==== BB 176 (0x25472354) approx BBs exec'd 0 ====
-
- 0x25472354: 813E0034 lwz r9,52(r30)
- 0: GETL R30, t0
- 1: ADDL $0x34, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25472358: 3014FFFF addic r0,r20,-1
- 5: GETL R20, t4
- 6: ADCL $0xFFFFFFFF, t4 (-wCa)
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x2547235C: 7F40A110 subfe r26,r0,r20
- 9: GETL R0, t6
- 10: GETL R20, t8
- 11: SBBL t6, t8 (-rCa-wCa)
- 12: PUTL t8, R26
- 13: INCEIPL $4
-
- 0x25472360: 83A90000 lwz r29,0(r9)
- 14: GETL R9, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R29
- 17: INCEIPL $4
-
- 0x25472364: 313DFFFF addic r9,r29,-1
- 18: GETL R29, t14
- 19: ADCL $0xFFFFFFFF, t14 (-wCa)
- 20: PUTL t14, R9
- 21: INCEIPL $4
-
- 0x25472368: 7F89E910 subfe r28,r9,r29
- 22: GETL R9, t16
- 23: GETL R29, t18
- 24: SBBL t16, t18 (-rCa-wCa)
- 25: PUTL t18, R28
- 26: INCEIPL $4
-
- 0x2547236C: 7F80D039 and. r0,r28,r26
- 27: GETL R28, t20
- 28: GETL R26, t22
- 29: ANDL t20, t22
- 30: PUTL t22, R0
- 31: CMP0L t22, t24 (-rSo)
- 32: ICRFL t24, $0x0, CR
- 33: INCEIPL $4
-
- 0x25472370: 40820B58 bc 4,2,0x25472EC8
- 34: Jc02o $0x25472EC8
-
-
-. 0 25472354 32
-. 81 3E 00 34 30 14 FF FF 7F 40 A1 10 83 A9 00 00 31 3D FF FF 7F 89 E9 10 7F 80 D0 39 40 82 0B 58
-
-==== BB 177 (0x25472374) approx BBs exec'd 0 ====
-
- 0x25472374: 83560000 lwz r26,0(r22)
- 0: GETL R22, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R26
- 3: INCEIPL $4
-
- 0x25472378: 80BE04E0 lwz r5,1248(r30)
- 4: GETL R30, t4
- 5: ADDL $0x4E0, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R5
- 8: INCEIPL $4
-
- 0x2547237C: 7D9A2800 cmp cr3,r26,r5
- 9: GETL R26, t8
- 10: GETL R5, t10
- 11: CMPL t8, t10, t12 (-rSo)
- 12: ICRFL t12, $0x3, CR
- 13: INCEIPL $4
-
- 0x25472380: 418E0940 bc 12,14,0x25472CC0
- 14: Js14o $0x25472CC0
-
-
-. 0 25472374 16
-. 83 56 00 00 80 BE 04 E0 7D 9A 28 00 41 8E 09 40
-
-==== BB 178 (0x25472384) approx BBs exec'd 0 ====
-
- 0x25472384: 807E0084 lwz r3,132(r30)
- 0: GETL R30, t0
- 1: ADDL $0x84, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25472388: 38A00000 li r5,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x2547238C: 38C00000 li r6,0
- 8: MOVL $0x0, t6
- 9: PUTL t6, R6
- 10: INCEIPL $4
-
- 0x25472390: 38E00000 li r7,0
- 11: MOVL $0x0, t8
- 12: PUTL t8, R7
- 13: INCEIPL $4
-
- 0x25472394: 7C641B78 or r4,r3,r3
- 14: GETL R3, t10
- 15: PUTL t10, R4
- 16: INCEIPL $4
-
- 0x25472398: 39000000 li r8,0
- 17: MOVL $0x0, t12
- 18: PUTL t12, R8
- 19: INCEIPL $4
-
- 0x2547239C: 48006D59 bl 0x254790F4
- 20: MOVL $0x254723A0, t14
- 21: PUTL t14, LR
- 22: JMPo-c $0x254790F4 ($4)
-
-
-. 0 25472384 28
-. 80 7E 00 84 38 A0 00 00 38 C0 00 00 38 E0 00 00 7C 64 1B 78 39 00 00 00 48 00 6D 59
-
-==== BB 179 _dl_new_object(0x254790F4) approx BBs exec'd 0 ====
-
- 0x254790F4: 9421FFD0 stwu r1,-48(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFD0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x254790F8: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x254790FC: 4801DF05 bl 0x25497000
- 9: MOVL $0x25479100, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 254790F4 12
-. 94 21 FF D0 7C 08 02 A6 48 01 DF 05
-
-==== BB 180 (0x25479100) approx BBs exec'd 0 ====
-
- 0x25479100: 93C10028 stw r30,40(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x28, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25479104: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x25479108: 92C10008 stw r22,8(r1)
- 8: GETL R22, t6
- 9: GETL R1, t8
- 10: ADDL $0x8, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2547910C: 92E1000C stw r23,12(r1)
- 13: GETL R23, t10
- 14: GETL R1, t12
- 15: ADDL $0xC, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x25479110: 7C771B78 or r23,r3,r3
- 18: GETL R3, t14
- 19: PUTL t14, R23
- 20: INCEIPL $4
-
- 0x25479114: 93010010 stw r24,16(r1)
- 21: GETL R24, t16
- 22: GETL R1, t18
- 23: ADDL $0x10, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x25479118: 7C832378 or r3,r4,r4
- 26: GETL R4, t20
- 27: PUTL t20, R3
- 28: INCEIPL $4
-
- 0x2547911C: 93210014 stw r25,20(r1)
- 29: GETL R25, t22
- 30: GETL R1, t24
- 31: ADDL $0x14, t24
- 32: STL t22, (t24)
- 33: INCEIPL $4
-
- 0x25479120: 7CB82B78 or r24,r5,r5
- 34: GETL R5, t26
- 35: PUTL t26, R24
- 36: INCEIPL $4
-
- 0x25479124: 93410018 stw r26,24(r1)
- 37: GETL R26, t28
- 38: GETL R1, t30
- 39: ADDL $0x18, t30
- 40: STL t28, (t30)
- 41: INCEIPL $4
-
- 0x25479128: 7CF63B78 or r22,r7,r7
- 42: GETL R7, t32
- 43: PUTL t32, R22
- 44: INCEIPL $4
-
- 0x2547912C: 9361001C stw r27,28(r1)
- 45: GETL R27, t34
- 46: GETL R1, t36
- 47: ADDL $0x1C, t36
- 48: STL t34, (t36)
- 49: INCEIPL $4
-
- 0x25479130: 7C9A2378 or r26,r4,r4
- 50: GETL R4, t38
- 51: PUTL t38, R26
- 52: INCEIPL $4
-
- 0x25479134: 93810020 stw r28,32(r1)
- 53: GETL R28, t40
- 54: GETL R1, t42
- 55: ADDL $0x20, t42
- 56: STL t40, (t42)
- 57: INCEIPL $4
-
- 0x25479138: 7D194378 or r25,r8,r8
- 58: GETL R8, t44
- 59: PUTL t44, R25
- 60: INCEIPL $4
-
- 0x2547913C: 93E1002C stw r31,44(r1)
- 61: GETL R31, t46
- 62: GETL R1, t48
- 63: ADDL $0x2C, t48
- 64: STL t46, (t48)
- 65: INCEIPL $4
-
- 0x25479140: 7CDC3378 or r28,r6,r6
- 66: GETL R6, t50
- 67: PUTL t50, R28
- 68: INCEIPL $4
-
- 0x25479144: 90010034 stw r0,52(r1)
- 69: GETL R0, t52
- 70: GETL R1, t54
- 71: ADDL $0x34, t54
- 72: STL t52, (t54)
- 73: INCEIPL $4
-
- 0x25479148: 93A10024 stw r29,36(r1)
- 74: GETL R29, t56
- 75: GETL R1, t58
- 76: ADDL $0x24, t58
- 77: STL t56, (t58)
- 78: INCEIPL $4
-
- 0x2547914C: 48009E85 bl 0x25482FD0
- 79: MOVL $0x25479150, t60
- 80: PUTL t60, LR
- 81: JMPo-c $0x25482FD0 ($4)
-
-
-. 0 25479100 80
-. 93 C1 00 28 7F C8 02 A6 92 C1 00 08 92 E1 00 0C 7C 77 1B 78 93 01 00 10 7C 83 23 78 93 21 00 14 7C B8 2B 78 93 41 00 18 7C F6 3B 78 93 61 00 1C 7C 9A 23 78 93 81 00 20 7D 19 43 78 93 E1 00 2C 7C DC 33 78 90 01 00 34 93 A1 00 24 48 00 9E 85
-
-==== BB 181 strlen(0x25482FD0) approx BBs exec'd 0 ====
-
- 0x25482FD0: 5464003A rlwinm r4,r3,0,0,29
- 0: GETL R3, t0
- 1: ANDL $0xFFFFFFFC, t0
- 2: PUTL t0, R4
- 3: INCEIPL $4
-
- 0x25482FD4: 3CE07F7F lis r7,32639
- 4: MOVL $0x7F7F0000, t2
- 5: PUTL t2, R7
- 6: INCEIPL $4
-
- 0x25482FD8: 54651EF8 rlwinm r5,r3,3,27,28
- 7: GETL R3, t4
- 8: ROLL $0x3, t4
- 9: ANDL $0x18, t4
- 10: PUTL t4, R5
- 11: INCEIPL $4
-
- 0x25482FDC: 81040000 lwz r8,0(r4)
- 12: GETL R4, t6
- 13: LDL (t6), t8
- 14: PUTL t8, R8
- 15: INCEIPL $4
-
- 0x25482FE0: 3920FFFF li r9,-1
- 16: MOVL $0xFFFFFFFF, t10
- 17: PUTL t10, R9
- 18: INCEIPL $4
-
- 0x25482FE4: 38E77F7F addi r7,r7,32639
- 19: MOVL $0x7F7F7F7F, t12
- 20: PUTL t12, R7
- 21: INCEIPL $4
-
- 0x25482FE8: 7D292C30 srw r9,r9,r5
- 22: GETL R9, t16
- 23: GETL R5, t14
- 24: SHRL t14, t16
- 25: PUTL t16, R9
- 26: INCEIPL $4
-
- 0x25482FEC: 7CE04038 and r0,r7,r8
- 27: GETL R7, t18
- 28: GETL R8, t20
- 29: ANDL t18, t20
- 30: PUTL t20, R0
- 31: INCEIPL $4
-
- 0x25482FF0: 7CEA4378 or r10,r7,r8
- 32: GETL R7, t22
- 33: GETL R8, t24
- 34: ORL t24, t22
- 35: PUTL t22, R10
- 36: INCEIPL $4
-
- 0x25482FF4: 7C003A14 add r0,r0,r7
- 37: GETL R0, t26
- 38: GETL R7, t28
- 39: ADDL t26, t28
- 40: PUTL t28, R0
- 41: INCEIPL $4
-
- 0x25482FF8: 7D4000F8 nor r0,r10,r0
- 42: GETL R10, t30
- 43: GETL R0, t32
- 44: ORL t32, t30
- 45: NOTL t30
- 46: PUTL t30, R0
- 47: INCEIPL $4
-
- 0x25482FFC: 7C084839 and. r8,r0,r9
- 48: GETL R0, t34
- 49: GETL R9, t36
- 50: ANDL t34, t36
- 51: PUTL t36, R8
- 52: CMP0L t36, t38 (-rSo)
- 53: ICRFL t38, $0x0, CR
- 54: INCEIPL $4
-
- 0x25483000: 7C601120 mtcrf 0x1,r3
- 55: GETL R3, t40
- 56: ICRFL t40, $0x7, CR
- 57: INCEIPL $4
-
- 0x25483004: 40820070 bc 4,2,0x25483074
- 58: Jc02o $0x25483074
-
-
-. 0 25482FD0 56
-. 54 64 00 3A 3C E0 7F 7F 54 65 1E F8 81 04 00 00 39 20 FF FF 38 E7 7F 7F 7D 29 2C 30 7C E0 40 38 7C EA 43 78 7C 00 3A 14 7D 40 00 F8 7C 08 48 39 7C 60 11 20 40 82 00 70
-
-==== BB 182 (0x25483074) approx BBs exec'd 0 ====
-
- 0x25483074: 7D0B0034 cntlzw r11,r8
- 0: GETL R8, t0
- 1: CNTLZL t0
- 2: PUTL t0, R11
- 3: INCEIPL $4
-
- 0x25483078: 7C032050 subf r0,r3,r4
- 4: GETL R3, t2
- 5: GETL R4, t4
- 6: SUBL t2, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x2548307C: 556BE8FE rlwinm r11,r11,29,3,31
- 9: GETL R11, t6
- 10: SHRL $0x3, t6
- 11: PUTL t6, R11
- 12: INCEIPL $4
-
- 0x25483080: 7C605A14 add r3,r0,r11
- 13: GETL R0, t8
- 14: GETL R11, t10
- 15: ADDL t8, t10
- 16: PUTL t10, R3
- 17: INCEIPL $4
-
- 0x25483084: 4E800020 blr
- 18: GETL LR, t12
- 19: JMPo-r t12 ($4)
-
-
-. 0 25483074 20
-. 7D 0B 00 34 7C 03 20 50 55 6B E8 FE 7C 60 5A 14 4E 80 00 20
-
-==== BB 183 (0x25479150) approx BBs exec'd 0 ====
-
- 0x25479150: 38800001 li r4,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x25479154: 7C691B78 or r9,r3,r3
- 3: GETL R3, t2
- 4: PUTL t2, R9
- 5: INCEIPL $4
-
- 0x25479158: 3863024D addi r3,r3,589
- 6: GETL R3, t4
- 7: ADDL $0x24D, t4
- 8: PUTL t4, R3
- 9: INCEIPL $4
-
- 0x2547915C: 3B690001 addi r27,r9,1
- 10: GETL R9, t6
- 11: ADDL $0x1, t6
- 12: PUTL t6, R27
- 13: INCEIPL $4
-
- 0x25479160: 4801E8CD bl 0x25497A2C
- 14: MOVL $0x25479164, t8
- 15: PUTL t8, LR
- 16: JMPo-c $0x25497A2C ($4)
-
-
-. 0 25479150 20
-. 38 80 00 01 7C 69 1B 78 38 63 02 4D 3B 69 00 01 48 01 E8 CD
-
-==== BB 184 (0x25497A2C) approx BBs exec'd 0 ====
-
- 0x25497A2C: 4BFE848C b 0x2547FEB8
- 0: JMPo $0x2547FEB8 ($4)
-
-
-. 0 25497A2C 4
-. 4B FE 84 8C
-
-==== BB 185 calloc(0x2547FEB8) approx BBs exec'd 0 ====
-
- 0x2547FEB8: 7C6321D6 mullw r3,r3,r4
- 0: GETL R3, t0
- 1: GETL R4, t2
- 2: MULL t0, t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x2547FEBC: 7CA802A6 mflr r5
- 5: GETL LR, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x2547FEC0: 9421FFF0 stwu r1,-16(r1)
- 8: GETL R1, t6
- 9: GETL R1, t8
- 10: ADDL $0xFFFFFFF0, t8
- 11: PUTL t8, R1
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547FEC4: 90A10014 stw r5,20(r1)
- 14: GETL R5, t10
- 15: GETL R1, t12
- 16: ADDL $0x14, t12
- 17: STL t10, (t12)
- 18: INCEIPL $4
-
- 0x2547FEC8: 48017B5D bl 0x25497A24
- 19: MOVL $0x2547FECC, t14
- 20: PUTL t14, LR
- 21: JMPo-c $0x25497A24 ($4)
-
-
-. 0 2547FEB8 20
-. 7C 63 21 D6 7C A8 02 A6 94 21 FF F0 90 A1 00 14 48 01 7B 5D
-
-==== BB 186 (0x25497A24) approx BBs exec'd 0 ====
-
- 0x25497A24: 4BFE846C b 0x2547FE90
- 0: JMPo $0x2547FE90 ($4)
-
-
-. 0 25497A24 4
-. 4B FE 84 6C
-
-==== BB 187 malloc(0x2547FE90) approx BBs exec'd 0 ====
-
- 0x2547FE90: 7C8802A6 mflr r4
- 0: GETL LR, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x2547FE94: 9421FFF0 stwu r1,-16(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFFF0, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0x2547FE98: 90810014 stw r4,20(r1)
- 9: GETL R4, t6
- 10: GETL R1, t8
- 11: ADDL $0x14, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547FE9C: 7C641B78 or r4,r3,r3
- 14: GETL R3, t10
- 15: PUTL t10, R4
- 16: INCEIPL $4
-
- 0x2547FEA0: 38600008 li r3,8
- 17: MOVL $0x8, t12
- 18: PUTL t12, R3
- 19: INCEIPL $4
-
- 0x2547FEA4: 48017B79 bl 0x25497A1C
- 20: MOVL $0x2547FEA8, t14
- 21: PUTL t14, LR
- 22: JMPo-c $0x25497A1C ($4)
-
-
-. 0 2547FE90 24
-. 7C 88 02 A6 94 21 FF F0 90 81 00 14 7C 64 1B 78 38 60 00 08 48 01 7B 79
-
-==== BB 188 (0x25497A1C) approx BBs exec'd 0 ====
-
- 0x25497A1C: 4BFE832C b 0x2547FD48
- 0: JMPo $0x2547FD48 ($4)
-
-
-. 0 25497A1C 4
-. 4B FE 83 2C
-
-==== BB 189 __libc_memalign(0x2547FD48) approx BBs exec'd 0 ====
-
- 0x2547FD48: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547FD4C: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x2547FD50: 480172B1 bl 0x25497000
- 9: MOVL $0x2547FD54, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547FD48 12
-. 94 21 FF E0 7C 08 02 A6 48 01 72 B1
-
-==== BB 190 (0x2547FD54) approx BBs exec'd 0 ====
-
- 0x2547FD54: 93C10018 stw r30,24(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x18, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547FD58: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x2547FD5C: 9361000C stw r27,12(r1)
- 8: GETL R27, t6
- 9: GETL R1, t8
- 10: ADDL $0xC, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2547FD60: 90010024 stw r0,36(r1)
- 13: GETL R0, t10
- 14: GETL R1, t12
- 15: ADDL $0x24, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x2547FD64: 7C6A1B78 or r10,r3,r3
- 18: GETL R3, t14
- 19: PUTL t14, R10
- 20: INCEIPL $4
-
- 0x2547FD68: 93810010 stw r28,16(r1)
- 21: GETL R28, t16
- 22: GETL R1, t18
- 23: ADDL $0x10, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x2547FD6C: 38A00003 li r5,3
- 26: MOVL $0x3, t20
- 27: PUTL t20, R5
- 28: INCEIPL $4
-
- 0x2547FD70: 837E0418 lwz r27,1048(r30)
- 29: GETL R30, t22
- 30: ADDL $0x418, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R27
- 33: INCEIPL $4
-
- 0x2547FD74: 38C00022 li r6,34
- 34: MOVL $0x22, t26
- 35: PUTL t26, R6
- 36: INCEIPL $4
-
- 0x2547FD78: 93A10014 stw r29,20(r1)
- 37: GETL R29, t28
- 38: GETL R1, t30
- 39: ADDL $0x14, t30
- 40: STL t28, (t30)
- 41: INCEIPL $4
-
- 0x2547FD7C: 38E0FFFF li r7,-1
- 42: MOVL $0xFFFFFFFF, t32
- 43: PUTL t32, R7
- 44: INCEIPL $4
-
- 0x2547FD80: 817B0000 lwz r11,0(r27)
- 45: GETL R27, t34
- 46: LDL (t34), t36
- 47: PUTL t36, R11
- 48: INCEIPL $4
-
- 0x2547FD84: 7FA300D0 neg r29,r3
- 49: GETL R3, t38
- 50: NEGL t38
- 51: PUTL t38, R29
- 52: INCEIPL $4
-
- 0x2547FD88: 93E1001C stw r31,28(r1)
- 53: GETL R31, t40
- 54: GETL R1, t42
- 55: ADDL $0x1C, t42
- 56: STL t40, (t42)
- 57: INCEIPL $4
-
- 0x2547FD8C: 39000000 li r8,0
- 58: MOVL $0x0, t44
- 59: PUTL t44, R8
- 60: INCEIPL $4
-
- 0x2547FD90: 2F8B0000 cmpi cr7,r11,0
- 61: GETL R11, t46
- 62: CMP0L t46, t48 (-rSo)
- 63: ICRFL t48, $0x7, CR
- 64: INCEIPL $4
-
- 0x2547FD94: 819E0500 lwz r12,1280(r30)
- 65: GETL R30, t50
- 66: ADDL $0x500, t50
- 67: LDL (t50), t52
- 68: PUTL t52, R12
- 69: INCEIPL $4
-
- 0x2547FD98: 38600000 li r3,0
- 70: MOVL $0x0, t54
- 71: PUTL t54, R3
- 72: INCEIPL $4
-
- 0x2547FD9C: 7C9C2378 or r28,r4,r4
- 73: GETL R4, t56
- 74: PUTL t56, R28
- 75: INCEIPL $4
-
- 0x2547FDA0: 83FE041C lwz r31,1052(r30)
- 76: GETL R30, t58
- 77: ADDL $0x41C, t58
- 78: LDL (t58), t60
- 79: PUTL t60, R31
- 80: INCEIPL $4
-
- 0x2547FDA4: 409E0024 bc 4,30,0x2547FDC8
- 81: Jc30o $0x2547FDC8
-
-
-. 0 2547FD54 84
-. 93 C1 00 18 7F C8 02 A6 93 61 00 0C 90 01 00 24 7C 6A 1B 78 93 81 00 10 38 A0 00 03 83 7E 04 18 38 C0 00 22 93 A1 00 14 38 E0 FF FF 81 7B 00 00 7F A3 00 D0 93 E1 00 1C 39 00 00 00 2F 8B 00 00 81 9E 05 00 38 60 00 00 7C 9C 23 78 83 FE 04 1C 40 9E 00 24
-
-==== BB 191 (0x2547FDA8) approx BBs exec'd 0 ====
-
- 0x2547FDA8: 813E04F4 lwz r9,1268(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4F4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547FDAC: 919F0000 stw r12,0(r31)
- 5: GETL R12, t4
- 6: GETL R31, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0x2547FDB0: 81690004 lwz r11,4(r9)
- 9: GETL R9, t8
- 10: ADDL $0x4, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R11
- 13: INCEIPL $4
-
- 0x2547FDB4: 7C8B6214 add r4,r11,r12
- 14: GETL R11, t12
- 15: GETL R12, t14
- 16: ADDL t12, t14
- 17: PUTL t14, R4
- 18: INCEIPL $4
-
- 0x2547FDB8: 3924FFFF addi r9,r4,-1
- 19: GETL R4, t16
- 20: ADDL $0xFFFFFFFF, t16
- 21: PUTL t16, R9
- 22: INCEIPL $4
-
- 0x2547FDBC: 7C8B00D0 neg r4,r11
- 23: GETL R11, t18
- 24: NEGL t18
- 25: PUTL t18, R4
- 26: INCEIPL $4
-
- 0x2547FDC0: 7D2B2038 and r11,r9,r4
- 27: GETL R9, t20
- 28: GETL R4, t22
- 29: ANDL t20, t22
- 30: PUTL t22, R11
- 31: INCEIPL $4
-
- 0x2547FDC4: 917B0000 stw r11,0(r27)
- 32: GETL R11, t24
- 33: GETL R27, t26
- 34: STL t24, (t26)
- 35: INCEIPL $4
-
- 0x2547FDC8: 813F0000 lwz r9,0(r31)
- 36: GETL R31, t28
- 37: LDL (t28), t30
- 38: PUTL t30, R9
- 39: INCEIPL $4
-
- 0x2547FDCC: 7C895214 add r4,r9,r10
- 40: GETL R9, t32
- 41: GETL R10, t34
- 42: ADDL t32, t34
- 43: PUTL t34, R4
- 44: INCEIPL $4
-
- 0x2547FDD0: 3804FFFF addi r0,r4,-1
- 45: GETL R4, t36
- 46: ADDL $0xFFFFFFFF, t36
- 47: PUTL t36, R0
- 48: INCEIPL $4
-
- 0x2547FDD4: 7C0AE838 and r10,r0,r29
- 49: GETL R0, t38
- 50: GETL R29, t40
- 51: ANDL t38, t40
- 52: PUTL t40, R10
- 53: INCEIPL $4
-
- 0x2547FDD8: 7D8AE214 add r12,r10,r28
- 54: GETL R10, t42
- 55: GETL R28, t44
- 56: ADDL t42, t44
- 57: PUTL t44, R12
- 58: INCEIPL $4
-
- 0x2547FDDC: 915F0000 stw r10,0(r31)
- 59: GETL R10, t46
- 60: GETL R31, t48
- 61: STL t46, (t48)
- 62: INCEIPL $4
-
- 0x2547FDE0: 7C0C5840 cmpl cr0,r12,r11
- 63: GETL R12, t50
- 64: GETL R11, t52
- 65: CMPUL t50, t52, t54 (-rSo)
- 66: ICRFL t54, $0x0, CR
- 67: INCEIPL $4
-
- 0x2547FDE4: 4080003C bc 4,0,0x2547FE20
- 68: Jc00o $0x2547FE20
-
-
-. 0 2547FDA8 64
-. 81 3E 04 F4 91 9F 00 00 81 69 00 04 7C 8B 62 14 39 24 FF FF 7C 8B 00 D0 7D 2B 20 38 91 7B 00 00 81 3F 00 00 7C 89 52 14 38 04 FF FF 7C 0A E8 38 7D 8A E2 14 91 5F 00 00 7C 0C 58 40 40 80 00 3C
-
-==== BB 192 (0x2547FDE8) approx BBs exec'd 0 ====
-
- 0x2547FDE8: 807F0000 lwz r3,0(r31)
- 0: GETL R31, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R3
- 3: INCEIPL $4
-
- 0x2547FDEC: 80C10024 lwz r6,36(r1)
- 4: GETL R1, t4
- 5: ADDL $0x24, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R6
- 8: INCEIPL $4
-
- 0x2547FDF0: 7D03E214 add r8,r3,r28
- 9: GETL R3, t8
- 10: GETL R28, t10
- 11: ADDL t8, t10
- 12: PUTL t10, R8
- 13: INCEIPL $4
-
- 0x2547FDF4: 80FE0420 lwz r7,1056(r30)
- 14: GETL R30, t12
- 15: ADDL $0x420, t12
- 16: LDL (t12), t14
- 17: PUTL t14, R7
- 18: INCEIPL $4
-
- 0x2547FDF8: 911F0000 stw r8,0(r31)
- 19: GETL R8, t16
- 20: GETL R31, t18
- 21: STL t16, (t18)
- 22: INCEIPL $4
-
- 0x2547FDFC: 7CC803A6 mtlr r6
- 23: GETL R6, t20
- 24: PUTL t20, LR
- 25: INCEIPL $4
-
- 0x2547FE00: 8361000C lwz r27,12(r1)
- 26: GETL R1, t22
- 27: ADDL $0xC, t22
- 28: LDL (t22), t24
- 29: PUTL t24, R27
- 30: INCEIPL $4
-
- 0x2547FE04: 83810010 lwz r28,16(r1)
- 31: GETL R1, t26
- 32: ADDL $0x10, t26
- 33: LDL (t26), t28
- 34: PUTL t28, R28
- 35: INCEIPL $4
-
- 0x2547FE08: 83A10014 lwz r29,20(r1)
- 36: GETL R1, t30
- 37: ADDL $0x14, t30
- 38: LDL (t30), t32
- 39: PUTL t32, R29
- 40: INCEIPL $4
-
- 0x2547FE0C: 83C10018 lwz r30,24(r1)
- 41: GETL R1, t34
- 42: ADDL $0x18, t34
- 43: LDL (t34), t36
- 44: PUTL t36, R30
- 45: INCEIPL $4
-
- 0x2547FE10: 83E1001C lwz r31,28(r1)
- 46: GETL R1, t38
- 47: ADDL $0x1C, t38
- 48: LDL (t38), t40
- 49: PUTL t40, R31
- 50: INCEIPL $4
-
- 0x2547FE14: 38210020 addi r1,r1,32
- 51: GETL R1, t42
- 52: ADDL $0x20, t42
- 53: PUTL t42, R1
- 54: INCEIPL $4
-
- 0x2547FE18: 90670000 stw r3,0(r7)
- 55: GETL R3, t44
- 56: GETL R7, t46
- 57: STL t44, (t46)
- 58: INCEIPL $4
-
- 0x2547FE1C: 4E800020 blr
- 59: GETL LR, t48
- 60: JMPo-r t48 ($4)
-
-
-. 0 2547FDE8 56
-. 80 7F 00 00 80 C1 00 24 7D 03 E2 14 80 FE 04 20 91 1F 00 00 7C C8 03 A6 83 61 00 0C 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 90 67 00 00 4E 80 00 20
-
-==== BB 193 (0x2547FEA8) approx BBs exec'd 0 ====
-
- 0x2547FEA8: 80010014 lwz r0,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x2547FEAC: 38210010 addi r1,r1,16
- 5: GETL R1, t4
- 6: ADDL $0x10, t4
- 7: PUTL t4, R1
- 8: INCEIPL $4
-
- 0x2547FEB0: 7C0803A6 mtlr r0
- 9: GETL R0, t6
- 10: PUTL t6, LR
- 11: INCEIPL $4
-
- 0x2547FEB4: 4E800020 blr
- 12: GETL LR, t8
- 13: JMPo-r t8 ($4)
-
-
-. 0 2547FEA8 16
-. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-==== BB 194 (0x2547FECC) approx BBs exec'd 0 ====
-
- 0x2547FECC: 80010014 lwz r0,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x2547FED0: 38210010 addi r1,r1,16
- 5: GETL R1, t4
- 6: ADDL $0x10, t4
- 7: PUTL t4, R1
- 8: INCEIPL $4
-
- 0x2547FED4: 7C0803A6 mtlr r0
- 9: GETL R0, t6
- 10: PUTL t6, LR
- 11: INCEIPL $4
-
- 0x2547FED8: 4E800020 blr
- 12: GETL LR, t8
- 13: JMPo-r t8 ($4)
-
-
-. 0 2547FECC 16
-. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-==== BB 195 (0x25479164) approx BBs exec'd 0 ====
-
- 0x25479164: 7C7F1B79 or. r31,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R31
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x25479168: 38600000 li r3,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x2547916C: 41820174 bc 12,2,0x254792E0
- 8: Js02o $0x254792E0
-
-
-. 0 25479164 12
-. 7C 7F 1B 79 38 60 00 00 41 82 01 74
-
-==== BB 196 (0x25479170) approx BBs exec'd 0 ====
-
- 0x25479170: 3BBF0240 addi r29,r31,576
- 0: GETL R31, t0
- 1: ADDL $0x240, t0
- 2: PUTL t0, R29
- 3: INCEIPL $4
-
- 0x25479174: 7F44D378 or r4,r26,r26
- 4: GETL R26, t2
- 5: PUTL t2, R4
- 6: INCEIPL $4
-
- 0x25479178: 7F65DB78 or r5,r27,r27
- 7: GETL R27, t4
- 8: PUTL t4, R5
- 9: INCEIPL $4
-
- 0x2547917C: 93FF0014 stw r31,20(r31)
- 10: GETL R31, t6
- 11: GETL R31, t8
- 12: ADDL $0x14, t8
- 13: STL t6, (t8)
- 14: INCEIPL $4
-
- 0x25479180: 93BF001C stw r29,28(r31)
- 15: GETL R29, t10
- 16: GETL R31, t12
- 17: ADDL $0x1C, t12
- 18: STL t10, (t12)
- 19: INCEIPL $4
-
- 0x25479184: 387F024C addi r3,r31,588
- 20: GETL R31, t14
- 21: ADDL $0x24C, t14
- 22: PUTL t14, R3
- 23: INCEIPL $4
-
- 0x25479188: 4800AA59 bl 0x25483BE0
- 24: MOVL $0x2547918C, t16
- 25: PUTL t16, LR
- 26: JMPo-c $0x25483BE0 ($4)
-
-
-. 0 25479170 28
-. 3B BF 02 40 7F 44 D3 78 7F 65 DB 78 93 FF 00 14 93 BF 00 1C 38 7F 02 4C 48 00 AA 59
-
-==== BB 197 (0x25483C68) approx BBs exec'd 0 ====
-
- 0x25483C68: 2C850000 cmpi cr1,r5,0
- 0: GETL R5, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x25483C6C: 4186001C bc 12,6,0x25483C88
- 4: Js06o $0x25483C88
-
-
-. 0 25483C68 8
-. 2C 85 00 00 41 86 00 1C
-
-==== BB 198 (0x25483C70) approx BBs exec'd 0 ====
-
- 0x25483C70: 7CA903A6 mtctr r5
- 0: GETL R5, t0
- 1: PUTL t0, CTR
- 2: INCEIPL $4
-
- 0x25483C74: 88FD0000 lbz r7,0(r29)
- 3: GETL R29, t2
- 4: LDB (t2), t4
- 5: PUTL t4, R7
- 6: INCEIPL $4
-
- 0x25483C78: 3BBD0001 addi r29,r29,1
- 7: GETL R29, t6
- 8: ADDL $0x1, t6
- 9: PUTL t6, R29
- 10: INCEIPL $4
-
- 0x25483C7C: 98FF0000 stb r7,0(r31)
- 11: GETL R7, t8
- 12: GETL R31, t10
- 13: STB t8, (t10)
- 14: INCEIPL $4
-
- 0x25483C80: 3BFF0001 addi r31,r31,1
- 15: GETL R31, t12
- 16: ADDL $0x1, t12
- 17: PUTL t12, R31
- 18: INCEIPL $4
-
- 0x25483C84: 4200FFF0 bc 16,0,0x25483C74
- 19: GETL CTR, t14
- 20: ADDL $0xFFFFFFFF, t14
- 21: PUTL t14, CTR
- 22: JIFZL t14, $0x25483C88
- 23: JMPo $0x25483C74 ($4)
-
-
-. 0 25483C70 24
-. 7C A9 03 A6 88 FD 00 00 3B BD 00 01 98 FF 00 00 3B FF 00 01 42 00 FF F0
-
-==== BB 199 (0x2547918C) approx BBs exec'd 0 ====
-
- 0x2547918C: 38A00001 li r5,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x25479190: 90BD0008 stw r5,8(r29)
- 3: GETL R5, t2
- 4: GETL R29, t4
- 5: ADDL $0x8, t4
- 6: STL t2, (t4)
- 7: INCEIPL $4
-
- 0x25479194: 1D590018 mulli r10,r25,24
- 8: GETL R25, t6
- 9: MULL $0x18, t6
- 10: PUTL t6, R10
- 11: INCEIPL $4
-
- 0x25479198: 80DF0180 lwz r6,384(r31)
- 12: GETL R31, t8
- 13: ADDL $0x180, t8
- 14: LDL (t8), t10
- 15: PUTL t10, R6
- 16: INCEIPL $4
-
- 0x2547919C: 3880FFFF li r4,-1
- 17: MOVL $0xFFFFFFFF, t12
- 18: PUTL t12, R4
- 19: INCEIPL $4
-
- 0x254791A0: 80BE04C8 lwz r5,1224(r30)
- 20: GETL R30, t14
- 21: ADDL $0x4C8, t14
- 22: LDL (t14), t16
- 23: PUTL t16, R5
- 24: INCEIPL $4
-
- 0x254791A4: 5306F002 rlwimi r6,r24,30,0,1
- 25: GETL R6, t18
- 26: GETL R24, t20
- 27: ROLL $0x1E, t20
- 28: ANDL $0xC0000000, t20
- 29: ANDL $0x3FFFFFFF, t18
- 30: ORL t18, t20
- 31: PUTL t20, R6
- 32: INCEIPL $4
-
- 0x254791A8: 939F0168 stw r28,360(r31)
- 33: GETL R28, t22
- 34: GETL R31, t24
- 35: ADDL $0x168, t24
- 36: STL t22, (t24)
- 37: INCEIPL $4
-
- 0x254791AC: 90DF0180 stw r6,384(r31)
- 38: GETL R6, t26
- 39: GETL R31, t28
- 40: ADDL $0x180, t28
- 41: STL t26, (t28)
- 42: INCEIPL $4
-
- 0x254791B0: 38DF01AC addi r6,r31,428
- 43: GETL R31, t30
- 44: ADDL $0x1AC, t30
- 45: PUTL t30, R6
- 46: INCEIPL $4
-
- 0x254791B4: 7D6A282E lwzx r11,r10,r5
- 47: GETL R5, t32
- 48: GETL R10, t34
- 49: ADDL t34, t32
- 50: LDL (t32), t36
- 51: PUTL t36, R11
- 52: INCEIPL $4
-
- 0x254791B8: 907F0240 stw r3,576(r31)
- 53: GETL R3, t38
- 54: GETL R31, t40
- 55: ADDL $0x240, t40
- 56: STL t38, (t40)
- 57: INCEIPL $4
-
- 0x254791BC: 38600004 li r3,4
- 58: MOVL $0x4, t42
- 59: PUTL t42, R3
- 60: INCEIPL $4
-
- 0x254791C0: 2F8B0000 cmpi cr7,r11,0
- 61: GETL R11, t44
- 62: CMP0L t44, t46 (-rSo)
- 63: ICRFL t46, $0x7, CR
- 64: INCEIPL $4
-
- 0x254791C4: 909F022C stw r4,556(r31)
- 65: GETL R4, t48
- 66: GETL R31, t50
- 67: ADDL $0x22C, t50
- 68: STL t48, (t50)
- 69: INCEIPL $4
-
- 0x254791C8: 907F01BC stw r3,444(r31)
- 70: GETL R3, t52
- 71: GETL R31, t54
- 72: ADDL $0x1BC, t54
- 73: STL t52, (t54)
- 74: INCEIPL $4
-
- 0x254791CC: 38800000 li r4,0
- 75: MOVL $0x0, t56
- 76: PUTL t56, R4
- 77: INCEIPL $4
-
- 0x254791D0: 92FF0004 stw r23,4(r31)
- 78: GETL R23, t58
- 79: GETL R31, t60
- 80: ADDL $0x4, t60
- 81: STL t58, (t60)
- 82: INCEIPL $4
-
- 0x254791D4: 933F0018 stw r25,24(r31)
- 83: GETL R25, t62
- 84: GETL R31, t64
- 85: ADDL $0x18, t64
- 86: STL t62, (t64)
- 87: INCEIPL $4
-
- 0x254791D8: 90DF01C0 stw r6,448(r31)
- 88: GETL R6, t66
- 89: GETL R31, t68
- 90: ADDL $0x1C0, t68
- 91: STL t66, (t68)
- 92: INCEIPL $4
-
- 0x254791DC: 409E013C bc 4,30,0x25479318
- 93: Jc30o $0x25479318
-
-
-. 0 2547918C 84
-. 38 A0 00 01 90 BD 00 08 1D 59 00 18 80 DF 01 80 38 80 FF FF 80 BE 04 C8 53 06 F0 02 93 9F 01 68 90 DF 01 80 38 DF 01 AC 7D 6A 28 2E 90 7F 02 40 38 60 00 04 2F 8B 00 00 90 9F 02 2C 90 7F 01 BC 38 80 00 00 92 FF 00 04 93 3F 00 18 90 DF 01 C0 40 9E 01 3C
-
-==== BB 200 (0x254791E0) approx BBs exec'd 0 ====
-
- 0x254791E0: 7FEA292E stwx r31,r10,r5
- 0: GETL R5, t0
- 1: GETL R10, t2
- 2: ADDL t2, t0
- 3: GETL R31, t4
- 4: STL t4, (t0)
- 5: INCEIPL $4
-
- 0x254791E4: 2F1C0000 cmpi cr6,r28,0
- 6: GETL R28, t6
- 7: CMP0L t6, t8 (-rSo)
- 8: ICRFL t8, $0x6, CR
- 9: INCEIPL $4
-
- 0x254791E8: 7D4A2A14 add r10,r10,r5
- 10: GETL R10, t10
- 11: GETL R5, t12
- 12: ADDL t10, t12
- 13: PUTL t12, R10
- 14: INCEIPL $4
-
- 0x254791EC: 81650198 lwz r11,408(r5)
- 15: GETL R5, t14
- 16: ADDL $0x198, t14
- 17: LDL (t14), t16
- 18: PUTL t16, R11
- 19: INCEIPL $4
-
- 0x254791F0: 832A0004 lwz r25,4(r10)
- 20: GETL R10, t18
- 21: ADDL $0x4, t18
- 22: LDL (t18), t20
- 23: PUTL t20, R25
- 24: INCEIPL $4
-
- 0x254791F4: 8185019C lwz r12,412(r5)
- 25: GETL R5, t22
- 26: ADDL $0x19C, t22
- 27: LDL (t22), t24
- 28: PUTL t24, R12
- 29: INCEIPL $4
-
- 0x254791F8: 3B190001 addi r24,r25,1
- 30: GETL R25, t26
- 31: ADDL $0x1, t26
- 32: PUTL t26, R24
- 33: INCEIPL $4
-
- 0x254791FC: 310C0001 addic r8,r12,1
- 34: GETL R12, t28
- 35: ADCL $0x1, t28 (-wCa)
- 36: PUTL t28, R8
- 37: INCEIPL $4
-
- 0x25479200: 7CEB0194 addze r7,r11
- 38: GETL R11, t30
- 39: ADCL $0x0, t30 (-rCa-wCa)
- 40: PUTL t30, R7
- 41: INCEIPL $4
-
- 0x25479204: 930A0004 stw r24,4(r10)
- 42: GETL R24, t32
- 43: GETL R10, t34
- 44: ADDL $0x4, t34
- 45: STL t32, (t34)
- 46: INCEIPL $4
-
- 0x25479208: 90E50198 stw r7,408(r5)
- 47: GETL R7, t36
- 48: GETL R5, t38
- 49: ADDL $0x198, t38
- 50: STL t36, (t38)
- 51: INCEIPL $4
-
- 0x2547920C: 9105019C stw r8,412(r5)
- 52: GETL R8, t40
- 53: GETL R5, t42
- 54: ADDL $0x19C, t42
- 55: STL t40, (t42)
- 56: INCEIPL $4
-
- 0x25479210: 40BA000C bc 5,26,0x2547921C
- 57: Jc26o $0x2547921C
-
-
-. 0 254791E0 52
-. 7F EA 29 2E 2F 1C 00 00 7D 4A 2A 14 81 65 01 98 83 2A 00 04 81 85 01 9C 3B 19 00 01 31 0C 00 01 7C EB 01 94 93 0A 00 04 90 E5 01 98 91 05 01 9C 40 BA 00 0C
-
-==== BB 201 (0x25479214) approx BBs exec'd 0 ====
-
- 0x25479214: 48000164 b 0x25479378
- 0: JMPo $0x25479378 ($4)
-
-
-. 0 25479214 4
-. 48 00 01 64
-
-==== BB 202 (0x25479378) approx BBs exec'd 0 ====
-
- 0x25479378: 7FFCFB78 or r28,r31,r31
- 0: GETL R31, t0
- 1: PUTL t0, R28
- 2: INCEIPL $4
-
- 0x2547937C: 4BFFFEAC b 0x25479228
- 3: JMPo $0x25479228 ($4)
-
-
-. 0 25479378 8
-. 7F FC FB 78 4B FF FE AC
-
-==== BB 203 (0x25479228) approx BBs exec'd 0 ====
-
- 0x25479228: 2F840000 cmpi cr7,r4,0
- 0: GETL R4, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x2547922C: 393C0158 addi r9,r28,344
- 4: GETL R28, t4
- 5: ADDL $0x158, t4
- 6: PUTL t4, R9
- 7: INCEIPL $4
-
- 0x25479230: 419E0010 bc 12,30,0x25479240
- 8: Js30o $0x25479240
-
-
-. 0 25479228 12
-. 2F 84 00 00 39 3C 01 58 41 9E 00 10
-
-==== BB 204 (0x25479240) approx BBs exec'd 0 ====
-
- 0x25479240: 56CCEFFE rlwinm r12,r22,29,31,31
- 0: GETL R22, t0
- 1: ROLL $0x1D, t0
- 2: ANDL $0x1, t0
- 3: PUTL t0, R12
- 4: INCEIPL $4
-
- 0x25479244: 7D8B2039 and. r11,r12,r4
- 5: GETL R12, t2
- 6: GETL R4, t4
- 7: ANDL t2, t4
- 8: PUTL t4, R11
- 9: CMP0L t4, t6 (-rSo)
- 10: ICRFL t6, $0x0, CR
- 11: INCEIPL $4
-
- 0x25479248: 41820010 bc 12,2,0x25479258
- 12: Js02o $0x25479258
-
-
-. 0 25479240 12
-. 56 CC EF FE 7D 8B 20 39 41 82 00 10
-
-==== BB 205 (0x25479258) approx BBs exec'd 0 ====
-
- 0x25479258: 549A103A rlwinm r26,r4,2,0,29
- 0: GETL R4, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R26
- 3: INCEIPL $4
-
- 0x2547925C: 7D3A312E stwx r9,r26,r6
- 4: GETL R6, t2
- 5: GETL R26, t4
- 6: ADDL t4, t2
- 7: GETL R9, t6
- 8: STL t6, (t2)
- 9: INCEIPL $4
-
- 0x25479260: 3B7F0158 addi r27,r31,344
- 10: GETL R31, t8
- 11: ADDL $0x158, t8
- 12: PUTL t8, R27
- 13: INCEIPL $4
-
- 0x25479264: 937F01C4 stw r27,452(r31)
- 14: GETL R27, t10
- 15: GETL R31, t12
- 16: ADDL $0x1C4, t12
- 17: STL t10, (t12)
- 18: INCEIPL $4
-
- 0x25479268: 8BB70000 lbz r29,0(r23)
- 19: GETL R23, t14
- 20: LDB (t14), t16
- 21: PUTL t16, R29
- 22: INCEIPL $4
-
- 0x2547926C: 2F1D0000 cmpi cr6,r29,0
- 23: GETL R29, t18
- 24: CMP0L t18, t20 (-rSo)
- 25: ICRFL t20, $0x6, CR
- 26: INCEIPL $4
-
- 0x25479270: 419A006C bc 12,26,0x254792DC
- 27: Js26o $0x254792DC
-
-
-. 0 25479258 28
-. 54 9A 10 3A 7D 3A 31 2E 3B 7F 01 58 93 7F 01 C4 8B B7 00 00 2F 1D 00 00 41 9A 00 6C
-
-==== BB 206 (0x254792DC) approx BBs exec'd 0 ====
-
- 0x254792DC: 7FE3FB78 or r3,r31,r31
- 0: GETL R31, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x254792E0: 83810034 lwz r28,52(r1)
- 3: GETL R1, t2
- 4: ADDL $0x34, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R28
- 7: INCEIPL $4
-
- 0x254792E4: 82C10008 lwz r22,8(r1)
- 8: GETL R1, t6
- 9: ADDL $0x8, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R22
- 12: INCEIPL $4
-
- 0x254792E8: 7F8803A6 mtlr r28
- 13: GETL R28, t10
- 14: PUTL t10, LR
- 15: INCEIPL $4
-
- 0x254792EC: 82E1000C lwz r23,12(r1)
- 16: GETL R1, t12
- 17: ADDL $0xC, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R23
- 20: INCEIPL $4
-
- 0x254792F0: 83010010 lwz r24,16(r1)
- 21: GETL R1, t16
- 22: ADDL $0x10, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R24
- 25: INCEIPL $4
-
- 0x254792F4: 83210014 lwz r25,20(r1)
- 26: GETL R1, t20
- 27: ADDL $0x14, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R25
- 30: INCEIPL $4
-
- 0x254792F8: 83410018 lwz r26,24(r1)
- 31: GETL R1, t24
- 32: ADDL $0x18, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R26
- 35: INCEIPL $4
-
- 0x254792FC: 8361001C lwz r27,28(r1)
- 36: GETL R1, t28
- 37: ADDL $0x1C, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R27
- 40: INCEIPL $4
-
- 0x25479300: 83810020 lwz r28,32(r1)
- 41: GETL R1, t32
- 42: ADDL $0x20, t32
- 43: LDL (t32), t34
- 44: PUTL t34, R28
- 45: INCEIPL $4
-
- 0x25479304: 83A10024 lwz r29,36(r1)
- 46: GETL R1, t36
- 47: ADDL $0x24, t36
- 48: LDL (t36), t38
- 49: PUTL t38, R29
- 50: INCEIPL $4
-
- 0x25479308: 83C10028 lwz r30,40(r1)
- 51: GETL R1, t40
- 52: ADDL $0x28, t40
- 53: LDL (t40), t42
- 54: PUTL t42, R30
- 55: INCEIPL $4
-
- 0x2547930C: 83E1002C lwz r31,44(r1)
- 56: GETL R1, t44
- 57: ADDL $0x2C, t44
- 58: LDL (t44), t46
- 59: PUTL t46, R31
- 60: INCEIPL $4
-
- 0x25479310: 38210030 addi r1,r1,48
- 61: GETL R1, t48
- 62: ADDL $0x30, t48
- 63: PUTL t48, R1
- 64: INCEIPL $4
-
- 0x25479314: 4E800020 blr
- 65: GETL LR, t50
- 66: JMPo-r t50 ($4)
-
-
-. 0 254792DC 60
-. 7F E3 FB 78 83 81 00 34 82 C1 00 08 7F 88 03 A6 82 E1 00 0C 83 01 00 10 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
-
-==== BB 207 (0x254723A0) approx BBs exec'd 0 ====
-
- 0x254723A0: 828E0000 lwz r20,0(r14)
- 0: GETL R14, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R20
- 3: INCEIPL $4
-
- 0x254723A4: 2D940000 cmpi cr3,r20,0
- 4: GETL R20, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x3, CR
- 7: INCEIPL $4
-
- 0x254723A8: 418E0C90 bc 12,14,0x25473038
- 8: Js14o $0x25473038
-
-
-. 0 254723A0 12
-. 82 8E 00 00 2D 94 00 00 41 8E 0C 90
-
-==== BB 208 (0x254723AC) approx BBs exec'd 0 ====
-
- 0x254723AC: 80D60000 lwz r6,0(r22)
- 0: GETL R22, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R6
- 3: INCEIPL $4
-
- 0x254723B0: 9314014C stw r24,332(r20)
- 4: GETL R24, t4
- 5: GETL R20, t6
- 6: ADDL $0x14C, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0x254723B4: 90D40150 stw r6,336(r20)
- 9: GETL R6, t8
- 10: GETL R20, t10
- 11: ADDL $0x150, t10
- 12: STL t8, (t10)
- 13: INCEIPL $4
-
- 0x254723B8: B2F40154 sth r23,340(r20)
- 14: GETL R23, t12
- 15: GETL R20, t14
- 16: ADDL $0x154, t14
- 17: STW t12, (t14)
- 18: INCEIPL $4
-
- 0x254723BC: 56EC2834 rlwinm r12,r23,5,0,26
- 19: GETL R23, t16
- 20: SHLL $0x5, t16
- 21: PUTL t16, R12
- 22: INCEIPL $4
-
- 0x254723C0: 81140178 lwz r8,376(r20)
- 23: GETL R20, t18
- 24: ADDL $0x178, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R8
- 27: INCEIPL $4
-
- 0x254723C4: 7C8CC214 add r4,r12,r24
- 28: GETL R12, t22
- 29: GETL R24, t24
- 30: ADDL t22, t24
- 31: PUTL t24, R4
- 32: INCEIPL $4
-
- 0x254723C8: 80F4017C lwz r7,380(r20)
- 33: GETL R20, t26
- 34: ADDL $0x17C, t26
- 35: LDL (t26), t28
- 36: PUTL t28, R7
- 37: INCEIPL $4
-
- 0x254723CC: 7E04C040 cmpl cr4,r4,r24
- 38: GETL R4, t30
- 39: GETL R24, t32
- 40: CMPUL t30, t32, t34 (-rSo)
- 41: ICRFL t34, $0x4, CR
- 42: INCEIPL $4
-
- 0x254723D0: 39280001 addi r9,r8,1
- 43: GETL R8, t36
- 44: ADDL $0x1, t36
- 45: PUTL t36, R9
- 46: INCEIPL $4
-
- 0x254723D4: 3B270001 addi r25,r7,1
- 47: GETL R7, t38
- 48: ADDL $0x1, t38
- 49: PUTL t38, R25
- 50: INCEIPL $4
-
- 0x254723D8: 39000000 li r8,0
- 51: MOVL $0x0, t40
- 52: PUTL t40, R8
- 53: INCEIPL $4
-
- 0x254723DC: 38E00000 li r7,0
- 54: MOVL $0x0, t42
- 55: PUTL t42, R7
- 56: INCEIPL $4
-
- 0x254723E0: 3B80FFFF li r28,-1
- 57: MOVL $0xFFFFFFFF, t44
- 58: PUTL t44, R28
- 59: INCEIPL $4
-
- 0x254723E4: 7F0AC378 or r10,r24,r24
- 60: GETL R24, t46
- 61: PUTL t46, R10
- 62: INCEIPL $4
-
- 0x254723E8: 939401A0 stw r28,416(r20)
- 63: GETL R28, t48
- 64: GETL R20, t50
- 65: ADDL $0x1A0, t50
- 66: STL t48, (t50)
- 67: INCEIPL $4
-
- 0x254723EC: 91340178 stw r9,376(r20)
- 68: GETL R9, t52
- 69: GETL R20, t54
- 70: ADDL $0x178, t54
- 71: STL t52, (t54)
- 72: INCEIPL $4
-
- 0x254723F0: 9334017C stw r25,380(r20)
- 73: GETL R25, t56
- 74: GETL R20, t58
- 75: ADDL $0x17C, t58
- 76: STL t56, (t58)
- 77: INCEIPL $4
-
- 0x254723F4: 911401A4 stw r8,420(r20)
- 78: GETL R8, t60
- 79: GETL R20, t62
- 80: ADDL $0x1A4, t62
- 81: STL t60, (t62)
- 82: INCEIPL $4
-
- 0x254723F8: 90F401A8 stw r7,424(r20)
- 83: GETL R7, t64
- 84: GETL R20, t66
- 85: ADDL $0x1A8, t66
- 86: STL t64, (t66)
- 87: INCEIPL $4
-
- 0x254723FC: 409100C8 bc 4,17,0x254724C4
- 88: Jc17o $0x254724C4
-
-
-. 0 254723AC 84
-. 80 D6 00 00 93 14 01 4C 90 D4 01 50 B2 F4 01 54 56 EC 28 34 81 14 01 78 7C 8C C2 14 80 F4 01 7C 7E 04 C0 40 39 28 00 01 3B 27 00 01 39 00 00 00 38 E0 00 00 3B 80 FF FF 7F 0A C3 78 93 94 01 A0 91 34 01 78 93 34 01 7C 91 14 01 A4 90 F4 01 A8 40 91 00 C8
-
-==== BB 209 (0x25472400) approx BBs exec'd 0 ====
-
- 0x25472400: 3F606474 lis r27,25716
- 0: MOVL $0x64740000, t0
- 1: PUTL t0, R27
- 2: INCEIPL $4
-
- 0x25472404: 83BE0044 lwz r29,68(r30)
- 3: GETL R30, t2
- 4: ADDL $0x44, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R29
- 7: INCEIPL $4
-
- 0x25472408: 80DE0048 lwz r6,72(r30)
- 8: GETL R30, t6
- 9: ADDL $0x48, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R6
- 12: INCEIPL $4
-
- 0x2547240C: 6363E552 ori r3,r27,0xE552
- 13: MOVL $0x6474E552, t10
- 14: PUTL t10, R3
- 15: INCEIPL $4
-
- 0x25472410: 38A00001 li r5,1
- 16: MOVL $0x1, t12
- 17: PUTL t12, R5
- 18: INCEIPL $4
-
- 0x25472414: 48000028 b 0x2547243C
- 19: JMPo $0x2547243C ($4)
-
-
-. 0 25472400 24
-. 3F 60 64 74 83 BE 00 44 80 DE 00 48 63 63 E5 52 38 A0 00 01 48 00 00 28
-
-==== BB 210 (0x2547243C) approx BBs exec'd 0 ====
-
- 0x2547243C: 800A0000 lwz r0,0(r10)
- 0: GETL R10, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x25472440: 2F000006 cmpi cr6,r0,6
- 4: GETL R0, t4
- 5: MOVL $0x6, t8
- 6: CMPL t4, t8, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x25472444: 419A0798 bc 12,26,0x25472BDC
- 9: Js26o $0x25472BDC
-
-
-. 0 2547243C 12
-. 80 0A 00 00 2F 00 00 06 41 9A 07 98
-
-==== BB 211 (0x25472BDC) approx BBs exec'd 0 ====
-
- 0x25472BDC: 816A0008 lwz r11,8(r10)
- 0: GETL R10, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25472BE0: 7F4BC050 subf r26,r11,r24
- 5: GETL R11, t4
- 6: GETL R24, t6
- 7: SUBL t4, t6
- 8: PUTL t6, R26
- 9: INCEIPL $4
-
- 0x25472BE4: 93540000 stw r26,0(r20)
- 10: GETL R26, t8
- 11: GETL R20, t10
- 12: STL t8, (t10)
- 13: INCEIPL $4
-
- 0x25472BE8: 4BFFF848 b 0x25472430
- 14: JMPo $0x25472430 ($4)
-
-
-. 0 25472BDC 16
-. 81 6A 00 08 7F 4B C0 50 93 54 00 00 4B FF F8 48
-
-==== BB 212 (0x25472430) approx BBs exec'd 0 ====
-
- 0x25472430: 394A0020 addi r10,r10,32
- 0: GETL R10, t0
- 1: ADDL $0x20, t0
- 2: PUTL t0, R10
- 3: INCEIPL $4
-
- 0x25472434: 7F845040 cmpl cr7,r4,r10
- 4: GETL R4, t2
- 5: GETL R10, t4
- 6: CMPUL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x25472438: 409D0084 bc 4,29,0x254724BC
- 9: Jc29o $0x254724BC
-
-
-. 0 25472430 12
-. 39 4A 00 20 7F 84 50 40 40 9D 00 84
-
-==== BB 213 (0x25472448) approx BBs exec'd 0 ====
-
- 0x25472448: 2B800006 cmpli cr7,r0,6
- 0: GETL R0, t0
- 1: MOVL $0x6, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0x2547244C: 40BDFFCC bc 5,29,0x25472418
- 5: Jc29o $0x25472418
-
-
-. 0 25472448 8
-. 2B 80 00 06 40 BD FF CC
-
-==== BB 214 (0x25472418) approx BBs exec'd 0 ====
-
- 0x25472418: 2C000002 cmpi cr0,r0,2
- 0: GETL R0, t0
- 1: MOVL $0x2, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x2547241C: 41820854 bc 12,2,0x25472C70
- 5: Js02o $0x25472C70
-
-
-. 0 25472418 8
-. 2C 00 00 02 41 82 08 54
-
-==== BB 215 (0x25472420) approx BBs exec'd 0 ====
-
- 0x25472420: 28800002 cmpli cr1,r0,2
- 0: GETL R0, t0
- 1: MOVL $0x2, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0x25472424: 418507E4 bc 12,5,0x25472C08
- 5: Js05o $0x25472C08
-
-
-. 0 25472420 8
-. 28 80 00 02 41 85 07 E4
-
-==== BB 216 (0x25472C08) approx BBs exec'd 0 ====
-
- 0x25472C08: 2F000003 cmpi cr6,r0,3
- 0: GETL R0, t0
- 1: MOVL $0x3, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x6, CR
- 4: INCEIPL $4
-
- 0x25472C0C: 409AF824 bc 4,26,0x25472430
- 5: Jc26o $0x25472430
-
-
-. 0 25472C08 8
-. 2F 00 00 03 40 9A F8 24
-
-==== BB 217 (0x25472C10) approx BBs exec'd 0 ====
-
- 0x25472C10: 82AE01C0 lwz r21,448(r14)
- 0: GETL R14, t0
- 1: ADDL $0x1C0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R21
- 4: INCEIPL $4
-
- 0x25472C14: 7FA7EB78 or r7,r29,r29
- 5: GETL R29, t4
- 6: PUTL t4, R7
- 7: INCEIPL $4
-
- 0x25472C18: 81740000 lwz r11,0(r20)
- 8: GETL R20, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R11
- 11: INCEIPL $4
-
- 0x25472C1C: 2F150000 cmpi cr6,r21,0
- 12: GETL R21, t10
- 13: CMP0L t10, t12 (-rSo)
- 14: ICRFL t12, $0x6, CR
- 15: INCEIPL $4
-
- 0x25472C20: 812A0008 lwz r9,8(r10)
- 16: GETL R10, t14
- 17: ADDL $0x8, t14
- 18: LDL (t14), t16
- 19: PUTL t16, R9
- 20: INCEIPL $4
-
- 0x25472C24: 93AE01D4 stw r29,468(r14)
- 21: GETL R29, t18
- 22: GETL R14, t20
- 23: ADDL $0x1D4, t20
- 24: STL t18, (t20)
- 25: INCEIPL $4
-
- 0x25472C28: 7C0B4A14 add r0,r11,r9
- 26: GETL R11, t22
- 27: GETL R9, t24
- 28: ADDL t22, t24
- 29: PUTL t24, R0
- 30: INCEIPL $4
-
- 0x25472C2C: 901D0000 stw r0,0(r29)
- 31: GETL R0, t26
- 32: GETL R29, t28
- 33: STL t26, (t28)
- 34: INCEIPL $4
-
- 0x25472C30: 409A0444 bc 4,26,0x25473074
- 35: Jc26o $0x25473074
-
-
-. 0 25472C10 36
-. 82 AE 01 C0 7F A7 EB 78 81 74 00 00 2F 15 00 00 81 2A 00 08 93 AE 01 D4 7C 0B 4A 14 90 1D 00 00 40 9A 04 44
-
-==== BB 218 (0x25473074) approx BBs exec'd 0 ====
-
- 0x25473074: 3AA00001 li r21,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R21
- 2: INCEIPL $4
-
- 0x25473078: 4BFFF3B8 b 0x25472430
- 3: JMPo $0x25472430 ($4)
-
-
-. 0 25473074 8
-. 3A A0 00 01 4B FF F3 B8
-
-==== BB 219 (0x25472428) approx BBs exec'd 0 ====
-
- 0x25472428: 2E000001 cmpi cr4,r0,1
- 0: GETL R0, t0
- 1: MOVL $0x1, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x4, CR
- 4: INCEIPL $4
-
- 0x2547242C: 41920B80 bc 12,18,0x25472FAC
- 5: Js18o $0x25472FAC
-
-
-. 0 25472428 8
-. 2E 00 00 01 41 92 0B 80
-
-==== BB 220 (0x25472FAC) approx BBs exec'd 0 ====
-
- 0x25472FAC: 80EA001C lwz r7,28(r10)
- 0: GETL R10, t0
- 1: ADDL $0x1C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x25472FB0: 810A0008 lwz r8,8(r10)
- 5: GETL R10, t4
- 6: ADDL $0x8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R8
- 9: INCEIPL $4
-
- 0x25472FB4: 7D8700D0 neg r12,r7
- 10: GETL R7, t8
- 11: NEGL t8
- 12: PUTL t8, R12
- 13: INCEIPL $4
-
- 0x25472FB8: 80F40000 lwz r7,0(r20)
- 14: GETL R20, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R7
- 17: INCEIPL $4
-
- 0x25472FBC: 7D1C6038 and r28,r8,r12
- 18: GETL R8, t14
- 19: GETL R12, t16
- 20: ANDL t14, t16
- 21: PUTL t16, R28
- 22: INCEIPL $4
-
- 0x25472FC0: 813401A0 lwz r9,416(r20)
- 23: GETL R20, t18
- 24: ADDL $0x1A0, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R9
- 27: INCEIPL $4
-
- 0x25472FC4: 7C07E214 add r0,r7,r28
- 28: GETL R7, t22
- 29: GETL R28, t24
- 30: ADDL t22, t24
- 31: PUTL t24, R0
- 32: INCEIPL $4
-
- 0x25472FC8: 7F090040 cmpl cr6,r9,r0
- 33: GETL R9, t26
- 34: GETL R0, t28
- 35: CMPUL t26, t28, t30 (-rSo)
- 36: ICRFL t30, $0x6, CR
- 37: INCEIPL $4
-
- 0x25472FCC: 419900B0 bc 12,25,0x2547307C
- 38: Js25o $0x2547307C
-
-
-. 0 25472FAC 36
-. 80 EA 00 1C 81 0A 00 08 7D 87 00 D0 80 F4 00 00 7D 1C 60 38 81 34 01 A0 7C 07 E2 14 7F 09 00 40 41 99 00 B0
-
-==== BB 221 (0x2547307C) approx BBs exec'd 0 ====
-
- 0x2547307C: 901401A0 stw r0,416(r20)
- 0: GETL R0, t0
- 1: GETL R20, t2
- 2: ADDL $0x1A0, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25473080: 810A0008 lwz r8,8(r10)
- 5: GETL R10, t4
- 6: ADDL $0x8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R8
- 9: INCEIPL $4
-
- 0x25473084: 4BFFFF4C b 0x25472FD0
- 10: JMPo $0x25472FD0 ($4)
-
-
-. 0 2547307C 12
-. 90 14 01 A0 81 0A 00 08 4B FF FF 4C
-
-==== BB 222 (0x25472FD0) approx BBs exec'd 0 ====
-
- 0x25472FD0: 836A0014 lwz r27,20(r10)
- 0: GETL R10, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R27
- 4: INCEIPL $4
-
- 0x25472FD4: 7EE74214 add r23,r7,r8
- 5: GETL R7, t4
- 6: GETL R8, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R23
- 9: INCEIPL $4
-
- 0x25472FD8: 811401A4 lwz r8,420(r20)
- 10: GETL R20, t8
- 11: ADDL $0x1A4, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R8
- 14: INCEIPL $4
-
- 0x25472FDC: 7D77DA14 add r11,r23,r27
- 15: GETL R23, t12
- 16: GETL R27, t14
- 17: ADDL t12, t14
- 18: PUTL t14, R11
- 19: INCEIPL $4
-
- 0x25472FE0: 7F885840 cmpl cr7,r8,r11
- 20: GETL R8, t16
- 21: GETL R11, t18
- 22: CMPUL t16, t18, t20 (-rSo)
- 23: ICRFL t20, $0x7, CR
- 24: INCEIPL $4
-
- 0x25472FE4: 409C0008 bc 4,28,0x25472FEC
- 25: Jc28o $0x25472FEC
-
-
-. 0 25472FD0 24
-. 83 6A 00 14 7E E7 42 14 81 14 01 A4 7D 77 DA 14 7F 88 58 40 40 9C 00 08
-
-==== BB 223 (0x25472FE8) approx BBs exec'd 0 ====
-
- 0x25472FE8: 917401A4 stw r11,420(r20)
- 0: GETL R11, t0
- 1: GETL R20, t2
- 2: ADDL $0x1A4, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25472FEC: 834A0018 lwz r26,24(r10)
- 5: GETL R10, t4
- 6: ADDL $0x18, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R26
- 9: INCEIPL $4
-
- 0x25472FF0: 73490001 andi. r9,r26,0x1
- 10: GETL R26, t8
- 11: ANDL $0x1, t8
- 12: PUTL t8, R9
- 13: CMP0L t8, t10 (-rSo)
- 14: ICRFL t10, $0x0, CR
- 15: INCEIPL $4
-
- 0x25472FF4: 41A2F43C bc 13,2,0x25472430
- 16: Js02o $0x25472430
-
-
-. 0 25472FE8 16
-. 91 74 01 A4 83 4A 00 18 73 49 00 01 41 A2 F4 3C
-
-==== BB 224 (0x25472FF8) approx BBs exec'd 0 ====
-
- 0x25472FF8: 801401A8 lwz r0,424(r20)
- 0: GETL R20, t0
- 1: ADDL $0x1A8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25472FFC: 7C805840 cmpl cr1,r0,r11
- 5: GETL R0, t4
- 6: GETL R11, t6
- 7: CMPUL t4, t6, t8 (-rSo)
- 8: ICRFL t8, $0x1, CR
- 9: INCEIPL $4
-
- 0x25473000: 40A4F430 bc 5,4,0x25472430
- 10: Jc04o $0x25472430
-
-
-. 0 25472FF8 12
-. 80 14 01 A8 7C 80 58 40 40 A4 F4 30
-
-==== BB 225 (0x25473004) approx BBs exec'd 0 ====
-
- 0x25473004: 917401A8 stw r11,424(r20)
- 0: GETL R11, t0
- 1: GETL R20, t2
- 2: ADDL $0x1A8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25473008: 4BFFF428 b 0x25472430
- 5: JMPo $0x25472430 ($4)
-
-
-. 0 25473004 8
-. 91 74 01 A8 4B FF F4 28
-
-==== BB 226 (0x25472C70) approx BBs exec'd 0 ====
-
- 0x25472C70: 82D40000 lwz r22,0(r20)
- 0: GETL R20, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R22
- 3: INCEIPL $4
-
- 0x25472C74: 832A0008 lwz r25,8(r10)
- 4: GETL R10, t4
- 5: ADDL $0x8, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R25
- 8: INCEIPL $4
-
- 0x25472C78: 7C16CA14 add r0,r22,r25
- 9: GETL R22, t8
- 10: GETL R25, t10
- 11: ADDL t8, t10
- 12: PUTL t10, R0
- 13: INCEIPL $4
-
- 0x25472C7C: 90140008 stw r0,8(r20)
- 14: GETL R0, t12
- 15: GETL R20, t14
- 16: ADDL $0x8, t14
- 17: STL t12, (t14)
- 18: INCEIPL $4
-
- 0x25472C80: 4BFFF7B0 b 0x25472430
- 19: JMPo $0x25472430 ($4)
-
-
-. 0 25472C70 20
-. 82 D4 00 00 83 2A 00 08 7C 16 CA 14 90 14 00 08 4B FF F7 B0
-
-==== BB 227 (0x25472450) approx BBs exec'd 0 ====
-
- 0x25472450: 3EE06474 lis r23,25716
- 0: MOVL $0x64740000, t0
- 1: PUTL t0, R23
- 2: INCEIPL $4
-
- 0x25472454: 62E9E551 ori r9,r23,0xE551
- 3: MOVL $0x6474E551, t2
- 4: PUTL t2, R9
- 5: INCEIPL $4
-
- 0x25472458: 7F804800 cmp cr7,r0,r9
- 6: GETL R0, t4
- 7: GETL R9, t6
- 8: CMPL t4, t6, t8 (-rSo)
- 9: ICRFL t8, $0x7, CR
- 10: INCEIPL $4
-
- 0x2547245C: 419E0828 bc 12,30,0x25472C84
- 11: Js30o $0x25472C84
-
-
-. 0 25472450 16
-. 3E E0 64 74 62 E9 E5 51 7F 80 48 00 41 9E 08 28
-
-==== BB 228 (0x25472C84) approx BBs exec'd 0 ====
-
- 0x25472C84: 80EA0018 lwz r7,24(r10)
- 0: GETL R10, t0
- 1: ADDL $0x18, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x25472C88: 90EE0400 stw r7,1024(r14)
- 5: GETL R7, t4
- 6: GETL R14, t6
- 7: ADDL $0x400, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x25472C8C: 4BFFF7A4 b 0x25472430
- 10: JMPo $0x25472430 ($4)
-
-
-. 0 25472C84 12
-. 80 EA 00 18 90 EE 04 00 4B FF F7 A4
-
-==== BB 229 (0x254724BC) approx BBs exec'd 0 ====
-
- 0x254724BC: 811401A4 lwz r8,420(r20)
- 0: GETL R20, t0
- 1: ADDL $0x1A4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x254724C0: 80F401A8 lwz r7,424(r20)
- 5: GETL R20, t4
- 6: ADDL $0x1A8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R7
- 9: INCEIPL $4
-
- 0x254724C4: 81340218 lwz r9,536(r20)
- 10: GETL R20, t8
- 11: ADDL $0x218, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R9
- 14: INCEIPL $4
-
- 0x254724C8: 2C090000 cmpi cr0,r9,0
- 15: GETL R9, t12
- 16: CMP0L t12, t14 (-rSo)
- 17: ICRFL t14, $0x0, CR
- 18: INCEIPL $4
-
- 0x254724CC: 41820010 bc 12,2,0x254724DC
- 19: Js02o $0x254724DC
-
-
-. 0 254724BC 20
-. 81 14 01 A4 80 F4 01 A8 81 34 02 18 2C 09 00 00 41 82 00 10
-
-==== BB 230 (0x254724DC) approx BBs exec'd 0 ====
-
- 0x254724DC: 2C880000 cmpi cr1,r8,0
- 0: GETL R8, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x254724E0: 4086000C bc 4,6,0x254724EC
- 4: Jc06o $0x254724EC
-
-
-. 0 254724DC 8
-. 2C 88 00 00 40 86 00 0C
-
-==== BB 231 (0x254724EC) approx BBs exec'd 0 ====
-
- 0x254724EC: 2E070000 cmpi cr4,r7,0
- 0: GETL R7, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x4, CR
- 3: INCEIPL $4
-
- 0x254724F0: 4092000C bc 4,18,0x254724FC
- 4: Jc18o $0x254724FC
-
-
-. 0 254724EC 8
-. 2E 07 00 00 40 92 00 0C
-
-==== BB 232 (0x254724FC) approx BBs exec'd 0 ====
-
- 0x254724FC: 80AE01D4 lwz r5,468(r14)
- 0: GETL R14, t0
- 1: ADDL $0x1D4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25472500: 2F050000 cmpi cr6,r5,0
- 5: GETL R5, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x25472504: 409A001C bc 4,26,0x25472520
- 9: Jc26o $0x25472520
-
-
-. 0 254724FC 12
-. 80 AE 01 D4 2F 05 00 00 40 9A 00 1C
-
-==== BB 233 (0x25472520) approx BBs exec'd 0 ====
-
- 0x25472520: 2E130000 cmpi cr4,r19,0
- 0: GETL R19, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x4, CR
- 3: INCEIPL $4
-
- 0x25472524: 409201A8 bc 4,18,0x254726CC
- 4: Jc18o $0x254726CC
-
-
-. 0 25472520 8
-. 2E 13 00 00 40 92 01 A8
-
-==== BB 234 (0x25472528) approx BBs exec'd 0 ====
-
- 0x25472528: 81540008 lwz r10,8(r20)
- 0: GETL R20, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x2547252C: 2C0A0000 cmpi cr0,r10,0
- 5: GETL R10, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x25472530: 41820194 bc 12,2,0x254726C4
- 9: Js02o $0x254726C4
-
-
-. 0 25472528 12
-. 81 54 00 08 2C 0A 00 00 41 82 01 94
-
-==== BB 235 (0x25472534) approx BBs exec'd 0 ====
-
- 0x25472534: 816A0000 lwz r11,0(r10)
- 0: GETL R10, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R11
- 3: INCEIPL $4
-
- 0x25472538: 39140020 addi r8,r20,32
- 4: GETL R20, t4
- 5: ADDL $0x20, t4
- 6: PUTL t4, R8
- 7: INCEIPL $4
-
- 0x2547253C: 2C8B0000 cmpi cr1,r11,0
- 8: GETL R11, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x1, CR
- 11: INCEIPL $4
-
- 0x25472540: 41860064 bc 12,6,0x254725A4
- 12: Js06o $0x254725A4
-
-
-. 0 25472534 16
-. 81 6A 00 00 39 14 00 20 2C 8B 00 00 41 86 00 64
-
-==== BB 236 (0x25472544) approx BBs exec'd 0 ====
-
- 0x25472544: 3EC06FFF lis r22,28671
- 0: MOVL $0x6FFF0000, t0
- 1: PUTL t0, R22
- 2: INCEIPL $4
-
- 0x25472548: 3CC07000 lis r6,28672
- 3: MOVL $0x70000000, t2
- 4: PUTL t2, R6
- 5: INCEIPL $4
-
- 0x2547254C: 3C006FFF lis r0,28671
- 6: MOVL $0x6FFF0000, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x25472550: 3F406FFF lis r26,28671
- 9: MOVL $0x6FFF0000, t6
- 10: PUTL t6, R26
- 11: INCEIPL $4
-
- 0x25472554: 3EE06FFF lis r23,28671
- 12: MOVL $0x6FFF0000, t8
- 13: PUTL t8, R23
- 14: INCEIPL $4
-
- 0x25472558: 3E606FFF lis r19,28671
- 15: MOVL $0x6FFF0000, t10
- 16: PUTL t10, R19
- 17: INCEIPL $4
-
- 0x2547255C: 62C7FFFF ori r7,r22,0xFFFF
- 18: MOVL $0x6FFFFFFF, t12
- 19: PUTL t12, R7
- 20: INCEIPL $4
-
- 0x25472560: 60C60021 ori r6,r6,0x21
- 21: MOVL $0x70000021, t14
- 22: PUTL t14, R6
- 23: INCEIPL $4
-
- 0x25472564: 6005FDFF ori r5,r0,0xFDFF
- 24: MOVL $0x6FFFFDFF, t16
- 25: PUTL t16, R5
- 26: INCEIPL $4
-
- 0x25472568: 6344FE34 ori r4,r26,0xFE34
- 27: MOVL $0x6FFFFE34, t18
- 28: PUTL t18, R4
- 29: INCEIPL $4
-
- 0x2547256C: 62E3FEFF ori r3,r23,0xFEFF
- 30: MOVL $0x6FFFFEFF, t20
- 31: PUTL t20, R3
- 32: INCEIPL $4
-
- 0x25472570: 627DFF40 ori r29,r19,0xFF40
- 33: MOVL $0x6FFFFF40, t22
- 34: PUTL t22, R29
- 35: INCEIPL $4
-
- 0x25472574: 2F0B0021 cmpi cr6,r11,33
- 36: GETL R11, t24
- 37: MOVL $0x21, t28
- 38: CMPL t24, t28, t26 (-rSo)
- 39: ICRFL t26, $0x6, CR
- 40: INCEIPL $4
-
- 0x25472578: 5560103A rlwinm r0,r11,2,0,29
- 41: GETL R11, t30
- 42: SHLL $0x2, t30
- 43: PUTL t30, R0
- 44: INCEIPL $4
-
- 0x2547257C: 40990018 bc 4,25,0x25472594
- 45: Jc25o $0x25472594
-
-
-. 0 25472544 60
-. 3E C0 6F FF 3C C0 70 00 3C 00 6F FF 3F 40 6F FF 3E E0 6F FF 3E 60 6F FF 62 C7 FF FF 60 C6 00 21 60 05 FD FF 63 44 FE 34 62 E3 FE FF 62 7D FF 40 2F 0B 00 21 55 60 10 3A 40 99 00 18
-
-==== BB 237 (0x25472594) approx BBs exec'd 0 ====
-
- 0x25472594: 7D48012E stwx r10,r8,r0
- 0: GETL R0, t0
- 1: GETL R8, t2
- 2: ADDL t2, t0
- 3: GETL R10, t4
- 4: STL t4, (t0)
- 5: INCEIPL $4
-
- 0x25472598: 856A0008 lwzu r11,8(r10)
- 6: GETL R10, t6
- 7: ADDL $0x8, t6
- 8: PUTL t6, R10
- 9: LDL (t6), t8
- 10: PUTL t8, R11
- 11: INCEIPL $4
-
- 0x2547259C: 2F8B0000 cmpi cr7,r11,0
- 12: GETL R11, t10
- 13: CMP0L t10, t12 (-rSo)
- 14: ICRFL t12, $0x7, CR
- 15: INCEIPL $4
-
- 0x254725A0: 409EFFD4 bc 4,30,0x25472574
- 16: Jc30o $0x25472574
-
-
-. 0 25472594 16
-. 7D 48 01 2E 85 6A 00 08 2F 8B 00 00 40 9E FF D4
-
-==== BB 238 (0x25472574) approx BBs exec'd 0 ====
-
- 0x25472574: 2F0B0021 cmpi cr6,r11,33
- 0: GETL R11, t0
- 1: MOVL $0x21, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x6, CR
- 4: INCEIPL $4
-
- 0x25472578: 5560103A rlwinm r0,r11,2,0,29
- 5: GETL R11, t6
- 6: SHLL $0x2, t6
- 7: PUTL t6, R0
- 8: INCEIPL $4
-
- 0x2547257C: 40990018 bc 4,25,0x25472594
- 9: Jc25o $0x25472594
-
-
-. 0 25472574 12
-. 2F 0B 00 21 55 60 10 3A 40 99 00 18
-
-==== BB 239 (0x25472580) approx BBs exec'd 0 ====
-
- 0x25472580: 7F2B3850 subf r25,r11,r7
- 0: GETL R11, t0
- 1: GETL R7, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R25
- 4: INCEIPL $4
-
- 0x25472584: 2B99000F cmpli cr7,r25,15
- 5: GETL R25, t4
- 6: MOVL $0xF, t8
- 7: CMPUL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x7, CR
- 9: INCEIPL $4
-
- 0x25472588: 419D0708 bc 12,29,0x25472C90
- 10: Js29o $0x25472C90
-
-
-. 0 25472580 12
-. 7F 2B 38 50 2B 99 00 0F 41 9D 07 08
-
-==== BB 240 (0x2547258C) approx BBs exec'd 0 ====
-
- 0x2547258C: 7C0B3050 subf r0,r11,r6
- 0: GETL R11, t0
- 1: GETL R6, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25472590: 5400103A rlwinm r0,r0,2,0,29
- 5: GETL R0, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x25472594: 7D48012E stwx r10,r8,r0
- 9: GETL R0, t6
- 10: GETL R8, t8
- 11: ADDL t8, t6
- 12: GETL R10, t10
- 13: STL t10, (t6)
- 14: INCEIPL $4
-
- 0x25472598: 856A0008 lwzu r11,8(r10)
- 15: GETL R10, t12
- 16: ADDL $0x8, t12
- 17: PUTL t12, R10
- 18: LDL (t12), t14
- 19: PUTL t14, R11
- 20: INCEIPL $4
-
- 0x2547259C: 2F8B0000 cmpi cr7,r11,0
- 21: GETL R11, t16
- 22: CMP0L t16, t18 (-rSo)
- 23: ICRFL t18, $0x7, CR
- 24: INCEIPL $4
-
- 0x254725A0: 409EFFD4 bc 4,30,0x25472574
- 25: Jc30o $0x25472574
-
-
-. 0 2547258C 24
-. 7C 0B 30 50 54 00 10 3A 7D 48 01 2E 85 6A 00 08 2F 8B 00 00 40 9E FF D4
-
-==== BB 241 (0x254725A4) approx BBs exec'd 0 ====
-
- 0x254725A4: 81740000 lwz r11,0(r20)
- 0: GETL R20, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R11
- 3: INCEIPL $4
-
- 0x254725A8: 2C0B0000 cmpi cr0,r11,0
- 4: GETL R11, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x0, CR
- 7: INCEIPL $4
-
- 0x254725AC: 418200AC bc 12,2,0x25472658
- 8: Js02o $0x25472658
-
-
-. 0 254725A4 12
-. 81 74 00 00 2C 0B 00 00 41 82 00 AC
-
-==== BB 242 (0x25472658) approx BBs exec'd 0 ====
-
- 0x25472658: 81280078 lwz r9,120(r8)
- 0: GETL R8, t0
- 1: ADDL $0x78, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547265C: 2C090000 cmpi cr0,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x25472660: 41820030 bc 12,2,0x25472690
- 9: Js02o $0x25472690
-
-
-. 0 25472658 12
-. 81 28 00 78 2C 09 00 00 41 82 00 30
-
-==== BB 243 (0x25472690) approx BBs exec'd 0 ====
-
- 0x25472690: 81280098 lwz r9,152(r8)
- 0: GETL R8, t0
- 1: ADDL $0x98, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25472694: 2C890000 cmpi cr1,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x25472698: 41860018 bc 12,6,0x254726B0
- 9: Js06o $0x254726B0
-
-
-. 0 25472690 12
-. 81 28 00 98 2C 89 00 00 41 86 00 18
-
-==== BB 244 (0x254726B0) approx BBs exec'd 0 ====
-
- 0x254726B0: 81680074 lwz r11,116(r8)
- 0: GETL R8, t0
- 1: ADDL $0x74, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x254726B4: 2F0B0000 cmpi cr6,r11,0
- 5: GETL R11, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x254726B8: 419A000C bc 12,26,0x254726C4
- 9: Js26o $0x254726C4
-
-
-. 0 254726B0 12
-. 81 68 00 74 2F 0B 00 00 41 9A 00 0C
-
-==== BB 245 (0x254726C4) approx BBs exec'd 0 ====
-
- 0x254726C4: 7E83A378 or r3,r20,r20
- 0: GETL R20, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x254726C8: 48005EA5 bl 0x2547856C
- 3: MOVL $0x254726CC, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x2547856C ($4)
-
-
-. 0 254726C4 8
-. 7E 83 A3 78 48 00 5E A5
-
-==== BB 246 (0x254726CC) approx BBs exec'd 0 ====
-
- 0x254726CC: 811F0030 lwz r8,48(r31)
- 0: GETL R31, t0
- 1: ADDL $0x30, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x254726D0: 2F880002 cmpi cr7,r8,2
- 5: GETL R8, t4
- 6: MOVL $0x2, t8
- 7: CMPL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x7, CR
- 9: INCEIPL $4
-
- 0x254726D4: 419E0A04 bc 12,30,0x254730D8
- 10: Js30o $0x254730D8
-
-
-. 0 254726CC 12
-. 81 1F 00 30 2F 88 00 02 41 9E 0A 04
-
-==== BB 247 (0x254726D8) approx BBs exec'd 0 ====
-
- 0x254726D8: 4192088C bc 12,18,0x25472F64
- 0: Js18o $0x25472F64
-
-
-. 0 254726D8 4
-. 41 92 08 8C
-
-==== BB 248 (0x25472F64) approx BBs exec'd 0 ====
-
- 0x25472F64: 82BE004C lwz r21,76(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R21
- 4: INCEIPL $4
-
- 0x25472F68: 80750000 lwz r3,0(r21)
- 5: GETL R21, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R3
- 8: INCEIPL $4
-
- 0x25472F6C: 48002169 bl 0x254750D4
- 9: MOVL $0x25472F70, t8
- 10: PUTL t8, LR
- 11: JMPo-c $0x254750D4 ($4)
-
-
-. 0 25472F64 12
-. 82 BE 00 4C 80 75 00 00 48 00 21 69
-
-==== BB 249 _dl_init_paths(0x254750D4) approx BBs exec'd 0 ====
-
- 0x254750D4: 9421FFD0 stwu r1,-48(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFD0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x254750D8: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x254750DC: 48021F25 bl 0x25497000
- 9: MOVL $0x254750E0, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 254750D4 12
-. 94 21 FF D0 7C 08 02 A6 48 02 1F 25
-
-==== BB 250 (0x254750E0) approx BBs exec'd 0 ====
-
- 0x254750E0: 93C10028 stw r30,40(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x28, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x254750E4: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x254750E8: 93010010 stw r24,16(r1)
- 8: GETL R24, t6
- 9: GETL R1, t8
- 10: ADDL $0x10, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x254750EC: 90010034 stw r0,52(r1)
- 13: GETL R0, t10
- 14: GETL R1, t12
- 15: ADDL $0x34, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x254750F0: 93210014 stw r25,20(r1)
- 18: GETL R25, t14
- 19: GETL R1, t16
- 20: ADDL $0x14, t16
- 21: STL t14, (t16)
- 22: INCEIPL $4
-
- 0x254750F4: 7C791B78 or r25,r3,r3
- 23: GETL R3, t18
- 24: PUTL t18, R25
- 25: INCEIPL $4
-
- 0x254750F8: 831E04F4 lwz r24,1268(r30)
- 26: GETL R30, t20
- 27: ADDL $0x4F4, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R24
- 30: INCEIPL $4
-
- 0x254750FC: 80BE0154 lwz r5,340(r30)
- 31: GETL R30, t24
- 32: ADDL $0x154, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R5
- 35: INCEIPL $4
-
- 0x25475100: 80980010 lwz r4,16(r24)
- 36: GETL R24, t28
- 37: ADDL $0x10, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R4
- 40: INCEIPL $4
-
- 0x25475104: 80DE015C lwz r6,348(r30)
- 41: GETL R30, t32
- 42: ADDL $0x15C, t32
- 43: LDL (t32), t34
- 44: PUTL t34, R6
- 45: INCEIPL $4
-
- 0x25475108: 8078000C lwz r3,12(r24)
- 46: GETL R24, t36
- 47: ADDL $0xC, t36
- 48: LDL (t36), t38
- 49: PUTL t38, R3
- 50: INCEIPL $4
-
- 0x2547510C: 9361001C stw r27,28(r1)
- 51: GETL R27, t40
- 52: GETL R1, t42
- 53: ADDL $0x1C, t42
- 54: STL t40, (t42)
- 55: INCEIPL $4
-
- 0x25475110: 93810020 stw r28,32(r1)
- 56: GETL R28, t44
- 57: GETL R1, t46
- 58: ADDL $0x20, t46
- 59: STL t44, (t46)
- 60: INCEIPL $4
-
- 0x25475114: 93E1002C stw r31,44(r1)
- 61: GETL R31, t48
- 62: GETL R1, t50
- 63: ADDL $0x2C, t50
- 64: STL t48, (t50)
- 65: INCEIPL $4
-
- 0x25475118: 7C3F0B78 or r31,r1,r1
- 66: GETL R1, t52
- 67: PUTL t52, R31
- 68: INCEIPL $4
-
- 0x2547511C: 92E1000C stw r23,12(r1)
- 69: GETL R23, t54
- 70: GETL R1, t56
- 71: ADDL $0xC, t56
- 72: STL t54, (t56)
- 73: INCEIPL $4
-
- 0x25475120: 93410018 stw r26,24(r1)
- 74: GETL R26, t58
- 75: GETL R1, t60
- 76: ADDL $0x18, t60
- 77: STL t58, (t60)
- 78: INCEIPL $4
-
- 0x25475124: 93A10024 stw r29,36(r1)
- 79: GETL R29, t62
- 80: GETL R1, t64
- 81: ADDL $0x24, t64
- 82: STL t62, (t64)
- 83: INCEIPL $4
-
- 0x25475128: 4800A629 bl 0x2547F750
- 84: MOVL $0x2547512C, t66
- 85: PUTL t66, LR
- 86: JMPo-c $0x2547F750 ($4)
-
-
-. 0 254750E0 76
-. 93 C1 00 28 7F C8 02 A6 93 01 00 10 90 01 00 34 93 21 00 14 7C 79 1B 78 83 1E 04 F4 80 BE 01 54 80 98 00 10 80 DE 01 5C 80 78 00 0C 93 61 00 1C 93 81 00 20 93 E1 00 2C 7C 3F 0B 78 92 E1 00 0C 93 41 00 18 93 A1 00 24 48 00 A6 29
-
-==== BB 251 _dl_important_hwcaps(0x2547F750) approx BBs exec'd 0 ====
-
- 0x2547F750: 9421FFB0 stwu r1,-80(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFB0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547F754: 7CE802A6 mflr r7
- 6: GETL LR, t4
- 7: PUTL t4, R7
- 8: INCEIPL $4
-
- 0x2547F758: 480178A9 bl 0x25497000
- 9: MOVL $0x2547F75C, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547F750 12
-. 94 21 FF B0 7C E8 02 A6 48 01 78 A9
-
-==== BB 252 (0x2547F75C) approx BBs exec'd 0 ====
-
- 0x2547F75C: 93C10048 stw r30,72(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x48, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547F760: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x2547F764: 93810040 stw r28,64(r1)
- 8: GETL R28, t6
- 9: GETL R1, t8
- 10: ADDL $0x40, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2547F768: 90E10054 stw r7,84(r1)
- 13: GETL R7, t10
- 14: GETL R1, t12
- 15: ADDL $0x54, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x2547F76C: 7D800026 mfcr r12
- 18: GETL CR, t14
- 19: PUTL t14, R12
- 20: INCEIPL $4
-
- 0x2547F770: 92010010 stw r16,16(r1)
- 21: GETL R16, t16
- 22: GETL R1, t18
- 23: ADDL $0x10, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x2547F774: 7CD03378 or r16,r6,r6
- 26: GETL R6, t20
- 27: PUTL t20, R16
- 28: INCEIPL $4
-
- 0x2547F778: 813E04F4 lwz r9,1268(r30)
- 29: GETL R30, t22
- 30: ADDL $0x4F4, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R9
- 33: INCEIPL $4
-
- 0x2547F77C: 9261001C stw r19,28(r1)
- 34: GETL R19, t26
- 35: GETL R1, t28
- 36: ADDL $0x1C, t28
- 37: STL t26, (t28)
- 38: INCEIPL $4
-
- 0x2547F780: 7C932378 or r19,r4,r4
- 39: GETL R4, t30
- 40: PUTL t30, R19
- 41: INCEIPL $4
-
- 0x2547F784: 81690040 lwz r11,64(r9)
- 42: GETL R9, t32
- 43: ADDL $0x40, t32
- 44: LDL (t32), t34
- 45: PUTL t34, R11
- 46: INCEIPL $4
-
- 0x2547F788: 8009003C lwz r0,60(r9)
- 47: GETL R9, t36
- 48: ADDL $0x3C, t36
- 49: LDL (t36), t38
- 50: PUTL t38, R0
- 51: INCEIPL $4
-
- 0x2547F78C: 92810020 stw r20,32(r1)
- 52: GETL R20, t40
- 53: GETL R1, t42
- 54: ADDL $0x20, t42
- 55: STL t40, (t42)
- 56: INCEIPL $4
-
- 0x2547F790: 7CB42B78 or r20,r5,r5
- 57: GETL R5, t44
- 58: PUTL t44, R20
- 59: INCEIPL $4
-
- 0x2547F794: 7C1C5838 and r28,r0,r11
- 60: GETL R0, t46
- 61: GETL R11, t48
- 62: ANDL t46, t48
- 63: PUTL t48, R28
- 64: INCEIPL $4
-
- 0x2547F798: 92C10028 stw r22,40(r1)
- 65: GETL R22, t50
- 66: GETL R1, t52
- 67: ADDL $0x28, t52
- 68: STL t50, (t52)
- 69: INCEIPL $4
-
- 0x2547F79C: 2F9C0000 cmpi cr7,r28,0
- 70: GETL R28, t54
- 71: CMP0L t54, t56 (-rSo)
- 72: ICRFL t56, $0x7, CR
- 73: INCEIPL $4
-
- 0x2547F7A0: 93E1004C stw r31,76(r1)
- 74: GETL R31, t58
- 75: GETL R1, t60
- 76: ADDL $0x4C, t60
- 77: STL t58, (t60)
- 78: INCEIPL $4
-
- 0x2547F7A4: 92210014 stw r17,20(r1)
- 79: GETL R17, t62
- 80: GETL R1, t64
- 81: ADDL $0x14, t64
- 82: STL t62, (t64)
- 83: INCEIPL $4
-
- 0x2547F7A8: 7C3F0B78 or r31,r1,r1
- 84: GETL R1, t66
- 85: PUTL t66, R31
- 86: INCEIPL $4
-
- 0x2547F7AC: 92410018 stw r18,24(r1)
- 87: GETL R18, t68
- 88: GETL R1, t70
- 89: ADDL $0x18, t70
- 90: STL t68, (t70)
- 91: INCEIPL $4
-
- 0x2547F7B0: 7C761B78 or r22,r3,r3
- 92: GETL R3, t72
- 93: PUTL t72, R22
- 94: INCEIPL $4
-
- 0x2547F7B4: 92A10024 stw r21,36(r1)
- 95: GETL R21, t74
- 96: GETL R1, t76
- 97: ADDL $0x24, t76
- 98: STL t74, (t76)
- 99: INCEIPL $4
-
- 0x2547F7B8: 3003FFFF addic r0,r3,-1
- 100: GETL R3, t78
- 101: ADCL $0xFFFFFFFF, t78 (-wCa)
- 102: PUTL t78, R0
- 103: INCEIPL $4
-
- 0x2547F7BC: 7D401910 subfe r10,r0,r3
- 104: GETL R0, t80
- 105: GETL R3, t82
- 106: SBBL t80, t82 (-rCa-wCa)
- 107: PUTL t82, R10
- 108: INCEIPL $4
-
- 0x2547F7C0: 92E1002C stw r23,44(r1)
- 109: GETL R23, t84
- 110: GETL R1, t86
- 111: ADDL $0x2C, t86
- 112: STL t84, (t86)
- 113: INCEIPL $4
-
- 0x2547F7C4: 39600000 li r11,0
- 114: MOVL $0x0, t88
- 115: PUTL t88, R11
- 116: INCEIPL $4
-
- 0x2547F7C8: 93010030 stw r24,48(r1)
- 117: GETL R24, t90
- 118: GETL R1, t92
- 119: ADDL $0x30, t92
- 120: STL t90, (t92)
- 121: INCEIPL $4
-
- 0x2547F7CC: 93210034 stw r25,52(r1)
- 122: GETL R25, t94
- 123: GETL R1, t96
- 124: ADDL $0x34, t96
- 125: STL t94, (t96)
- 126: INCEIPL $4
-
- 0x2547F7D0: 93410038 stw r26,56(r1)
- 127: GETL R26, t98
- 128: GETL R1, t100
- 129: ADDL $0x38, t100
- 130: STL t98, (t100)
- 131: INCEIPL $4
-
- 0x2547F7D4: 9361003C stw r27,60(r1)
- 132: GETL R27, t102
- 133: GETL R1, t104
- 134: ADDL $0x3C, t104
- 135: STL t102, (t104)
- 136: INCEIPL $4
-
- 0x2547F7D8: 93A10044 stw r29,68(r1)
- 137: GETL R29, t106
- 138: GETL R1, t108
- 139: ADDL $0x44, t108
- 140: STL t106, (t108)
- 141: INCEIPL $4
-
- 0x2547F7DC: 9181000C stw r12,12(r1)
- 142: GETL R12, t110
- 143: GETL R1, t112
- 144: ADDL $0xC, t112
- 145: STL t110, (t112)
- 146: INCEIPL $4
-
- 0x2547F7E0: 419E0028 bc 12,30,0x2547F808
- 147: Js30o $0x2547F808
-
-
-. 0 2547F75C 136
-. 93 C1 00 48 7F C8 02 A6 93 81 00 40 90 E1 00 54 7D 80 00 26 92 01 00 10 7C D0 33 78 81 3E 04 F4 92 61 00 1C 7C 93 23 78 81 69 00 40 80 09 00 3C 92 81 00 20 7C B4 2B 78 7C 1C 58 38 92 C1 00 28 2F 9C 00 00 93 E1 00 4C 92 21 00 14 7C 3F 0B 78 92 41 00 18 7C 76 1B 78 92 A1 00 24 30 03 FF FF 7D 40 19 10 92 E1 00 2C 39 60 00 00 93 01 00 30 93 21 00 34 93 41 00 38 93 61 00 3C 93 A1 00 44 91 81 00 0C 41 9E 00 28
-
-==== BB 253 (0x2547F808) approx BBs exec'd 0 ====
-
- 0x2547F808: 3B0A0001 addi r24,r10,1
- 0: GETL R10, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R24
- 3: INCEIPL $4
-
- 0x2547F80C: 82210000 lwz r17,0(r1)
- 4: GETL R1, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R17
- 7: INCEIPL $4
-
- 0x2547F810: 57121838 rlwinm r18,r24,3,0,28
- 8: GETL R24, t6
- 9: SHLL $0x3, t6
- 10: PUTL t6, R18
- 11: INCEIPL $4
-
- 0x2547F814: 3B200000 li r25,0
- 12: MOVL $0x0, t8
- 13: PUTL t8, R25
- 14: INCEIPL $4
-
- 0x2547F818: 3AF2001E addi r23,r18,30
- 15: GETL R18, t10
- 16: ADDL $0x1E, t10
- 17: PUTL t10, R23
- 18: INCEIPL $4
-
- 0x2547F81C: 3B400000 li r26,0
- 19: MOVL $0x0, t12
- 20: PUTL t12, R26
- 21: INCEIPL $4
-
- 0x2547F820: 56F50036 rlwinm r21,r23,0,0,27
- 22: GETL R23, t14
- 23: ANDL $0xFFFFFFF0, t14
- 24: PUTL t14, R21
- 25: INCEIPL $4
-
- 0x2547F824: 7D5500D0 neg r10,r21
- 26: GETL R21, t16
- 27: NEGL t16
- 28: PUTL t16, R10
- 29: INCEIPL $4
-
- 0x2547F828: 7E21516E stwux r17,r1,r10
- 30: GETL R10, t18
- 31: GETL R1, t20
- 32: ADDL t20, t18
- 33: PUTL t18, R1
- 34: GETL R17, t22
- 35: STL t22, (t18)
- 36: INCEIPL $4
-
- 0x2547F82C: 39010017 addi r8,r1,23
- 37: GETL R1, t24
- 38: ADDL $0x17, t24
- 39: PUTL t24, R8
- 40: INCEIPL $4
-
- 0x2547F830: 551B0036 rlwinm r27,r8,0,0,27
- 41: GETL R8, t26
- 42: ANDL $0xFFFFFFF0, t26
- 43: PUTL t26, R27
- 44: INCEIPL $4
-
- 0x2547F834: 419E0048 bc 12,30,0x2547F87C
- 45: Js30o $0x2547F87C
-
-
-. 0 2547F808 48
-. 3B 0A 00 01 82 21 00 00 57 12 18 38 3B 20 00 00 3A F2 00 1E 3B 40 00 00 56 F5 00 36 7D 55 00 D0 7E 21 51 6E 39 01 00 17 55 1B 00 36 41 9E 00 48
-
-==== BB 254 (0x2547F87C) approx BBs exec'd 0 ====
-
- 0x2547F87C: 2F960000 cmpi cr7,r22,0
- 0: GETL R22, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x2547F880: 419E0018 bc 12,30,0x2547F898
- 4: Js30o $0x2547F898
-
-
-. 0 2547F87C 8
-. 2F 96 00 00 41 9E 00 18
-
-==== BB 255 (0x2547F898) approx BBs exec'd 0 ====
-
- 0x2547F898: 2E180001 cmpi cr4,r24,1
- 0: GETL R24, t0
- 1: MOVL $0x1, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x4, CR
- 4: INCEIPL $4
-
- 0x2547F89C: 57291838 rlwinm r9,r25,3,0,28
- 5: GETL R25, t6
- 6: SHLL $0x3, t6
- 7: PUTL t6, R9
- 8: INCEIPL $4
-
- 0x2547F8A0: 833E0410 lwz r25,1040(r30)
- 9: GETL R30, t8
- 10: ADDL $0x410, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R25
- 13: INCEIPL $4
-
- 0x2547F8A4: 7E69DA14 add r19,r9,r27
- 14: GETL R9, t12
- 15: GETL R27, t14
- 16: ADDL t12, t14
- 17: PUTL t14, R19
- 18: INCEIPL $4
-
- 0x2547F8A8: 3AC00003 li r22,3
- 19: MOVL $0x3, t16
- 20: PUTL t16, R22
- 21: INCEIPL $4
-
- 0x2547F8AC: 7F29D92E stwx r25,r9,r27
- 22: GETL R27, t18
- 23: GETL R9, t20
- 24: ADDL t20, t18
- 25: GETL R25, t22
- 26: STL t22, (t18)
- 27: INCEIPL $4
-
- 0x2547F8B0: 92D30004 stw r22,4(r19)
- 28: GETL R22, t24
- 29: GETL R19, t26
- 30: ADDL $0x4, t26
- 31: STL t24, (t26)
- 32: INCEIPL $4
-
- 0x2547F8B4: 41920324 bc 12,18,0x2547FBD8
- 33: Js18o $0x2547FBD8
-
-
-. 0 2547F898 32
-. 2E 18 00 01 57 29 18 38 83 3E 04 10 7E 69 DA 14 3A C0 00 03 7F 29 D9 2E 92 D3 00 04 41 92 03 24
-
-==== BB 256 (0x2547FBD8) approx BBs exec'd 0 ====
-
- 0x2547FBD8: 819B0004 lwz r12,4(r27)
- 0: GETL R27, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R12
- 4: INCEIPL $4
-
- 0x2547FBDC: 390C0001 addi r8,r12,1
- 5: GETL R12, t4
- 6: ADDL $0x1, t4
- 7: PUTL t4, R8
- 8: INCEIPL $4
-
- 0x2547FBE0: 4BFFFD30 b 0x2547F910
- 9: JMPo $0x2547F910 ($4)
-
-
-. 0 2547FBD8 12
-. 81 9B 00 04 39 0C 00 01 4B FF FD 30
-
-==== BB 257 (0x2547F910) approx BBs exec'd 0 ====
-
- 0x2547F910: 3BA00001 li r29,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R29
- 2: INCEIPL $4
-
- 0x2547F914: 7FAAC030 slw r10,r29,r24
- 3: GETL R29, t4
- 4: GETL R24, t2
- 5: SHLL t2, t4
- 6: PUTL t4, R10
- 7: INCEIPL $4
-
- 0x2547F918: 555A1838 rlwinm r26,r10,3,0,28
- 8: GETL R10, t6
- 9: SHLL $0x3, t6
- 10: PUTL t6, R26
- 11: INCEIPL $4
-
- 0x2547F91C: 91540000 stw r10,0(r20)
- 12: GETL R10, t8
- 13: GETL R20, t10
- 14: STL t8, (t10)
- 15: INCEIPL $4
-
- 0x2547F920: 7C7A4214 add r3,r26,r8
- 16: GETL R26, t12
- 17: GETL R8, t14
- 18: ADDL t12, t14
- 19: PUTL t14, R3
- 20: INCEIPL $4
-
- 0x2547F924: 48018101 bl 0x25497A24
- 21: MOVL $0x2547F928, t16
- 22: PUTL t16, LR
- 23: JMPo-c $0x25497A24 ($4)
-
-
-. 0 2547F910 24
-. 3B A0 00 01 7F AA C0 30 55 5A 18 38 91 54 00 00 7C 7A 42 14 48 01 81 01
-
-==== BB 258 (0x2547FDC8) approx BBs exec'd 0 ====
-
- 0x2547FDC8: 813F0000 lwz r9,0(r31)
- 0: GETL R31, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0x2547FDCC: 7C895214 add r4,r9,r10
- 4: GETL R9, t4
- 5: GETL R10, t6
- 6: ADDL t4, t6
- 7: PUTL t6, R4
- 8: INCEIPL $4
-
- 0x2547FDD0: 3804FFFF addi r0,r4,-1
- 9: GETL R4, t8
- 10: ADDL $0xFFFFFFFF, t8
- 11: PUTL t8, R0
- 12: INCEIPL $4
-
- 0x2547FDD4: 7C0AE838 and r10,r0,r29
- 13: GETL R0, t10
- 14: GETL R29, t12
- 15: ANDL t10, t12
- 16: PUTL t12, R10
- 17: INCEIPL $4
-
- 0x2547FDD8: 7D8AE214 add r12,r10,r28
- 18: GETL R10, t14
- 19: GETL R28, t16
- 20: ADDL t14, t16
- 21: PUTL t16, R12
- 22: INCEIPL $4
-
- 0x2547FDDC: 915F0000 stw r10,0(r31)
- 23: GETL R10, t18
- 24: GETL R31, t20
- 25: STL t18, (t20)
- 26: INCEIPL $4
-
- 0x2547FDE0: 7C0C5840 cmpl cr0,r12,r11
- 27: GETL R12, t22
- 28: GETL R11, t24
- 29: CMPUL t22, t24, t26 (-rSo)
- 30: ICRFL t26, $0x0, CR
- 31: INCEIPL $4
-
- 0x2547FDE4: 4080003C bc 4,0,0x2547FE20
- 32: Jc00o $0x2547FE20
-
-
-. 0 2547FDC8 32
-. 81 3F 00 00 7C 89 52 14 38 04 FF FF 7C 0A E8 38 7D 8A E2 14 91 5F 00 00 7C 0C 58 40 40 80 00 3C
-
-==== BB 259 (0x2547F928) approx BBs exec'd 0 ====
-
- 0x2547F928: 7C761B79 or. r22,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R22
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x2547F92C: 418202E8 bc 12,2,0x2547FC14
- 5: Js02o $0x2547FC14
-
-
-. 0 2547F928 8
-. 7C 76 1B 79 41 82 02 E8
-
-==== BB 260 (0x2547F930) approx BBs exec'd 0 ====
-
- 0x2547F930: 419201FC bc 12,18,0x2547FB2C
- 0: Js18o $0x2547FB2C
-
-
-. 0 2547F930 4
-. 41 92 01 FC
-
-==== BB 261 (0x2547FB2C) approx BBs exec'd 0 ====
-
- 0x2547FB2C: 83340000 lwz r25,0(r20)
- 0: GETL R20, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R25
- 3: INCEIPL $4
-
- 0x2547FB30: 39000000 li r8,0
- 4: MOVL $0x0, t4
- 5: PUTL t4, R8
- 6: INCEIPL $4
-
- 0x2547FB34: 827B0004 lwz r19,4(r27)
- 7: GETL R27, t6
- 8: ADDL $0x4, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R19
- 11: INCEIPL $4
-
- 0x2547FB38: 3B00002F li r24,47
- 12: MOVL $0x2F, t10
- 13: PUTL t10, R24
- 14: INCEIPL $4
-
- 0x2547FB3C: 57291838 rlwinm r9,r25,3,0,28
- 15: GETL R25, t12
- 16: SHLL $0x3, t12
- 17: PUTL t12, R9
- 18: INCEIPL $4
-
- 0x2547FB40: 9116000C stw r8,12(r22)
- 19: GETL R8, t14
- 20: GETL R22, t16
- 21: ADDL $0xC, t16
- 22: STL t14, (t16)
- 23: INCEIPL $4
-
- 0x2547FB44: 7C69B214 add r3,r9,r22
- 24: GETL R9, t18
- 25: GETL R22, t20
- 26: ADDL t18, t20
- 27: PUTL t20, R3
- 28: INCEIPL $4
-
- 0x2547FB48: 3B930001 addi r28,r19,1
- 29: GETL R19, t22
- 30: ADDL $0x1, t22
- 31: PUTL t22, R28
- 32: INCEIPL $4
-
- 0x2547FB4C: 93960004 stw r28,4(r22)
- 33: GETL R28, t24
- 34: GETL R22, t26
- 35: ADDL $0x4, t26
- 36: STL t24, (t26)
- 37: INCEIPL $4
-
- 0x2547FB50: 3A400002 li r18,2
- 38: MOVL $0x2, t28
- 39: PUTL t28, R18
- 40: INCEIPL $4
-
- 0x2547FB54: 90760000 stw r3,0(r22)
- 41: GETL R3, t30
- 42: GETL R22, t32
- 43: STL t30, (t32)
- 44: INCEIPL $4
-
- 0x2547FB58: 90760008 stw r3,8(r22)
- 45: GETL R3, t34
- 46: GETL R22, t36
- 47: ADDL $0x8, t36
- 48: STL t34, (t36)
- 49: INCEIPL $4
-
- 0x2547FB5C: 80BB0004 lwz r5,4(r27)
- 50: GETL R27, t38
- 51: ADDL $0x4, t38
- 52: LDL (t38), t40
- 53: PUTL t40, R5
- 54: INCEIPL $4
-
- 0x2547FB60: 809B0000 lwz r4,0(r27)
- 55: GETL R27, t42
- 56: LDL (t42), t44
- 57: PUTL t44, R4
- 58: INCEIPL $4
-
- 0x2547FB64: 48003EBD bl 0x25483A20
- 59: MOVL $0x2547FB68, t46
- 60: PUTL t46, LR
- 61: JMPo-c $0x25483A20 ($4)
-
-
-. 0 2547FB2C 60
-. 83 34 00 00 39 00 00 00 82 7B 00 04 3B 00 00 2F 57 29 18 38 91 16 00 0C 7C 69 B2 14 3B 93 00 01 93 96 00 04 3A 40 00 02 90 76 00 00 90 76 00 08 80 BB 00 04 80 9B 00 00 48 00 3E BD
-
-==== BB 262 mempcpy(0x25483A20) approx BBs exec'd 0 ====
-
- 0x25483A20: 2B85000F cmpli cr7,r5,15
- 0: GETL R5, t0
- 1: MOVL $0xF, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0x25483A24: 7C0802A6 mflr r0
- 5: GETL LR, t6
- 6: PUTL t6, R0
- 7: INCEIPL $4
-
- 0x25483A28: 9421FFE0 stwu r1,-32(r1)
- 8: GETL R1, t8
- 9: GETL R1, t10
- 10: ADDL $0xFFFFFFE0, t10
- 11: PUTL t10, R1
- 12: STL t8, (t10)
- 13: INCEIPL $4
-
- 0x25483A2C: 93A10014 stw r29,20(r1)
- 14: GETL R29, t12
- 15: GETL R1, t14
- 16: ADDL $0x14, t14
- 17: STL t12, (t14)
- 18: INCEIPL $4
-
- 0x25483A30: 7C7D1B78 or r29,r3,r3
- 19: GETL R3, t16
- 20: PUTL t16, R29
- 21: INCEIPL $4
-
- 0x25483A34: 93E1001C stw r31,28(r1)
- 22: GETL R31, t18
- 23: GETL R1, t20
- 24: ADDL $0x1C, t20
- 25: STL t18, (t20)
- 26: INCEIPL $4
-
- 0x25483A38: 7C9F2378 or r31,r4,r4
- 27: GETL R4, t22
- 28: PUTL t22, R31
- 29: INCEIPL $4
-
- 0x25483A3C: 93810010 stw r28,16(r1)
- 30: GETL R28, t24
- 31: GETL R1, t26
- 32: ADDL $0x10, t26
- 33: STL t24, (t26)
- 34: INCEIPL $4
-
- 0x25483A40: 93C10018 stw r30,24(r1)
- 35: GETL R30, t28
- 36: GETL R1, t30
- 37: ADDL $0x18, t30
- 38: STL t28, (t30)
- 39: INCEIPL $4
-
- 0x25483A44: 90010024 stw r0,36(r1)
- 40: GETL R0, t32
- 41: GETL R1, t34
- 42: ADDL $0x24, t34
- 43: STL t32, (t34)
- 44: INCEIPL $4
-
- 0x25483A48: 409D0058 bc 4,29,0x25483AA0
- 45: Jc29o $0x25483AA0
-
-
-. 0 25483A20 44
-. 2B 85 00 0F 7C 08 02 A6 94 21 FF E0 93 A1 00 14 7C 7D 1B 78 93 E1 00 1C 7C 9F 23 78 93 81 00 10 93 C1 00 18 90 01 00 24 40 9D 00 58
-
-==== BB 263 (0x25483AA0) approx BBs exec'd 0 ====
-
- 0x25483AA0: 2C850000 cmpi cr1,r5,0
- 0: GETL R5, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x25483AA4: 4186001C bc 12,6,0x25483AC0
- 4: Js06o $0x25483AC0
-
-
-. 0 25483AA0 8
-. 2C 85 00 00 41 86 00 1C
-
-==== BB 264 (0x25483AA8) approx BBs exec'd 0 ====
-
- 0x25483AA8: 7CA903A6 mtctr r5
- 0: GETL R5, t0
- 1: PUTL t0, CTR
- 2: INCEIPL $4
-
- 0x25483AAC: 88FF0000 lbz r7,0(r31)
- 3: GETL R31, t2
- 4: LDB (t2), t4
- 5: PUTL t4, R7
- 6: INCEIPL $4
-
- 0x25483AB0: 3BFF0001 addi r31,r31,1
- 7: GETL R31, t6
- 8: ADDL $0x1, t6
- 9: PUTL t6, R31
- 10: INCEIPL $4
-
- 0x25483AB4: 98FD0000 stb r7,0(r29)
- 11: GETL R7, t8
- 12: GETL R29, t10
- 13: STB t8, (t10)
- 14: INCEIPL $4
-
- 0x25483AB8: 3BBD0001 addi r29,r29,1
- 15: GETL R29, t12
- 16: ADDL $0x1, t12
- 17: PUTL t12, R29
- 18: INCEIPL $4
-
- 0x25483ABC: 4200FFF0 bc 16,0,0x25483AAC
- 19: GETL CTR, t14
- 20: ADDL $0xFFFFFFFF, t14
- 21: PUTL t14, CTR
- 22: JIFZL t14, $0x25483AC0
- 23: JMPo $0x25483AAC ($4)
-
-
-. 0 25483AA8 24
-. 7C A9 03 A6 88 FF 00 00 3B FF 00 01 98 FD 00 00 3B BD 00 01 42 00 FF F0
-
-==== BB 265 (0x25483AAC) approx BBs exec'd 0 ====
-
- 0x25483AAC: 88FF0000 lbz r7,0(r31)
- 0: GETL R31, t0
- 1: LDB (t0), t2
- 2: PUTL t2, R7
- 3: INCEIPL $4
-
- 0x25483AB0: 3BFF0001 addi r31,r31,1
- 4: GETL R31, t4
- 5: ADDL $0x1, t4
- 6: PUTL t4, R31
- 7: INCEIPL $4
-
- 0x25483AB4: 98FD0000 stb r7,0(r29)
- 8: GETL R7, t6
- 9: GETL R29, t8
- 10: STB t6, (t8)
- 11: INCEIPL $4
-
- 0x25483AB8: 3BBD0001 addi r29,r29,1
- 12: GETL R29, t10
- 13: ADDL $0x1, t10
- 14: PUTL t10, R29
- 15: INCEIPL $4
-
- 0x25483ABC: 4200FFF0 bc 16,0,0x25483AAC
- 16: GETL CTR, t12
- 17: ADDL $0xFFFFFFFF, t12
- 18: PUTL t12, CTR
- 19: JIFZL t12, $0x25483AC0
- 20: JMPo $0x25483AAC ($4)
-
-
-. 0 25483AAC 20
-. 88 FF 00 00 3B FF 00 01 98 FD 00 00 3B BD 00 01 42 00 FF F0
-
-==== BB 266 (0x25483AC0) approx BBs exec'd 0 ====
-
- 0x25483AC0: 81010024 lwz r8,36(r1)
- 0: GETL R1, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x25483AC4: 7FA3EB78 or r3,r29,r29
- 5: GETL R29, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25483AC8: 83810010 lwz r28,16(r1)
- 8: GETL R1, t6
- 9: ADDL $0x10, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R28
- 12: INCEIPL $4
-
- 0x25483ACC: 83A10014 lwz r29,20(r1)
- 13: GETL R1, t10
- 14: ADDL $0x14, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R29
- 17: INCEIPL $4
-
- 0x25483AD0: 7D0803A6 mtlr r8
- 18: GETL R8, t14
- 19: PUTL t14, LR
- 20: INCEIPL $4
-
- 0x25483AD4: 83C10018 lwz r30,24(r1)
- 21: GETL R1, t16
- 22: ADDL $0x18, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R30
- 25: INCEIPL $4
-
- 0x25483AD8: 83E1001C lwz r31,28(r1)
- 26: GETL R1, t20
- 27: ADDL $0x1C, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R31
- 30: INCEIPL $4
-
- 0x25483ADC: 38210020 addi r1,r1,32
- 31: GETL R1, t24
- 32: ADDL $0x20, t24
- 33: PUTL t24, R1
- 34: INCEIPL $4
-
- 0x25483AE0: 4E800020 blr
- 35: GETL LR, t26
- 36: JMPo-r t26 ($4)
-
-
-. 0 25483AC0 36
-. 81 01 00 24 7F A3 EB 78 83 81 00 10 83 A1 00 14 7D 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 267 (0x2547FB68) approx BBs exec'd 0 ====
-
- 0x2547FB68: 9B030000 stb r24,0(r3)
- 0: GETL R24, t0
- 1: GETL R3, t2
- 2: STB t0, (t2)
- 3: INCEIPL $4
-
- 0x2547FB6C: 92540000 stw r18,0(r20)
- 4: GETL R18, t4
- 5: GETL R20, t6
- 6: STL t4, (t6)
- 7: INCEIPL $4
-
- 0x2547FB70: 83760004 lwz r27,4(r22)
- 8: GETL R22, t8
- 9: ADDL $0x4, t8
- 10: LDL (t8), t10
- 11: PUTL t10, R27
- 12: INCEIPL $4
-
- 0x2547FB74: 7EC3B378 or r3,r22,r22
- 13: GETL R22, t12
- 14: PUTL t12, R3
- 15: INCEIPL $4
-
- 0x2547FB78: 93700000 stw r27,0(r16)
- 16: GETL R27, t14
- 17: GETL R16, t16
- 18: STL t14, (t16)
- 19: INCEIPL $4
-
- 0x2547FB7C: 81010000 lwz r8,0(r1)
- 20: GETL R1, t18
- 21: LDL (t18), t20
- 22: PUTL t20, R8
- 23: INCEIPL $4
-
- 0x2547FB80: 82080004 lwz r16,4(r8)
- 24: GETL R8, t22
- 25: ADDL $0x4, t22
- 26: LDL (t22), t24
- 27: PUTL t24, R16
- 28: INCEIPL $4
-
- 0x2547FB84: 80E8FFBC lwz r7,-68(r8)
- 29: GETL R8, t26
- 30: ADDL $0xFFFFFFBC, t26
- 31: LDL (t26), t28
- 32: PUTL t28, R7
- 33: INCEIPL $4
-
- 0x2547FB88: 7E0803A6 mtlr r16
- 34: GETL R16, t30
- 35: PUTL t30, LR
- 36: INCEIPL $4
-
- 0x2547FB8C: 8228FFC4 lwz r17,-60(r8)
- 37: GETL R8, t32
- 38: ADDL $0xFFFFFFC4, t32
- 39: LDL (t32), t34
- 40: PUTL t34, R17
- 41: INCEIPL $4
-
- 0x2547FB90: 8208FFC0 lwz r16,-64(r8)
- 42: GETL R8, t36
- 43: ADDL $0xFFFFFFC0, t36
- 44: LDL (t36), t38
- 45: PUTL t38, R16
- 46: INCEIPL $4
-
- 0x2547FB94: 7CE08120 mtcrf 0x8,r7
- 47: GETL R7, t40
- 48: ICRFL t40, $0x4, CR
- 49: INCEIPL $4
-
- 0x2547FB98: 8248FFC8 lwz r18,-56(r8)
- 50: GETL R8, t42
- 51: ADDL $0xFFFFFFC8, t42
- 52: LDL (t42), t44
- 53: PUTL t44, R18
- 54: INCEIPL $4
-
- 0x2547FB9C: 8268FFCC lwz r19,-52(r8)
- 55: GETL R8, t46
- 56: ADDL $0xFFFFFFCC, t46
- 57: LDL (t46), t48
- 58: PUTL t48, R19
- 59: INCEIPL $4
-
- 0x2547FBA0: 8288FFD0 lwz r20,-48(r8)
- 60: GETL R8, t50
- 61: ADDL $0xFFFFFFD0, t50
- 62: LDL (t50), t52
- 63: PUTL t52, R20
- 64: INCEIPL $4
-
- 0x2547FBA4: 82A8FFD4 lwz r21,-44(r8)
- 65: GETL R8, t54
- 66: ADDL $0xFFFFFFD4, t54
- 67: LDL (t54), t56
- 68: PUTL t56, R21
- 69: INCEIPL $4
-
- 0x2547FBA8: 82C8FFD8 lwz r22,-40(r8)
- 70: GETL R8, t58
- 71: ADDL $0xFFFFFFD8, t58
- 72: LDL (t58), t60
- 73: PUTL t60, R22
- 74: INCEIPL $4
-
- 0x2547FBAC: 82E8FFDC lwz r23,-36(r8)
- 75: GETL R8, t62
- 76: ADDL $0xFFFFFFDC, t62
- 77: LDL (t62), t64
- 78: PUTL t64, R23
- 79: INCEIPL $4
-
- 0x2547FBB0: 8308FFE0 lwz r24,-32(r8)
- 80: GETL R8, t66
- 81: ADDL $0xFFFFFFE0, t66
- 82: LDL (t66), t68
- 83: PUTL t68, R24
- 84: INCEIPL $4
-
- 0x2547FBB4: 8328FFE4 lwz r25,-28(r8)
- 85: GETL R8, t70
- 86: ADDL $0xFFFFFFE4, t70
- 87: LDL (t70), t72
- 88: PUTL t72, R25
- 89: INCEIPL $4
-
- 0x2547FBB8: 8348FFE8 lwz r26,-24(r8)
- 90: GETL R8, t74
- 91: ADDL $0xFFFFFFE8, t74
- 92: LDL (t74), t76
- 93: PUTL t76, R26
- 94: INCEIPL $4
-
- 0x2547FBBC: 8368FFEC lwz r27,-20(r8)
- 95: GETL R8, t78
- 96: ADDL $0xFFFFFFEC, t78
- 97: LDL (t78), t80
- 98: PUTL t80, R27
- 99: INCEIPL $4
-
- 0x2547FBC0: 8388FFF0 lwz r28,-16(r8)
- 100: GETL R8, t82
- 101: ADDL $0xFFFFFFF0, t82
- 102: LDL (t82), t84
- 103: PUTL t84, R28
- 104: INCEIPL $4
-
- 0x2547FBC4: 83A8FFF4 lwz r29,-12(r8)
- 105: GETL R8, t86
- 106: ADDL $0xFFFFFFF4, t86
- 107: LDL (t86), t88
- 108: PUTL t88, R29
- 109: INCEIPL $4
-
- 0x2547FBC8: 83C8FFF8 lwz r30,-8(r8)
- 110: GETL R8, t90
- 111: ADDL $0xFFFFFFF8, t90
- 112: LDL (t90), t92
- 113: PUTL t92, R30
- 114: INCEIPL $4
-
- 0x2547FBCC: 83E8FFFC lwz r31,-4(r8)
- 115: GETL R8, t94
- 116: ADDL $0xFFFFFFFC, t94
- 117: LDL (t94), t96
- 118: PUTL t96, R31
- 119: INCEIPL $4
-
- 0x2547FBD0: 7D014378 or r1,r8,r8
- 120: GETL R8, t98
- 121: PUTL t98, R1
- 122: INCEIPL $4
-
- 0x2547FBD4: 4E800020 blr
- 123: GETL LR, t100
- 124: JMPo-r t100 ($4)
-
-
-. 0 2547FB68 112
-. 9B 03 00 00 92 54 00 00 83 76 00 04 7E C3 B3 78 93 70 00 00 81 01 00 00 82 08 00 04 80 E8 FF BC 7E 08 03 A6 82 28 FF C4 82 08 FF C0 7C E0 81 20 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
-
-==== BB 268 (0x2547512C) approx BBs exec'd 0 ====
-
- 0x2547512C: 813E0160 lwz r9,352(r30)
- 0: GETL R30, t0
- 1: ADDL $0x160, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25475130: 837E0164 lwz r27,356(r30)
- 5: GETL R30, t4
- 6: ADDL $0x164, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R27
- 9: INCEIPL $4
-
- 0x25475134: 90690000 stw r3,0(r9)
- 10: GETL R3, t8
- 11: GETL R9, t10
- 12: STL t8, (t10)
- 13: INCEIPL $4
-
- 0x25475138: 3860000C li r3,12
- 14: MOVL $0xC, t12
- 15: PUTL t12, R3
- 16: INCEIPL $4
-
- 0x2547513C: 480228E9 bl 0x25497A24
- 17: MOVL $0x25475140, t14
- 18: PUTL t14, LR
- 19: JMPo-c $0x25497A24 ($4)
-
-
-. 0 2547512C 20
-. 81 3E 01 60 83 7E 01 64 90 69 00 00 38 60 00 0C 48 02 28 E9
-
-==== BB 269 (0x25475140) approx BBs exec'd 0 ====
-
- 0x25475140: 7C7C1B79 or. r28,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R28
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x25475144: 907B0000 stw r3,0(r27)
- 5: GETL R3, t4
- 6: GETL R27, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0x25475148: 41820188 bc 12,2,0x254752D0
- 9: Js02o $0x254752D0
-
-
-. 0 25475140 12
-. 7C 7C 1B 79 90 7B 00 00 41 82 01 88
-
-==== BB 270 (0x2547514C) approx BBs exec'd 0 ====
-
- 0x2547514C: 835E0154 lwz r26,340(r30)
- 0: GETL R30, t0
- 1: ADDL $0x154, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0x25475150: 3D40CCCC lis r10,-13108
- 5: MOVL $0xCCCC0000, t4
- 6: PUTL t4, R10
- 7: INCEIPL $4
-
- 0x25475154: 6146CCCD ori r6,r10,0xCCCD
- 8: MOVL $0xCCCCCCCD, t6
- 9: PUTL t6, R6
- 10: INCEIPL $4
-
- 0x25475158: 811A0000 lwz r8,0(r26)
- 11: GETL R26, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R8
- 14: INCEIPL $4
-
- 0x2547515C: 5507103A rlwinm r7,r8,2,0,29
- 15: GETL R8, t12
- 16: SHLL $0x2, t12
- 17: PUTL t12, R7
- 18: INCEIPL $4
-
- 0x25475160: 38A70027 addi r5,r7,39
- 19: GETL R7, t14
- 20: ADDL $0x27, t14
- 21: PUTL t14, R5
- 22: INCEIPL $4
-
- 0x25475164: 7C653016 mulhwu r3,r5,r6
- 23: GETL R5, t16
- 24: GETL R6, t18
- 25: UMULHL t16, t18
- 26: PUTL t18, R3
- 27: INCEIPL $4
-
- 0x25475168: 547DE13E rlwinm r29,r3,28,4,31
- 28: GETL R3, t20
- 29: SHRL $0x4, t20
- 30: PUTL t20, R29
- 31: INCEIPL $4
-
- 0x2547516C: 1C7D0140 mulli r3,r29,320
- 32: GETL R29, t22
- 33: MULL $0x140, t22
- 34: PUTL t22, R3
- 35: INCEIPL $4
-
- 0x25475170: 480228B5 bl 0x25497A24
- 36: MOVL $0x25475174, t24
- 37: PUTL t24, LR
- 38: JMPo-c $0x25497A24 ($4)
-
-
-. 0 2547514C 40
-. 83 5E 01 54 3D 40 CC CC 61 46 CC CD 81 1A 00 00 55 07 10 3A 38 A7 00 27 7C 65 30 16 54 7D E1 3E 1C 7D 01 40 48 02 28 B5
-
-==== BB 271 (0x25475174) approx BBs exec'd 0 ====
-
- 0x25475174: 809B0000 lwz r4,0(r27)
- 0: GETL R27, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R4
- 3: INCEIPL $4
-
- 0x25475178: 907C0000 stw r3,0(r28)
- 4: GETL R3, t4
- 5: GETL R28, t6
- 6: STL t4, (t6)
- 7: INCEIPL $4
-
- 0x2547517C: 81240000 lwz r9,0(r4)
- 8: GETL R4, t8
- 9: LDL (t8), t10
- 10: PUTL t10, R9
- 11: INCEIPL $4
-
- 0x25475180: 80DE0188 lwz r6,392(r30)
- 12: GETL R30, t12
- 13: ADDL $0x188, t12
- 14: LDL (t12), t14
- 15: PUTL t14, R6
- 16: INCEIPL $4
-
- 0x25475184: 2F890000 cmpi cr7,r9,0
- 17: GETL R9, t16
- 18: CMP0L t16, t18 (-rSo)
- 19: ICRFL t18, $0x7, CR
- 20: INCEIPL $4
-
- 0x25475188: 419E014C bc 12,30,0x254752D4
- 21: Js30o $0x254752D4
-
-
-. 0 25475174 24
-. 80 9B 00 00 90 7C 00 00 81 24 00 00 80 DE 01 88 2F 89 00 00 41 9E 01 4C
-
-==== BB 272 (0x2547518C) approx BBs exec'd 0 ====
-
- 0x2547518C: 82FE04C8 lwz r23,1224(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4C8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R23
- 4: INCEIPL $4
-
- 0x25475190: 39600000 li r11,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R11
- 7: INCEIPL $4
-
- 0x25475194: 1C7D0014 mulli r3,r29,20
- 8: GETL R29, t6
- 9: MULL $0x14, t6
- 10: PUTL t6, R3
- 11: INCEIPL $4
-
- 0x25475198: 80FA0000 lwz r7,0(r26)
- 12: GETL R26, t8
- 13: LDL (t8), t10
- 14: PUTL t10, R7
- 15: INCEIPL $4
-
- 0x2547519C: 811E014C lwz r8,332(r30)
- 16: GETL R30, t12
- 17: ADDL $0x14C, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R8
- 20: INCEIPL $4
-
- 0x254751A0: 39400000 li r10,0
- 21: MOVL $0x0, t16
- 22: PUTL t16, R10
- 23: INCEIPL $4
-
- 0x254751A4: 809E0194 lwz r4,404(r30)
- 24: GETL R30, t18
- 25: ADDL $0x194, t18
- 26: LDL (t18), t20
- 27: PUTL t20, R4
- 28: INCEIPL $4
-
- 0x254751A8: 38C00000 li r6,0
- 29: MOVL $0x0, t22
- 30: PUTL t22, R6
- 31: INCEIPL $4
-
- 0x254751AC: 80BE0148 lwz r5,328(r30)
- 32: GETL R30, t24
- 33: ADDL $0x148, t24
- 34: LDL (t24), t26
- 35: PUTL t26, R5
- 36: INCEIPL $4
-
- 0x254751B0: 917B0004 stw r11,4(r27)
- 37: GETL R11, t28
- 38: GETL R27, t30
- 39: ADDL $0x4, t30
- 40: STL t28, (t30)
- 41: INCEIPL $4
-
- 0x254751B4: 7D2B4B78 or r11,r9,r9
- 42: GETL R9, t32
- 43: PUTL t32, R11
- 44: INCEIPL $4
-
- 0x254751B8: 913701B0 stw r9,432(r23)
- 45: GETL R9, t34
- 46: GETL R23, t36
- 47: ADDL $0x1B0, t36
- 48: STL t34, (t36)
- 49: INCEIPL $4
-
- 0x254751BC: 555B103A rlwinm r27,r10,2,0,29
- 50: GETL R10, t38
- 51: SHLL $0x2, t38
- 52: PUTL t38, R27
- 53: INCEIPL $4
-
- 0x254751C0: 7C863840 cmpl cr1,r6,r7
- 54: GETL R6, t40
- 55: GETL R7, t42
- 56: CMPUL t40, t42, t44 (-rSo)
- 57: ICRFL t44, $0x1, CR
- 58: INCEIPL $4
-
- 0x254751C4: 7F5B282E lwzx r26,r27,r5
- 59: GETL R5, t46
- 60: GETL R27, t48
- 61: ADDL t48, t46
- 62: LDL (t46), t50
- 63: PUTL t50, R26
- 64: INCEIPL $4
-
- 0x254751C8: 917C0000 stw r11,0(r28)
- 65: GETL R11, t52
- 66: GETL R28, t54
- 67: STL t52, (t54)
- 68: INCEIPL $4
-
- 0x254751CC: 3B9C0004 addi r28,r28,4
- 69: GETL R28, t56
- 70: ADDL $0x4, t56
- 71: PUTL t56, R28
- 72: INCEIPL $4
-
- 0x254751D0: 7D9A4214 add r12,r26,r8
- 73: GETL R26, t58
- 74: GETL R8, t60
- 75: ADDL t58, t60
- 76: PUTL t60, R12
- 77: INCEIPL $4
-
- 0x254751D4: 910B000C stw r8,12(r11)
- 78: GETL R8, t62
- 79: GETL R11, t64
- 80: ADDL $0xC, t64
- 81: STL t62, (t64)
- 82: INCEIPL $4
-
- 0x254751D8: 908B0004 stw r4,4(r11)
- 83: GETL R4, t66
- 84: GETL R11, t68
- 85: ADDL $0x4, t68
- 86: STL t66, (t68)
- 87: INCEIPL $4
-
- 0x254751DC: 390C0001 addi r8,r12,1
- 88: GETL R12, t70
- 89: ADDL $0x1, t70
- 90: PUTL t70, R8
- 91: INCEIPL $4
-
- 0x254751E0: 90CB0008 stw r6,8(r11)
- 92: GETL R6, t72
- 93: GETL R11, t74
- 94: ADDL $0x8, t74
- 95: STL t72, (t74)
- 96: INCEIPL $4
-
- 0x254751E4: 934B0010 stw r26,16(r11)
- 97: GETL R26, t76
- 98: GETL R11, t78
- 99: ADDL $0x10, t78
- 100: STL t76, (t78)
- 101: INCEIPL $4
-
- 0x254751E8: 4084001C bc 4,4,0x25475204
- 102: Jc04o $0x25475204
-
-
-. 0 2547518C 96
-. 82 FE 04 C8 39 60 00 00 1C 7D 00 14 80 FA 00 00 81 1E 01 4C 39 40 00 00 80 9E 01 94 38 C0 00 00 80 BE 01 48 91 7B 00 04 7D 2B 4B 78 91 37 01 B0 55 5B 10 3A 7C 86 38 40 7F 5B 28 2E 91 7C 00 00 3B 9C 00 04 7D 9A 42 14 91 0B 00 0C 90 8B 00 04 39 0C 00 01 90 CB 00 08 93 4B 00 10 40 84 00 1C
-
-==== BB 273 (0x254751EC) approx BBs exec'd 0 ====
-
- 0x254751EC: 7CE903A6 mtctr r7
- 0: GETL R7, t0
- 1: PUTL t0, CTR
- 2: INCEIPL $4
-
- 0x254751F0: 38000000 li r0,0
- 3: MOVL $0x0, t2
- 4: PUTL t2, R0
- 5: INCEIPL $4
-
- 0x254751F4: 392B0014 addi r9,r11,20
- 6: GETL R11, t4
- 7: ADDL $0x14, t4
- 8: PUTL t4, R9
- 9: INCEIPL $4
-
- 0x254751F8: 90090000 stw r0,0(r9)
- 10: GETL R0, t6
- 11: GETL R9, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x254751FC: 39290004 addi r9,r9,4
- 14: GETL R9, t10
- 15: ADDL $0x4, t10
- 16: PUTL t10, R9
- 17: INCEIPL $4
-
- 0x25475200: 4200FFF8 bc 16,0,0x254751F8
- 18: GETL CTR, t12
- 19: ADDL $0xFFFFFFFF, t12
- 20: PUTL t12, CTR
- 21: JIFZL t12, $0x25475204
- 22: JMPo $0x254751F8 ($4)
-
-
-. 0 254751EC 24
-. 7C E9 03 A6 38 00 00 00 39 2B 00 14 90 09 00 00 39 29 00 04 42 00 FF F8
-
-==== BB 274 (0x254751F8) approx BBs exec'd 0 ====
-
- 0x254751F8: 90090000 stw r0,0(r9)
- 0: GETL R0, t0
- 1: GETL R9, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0x254751FC: 39290004 addi r9,r9,4
- 4: GETL R9, t4
- 5: ADDL $0x4, t4
- 6: PUTL t4, R9
- 7: INCEIPL $4
-
- 0x25475200: 4200FFF8 bc 16,0,0x254751F8
- 8: GETL CTR, t6
- 9: ADDL $0xFFFFFFFF, t6
- 10: PUTL t6, CTR
- 11: JIFZL t6, $0x25475204
- 12: JMPo $0x254751F8 ($4)
-
-
-. 0 254751F8 12
-. 90 09 00 00 39 29 00 04 42 00 FF F8
-
-==== BB 275 (0x25475204) approx BBs exec'd 0 ====
-
- 0x25475204: 2F0A0001 cmpi cr6,r10,1
- 0: GETL R10, t0
- 1: MOVL $0x1, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x6, CR
- 4: INCEIPL $4
-
- 0x25475208: 394A0001 addi r10,r10,1
- 5: GETL R10, t6
- 6: ADDL $0x1, t6
- 7: PUTL t6, R10
- 8: INCEIPL $4
-
- 0x2547520C: 419A00BC bc 12,26,0x254752C8
- 9: Js26o $0x254752C8
-
-
-. 0 25475204 12
-. 2F 0A 00 01 39 4A 00 01 41 9A 00 BC
-
-==== BB 276 (0x25475210) approx BBs exec'd 0 ====
-
- 0x25475210: 7C035A14 add r0,r3,r11
- 0: GETL R3, t0
- 1: GETL R11, t2
- 2: ADDL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25475214: 280A0001 cmpli cr0,r10,1
- 5: GETL R10, t4
- 6: MOVL $0x1, t8
- 7: CMPUL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x0, CR
- 9: INCEIPL $4
-
- 0x25475218: 900B0000 stw r0,0(r11)
- 10: GETL R0, t10
- 11: GETL R11, t12
- 12: STL t10, (t12)
- 13: INCEIPL $4
-
- 0x2547521C: 7D6B1A14 add r11,r11,r3
- 14: GETL R11, t14
- 15: GETL R3, t16
- 16: ADDL t14, t16
- 17: PUTL t16, R11
- 18: INCEIPL $4
-
- 0x25475220: 40A1FF9C bc 5,1,0x254751BC
- 19: Jc01o $0x254751BC
-
-
-. 0 25475210 20
-. 7C 03 5A 14 28 0A 00 01 90 0B 00 00 7D 6B 1A 14 40 A1 FF 9C
-
-==== BB 277 (0x254751BC) approx BBs exec'd 0 ====
-
- 0x254751BC: 555B103A rlwinm r27,r10,2,0,29
- 0: GETL R10, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R27
- 3: INCEIPL $4
-
- 0x254751C0: 7C863840 cmpl cr1,r6,r7
- 4: GETL R6, t2
- 5: GETL R7, t4
- 6: CMPUL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x254751C4: 7F5B282E lwzx r26,r27,r5
- 9: GETL R5, t8
- 10: GETL R27, t10
- 11: ADDL t10, t8
- 12: LDL (t8), t12
- 13: PUTL t12, R26
- 14: INCEIPL $4
-
- 0x254751C8: 917C0000 stw r11,0(r28)
- 15: GETL R11, t14
- 16: GETL R28, t16
- 17: STL t14, (t16)
- 18: INCEIPL $4
-
- 0x254751CC: 3B9C0004 addi r28,r28,4
- 19: GETL R28, t18
- 20: ADDL $0x4, t18
- 21: PUTL t18, R28
- 22: INCEIPL $4
-
- 0x254751D0: 7D9A4214 add r12,r26,r8
- 23: GETL R26, t20
- 24: GETL R8, t22
- 25: ADDL t20, t22
- 26: PUTL t22, R12
- 27: INCEIPL $4
-
- 0x254751D4: 910B000C stw r8,12(r11)
- 28: GETL R8, t24
- 29: GETL R11, t26
- 30: ADDL $0xC, t26
- 31: STL t24, (t26)
- 32: INCEIPL $4
-
- 0x254751D8: 908B0004 stw r4,4(r11)
- 33: GETL R4, t28
- 34: GETL R11, t30
- 35: ADDL $0x4, t30
- 36: STL t28, (t30)
- 37: INCEIPL $4
-
- 0x254751DC: 390C0001 addi r8,r12,1
- 38: GETL R12, t32
- 39: ADDL $0x1, t32
- 40: PUTL t32, R8
- 41: INCEIPL $4
-
- 0x254751E0: 90CB0008 stw r6,8(r11)
- 42: GETL R6, t34
- 43: GETL R11, t36
- 44: ADDL $0x8, t36
- 45: STL t34, (t36)
- 46: INCEIPL $4
-
- 0x254751E4: 934B0010 stw r26,16(r11)
- 47: GETL R26, t38
- 48: GETL R11, t40
- 49: ADDL $0x10, t40
- 50: STL t38, (t40)
- 51: INCEIPL $4
-
- 0x254751E8: 4084001C bc 4,4,0x25475204
- 52: Jc04o $0x25475204
-
-
-. 0 254751BC 48
-. 55 5B 10 3A 7C 86 38 40 7F 5B 28 2E 91 7C 00 00 3B 9C 00 04 7D 9A 42 14 91 0B 00 0C 90 8B 00 04 39 0C 00 01 90 CB 00 08 93 4B 00 10 40 84 00 1C
-
-==== BB 278 (0x254752C8) approx BBs exec'd 0 ====
-
- 0x254752C8: 38000000 li r0,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x254752CC: 4BFFFF48 b 0x25475214
- 3: JMPo $0x25475214 ($4)
-
-
-. 0 254752C8 8
-. 38 00 00 00 4B FF FF 48
-
-==== BB 279 (0x25475214) approx BBs exec'd 0 ====
-
- 0x25475214: 280A0001 cmpli cr0,r10,1
- 0: GETL R10, t0
- 1: MOVL $0x1, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x25475218: 900B0000 stw r0,0(r11)
- 5: GETL R0, t6
- 6: GETL R11, t8
- 7: STL t6, (t8)
- 8: INCEIPL $4
-
- 0x2547521C: 7D6B1A14 add r11,r11,r3
- 9: GETL R11, t10
- 10: GETL R3, t12
- 11: ADDL t10, t12
- 12: PUTL t12, R11
- 13: INCEIPL $4
-
- 0x25475220: 40A1FF9C bc 5,1,0x254751BC
- 14: Jc01o $0x254751BC
-
-
-. 0 25475214 16
-. 28 0A 00 01 90 0B 00 00 7D 6B 1A 14 40 A1 FF 9C
-
-==== BB 280 (0x25475224) approx BBs exec'd 0 ====
-
- 0x25475224: 83B70000 lwz r29,0(r23)
- 0: GETL R23, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R29
- 3: INCEIPL $4
-
- 0x25475228: 38000009 li r0,9
- 4: MOVL $0x9, t4
- 5: PUTL t4, R0
- 6: INCEIPL $4
-
- 0x2547522C: 809E0158 lwz r4,344(r30)
- 7: GETL R30, t6
- 8: ADDL $0x158, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R4
- 11: INCEIPL $4
-
- 0x25475230: 39200000 li r9,0
- 12: MOVL $0x0, t10
- 13: PUTL t10, R9
- 14: INCEIPL $4
-
- 0x25475234: 2F9D0000 cmpi cr7,r29,0
- 15: GETL R29, t12
- 16: CMP0L t12, t14 (-rSo)
- 17: ICRFL t14, $0x7, CR
- 18: INCEIPL $4
-
- 0x25475238: 913C0000 stw r9,0(r28)
- 19: GETL R9, t16
- 20: GETL R28, t18
- 21: STL t16, (t18)
- 22: INCEIPL $4
-
- 0x2547523C: 90040000 stw r0,0(r4)
- 23: GETL R0, t20
- 24: GETL R4, t22
- 25: STL t20, (t22)
- 26: INCEIPL $4
-
- 0x25475240: 419E0028 bc 12,30,0x25475268
- 27: Js30o $0x25475268
-
-
-. 0 25475224 32
-. 83 B7 00 00 38 00 00 09 80 9E 01 58 39 20 00 00 2F 9D 00 00 91 3C 00 00 90 04 00 00 41 9E 00 28
-
-==== BB 281 (0x25475244) approx BBs exec'd 0 ====
-
- 0x25475244: 839D0094 lwz r28,148(r29)
- 0: GETL R29, t0
- 1: ADDL $0x94, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R28
- 4: INCEIPL $4
-
- 0x25475248: 2C9C0000 cmpi cr1,r28,0
- 5: GETL R28, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x2547524C: 408601BC bc 4,6,0x25475408
- 9: Jc06o $0x25475408
-
-
-. 0 25475244 12
-. 83 9D 00 94 2C 9C 00 00 40 86 01 BC
-
-==== BB 282 (0x25475250) approx BBs exec'd 0 ====
-
- 0x25475250: 817D005C lwz r11,92(r29)
- 0: GETL R29, t0
- 1: ADDL $0x5C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25475254: 3800FFFF li r0,-1
- 5: MOVL $0xFFFFFFFF, t4
- 6: PUTL t4, R0
- 7: INCEIPL $4
-
- 0x25475258: 901D01E0 stw r0,480(r29)
- 8: GETL R0, t6
- 9: GETL R29, t8
- 10: ADDL $0x1E0, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2547525C: 2F0B0000 cmpi cr6,r11,0
- 13: GETL R11, t10
- 14: CMP0L t10, t12 (-rSo)
- 15: ICRFL t12, $0x6, CR
- 16: INCEIPL $4
-
- 0x25475260: 409A0084 bc 4,26,0x254752E4
- 17: Jc26o $0x254752E4
-
-
-. 0 25475250 20
-. 81 7D 00 5C 38 00 FF FF 90 1D 01 E0 2F 0B 00 00 40 9A 00 84
-
-==== BB 283 (0x25475264) approx BBs exec'd 0 ====
-
- 0x25475264: 901D018C stw r0,396(r29)
- 0: GETL R0, t0
- 1: GETL R29, t2
- 2: ADDL $0x18C, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25475268: 2C190000 cmpi cr0,r25,0
- 5: GETL R25, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x2547526C: 41820010 bc 12,2,0x2547527C
- 9: Js02o $0x2547527C
-
-
-. 0 25475264 12
-. 90 1D 01 8C 2C 19 00 00 41 82 00 10
-
-==== BB 284 (0x25475270) approx BBs exec'd 0 ====
-
- 0x25475270: 8BB90000 lbz r29,0(r25)
- 0: GETL R25, t0
- 1: LDB (t0), t2
- 2: PUTL t2, R29
- 3: INCEIPL $4
-
- 0x25475274: 2F9D0000 cmpi cr7,r29,0
- 4: GETL R29, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x7, CR
- 7: INCEIPL $4
-
- 0x25475278: 409E0094 bc 4,30,0x2547530C
- 8: Jc30o $0x2547530C
-
-
-. 0 25475270 12
-. 8B B9 00 00 2F 9D 00 00 40 9E 00 94
-
-==== BB 285 (0x2547530C) approx BBs exec'd 0 ====
-
- 0x2547530C: 7F23CB78 or r3,r25,r25
- 0: GETL R25, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25475310: 7F3DCB78 or r29,r25,r25
- 3: GETL R25, t2
- 4: PUTL t2, R29
- 5: INCEIPL $4
-
- 0x25475314: 4800DCBD bl 0x25482FD0
- 6: MOVL $0x25475318, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0x25482FD0 ($4)
-
-
-. 0 2547530C 12
-. 7F 23 CB 78 7F 3D CB 78 48 00 DC BD
-
-==== BB 286 (0x25483008) approx BBs exec'd 0 ====
-
- 0x25483008: 3CC0FEFF lis r6,-257
- 0: MOVL $0xFEFF0000, t0
- 1: PUTL t0, R6
- 2: INCEIPL $4
-
- 0x2548300C: 38C6FEFF addi r6,r6,-257
- 3: MOVL $0xFEFEFEFF, t2
- 4: PUTL t2, R6
- 5: INCEIPL $4
-
- 0x25483010: 419D001C bc 12,29,0x2548302C
- 6: Js29o $0x2548302C
-
-
-. 0 25483008 12
-. 3C C0 FE FF 38 C6 FE FF 41 9D 00 1C
-
-==== BB 287 (0x25483014) approx BBs exec'd 0 ====
-
- 0x25483014: 85040004 lwzu r8,4(r4)
- 0: GETL R4, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R4
- 3: LDL (t0), t2
- 4: PUTL t2, R8
- 5: INCEIPL $4
-
- 0x25483018: 7CE04038 and r0,r7,r8
- 6: GETL R7, t4
- 7: GETL R8, t6
- 8: ANDL t4, t6
- 9: PUTL t6, R0
- 10: INCEIPL $4
-
- 0x2548301C: 7CEA4378 or r10,r7,r8
- 11: GETL R7, t8
- 12: GETL R8, t10
- 13: ORL t10, t8
- 14: PUTL t8, R10
- 15: INCEIPL $4
-
- 0x25483020: 7C003A14 add r0,r0,r7
- 16: GETL R0, t12
- 17: GETL R7, t14
- 18: ADDL t12, t14
- 19: PUTL t14, R0
- 20: INCEIPL $4
-
- 0x25483024: 7D4800F9 nor. r8,r10,r0
- 21: GETL R10, t16
- 22: GETL R0, t18
- 23: ORL t18, t16
- 24: NOTL t16
- 25: PUTL t16, R8
- 26: CMP0L t16, t20 (-rSo)
- 27: ICRFL t20, $0x0, CR
- 28: INCEIPL $4
-
- 0x25483028: 4082004C bc 4,2,0x25483074
- 29: Jc02o $0x25483074
-
-
-. 0 25483014 24
-. 85 04 00 04 7C E0 40 38 7C EA 43 78 7C 00 3A 14 7D 48 00 F9 40 82 00 4C
-
-==== BB 288 (0x2548302C) approx BBs exec'd 0 ====
-
- 0x2548302C: 81040004 lwz r8,4(r4)
- 0: GETL R4, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x25483030: 85240008 lwzu r9,8(r4)
- 5: GETL R4, t4
- 6: ADDL $0x8, t4
- 7: PUTL t4, R4
- 8: LDL (t4), t6
- 9: PUTL t6, R9
- 10: INCEIPL $4
-
- 0x25483034: 7C064214 add r0,r6,r8
- 11: GETL R6, t8
- 12: GETL R8, t10
- 13: ADDL t8, t10
- 14: PUTL t10, R0
- 15: INCEIPL $4
-
- 0x25483038: 7CEA40F8 nor r10,r7,r8
- 16: GETL R7, t12
- 17: GETL R8, t14
- 18: ORL t14, t12
- 19: NOTL t12
- 20: PUTL t12, R10
- 21: INCEIPL $4
-
- 0x2548303C: 7C005039 and. r0,r0,r10
- 22: GETL R0, t16
- 23: GETL R10, t18
- 24: ANDL t16, t18
- 25: PUTL t18, R0
- 26: CMP0L t18, t20 (-rSo)
- 27: ICRFL t20, $0x0, CR
- 28: INCEIPL $4
-
- 0x25483040: 7D664A14 add r11,r6,r9
- 29: GETL R6, t22
- 30: GETL R9, t24
- 31: ADDL t22, t24
- 32: PUTL t24, R11
- 33: INCEIPL $4
-
- 0x25483044: 7CEC48F8 nor r12,r7,r9
- 34: GETL R7, t26
- 35: GETL R9, t28
- 36: ORL t28, t26
- 37: NOTL t26
- 38: PUTL t26, R12
- 39: INCEIPL $4
-
- 0x25483048: 4082001C bc 4,2,0x25483064
- 40: Jc02o $0x25483064
-
-
-. 0 2548302C 32
-. 81 04 00 04 85 24 00 08 7C 06 42 14 7C EA 40 F8 7C 00 50 39 7D 66 4A 14 7C EC 48 F8 40 82 00 1C
-
-==== BB 289 (0x2548304C) approx BBs exec'd 0 ====
-
- 0x2548304C: 7D606039 and. r0,r11,r12
- 0: GETL R11, t0
- 1: GETL R12, t2
- 2: ANDL t0, t2
- 3: PUTL t2, R0
- 4: CMP0L t2, t4 (-rSo)
- 5: ICRFL t4, $0x0, CR
- 6: INCEIPL $4
-
- 0x25483050: 4182FFDC bc 12,2,0x2548302C
- 7: Js02o $0x2548302C
-
-
-. 0 2548304C 8
-. 7D 60 60 39 41 82 FF DC
-
-==== BB 290 (0x25483064) approx BBs exec'd 0 ====
-
- 0x25483064: 7CE04038 and r0,r7,r8
- 0: GETL R7, t0
- 1: GETL R8, t2
- 2: ANDL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25483068: 3884FFFC addi r4,r4,-4
- 5: GETL R4, t4
- 6: ADDL $0xFFFFFFFC, t4
- 7: PUTL t4, R4
- 8: INCEIPL $4
-
- 0x2548306C: 7C003A14 add r0,r0,r7
- 9: GETL R0, t6
- 10: GETL R7, t8
- 11: ADDL t6, t8
- 12: PUTL t8, R0
- 13: INCEIPL $4
-
- 0x25483070: 7D480078 andc r8,r10,r0
- 14: GETL R10, t10
- 15: GETL R0, t12
- 16: NOTL t12
- 17: ANDL t10, t12
- 18: PUTL t12, R8
- 19: INCEIPL $4
-
- 0x25483074: 7D0B0034 cntlzw r11,r8
- 20: GETL R8, t14
- 21: CNTLZL t14
- 22: PUTL t14, R11
- 23: INCEIPL $4
-
- 0x25483078: 7C032050 subf r0,r3,r4
- 24: GETL R3, t16
- 25: GETL R4, t18
- 26: SUBL t16, t18
- 27: PUTL t18, R0
- 28: INCEIPL $4
-
- 0x2548307C: 556BE8FE rlwinm r11,r11,29,3,31
- 29: GETL R11, t20
- 30: SHRL $0x3, t20
- 31: PUTL t20, R11
- 32: INCEIPL $4
-
- 0x25483080: 7C605A14 add r3,r0,r11
- 33: GETL R0, t22
- 34: GETL R11, t24
- 35: ADDL t22, t24
- 36: PUTL t24, R3
- 37: INCEIPL $4
-
- 0x25483084: 4E800020 blr
- 38: GETL LR, t26
- 39: JMPo-r t26 ($4)
-
-
-. 0 25483064 36
-. 7C E0 40 38 38 84 FF FC 7C 00 3A 14 7D 48 00 78 7D 0B 00 34 7C 03 20 50 55 6B E8 FE 7C 60 5A 14 4E 80 00 20
-
-==== BB 291 (0x25475318) approx BBs exec'd 0 ====
-
- 0x25475318: 7FA4EB78 or r4,r29,r29
- 0: GETL R29, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x2547531C: 3B63001F addi r27,r3,31
- 3: GETL R3, t2
- 4: ADDL $0x1F, t2
- 5: PUTL t2, R27
- 6: INCEIPL $4
-
- 0x25475320: 81810000 lwz r12,0(r1)
- 7: GETL R1, t4
- 8: LDL (t4), t6
- 9: PUTL t6, R12
- 10: INCEIPL $4
-
- 0x25475324: 577A0036 rlwinm r26,r27,0,0,27
- 11: GETL R27, t8
- 12: ANDL $0xFFFFFFF0, t8
- 13: PUTL t8, R26
- 14: INCEIPL $4
-
- 0x25475328: 7C791B78 or r25,r3,r3
- 15: GETL R3, t10
- 16: PUTL t10, R25
- 17: INCEIPL $4
-
- 0x2547532C: 7D7A00D0 neg r11,r26
- 18: GETL R26, t12
- 19: NEGL t12
- 20: PUTL t12, R11
- 21: INCEIPL $4
-
- 0x25475330: 38B90001 addi r5,r25,1
- 22: GETL R25, t14
- 23: ADDL $0x1, t14
- 24: PUTL t14, R5
- 25: INCEIPL $4
-
- 0x25475334: 7D81596E stwux r12,r1,r11
- 26: GETL R11, t16
- 27: GETL R1, t18
- 28: ADDL t18, t16
- 29: PUTL t16, R1
- 30: GETL R12, t20
- 31: STL t20, (t16)
- 32: INCEIPL $4
-
- 0x25475338: 39410017 addi r10,r1,23
- 33: GETL R1, t22
- 34: ADDL $0x17, t22
- 35: PUTL t22, R10
- 36: INCEIPL $4
-
- 0x2547533C: 55430036 rlwinm r3,r10,0,0,27
- 37: GETL R10, t24
- 38: ANDL $0xFFFFFFF0, t24
- 39: PUTL t24, R3
- 40: INCEIPL $4
-
- 0x25475340: 4800E8A1 bl 0x25483BE0
- 41: MOVL $0x25475344, t26
- 42: PUTL t26, LR
- 43: JMPo-c $0x25483BE0 ($4)
-
-
-. 0 25475318 44
-. 7F A4 EB 78 3B 63 00 1F 81 81 00 00 57 7A 00 36 7C 79 1B 78 7D 7A 00 D0 38 B9 00 01 7D 81 59 6E 39 41 00 17 55 43 00 36 48 00 E8 A1
-
-==== BB 292 (0x25483D00) approx BBs exec'd 0 ====
-
- 0x25483D00: 81240000 lwz r9,0(r4)
- 0: GETL R4, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0x25483D04: 38A5FFFF addi r5,r5,-1
- 4: GETL R5, t4
- 5: ADDL $0xFFFFFFFF, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x25483D08: 38840004 addi r4,r4,4
- 8: GETL R4, t6
- 9: ADDL $0x4, t6
- 10: PUTL t6, R4
- 11: INCEIPL $4
-
- 0x25483D0C: 80040000 lwz r0,0(r4)
- 12: GETL R4, t8
- 13: LDL (t8), t10
- 14: PUTL t10, R0
- 15: INCEIPL $4
-
- 0x25483D10: 91230000 stw r9,0(r3)
- 16: GETL R9, t12
- 17: GETL R3, t14
- 18: STL t12, (t14)
- 19: INCEIPL $4
-
- 0x25483D14: 81240004 lwz r9,4(r4)
- 20: GETL R4, t16
- 21: ADDL $0x4, t16
- 22: LDL (t16), t18
- 23: PUTL t18, R9
- 24: INCEIPL $4
-
- 0x25483D18: 90030004 stw r0,4(r3)
- 25: GETL R0, t20
- 26: GETL R3, t22
- 27: ADDL $0x4, t22
- 28: STL t20, (t22)
- 29: INCEIPL $4
-
- 0x25483D1C: 80040008 lwz r0,8(r4)
- 30: GETL R4, t24
- 31: ADDL $0x8, t24
- 32: LDL (t24), t26
- 33: PUTL t26, R0
- 34: INCEIPL $4
-
- 0x25483D20: 91230008 stw r9,8(r3)
- 35: GETL R9, t28
- 36: GETL R3, t30
- 37: ADDL $0x8, t30
- 38: STL t28, (t30)
- 39: INCEIPL $4
-
- 0x25483D24: 8124000C lwz r9,12(r4)
- 40: GETL R4, t32
- 41: ADDL $0xC, t32
- 42: LDL (t32), t34
- 43: PUTL t34, R9
- 44: INCEIPL $4
-
- 0x25483D28: 9003000C stw r0,12(r3)
- 45: GETL R0, t36
- 46: GETL R3, t38
- 47: ADDL $0xC, t38
- 48: STL t36, (t38)
- 49: INCEIPL $4
-
- 0x25483D2C: 80040010 lwz r0,16(r4)
- 50: GETL R4, t40
- 51: ADDL $0x10, t40
- 52: LDL (t40), t42
- 53: PUTL t42, R0
- 54: INCEIPL $4
-
- 0x25483D30: 91230010 stw r9,16(r3)
- 55: GETL R9, t44
- 56: GETL R3, t46
- 57: ADDL $0x10, t46
- 58: STL t44, (t46)
- 59: INCEIPL $4
-
- 0x25483D34: 81240014 lwz r9,20(r4)
- 60: GETL R4, t48
- 61: ADDL $0x14, t48
- 62: LDL (t48), t50
- 63: PUTL t50, R9
- 64: INCEIPL $4
-
- 0x25483D38: 90030014 stw r0,20(r3)
- 65: GETL R0, t52
- 66: GETL R3, t54
- 67: ADDL $0x14, t54
- 68: STL t52, (t54)
- 69: INCEIPL $4
-
- 0x25483D3C: 80040018 lwz r0,24(r4)
- 70: GETL R4, t56
- 71: ADDL $0x18, t56
- 72: LDL (t56), t58
- 73: PUTL t58, R0
- 74: INCEIPL $4
-
- 0x25483D40: 91230018 stw r9,24(r3)
- 75: GETL R9, t60
- 76: GETL R3, t62
- 77: ADDL $0x18, t62
- 78: STL t60, (t62)
- 79: INCEIPL $4
-
- 0x25483D44: 34A5FFF8 addic. r5,r5,-8
- 80: GETL R5, t64
- 81: ADCL $0xFFFFFFF8, t64 (-wCa)
- 82: PUTL t64, R5
- 83: CMP0L t64, t66 (-rSo)
- 84: ICRFL t66, $0x0, CR
- 85: INCEIPL $4
-
- 0x25483D48: 8124001C lwz r9,28(r4)
- 86: GETL R4, t68
- 87: ADDL $0x1C, t68
- 88: LDL (t68), t70
- 89: PUTL t70, R9
- 90: INCEIPL $4
-
- 0x25483D4C: 9003001C stw r0,28(r3)
- 91: GETL R0, t72
- 92: GETL R3, t74
- 93: ADDL $0x1C, t74
- 94: STL t72, (t74)
- 95: INCEIPL $4
-
- 0x25483D50: 38840020 addi r4,r4,32
- 96: GETL R4, t76
- 97: ADDL $0x20, t76
- 98: PUTL t76, R4
- 99: INCEIPL $4
-
- 0x25483D54: 38630020 addi r3,r3,32
- 100: GETL R3, t78
- 101: ADDL $0x20, t78
- 102: PUTL t78, R3
- 103: INCEIPL $4
-
- 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
- 104: Jc02o $0x25483D0C
-
-
-. 0 25483D00 92
-. 81 24 00 00 38 A5 FF FF 38 84 00 04 80 04 00 00 91 23 00 00 81 24 00 04 90 03 00 04 80 04 00 08 91 23 00 08 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
-
-==== BB 293 (0x25475344) approx BBs exec'd 0 ====
-
- 0x25475344: 893D0000 lbz r9,0(r29)
- 0: GETL R29, t0
- 1: LDB (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0x25475348: 7C7C1B78 or r28,r3,r3
- 4: GETL R3, t4
- 5: PUTL t4, R28
- 6: INCEIPL $4
-
- 0x2547534C: 38600001 li r3,1
- 7: MOVL $0x1, t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x25475350: 48000018 b 0x25475368
- 10: JMPo $0x25475368 ($4)
-
-
-. 0 25475344 16
-. 89 3D 00 00 7C 7C 1B 78 38 60 00 01 48 00 00 18
-
-==== BB 294 (0x25475368) approx BBs exec'd 0 ====
-
- 0x25475368: 2C890000 cmpi cr1,r9,0
- 0: GETL R9, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x2547536C: 4086FFE8 bc 4,6,0x25475354
- 4: Jc06o $0x25475354
-
-
-. 0 25475368 8
-. 2C 89 00 00 40 86 FF E8
-
-==== BB 295 (0x25475354) approx BBs exec'd 0 ====
-
- 0x25475354: 3809FFC6 addi r0,r9,-58
- 0: GETL R9, t0
- 1: ADDL $0xFFFFFFC6, t0
- 2: PUTL t0, R0
- 3: INCEIPL $4
-
- 0x25475358: 8D3D0001 lbzu r9,1(r29)
- 4: GETL R29, t2
- 5: ADDL $0x1, t2
- 6: PUTL t2, R29
- 7: LDB (t2), t4
- 8: PUTL t4, R9
- 9: INCEIPL $4
-
- 0x2547535C: 20800001 subfic r4,r0,1
- 10: GETL R0, t6
- 11: MOVL $0x1, t8
- 12: SBBL t6, t8 (-wCa)
- 13: PUTL t8, R4
- 14: INCEIPL $4
-
- 0x25475360: 7C830194 addze r4,r3
- 15: GETL R3, t10
- 16: ADCL $0x0, t10 (-rCa-wCa)
- 17: PUTL t10, R4
- 18: INCEIPL $4
-
- 0x25475364: 7C832378 or r3,r4,r4
- 19: GETL R4, t12
- 20: PUTL t12, R3
- 21: INCEIPL $4
-
- 0x25475368: 2C890000 cmpi cr1,r9,0
- 22: GETL R9, t14
- 23: CMP0L t14, t16 (-rSo)
- 24: ICRFL t16, $0x1, CR
- 25: INCEIPL $4
-
- 0x2547536C: 4086FFE8 bc 4,6,0x25475354
- 26: Jc06o $0x25475354
-
-
-. 0 25475354 28
-. 38 09 FF C6 8D 3D 00 01 20 80 00 01 7C 83 01 94 7C 83 23 78 2C 89 00 00 40 86 FF E8
-
-==== BB 296 (0x25475370) approx BBs exec'd 0 ====
-
- 0x25475370: 5469103A rlwinm r9,r3,2,0,29
- 0: GETL R3, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R9
- 3: INCEIPL $4
-
- 0x25475374: 83BE0168 lwz r29,360(r30)
- 4: GETL R30, t2
- 5: ADDL $0x168, t2
- 6: LDL (t2), t4
- 7: PUTL t4, R29
- 8: INCEIPL $4
-
- 0x25475378: 38690004 addi r3,r9,4
- 9: GETL R9, t6
- 10: ADDL $0x4, t6
- 11: PUTL t6, R3
- 12: INCEIPL $4
-
- 0x2547537C: 480226A9 bl 0x25497A24
- 13: MOVL $0x25475380, t8
- 14: PUTL t8, LR
- 15: JMPo-c $0x25497A24 ($4)
-
-
-. 0 25475370 16
-. 54 69 10 3A 83 BE 01 68 38 69 00 04 48 02 26 A9
-
-==== BB 297 (0x25475380) approx BBs exec'd 0 ====
-
- 0x25475380: 80DE0188 lwz r6,392(r30)
- 0: GETL R30, t0
- 1: ADDL $0x188, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x25475384: 2F030000 cmpi cr6,r3,0
- 5: GETL R3, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x25475388: 7C641B78 or r4,r3,r3
- 9: GETL R3, t8
- 10: PUTL t8, R4
- 11: INCEIPL $4
-
- 0x2547538C: 907D0000 stw r3,0(r29)
- 12: GETL R3, t10
- 13: GETL R29, t12
- 14: STL t10, (t12)
- 15: INCEIPL $4
-
- 0x25475390: 41BAFF44 bc 13,26,0x254752D4
- 16: Js26o $0x254752D4
-
-
-. 0 25475380 20
-. 80 DE 01 88 2F 03 00 00 7C 64 1B 78 90 7D 00 00 41 BA FF 44
-
-==== BB 298 (0x25475394) approx BBs exec'd 0 ====
-
- 0x25475394: 807E04B4 lwz r3,1204(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4B4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25475398: 39000000 li r8,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R8
- 7: INCEIPL $4
-
- 0x2547539C: 80BE01A0 lwz r5,416(r30)
- 8: GETL R30, t6
- 9: ADDL $0x1A0, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R5
- 12: INCEIPL $4
-
- 0x254753A0: 80C30000 lwz r6,0(r3)
- 13: GETL R3, t10
- 14: LDL (t10), t12
- 15: PUTL t12, R6
- 16: INCEIPL $4
-
- 0x254753A4: 7F83E378 or r3,r28,r28
- 17: GETL R28, t14
- 18: PUTL t14, R3
- 19: INCEIPL $4
-
- 0x254753A8: 80FE01A4 lwz r7,420(r30)
- 20: GETL R30, t16
- 21: ADDL $0x1A4, t16
- 22: LDL (t16), t18
- 23: PUTL t18, R7
- 24: INCEIPL $4
-
- 0x254753AC: 4BFFF79D bl 0x25474B48
- 25: MOVL $0x254753B0, t20
- 26: PUTL t20, LR
- 27: JMPo-c $0x25474B48 ($4)
-
-
-. 0 25475394 28
-. 80 7E 04 B4 39 00 00 00 80 BE 01 A0 80 C3 00 00 7F 83 E3 78 80 FE 01 A4 4B FF F7 9D
-
-==== BB 299 fillin_rpath(0x25474B48) approx BBs exec'd 0 ====
-
- 0x25474B48: 9421FFA0 stwu r1,-96(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFA0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25474B4C: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x25474B50: 480224B1 bl 0x25497000
- 9: MOVL $0x25474B54, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 25474B48 12
-. 94 21 FF A0 7C 08 02 A6 48 02 24 B1
-
-==== BB 300 (0x25474B54) approx BBs exec'd 0 ====
-
- 0x25474B54: 93C10058 stw r30,88(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x58, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25474B58: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x25474B5C: 7D800026 mfcr r12
- 8: GETL CR, t6
- 9: PUTL t6, R12
- 10: INCEIPL $4
-
- 0x25474B60: 91E1001C stw r15,28(r1)
- 11: GETL R15, t8
- 12: GETL R1, t10
- 13: ADDL $0x1C, t10
- 14: STL t8, (t10)
- 15: INCEIPL $4
-
- 0x25474B64: 2D880000 cmpi cr3,r8,0
- 16: GETL R8, t12
- 17: CMP0L t12, t14 (-rSo)
- 18: ICRFL t14, $0x3, CR
- 19: INCEIPL $4
-
- 0x25474B68: 92010020 stw r16,32(r1)
- 20: GETL R16, t16
- 21: GETL R1, t18
- 22: ADDL $0x20, t18
- 23: STL t16, (t18)
- 24: INCEIPL $4
-
- 0x25474B6C: 92210024 stw r17,36(r1)
- 25: GETL R17, t20
- 26: GETL R1, t22
- 27: ADDL $0x24, t22
- 28: STL t20, (t22)
- 29: INCEIPL $4
-
- 0x25474B70: 92410028 stw r18,40(r1)
- 30: GETL R18, t24
- 31: GETL R1, t26
- 32: ADDL $0x28, t26
- 33: STL t24, (t26)
- 34: INCEIPL $4
-
- 0x25474B74: 81FE0148 lwz r15,328(r30)
- 35: GETL R30, t28
- 36: ADDL $0x148, t28
- 37: LDL (t28), t30
- 38: PUTL t30, R15
- 39: INCEIPL $4
-
- 0x25474B78: 823E04C8 lwz r17,1224(r30)
- 40: GETL R30, t32
- 41: ADDL $0x4C8, t32
- 42: LDL (t32), t34
- 43: PUTL t34, R17
- 44: INCEIPL $4
-
- 0x25474B7C: 821E0154 lwz r16,340(r30)
- 45: GETL R30, t36
- 46: ADDL $0x154, t36
- 47: LDL (t36), t38
- 48: PUTL t38, R16
- 49: INCEIPL $4
-
- 0x25474B80: 825E0158 lwz r18,344(r30)
- 50: GETL R30, t40
- 51: ADDL $0x158, t40
- 52: LDL (t40), t42
- 53: PUTL t42, R18
- 54: INCEIPL $4
-
- 0x25474B84: 9261002C stw r19,44(r1)
- 55: GETL R19, t44
- 56: GETL R1, t46
- 57: ADDL $0x2C, t46
- 58: STL t44, (t46)
- 59: INCEIPL $4
-
- 0x25474B88: 7CF33B78 or r19,r7,r7
- 60: GETL R7, t48
- 61: PUTL t48, R19
- 62: INCEIPL $4
-
- 0x25474B8C: 92810030 stw r20,48(r1)
- 63: GETL R20, t50
- 64: GETL R1, t52
- 65: ADDL $0x30, t52
- 66: STL t50, (t52)
- 67: INCEIPL $4
-
- 0x25474B90: 7CD43378 or r20,r6,r6
- 68: GETL R6, t54
- 69: PUTL t54, R20
- 70: INCEIPL $4
-
- 0x25474B94: 92A10034 stw r21,52(r1)
- 71: GETL R21, t56
- 72: GETL R1, t58
- 73: ADDL $0x34, t58
- 74: STL t56, (t58)
- 75: INCEIPL $4
-
- 0x25474B98: 7CB52B78 or r21,r5,r5
- 76: GETL R5, t60
- 77: PUTL t60, R21
- 78: INCEIPL $4
-
- 0x25474B9C: 92C10038 stw r22,56(r1)
- 79: GETL R22, t62
- 80: GETL R1, t64
- 81: ADDL $0x38, t64
- 82: STL t62, (t64)
- 83: INCEIPL $4
-
- 0x25474BA0: 7C962378 or r22,r4,r4
- 84: GETL R4, t66
- 85: PUTL t66, R22
- 86: INCEIPL $4
-
- 0x25474BA4: 92E1003C stw r23,60(r1)
- 87: GETL R23, t68
- 88: GETL R1, t70
- 89: ADDL $0x3C, t70
- 90: STL t68, (t70)
- 91: INCEIPL $4
-
- 0x25474BA8: 7D174378 or r23,r8,r8
- 92: GETL R8, t72
- 93: PUTL t72, R23
- 94: INCEIPL $4
-
- 0x25474BAC: 93010040 stw r24,64(r1)
- 95: GETL R24, t74
- 96: GETL R1, t76
- 97: ADDL $0x40, t76
- 98: STL t74, (t76)
- 99: INCEIPL $4
-
- 0x25474BB0: 3B000000 li r24,0
- 100: MOVL $0x0, t78
- 101: PUTL t78, R24
- 102: INCEIPL $4
-
- 0x25474BB4: 93210044 stw r25,68(r1)
- 103: GETL R25, t80
- 104: GETL R1, t82
- 105: ADDL $0x44, t82
- 106: STL t80, (t82)
- 107: INCEIPL $4
-
- 0x25474BB8: 93410048 stw r26,72(r1)
- 108: GETL R26, t84
- 109: GETL R1, t86
- 110: ADDL $0x48, t86
- 111: STL t84, (t86)
- 112: INCEIPL $4
-
- 0x25474BBC: 9361004C stw r27,76(r1)
- 113: GETL R27, t88
- 114: GETL R1, t90
- 115: ADDL $0x4C, t90
- 116: STL t88, (t90)
- 117: INCEIPL $4
-
- 0x25474BC0: 93810050 stw r28,80(r1)
- 118: GETL R28, t92
- 119: GETL R1, t94
- 120: ADDL $0x50, t94
- 121: STL t92, (t94)
- 122: INCEIPL $4
-
- 0x25474BC4: 93A10054 stw r29,84(r1)
- 123: GETL R29, t96
- 124: GETL R1, t98
- 125: ADDL $0x54, t98
- 126: STL t96, (t98)
- 127: INCEIPL $4
-
- 0x25474BC8: 93E1005C stw r31,92(r1)
- 128: GETL R31, t100
- 129: GETL R1, t102
- 130: ADDL $0x5C, t102
- 131: STL t100, (t102)
- 132: INCEIPL $4
-
- 0x25474BCC: 90010064 stw r0,100(r1)
- 133: GETL R0, t104
- 134: GETL R1, t106
- 135: ADDL $0x64, t106
- 136: STL t104, (t106)
- 137: INCEIPL $4
-
- 0x25474BD0: 91810018 stw r12,24(r1)
- 138: GETL R12, t108
- 139: GETL R1, t110
- 140: ADDL $0x18, t110
- 141: STL t108, (t110)
- 142: INCEIPL $4
-
- 0x25474BD4: 90610008 stw r3,8(r1)
- 143: GETL R3, t112
- 144: GETL R1, t114
- 145: ADDL $0x8, t114
- 146: STL t112, (t114)
- 147: INCEIPL $4
-
- 0x25474BD8: 38610008 addi r3,r1,8
- 148: GETL R1, t116
- 149: ADDL $0x8, t116
- 150: PUTL t116, R3
- 151: INCEIPL $4
-
- 0x25474BDC: 7EA4AB78 or r4,r21,r21
- 152: GETL R21, t118
- 153: PUTL t118, R4
- 154: INCEIPL $4
-
- 0x25474BE0: 4800B75D bl 0x2548033C
- 155: MOVL $0x25474BE4, t120
- 156: PUTL t120, LR
- 157: JMPo-c $0x2548033C ($4)
-
-
-. 0 25474B54 144
-. 93 C1 00 58 7F C8 02 A6 7D 80 00 26 91 E1 00 1C 2D 88 00 00 92 01 00 20 92 21 00 24 92 41 00 28 81 FE 01 48 82 3E 04 C8 82 1E 01 54 82 5E 01 58 92 61 00 2C 7C F3 3B 78 92 81 00 30 7C D4 33 78 92 A1 00 34 7C B5 2B 78 92 C1 00 38 7C 96 23 78 92 E1 00 3C 7D 17 43 78 93 01 00 40 3B 00 00 00 93 21 00 44 93 41 00 48 93 61 00 4C 93 81 00 50 93 A1 00 54 93 E1 00 5C 90 01 00 64 91 81 00 18 90 61 00 08 38 61 00 08 7E A4 AB 78 48 00 B7 5D
-
-==== BB 301 __strsep_g(0x2548033C) approx BBs exec'd 0 ====
-
- 0x2548033C: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25480340: 7C681B78 or r8,r3,r3
- 6: GETL R3, t4
- 7: PUTL t4, R8
- 8: INCEIPL $4
-
- 0x25480344: 80630000 lwz r3,0(r3)
- 9: GETL R3, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R3
- 12: INCEIPL $4
-
- 0x25480348: 2F830000 cmpi cr7,r3,0
- 13: GETL R3, t10
- 14: CMP0L t10, t12 (-rSo)
- 15: ICRFL t12, $0x7, CR
- 16: INCEIPL $4
-
- 0x2548034C: 419E0054 bc 12,30,0x254803A0
- 17: Js30o $0x254803A0
-
-
-. 0 2548033C 20
-. 94 21 FF F0 7C 68 1B 78 80 63 00 00 2F 83 00 00 41 9E 00 54
-
-==== BB 302 (0x25480350) approx BBs exec'd 0 ====
-
- 0x25480350: 88030000 lbz r0,0(r3)
- 0: GETL R3, t0
- 1: LDB (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x25480354: 7C6A1B78 or r10,r3,r3
- 4: GETL R3, t4
- 5: PUTL t4, R10
- 6: INCEIPL $4
-
- 0x25480358: 39200000 li r9,0
- 7: MOVL $0x0, t6
- 8: PUTL t6, R9
- 9: INCEIPL $4
-
- 0x2548035C: 2C000000 cmpi cr0,r0,0
- 10: GETL R0, t8
- 11: CMP0L t8, t10 (-rSo)
- 12: ICRFL t10, $0x0, CR
- 13: INCEIPL $4
-
- 0x25480360: 4182003C bc 12,2,0x2548039C
- 14: Js02o $0x2548039C
-
-
-. 0 25480350 20
-. 88 03 00 00 7C 6A 1B 78 39 20 00 00 2C 00 00 00 41 82 00 3C
-
-==== BB 303 (0x25480364) approx BBs exec'd 0 ====
-
- 0x25480364: 7C0B0378 or r11,r0,r0
- 0: GETL R0, t0
- 1: PUTL t0, R11
- 2: INCEIPL $4
-
- 0x25480368: 88040000 lbz r0,0(r4)
- 3: GETL R4, t2
- 4: LDB (t2), t4
- 5: PUTL t4, R0
- 6: INCEIPL $4
-
- 0x2548036C: 7C892378 or r9,r4,r4
- 7: GETL R4, t6
- 8: PUTL t6, R9
- 9: INCEIPL $4
-
- 0x25480370: 7C805800 cmp cr1,r0,r11
- 10: GETL R0, t8
- 11: GETL R11, t10
- 12: CMPL t8, t10, t12 (-rSo)
- 13: ICRFL t12, $0x1, CR
- 14: INCEIPL $4
-
- 0x25480374: 41860010 bc 12,6,0x25480384
- 15: Js06o $0x25480384
-
-
-. 0 25480364 20
-. 7C 0B 03 78 88 04 00 00 7C 89 23 78 7C 80 58 00 41 86 00 10
-
-==== BB 304 (0x25480378) approx BBs exec'd 0 ====
-
- 0x25480378: 8C090001 lbzu r0,1(r9)
- 0: GETL R9, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R9
- 3: LDB (t0), t2
- 4: PUTL t2, R0
- 5: INCEIPL $4
-
- 0x2548037C: 2F000000 cmpi cr6,r0,0
- 6: GETL R0, t4
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x6, CR
- 9: INCEIPL $4
-
- 0x25480380: 409AFFF0 bc 4,26,0x25480370
- 10: Jc26o $0x25480370
-
-
-. 0 25480378 12
-. 8C 09 00 01 2F 00 00 00 40 9A FF F0
-
-==== BB 305 (0x25480370) approx BBs exec'd 0 ====
-
- 0x25480370: 7C805800 cmp cr1,r0,r11
- 0: GETL R0, t0
- 1: GETL R11, t2
- 2: CMPL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x1, CR
- 4: INCEIPL $4
-
- 0x25480374: 41860010 bc 12,6,0x25480384
- 5: Js06o $0x25480384
-
-
-. 0 25480370 8
-. 7C 80 58 00 41 86 00 10
-
-==== BB 306 (0x25480384) approx BBs exec'd 0 ====
-
- 0x25480384: 2F800000 cmpi cr7,r0,0
- 0: GETL R0, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x25480388: 409E0020 bc 4,30,0x254803A8
- 4: Jc30o $0x254803A8
-
-
-. 0 25480384 8
-. 2F 80 00 00 40 9E 00 20
-
-==== BB 307 (0x2548038C) approx BBs exec'd 0 ====
-
- 0x2548038C: 8D6A0001 lbzu r11,1(r10)
- 0: GETL R10, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R10
- 3: LDB (t0), t2
- 4: PUTL t2, R11
- 5: INCEIPL $4
-
- 0x25480390: 2C0B0000 cmpi cr0,r11,0
- 6: GETL R11, t4
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x0, CR
- 9: INCEIPL $4
-
- 0x25480394: 4082FFD4 bc 4,2,0x25480368
- 10: Jc02o $0x25480368
-
-
-. 0 2548038C 12
-. 8D 6A 00 01 2C 0B 00 00 40 82 FF D4
-
-==== BB 308 (0x25480368) approx BBs exec'd 0 ====
-
- 0x25480368: 88040000 lbz r0,0(r4)
- 0: GETL R4, t0
- 1: LDB (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x2548036C: 7C892378 or r9,r4,r4
- 4: GETL R4, t4
- 5: PUTL t4, R9
- 6: INCEIPL $4
-
- 0x25480370: 7C805800 cmp cr1,r0,r11
- 7: GETL R0, t6
- 8: GETL R11, t8
- 9: CMPL t6, t8, t10 (-rSo)
- 10: ICRFL t10, $0x1, CR
- 11: INCEIPL $4
-
- 0x25480374: 41860010 bc 12,6,0x25480384
- 12: Js06o $0x25480384
-
-
-. 0 25480368 16
-. 88 04 00 00 7C 89 23 78 7C 80 58 00 41 86 00 10
-
-==== BB 309 (0x254803A8) approx BBs exec'd 0 ====
-
- 0x254803A8: 392A0001 addi r9,r10,1
- 0: GETL R10, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R9
- 3: INCEIPL $4
-
- 0x254803AC: 38000000 li r0,0
- 4: MOVL $0x0, t2
- 5: PUTL t2, R0
- 6: INCEIPL $4
-
- 0x254803B0: 980A0000 stb r0,0(r10)
- 7: GETL R0, t4
- 8: GETL R10, t6
- 9: STB t4, (t6)
- 10: INCEIPL $4
-
- 0x254803B4: 91280000 stw r9,0(r8)
- 11: GETL R9, t8
- 12: GETL R8, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x254803B8: 4BFFFFE8 b 0x254803A0
- 15: JMPo $0x254803A0 ($4)
-
-
-. 0 254803A8 20
-. 39 2A 00 01 38 00 00 00 98 0A 00 00 91 28 00 00 4B FF FF E8
-
-==== BB 310 (0x254803A0) approx BBs exec'd 0 ====
-
- 0x254803A0: 38210010 addi r1,r1,16
- 0: GETL R1, t0
- 1: ADDL $0x10, t0
- 2: PUTL t0, R1
- 3: INCEIPL $4
-
- 0x254803A4: 4E800020 blr
- 4: GETL LR, t2
- 5: JMPo-r t2 ($4)
-
-
-. 0 254803A0 8
-. 38 21 00 10 4E 80 00 20
-
-==== BB 311 (0x25474BE4) approx BBs exec'd 0 ====
-
- 0x25474BE4: 2E030000 cmpi cr4,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x4, CR
- 3: INCEIPL $4
-
- 0x25474BE8: 7C7F1B78 or r31,r3,r3
- 4: GETL R3, t4
- 5: PUTL t4, R31
- 6: INCEIPL $4
-
- 0x25474BEC: 7C7C1B78 or r28,r3,r3
- 7: GETL R3, t6
- 8: PUTL t6, R28
- 9: INCEIPL $4
-
- 0x25474BF0: 4192014C bc 12,18,0x25474D3C
- 10: Js18o $0x25474D3C
-
-
-. 0 25474BE4 16
-. 2E 03 00 00 7C 7F 1B 78 7C 7C 1B 78 41 92 01 4C
-
-==== BB 312 (0x25474BF4) approx BBs exec'd 0 ====
-
- 0x25474BF4: 4800E3DD bl 0x25482FD0
- 0: MOVL $0x25474BF8, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x25482FD0 ($4)
-
-
-. 0 25474BF4 4
-. 48 00 E3 DD
-
-==== BB 313 (0x25474BF8) approx BBs exec'd 0 ====
-
- 0x25474BF8: 7C7D1B79 or. r29,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R29
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x25474BFC: 408201A8 bc 4,2,0x25474DA4
- 5: Jc02o $0x25474DA4
-
-
-. 0 25474BF8 8
-. 7C 7D 1B 79 40 82 01 A8
-
-==== BB 314 (0x25474DA4) approx BBs exec'd 0 ====
-
- 0x25474DA4: 2B9D0001 cmpli cr7,r29,1
- 0: GETL R29, t0
- 1: MOVL $0x1, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0x25474DA8: 409D0024 bc 4,29,0x25474DCC
- 5: Jc29o $0x25474DCC
-
-
-. 0 25474DA4 8
-. 2B 9D 00 01 40 9D 00 24
-
-==== BB 315 (0x25474DAC) approx BBs exec'd 0 ====
-
- 0x25474DAC: 7D3FEA14 add r9,r31,r29
- 0: GETL R31, t0
- 1: GETL R29, t2
- 2: ADDL t0, t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25474DB0: 8869FFFF lbz r3,-1(r9)
- 5: GETL R9, t4
- 6: ADDL $0xFFFFFFFF, t4
- 7: LDB (t4), t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x25474DB4: 2C83002F cmpi cr1,r3,47
- 10: GETL R3, t8
- 11: MOVL $0x2F, t12
- 12: CMPL t8, t12, t10 (-rSo)
- 13: ICRFL t10, $0x1, CR
- 14: INCEIPL $4
-
- 0x25474DB8: 40860014 bc 4,6,0x25474DCC
- 15: Jc06o $0x25474DCC
-
-
-. 0 25474DAC 16
-. 7D 3F EA 14 88 69 FF FF 2C 83 00 2F 40 86 00 14
-
-==== BB 316 (0x25474DCC) approx BBs exec'd 0 ====
-
- 0x25474DCC: 2F1D0000 cmpi cr6,r29,0
- 0: GETL R29, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x25474DD0: 41BAFE34 bc 13,26,0x25474C04
- 4: Js26o $0x25474C04
-
-
-. 0 25474DCC 8
-. 2F 1D 00 00 41 BA FE 34
-
-==== BB 317 (0x25474DD4) approx BBs exec'd 0 ====
-
- 0x25474DD4: 7D3CEA14 add r9,r28,r29
- 0: GETL R28, t0
- 1: GETL R29, t2
- 2: ADDL t0, t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25474DD8: 8889FFFF lbz r4,-1(r9)
- 5: GETL R9, t4
- 6: ADDL $0xFFFFFFFF, t4
- 7: LDB (t4), t6
- 8: PUTL t6, R4
- 9: INCEIPL $4
-
- 0x25474DDC: 2C04002F cmpi cr0,r4,47
- 10: GETL R4, t8
- 11: MOVL $0x2F, t12
- 12: CMPL t8, t12, t10 (-rSo)
- 13: ICRFL t10, $0x0, CR
- 14: INCEIPL $4
-
- 0x25474DE0: 41A2FE24 bc 13,2,0x25474C04
- 15: Js02o $0x25474C04
-
-
-. 0 25474DD4 16
-. 7D 3C EA 14 88 89 FF FF 2C 04 00 2F 41 A2 FE 24
-
-==== BB 318 (0x25474DE4) approx BBs exec'd 0 ====
-
- 0x25474DE4: 2F940000 cmpi cr7,r20,0
- 0: GETL R20, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x25474DE8: 38A0002F li r5,47
- 4: MOVL $0x2F, t4
- 5: PUTL t4, R5
- 6: INCEIPL $4
-
- 0x25474DEC: 7CBCE9AE stbx r5,r28,r29
- 7: GETL R29, t6
- 8: GETL R28, t8
- 9: ADDL t8, t6
- 10: GETL R5, t10
- 11: STB t10, (t6)
- 12: INCEIPL $4
-
- 0x25474DF0: 3BBD0001 addi r29,r29,1
- 13: GETL R29, t12
- 14: ADDL $0x1, t12
- 15: PUTL t12, R29
- 16: INCEIPL $4
-
- 0x25474DF4: 419EFE18 bc 12,30,0x25474C0C
- 17: Js30o $0x25474C0C
-
-
-. 0 25474DE4 20
-. 2F 94 00 00 38 A0 00 2F 7C BC E9 AE 3B BD 00 01 41 9E FE 18
-
-==== BB 319 (0x25474C0C) approx BBs exec'd 0 ====
-
- 0x25474C0C: 83F101B0 lwz r31,432(r17)
- 0: GETL R17, t0
- 1: ADDL $0x1B0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R31
- 4: INCEIPL $4
-
- 0x25474C10: 7E398B78 or r25,r17,r17
- 5: GETL R17, t4
- 6: PUTL t4, R25
- 7: INCEIPL $4
-
- 0x25474C14: 2E1F0000 cmpi cr4,r31,0
- 8: GETL R31, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x4, CR
- 11: INCEIPL $4
-
- 0x25474C18: 41920024 bc 12,18,0x25474C3C
- 12: Js18o $0x25474C3C
-
-
-. 0 25474C0C 16
-. 83 F1 01 B0 7E 39 8B 78 2E 1F 00 00 41 92 00 24
-
-==== BB 320 (0x25474C1C) approx BBs exec'd 0 ====
-
- 0x25474C1C: 815F0010 lwz r10,16(r31)
- 0: GETL R31, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x25474C20: 7F83E378 or r3,r28,r28
- 5: GETL R28, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25474C24: 7FA5EB78 or r5,r29,r29
- 8: GETL R29, t6
- 9: PUTL t6, R5
- 10: INCEIPL $4
-
- 0x25474C28: 7F8AE800 cmp cr7,r10,r29
- 11: GETL R10, t8
- 12: GETL R29, t10
- 13: CMPL t8, t10, t12 (-rSo)
- 14: ICRFL t12, $0x7, CR
- 15: INCEIPL $4
-
- 0x25474C2C: 419E0240 bc 12,30,0x25474E6C
- 16: Js30o $0x25474E6C
-
-
-. 0 25474C1C 20
-. 81 5F 00 10 7F 83 E3 78 7F A5 EB 78 7F 8A E8 00 41 9E 02 40
-
-==== BB 321 (0x25474C30) approx BBs exec'd 0 ====
-
- 0x25474C30: 83FF0000 lwz r31,0(r31)
- 0: GETL R31, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R31
- 3: INCEIPL $4
-
- 0x25474C34: 2E1F0000 cmpi cr4,r31,0
- 4: GETL R31, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x4, CR
- 7: INCEIPL $4
-
- 0x25474C38: 4092FFE4 bc 4,18,0x25474C1C
- 8: Jc18o $0x25474C1C
-
-
-. 0 25474C30 12
-. 83 FF 00 00 2E 1F 00 00 40 92 FF E4
-
-==== BB 322 (0x25474C3C) approx BBs exec'd 0 ====
-
- 0x25474C3C: 418E0284 bc 12,14,0x25474EC0
- 0: Js14o $0x25474EC0
-
-
-. 0 25474C3C 4
-. 41 8E 02 84
-
-==== BB 323 (0x25474EC0) approx BBs exec'd 0 ====
-
- 0x25474EC0: 80700000 lwz r3,0(r16)
- 0: GETL R16, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R3
- 3: INCEIPL $4
-
- 0x25474EC4: 3B600000 li r27,0
- 4: MOVL $0x0, t4
- 5: PUTL t4, R27
- 6: INCEIPL $4
-
- 0x25474EC8: 7E1A8378 or r26,r16,r16
- 7: GETL R16, t6
- 8: PUTL t6, R26
- 9: INCEIPL $4
-
- 0x25474ECC: 5460103A rlwinm r0,r3,2,0,29
- 10: GETL R3, t8
- 11: SHLL $0x2, t8
- 12: PUTL t8, R0
- 13: INCEIPL $4
-
- 0x25474ED0: 7D80DA14 add r12,r0,r27
- 14: GETL R0, t10
- 15: GETL R27, t12
- 16: ADDL t10, t12
- 17: PUTL t12, R12
- 18: INCEIPL $4
-
- 0x25474ED4: 7FECEA14 add r31,r12,r29
- 19: GETL R12, t14
- 20: GETL R29, t16
- 21: ADDL t14, t16
- 22: PUTL t16, R31
- 23: INCEIPL $4
-
- 0x25474ED8: 387F0015 addi r3,r31,21
- 24: GETL R31, t18
- 25: ADDL $0x15, t18
- 26: PUTL t18, R3
- 27: INCEIPL $4
-
- 0x25474EDC: 48022B49 bl 0x25497A24
- 28: MOVL $0x25474EE0, t20
- 29: PUTL t20, LR
- 30: JMPo-c $0x25497A24 ($4)
-
-
-. 0 25474EC0 32
-. 80 70 00 00 3B 60 00 00 7E 1A 83 78 54 60 10 3A 7D 80 DA 14 7F EC EA 14 38 7F 00 15 48 02 2B 49
-
-==== BB 324 (0x25474EE0) approx BBs exec'd 0 ====
-
- 0x25474EE0: 7C7F1B79 or. r31,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R31
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x25474EE4: 4082FD8C bc 4,2,0x25474C70
- 5: Jc02o $0x25474C70
-
-
-. 0 25474EE0 8
-. 7C 7F 1B 79 40 82 FD 8C
-
-==== BB 325 (0x25474C70) approx BBs exec'd 0 ====
-
- 0x25474C70: 80F00000 lwz r7,0(r16)
- 0: GETL R16, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R7
- 3: INCEIPL $4
-
- 0x25474C74: 7F84E378 or r4,r28,r28
- 4: GETL R28, t4
- 5: PUTL t4, R4
- 6: INCEIPL $4
-
- 0x25474C78: 54E6103A rlwinm r6,r7,2,0,29
- 7: GETL R7, t6
- 8: SHLL $0x2, t6
- 9: PUTL t6, R6
- 10: INCEIPL $4
-
- 0x25474C7C: 7CA6FA14 add r5,r6,r31
- 11: GETL R6, t8
- 12: GETL R31, t10
- 13: ADDL t8, t10
- 14: PUTL t10, R5
- 15: INCEIPL $4
-
- 0x25474C80: 38650014 addi r3,r5,20
- 16: GETL R5, t12
- 17: ADDL $0x14, t12
- 18: PUTL t12, R3
- 19: INCEIPL $4
-
- 0x25474C84: 7FA5EB78 or r5,r29,r29
- 20: GETL R29, t14
- 21: PUTL t14, R5
- 22: INCEIPL $4
-
- 0x25474C88: 907F000C stw r3,12(r31)
- 23: GETL R3, t16
- 24: GETL R31, t18
- 25: ADDL $0xC, t18
- 26: STL t16, (t18)
- 27: INCEIPL $4
-
- 0x25474C8C: 4800ED95 bl 0x25483A20
- 28: MOVL $0x25474C90, t20
- 29: PUTL t20, LR
- 30: JMPo-c $0x25483A20 ($4)
-
-
-. 0 25474C70 32
-. 80 F0 00 00 7F 84 E3 78 54 E6 10 3A 7C A6 FA 14 38 65 00 14 7F A5 EB 78 90 7F 00 0C 48 00 ED 95
-
-==== BB 326 (0x25483A4C) approx BBs exec'd 0 ====
-
- 0x25483A4C: 7C8300D0 neg r4,r3
- 0: GETL R3, t0
- 1: NEGL t0
- 2: PUTL t0, R4
- 3: INCEIPL $4
-
- 0x25483A50: 548307BE rlwinm r3,r4,0,30,31
- 4: GETL R4, t2
- 5: ANDL $0x3, t2
- 6: PUTL t2, R3
- 7: INCEIPL $4
-
- 0x25483A54: 7C691B79 or. r9,r3,r3
- 8: GETL R3, t4
- 9: PUTL t4, R9
- 10: CMP0L t4, t6 (-rSo)
- 11: ICRFL t6, $0x0, CR
- 12: INCEIPL $4
-
- 0x25483A58: 7F832850 subf r28,r3,r5
- 13: GETL R3, t8
- 14: GETL R5, t10
- 15: SUBL t8, t10
- 16: PUTL t10, R28
- 17: INCEIPL $4
-
- 0x25483A5C: 4182001C bc 12,2,0x25483A78
- 18: Js02o $0x25483A78
-
-
-. 0 25483A4C 20
-. 7C 83 00 D0 54 83 07 BE 7C 69 1B 79 7F 83 28 50 41 82 00 1C
-
-==== BB 327 (0x25483A78) approx BBs exec'd 0 ====
-
- 0x25483A78: 73E00003 andi. r0,r31,0x3
- 0: GETL R31, t0
- 1: ANDL $0x3, t0
- 2: PUTL t0, R0
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x25483A7C: 40820068 bc 4,2,0x25483AE4
- 6: Jc02o $0x25483AE4
-
-
-. 0 25483A78 8
-. 73 E0 00 03 40 82 00 68
-
-==== BB 328 (0x25483A80) approx BBs exec'd 0 ====
-
- 0x25483A80: 7FA3EB78 or r3,r29,r29
- 0: GETL R29, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25483A84: 7FE4FB78 or r4,r31,r31
- 3: GETL R31, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x25483A88: 5785F0BE rlwinm r5,r28,30,2,31
- 6: GETL R28, t4
- 7: SHRL $0x2, t4
- 8: PUTL t4, R5
- 9: INCEIPL $4
-
- 0x25483A8C: 48000239 bl 0x25483CC4
- 10: MOVL $0x25483A90, t6
- 11: PUTL t6, LR
- 12: JMPo-c $0x25483CC4 ($4)
-
-
-. 0 25483A80 16
-. 7F A3 EB 78 7F E4 FB 78 57 85 F0 BE 48 00 02 39
-
-==== BB 329 (0x25483DA8) approx BBs exec'd 0 ====
-
- 0x25483DA8: 80040000 lwz r0,0(r4)
- 0: GETL R4, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x25483DAC: 3884FFF0 addi r4,r4,-16
- 4: GETL R4, t4
- 5: ADDL $0xFFFFFFF0, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0x25483DB0: 81240014 lwz r9,20(r4)
- 8: GETL R4, t6
- 9: ADDL $0x14, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R9
- 12: INCEIPL $4
-
- 0x25483DB4: 3863FFEC addi r3,r3,-20
- 13: GETL R3, t10
- 14: ADDL $0xFFFFFFEC, t10
- 15: PUTL t10, R3
- 16: INCEIPL $4
-
- 0x25483DB8: 38A50004 addi r5,r5,4
- 17: GETL R5, t12
- 18: ADDL $0x4, t12
- 19: PUTL t12, R5
- 20: INCEIPL $4
-
- 0x25483DBC: 90030014 stw r0,20(r3)
- 21: GETL R0, t14
- 22: GETL R3, t16
- 23: ADDL $0x14, t16
- 24: STL t14, (t16)
- 25: INCEIPL $4
-
- 0x25483DC0: 4BFFFF7C b 0x25483D3C
- 26: JMPo $0x25483D3C ($4)
-
-
-. 0 25483DA8 28
-. 80 04 00 00 38 84 FF F0 81 24 00 14 38 63 FF EC 38 A5 00 04 90 03 00 14 4B FF FF 7C
-
-==== BB 330 (0x25483A90) approx BBs exec'd 0 ====
-
- 0x25483A90: 5786003A rlwinm r6,r28,0,0,29
- 0: GETL R28, t0
- 1: ANDL $0xFFFFFFFC, t0
- 2: PUTL t0, R6
- 3: INCEIPL $4
-
- 0x25483A94: 578507BE rlwinm r5,r28,0,30,31
- 4: GETL R28, t2
- 5: ANDL $0x3, t2
- 6: PUTL t2, R5
- 7: INCEIPL $4
-
- 0x25483A98: 7FBD3214 add r29,r29,r6
- 8: GETL R29, t4
- 9: GETL R6, t6
- 10: ADDL t4, t6
- 11: PUTL t6, R29
- 12: INCEIPL $4
-
- 0x25483A9C: 7FFF3214 add r31,r31,r6
- 13: GETL R31, t8
- 14: GETL R6, t10
- 15: ADDL t8, t10
- 16: PUTL t10, R31
- 17: INCEIPL $4
-
- 0x25483AA0: 2C850000 cmpi cr1,r5,0
- 18: GETL R5, t12
- 19: CMP0L t12, t14 (-rSo)
- 20: ICRFL t14, $0x1, CR
- 21: INCEIPL $4
-
- 0x25483AA4: 4186001C bc 12,6,0x25483AC0
- 22: Js06o $0x25483AC0
-
-
-. 0 25483A90 24
-. 57 86 00 3A 57 85 07 BE 7F BD 32 14 7F FF 32 14 2C 85 00 00 41 86 00 1C
-
-==== BB 331 (0x25474C90) approx BBs exec'd 0 ====
-
- 0x25474C90: 39200000 li r9,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R9
- 2: INCEIPL $4
-
- 0x25474C94: 99230000 stb r9,0(r3)
- 3: GETL R9, t2
- 4: GETL R3, t4
- 5: STB t2, (t4)
- 6: INCEIPL $4
-
- 0x25474C98: 80920000 lwz r4,0(r18)
- 7: GETL R18, t6
- 8: LDL (t6), t8
- 9: PUTL t8, R4
- 10: INCEIPL $4
-
- 0x25474C9C: 93BF0010 stw r29,16(r31)
- 11: GETL R29, t10
- 12: GETL R31, t12
- 13: ADDL $0x10, t12
- 14: STL t10, (t12)
- 15: INCEIPL $4
-
- 0x25474CA0: 7F9D2040 cmpl cr7,r29,r4
- 16: GETL R29, t14
- 17: GETL R4, t16
- 18: CMPUL t14, t16, t18 (-rSo)
- 19: ICRFL t18, $0x7, CR
- 20: INCEIPL $4
-
- 0x25474CA4: 409D0008 bc 4,29,0x25474CAC
- 21: Jc29o $0x25474CAC
-
-
-. 0 25474C90 24
-. 39 20 00 00 99 23 00 00 80 92 00 00 93 BF 00 10 7F 9D 20 40 40 9D 00 08
-
-==== BB 332 (0x25474CA8) approx BBs exec'd 0 ====
-
- 0x25474CA8: 93B20000 stw r29,0(r18)
- 0: GETL R29, t0
- 1: GETL R18, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0x25474CAC: 813A0000 lwz r9,0(r26)
- 4: GETL R26, t4
- 5: LDL (t4), t6
- 6: PUTL t6, R9
- 7: INCEIPL $4
-
- 0x25474CB0: 895C0000 lbz r10,0(r28)
- 8: GETL R28, t8
- 9: LDB (t8), t10
- 10: PUTL t10, R10
- 11: INCEIPL $4
-
- 0x25474CB4: 2C890000 cmpi cr1,r9,0
- 12: GETL R9, t12
- 13: CMP0L t12, t14 (-rSo)
- 14: ICRFL t14, $0x1, CR
- 15: INCEIPL $4
-
- 0x25474CB8: 6948002F xori r8,r10,0x2F
- 16: GETL R10, t16
- 17: XORL $0x2F, t16
- 18: PUTL t16, R8
- 19: INCEIPL $4
-
- 0x25474CBC: 7F8800D0 neg r28,r8
- 20: GETL R8, t18
- 21: NEGL t18
- 22: PUTL t18, R28
- 23: INCEIPL $4
-
- 0x25474CC0: 578317BC rlwinm r3,r28,2,30,30
- 24: GETL R28, t20
- 25: ROLL $0x2, t20
- 26: ANDL $0x2, t20
- 27: PUTL t20, R3
- 28: INCEIPL $4
-
- 0x25474CC4: 41860018 bc 12,6,0x25474CDC
- 29: Js06o $0x25474CDC
-
-
-. 0 25474CA8 32
-. 93 B2 00 00 81 3A 00 00 89 5C 00 00 2C 89 00 00 69 48 00 2F 7F 88 00 D0 57 83 17 BC 41 86 00 18
-
-==== BB 333 (0x25474CC8) approx BBs exec'd 0 ====
-
- 0x25474CC8: 7D2903A6 mtctr r9
- 0: GETL R9, t0
- 1: PUTL t0, CTR
- 2: INCEIPL $4
-
- 0x25474CCC: 397F0014 addi r11,r31,20
- 3: GETL R31, t2
- 4: ADDL $0x14, t2
- 5: PUTL t2, R11
- 6: INCEIPL $4
-
- 0x25474CD0: 906B0000 stw r3,0(r11)
- 7: GETL R3, t4
- 8: GETL R11, t6
- 9: STL t4, (t6)
- 10: INCEIPL $4
-
- 0x25474CD4: 396B0004 addi r11,r11,4
- 11: GETL R11, t8
- 12: ADDL $0x4, t8
- 13: PUTL t8, R11
- 14: INCEIPL $4
-
- 0x25474CD8: 4200FFF8 bc 16,0,0x25474CD0
- 15: GETL CTR, t10
- 16: ADDL $0xFFFFFFFF, t10
- 17: PUTL t10, CTR
- 18: JIFZL t10, $0x25474CDC
- 19: JMPo $0x25474CD0 ($4)
-
-
-. 0 25474CC8 20
-. 7D 29 03 A6 39 7F 00 14 90 6B 00 00 39 6B 00 04 42 00 FF F8
-
-==== BB 334 (0x25474CD0) approx BBs exec'd 0 ====
-
- 0x25474CD0: 906B0000 stw r3,0(r11)
- 0: GETL R3, t0
- 1: GETL R11, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0x25474CD4: 396B0004 addi r11,r11,4
- 4: GETL R11, t4
- 5: ADDL $0x4, t4
- 6: PUTL t4, R11
- 7: INCEIPL $4
-
- 0x25474CD8: 4200FFF8 bc 16,0,0x25474CD0
- 8: GETL CTR, t6
- 9: ADDL $0xFFFFFFFF, t6
- 10: PUTL t6, CTR
- 11: JIFZL t6, $0x25474CDC
- 12: JMPo $0x25474CD0 ($4)
-
-
-. 0 25474CD0 12
-. 90 6B 00 00 39 6B 00 04 42 00 FF F8
-
-==== BB 335 (0x25474CDC) approx BBs exec'd 0 ====
-
- 0x25474CDC: 927F0004 stw r19,4(r31)
- 0: GETL R19, t0
- 1: GETL R31, t2
- 2: ADDL $0x4, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25474CE0: 418E021C bc 12,14,0x25474EFC
- 5: Js14o $0x25474EFC
-
-
-. 0 25474CDC 8
-. 92 7F 00 04 41 8E 02 1C
-
-==== BB 336 (0x25474EFC) approx BBs exec'd 0 ====
-
- 0x25474EFC: 92FF0008 stw r23,8(r31)
- 0: GETL R23, t0
- 1: GETL R31, t2
- 2: ADDL $0x8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25474F00: 4BFFFE08 b 0x25474D08
- 5: JMPo $0x25474D08 ($4)
-
-
-. 0 25474EFC 8
-. 92 FF 00 08 4B FF FE 08
-
-==== BB 337 (0x25474D08) approx BBs exec'd 0 ====
-
- 0x25474D08: 801901B0 lwz r0,432(r25)
- 0: GETL R25, t0
- 1: ADDL $0x1B0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25474D0C: 571D103A rlwinm r29,r24,2,0,29
- 5: GETL R24, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R29
- 8: INCEIPL $4
-
- 0x25474D10: 38610008 addi r3,r1,8
- 9: GETL R1, t6
- 10: ADDL $0x8, t6
- 11: PUTL t6, R3
- 12: INCEIPL $4
-
- 0x25474D14: 7EA4AB78 or r4,r21,r21
- 13: GETL R21, t8
- 14: PUTL t8, R4
- 15: INCEIPL $4
-
- 0x25474D18: 901F0000 stw r0,0(r31)
- 16: GETL R0, t10
- 17: GETL R31, t12
- 18: STL t10, (t12)
- 19: INCEIPL $4
-
- 0x25474D1C: 3B180001 addi r24,r24,1
- 20: GETL R24, t14
- 21: ADDL $0x1, t14
- 22: PUTL t14, R24
- 23: INCEIPL $4
-
- 0x25474D20: 93F901B0 stw r31,432(r25)
- 24: GETL R31, t16
- 25: GETL R25, t18
- 26: ADDL $0x1B0, t18
- 27: STL t16, (t18)
- 28: INCEIPL $4
-
- 0x25474D24: 7FFDB12E stwx r31,r29,r22
- 29: GETL R22, t20
- 30: GETL R29, t22
- 31: ADDL t22, t20
- 32: GETL R31, t24
- 33: STL t24, (t20)
- 34: INCEIPL $4
-
- 0x25474D28: 4800B615 bl 0x2548033C
- 35: MOVL $0x25474D2C, t26
- 36: PUTL t26, LR
- 37: JMPo-c $0x2548033C ($4)
-
-
-. 0 25474D08 36
-. 80 19 01 B0 57 1D 10 3A 38 61 00 08 7E A4 AB 78 90 1F 00 00 3B 18 00 01 93 F9 01 B0 7F FD B1 2E 48 00 B6 15
-
-==== BB 338 (0x25474D2C) approx BBs exec'd 0 ====
-
- 0x25474D2C: 2E030000 cmpi cr4,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x4, CR
- 3: INCEIPL $4
-
- 0x25474D30: 7C7F1B78 or r31,r3,r3
- 4: GETL R3, t4
- 5: PUTL t4, R31
- 6: INCEIPL $4
-
- 0x25474D34: 7C7C1B78 or r28,r3,r3
- 7: GETL R3, t6
- 8: PUTL t6, R28
- 9: INCEIPL $4
-
- 0x25474D38: 4092FEBC bc 4,18,0x25474BF4
- 10: Jc18o $0x25474BF4
-
-
-. 0 25474D2C 16
-. 2E 03 00 00 7C 7F 1B 78 7C 7C 1B 78 40 92 FE BC
-
-==== BB 339 (0x25483054) approx BBs exec'd 0 ====
-
- 0x25483054: 7CE04838 and r0,r7,r9
- 0: GETL R7, t0
- 1: GETL R9, t2
- 2: ANDL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25483058: 7C003A14 add r0,r0,r7
- 5: GETL R0, t4
- 6: GETL R7, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R0
- 9: INCEIPL $4
-
- 0x2548305C: 7D880078 andc r8,r12,r0
- 10: GETL R12, t8
- 11: GETL R0, t10
- 12: NOTL t10
- 13: ANDL t8, t10
- 14: PUTL t10, R8
- 15: INCEIPL $4
-
- 0x25483060: 48000014 b 0x25483074
- 16: JMPo $0x25483074 ($4)
-
-
-. 0 25483054 16
-. 7C E0 48 38 7C 00 3A 14 7D 88 00 78 48 00 00 14
-
-==== BB 340 (0x2547FE20) approx BBs exec'd 0 ====
-
- 0x2547FE20: 813E04F4 lwz r9,1268(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4F4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547FE24: 81890004 lwz r12,4(r9)
- 5: GETL R9, t4
- 6: ADDL $0x4, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R12
- 9: INCEIPL $4
-
- 0x2547FE28: 7C8CE214 add r4,r12,r28
- 10: GETL R12, t8
- 11: GETL R28, t10
- 12: ADDL t8, t10
- 13: PUTL t10, R4
- 14: INCEIPL $4
-
- 0x2547FE2C: 7D4C00D0 neg r10,r12
- 15: GETL R12, t12
- 16: NEGL t12
- 17: PUTL t12, R10
- 18: INCEIPL $4
-
- 0x2547FE30: 3964FFFF addi r11,r4,-1
- 19: GETL R4, t14
- 20: ADDL $0xFFFFFFFF, t14
- 21: PUTL t14, R11
- 22: INCEIPL $4
-
- 0x2547FE34: 7D7D5038 and r29,r11,r10
- 23: GETL R11, t16
- 24: GETL R10, t18
- 25: ANDL t16, t18
- 26: PUTL t18, R29
- 27: INCEIPL $4
-
- 0x2547FE38: 7FA4EB78 or r4,r29,r29
- 28: GETL R29, t20
- 29: PUTL t20, R4
- 30: INCEIPL $4
-
- 0x2547FE3C: 4800295D bl 0x25482798
- 31: MOVL $0x2547FE40, t22
- 32: PUTL t22, LR
- 33: JMPo-c $0x25482798 ($4)
-
-
-. 0 2547FE20 32
-. 81 3E 04 F4 81 89 00 04 7C 8C E2 14 7D 4C 00 D0 39 64 FF FF 7D 7D 50 38 7F A4 EB 78 48 00 29 5D
-
-==== BB 341 mmap(0x25482798) approx BBs exec'd 0 ====
-
- 0x25482798: 3800005A li r0,90
- 0: MOVL $0x5A, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x2548279C: 44000002 sc
- 3: JMPo-sys $0x254827A0 ($4)
-
-
-. 0 25482798 8
-. 38 00 00 5A 44 00 00 02
-
-==== BB 342 (0x254827A0) approx BBs exec'd 0 ====
-
- 0x254827A0: 4CA30020 bclr 5,3
- 0: GETL LR, t0
- 1: Jc03o-r t0
-
-
-. 0 254827A0 4
-. 4C A3 00 20
-
-==== BB 343 (0x2547FE40) approx BBs exec'd 0 ====
-
- 0x2547FE40: 80BB0000 lwz r5,0(r27)
- 0: GETL R27, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R5
- 3: INCEIPL $4
-
- 0x2547FE44: 7D23EA14 add r9,r3,r29
- 4: GETL R3, t4
- 5: GETL R29, t6
- 6: ADDL t4, t6
- 7: PUTL t6, R9
- 8: INCEIPL $4
-
- 0x2547FE48: 7C832800 cmp cr1,r3,r5
- 9: GETL R3, t8
- 10: GETL R5, t10
- 11: CMPL t8, t10, t12 (-rSo)
- 12: ICRFL t12, $0x1, CR
- 13: INCEIPL $4
-
- 0x2547FE4C: 41860008 bc 12,6,0x2547FE54
- 14: Js06o $0x2547FE54
-
-
-. 0 2547FE40 16
-. 80 BB 00 00 7D 23 EA 14 7C 83 28 00 41 86 00 08
-
-==== BB 344 (0x2547FE50) approx BBs exec'd 0 ====
-
- 0x2547FE50: 907F0000 stw r3,0(r31)
- 0: GETL R3, t0
- 1: GETL R31, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0x2547FE54: 807F0000 lwz r3,0(r31)
- 4: GETL R31, t4
- 5: LDL (t4), t6
- 6: PUTL t6, R3
- 7: INCEIPL $4
-
- 0x2547FE58: 80C10024 lwz r6,36(r1)
- 8: GETL R1, t8
- 9: ADDL $0x24, t8
- 10: LDL (t8), t10
- 11: PUTL t10, R6
- 12: INCEIPL $4
-
- 0x2547FE5C: 7D03E214 add r8,r3,r28
- 13: GETL R3, t12
- 14: GETL R28, t14
- 15: ADDL t12, t14
- 16: PUTL t14, R8
- 17: INCEIPL $4
-
- 0x2547FE60: 80FE0420 lwz r7,1056(r30)
- 18: GETL R30, t16
- 19: ADDL $0x420, t16
- 20: LDL (t16), t18
- 21: PUTL t18, R7
- 22: INCEIPL $4
-
- 0x2547FE64: 913B0000 stw r9,0(r27)
- 23: GETL R9, t20
- 24: GETL R27, t22
- 25: STL t20, (t22)
- 26: INCEIPL $4
-
- 0x2547FE68: 7CC803A6 mtlr r6
- 27: GETL R6, t24
- 28: PUTL t24, LR
- 29: INCEIPL $4
-
- 0x2547FE6C: 911F0000 stw r8,0(r31)
- 30: GETL R8, t26
- 31: GETL R31, t28
- 32: STL t26, (t28)
- 33: INCEIPL $4
-
- 0x2547FE70: 8361000C lwz r27,12(r1)
- 34: GETL R1, t30
- 35: ADDL $0xC, t30
- 36: LDL (t30), t32
- 37: PUTL t32, R27
- 38: INCEIPL $4
-
- 0x2547FE74: 83810010 lwz r28,16(r1)
- 39: GETL R1, t34
- 40: ADDL $0x10, t34
- 41: LDL (t34), t36
- 42: PUTL t36, R28
- 43: INCEIPL $4
-
- 0x2547FE78: 83A10014 lwz r29,20(r1)
- 44: GETL R1, t38
- 45: ADDL $0x14, t38
- 46: LDL (t38), t40
- 47: PUTL t40, R29
- 48: INCEIPL $4
-
- 0x2547FE7C: 83C10018 lwz r30,24(r1)
- 49: GETL R1, t42
- 50: ADDL $0x18, t42
- 51: LDL (t42), t44
- 52: PUTL t44, R30
- 53: INCEIPL $4
-
- 0x2547FE80: 83E1001C lwz r31,28(r1)
- 54: GETL R1, t46
- 55: ADDL $0x1C, t46
- 56: LDL (t46), t48
- 57: PUTL t48, R31
- 58: INCEIPL $4
-
- 0x2547FE84: 38210020 addi r1,r1,32
- 59: GETL R1, t50
- 60: ADDL $0x20, t50
- 61: PUTL t50, R1
- 62: INCEIPL $4
-
- 0x2547FE88: 90670000 stw r3,0(r7)
- 63: GETL R3, t52
- 64: GETL R7, t54
- 65: STL t52, (t54)
- 66: INCEIPL $4
-
- 0x2547FE8C: 4E800020 blr
- 67: GETL LR, t56
- 68: JMPo-r t56 ($4)
-
-
-. 0 2547FE50 64
-. 90 7F 00 00 80 7F 00 00 80 C1 00 24 7D 03 E2 14 80 FE 04 20 91 3B 00 00 7C C8 03 A6 91 1F 00 00 83 61 00 0C 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 90 67 00 00 4E 80 00 20
-
-==== BB 345 (0x25483AE4) approx BBs exec'd 0 ====
-
- 0x25483AE4: 7FA3EB78 or r3,r29,r29
- 0: GETL R29, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25483AE8: 7FE4FB78 or r4,r31,r31
- 3: GETL R31, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x25483AEC: 5785F0BE rlwinm r5,r28,30,2,31
- 6: GETL R28, t4
- 7: SHRL $0x2, t4
- 8: PUTL t4, R5
- 9: INCEIPL $4
-
- 0x25483AF0: 48000329 bl 0x25483E18
- 10: MOVL $0x25483AF4, t6
- 11: PUTL t6, LR
- 12: JMPo-c $0x25483E18 ($4)
-
-
-. 0 25483AE4 16
-. 7F A3 EB 78 7F E4 FB 78 57 85 F0 BE 48 00 03 29
-
-==== BB 346 _wordcopy_fwd_dest_aligned(0x25483E18) approx BBs exec'd 0 ====
-
- 0x25483E18: 54A007BE rlwinm r0,r5,0,30,31
- 0: GETL R5, t0
- 1: ANDL $0x3, t0
- 2: PUTL t0, R0
- 3: INCEIPL $4
-
- 0x25483E1C: 54881EF8 rlwinm r8,r4,3,27,28
- 4: GETL R4, t2
- 5: ROLL $0x3, t2
- 6: ANDL $0x18, t2
- 7: PUTL t2, R8
- 8: INCEIPL $4
-
- 0x25483E20: 2F800001 cmpi cr7,r0,1
- 9: GETL R0, t4
- 10: MOVL $0x1, t8
- 11: CMPL t4, t8, t6 (-rSo)
- 12: ICRFL t6, $0x7, CR
- 13: INCEIPL $4
-
- 0x25483E24: 9421FFF0 stwu r1,-16(r1)
- 14: GETL R1, t10
- 15: GETL R1, t12
- 16: ADDL $0xFFFFFFF0, t12
- 17: PUTL t12, R1
- 18: STL t10, (t12)
- 19: INCEIPL $4
-
- 0x25483E28: 5484003A rlwinm r4,r4,0,0,29
- 20: GETL R4, t14
- 21: ANDL $0xFFFFFFFC, t14
- 22: PUTL t14, R4
- 23: INCEIPL $4
-
- 0x25483E2C: 20E80020 subfic r7,r8,32
- 24: GETL R8, t16
- 25: MOVL $0x20, t18
- 26: SBBL t16, t18 (-wCa)
- 27: PUTL t18, R7
- 28: INCEIPL $4
-
- 0x25483E30: 419E00B8 bc 12,30,0x25483EE8
- 29: Js30o $0x25483EE8
-
-
-. 0 25483E18 28
-. 54 A0 07 BE 54 88 1E F8 2F 80 00 01 94 21 FF F0 54 84 00 3A 20 E8 00 20 41 9E 00 B8
-
-==== BB 347 (0x25483E34) approx BBs exec'd 0 ====
-
- 0x25483E34: 28000001 cmpli cr0,r0,1
- 0: GETL R0, t0
- 1: MOVL $0x1, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x25483E38: 4180008C bc 12,0,0x25483EC4
- 5: Js00o $0x25483EC4
-
-
-. 0 25483E34 8
-. 28 00 00 01 41 80 00 8C
-
-==== BB 348 (0x25483E3C) approx BBs exec'd 0 ====
-
- 0x25483E3C: 2C800002 cmpi cr1,r0,2
- 0: GETL R0, t0
- 1: MOVL $0x2, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0x25483E40: 418600BC bc 12,6,0x25483EFC
- 5: Js06o $0x25483EFC
-
-
-. 0 25483E3C 8
-. 2C 80 00 02 41 86 00 BC
-
-==== BB 349 (0x25483EFC) approx BBs exec'd 0 ====
-
- 0x25483EFC: 81440000 lwz r10,0(r4)
- 0: GETL R4, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R10
- 3: INCEIPL $4
-
- 0x25483F00: 3863FFF4 addi r3,r3,-12
- 4: GETL R3, t4
- 5: ADDL $0xFFFFFFF4, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25483F04: 81640004 lwz r11,4(r4)
- 8: GETL R4, t6
- 9: ADDL $0x4, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R11
- 12: INCEIPL $4
-
- 0x25483F08: 38A50002 addi r5,r5,2
- 13: GETL R5, t10
- 14: ADDL $0x2, t10
- 15: PUTL t10, R5
- 16: INCEIPL $4
-
- 0x25483F0C: 3884FFFC addi r4,r4,-4
- 17: GETL R4, t12
- 18: ADDL $0xFFFFFFFC, t12
- 19: PUTL t12, R4
- 20: INCEIPL $4
-
- 0x25483F10: 4BFFFF78 b 0x25483E88
- 21: JMPo $0x25483E88 ($4)
-
-
-. 0 25483EFC 24
-. 81 44 00 00 38 63 FF F4 81 64 00 04 38 A5 00 02 38 84 FF FC 4B FF FF 78
-
-==== BB 350 (0x25483E88) approx BBs exec'd 0 ====
-
- 0x25483E88: 34A5FFFC addic. r5,r5,-4
- 0: GETL R5, t0
- 1: ADCL $0xFFFFFFFC, t0 (-wCa)
- 2: PUTL t0, R5
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x25483E8C: 7D464030 slw r6,r10,r8
- 6: GETL R10, t6
- 7: GETL R8, t4
- 8: SHLL t4, t6
- 9: PUTL t6, R6
- 10: INCEIPL $4
-
- 0x25483E90: 7D693C30 srw r9,r11,r7
- 11: GETL R11, t10
- 12: GETL R7, t8
- 13: SHRL t8, t10
- 14: PUTL t10, R9
- 15: INCEIPL $4
-
- 0x25483E94: 8144000C lwz r10,12(r4)
- 16: GETL R4, t12
- 17: ADDL $0xC, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R10
- 20: INCEIPL $4
-
- 0x25483E98: 7CC04B78 or r0,r6,r9
- 21: GETL R6, t16
- 22: GETL R9, t18
- 23: ORL t18, t16
- 24: PUTL t16, R0
- 25: INCEIPL $4
-
- 0x25483E9C: 38840010 addi r4,r4,16
- 26: GETL R4, t20
- 27: ADDL $0x10, t20
- 28: PUTL t20, R4
- 29: INCEIPL $4
-
- 0x25483EA0: 9003000C stw r0,12(r3)
- 30: GETL R0, t22
- 31: GETL R3, t24
- 32: ADDL $0xC, t24
- 33: STL t22, (t24)
- 34: INCEIPL $4
-
- 0x25483EA4: 38630010 addi r3,r3,16
- 35: GETL R3, t26
- 36: ADDL $0x10, t26
- 37: PUTL t26, R3
- 38: INCEIPL $4
-
- 0x25483EA8: 40A2FFA4 bc 5,2,0x25483E4C
- 39: Jc02o $0x25483E4C
-
-
-. 0 25483E88 36
-. 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
-
-==== BB 351 (0x25483E4C) approx BBs exec'd 0 ====
-
- 0x25483E4C: 7D664030 slw r6,r11,r8
- 0: GETL R11, t2
- 1: GETL R8, t0
- 2: SHLL t0, t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x25483E50: 7D493C30 srw r9,r10,r7
- 5: GETL R10, t6
- 6: GETL R7, t4
- 7: SHRL t4, t6
- 8: PUTL t6, R9
- 9: INCEIPL $4
-
- 0x25483E54: 7CC04B78 or r0,r6,r9
- 10: GETL R6, t8
- 11: GETL R9, t10
- 12: ORL t10, t8
- 13: PUTL t8, R0
- 14: INCEIPL $4
-
- 0x25483E58: 81640000 lwz r11,0(r4)
- 15: GETL R4, t12
- 16: LDL (t12), t14
- 17: PUTL t14, R11
- 18: INCEIPL $4
-
- 0x25483E5C: 90030000 stw r0,0(r3)
- 19: GETL R0, t16
- 20: GETL R3, t18
- 21: STL t16, (t18)
- 22: INCEIPL $4
-
- 0x25483E60: 7D404030 slw r0,r10,r8
- 23: GETL R10, t22
- 24: GETL R8, t20
- 25: SHLL t20, t22
- 26: PUTL t22, R0
- 27: INCEIPL $4
-
- 0x25483E64: 7D6A3C30 srw r10,r11,r7
- 28: GETL R11, t26
- 29: GETL R7, t24
- 30: SHRL t24, t26
- 31: PUTL t26, R10
- 32: INCEIPL $4
-
- 0x25483E68: 7C0C5378 or r12,r0,r10
- 33: GETL R0, t28
- 34: GETL R10, t30
- 35: ORL t30, t28
- 36: PUTL t28, R12
- 37: INCEIPL $4
-
- 0x25483E6C: 81440004 lwz r10,4(r4)
- 38: GETL R4, t32
- 39: ADDL $0x4, t32
- 40: LDL (t32), t34
- 41: PUTL t34, R10
- 42: INCEIPL $4
-
- 0x25483E70: 91830004 stw r12,4(r3)
- 43: GETL R12, t36
- 44: GETL R3, t38
- 45: ADDL $0x4, t38
- 46: STL t36, (t38)
- 47: INCEIPL $4
-
- 0x25483E74: 7D6C4030 slw r12,r11,r8
- 48: GETL R11, t42
- 49: GETL R8, t40
- 50: SHLL t40, t42
- 51: PUTL t42, R12
- 52: INCEIPL $4
-
- 0x25483E78: 7D4B3C30 srw r11,r10,r7
- 53: GETL R10, t46
- 54: GETL R7, t44
- 55: SHRL t44, t46
- 56: PUTL t46, R11
- 57: INCEIPL $4
-
- 0x25483E7C: 7D865B78 or r6,r12,r11
- 58: GETL R12, t48
- 59: GETL R11, t50
- 60: ORL t50, t48
- 61: PUTL t48, R6
- 62: INCEIPL $4
-
- 0x25483E80: 81640008 lwz r11,8(r4)
- 63: GETL R4, t52
- 64: ADDL $0x8, t52
- 65: LDL (t52), t54
- 66: PUTL t54, R11
- 67: INCEIPL $4
-
- 0x25483E84: 90C30008 stw r6,8(r3)
- 68: GETL R6, t56
- 69: GETL R3, t58
- 70: ADDL $0x8, t58
- 71: STL t56, (t58)
- 72: INCEIPL $4
-
- 0x25483E88: 34A5FFFC addic. r5,r5,-4
- 73: GETL R5, t60
- 74: ADCL $0xFFFFFFFC, t60 (-wCa)
- 75: PUTL t60, R5
- 76: CMP0L t60, t62 (-rSo)
- 77: ICRFL t62, $0x0, CR
- 78: INCEIPL $4
-
- 0x25483E8C: 7D464030 slw r6,r10,r8
- 79: GETL R10, t66
- 80: GETL R8, t64
- 81: SHLL t64, t66
- 82: PUTL t66, R6
- 83: INCEIPL $4
-
- 0x25483E90: 7D693C30 srw r9,r11,r7
- 84: GETL R11, t70
- 85: GETL R7, t68
- 86: SHRL t68, t70
- 87: PUTL t70, R9
- 88: INCEIPL $4
-
- 0x25483E94: 8144000C lwz r10,12(r4)
- 89: GETL R4, t72
- 90: ADDL $0xC, t72
- 91: LDL (t72), t74
- 92: PUTL t74, R10
- 93: INCEIPL $4
-
- 0x25483E98: 7CC04B78 or r0,r6,r9
- 94: GETL R6, t76
- 95: GETL R9, t78
- 96: ORL t78, t76
- 97: PUTL t76, R0
- 98: INCEIPL $4
-
- 0x25483E9C: 38840010 addi r4,r4,16
- 99: GETL R4, t80
- 100: ADDL $0x10, t80
- 101: PUTL t80, R4
- 102: INCEIPL $4
-
- 0x25483EA0: 9003000C stw r0,12(r3)
- 103: GETL R0, t82
- 104: GETL R3, t84
- 105: ADDL $0xC, t84
- 106: STL t82, (t84)
- 107: INCEIPL $4
-
- 0x25483EA4: 38630010 addi r3,r3,16
- 108: GETL R3, t86
- 109: ADDL $0x10, t86
- 110: PUTL t86, R3
- 111: INCEIPL $4
-
- 0x25483EA8: 40A2FFA4 bc 5,2,0x25483E4C
- 112: Jc02o $0x25483E4C
-
-
-. 0 25483E4C 96
-. 7D 66 40 30 7D 49 3C 30 7C C0 4B 78 81 64 00 00 90 03 00 00 7D 40 40 30 7D 6A 3C 30 7C 0C 53 78 81 44 00 04 91 83 00 04 7D 6C 40 30 7D 4B 3C 30 7D 86 5B 78 81 64 00 08 90 C3 00 08 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
-
-==== BB 352 (0x25483EAC) approx BBs exec'd 0 ====
-
- 0x25483EAC: 7D654030 slw r5,r11,r8
- 0: GETL R11, t2
- 1: GETL R8, t0
- 2: SHLL t0, t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25483EB0: 7D483C30 srw r8,r10,r7
- 5: GETL R10, t6
- 6: GETL R7, t4
- 7: SHRL t4, t6
- 8: PUTL t6, R8
- 9: INCEIPL $4
-
- 0x25483EB4: 7CA44378 or r4,r5,r8
- 10: GETL R5, t8
- 11: GETL R8, t10
- 12: ORL t10, t8
- 13: PUTL t8, R4
- 14: INCEIPL $4
-
- 0x25483EB8: 38210010 addi r1,r1,16
- 15: GETL R1, t12
- 16: ADDL $0x10, t12
- 17: PUTL t12, R1
- 18: INCEIPL $4
-
- 0x25483EBC: 90830000 stw r4,0(r3)
- 19: GETL R4, t14
- 20: GETL R3, t16
- 21: STL t14, (t16)
- 22: INCEIPL $4
-
- 0x25483EC0: 4E800020 blr
- 23: GETL LR, t18
- 24: JMPo-r t18 ($4)
-
-
-. 0 25483EAC 24
-. 7D 65 40 30 7D 48 3C 30 7C A4 43 78 38 21 00 10 90 83 00 00 4E 80 00 20
-
-==== BB 353 (0x25483AF4) approx BBs exec'd 0 ====
-
- 0x25483AF4: 4BFFFF9C b 0x25483A90
- 0: JMPo $0x25483A90 ($4)
-
-
-. 0 25483AF4 4
-. 4B FF FF 9C
-
-==== BB 354 (0x25474CAC) approx BBs exec'd 0 ====
-
- 0x25474CAC: 813A0000 lwz r9,0(r26)
- 0: GETL R26, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0x25474CB0: 895C0000 lbz r10,0(r28)
- 4: GETL R28, t4
- 5: LDB (t4), t6
- 6: PUTL t6, R10
- 7: INCEIPL $4
-
- 0x25474CB4: 2C890000 cmpi cr1,r9,0
- 8: GETL R9, t8
- 9: CMP0L t8, t10 (-rSo)
- 10: ICRFL t10, $0x1, CR
- 11: INCEIPL $4
-
- 0x25474CB8: 6948002F xori r8,r10,0x2F
- 12: GETL R10, t12
- 13: XORL $0x2F, t12
- 14: PUTL t12, R8
- 15: INCEIPL $4
-
- 0x25474CBC: 7F8800D0 neg r28,r8
- 16: GETL R8, t14
- 17: NEGL t14
- 18: PUTL t14, R28
- 19: INCEIPL $4
-
- 0x25474CC0: 578317BC rlwinm r3,r28,2,30,30
- 20: GETL R28, t16
- 21: ROLL $0x2, t16
- 22: ANDL $0x2, t16
- 23: PUTL t16, R3
- 24: INCEIPL $4
-
- 0x25474CC4: 41860018 bc 12,6,0x25474CDC
- 25: Js06o $0x25474CDC
-
-
-. 0 25474CAC 28
-. 81 3A 00 00 89 5C 00 00 2C 89 00 00 69 48 00 2F 7F 88 00 D0 57 83 17 BC 41 86 00 18
-
-==== BB 355 (0x25483EE8) approx BBs exec'd 0 ====
-
- 0x25483EE8: 81640000 lwz r11,0(r4)
- 0: GETL R4, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R11
- 3: INCEIPL $4
-
- 0x25483EEC: 38A5FFFF addi r5,r5,-1
- 4: GETL R5, t4
- 5: ADDL $0xFFFFFFFF, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x25483EF0: 81440004 lwz r10,4(r4)
- 8: GETL R4, t6
- 9: ADDL $0x4, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R10
- 12: INCEIPL $4
-
- 0x25483EF4: 38840008 addi r4,r4,8
- 13: GETL R4, t10
- 14: ADDL $0x8, t10
- 15: PUTL t10, R4
- 16: INCEIPL $4
-
- 0x25483EF8: 4BFFFF54 b 0x25483E4C
- 17: JMPo $0x25483E4C ($4)
-
-
-. 0 25483EE8 20
-. 81 64 00 00 38 A5 FF FF 81 44 00 04 38 84 00 08 4B FF FF 54
-
-==== BB 356 (0x2548039C) approx BBs exec'd 0 ====
-
- 0x2548039C: 91280000 stw r9,0(r8)
- 0: GETL R9, t0
- 1: GETL R8, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0x254803A0: 38210010 addi r1,r1,16
- 4: GETL R1, t4
- 5: ADDL $0x10, t4
- 6: PUTL t4, R1
- 7: INCEIPL $4
-
- 0x254803A4: 4E800020 blr
- 8: GETL LR, t6
- 9: JMPo-r t6 ($4)
-
-
-. 0 2548039C 12
-. 91 28 00 00 38 21 00 10 4E 80 00 20
-
-==== BB 357 (0x25474C00) approx BBs exec'd 0 ====
-
- 0x25474C00: 839E0150 lwz r28,336(r30)
- 0: GETL R30, t0
- 1: ADDL $0x150, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R28
- 4: INCEIPL $4
-
- 0x25474C04: 2F940000 cmpi cr7,r20,0
- 5: GETL R20, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x25474C08: 409E01F0 bc 4,30,0x25474DF8
- 9: Jc30o $0x25474DF8
-
-
-. 0 25474C00 12
-. 83 9E 01 50 2F 94 00 00 40 9E 01 F0
-
-==== BB 358 (0x25474D3C) approx BBs exec'd 0 ====
-
- 0x25474D3C: 81E10064 lwz r15,100(r1)
- 0: GETL R1, t0
- 1: ADDL $0x64, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R15
- 4: INCEIPL $4
-
- 0x25474D40: 5710103A rlwinm r16,r24,2,0,29
- 5: GETL R24, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R16
- 8: INCEIPL $4
-
- 0x25474D44: 81810018 lwz r12,24(r1)
- 9: GETL R1, t6
- 10: ADDL $0x18, t6
- 11: LDL (t6), t8
- 12: PUTL t8, R12
- 13: INCEIPL $4
-
- 0x25474D48: 7C70B12E stwx r3,r16,r22
- 14: GETL R22, t10
- 15: GETL R16, t12
- 16: ADDL t12, t10
- 17: GETL R3, t14
- 18: STL t14, (t10)
- 19: INCEIPL $4
-
- 0x25474D4C: 7DE803A6 mtlr r15
- 20: GETL R15, t16
- 21: PUTL t16, LR
- 22: INCEIPL $4
-
- 0x25474D50: 7EC3B378 or r3,r22,r22
- 23: GETL R22, t18
- 24: PUTL t18, R3
- 25: INCEIPL $4
-
- 0x25474D54: 81E1001C lwz r15,28(r1)
- 26: GETL R1, t20
- 27: ADDL $0x1C, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R15
- 30: INCEIPL $4
-
- 0x25474D58: 82010020 lwz r16,32(r1)
- 31: GETL R1, t24
- 32: ADDL $0x20, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R16
- 35: INCEIPL $4
-
- 0x25474D5C: 7D818120 mtcrf 0x18,r12
- 36: GETL R12, t28
- 37: ICRFL t28, $0x3, CR
- 38: ICRFL t28, $0x4, CR
- 39: INCEIPL $4
-
- 0x25474D60: 82210024 lwz r17,36(r1)
- 40: GETL R1, t30
- 41: ADDL $0x24, t30
- 42: LDL (t30), t32
- 43: PUTL t32, R17
- 44: INCEIPL $4
-
- 0x25474D64: 82410028 lwz r18,40(r1)
- 45: GETL R1, t34
- 46: ADDL $0x28, t34
- 47: LDL (t34), t36
- 48: PUTL t36, R18
- 49: INCEIPL $4
-
- 0x25474D68: 8261002C lwz r19,44(r1)
- 50: GETL R1, t38
- 51: ADDL $0x2C, t38
- 52: LDL (t38), t40
- 53: PUTL t40, R19
- 54: INCEIPL $4
-
- 0x25474D6C: 82810030 lwz r20,48(r1)
- 55: GETL R1, t42
- 56: ADDL $0x30, t42
- 57: LDL (t42), t44
- 58: PUTL t44, R20
- 59: INCEIPL $4
-
- 0x25474D70: 82A10034 lwz r21,52(r1)
- 60: GETL R1, t46
- 61: ADDL $0x34, t46
- 62: LDL (t46), t48
- 63: PUTL t48, R21
- 64: INCEIPL $4
-
- 0x25474D74: 82C10038 lwz r22,56(r1)
- 65: GETL R1, t50
- 66: ADDL $0x38, t50
- 67: LDL (t50), t52
- 68: PUTL t52, R22
- 69: INCEIPL $4
-
- 0x25474D78: 82E1003C lwz r23,60(r1)
- 70: GETL R1, t54
- 71: ADDL $0x3C, t54
- 72: LDL (t54), t56
- 73: PUTL t56, R23
- 74: INCEIPL $4
-
- 0x25474D7C: 83010040 lwz r24,64(r1)
- 75: GETL R1, t58
- 76: ADDL $0x40, t58
- 77: LDL (t58), t60
- 78: PUTL t60, R24
- 79: INCEIPL $4
-
- 0x25474D80: 83210044 lwz r25,68(r1)
- 80: GETL R1, t62
- 81: ADDL $0x44, t62
- 82: LDL (t62), t64
- 83: PUTL t64, R25
- 84: INCEIPL $4
-
- 0x25474D84: 83410048 lwz r26,72(r1)
- 85: GETL R1, t66
- 86: ADDL $0x48, t66
- 87: LDL (t66), t68
- 88: PUTL t68, R26
- 89: INCEIPL $4
-
- 0x25474D88: 8361004C lwz r27,76(r1)
- 90: GETL R1, t70
- 91: ADDL $0x4C, t70
- 92: LDL (t70), t72
- 93: PUTL t72, R27
- 94: INCEIPL $4
-
- 0x25474D8C: 83810050 lwz r28,80(r1)
- 95: GETL R1, t74
- 96: ADDL $0x50, t74
- 97: LDL (t74), t76
- 98: PUTL t76, R28
- 99: INCEIPL $4
-
- 0x25474D90: 83A10054 lwz r29,84(r1)
- 100: GETL R1, t78
- 101: ADDL $0x54, t78
- 102: LDL (t78), t80
- 103: PUTL t80, R29
- 104: INCEIPL $4
-
- 0x25474D94: 83C10058 lwz r30,88(r1)
- 105: GETL R1, t82
- 106: ADDL $0x58, t82
- 107: LDL (t82), t84
- 108: PUTL t84, R30
- 109: INCEIPL $4
-
- 0x25474D98: 83E1005C lwz r31,92(r1)
- 110: GETL R1, t86
- 111: ADDL $0x5C, t86
- 112: LDL (t86), t88
- 113: PUTL t88, R31
- 114: INCEIPL $4
-
- 0x25474D9C: 38210060 addi r1,r1,96
- 115: GETL R1, t90
- 116: ADDL $0x60, t90
- 117: PUTL t90, R1
- 118: INCEIPL $4
-
- 0x25474DA0: 4E800020 blr
- 119: GETL LR, t92
- 120: JMPo-r t92 ($4)
-
-
-. 0 25474D3C 104
-. 81 E1 00 64 57 10 10 3A 81 81 00 18 7C 70 B1 2E 7D E8 03 A6 7E C3 B3 78 81 E1 00 1C 82 01 00 20 7D 81 81 20 82 21 00 24 82 41 00 28 82 61 00 2C 82 81 00 30 82 A1 00 34 82 C1 00 38 82 E1 00 3C 83 01 00 40 83 21 00 44 83 41 00 48 83 61 00 4C 83 81 00 50 83 A1 00 54 83 C1 00 58 83 E1 00 5C 38 21 00 60 4E 80 00 20
-
-==== BB 359 (0x254753B0) approx BBs exec'd 0 ====
-
- 0x254753B0: 807D0000 lwz r3,0(r29)
- 0: GETL R29, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R3
- 3: INCEIPL $4
-
- 0x254753B4: 83830000 lwz r28,0(r3)
- 4: GETL R3, t4
- 5: LDL (t4), t6
- 6: PUTL t6, R28
- 7: INCEIPL $4
-
- 0x254753B8: 2C1C0000 cmpi cr0,r28,0
- 8: GETL R28, t8
- 9: CMP0L t8, t10 (-rSo)
- 10: ICRFL t10, $0x0, CR
- 11: INCEIPL $4
-
- 0x254753BC: 41820074 bc 12,2,0x25475430
- 12: Js02o $0x25475430
-
-
-. 0 254753B0 16
-. 80 7D 00 00 83 83 00 00 2C 1C 00 00 41 82 00 74
-
-==== BB 360 (0x254753C0) approx BBs exec'd 0 ====
-
- 0x254753C0: 38E00000 li r7,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R7
- 2: INCEIPL $4
-
- 0x254753C4: 90FD0004 stw r7,4(r29)
- 3: GETL R7, t2
- 4: GETL R29, t4
- 5: ADDL $0x4, t4
- 6: STL t2, (t4)
- 7: INCEIPL $4
-
- 0x254753C8: 83B701B0 lwz r29,432(r23)
- 8: GETL R23, t6
- 9: ADDL $0x1B0, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R29
- 12: INCEIPL $4
-
- 0x254753CC: 93B80060 stw r29,96(r24)
- 13: GETL R29, t10
- 14: GETL R24, t12
- 15: ADDL $0x60, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x254753D0: 81410000 lwz r10,0(r1)
- 18: GETL R1, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R10
- 21: INCEIPL $4
-
- 0x254753D4: 82EA0004 lwz r23,4(r10)
- 22: GETL R10, t18
- 23: ADDL $0x4, t18
- 24: LDL (t18), t20
- 25: PUTL t20, R23
- 26: INCEIPL $4
-
- 0x254753D8: 830AFFE0 lwz r24,-32(r10)
- 27: GETL R10, t22
- 28: ADDL $0xFFFFFFE0, t22
- 29: LDL (t22), t24
- 30: PUTL t24, R24
- 31: INCEIPL $4
-
- 0x254753DC: 7EE803A6 mtlr r23
- 32: GETL R23, t26
- 33: PUTL t26, LR
- 34: INCEIPL $4
-
- 0x254753E0: 832AFFE4 lwz r25,-28(r10)
- 35: GETL R10, t28
- 36: ADDL $0xFFFFFFE4, t28
- 37: LDL (t28), t30
- 38: PUTL t30, R25
- 39: INCEIPL $4
-
- 0x254753E4: 82EAFFDC lwz r23,-36(r10)
- 40: GETL R10, t32
- 41: ADDL $0xFFFFFFDC, t32
- 42: LDL (t32), t34
- 43: PUTL t34, R23
- 44: INCEIPL $4
-
- 0x254753E8: 834AFFE8 lwz r26,-24(r10)
- 45: GETL R10, t36
- 46: ADDL $0xFFFFFFE8, t36
- 47: LDL (t36), t38
- 48: PUTL t38, R26
- 49: INCEIPL $4
-
- 0x254753EC: 836AFFEC lwz r27,-20(r10)
- 50: GETL R10, t40
- 51: ADDL $0xFFFFFFEC, t40
- 52: LDL (t40), t42
- 53: PUTL t42, R27
- 54: INCEIPL $4
-
- 0x254753F0: 838AFFF0 lwz r28,-16(r10)
- 55: GETL R10, t44
- 56: ADDL $0xFFFFFFF0, t44
- 57: LDL (t44), t46
- 58: PUTL t46, R28
- 59: INCEIPL $4
-
- 0x254753F4: 83AAFFF4 lwz r29,-12(r10)
- 60: GETL R10, t48
- 61: ADDL $0xFFFFFFF4, t48
- 62: LDL (t48), t50
- 63: PUTL t50, R29
- 64: INCEIPL $4
-
- 0x254753F8: 83CAFFF8 lwz r30,-8(r10)
- 65: GETL R10, t52
- 66: ADDL $0xFFFFFFF8, t52
- 67: LDL (t52), t54
- 68: PUTL t54, R30
- 69: INCEIPL $4
-
- 0x254753FC: 83EAFFFC lwz r31,-4(r10)
- 70: GETL R10, t56
- 71: ADDL $0xFFFFFFFC, t56
- 72: LDL (t56), t58
- 73: PUTL t58, R31
- 74: INCEIPL $4
-
- 0x25475400: 7D415378 or r1,r10,r10
- 75: GETL R10, t60
- 76: PUTL t60, R1
- 77: INCEIPL $4
-
- 0x25475404: 4E800020 blr
- 78: GETL LR, t62
- 79: JMPo-r t62 ($4)
-
-
-. 0 254753C0 72
-. 38 E0 00 00 90 FD 00 04 83 B7 01 B0 93 B8 00 60 81 41 00 00 82 EA 00 04 83 0A FF E0 7E E8 03 A6 83 2A FF E4 82 EA FF DC 83 4A FF E8 83 6A FF EC 83 8A FF F0 83 AA FF F4 83 CA FF F8 83 EA FF FC 7D 41 53 78 4E 80 00 20
-
-==== BB 361 (0x25472F70) approx BBs exec'd 0 ====
-
- 0x25472F70: 4BFFF76C b 0x254726DC
- 0: JMPo $0x254726DC ($4)
-
-
-. 0 25472F70 4
-. 4B FF F7 6C
-
-==== BB 362 (0x254726DC) approx BBs exec'd 0 ====
-
- 0x254726DC: 80EE01BC lwz r7,444(r14)
- 0: GETL R14, t0
- 1: ADDL $0x1BC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x254726E0: 2E070000 cmpi cr4,r7,0
- 5: GETL R7, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x4, CR
- 8: INCEIPL $4
-
- 0x254726E4: 40920010 bc 4,18,0x254726F4
- 9: Jc18o $0x254726F4
-
-
-. 0 254726DC 12
-. 80 EE 01 BC 2E 07 00 00 40 92 00 10
-
-==== BB 363 (0x254726E8) approx BBs exec'd 0 ====
-
- 0x254726E8: 83AE01D4 lwz r29,468(r14)
- 0: GETL R14, t0
- 1: ADDL $0x1D4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x254726EC: 815D0000 lwz r10,0(r29)
- 5: GETL R29, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R10
- 8: INCEIPL $4
-
- 0x254726F0: 914E01BC stw r10,444(r14)
- 9: GETL R10, t8
- 10: GETL R14, t10
- 11: ADDL $0x1BC, t10
- 12: STL t8, (t10)
- 13: INCEIPL $4
-
- 0x254726F4: 834F004C lwz r26,76(r15)
- 14: GETL R15, t12
- 15: ADDL $0x4C, t12
- 16: LDL (t12), t14
- 17: PUTL t14, R26
- 18: INCEIPL $4
-
- 0x254726F8: 3AE00001 li r23,1
- 19: MOVL $0x1, t16
- 20: PUTL t16, R23
- 21: INCEIPL $4
-
- 0x254726FC: 808E0338 lwz r4,824(r14)
- 22: GETL R14, t18
- 23: ADDL $0x338, t18
- 24: LDL (t18), t20
- 25: PUTL t20, R4
- 26: INCEIPL $4
-
- 0x25472700: 386E01B8 addi r3,r14,440
- 27: GETL R14, t22
- 28: ADDL $0x1B8, t22
- 29: PUTL t22, R3
- 30: INCEIPL $4
-
- 0x25472704: 2C1AFFFE cmpi cr0,r26,-2
- 31: GETL R26, t24
- 32: MOVL $0xFFFFFFFE, t28
- 33: CMPL t24, t28, t26 (-rSo)
- 34: ICRFL t26, $0x0, CR
- 35: INCEIPL $4
-
- 0x25472708: 826E0004 lwz r19,4(r14)
- 36: GETL R14, t30
- 37: ADDL $0x4, t30
- 38: LDL (t30), t32
- 39: PUTL t32, R19
- 40: INCEIPL $4
-
- 0x2547270C: 816E0198 lwz r11,408(r14)
- 41: GETL R14, t34
- 42: ADDL $0x198, t34
- 43: LDL (t34), t36
- 44: PUTL t36, R11
- 45: INCEIPL $4
-
- 0x25472710: 52E4F002 rlwimi r4,r23,30,0,1
- 46: GETL R4, t38
- 47: GETL R23, t40
- 48: ROLL $0x1E, t40
- 49: ANDL $0xC0000000, t40
- 50: ANDL $0x3FFFFFFF, t38
- 51: ORL t38, t40
- 52: PUTL t40, R4
- 53: INCEIPL $4
-
- 0x25472714: 818E019C lwz r12,412(r14)
- 54: GETL R14, t42
- 55: ADDL $0x19C, t42
- 56: LDL (t42), t44
- 57: PUTL t44, R12
- 58: INCEIPL $4
-
- 0x25472718: 38B30001 addi r5,r19,1
- 59: GETL R19, t46
- 60: ADDL $0x1, t46
- 61: PUTL t46, R5
- 62: INCEIPL $4
-
- 0x2547271C: 908E0338 stw r4,824(r14)
- 63: GETL R4, t48
- 64: GETL R14, t50
- 65: ADDL $0x338, t50
- 66: STL t48, (t50)
- 67: INCEIPL $4
-
- 0x25472720: 310C0001 addic r8,r12,1
- 68: GETL R12, t52
- 69: ADCL $0x1, t52 (-wCa)
- 70: PUTL t52, R8
- 71: INCEIPL $4
-
- 0x25472724: 7CEB0194 addze r7,r11
- 72: GETL R11, t54
- 73: ADCL $0x0, t54 (-rCa-wCa)
- 74: PUTL t54, R7
- 75: INCEIPL $4
-
- 0x25472728: 90AE0004 stw r5,4(r14)
- 76: GETL R5, t56
- 77: GETL R14, t58
- 78: ADDL $0x4, t58
- 79: STL t56, (t58)
- 80: INCEIPL $4
-
- 0x2547272C: 9074000C stw r3,12(r20)
- 81: GETL R3, t60
- 82: GETL R20, t62
- 83: ADDL $0xC, t62
- 84: STL t60, (t62)
- 85: INCEIPL $4
-
- 0x25472730: 90EE0198 stw r7,408(r14)
- 86: GETL R7, t64
- 87: GETL R14, t66
- 88: ADDL $0x198, t66
- 89: STL t64, (t66)
- 90: INCEIPL $4
-
- 0x25472734: 910E019C stw r8,412(r14)
- 91: GETL R8, t68
- 92: GETL R14, t70
- 93: ADDL $0x19C, t70
- 94: STL t68, (t70)
- 95: INCEIPL $4
-
- 0x25472738: 928E01C8 stw r20,456(r14)
- 96: GETL R20, t72
- 97: GETL R14, t74
- 98: ADDL $0x1C8, t74
- 99: STL t72, (t74)
- 100: INCEIPL $4
-
- 0x2547273C: 41820838 bc 12,2,0x25472F74
- 101: Js02o $0x25472F74
-
-
-. 0 254726E8 88
-. 83 AE 01 D4 81 5D 00 00 91 4E 01 BC 83 4F 00 4C 3A E0 00 01 80 8E 03 38 38 6E 01 B8 2C 1A FF FE 82 6E 00 04 81 6E 01 98 52 E4 F0 02 81 8E 01 9C 38 B3 00 01 90 8E 03 38 31 0C 00 01 7C EB 01 94 90 AE 00 04 90 74 00 0C 90 EE 01 98 91 0E 01 9C 92 8E 01 C8 41 82 08 38
-
-==== BB 364 (0x25472F74) approx BBs exec'd 0 ====
-
- 0x25472F74: 80140000 lwz r0,0(r20)
- 0: GETL R20, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x25472F78: 7DE97B78 or r9,r15,r15
- 4: GETL R15, t4
- 5: PUTL t4, R9
- 6: INCEIPL $4
-
- 0x25472F7C: 2F000000 cmpi cr6,r0,0
- 7: GETL R0, t6
- 8: CMP0L t6, t8 (-rSo)
- 9: ICRFL t8, $0x6, CR
- 10: INCEIPL $4
-
- 0x25472F80: 3800FFFF li r0,-1
- 11: MOVL $0xFFFFFFFF, t10
- 12: PUTL t10, R0
- 13: INCEIPL $4
-
- 0x25472F84: 419A0008 bc 12,26,0x25472F8C
- 14: Js26o $0x25472F8C
-
-
-. 0 25472F74 20
-. 80 14 00 00 7D E9 7B 78 2F 00 00 00 38 00 FF FF 41 9A 00 08
-
-==== BB 365 (0x25472F8C) approx BBs exec'd 0 ====
-
- 0x25472F8C: 9009004C stw r0,76(r9)
- 0: GETL R0, t0
- 1: GETL R9, t2
- 2: ADDL $0x4C, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25472F90: 4BFFF7B0 b 0x25472740
- 5: JMPo $0x25472740 ($4)
-
-
-. 0 25472F8C 8
-. 90 09 00 4C 4B FF F7 B0
-
-==== BB 366 (0x25472740) approx BBs exec'd 0 ====
-
- 0x25472740: 818E0358 lwz r12,856(r14)
- 0: GETL R14, t0
- 1: ADDL $0x358, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R12
- 4: INCEIPL $4
-
- 0x25472744: A16C002C lhz r11,44(r12)
- 5: GETL R12, t4
- 6: ADDL $0x2C, t4
- 7: LDW (t4), t6
- 8: PUTL t6, R11
- 9: INCEIPL $4
-
- 0x25472748: 838C001C lwz r28,28(r12)
- 10: GETL R12, t8
- 11: ADDL $0x1C, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R28
- 14: INCEIPL $4
-
- 0x2547274C: B16E030C sth r11,780(r14)
- 15: GETL R11, t12
- 16: GETL R14, t14
- 17: ADDL $0x30C, t14
- 18: STW t12, (t14)
- 19: INCEIPL $4
-
- 0x25472750: A32C002C lhz r25,44(r12)
- 20: GETL R12, t16
- 21: ADDL $0x2C, t16
- 22: LDW (t16), t18
- 23: PUTL t18, R25
- 24: INCEIPL $4
-
- 0x25472754: 7D6CE214 add r11,r12,r28
- 25: GETL R12, t20
- 26: GETL R28, t22
- 27: ADDL t20, t22
- 28: PUTL t22, R11
- 29: INCEIPL $4
-
- 0x25472758: 916E0304 stw r11,772(r14)
- 30: GETL R11, t24
- 31: GETL R14, t26
- 32: ADDL $0x304, t26
- 33: STL t24, (t26)
- 34: INCEIPL $4
-
- 0x2547275C: 2F990000 cmpi cr7,r25,0
- 35: GETL R25, t28
- 36: CMP0L t28, t30 (-rSo)
- 37: ICRFL t30, $0x7, CR
- 38: INCEIPL $4
-
- 0x25472760: 3959FFFF addi r10,r25,-1
- 39: GETL R25, t32
- 40: ADDL $0xFFFFFFFF, t32
- 41: PUTL t32, R10
- 42: INCEIPL $4
-
- 0x25472764: 419E002C bc 12,30,0x25472790
- 43: Js30o $0x25472790
-
-
-. 0 25472740 40
-. 81 8E 03 58 A1 6C 00 2C 83 8C 00 1C B1 6E 03 0C A3 2C 00 2C 7D 6C E2 14 91 6E 03 04 2F 99 00 00 39 59 FF FF 41 9E 00 2C
-
-==== BB 367 (0x25472768) approx BBs exec'd 0 ====
-
- 0x25472768: 3D206474 lis r9,25716
- 0: MOVL $0x64740000, t0
- 1: PUTL t0, R9
- 2: INCEIPL $4
-
- 0x2547276C: 6127E552 ori r7,r9,0xE552
- 3: MOVL $0x6474E552, t2
- 4: PUTL t2, R7
- 5: INCEIPL $4
-
- 0x25472770: 55582834 rlwinm r24,r10,5,0,26
- 6: GETL R10, t4
- 7: SHLL $0x5, t4
- 8: PUTL t4, R24
- 9: INCEIPL $4
-
- 0x25472774: 7F78582E lwzx r27,r24,r11
- 10: GETL R11, t6
- 11: GETL R24, t8
- 12: ADDL t8, t6
- 13: LDL (t6), t10
- 14: PUTL t10, R27
- 15: INCEIPL $4
-
- 0x25472778: 7D185A14 add r8,r24,r11
- 16: GETL R24, t12
- 17: GETL R11, t14
- 18: ADDL t12, t14
- 19: PUTL t14, R8
- 20: INCEIPL $4
-
- 0x2547277C: 7C9B3800 cmp cr1,r27,r7
- 21: GETL R27, t16
- 22: GETL R7, t18
- 23: CMPL t16, t18, t20 (-rSo)
- 24: ICRFL t20, $0x1, CR
- 25: INCEIPL $4
-
- 0x25472780: 41860C80 bc 12,6,0x25473400
- 26: Js06o $0x25473400
-
-
-. 0 25472768 28
-. 3D 20 64 74 61 27 E5 52 55 58 28 34 7F 78 58 2E 7D 18 5A 14 7C 9B 38 00 41 86 0C 80
-
-==== BB 368 (0x25473400) approx BBs exec'd 0 ====
-
- 0x25473400: 83B10000 lwz r29,0(r17)
- 0: GETL R17, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R29
- 3: INCEIPL $4
-
- 0x25473404: 3B400000 li r26,0
- 4: MOVL $0x0, t4
- 5: PUTL t4, R26
- 6: INCEIPL $4
-
- 0x25473408: 82C80008 lwz r22,8(r8)
- 7: GETL R8, t6
- 8: ADDL $0x8, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R22
- 11: INCEIPL $4
-
- 0x2547340C: 3B200000 li r25,0
- 12: MOVL $0x0, t10
- 13: PUTL t10, R25
- 14: INCEIPL $4
-
- 0x25473410: 2C1D0000 cmpi cr0,r29,0
- 15: GETL R29, t12
- 16: CMP0L t12, t14 (-rSo)
- 17: ICRFL t14, $0x0, CR
- 18: INCEIPL $4
-
- 0x25473414: 92CE03EC stw r22,1004(r14)
- 19: GETL R22, t16
- 20: GETL R14, t18
- 21: ADDL $0x3EC, t18
- 22: STL t16, (t18)
- 23: INCEIPL $4
-
- 0x25473418: 80C80014 lwz r6,20(r8)
- 24: GETL R8, t20
- 25: ADDL $0x14, t20
- 26: LDL (t20), t22
- 27: PUTL t22, R6
- 28: INCEIPL $4
-
- 0x2547341C: 90CE03F0 stw r6,1008(r14)
- 29: GETL R6, t24
- 30: GETL R14, t26
- 31: ADDL $0x3F0, t26
- 32: STL t24, (t26)
- 33: INCEIPL $4
-
- 0x25473420: 4182F384 bc 12,2,0x254727A4
- 34: Js02o $0x254727A4
-
-
-. 0 25473400 36
-. 83 B1 00 00 3B 40 00 00 82 C8 00 08 3B 20 00 00 2C 1D 00 00 92 CE 03 EC 80 C8 00 14 90 CE 03 F0 41 82 F3 84
-
-==== BB 369 (0x25473424) approx BBs exec'd 0 ====
-
- 0x25473424: 7FA3EB78 or r3,r29,r29
- 0: GETL R29, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25473428: 4800FBA9 bl 0x25482FD0
- 3: MOVL $0x2547342C, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x25482FD0 ($4)
-
-
-. 0 25473424 8
-. 7F A3 EB 78 48 00 FB A9
-
-==== BB 370 (0x2547342C) approx BBs exec'd 0 ====
-
- 0x2547342C: 7FA4EB78 or r4,r29,r29
- 0: GETL R29, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x25473430: 7C711B78 or r17,r3,r3
- 3: GETL R3, t2
- 4: PUTL t2, R17
- 5: INCEIPL $4
-
- 0x25473434: 3863001F addi r3,r3,31
- 6: GETL R3, t4
- 7: ADDL $0x1F, t4
- 8: PUTL t4, R3
- 9: INCEIPL $4
-
- 0x25473438: 546A0036 rlwinm r10,r3,0,0,27
- 10: GETL R3, t6
- 11: ANDL $0xFFFFFFF0, t6
- 12: PUTL t6, R10
- 13: INCEIPL $4
-
- 0x2547343C: 80E10000 lwz r7,0(r1)
- 14: GETL R1, t8
- 15: LDL (t8), t10
- 16: PUTL t10, R7
- 17: INCEIPL $4
-
- 0x25473440: 7EAA00D0 neg r21,r10
- 18: GETL R10, t12
- 19: NEGL t12
- 20: PUTL t12, R21
- 21: INCEIPL $4
-
- 0x25473444: 38B10001 addi r5,r17,1
- 22: GETL R17, t14
- 23: ADDL $0x1, t14
- 24: PUTL t14, R5
- 25: INCEIPL $4
-
- 0x25473448: 7CE1A96E stwux r7,r1,r21
- 26: GETL R21, t16
- 27: GETL R1, t18
- 28: ADDL t18, t16
- 29: PUTL t16, R1
- 30: GETL R7, t20
- 31: STL t20, (t16)
- 32: INCEIPL $4
-
- 0x2547344C: 39010017 addi r8,r1,23
- 33: GETL R1, t22
- 34: ADDL $0x17, t22
- 35: PUTL t22, R8
- 36: INCEIPL $4
-
- 0x25473450: 55030036 rlwinm r3,r8,0,0,27
- 37: GETL R8, t24
- 38: ANDL $0xFFFFFFF0, t24
- 39: PUTL t24, R3
- 40: INCEIPL $4
-
- 0x25473454: 4801078D bl 0x25483BE0
- 41: MOVL $0x25473458, t26
- 42: PUTL t26, LR
- 43: JMPo-c $0x25483BE0 ($4)
-
-
-. 0 2547342C 44
-. 7F A4 EB 78 7C 71 1B 78 38 63 00 1F 54 6A 00 36 80 E1 00 00 7E AA 00 D0 38 B1 00 01 7C E1 A9 6E 39 01 00 17 55 03 00 36 48 01 07 8D
-
-==== BB 371 (0x25483CB0) approx BBs exec'd 0 ====
-
- 0x25483CB0: 7FE3FB78 or r3,r31,r31
- 0: GETL R31, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25483CB4: 7FA4EB78 or r4,r29,r29
- 3: GETL R29, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x25483CB8: 5785F0BE rlwinm r5,r28,30,2,31
- 6: GETL R28, t4
- 7: SHRL $0x2, t4
- 8: PUTL t4, R5
- 9: INCEIPL $4
-
- 0x25483CBC: 4800015D bl 0x25483E18
- 10: MOVL $0x25483CC0, t6
- 11: PUTL t6, LR
- 12: JMPo-c $0x25483E18 ($4)
-
-
-. 0 25483CB0 16
-. 7F E3 FB 78 7F A4 EB 78 57 85 F0 BE 48 00 01 5D
-
-==== BB 372 (0x25483EC4) approx BBs exec'd 0 ====
-
- 0x25483EC4: 81440000 lwz r10,0(r4)
- 0: GETL R4, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R10
- 3: INCEIPL $4
-
- 0x25483EC8: 3863FFFC addi r3,r3,-4
- 4: GETL R3, t4
- 5: ADDL $0xFFFFFFFC, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25483ECC: 85640004 lwzu r11,4(r4)
- 8: GETL R4, t6
- 9: ADDL $0x4, t6
- 10: PUTL t6, R4
- 11: LDL (t6), t8
- 12: PUTL t8, R11
- 13: INCEIPL $4
-
- 0x25483ED0: 4BFFFF90 b 0x25483E60
- 14: JMPo $0x25483E60 ($4)
-
-
-. 0 25483EC4 16
-. 81 44 00 00 38 63 FF FC 85 64 00 04 4B FF FF 90
-
-==== BB 373 (0x25483E60) approx BBs exec'd 0 ====
-
- 0x25483E60: 7D404030 slw r0,r10,r8
- 0: GETL R10, t2
- 1: GETL R8, t0
- 2: SHLL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25483E64: 7D6A3C30 srw r10,r11,r7
- 5: GETL R11, t6
- 6: GETL R7, t4
- 7: SHRL t4, t6
- 8: PUTL t6, R10
- 9: INCEIPL $4
-
- 0x25483E68: 7C0C5378 or r12,r0,r10
- 10: GETL R0, t8
- 11: GETL R10, t10
- 12: ORL t10, t8
- 13: PUTL t8, R12
- 14: INCEIPL $4
-
- 0x25483E6C: 81440004 lwz r10,4(r4)
- 15: GETL R4, t12
- 16: ADDL $0x4, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R10
- 19: INCEIPL $4
-
- 0x25483E70: 91830004 stw r12,4(r3)
- 20: GETL R12, t16
- 21: GETL R3, t18
- 22: ADDL $0x4, t18
- 23: STL t16, (t18)
- 24: INCEIPL $4
-
- 0x25483E74: 7D6C4030 slw r12,r11,r8
- 25: GETL R11, t22
- 26: GETL R8, t20
- 27: SHLL t20, t22
- 28: PUTL t22, R12
- 29: INCEIPL $4
-
- 0x25483E78: 7D4B3C30 srw r11,r10,r7
- 30: GETL R10, t26
- 31: GETL R7, t24
- 32: SHRL t24, t26
- 33: PUTL t26, R11
- 34: INCEIPL $4
-
- 0x25483E7C: 7D865B78 or r6,r12,r11
- 35: GETL R12, t28
- 36: GETL R11, t30
- 37: ORL t30, t28
- 38: PUTL t28, R6
- 39: INCEIPL $4
-
- 0x25483E80: 81640008 lwz r11,8(r4)
- 40: GETL R4, t32
- 41: ADDL $0x8, t32
- 42: LDL (t32), t34
- 43: PUTL t34, R11
- 44: INCEIPL $4
-
- 0x25483E84: 90C30008 stw r6,8(r3)
- 45: GETL R6, t36
- 46: GETL R3, t38
- 47: ADDL $0x8, t38
- 48: STL t36, (t38)
- 49: INCEIPL $4
-
- 0x25483E88: 34A5FFFC addic. r5,r5,-4
- 50: GETL R5, t40
- 51: ADCL $0xFFFFFFFC, t40 (-wCa)
- 52: PUTL t40, R5
- 53: CMP0L t40, t42 (-rSo)
- 54: ICRFL t42, $0x0, CR
- 55: INCEIPL $4
-
- 0x25483E8C: 7D464030 slw r6,r10,r8
- 56: GETL R10, t46
- 57: GETL R8, t44
- 58: SHLL t44, t46
- 59: PUTL t46, R6
- 60: INCEIPL $4
-
- 0x25483E90: 7D693C30 srw r9,r11,r7
- 61: GETL R11, t50
- 62: GETL R7, t48
- 63: SHRL t48, t50
- 64: PUTL t50, R9
- 65: INCEIPL $4
-
- 0x25483E94: 8144000C lwz r10,12(r4)
- 66: GETL R4, t52
- 67: ADDL $0xC, t52
- 68: LDL (t52), t54
- 69: PUTL t54, R10
- 70: INCEIPL $4
-
- 0x25483E98: 7CC04B78 or r0,r6,r9
- 71: GETL R6, t56
- 72: GETL R9, t58
- 73: ORL t58, t56
- 74: PUTL t56, R0
- 75: INCEIPL $4
-
- 0x25483E9C: 38840010 addi r4,r4,16
- 76: GETL R4, t60
- 77: ADDL $0x10, t60
- 78: PUTL t60, R4
- 79: INCEIPL $4
-
- 0x25483EA0: 9003000C stw r0,12(r3)
- 80: GETL R0, t62
- 81: GETL R3, t64
- 82: ADDL $0xC, t64
- 83: STL t62, (t64)
- 84: INCEIPL $4
-
- 0x25483EA4: 38630010 addi r3,r3,16
- 85: GETL R3, t66
- 86: ADDL $0x10, t66
- 87: PUTL t66, R3
- 88: INCEIPL $4
-
- 0x25483EA8: 40A2FFA4 bc 5,2,0x25483E4C
- 89: Jc02o $0x25483E4C
-
-
-. 0 25483E60 76
-. 7D 40 40 30 7D 6A 3C 30 7C 0C 53 78 81 44 00 04 91 83 00 04 7D 6C 40 30 7D 4B 3C 30 7D 86 5B 78 81 64 00 08 90 C3 00 08 34 A5 FF FC 7D 46 40 30 7D 69 3C 30 81 44 00 0C 7C C0 4B 78 38 84 00 10 90 03 00 0C 38 63 00 10 40 A2 FF A4
-
-==== BB 374 (0x25483CC0) approx BBs exec'd 0 ====
-
- 0x25483CC0: 4BFFFF98 b 0x25483C58
- 0: JMPo $0x25483C58 ($4)
-
-
-. 0 25483CC0 4
-. 4B FF FF 98
-
-==== BB 375 (0x25473458) approx BBs exec'd 0 ====
-
- 0x25473458: 907F0044 stw r3,68(r31)
- 0: GETL R3, t0
- 1: GETL R31, t2
- 2: ADDL $0x44, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547345C: 809E00D0 lwz r4,208(r30)
- 5: GETL R30, t4
- 6: ADDL $0xD0, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R4
- 9: INCEIPL $4
-
- 0x25473460: 387F0044 addi r3,r31,68
- 10: GETL R31, t8
- 11: ADDL $0x44, t8
- 12: PUTL t8, R3
- 13: INCEIPL $4
-
- 0x25473464: 4800CED9 bl 0x2548033C
- 14: MOVL $0x25473468, t10
- 15: PUTL t10, LR
- 16: JMPo-c $0x2548033C ($4)
-
-
-. 0 25473458 16
-. 90 7F 00 44 80 9E 00 D0 38 7F 00 44 48 00 CE D9
-
-==== BB 376 (0x25480398) approx BBs exec'd 0 ====
-
- 0x25480398: 39200000 li r9,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R9
- 2: INCEIPL $4
-
- 0x2548039C: 91280000 stw r9,0(r8)
- 3: GETL R9, t2
- 4: GETL R8, t4
- 5: STL t2, (t4)
- 6: INCEIPL $4
-
- 0x254803A0: 38210010 addi r1,r1,16
- 7: GETL R1, t6
- 8: ADDL $0x10, t6
- 9: PUTL t6, R1
- 10: INCEIPL $4
-
- 0x254803A4: 4E800020 blr
- 11: GETL LR, t8
- 12: JMPo-r t8 ($4)
-
-
-. 0 25480398 16
-. 39 20 00 00 91 28 00 00 38 21 00 10 4E 80 00 20
-
-==== BB 377 (0x25473468) approx BBs exec'd 0 ====
-
- 0x25473468: 7C7D1B79 or. r29,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R29
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x2547346C: 41A2F338 bc 13,2,0x254727A4
- 5: Js02o $0x254727A4
-
-
-. 0 25473468 8
-. 7C 7D 1B 79 41 A2 F3 38
-
-==== BB 378 (0x25473470) approx BBs exec'd 0 ====
-
- 0x25473470: 88BD0000 lbz r5,0(r29)
- 0: GETL R29, t0
- 1: LDB (t0), t2
- 2: PUTL t2, R5
- 3: INCEIPL $4
-
- 0x25473474: 2F050000 cmpi cr6,r5,0
- 4: GETL R5, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x6, CR
- 7: INCEIPL $4
-
- 0x25473478: 41BAFFE4 bc 13,26,0x2547345C
- 8: Js26o $0x2547345C
-
-
-. 0 25473470 12
-. 88 BD 00 00 2F 05 00 00 41 BA FF E4
-
-==== BB 379 (0x2547347C) approx BBs exec'd 0 ====
-
- 0x2547347C: 80900000 lwz r4,0(r16)
- 0: GETL R16, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R4
- 3: INCEIPL $4
-
- 0x25473480: 2F840000 cmpi cr7,r4,0
- 4: GETL R4, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x7, CR
- 7: INCEIPL $4
-
- 0x25473484: 409E0774 bc 4,30,0x25473BF8
- 8: Jc30o $0x25473BF8
-
-
-. 0 2547347C 12
-. 80 90 00 00 2F 84 00 00 40 9E 07 74
-
-==== BB 380 (0x25473488) approx BBs exec'd 0 ====
-
- 0x25473488: 7FA4EB78 or r4,r29,r29
- 0: GETL R29, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x2547348C: 38A00001 li r5,1
- 3: MOVL $0x1, t2
- 4: PUTL t2, R5
- 5: INCEIPL $4
-
- 0x25473490: 38C00001 li r6,1
- 6: MOVL $0x1, t4
- 7: PUTL t4, R6
- 8: INCEIPL $4
-
- 0x25473494: 38E00000 li r7,0
- 9: MOVL $0x0, t6
- 10: PUTL t6, R7
- 11: INCEIPL $4
-
- 0x25473498: 39000000 li r8,0
- 12: MOVL $0x0, t8
- 13: PUTL t8, R8
- 14: INCEIPL $4
-
- 0x2547349C: 39200000 li r9,0
- 15: MOVL $0x0, t10
- 16: PUTL t10, R9
- 17: INCEIPL $4
-
- 0x254734A0: 7E83A378 or r3,r20,r20
- 18: GETL R20, t12
- 19: PUTL t12, R3
- 20: INCEIPL $4
-
- 0x254734A4: 48003845 bl 0x25476CE8
- 21: MOVL $0x254734A8, t14
- 22: PUTL t14, LR
- 23: JMPo-c $0x25476CE8 ($4)
-
-
-. 0 25473488 32
-. 7F A4 EB 78 38 A0 00 01 38 C0 00 01 38 E0 00 00 39 00 00 00 39 20 00 00 7E 83 A3 78 48 00 38 45
-
-==== BB 381 _dl_map_object(0x25476CE8) approx BBs exec'd 0 ====
-
- 0x25476CE8: 9421FD70 stwu r1,-656(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFD70, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25476CEC: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x25476CF0: 48020311 bl 0x25497000
- 9: MOVL $0x25476CF4, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 25476CE8 12
-. 94 21 FD 70 7C 08 02 A6 48 02 03 11
-
-==== BB 382 (0x25476CF4) approx BBs exec'd 0 ====
-
- 0x25476CF4: 93C10288 stw r30,648(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x288, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25476CF8: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x25476CFC: 9261025C stw r19,604(r1)
- 8: GETL R19, t6
- 9: GETL R1, t8
- 10: ADDL $0x25C, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x25476D00: 92A10264 stw r21,612(r1)
- 13: GETL R21, t10
- 14: GETL R1, t12
- 15: ADDL $0x264, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x25476D04: 1E690018 mulli r19,r9,24
- 18: GETL R9, t14
- 19: MULL $0x18, t14
- 20: PUTL t14, R19
- 21: INCEIPL $4
-
- 0x25476D08: 90010294 stw r0,660(r1)
- 22: GETL R0, t16
- 23: GETL R1, t18
- 24: ADDL $0x294, t18
- 25: STL t16, (t18)
- 26: INCEIPL $4
-
- 0x25476D0C: 7D800026 mfcr r12
- 27: GETL CR, t20
- 28: PUTL t20, R12
- 29: INCEIPL $4
-
- 0x25476D10: 82BE04C8 lwz r21,1224(r30)
- 30: GETL R30, t22
- 31: ADDL $0x4C8, t22
- 32: LDL (t22), t24
- 33: PUTL t24, R21
- 34: INCEIPL $4
-
- 0x25476D14: 93A10284 stw r29,644(r1)
- 35: GETL R29, t26
- 36: GETL R1, t28
- 37: ADDL $0x284, t28
- 38: STL t26, (t28)
- 39: INCEIPL $4
-
- 0x25476D18: 7FB3A82E lwzx r29,r19,r21
- 40: GETL R21, t30
- 41: GETL R19, t32
- 42: ADDL t32, t30
- 43: LDL (t30), t34
- 44: PUTL t34, R29
- 45: INCEIPL $4
-
- 0x25476D1C: 92010250 stw r16,592(r1)
- 46: GETL R16, t36
- 47: GETL R1, t38
- 48: ADDL $0x250, t38
- 49: STL t36, (t38)
- 50: INCEIPL $4
-
- 0x25476D20: 7CD03378 or r16,r6,r6
- 51: GETL R6, t40
- 52: PUTL t40, R16
- 53: INCEIPL $4
-
- 0x25476D24: 2F9D0000 cmpi cr7,r29,0
- 54: GETL R29, t42
- 55: CMP0L t42, t44 (-rSo)
- 56: ICRFL t44, $0x7, CR
- 57: INCEIPL $4
-
- 0x25476D28: 92210254 stw r17,596(r1)
- 58: GETL R17, t46
- 59: GETL R1, t48
- 60: ADDL $0x254, t48
- 61: STL t46, (t48)
- 62: INCEIPL $4
-
- 0x25476D2C: 92E1026C stw r23,620(r1)
- 63: GETL R23, t50
- 64: GETL R1, t52
- 65: ADDL $0x26C, t52
- 66: STL t50, (t52)
- 67: INCEIPL $4
-
- 0x25476D30: 7CF13B78 or r17,r7,r7
- 68: GETL R7, t54
- 69: PUTL t54, R17
- 70: INCEIPL $4
-
- 0x25476D34: 93010270 stw r24,624(r1)
- 71: GETL R24, t56
- 72: GETL R1, t58
- 73: ADDL $0x270, t58
- 74: STL t56, (t58)
- 75: INCEIPL $4
-
- 0x25476D38: 7CB72B78 or r23,r5,r5
- 76: GETL R5, t60
- 77: PUTL t60, R23
- 78: INCEIPL $4
-
- 0x25476D3C: 93210274 stw r25,628(r1)
- 79: GETL R25, t62
- 80: GETL R1, t64
- 81: ADDL $0x274, t64
- 82: STL t62, (t64)
- 83: INCEIPL $4
-
- 0x25476D40: 7D184378 or r24,r8,r8
- 84: GETL R8, t66
- 85: PUTL t66, R24
- 86: INCEIPL $4
-
- 0x25476D44: 9361027C stw r27,636(r1)
- 87: GETL R27, t68
- 88: GETL R1, t70
- 89: ADDL $0x27C, t70
- 90: STL t68, (t70)
- 91: INCEIPL $4
-
- 0x25476D48: 7D394B78 or r25,r9,r9
- 92: GETL R9, t72
- 93: PUTL t72, R25
- 94: INCEIPL $4
-
- 0x25476D4C: 93E1028C stw r31,652(r1)
- 95: GETL R31, t74
- 96: GETL R1, t76
- 97: ADDL $0x28C, t76
- 98: STL t74, (t76)
- 99: INCEIPL $4
-
- 0x25476D50: 7C7B1B78 or r27,r3,r3
- 100: GETL R3, t78
- 101: PUTL t78, R27
- 102: INCEIPL $4
-
- 0x25476D54: 91C10248 stw r14,584(r1)
- 103: GETL R14, t80
- 104: GETL R1, t82
- 105: ADDL $0x248, t82
- 106: STL t80, (t82)
- 107: INCEIPL $4
-
- 0x25476D58: 7C9F2378 or r31,r4,r4
- 108: GETL R4, t84
- 109: PUTL t84, R31
- 110: INCEIPL $4
-
- 0x25476D5C: 91E1024C stw r15,588(r1)
- 111: GETL R15, t86
- 112: GETL R1, t88
- 113: ADDL $0x24C, t88
- 114: STL t86, (t88)
- 115: INCEIPL $4
-
- 0x25476D60: 92410258 stw r18,600(r1)
- 116: GETL R18, t90
- 117: GETL R1, t92
- 118: ADDL $0x258, t92
- 119: STL t90, (t92)
- 120: INCEIPL $4
-
- 0x25476D64: 92810260 stw r20,608(r1)
- 121: GETL R20, t94
- 122: GETL R1, t96
- 123: ADDL $0x260, t96
- 124: STL t94, (t96)
- 125: INCEIPL $4
-
- 0x25476D68: 92C10268 stw r22,616(r1)
- 126: GETL R22, t98
- 127: GETL R1, t100
- 128: ADDL $0x268, t100
- 129: STL t98, (t100)
- 130: INCEIPL $4
-
- 0x25476D6C: 93410278 stw r26,632(r1)
- 131: GETL R26, t102
- 132: GETL R1, t104
- 133: ADDL $0x278, t104
- 134: STL t102, (t104)
- 135: INCEIPL $4
-
- 0x25476D70: 93810280 stw r28,640(r1)
- 136: GETL R28, t106
- 137: GETL R1, t108
- 138: ADDL $0x280, t108
- 139: STL t106, (t108)
- 140: INCEIPL $4
-
- 0x25476D74: 91810244 stw r12,580(r1)
- 141: GETL R12, t110
- 142: GETL R1, t112
- 143: ADDL $0x244, t112
- 144: STL t110, (t112)
- 145: INCEIPL $4
-
- 0x25476D78: 419E0040 bc 12,30,0x25476DB8
- 146: Js30o $0x25476DB8
-
-
-. 0 25476CF4 136
-. 93 C1 02 88 7F C8 02 A6 92 61 02 5C 92 A1 02 64 1E 69 00 18 90 01 02 94 7D 80 00 26 82 BE 04 C8 93 A1 02 84 7F B3 A8 2E 92 01 02 50 7C D0 33 78 2F 9D 00 00 92 21 02 54 92 E1 02 6C 7C F1 3B 78 93 01 02 70 7C B7 2B 78 93 21 02 74 7D 18 43 78 93 61 02 7C 7D 39 4B 78 93 E1 02 8C 7C 7B 1B 78 91 C1 02 48 7C 9F 23 78 91 E1 02 4C 92 41 02 58 92 81 02 60 92 C1 02 68 93 41 02 78 93 81 02 80 91 81 02 44 41 9E 00 40
-
-==== BB 383 (0x25476D7C) approx BBs exec'd 0 ====
-
- 0x25476D7C: 3AC00000 li r22,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R22
- 2: INCEIPL $4
-
- 0x25476D80: 80BD0180 lwz r5,384(r29)
- 3: GETL R29, t2
- 4: ADDL $0x180, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x25476D84: 7FA4EB78 or r4,r29,r29
- 8: GETL R29, t6
- 9: PUTL t6, R4
- 10: INCEIPL $4
-
- 0x25476D88: 7FE3FB78 or r3,r31,r31
- 11: GETL R31, t8
- 12: PUTL t8, R3
- 13: INCEIPL $4
-
- 0x25476D8C: 74A90040 andis. r9,r5,0x40
- 14: GETL R5, t10
- 15: ANDL $0x400000, t10
- 16: PUTL t10, R9
- 17: CMP0L t10, t12 (-rSo)
- 18: ICRFL t12, $0x0, CR
- 19: INCEIPL $4
-
- 0x25476D90: 4082001C bc 4,2,0x25476DAC
- 20: Jc02o $0x25476DAC
-
-
-. 0 25476D7C 24
-. 3A C0 00 00 80 BD 01 80 7F A4 EB 78 7F E3 FB 78 74 A9 00 40 40 82 00 1C
-
-==== BB 384 (0x25476D94) approx BBs exec'd 0 ====
-
- 0x25476D94: 48005941 bl 0x2547C6D4
- 0: MOVL $0x25476D98, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x2547C6D4 ($4)
-
-
-. 0 25476D94 4
-. 48 00 59 41
-
-==== BB 385 _dl_name_match_p(0x2547C6D4) approx BBs exec'd 0 ====
-
- 0x2547C6D4: 7C0802A6 mflr r0
- 0: GETL LR, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x2547C6D8: 9421FFE0 stwu r1,-32(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFFE0, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0x2547C6DC: 93E1001C stw r31,28(r1)
- 9: GETL R31, t6
- 10: GETL R1, t8
- 11: ADDL $0x1C, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547C6E0: 7C9F2378 or r31,r4,r4
- 14: GETL R4, t10
- 15: PUTL t10, R31
- 16: INCEIPL $4
-
- 0x2547C6E4: 93A10014 stw r29,20(r1)
- 17: GETL R29, t12
- 18: GETL R1, t14
- 19: ADDL $0x14, t14
- 20: STL t12, (t14)
- 21: INCEIPL $4
-
- 0x2547C6E8: 7C7D1B78 or r29,r3,r3
- 22: GETL R3, t16
- 23: PUTL t16, R29
- 24: INCEIPL $4
-
- 0x2547C6EC: 90010024 stw r0,36(r1)
- 25: GETL R0, t18
- 26: GETL R1, t20
- 27: ADDL $0x24, t20
- 28: STL t18, (t20)
- 29: INCEIPL $4
-
- 0x2547C6F0: 80840004 lwz r4,4(r4)
- 30: GETL R4, t22
- 31: ADDL $0x4, t22
- 32: LDL (t22), t24
- 33: PUTL t24, R4
- 34: INCEIPL $4
-
- 0x2547C6F4: 93C10018 stw r30,24(r1)
- 35: GETL R30, t26
- 36: GETL R1, t28
- 37: ADDL $0x18, t28
- 38: STL t26, (t28)
- 39: INCEIPL $4
-
- 0x2547C6F8: 480067E9 bl 0x25482EE0
- 40: MOVL $0x2547C6FC, t30
- 41: PUTL t30, LR
- 42: JMPo-c $0x25482EE0 ($4)
-
-
-. 0 2547C6D4 40
-. 7C 08 02 A6 94 21 FF E0 93 E1 00 1C 7C 9F 23 78 93 A1 00 14 7C 7D 1B 78 90 01 00 24 80 84 00 04 93 C1 00 18 48 00 67 E9
-
-==== BB 386 strcmp(0x25482EE0) approx BBs exec'd 0 ====
-
- 0x25482EE0: 7C801B78 or r0,r4,r3
- 0: GETL R4, t0
- 1: GETL R3, t2
- 2: ORL t2, t0
- 3: PUTL t0, R0
- 4: INCEIPL $4
-
- 0x25482EE4: 540007BF rlwinm. r0,r0,0,30,31
- 5: GETL R0, t4
- 6: ANDL $0x3, t4
- 7: PUTL t4, R0
- 8: CMP0L t4, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x25482EE8: 3CE0FEFF lis r7,-257
- 11: MOVL $0xFEFF0000, t8
- 12: PUTL t8, R7
- 13: INCEIPL $4
-
- 0x25482EEC: 40820094 bc 4,2,0x25482F80
- 14: Jc02o $0x25482F80
-
-
-. 0 25482EE0 16
-. 7C 80 1B 78 54 00 07 BF 3C E0 FE FF 40 82 00 94
-
-==== BB 387 (0x25482EF0) approx BBs exec'd 0 ====
-
- 0x25482EF0: 80A30000 lwz r5,0(r3)
- 0: GETL R3, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R5
- 3: INCEIPL $4
-
- 0x25482EF4: 80C40000 lwz r6,0(r4)
- 4: GETL R4, t4
- 5: LDL (t4), t6
- 6: PUTL t6, R6
- 7: INCEIPL $4
-
- 0x25482EF8: 3D007F7F lis r8,32639
- 8: MOVL $0x7F7F0000, t8
- 9: PUTL t8, R8
- 10: INCEIPL $4
-
- 0x25482EFC: 38E7FEFF addi r7,r7,-257
- 11: GETL R7, t10
- 12: ADDL $0xFFFFFEFF, t10
- 13: PUTL t10, R7
- 14: INCEIPL $4
-
- 0x25482F00: 39087F7F addi r8,r8,32639
- 15: MOVL $0x7F7F7F7F, t12
- 16: PUTL t12, R8
- 17: INCEIPL $4
-
- 0x25482F04: 48000010 b 0x25482F14
- 18: JMPo $0x25482F14 ($4)
-
-
-. 0 25482EF0 24
-. 80 A3 00 00 80 C4 00 00 3D 00 7F 7F 38 E7 FE FF 39 08 7F 7F 48 00 00 10
-
-==== BB 388 (0x25482F14) approx BBs exec'd 0 ====
-
- 0x25482F14: 7C072A14 add r0,r7,r5
- 0: GETL R7, t0
- 1: GETL R5, t2
- 2: ADDL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25482F18: 7D0928F8 nor r9,r8,r5
- 5: GETL R8, t4
- 6: GETL R5, t6
- 7: ORL t6, t4
- 8: NOTL t4
- 9: PUTL t4, R9
- 10: INCEIPL $4
-
- 0x25482F1C: 7C004839 and. r0,r0,r9
- 11: GETL R0, t8
- 12: GETL R9, t10
- 13: ANDL t8, t10
- 14: PUTL t10, R0
- 15: CMP0L t10, t12 (-rSo)
- 16: ICRFL t12, $0x0, CR
- 17: INCEIPL $4
-
- 0x25482F20: 7C853000 cmp cr1,r5,r6
- 18: GETL R5, t14
- 19: GETL R6, t16
- 20: CMPL t14, t16, t18 (-rSo)
- 21: ICRFL t18, $0x1, CR
- 22: INCEIPL $4
-
- 0x25482F24: 4182FFE4 bc 12,2,0x25482F08
- 23: Js02o $0x25482F08
-
-
-. 0 25482F14 20
-. 7C 07 2A 14 7D 09 28 F8 7C 00 48 39 7C 85 30 00 41 82 FF E4
-
-==== BB 389 (0x25482F08) approx BBs exec'd 0 ====
-
- 0x25482F08: 84A30004 lwzu r5,4(r3)
- 0: GETL R3, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R3
- 3: LDL (t0), t2
- 4: PUTL t2, R5
- 5: INCEIPL $4
-
- 0x25482F0C: 40860054 bc 4,6,0x25482F60
- 6: Jc06o $0x25482F60
-
-
-. 0 25482F08 8
-. 84 A3 00 04 40 86 00 54
-
-==== BB 390 (0x25482F60) approx BBs exec'd 0 ====
-
- 0x25482F60: 80A3FFFC lwz r5,-4(r3)
- 0: GETL R3, t0
- 1: ADDL $0xFFFFFFFC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25482F64: 7CAA3279 xor. r10,r5,r6
- 5: GETL R5, t4
- 6: GETL R6, t6
- 7: XORL t4, t6
- 8: PUTL t6, R10
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x0, CR
- 11: INCEIPL $4
-
- 0x25482F68: 7C662850 subf r3,r6,r5
- 12: GETL R6, t10
- 13: GETL R5, t12
- 14: SUBL t10, t12
- 15: PUTL t12, R3
- 16: INCEIPL $4
-
- 0x25482F6C: 4CA00020 bclr 5,0
- 17: GETL LR, t14
- 18: Jc00o-r t14
-
-
-. 0 25482F60 16
-. 80 A3 FF FC 7C AA 32 79 7C 66 28 50 4C A0 00 20
-
-==== BB 391 (0x2547C6FC) approx BBs exec'd 0 ====
-
- 0x2547C6FC: 2F830000 cmpi cr7,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x2547C700: 38600001 li r3,1
- 4: MOVL $0x1, t4
- 5: PUTL t4, R3
- 6: INCEIPL $4
-
- 0x2547C704: 419E0030 bc 12,30,0x2547C734
- 7: Js30o $0x2547C734
-
-
-. 0 2547C6FC 12
-. 2F 83 00 00 38 60 00 01 41 9E 00 30
-
-==== BB 392 (0x2547C708) approx BBs exec'd 0 ====
-
- 0x2547C708: 83FF001C lwz r31,28(r31)
- 0: GETL R31, t0
- 1: ADDL $0x1C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R31
- 4: INCEIPL $4
-
- 0x2547C70C: 4800001C b 0x2547C728
- 5: JMPo $0x2547C728 ($4)
-
-
-. 0 2547C708 8
-. 83 FF 00 1C 48 00 00 1C
-
-==== BB 393 (0x2547C728) approx BBs exec'd 0 ====
-
- 0x2547C728: 2C1F0000 cmpi cr0,r31,0
- 0: GETL R31, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0x2547C72C: 4082FFE4 bc 4,2,0x2547C710
- 4: Jc02o $0x2547C710
-
-
-. 0 2547C728 8
-. 2C 1F 00 00 40 82 FF E4
-
-==== BB 394 (0x2547C710) approx BBs exec'd 0 ====
-
- 0x2547C710: 809F0000 lwz r4,0(r31)
- 0: GETL R31, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R4
- 3: INCEIPL $4
-
- 0x2547C714: 7FA3EB78 or r3,r29,r29
- 4: GETL R29, t4
- 5: PUTL t4, R3
- 6: INCEIPL $4
-
- 0x2547C718: 480067C9 bl 0x25482EE0
- 7: MOVL $0x2547C71C, t6
- 8: PUTL t6, LR
- 9: JMPo-c $0x25482EE0 ($4)
-
-
-. 0 2547C710 12
-. 80 9F 00 00 7F A3 EB 78 48 00 67 C9
-
-==== BB 395 (0x2547C71C) approx BBs exec'd 0 ====
-
- 0x2547C71C: 2C830000 cmpi cr1,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x2547C720: 41860030 bc 12,6,0x2547C750
- 4: Js06o $0x2547C750
-
-
-. 0 2547C71C 8
-. 2C 83 00 00 41 86 00 30
-
-==== BB 396 (0x2547C724) approx BBs exec'd 0 ====
-
- 0x2547C724: 83FF0004 lwz r31,4(r31)
- 0: GETL R31, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R31
- 4: INCEIPL $4
-
- 0x2547C728: 2C1F0000 cmpi cr0,r31,0
- 5: GETL R31, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x2547C72C: 4082FFE4 bc 4,2,0x2547C710
- 9: Jc02o $0x2547C710
-
-
-. 0 2547C724 12
-. 83 FF 00 04 2C 1F 00 00 40 82 FF E4
-
-==== BB 397 (0x2547C730) approx BBs exec'd 0 ====
-
- 0x2547C730: 38600000 li r3,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547C734: 80810024 lwz r4,36(r1)
- 3: GETL R1, t2
- 4: ADDL $0x24, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0x2547C738: 83A10014 lwz r29,20(r1)
- 8: GETL R1, t6
- 9: ADDL $0x14, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R29
- 12: INCEIPL $4
-
- 0x2547C73C: 83C10018 lwz r30,24(r1)
- 13: GETL R1, t10
- 14: ADDL $0x18, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R30
- 17: INCEIPL $4
-
- 0x2547C740: 7C8803A6 mtlr r4
- 18: GETL R4, t14
- 19: PUTL t14, LR
- 20: INCEIPL $4
-
- 0x2547C744: 83E1001C lwz r31,28(r1)
- 21: GETL R1, t16
- 22: ADDL $0x1C, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R31
- 25: INCEIPL $4
-
- 0x2547C748: 38210020 addi r1,r1,32
- 26: GETL R1, t20
- 27: ADDL $0x20, t20
- 28: PUTL t20, R1
- 29: INCEIPL $4
-
- 0x2547C74C: 4E800020 blr
- 30: GETL LR, t22
- 31: JMPo-r t22 ($4)
-
-
-. 0 2547C730 32
-. 38 60 00 00 80 81 00 24 83 A1 00 14 83 C1 00 18 7C 88 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 398 (0x25476D98) approx BBs exec'd 0 ====
-
- 0x25476D98: 2C830000 cmpi cr1,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x25476D9C: 408601B8 bc 4,6,0x25476F54
- 4: Jc06o $0x25476F54
-
-
-. 0 25476D98 8
-. 2C 83 00 00 40 86 01 B8
-
-==== BB 399 (0x25476DA0) approx BBs exec'd 0 ====
-
- 0x25476DA0: 807D0180 lwz r3,384(r29)
- 0: GETL R29, t0
- 1: ADDL $0x180, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25476DA4: 74690080 andis. r9,r3,0x80
- 5: GETL R3, t4
- 6: ANDL $0x800000, t4
- 7: PUTL t4, R9
- 8: CMP0L t4, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x25476DA8: 418200F8 bc 12,2,0x25476EA0
- 11: Js02o $0x25476EA0
-
-
-. 0 25476DA0 12
-. 80 7D 01 80 74 69 00 80 41 82 00 F8
-
-==== BB 400 (0x25476EA0) approx BBs exec'd 0 ====
-
- 0x25476EA0: 817D0058 lwz r11,88(r29)
- 0: GETL R29, t0
- 1: ADDL $0x58, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25476EA4: 7FE3FB78 or r3,r31,r31
- 5: GETL R31, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25476EA8: 2D8B0000 cmpi cr3,r11,0
- 8: GETL R11, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x3, CR
- 11: INCEIPL $4
-
- 0x25476EAC: 41AEFF00 bc 13,14,0x25476DAC
- 12: Js14o $0x25476DAC
-
-
-. 0 25476EA0 16
-. 81 7D 00 58 7F E3 FB 78 2D 8B 00 00 41 AE FF 00
-
-==== BB 401 (0x25476DAC) approx BBs exec'd 0 ====
-
- 0x25476DAC: 83BD000C lwz r29,12(r29)
- 0: GETL R29, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x25476DB0: 2C9D0000 cmpi cr1,r29,0
- 5: GETL R29, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x25476DB4: 4086FFCC bc 4,6,0x25476D80
- 9: Jc06o $0x25476D80
-
-
-. 0 25476DAC 12
-. 83 BD 00 0C 2C 9D 00 00 40 86 FF CC
-
-==== BB 402 (0x25476D80) approx BBs exec'd 0 ====
-
- 0x25476D80: 80BD0180 lwz r5,384(r29)
- 0: GETL R29, t0
- 1: ADDL $0x180, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25476D84: 7FA4EB78 or r4,r29,r29
- 5: GETL R29, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0x25476D88: 7FE3FB78 or r3,r31,r31
- 8: GETL R31, t6
- 9: PUTL t6, R3
- 10: INCEIPL $4
-
- 0x25476D8C: 74A90040 andis. r9,r5,0x40
- 11: GETL R5, t8
- 12: ANDL $0x400000, t8
- 13: PUTL t8, R9
- 14: CMP0L t8, t10 (-rSo)
- 15: ICRFL t10, $0x0, CR
- 16: INCEIPL $4
-
- 0x25476D90: 4082001C bc 4,2,0x25476DAC
- 17: Jc02o $0x25476DAC
-
-
-. 0 25476D80 20
-. 80 BD 01 80 7F A4 EB 78 7F E3 FB 78 74 A9 00 40 40 82 00 1C
-
-==== BB 403 (0x25476EB0) approx BBs exec'd 0 ====
-
- 0x25476EB0: 813D0034 lwz r9,52(r29)
- 0: GETL R29, t0
- 1: ADDL $0x34, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25476EB4: 816B0004 lwz r11,4(r11)
- 5: GETL R11, t4
- 6: ADDL $0x4, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R11
- 9: INCEIPL $4
-
- 0x25476EB8: 80890004 lwz r4,4(r9)
- 10: GETL R9, t8
- 11: ADDL $0x4, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R4
- 14: INCEIPL $4
-
- 0x25476EBC: 7F845A14 add r28,r4,r11
- 15: GETL R4, t12
- 16: GETL R11, t14
- 17: ADDL t12, t14
- 18: PUTL t14, R28
- 19: INCEIPL $4
-
- 0x25476EC0: 7F84E378 or r4,r28,r28
- 20: GETL R28, t16
- 21: PUTL t16, R4
- 22: INCEIPL $4
-
- 0x25476EC4: 4800C01D bl 0x25482EE0
- 23: MOVL $0x25476EC8, t18
- 24: PUTL t18, LR
- 25: JMPo-c $0x25482EE0 ($4)
-
-
-. 0 25476EB0 24
-. 81 3D 00 34 81 6B 00 04 80 89 00 04 7F 84 5A 14 7F 84 E3 78 48 00 C0 1D
-
-==== BB 404 (0x25482F80) approx BBs exec'd 0 ====
-
- 0x25482F80: 88A30000 lbz r5,0(r3)
- 0: GETL R3, t0
- 1: LDB (t0), t2
- 2: PUTL t2, R5
- 3: INCEIPL $4
-
- 0x25482F84: 88C40000 lbz r6,0(r4)
- 4: GETL R4, t4
- 5: LDB (t4), t6
- 6: PUTL t6, R6
- 7: INCEIPL $4
-
- 0x25482F88: 48000010 b 0x25482F98
- 8: JMPo $0x25482F98 ($4)
-
-
-. 0 25482F80 12
-. 88 A3 00 00 88 C4 00 00 48 00 00 10
-
-==== BB 405 (0x25482F98) approx BBs exec'd 0 ====
-
- 0x25482F98: 2C850000 cmpi cr1,r5,0
- 0: GETL R5, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x25482F9C: 41860020 bc 12,6,0x25482FBC
- 4: Js06o $0x25482FBC
-
-
-. 0 25482F98 8
-. 2C 85 00 00 41 86 00 20
-
-==== BB 406 (0x25482FA0) approx BBs exec'd 0 ====
-
- 0x25482FA0: 7C053000 cmp cr0,r5,r6
- 0: GETL R5, t0
- 1: GETL R6, t2
- 2: CMPL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x0, CR
- 4: INCEIPL $4
-
- 0x25482FA4: 40820018 bc 4,2,0x25482FBC
- 5: Jc02o $0x25482FBC
-
-
-. 0 25482FA0 8
-. 7C 05 30 00 40 82 00 18
-
-==== BB 407 (0x25482FBC) approx BBs exec'd 0 ====
-
- 0x25482FBC: 7C662850 subf r3,r6,r5
- 0: GETL R6, t0
- 1: GETL R5, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25482FC0: 4E800020 blr
- 5: GETL LR, t4
- 6: JMPo-r t4 ($4)
-
-
-. 0 25482FBC 8
-. 7C 66 28 50 4E 80 00 20
-
-==== BB 408 (0x25476EC8) approx BBs exec'd 0 ====
-
- 0x25476EC8: 2E030000 cmpi cr4,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x4, CR
- 3: INCEIPL $4
-
- 0x25476ECC: 4092FEE0 bc 4,18,0x25476DAC
- 4: Jc18o $0x25476DAC
-
-
-. 0 25476EC8 8
-. 2E 03 00 00 40 92 FE E0
-
-==== BB 409 (0x25476DB8) approx BBs exec'd 0 ====
-
- 0x25476DB8: 829E04F4 lwz r20,1268(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4F4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R20
- 4: INCEIPL $4
-
- 0x25476DBC: 2D9B0000 cmpi cr3,r27,0
- 5: GETL R27, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x3, CR
- 8: INCEIPL $4
-
- 0x25476DC0: 81540000 lwz r10,0(r20)
- 9: GETL R20, t8
- 10: LDL (t8), t10
- 11: PUTL t10, R10
- 12: INCEIPL $4
-
- 0x25476DC4: 71490040 andi. r9,r10,0x40
- 13: GETL R10, t12
- 14: ANDL $0x40, t12
- 15: PUTL t12, R9
- 16: CMP0L t12, t14 (-rSo)
- 17: ICRFL t14, $0x0, CR
- 18: INCEIPL $4
-
- 0x25476DC8: 40820390 bc 4,2,0x25477158
- 19: Jc02o $0x25477158
-
-
-. 0 25476DB8 20
-. 82 9E 04 F4 2D 9B 00 00 81 54 00 00 71 49 00 40 40 82 03 90
-
-==== BB 410 (0x25476DCC) approx BBs exec'd 0 ====
-
- 0x25476DCC: 7FE3FB78 or r3,r31,r31
- 0: GETL R31, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25476DD0: 3880002F li r4,47
- 3: MOVL $0x2F, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x25476DD4: 4800C02D bl 0x25482E00
- 6: MOVL $0x25476DD8, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0x25482E00 ($4)
-
-
-. 0 25476DCC 12
-. 7F E3 FB 78 38 80 00 2F 48 00 C0 2D
-
-==== BB 411 (0x25482EB4) approx BBs exec'd 0 ====
-
- 0x25482EB4: 7CE06038 and r0,r7,r12
- 0: GETL R7, t0
- 1: GETL R12, t2
- 2: ANDL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25482EB8: 7CEA6378 or r10,r7,r12
- 5: GETL R7, t4
- 6: GETL R12, t6
- 7: ORL t6, t4
- 8: PUTL t4, R10
- 9: INCEIPL $4
-
- 0x25482EBC: 7C003A14 add r0,r0,r7
- 10: GETL R0, t8
- 11: GETL R7, t10
- 12: ADDL t8, t10
- 13: PUTL t10, R0
- 14: INCEIPL $4
-
- 0x25482EC0: 7D4900F8 nor r9,r10,r0
- 15: GETL R10, t12
- 16: GETL R0, t14
- 17: ORL t14, t12
- 18: NOTL t12
- 19: PUTL t12, R9
- 20: INCEIPL $4
-
- 0x25482EC4: 7D240034 cntlzw r4,r9
- 21: GETL R9, t16
- 22: CNTLZL t16
- 23: PUTL t16, R4
- 24: INCEIPL $4
-
- 0x25482EC8: 3908FFFC addi r8,r8,-4
- 25: GETL R8, t18
- 26: ADDL $0xFFFFFFFC, t18
- 27: PUTL t18, R8
- 28: INCEIPL $4
-
- 0x25482ECC: 5484E8FE rlwinm r4,r4,29,3,31
- 29: GETL R4, t20
- 30: SHRL $0x3, t20
- 31: PUTL t20, R4
- 32: INCEIPL $4
-
- 0x25482ED0: 7C682214 add r3,r8,r4
- 33: GETL R8, t22
- 34: GETL R4, t24
- 35: ADDL t22, t24
- 36: PUTL t24, R3
- 37: INCEIPL $4
-
- 0x25482ED4: 4E800020 blr
- 38: GETL LR, t26
- 39: JMPo-r t26 ($4)
-
-
-. 0 25482EB4 36
-. 7C E0 60 38 7C EA 63 78 7C 00 3A 14 7D 49 00 F8 7D 24 00 34 39 08 FF FC 54 84 E8 FE 7C 68 22 14 4E 80 00 20
-
-==== BB 412 (0x25476DD8) approx BBs exec'd 0 ====
-
- 0x25476DD8: 2F030000 cmpi cr6,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x25476DDC: 419A0290 bc 12,26,0x2547706C
- 4: Js26o $0x2547706C
-
-
-. 0 25476DD8 8
-. 2F 03 00 00 41 9A 02 90
-
-==== BB 413 (0x25476DE0) approx BBs exec'd 0 ====
-
- 0x25476DE0: 418E01D8 bc 12,14,0x25476FB8
- 0: Js14o $0x25476FB8
-
-
-. 0 25476DE0 4
-. 41 8E 01 D8
-
-==== BB 414 (0x25476DE4) approx BBs exec'd 0 ====
-
- 0x25476DE4: 7F63DB78 or r3,r27,r27
- 0: GETL R27, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25476DE8: 7FE4FB78 or r4,r31,r31
- 3: GETL R31, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x25476DEC: 4BFFD941 bl 0x2547472C
- 6: MOVL $0x25476DF0, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0x2547472C ($4)
-
-
-. 0 25476DE4 12
-. 7F 63 DB 78 7F E4 FB 78 4B FF D9 41
-
-==== BB 415 expand_dynamic_string_token(0x2547472C) approx BBs exec'd 0 ====
-
- 0x2547472C: 9421FFD0 stwu r1,-48(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFD0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25474730: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x25474734: 480228CD bl 0x25497000
- 9: MOVL $0x25474738, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547472C 12
-. 94 21 FF D0 7C 08 02 A6 48 02 28 CD
-
-==== BB 416 (0x25474738) approx BBs exec'd 0 ====
-
- 0x25474738: 7D800026 mfcr r12
- 0: GETL CR, t0
- 1: PUTL t0, R12
- 2: INCEIPL $4
-
- 0x2547473C: 93C10028 stw r30,40(r1)
- 3: GETL R30, t2
- 4: GETL R1, t4
- 5: ADDL $0x28, t4
- 6: STL t2, (t4)
- 7: INCEIPL $4
-
- 0x25474740: 7FC802A6 mflr r30
- 8: GETL LR, t6
- 9: PUTL t6, R30
- 10: INCEIPL $4
-
- 0x25474744: 93A10024 stw r29,36(r1)
- 11: GETL R29, t8
- 12: GETL R1, t10
- 13: ADDL $0x24, t10
- 14: STL t8, (t10)
- 15: INCEIPL $4
-
- 0x25474748: 7C9D2378 or r29,r4,r4
- 16: GETL R4, t12
- 17: PUTL t12, R29
- 18: INCEIPL $4
-
- 0x2547474C: 93410018 stw r26,24(r1)
- 19: GETL R26, t14
- 20: GETL R1, t16
- 21: ADDL $0x18, t16
- 22: STL t14, (t16)
- 23: INCEIPL $4
-
- 0x25474750: 38800024 li r4,36
- 24: MOVL $0x24, t18
- 25: PUTL t18, R4
- 26: INCEIPL $4
-
- 0x25474754: 93810020 stw r28,32(r1)
- 27: GETL R28, t20
- 28: GETL R1, t22
- 29: ADDL $0x20, t22
- 30: STL t20, (t22)
- 31: INCEIPL $4
-
- 0x25474758: 7C7C1B78 or r28,r3,r3
- 32: GETL R3, t24
- 33: PUTL t24, R28
- 34: INCEIPL $4
-
- 0x2547475C: 92E1000C stw r23,12(r1)
- 35: GETL R23, t26
- 36: GETL R1, t28
- 37: ADDL $0xC, t28
- 38: STL t26, (t28)
- 39: INCEIPL $4
-
- 0x25474760: 7FA3EB78 or r3,r29,r29
- 40: GETL R29, t30
- 41: PUTL t30, R3
- 42: INCEIPL $4
-
- 0x25474764: 93010010 stw r24,16(r1)
- 43: GETL R24, t32
- 44: GETL R1, t34
- 45: ADDL $0x10, t34
- 46: STL t32, (t34)
- 47: INCEIPL $4
-
- 0x25474768: 93210014 stw r25,20(r1)
- 48: GETL R25, t36
- 49: GETL R1, t38
- 50: ADDL $0x14, t38
- 51: STL t36, (t38)
- 52: INCEIPL $4
-
- 0x2547476C: 9361001C stw r27,28(r1)
- 53: GETL R27, t40
- 54: GETL R1, t42
- 55: ADDL $0x1C, t42
- 56: STL t40, (t42)
- 57: INCEIPL $4
-
- 0x25474770: 93E1002C stw r31,44(r1)
- 58: GETL R31, t44
- 59: GETL R1, t46
- 60: ADDL $0x2C, t46
- 61: STL t44, (t46)
- 62: INCEIPL $4
-
- 0x25474774: 90010034 stw r0,52(r1)
- 63: GETL R0, t48
- 64: GETL R1, t50
- 65: ADDL $0x34, t50
- 66: STL t48, (t50)
- 67: INCEIPL $4
-
- 0x25474778: 91810008 stw r12,8(r1)
- 68: GETL R12, t52
- 69: GETL R1, t54
- 70: ADDL $0x8, t54
- 71: STL t52, (t54)
- 72: INCEIPL $4
-
- 0x2547477C: 4800E685 bl 0x25482E00
- 73: MOVL $0x25474780, t56
- 74: PUTL t56, LR
- 75: JMPo-c $0x25482E00 ($4)
-
-
-. 0 25474738 72
-. 7D 80 00 26 93 C1 00 28 7F C8 02 A6 93 A1 00 24 7C 9D 23 78 93 41 00 18 38 80 00 24 93 81 00 20 7C 7C 1B 78 92 E1 00 0C 7F A3 EB 78 93 01 00 10 93 21 00 14 93 61 00 1C 93 E1 00 2C 90 01 00 34 91 81 00 08 48 00 E6 85
-
-==== BB 417 (0x25474780) approx BBs exec'd 0 ====
-
- 0x25474780: 7C7A1B79 or. r26,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R26
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x25474784: 40820074 bc 4,2,0x254747F8
- 5: Jc02o $0x254747F8
-
-
-. 0 25474780 8
-. 7C 7A 1B 79 40 82 00 74
-
-==== BB 418 (0x25474788) approx BBs exec'd 0 ====
-
- 0x25474788: 7FA3EB78 or r3,r29,r29
- 0: GETL R29, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547478C: 4800E845 bl 0x25482FD0
- 3: MOVL $0x25474790, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x25482FD0 ($4)
-
-
-. 0 25474788 8
-. 7F A3 EB 78 48 00 E8 45
-
-==== BB 419 (0x25474790) approx BBs exec'd 0 ====
-
- 0x25474790: 3BE30001 addi r31,r3,1
- 0: GETL R3, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R31
- 3: INCEIPL $4
-
- 0x25474794: 7FE3FB78 or r3,r31,r31
- 4: GETL R31, t2
- 5: PUTL t2, R3
- 6: INCEIPL $4
-
- 0x25474798: 4802328D bl 0x25497A24
- 7: MOVL $0x2547479C, t4
- 8: PUTL t4, LR
- 9: JMPo-c $0x25497A24 ($4)
-
-
-. 0 25474790 12
-. 3B E3 00 01 7F E3 FB 78 48 02 32 8D
-
-==== BB 420 (0x2547479C) approx BBs exec'd 0 ====
-
- 0x2547479C: 38000000 li r0,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x254747A0: 2C030000 cmpi cr0,r3,0
- 3: GETL R3, t2
- 4: CMP0L t2, t4 (-rSo)
- 5: ICRFL t4, $0x0, CR
- 6: INCEIPL $4
-
- 0x254747A4: 41820014 bc 12,2,0x254747B8
- 7: Js02o $0x254747B8
-
-
-. 0 2547479C 12
-. 38 00 00 00 2C 03 00 00 41 82 00 14
-
-==== BB 421 (0x254747A8) approx BBs exec'd 0 ====
-
- 0x254747A8: 7FA4EB78 or r4,r29,r29
- 0: GETL R29, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x254747AC: 7FE5FB78 or r5,r31,r31
- 3: GETL R31, t2
- 4: PUTL t2, R5
- 5: INCEIPL $4
-
- 0x254747B0: 4800F431 bl 0x25483BE0
- 6: MOVL $0x254747B4, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0x25483BE0 ($4)
-
-
-. 0 254747A8 12
-. 7F A4 EB 78 7F E5 FB 78 48 00 F4 31
-
-==== BB 422 (0x25483D6C) approx BBs exec'd 0 ====
-
- 0x25483D6C: 80040000 lwz r0,0(r4)
- 0: GETL R4, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x25483D70: 3863FFFC addi r3,r3,-4
- 4: GETL R3, t4
- 5: ADDL $0xFFFFFFFC, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25483D74: 81240004 lwz r9,4(r4)
- 8: GETL R4, t6
- 9: ADDL $0x4, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R9
- 12: INCEIPL $4
-
- 0x25483D78: 90030004 stw r0,4(r3)
- 13: GETL R0, t10
- 14: GETL R3, t12
- 15: ADDL $0x4, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x25483D7C: 4BFFFFA0 b 0x25483D1C
- 18: JMPo $0x25483D1C ($4)
-
-
-. 0 25483D6C 20
-. 80 04 00 00 38 63 FF FC 81 24 00 04 90 03 00 04 4B FF FF A0
-
-==== BB 423 (0x25483D1C) approx BBs exec'd 0 ====
-
- 0x25483D1C: 80040008 lwz r0,8(r4)
- 0: GETL R4, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25483D20: 91230008 stw r9,8(r3)
- 5: GETL R9, t4
- 6: GETL R3, t6
- 7: ADDL $0x8, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x25483D24: 8124000C lwz r9,12(r4)
- 10: GETL R4, t8
- 11: ADDL $0xC, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R9
- 14: INCEIPL $4
-
- 0x25483D28: 9003000C stw r0,12(r3)
- 15: GETL R0, t12
- 16: GETL R3, t14
- 17: ADDL $0xC, t14
- 18: STL t12, (t14)
- 19: INCEIPL $4
-
- 0x25483D2C: 80040010 lwz r0,16(r4)
- 20: GETL R4, t16
- 21: ADDL $0x10, t16
- 22: LDL (t16), t18
- 23: PUTL t18, R0
- 24: INCEIPL $4
-
- 0x25483D30: 91230010 stw r9,16(r3)
- 25: GETL R9, t20
- 26: GETL R3, t22
- 27: ADDL $0x10, t22
- 28: STL t20, (t22)
- 29: INCEIPL $4
-
- 0x25483D34: 81240014 lwz r9,20(r4)
- 30: GETL R4, t24
- 31: ADDL $0x14, t24
- 32: LDL (t24), t26
- 33: PUTL t26, R9
- 34: INCEIPL $4
-
- 0x25483D38: 90030014 stw r0,20(r3)
- 35: GETL R0, t28
- 36: GETL R3, t30
- 37: ADDL $0x14, t30
- 38: STL t28, (t30)
- 39: INCEIPL $4
-
- 0x25483D3C: 80040018 lwz r0,24(r4)
- 40: GETL R4, t32
- 41: ADDL $0x18, t32
- 42: LDL (t32), t34
- 43: PUTL t34, R0
- 44: INCEIPL $4
-
- 0x25483D40: 91230018 stw r9,24(r3)
- 45: GETL R9, t36
- 46: GETL R3, t38
- 47: ADDL $0x18, t38
- 48: STL t36, (t38)
- 49: INCEIPL $4
-
- 0x25483D44: 34A5FFF8 addic. r5,r5,-8
- 50: GETL R5, t40
- 51: ADCL $0xFFFFFFF8, t40 (-wCa)
- 52: PUTL t40, R5
- 53: CMP0L t40, t42 (-rSo)
- 54: ICRFL t42, $0x0, CR
- 55: INCEIPL $4
-
- 0x25483D48: 8124001C lwz r9,28(r4)
- 56: GETL R4, t44
- 57: ADDL $0x1C, t44
- 58: LDL (t44), t46
- 59: PUTL t46, R9
- 60: INCEIPL $4
-
- 0x25483D4C: 9003001C stw r0,28(r3)
- 61: GETL R0, t48
- 62: GETL R3, t50
- 63: ADDL $0x1C, t50
- 64: STL t48, (t50)
- 65: INCEIPL $4
-
- 0x25483D50: 38840020 addi r4,r4,32
- 66: GETL R4, t52
- 67: ADDL $0x20, t52
- 68: PUTL t52, R4
- 69: INCEIPL $4
-
- 0x25483D54: 38630020 addi r3,r3,32
- 70: GETL R3, t54
- 71: ADDL $0x20, t54
- 72: PUTL t54, R3
- 73: INCEIPL $4
-
- 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
- 74: Jc02o $0x25483D0C
-
-
-. 0 25483D1C 64
-. 80 04 00 08 91 23 00 08 81 24 00 0C 90 03 00 0C 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
-
-==== BB 424 (0x254747B4) approx BBs exec'd 0 ====
-
- 0x254747B4: 7C601B78 or r0,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x254747B8: 7C030378 or r3,r0,r0
- 3: GETL R0, t2
- 4: PUTL t2, R3
- 5: INCEIPL $4
-
- 0x254747BC: 83810034 lwz r28,52(r1)
- 6: GETL R1, t4
- 7: ADDL $0x34, t4
- 8: LDL (t4), t6
- 9: PUTL t6, R28
- 10: INCEIPL $4
-
- 0x254747C0: 81410008 lwz r10,8(r1)
- 11: GETL R1, t8
- 12: ADDL $0x8, t8
- 13: LDL (t8), t10
- 14: PUTL t10, R10
- 15: INCEIPL $4
-
- 0x254747C4: 7F8803A6 mtlr r28
- 16: GETL R28, t12
- 17: PUTL t12, LR
- 18: INCEIPL $4
-
- 0x254747C8: 82E1000C lwz r23,12(r1)
- 19: GETL R1, t14
- 20: ADDL $0xC, t14
- 21: LDL (t14), t16
- 22: PUTL t16, R23
- 23: INCEIPL $4
-
- 0x254747CC: 83010010 lwz r24,16(r1)
- 24: GETL R1, t18
- 25: ADDL $0x10, t18
- 26: LDL (t18), t20
- 27: PUTL t20, R24
- 28: INCEIPL $4
-
- 0x254747D0: 7D408120 mtcrf 0x8,r10
- 29: GETL R10, t22
- 30: ICRFL t22, $0x4, CR
- 31: INCEIPL $4
-
- 0x254747D4: 83210014 lwz r25,20(r1)
- 32: GETL R1, t24
- 33: ADDL $0x14, t24
- 34: LDL (t24), t26
- 35: PUTL t26, R25
- 36: INCEIPL $4
-
- 0x254747D8: 83410018 lwz r26,24(r1)
- 37: GETL R1, t28
- 38: ADDL $0x18, t28
- 39: LDL (t28), t30
- 40: PUTL t30, R26
- 41: INCEIPL $4
-
- 0x254747DC: 8361001C lwz r27,28(r1)
- 42: GETL R1, t32
- 43: ADDL $0x1C, t32
- 44: LDL (t32), t34
- 45: PUTL t34, R27
- 46: INCEIPL $4
-
- 0x254747E0: 83810020 lwz r28,32(r1)
- 47: GETL R1, t36
- 48: ADDL $0x20, t36
- 49: LDL (t36), t38
- 50: PUTL t38, R28
- 51: INCEIPL $4
-
- 0x254747E4: 83A10024 lwz r29,36(r1)
- 52: GETL R1, t40
- 53: ADDL $0x24, t40
- 54: LDL (t40), t42
- 55: PUTL t42, R29
- 56: INCEIPL $4
-
- 0x254747E8: 83C10028 lwz r30,40(r1)
- 57: GETL R1, t44
- 58: ADDL $0x28, t44
- 59: LDL (t44), t46
- 60: PUTL t46, R30
- 61: INCEIPL $4
-
- 0x254747EC: 83E1002C lwz r31,44(r1)
- 62: GETL R1, t48
- 63: ADDL $0x2C, t48
- 64: LDL (t48), t50
- 65: PUTL t50, R31
- 66: INCEIPL $4
-
- 0x254747F0: 38210030 addi r1,r1,48
- 67: GETL R1, t52
- 68: ADDL $0x30, t52
- 69: PUTL t52, R1
- 70: INCEIPL $4
-
- 0x254747F4: 4E800020 blr
- 71: GETL LR, t54
- 72: JMPo-r t54 ($4)
-
-
-. 0 254747B4 68
-. 7C 60 1B 78 7C 03 03 78 83 81 00 34 81 41 00 08 7F 88 03 A6 82 E1 00 0C 83 01 00 10 7D 40 81 20 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
-
-==== BB 425 (0x25476DF0) approx BBs exec'd 0 ====
-
- 0x25476DF0: 3B40FFFF li r26,-1
- 0: MOVL $0xFFFFFFFF, t0
- 1: PUTL t0, R26
- 2: INCEIPL $4
-
- 0x25476DF4: 2F030000 cmpi cr6,r3,0
- 3: GETL R3, t2
- 4: CMP0L t2, t4 (-rSo)
- 5: ICRFL t4, $0x6, CR
- 6: INCEIPL $4
-
- 0x25476DF8: 90610228 stw r3,552(r1)
- 7: GETL R3, t6
- 8: GETL R1, t8
- 9: ADDL $0x228, t8
- 10: STL t6, (t8)
- 11: INCEIPL $4
-
- 0x25476DFC: 2E1AFFFF cmpi cr4,r26,-1
- 12: GETL R26, t10
- 13: MOVL $0xFFFFFFFF, t14
- 14: CMPL t10, t14, t12 (-rSo)
- 15: ICRFL t12, $0x4, CR
- 16: INCEIPL $4
-
- 0x25476E00: 409A0200 bc 4,26,0x25477000
- 17: Jc26o $0x25477000
-
-
-. 0 25476DF0 20
-. 3B 40 FF FF 2F 03 00 00 90 61 02 28 2E 1A FF FF 40 9A 02 00
-
-==== BB 426 (0x25477000) approx BBs exec'd 0 ====
-
- 0x25477000: 38810018 addi r4,r1,24
- 0: GETL R1, t0
- 1: ADDL $0x18, t0
- 2: PUTL t0, R4
- 3: INCEIPL $4
-
- 0x25477004: 4BFFF441 bl 0x25476444
- 4: MOVL $0x25477008, t2
- 5: PUTL t2, LR
- 6: JMPo-c $0x25476444 ($4)
-
-
-. 0 25477000 8
-. 38 81 00 18 4B FF F4 41
-
-==== BB 427 open_verify(0x25476444) approx BBs exec'd 0 ====
-
- 0x25476444: 9421FFA0 stwu r1,-96(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFA0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25476448: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x2547644C: 48020BB5 bl 0x25497000
- 9: MOVL $0x25476450, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 25476444 12
-. 94 21 FF A0 7C 08 02 A6 48 02 0B B5
-
-==== BB 428 (0x25476450) approx BBs exec'd 0 ====
-
- 0x25476450: 93C10058 stw r30,88(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x58, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25476454: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x25476458: 93010040 stw r24,64(r1)
- 8: GETL R24, t6
- 9: GETL R1, t8
- 10: ADDL $0x40, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2547645C: 93E1005C stw r31,92(r1)
- 13: GETL R31, t10
- 14: GETL R1, t12
- 15: ADDL $0x5C, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x25476460: 7C982378 or r24,r4,r4
- 18: GETL R4, t14
- 19: PUTL t14, R24
- 20: INCEIPL $4
-
- 0x25476464: 7C3F0B78 or r31,r1,r1
- 21: GETL R1, t16
- 22: PUTL t16, R31
- 23: INCEIPL $4
-
- 0x25476468: 38800000 li r4,0
- 24: MOVL $0x0, t18
- 25: PUTL t18, R4
- 26: INCEIPL $4
-
- 0x2547646C: 92C10038 stw r22,56(r1)
- 27: GETL R22, t20
- 28: GETL R1, t22
- 29: ADDL $0x38, t22
- 30: STL t20, (t22)
- 31: INCEIPL $4
-
- 0x25476470: 7C761B78 or r22,r3,r3
- 32: GETL R3, t24
- 33: PUTL t24, R22
- 34: INCEIPL $4
-
- 0x25476474: 93210044 stw r25,68(r1)
- 35: GETL R25, t26
- 36: GETL R1, t28
- 37: ADDL $0x44, t28
- 38: STL t26, (t28)
- 39: INCEIPL $4
-
- 0x25476478: 9361004C stw r27,76(r1)
- 40: GETL R27, t30
- 41: GETL R1, t32
- 42: ADDL $0x4C, t32
- 43: STL t30, (t32)
- 44: INCEIPL $4
-
- 0x2547647C: 3B600000 li r27,0
- 45: MOVL $0x0, t34
- 46: PUTL t34, R27
- 47: INCEIPL $4
-
- 0x25476480: 92A10034 stw r21,52(r1)
- 48: GETL R21, t36
- 49: GETL R1, t38
- 50: ADDL $0x34, t38
- 51: STL t36, (t38)
- 52: INCEIPL $4
-
- 0x25476484: 92E1003C stw r23,60(r1)
- 53: GETL R23, t40
- 54: GETL R1, t42
- 55: ADDL $0x3C, t42
- 56: STL t40, (t42)
- 57: INCEIPL $4
-
- 0x25476488: 93410048 stw r26,72(r1)
- 58: GETL R26, t44
- 59: GETL R1, t46
- 60: ADDL $0x48, t46
- 61: STL t44, (t46)
- 62: INCEIPL $4
-
- 0x2547648C: 93810050 stw r28,80(r1)
- 63: GETL R28, t48
- 64: GETL R1, t50
- 65: ADDL $0x50, t50
- 66: STL t48, (t50)
- 67: INCEIPL $4
-
- 0x25476490: 93A10054 stw r29,84(r1)
- 68: GETL R29, t52
- 69: GETL R1, t54
- 70: ADDL $0x54, t54
- 71: STL t52, (t54)
- 72: INCEIPL $4
-
- 0x25476494: 90010064 stw r0,100(r1)
- 73: GETL R0, t56
- 74: GETL R1, t58
- 75: ADDL $0x64, t58
- 76: STL t56, (t58)
- 77: INCEIPL $4
-
- 0x25476498: 4800BB49 bl 0x25481FE0
- 78: MOVL $0x2547649C, t60
- 79: PUTL t60, LR
- 80: JMPo-c $0x25481FE0 ($4)
-
-
-. 0 25476450 76
-. 93 C1 00 58 7F C8 02 A6 93 01 00 40 93 E1 00 5C 7C 98 23 78 7C 3F 0B 78 38 80 00 00 92 C1 00 38 7C 76 1B 78 93 21 00 44 93 61 00 4C 3B 60 00 00 92 A1 00 34 92 E1 00 3C 93 41 00 48 93 81 00 50 93 A1 00 54 90 01 00 64 48 00 BB 49
-
-==== BB 429 open(0x25481FE0) approx BBs exec'd 0 ====
-
- 0x25481FE0: 38000005 li r0,5
- 0: MOVL $0x5, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x25481FE4: 44000002 sc
- 3: JMPo-sys $0x25481FE8 ($4)
-
-
-. 0 25481FE0 8
-. 38 00 00 05 44 00 00 02
-
-==== BB 430 (0x25481FE8) approx BBs exec'd 0 ====
-
- 0x25481FE8: 4CA30020 bclr 5,3
- 0: GETL LR, t0
- 1: Jc03o-r t0
-
-
-. 0 25481FE8 4
-. 4C A3 00 20
-
-==== BB 431 (0x2547649C) approx BBs exec'd 0 ====
-
- 0x2547649C: 2F83FFFF cmpi cr7,r3,-1
- 0: GETL R3, t0
- 1: MOVL $0xFFFFFFFF, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0x254764A0: 7C791B78 or r25,r3,r3
- 5: GETL R3, t6
- 6: PUTL t6, R25
- 7: INCEIPL $4
-
- 0x254764A4: 419E00CC bc 12,30,0x25476570
- 8: Js30o $0x25476570
-
-
-. 0 2547649C 12
-. 2F 83 FF FF 7C 79 1B 78 41 9E 00 CC
-
-==== BB 432 (0x254764A8) approx BBs exec'd 0 ====
-
- 0x254764A8: 82FE0514 lwz r23,1300(r30)
- 0: GETL R30, t0
- 1: ADDL $0x514, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R23
- 4: INCEIPL $4
-
- 0x254764AC: 3B980004 addi r28,r24,4
- 5: GETL R24, t4
- 6: ADDL $0x4, t4
- 7: PUTL t4, R28
- 8: INCEIPL $4
-
- 0x254764B0: 7F84E378 or r4,r28,r28
- 9: GETL R28, t6
- 10: PUTL t6, R4
- 11: INCEIPL $4
-
- 0x254764B4: 38A00200 li r5,512
- 12: MOVL $0x200, t8
- 13: PUTL t8, R5
- 14: INCEIPL $4
-
- 0x254764B8: 93770000 stw r27,0(r23)
- 15: GETL R27, t10
- 16: GETL R23, t12
- 17: STL t10, (t12)
- 18: INCEIPL $4
-
- 0x254764BC: 4800BB45 bl 0x25482000
- 19: MOVL $0x254764C0, t14
- 20: PUTL t14, LR
- 21: JMPo-c $0x25482000 ($4)
-
-
-. 0 254764A8 24
-. 82 FE 05 14 3B 98 00 04 7F 84 E3 78 38 A0 02 00 93 77 00 00 48 00 BB 45
-
-==== BB 433 read(0x25482000) approx BBs exec'd 0 ====
-
- 0x25482000: 38000003 li r0,3
- 0: MOVL $0x3, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x25482004: 44000002 sc
- 3: JMPo-sys $0x25482008 ($4)
-
-
-. 0 25482000 8
-. 38 00 00 03 44 00 00 02
-
-==== BB 434 (0x25482008) approx BBs exec'd 0 ====
-
- 0x25482008: 4CA30020 bclr 5,3
- 0: GETL LR, t0
- 1: Jc03o-r t0
-
-
-. 0 25482008 4
-. 4C A3 00 20
-
-==== BB 435 (0x254764C0) approx BBs exec'd 0 ====
-
- 0x254764C0: 2C030033 cmpi cr0,r3,51
- 0: GETL R3, t0
- 1: MOVL $0x33, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x254764C4: 7C7D1B78 or r29,r3,r3
- 5: GETL R3, t6
- 6: PUTL t6, R29
- 7: INCEIPL $4
-
- 0x254764C8: 90780000 stw r3,0(r24)
- 8: GETL R3, t8
- 9: GETL R24, t10
- 10: STL t8, (t10)
- 11: INCEIPL $4
-
- 0x254764CC: 4081014C bc 4,1,0x25476618
- 12: Jc01o $0x25476618
-
-
-. 0 254764C0 16
-. 2C 03 00 33 7C 7D 1B 78 90 78 00 00 40 81 01 4C
-
-==== BB 436 (0x254764D0) approx BBs exec'd 0 ====
-
- 0x254764D0: 809E016C lwz r4,364(r30)
- 0: GETL R30, t0
- 1: ADDL $0x16C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x254764D4: 7F83E378 or r3,r28,r28
- 5: GETL R28, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x254764D8: 38A00009 li r5,9
- 8: MOVL $0x9, t6
- 9: PUTL t6, R5
- 10: INCEIPL $4
-
- 0x254764DC: 4800CDBD bl 0x25483298
- 11: MOVL $0x254764E0, t8
- 12: PUTL t8, LR
- 13: JMPo-c $0x25483298 ($4)
-
-
-. 0 254764D0 16
-. 80 9E 01 6C 7F 83 E3 78 38 A0 00 09 48 00 CD BD
-
-==== BB 437 (0x254764E0) approx BBs exec'd 0 ====
-
- 0x254764E0: 2F030000 cmpi cr6,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x254764E4: 409A0234 bc 4,26,0x25476718
- 4: Jc26o $0x25476718
-
-
-. 0 254764E0 8
-. 2F 03 00 00 40 9A 02 34
-
-==== BB 438 (0x254764E8) approx BBs exec'd 0 ====
-
- 0x254764E8: 819C0014 lwz r12,20(r28)
- 0: GETL R28, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R12
- 4: INCEIPL $4
-
- 0x254764EC: 811E0200 lwz r8,512(r30)
- 5: GETL R30, t4
- 6: ADDL $0x200, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R8
- 9: INCEIPL $4
-
- 0x254764F0: 2C8C0001 cmpi cr1,r12,1
- 10: GETL R12, t8
- 11: MOVL $0x1, t12
- 12: CMPL t8, t12, t10 (-rSo)
- 13: ICRFL t10, $0x1, CR
- 14: INCEIPL $4
-
- 0x254764F4: 40860138 bc 4,6,0x2547662C
- 15: Jc06o $0x2547662C
-
-
-. 0 254764E8 16
-. 81 9C 00 14 81 1E 02 00 2C 8C 00 01 40 86 01 38
-
-==== BB 439 (0x254764F8) approx BBs exec'd 0 ====
-
- 0x254764F8: A11C0012 lhz r8,18(r28)
- 0: GETL R28, t0
- 1: ADDL $0x12, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x254764FC: 2F080014 cmpi cr6,r8,20
- 5: GETL R8, t4
- 6: MOVL $0x14, t8
- 7: CMPL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x6, CR
- 9: INCEIPL $4
-
- 0x25476500: 409A01D0 bc 4,26,0x254766D0
- 10: Jc26o $0x254766D0
-
-
-. 0 254764F8 12
-. A1 1C 00 12 2F 08 00 14 40 9A 01 D0
-
-==== BB 440 (0x25476504) approx BBs exec'd 0 ====
-
- 0x25476504: A01C0010 lhz r0,16(r28)
- 0: GETL R28, t0
- 1: ADDL $0x10, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25476508: 2F800003 cmpi cr7,r0,3
- 5: GETL R0, t4
- 6: MOVL $0x3, t8
- 7: CMPL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x7, CR
- 9: INCEIPL $4
-
- 0x2547650C: 409E0278 bc 4,30,0x25476784
- 10: Jc30o $0x25476784
-
-
-. 0 25476504 12
-. A0 1C 00 10 2F 80 00 03 40 9E 02 78
-
-==== BB 441 (0x25476510) approx BBs exec'd 0 ====
-
- 0x25476510: A2BC002A lhz r21,42(r28)
- 0: GETL R28, t0
- 1: ADDL $0x2A, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R21
- 4: INCEIPL $4
-
- 0x25476514: 811E0204 lwz r8,516(r30)
- 5: GETL R30, t4
- 6: ADDL $0x204, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R8
- 9: INCEIPL $4
-
- 0x25476518: 2C950020 cmpi cr1,r21,32
- 10: GETL R21, t8
- 11: MOVL $0x20, t12
- 12: CMPL t8, t12, t10 (-rSo)
- 13: ICRFL t10, $0x1, CR
- 14: INCEIPL $4
-
- 0x2547651C: 40860110 bc 4,6,0x2547662C
- 15: Jc06o $0x2547662C
-
-
-. 0 25476510 16
-. A2 BC 00 2A 81 1E 02 04 2C 95 00 20 40 86 01 10
-
-==== BB 442 (0x25476520) approx BBs exec'd 0 ====
-
- 0x25476520: A17C002C lhz r11,44(r28)
- 0: GETL R28, t0
- 1: ADDL $0x2C, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25476524: 809C001C lwz r4,28(r28)
- 5: GETL R28, t4
- 6: ADDL $0x1C, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R4
- 9: INCEIPL $4
-
- 0x25476528: 557B2834 rlwinm r27,r11,5,0,26
- 10: GETL R11, t8
- 11: SHLL $0x5, t8
- 12: PUTL t8, R27
- 13: INCEIPL $4
-
- 0x2547652C: 7F44DA14 add r26,r4,r27
- 14: GETL R4, t10
- 15: GETL R27, t12
- 16: ADDL t10, t12
- 17: PUTL t12, R26
- 18: INCEIPL $4
-
- 0x25476530: 7F1AE840 cmpl cr6,r26,r29
- 19: GETL R26, t14
- 20: GETL R29, t16
- 21: CMPUL t14, t16, t18 (-rSo)
- 22: ICRFL t18, $0x6, CR
- 23: INCEIPL $4
-
- 0x25476534: 7FA4C214 add r29,r4,r24
- 24: GETL R4, t20
- 25: GETL R24, t22
- 26: ADDL t20, t22
- 27: PUTL t22, R29
- 28: INCEIPL $4
-
- 0x25476538: 3B5D0004 addi r26,r29,4
- 29: GETL R29, t24
- 30: ADDL $0x4, t24
- 31: PUTL t24, R26
- 32: INCEIPL $4
-
- 0x2547653C: 41990108 bc 12,25,0x25476644
- 33: Js25o $0x25476644
-
-
-. 0 25476520 32
-. A1 7C 00 2C 80 9C 00 1C 55 7B 28 34 7F 44 DA 14 7F 1A E8 40 7F A4 C2 14 3B 5D 00 04 41 99 01 08
-
-==== BB 443 (0x25476540) approx BBs exec'd 0 ====
-
- 0x25476540: 557B2834 rlwinm r27,r11,5,0,26
- 0: GETL R11, t0
- 1: SHLL $0x5, t0
- 2: PUTL t0, R27
- 3: INCEIPL $4
-
- 0x25476544: 7F5DD378 or r29,r26,r26
- 4: GETL R26, t2
- 5: PUTL t2, R29
- 6: INCEIPL $4
-
- 0x25476548: 7C1BD214 add r0,r27,r26
- 7: GETL R27, t4
- 8: GETL R26, t6
- 9: ADDL t4, t6
- 10: PUTL t6, R0
- 11: INCEIPL $4
-
- 0x2547654C: 4800001C b 0x25476568
- 12: JMPo $0x25476568 ($4)
-
-
-. 0 25476540 16
-. 55 7B 28 34 7F 5D D3 78 7C 1B D2 14 48 00 00 1C
-
-==== BB 444 (0x25476568) approx BBs exec'd 0 ====
-
- 0x25476568: 7C00E840 cmpl cr0,r0,r29
- 0: GETL R0, t0
- 1: GETL R29, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x0, CR
- 4: INCEIPL $4
-
- 0x2547656C: 4181FFE4 bc 12,1,0x25476550
- 5: Js01o $0x25476550
-
-
-. 0 25476568 8
-. 7C 00 E8 40 41 81 FF E4
-
-==== BB 445 (0x25476550) approx BBs exec'd 0 ====
-
- 0x25476550: 809D0000 lwz r4,0(r29)
- 0: GETL R29, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R4
- 3: INCEIPL $4
-
- 0x25476554: 2C840004 cmpi cr1,r4,4
- 4: GETL R4, t4
- 5: MOVL $0x4, t8
- 6: CMPL t4, t8, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x25476558: 4186005C bc 12,6,0x254765B4
- 9: Js06o $0x254765B4
-
-
-. 0 25476550 12
-. 80 9D 00 00 2C 84 00 04 41 86 00 5C
-
-==== BB 446 (0x2547655C) approx BBs exec'd 0 ====
-
- 0x2547655C: 55662834 rlwinm r6,r11,5,0,26
- 0: GETL R11, t0
- 1: SHLL $0x5, t0
- 2: PUTL t0, R6
- 3: INCEIPL $4
-
- 0x25476560: 3BBD0020 addi r29,r29,32
- 4: GETL R29, t2
- 5: ADDL $0x20, t2
- 6: PUTL t2, R29
- 7: INCEIPL $4
-
- 0x25476564: 7C06D214 add r0,r6,r26
- 8: GETL R6, t4
- 9: GETL R26, t6
- 10: ADDL t4, t6
- 11: PUTL t6, R0
- 12: INCEIPL $4
-
- 0x25476568: 7C00E840 cmpl cr0,r0,r29
- 13: GETL R0, t8
- 14: GETL R29, t10
- 15: CMPUL t8, t10, t12 (-rSo)
- 16: ICRFL t12, $0x0, CR
- 17: INCEIPL $4
-
- 0x2547656C: 4181FFE4 bc 12,1,0x25476550
- 18: Js01o $0x25476550
-
-
-. 0 2547655C 20
-. 55 66 28 34 3B BD 00 20 7C 06 D2 14 7C 00 E8 40 41 81 FF E4
-
-==== BB 447 (0x25476570) approx BBs exec'd 0 ====
-
- 0x25476570: 80810000 lwz r4,0(r1)
- 0: GETL R1, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R4
- 3: INCEIPL $4
-
- 0x25476574: 7F23CB78 or r3,r25,r25
- 4: GETL R25, t4
- 5: PUTL t4, R3
- 6: INCEIPL $4
-
- 0x25476578: 82E40004 lwz r23,4(r4)
- 7: GETL R4, t6
- 8: ADDL $0x4, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R23
- 11: INCEIPL $4
-
- 0x2547657C: 82A4FFD4 lwz r21,-44(r4)
- 12: GETL R4, t10
- 13: ADDL $0xFFFFFFD4, t10
- 14: LDL (t10), t12
- 15: PUTL t12, R21
- 16: INCEIPL $4
-
- 0x25476580: 7EE803A6 mtlr r23
- 17: GETL R23, t14
- 18: PUTL t14, LR
- 19: INCEIPL $4
-
- 0x25476584: 82C4FFD8 lwz r22,-40(r4)
- 20: GETL R4, t16
- 21: ADDL $0xFFFFFFD8, t16
- 22: LDL (t16), t18
- 23: PUTL t18, R22
- 24: INCEIPL $4
-
- 0x25476588: 82E4FFDC lwz r23,-36(r4)
- 25: GETL R4, t20
- 26: ADDL $0xFFFFFFDC, t20
- 27: LDL (t20), t22
- 28: PUTL t22, R23
- 29: INCEIPL $4
-
- 0x2547658C: 8304FFE0 lwz r24,-32(r4)
- 30: GETL R4, t24
- 31: ADDL $0xFFFFFFE0, t24
- 32: LDL (t24), t26
- 33: PUTL t26, R24
- 34: INCEIPL $4
-
- 0x25476590: 8324FFE4 lwz r25,-28(r4)
- 35: GETL R4, t28
- 36: ADDL $0xFFFFFFE4, t28
- 37: LDL (t28), t30
- 38: PUTL t30, R25
- 39: INCEIPL $4
-
- 0x25476594: 8344FFE8 lwz r26,-24(r4)
- 40: GETL R4, t32
- 41: ADDL $0xFFFFFFE8, t32
- 42: LDL (t32), t34
- 43: PUTL t34, R26
- 44: INCEIPL $4
-
- 0x25476598: 8364FFEC lwz r27,-20(r4)
- 45: GETL R4, t36
- 46: ADDL $0xFFFFFFEC, t36
- 47: LDL (t36), t38
- 48: PUTL t38, R27
- 49: INCEIPL $4
-
- 0x2547659C: 8384FFF0 lwz r28,-16(r4)
- 50: GETL R4, t40
- 51: ADDL $0xFFFFFFF0, t40
- 52: LDL (t40), t42
- 53: PUTL t42, R28
- 54: INCEIPL $4
-
- 0x254765A0: 83A4FFF4 lwz r29,-12(r4)
- 55: GETL R4, t44
- 56: ADDL $0xFFFFFFF4, t44
- 57: LDL (t44), t46
- 58: PUTL t46, R29
- 59: INCEIPL $4
-
- 0x254765A4: 83C4FFF8 lwz r30,-8(r4)
- 60: GETL R4, t48
- 61: ADDL $0xFFFFFFF8, t48
- 62: LDL (t48), t50
- 63: PUTL t50, R30
- 64: INCEIPL $4
-
- 0x254765A8: 83E4FFFC lwz r31,-4(r4)
- 65: GETL R4, t52
- 66: ADDL $0xFFFFFFFC, t52
- 67: LDL (t52), t54
- 68: PUTL t54, R31
- 69: INCEIPL $4
-
- 0x254765AC: 7C812378 or r1,r4,r4
- 70: GETL R4, t56
- 71: PUTL t56, R1
- 72: INCEIPL $4
-
- 0x254765B0: 4E800020 blr
- 73: GETL LR, t58
- 74: JMPo-r t58 ($4)
-
-
-. 0 25476570 68
-. 80 81 00 00 7F 23 CB 78 82 E4 00 04 82 A4 FF D4 7E E8 03 A6 82 C4 FF D8 82 E4 FF DC 83 04 FF E0 83 24 FF E4 83 44 FF E8 83 64 FF EC 83 84 FF F0 83 A4 FF F4 83 C4 FF F8 83 E4 FF FC 7C 81 23 78 4E 80 00 20
-
-==== BB 448 (0x25477008) approx BBs exec'd 0 ====
-
- 0x25477008: 2E03FFFF cmpi cr4,r3,-1
- 0: GETL R3, t0
- 1: MOVL $0xFFFFFFFF, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x4, CR
- 4: INCEIPL $4
-
- 0x2547700C: 7C7A1B78 or r26,r3,r3
- 5: GETL R3, t6
- 6: PUTL t6, R26
- 7: INCEIPL $4
-
- 0x25477010: 4092FDF4 bc 4,18,0x25476E04
- 8: Jc18o $0x25476E04
-
-
-. 0 25477008 12
-. 2E 03 FF FF 7C 7A 1B 78 40 92 FD F4
-
-==== BB 449 (0x25476E04) approx BBs exec'd 0 ====
-
- 0x25476E04: 571227FE rlwinm r18,r24,4,31,31
- 0: GETL R24, t0
- 1: ROLL $0x4, t0
- 2: ANDL $0x1, t0
- 3: PUTL t0, R18
- 4: INCEIPL $4
-
- 0x25476E08: 32D2FFFF addic r22,r18,-1
- 5: GETL R18, t2
- 6: ADCL $0xFFFFFFFF, t2 (-wCa)
- 7: PUTL t2, R22
- 8: INCEIPL $4
-
- 0x25476E0C: 7ED6B110 subfe r22,r22,r22
- 9: GETL R22, t4
- 10: GETL R22, t6
- 11: SBBL t4, t6 (-rCa-wCa)
- 12: PUTL t6, R22
- 13: INCEIPL $4
-
- 0x25476E10: 7F7CB038 and r28,r27,r22
- 14: GETL R27, t8
- 15: GETL R22, t10
- 16: ANDL t8, t10
- 17: PUTL t10, R28
- 18: INCEIPL $4
-
- 0x25476E14: 4092020C bc 4,18,0x25477020
- 19: Jc18o $0x25477020
-
-
-. 0 25476E04 20
-. 57 12 27 FE 32 D2 FF FF 7E D6 B1 10 7F 7C B0 38 40 92 02 0C
-
-==== BB 450 (0x25477020) approx BBs exec'd 0 ====
-
- 0x25477020: 80FE04C0 lwz r7,1216(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4C0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x25477024: 7FE3FB78 or r3,r31,r31
- 5: GETL R31, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25477028: 80C10228 lwz r6,552(r1)
- 8: GETL R1, t6
- 9: ADDL $0x228, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R6
- 12: INCEIPL $4
-
- 0x2547702C: 7F44D378 or r4,r26,r26
- 13: GETL R26, t10
- 14: PUTL t10, R4
- 15: INCEIPL $4
-
- 0x25477030: 81C70000 lwz r14,0(r7)
- 16: GETL R7, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R14
- 19: INCEIPL $4
-
- 0x25477034: 7E088378 or r8,r16,r16
- 20: GETL R16, t16
- 21: PUTL t16, R8
- 22: INCEIPL $4
-
- 0x25477038: 7F87E378 or r7,r28,r28
- 23: GETL R28, t18
- 24: PUTL t18, R7
- 25: INCEIPL $4
-
- 0x2547703C: 7F09C378 or r9,r24,r24
- 26: GETL R24, t20
- 27: PUTL t20, R9
- 28: INCEIPL $4
-
- 0x25477040: 38A10018 addi r5,r1,24
- 29: GETL R1, t22
- 30: ADDL $0x18, t22
- 31: PUTL t22, R5
- 32: INCEIPL $4
-
- 0x25477044: 3941022C addi r10,r1,556
- 33: GETL R1, t24
- 34: ADDL $0x22C, t24
- 35: PUTL t24, R10
- 36: INCEIPL $4
-
- 0x25477048: 91C1022C stw r14,556(r1)
- 37: GETL R14, t26
- 38: GETL R1, t28
- 39: ADDL $0x22C, t28
- 40: STL t26, (t28)
- 41: INCEIPL $4
-
- 0x2547704C: 93210008 stw r25,8(r1)
- 42: GETL R25, t30
- 43: GETL R1, t32
- 44: ADDL $0x8, t32
- 45: STL t30, (t32)
- 46: INCEIPL $4
-
- 0x25477050: 4BFFE4B9 bl 0x25475508
- 47: MOVL $0x25477054, t34
- 48: PUTL t34, LR
- 49: JMPo-c $0x25475508 ($4)
-
-
-. 0 25477020 52
-. 80 FE 04 C0 7F E3 FB 78 80 C1 02 28 7F 44 D3 78 81 C7 00 00 7E 08 83 78 7F 87 E3 78 7F 09 C3 78 38 A1 00 18 39 41 02 2C 91 C1 02 2C 93 21 00 08 4B FF E4 B9
-
-==== BB 451 _dl_map_object_from_fd(0x25475508) approx BBs exec'd 0 ====
-
- 0x25475508: 9421FF00 stwu r1,-256(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFF00, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547550C: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x25475510: 48021AF1 bl 0x25497000
- 9: MOVL $0x25475514, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 25475508 12
-. 94 21 FF 00 7C 08 02 A6 48 02 1A F1
-
-==== BB 452 (0x25475514) approx BBs exec'd 0 ====
-
- 0x25475514: 7D800026 mfcr r12
- 0: GETL CR, t0
- 1: PUTL t0, R12
- 2: INCEIPL $4
-
- 0x25475518: 93C100F8 stw r30,248(r1)
- 3: GETL R30, t2
- 4: GETL R1, t4
- 5: ADDL $0xF8, t4
- 6: STL t2, (t4)
- 7: INCEIPL $4
-
- 0x2547551C: 7FC802A6 mflr r30
- 8: GETL LR, t6
- 9: PUTL t6, R30
- 10: INCEIPL $4
-
- 0x25475520: 93E100FC stw r31,252(r1)
- 11: GETL R31, t8
- 12: GETL R1, t10
- 13: ADDL $0xFC, t10
- 14: STL t8, (t10)
- 15: INCEIPL $4
-
- 0x25475524: 7C3F0B78 or r31,r1,r1
- 16: GETL R1, t12
- 17: PUTL t12, R31
- 18: INCEIPL $4
-
- 0x25475528: 90010104 stw r0,260(r1)
- 19: GETL R0, t14
- 20: GETL R1, t16
- 21: ADDL $0x104, t16
- 22: STL t14, (t16)
- 23: INCEIPL $4
-
- 0x2547552C: 920100C0 stw r16,192(r1)
- 24: GETL R16, t18
- 25: GETL R1, t20
- 26: ADDL $0xC0, t20
- 27: STL t18, (t20)
- 28: INCEIPL $4
-
- 0x25475530: 7CD03378 or r16,r6,r6
- 29: GETL R6, t22
- 30: PUTL t22, R16
- 31: INCEIPL $4
-
- 0x25475534: 926100CC stw r19,204(r1)
- 32: GETL R19, t24
- 33: GETL R1, t26
- 34: ADDL $0xCC, t26
- 35: STL t24, (t26)
- 36: INCEIPL $4
-
- 0x25475538: 7C932378 or r19,r4,r4
- 37: GETL R4, t28
- 38: PUTL t28, R19
- 39: INCEIPL $4
-
- 0x2547553C: 928100D0 stw r20,208(r1)
- 40: GETL R20, t30
- 41: GETL R1, t32
- 42: ADDL $0xD0, t32
- 43: STL t30, (t32)
- 44: INCEIPL $4
-
- 0x25475540: 7C741B78 or r20,r3,r3
- 45: GETL R3, t34
- 46: PUTL t34, R20
- 47: INCEIPL $4
-
- 0x25475544: 92C100D8 stw r22,216(r1)
- 48: GETL R22, t36
- 49: GETL R1, t38
- 50: ADDL $0xD8, t38
- 51: STL t36, (t38)
- 52: INCEIPL $4
-
- 0x25475548: 38600003 li r3,3
- 53: MOVL $0x3, t40
- 54: PUTL t40, R3
- 55: INCEIPL $4
-
- 0x2547554C: 92E100DC stw r23,220(r1)
- 56: GETL R23, t42
- 57: GETL R1, t44
- 58: ADDL $0xDC, t44
- 59: STL t42, (t44)
- 60: INCEIPL $4
-
- 0x25475550: 7D364B78 or r22,r9,r9
- 61: GETL R9, t46
- 62: PUTL t46, R22
- 63: INCEIPL $4
-
- 0x25475554: 932100E4 stw r25,228(r1)
- 64: GETL R25, t48
- 65: GETL R1, t50
- 66: ADDL $0xE4, t50
- 67: STL t48, (t50)
- 68: INCEIPL $4
-
- 0x25475558: 7CF73B78 or r23,r7,r7
- 69: GETL R7, t52
- 70: PUTL t52, R23
- 71: INCEIPL $4
-
- 0x2547555C: 934100E8 stw r26,232(r1)
- 72: GETL R26, t54
- 73: GETL R1, t56
- 74: ADDL $0xE8, t56
- 75: STL t54, (t56)
- 76: INCEIPL $4
-
- 0x25475560: 7D194378 or r25,r8,r8
- 77: GETL R8, t58
- 78: PUTL t58, R25
- 79: INCEIPL $4
-
- 0x25475564: 936100EC stw r27,236(r1)
- 80: GETL R27, t60
- 81: GETL R1, t62
- 82: ADDL $0xEC, t62
- 83: STL t60, (t62)
- 84: INCEIPL $4
-
- 0x25475568: 3B400000 li r26,0
- 85: MOVL $0x0, t64
- 86: PUTL t64, R26
- 87: INCEIPL $4
-
- 0x2547556C: 938100F0 stw r28,240(r1)
- 88: GETL R28, t66
- 89: GETL R1, t68
- 90: ADDL $0xF0, t68
- 91: STL t66, (t68)
- 92: INCEIPL $4
-
- 0x25475570: 7CBC2B78 or r28,r5,r5
- 93: GETL R5, t70
- 94: PUTL t70, R28
- 95: INCEIPL $4
-
- 0x25475574: 91C100B8 stw r14,184(r1)
- 96: GETL R14, t72
- 97: GETL R1, t74
- 98: ADDL $0xB8, t74
- 99: STL t72, (t74)
- 100: INCEIPL $4
-
- 0x25475578: 38BF0028 addi r5,r31,40
- 101: GETL R31, t76
- 102: ADDL $0x28, t76
- 103: PUTL t76, R5
- 104: INCEIPL $4
-
- 0x2547557C: 91E100BC stw r15,188(r1)
- 105: GETL R15, t78
- 106: GETL R1, t80
- 107: ADDL $0xBC, t80
- 108: STL t78, (t80)
- 109: INCEIPL $4
-
- 0x25475580: 922100C4 stw r17,196(r1)
- 110: GETL R17, t82
- 111: GETL R1, t84
- 112: ADDL $0xC4, t84
- 113: STL t82, (t84)
- 114: INCEIPL $4
-
- 0x25475584: 924100C8 stw r18,200(r1)
- 115: GETL R18, t86
- 116: GETL R1, t88
- 117: ADDL $0xC8, t88
- 118: STL t86, (t88)
- 119: INCEIPL $4
-
- 0x25475588: 92A100D4 stw r21,212(r1)
- 120: GETL R21, t90
- 121: GETL R1, t92
- 122: ADDL $0xD4, t92
- 123: STL t90, (t92)
- 124: INCEIPL $4
-
- 0x2547558C: 930100E0 stw r24,224(r1)
- 125: GETL R24, t94
- 126: GETL R1, t96
- 127: ADDL $0xE0, t96
- 128: STL t94, (t96)
- 129: INCEIPL $4
-
- 0x25475590: 93A100F4 stw r29,244(r1)
- 130: GETL R29, t98
- 131: GETL R1, t100
- 132: ADDL $0xF4, t100
- 133: STL t98, (t100)
- 134: INCEIPL $4
-
- 0x25475594: 918100B4 stw r12,180(r1)
- 135: GETL R12, t102
- 136: GETL R1, t104
- 137: ADDL $0xB4, t104
- 138: STL t102, (t104)
- 139: INCEIPL $4
-
- 0x25475598: 915F0098 stw r10,152(r31)
- 140: GETL R10, t106
- 141: GETL R31, t108
- 142: ADDL $0x98, t108
- 143: STL t106, (t108)
- 144: INCEIPL $4
-
- 0x2547559C: 837F0108 lwz r27,264(r31)
- 145: GETL R31, t110
- 146: ADDL $0x108, t110
- 147: LDL (t110), t112
- 148: PUTL t112, R27
- 149: INCEIPL $4
-
- 0x254755A0: 4800C905 bl 0x25481EA4
- 150: MOVL $0x254755A4, t114
- 151: PUTL t114, LR
- 152: JMPo-c $0x25481EA4 ($4)
-
-
-. 0 25475514 144
-. 7D 80 00 26 93 C1 00 F8 7F C8 02 A6 93 E1 00 FC 7C 3F 0B 78 90 01 01 04 92 01 00 C0 7C D0 33 78 92 61 00 CC 7C 93 23 78 92 81 00 D0 7C 74 1B 78 92 C1 00 D8 38 60 00 03 92 E1 00 DC 7D 36 4B 78 93 21 00 E4 7C F7 3B 78 93 41 00 E8 7D 19 43 78 93 61 00 EC 3B 40 00 00 93 81 00 F0 7C BC 2B 78 91 C1 00 B8 38 BF 00 28 91 E1 00 BC 92 21 00 C4 92 41 00 C8 92 A1 00 D4 93 01 00 E0 93 A1 00 F4 91 81 00 B4 91 5F 00 98 83 7F 01 08 48 00 C9 05
-
-==== BB 453 __GI___fxstat64(0x25481EA4) approx BBs exec'd 0 ====
-
- 0x25481EA4: 9421FF80 stwu r1,-128(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFF80, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25481EA8: 7CC802A6 mflr r6
- 6: GETL LR, t4
- 7: PUTL t4, R6
- 8: INCEIPL $4
-
- 0x25481EAC: 48015155 bl 0x25497000
- 9: MOVL $0x25481EB0, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 25481EA4 12
-. 94 21 FF 80 7C C8 02 A6 48 01 51 55
-
-==== BB 454 (0x25481EB0) approx BBs exec'd 0 ====
-
- 0x25481EB0: 93C10078 stw r30,120(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x78, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25481EB4: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x25481EB8: 9361006C stw r27,108(r1)
- 8: GETL R27, t6
- 9: GETL R1, t8
- 10: ADDL $0x6C, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x25481EBC: 90C10084 stw r6,132(r1)
- 13: GETL R6, t10
- 14: GETL R1, t12
- 15: ADDL $0x84, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x25481EC0: 93210064 stw r25,100(r1)
- 18: GETL R25, t14
- 19: GETL R1, t16
- 20: ADDL $0x64, t16
- 21: STL t14, (t16)
- 22: INCEIPL $4
-
- 0x25481EC4: 7C791B78 or r25,r3,r3
- 23: GETL R3, t18
- 24: PUTL t18, R25
- 25: INCEIPL $4
-
- 0x25481EC8: 837E04EC lwz r27,1260(r30)
- 26: GETL R30, t20
- 27: ADDL $0x4EC, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R27
- 30: INCEIPL $4
-
- 0x25481ECC: 93810070 stw r28,112(r1)
- 31: GETL R28, t24
- 32: GETL R1, t26
- 33: ADDL $0x70, t26
- 34: STL t24, (t26)
- 35: INCEIPL $4
-
- 0x25481ED0: 7CBC2B78 or r28,r5,r5
- 36: GETL R5, t28
- 37: PUTL t28, R28
- 38: INCEIPL $4
-
- 0x25481ED4: 801B0000 lwz r0,0(r27)
- 39: GETL R27, t30
- 40: LDL (t30), t32
- 41: PUTL t32, R0
- 42: INCEIPL $4
-
- 0x25481ED8: 93E1007C stw r31,124(r1)
- 43: GETL R31, t34
- 44: GETL R1, t36
- 45: ADDL $0x7C, t36
- 46: STL t34, (t36)
- 47: INCEIPL $4
-
- 0x25481EDC: 7C9F2378 or r31,r4,r4
- 48: GETL R4, t38
- 49: PUTL t38, R31
- 50: INCEIPL $4
-
- 0x25481EE0: 2F800000 cmpi cr7,r0,0
- 51: GETL R0, t40
- 52: CMP0L t40, t42 (-rSo)
- 53: ICRFL t42, $0x7, CR
- 54: INCEIPL $4
-
- 0x25481EE4: 93410068 stw r26,104(r1)
- 55: GETL R26, t44
- 56: GETL R1, t46
- 57: ADDL $0x68, t46
- 58: STL t44, (t46)
- 59: INCEIPL $4
-
- 0x25481EE8: 93A10074 stw r29,116(r1)
- 60: GETL R29, t48
- 61: GETL R1, t50
- 62: ADDL $0x74, t50
- 63: STL t48, (t50)
- 64: INCEIPL $4
-
- 0x25481EEC: 409E0048 bc 4,30,0x25481F34
- 65: Jc30o $0x25481F34
-
-
-. 0 25481EB0 64
-. 93 C1 00 78 7F C8 02 A6 93 61 00 6C 90 C1 00 84 93 21 00 64 7C 79 1B 78 83 7E 04 EC 93 81 00 70 7C BC 2B 78 80 1B 00 00 93 E1 00 7C 7C 9F 23 78 2F 80 00 00 93 41 00 68 93 A1 00 74 40 9E 00 48
-
-==== BB 455 (0x25481EF0) approx BBs exec'd 0 ====
-
- 0x25481EF0: 83BE0514 lwz r29,1300(r30)
- 0: GETL R30, t0
- 1: ADDL $0x514, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x25481EF4: 7C832378 or r3,r4,r4
- 5: GETL R4, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25481EF8: 380000C5 li r0,197
- 8: MOVL $0xC5, t6
- 9: PUTL t6, R0
- 10: INCEIPL $4
-
- 0x25481EFC: 7CA42B78 or r4,r5,r5
- 11: GETL R5, t8
- 12: PUTL t8, R4
- 13: INCEIPL $4
-
- 0x25481F00: 835D0000 lwz r26,0(r29)
- 14: GETL R29, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R26
- 17: INCEIPL $4
-
- 0x25481F04: 44000002 sc
- 18: JMPo-sys $0x25481F08 ($4)
-
-
-. 0 25481EF0 24
-. 83 BE 05 14 7C 83 23 78 38 00 00 C5 7C A4 2B 78 83 5D 00 00 44 00 00 02
-
-==== BB 456 (0x25481F08) approx BBs exec'd 0 ====
-
- 0x25481F08: 7C000026 mfcr r0
- 0: GETL CR, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x25481F0C: 74091000 andis. r9,r0,0x1000
- 3: GETL R0, t2
- 4: ANDL $0x10000000, t2
- 5: PUTL t2, R9
- 6: CMP0L t2, t4 (-rSo)
- 7: ICRFL t4, $0x0, CR
- 8: INCEIPL $4
-
- 0x25481F10: 408200C4 bc 4,2,0x25481FD4
- 9: Jc02o $0x25481FD4
-
-
-. 0 25481F08 12
-. 7C 00 00 26 74 09 10 00 40 82 00 C4
-
-==== BB 457 (0x25481F14) approx BBs exec'd 0 ====
-
- 0x25481F14: 2C83FFFF cmpi cr1,r3,-1
- 0: GETL R3, t0
- 1: MOVL $0xFFFFFFFF, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0x25481F18: 40A60044 bc 5,6,0x25481F5C
- 5: Jc06o $0x25481F5C
-
-
-. 0 25481F14 8
-. 2C 83 FF FF 40 A6 00 44
-
-==== BB 458 (0x25481F5C) approx BBs exec'd 0 ====
-
- 0x25481F5C: 80A10084 lwz r5,132(r1)
- 0: GETL R1, t0
- 1: ADDL $0x84, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25481F60: 83210064 lwz r25,100(r1)
- 5: GETL R1, t4
- 6: ADDL $0x64, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R25
- 9: INCEIPL $4
-
- 0x25481F64: 83410068 lwz r26,104(r1)
- 10: GETL R1, t8
- 11: ADDL $0x68, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R26
- 14: INCEIPL $4
-
- 0x25481F68: 7CA803A6 mtlr r5
- 15: GETL R5, t12
- 16: PUTL t12, LR
- 17: INCEIPL $4
-
- 0x25481F6C: 8361006C lwz r27,108(r1)
- 18: GETL R1, t14
- 19: ADDL $0x6C, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R27
- 22: INCEIPL $4
-
- 0x25481F70: 83810070 lwz r28,112(r1)
- 23: GETL R1, t18
- 24: ADDL $0x70, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R28
- 27: INCEIPL $4
-
- 0x25481F74: 83A10074 lwz r29,116(r1)
- 28: GETL R1, t22
- 29: ADDL $0x74, t22
- 30: LDL (t22), t24
- 31: PUTL t24, R29
- 32: INCEIPL $4
-
- 0x25481F78: 83C10078 lwz r30,120(r1)
- 33: GETL R1, t26
- 34: ADDL $0x78, t26
- 35: LDL (t26), t28
- 36: PUTL t28, R30
- 37: INCEIPL $4
-
- 0x25481F7C: 83E1007C lwz r31,124(r1)
- 38: GETL R1, t30
- 39: ADDL $0x7C, t30
- 40: LDL (t30), t32
- 41: PUTL t32, R31
- 42: INCEIPL $4
-
- 0x25481F80: 38210080 addi r1,r1,128
- 43: GETL R1, t34
- 44: ADDL $0x80, t34
- 45: PUTL t34, R1
- 46: INCEIPL $4
-
- 0x25481F84: 4E800020 blr
- 47: GETL LR, t36
- 48: JMPo-r t36 ($4)
-
-
-. 0 25481F5C 44
-. 80 A1 00 84 83 21 00 64 83 41 00 68 7C A8 03 A6 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C 38 21 00 80 4E 80 00 20
-
-==== BB 459 (0x254755A4) approx BBs exec'd 0 ====
-
- 0x254755A4: 2F830000 cmpi cr7,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x254755A8: 935F00A0 stw r26,160(r31)
- 4: GETL R26, t4
- 5: GETL R31, t6
- 6: ADDL $0xA0, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0x254755AC: 419C082C bc 12,28,0x25475DD8
- 9: Js28o $0x25475DD8
-
-
-. 0 254755A4 12
-. 2F 83 00 00 93 5F 00 A0 41 9C 08 2C
-
-==== BB 460 (0x254755B0) approx BBs exec'd 0 ====
-
- 0x254755B0: 1CBB0018 mulli r5,r27,24
- 0: GETL R27, t0
- 1: MULL $0x18, t0
- 2: PUTL t0, R5
- 3: INCEIPL $4
-
- 0x254755B4: 809E04C8 lwz r4,1224(r30)
- 4: GETL R30, t2
- 5: ADDL $0x4C8, t2
- 6: LDL (t2), t4
- 7: PUTL t4, R4
- 8: INCEIPL $4
-
- 0x254755B8: 7FA5202E lwzx r29,r5,r4
- 9: GETL R4, t6
- 10: GETL R5, t8
- 11: ADDL t8, t6
- 12: LDL (t6), t10
- 13: PUTL t10, R29
- 14: INCEIPL $4
-
- 0x254755BC: 2C1D0000 cmpi cr0,r29,0
- 15: GETL R29, t12
- 16: CMP0L t12, t14 (-rSo)
- 17: ICRFL t14, $0x0, CR
- 18: INCEIPL $4
-
- 0x254755C0: 41820148 bc 12,2,0x25475708
- 19: Js02o $0x25475708
-
-
-. 0 254755B0 20
-. 1C BB 00 18 80 9E 04 C8 7F A5 20 2E 2C 1D 00 00 41 82 01 48
-
-==== BB 461 (0x254755C4) approx BBs exec'd 0 ====
-
- 0x254755C4: 817F0030 lwz r11,48(r31)
- 0: GETL R31, t0
- 1: ADDL $0x30, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x254755C8: 3B400000 li r26,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R26
- 7: INCEIPL $4
-
- 0x254755CC: 48000010 b 0x254755DC
- 8: JMPo $0x254755DC ($4)
-
-
-. 0 254755C4 12
-. 81 7F 00 30 3B 40 00 00 48 00 00 10
-
-==== BB 462 (0x254755DC) approx BBs exec'd 0 ====
-
- 0x254755DC: 80DD01D8 lwz r6,472(r29)
- 0: GETL R29, t0
- 1: ADDL $0x1D8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x254755E0: 7C865800 cmp cr1,r6,r11
- 5: GETL R6, t4
- 6: GETL R11, t6
- 7: CMPL t4, t6, t8 (-rSo)
- 8: ICRFL t8, $0x1, CR
- 9: INCEIPL $4
-
- 0x254755E4: 4086FFEC bc 4,6,0x254755D0
- 10: Jc06o $0x254755D0
-
-
-. 0 254755DC 12
-. 80 DD 01 D8 7C 86 58 00 40 86 FF EC
-
-==== BB 463 (0x254755E8) approx BBs exec'd 0 ====
-
- 0x254755E8: 811D01DC lwz r8,476(r29)
- 0: GETL R29, t0
- 1: ADDL $0x1DC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x254755EC: 80FF0034 lwz r7,52(r31)
- 5: GETL R31, t4
- 6: ADDL $0x34, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R7
- 9: INCEIPL $4
-
- 0x254755F0: 7E083800 cmp cr4,r8,r7
- 10: GETL R8, t8
- 11: GETL R7, t10
- 12: CMPL t8, t10, t12 (-rSo)
- 13: ICRFL t12, $0x4, CR
- 14: INCEIPL $4
-
- 0x254755F4: 4092FFDC bc 4,18,0x254755D0
- 15: Jc18o $0x254755D0
-
-
-. 0 254755E8 16
-. 81 1D 01 DC 80 FF 00 34 7E 08 38 00 40 92 FF DC
-
-==== BB 464 (0x254755D0) approx BBs exec'd 0 ====
-
- 0x254755D0: 83BD000C lwz r29,12(r29)
- 0: GETL R29, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x254755D4: 2E1D0000 cmpi cr4,r29,0
- 5: GETL R29, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x4, CR
- 8: INCEIPL $4
-
- 0x254755D8: 41920130 bc 12,18,0x25475708
- 9: Js18o $0x25475708
-
-
-. 0 254755D0 12
-. 83 BD 00 0C 2E 1D 00 00 41 92 01 30
-
-==== BB 465 (0x25475708) approx BBs exec'd 0 ====
-
- 0x25475708: 2F1B0000 cmpi cr6,r27,0
- 0: GETL R27, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x2547570C: 409A06E0 bc 4,26,0x25475DEC
- 4: Jc26o $0x25475DEC
-
-
-. 0 25475708 8
-. 2F 1B 00 00 40 9A 06 E0
-
-==== BB 466 (0x25475710) approx BBs exec'd 0 ====
-
- 0x25475710: 72C00004 andi. r0,r22,0x4
- 0: GETL R22, t0
- 1: ANDL $0x4, t0
- 2: PUTL t0, R0
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x25475714: 38600000 li r3,0
- 6: MOVL $0x0, t4
- 7: PUTL t4, R3
- 8: INCEIPL $4
-
- 0x25475718: 40A2FF8C bc 5,2,0x254756A4
- 9: Jc02o $0x254756A4
-
-
-. 0 25475710 12
-. 72 C0 00 04 38 60 00 00 40 A2 FF 8C
-
-==== BB 467 (0x2547571C) approx BBs exec'd 0 ====
-
- 0x2547571C: 823E04F4 lwz r17,1268(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4F4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R17
- 4: INCEIPL $4
-
- 0x25475720: 80910000 lwz r4,0(r17)
- 5: GETL R17, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R4
- 8: INCEIPL $4
-
- 0x25475724: 70890040 andi. r9,r4,0x40
- 9: GETL R4, t8
- 10: ANDL $0x40, t8
- 11: PUTL t8, R9
- 12: CMP0L t8, t10 (-rSo)
- 13: ICRFL t10, $0x0, CR
- 14: INCEIPL $4
-
- 0x25475728: 40820738 bc 4,2,0x25475E60
- 15: Jc02o $0x25475E60
-
-
-. 0 2547571C 16
-. 82 3E 04 F4 80 91 00 00 70 89 00 40 40 82 07 38
-
-==== BB 468 (0x2547572C) approx BBs exec'd 0 ====
-
- 0x2547572C: 7F25CB78 or r5,r25,r25
- 0: GETL R25, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x25475730: 7F68DB78 or r8,r27,r27
- 3: GETL R27, t2
- 4: PUTL t2, R8
- 5: INCEIPL $4
-
- 0x25475734: 7E038378 or r3,r16,r16
- 6: GETL R16, t4
- 7: PUTL t4, R3
- 8: INCEIPL $4
-
- 0x25475738: 7E84A378 or r4,r20,r20
- 9: GETL R20, t6
- 10: PUTL t6, R4
- 11: INCEIPL $4
-
- 0x2547573C: 7EE6BB78 or r6,r23,r23
- 12: GETL R23, t8
- 13: PUTL t8, R6
- 14: INCEIPL $4
-
- 0x25475740: 7EC7B378 or r7,r22,r22
- 15: GETL R22, t10
- 16: PUTL t10, R7
- 17: INCEIPL $4
-
- 0x25475744: 480039B1 bl 0x254790F4
- 18: MOVL $0x25475748, t12
- 19: PUTL t12, LR
- 20: JMPo-c $0x254790F4 ($4)
-
-
-. 0 2547572C 28
-. 7F 25 CB 78 7F 68 DB 78 7E 03 83 78 7E 84 A3 78 7E E6 BB 78 7E C7 B3 78 48 00 39 B1
-
-==== BB 469 (0x25479318) approx BBs exec'd 0 ====
-
- 0x25479318: 7D695B78 or r9,r11,r11
- 0: GETL R11, t0
- 1: PUTL t0, R9
- 2: INCEIPL $4
-
- 0x2547931C: 48000008 b 0x25479324
- 3: JMPo $0x25479324 ($4)
-
-
-. 0 25479318 8
-. 7D 69 5B 78 48 00 00 08
-
-==== BB 470 (0x25479324) approx BBs exec'd 0 ====
-
- 0x25479324: 8009000C lwz r0,12(r9)
- 0: GETL R9, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25479328: 2C800000 cmpi cr1,r0,0
- 5: GETL R0, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x2547932C: 4086FFF4 bc 4,6,0x25479320
- 9: Jc06o $0x25479320
-
-
-. 0 25479324 12
-. 80 09 00 0C 2C 80 00 00 40 86 FF F4
-
-==== BB 471 (0x25479320) approx BBs exec'd 0 ====
-
- 0x25479320: 7C090378 or r9,r0,r0
- 0: GETL R0, t0
- 1: PUTL t0, R9
- 2: INCEIPL $4
-
- 0x25479324: 8009000C lwz r0,12(r9)
- 3: GETL R9, t2
- 4: ADDL $0xC, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R0
- 7: INCEIPL $4
-
- 0x25479328: 2C800000 cmpi cr1,r0,0
- 8: GETL R0, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x1, CR
- 11: INCEIPL $4
-
- 0x2547932C: 4086FFF4 bc 4,6,0x25479320
- 12: Jc06o $0x25479320
-
-
-. 0 25479320 16
-. 7C 09 03 78 80 09 00 0C 2C 80 00 00 40 86 FF F4
-
-==== BB 472 (0x25479330) approx BBs exec'd 0 ====
-
- 0x25479330: 93E9000C stw r31,12(r9)
- 0: GETL R31, t0
- 1: GETL R9, t2
- 2: ADDL $0xC, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25479334: 2F1C0000 cmpi cr6,r28,0
- 5: GETL R28, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x25479338: 913F0010 stw r9,16(r31)
- 9: GETL R9, t8
- 10: GETL R31, t10
- 11: ADDL $0x10, t10
- 12: STL t8, (t10)
- 13: INCEIPL $4
-
- 0x2547933C: 38800001 li r4,1
- 14: MOVL $0x1, t12
- 15: PUTL t12, R4
- 16: INCEIPL $4
-
- 0x25479340: 7D0A282E lwzx r8,r10,r5
- 17: GETL R5, t14
- 18: GETL R10, t16
- 19: ADDL t16, t14
- 20: LDL (t14), t18
- 21: PUTL t18, R8
- 22: INCEIPL $4
-
- 0x25479344: 7D4A2A14 add r10,r10,r5
- 23: GETL R10, t20
- 24: GETL R5, t22
- 25: ADDL t20, t22
- 26: PUTL t22, R10
- 27: INCEIPL $4
-
- 0x25479348: 832A0004 lwz r25,4(r10)
- 28: GETL R10, t24
- 29: ADDL $0x4, t24
- 30: LDL (t24), t26
- 31: PUTL t26, R25
- 32: INCEIPL $4
-
- 0x2547934C: 81650198 lwz r11,408(r5)
- 33: GETL R5, t28
- 34: ADDL $0x198, t28
- 35: LDL (t28), t30
- 36: PUTL t30, R11
- 37: INCEIPL $4
-
- 0x25479350: 38E80158 addi r7,r8,344
- 38: GETL R8, t32
- 39: ADDL $0x158, t32
- 40: PUTL t32, R7
- 41: INCEIPL $4
-
- 0x25479354: 8185019C lwz r12,412(r5)
- 42: GETL R5, t34
- 43: ADDL $0x19C, t34
- 44: LDL (t34), t36
- 45: PUTL t36, R12
- 46: INCEIPL $4
-
- 0x25479358: 3B190001 addi r24,r25,1
- 47: GETL R25, t38
- 48: ADDL $0x1, t38
- 49: PUTL t38, R24
- 50: INCEIPL $4
-
- 0x2547935C: 90E60000 stw r7,0(r6)
- 51: GETL R7, t40
- 52: GETL R6, t42
- 53: STL t40, (t42)
- 54: INCEIPL $4
-
- 0x25479360: 310C0001 addic r8,r12,1
- 55: GETL R12, t44
- 56: ADCL $0x1, t44 (-wCa)
- 57: PUTL t44, R8
- 58: INCEIPL $4
-
- 0x25479364: 7CEB0194 addze r7,r11
- 59: GETL R11, t46
- 60: ADCL $0x0, t46 (-rCa-wCa)
- 61: PUTL t46, R7
- 62: INCEIPL $4
-
- 0x25479368: 930A0004 stw r24,4(r10)
- 63: GETL R24, t48
- 64: GETL R10, t50
- 65: ADDL $0x4, t50
- 66: STL t48, (t50)
- 67: INCEIPL $4
-
- 0x2547936C: 90E50198 stw r7,408(r5)
- 68: GETL R7, t52
- 69: GETL R5, t54
- 70: ADDL $0x198, t54
- 71: STL t52, (t54)
- 72: INCEIPL $4
-
- 0x25479370: 9105019C stw r8,412(r5)
- 73: GETL R8, t56
- 74: GETL R5, t58
- 75: ADDL $0x19C, t58
- 76: STL t56, (t58)
- 77: INCEIPL $4
-
- 0x25479374: 409AFEA8 bc 4,26,0x2547921C
- 78: Jc26o $0x2547921C
-
-
-. 0 25479330 72
-. 93 E9 00 0C 2F 1C 00 00 91 3F 00 10 38 80 00 01 7D 0A 28 2E 7D 4A 2A 14 83 2A 00 04 81 65 01 98 38 E8 01 58 81 85 01 9C 3B 19 00 01 90 E6 00 00 31 0C 00 01 7C EB 01 94 93 0A 00 04 90 E5 01 98 91 05 01 9C 40 9A FE A8
-
-==== BB 473 (0x2547921C) approx BBs exec'd 0 ====
-
- 0x2547921C: 801C0168 lwz r0,360(r28)
- 0: GETL R28, t0
- 1: ADDL $0x168, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25479220: 2C000000 cmpi cr0,r0,0
- 5: GETL R0, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x25479224: 4082FFF4 bc 4,2,0x25479218
- 9: Jc02o $0x25479218
-
-
-. 0 2547921C 12
-. 80 1C 01 68 2C 00 00 00 40 82 FF F4
-
-==== BB 474 (0x25479234) approx BBs exec'd 0 ====
-
- 0x25479234: 81660000 lwz r11,0(r6)
- 0: GETL R6, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R11
- 3: INCEIPL $4
-
- 0x25479238: 7C895800 cmp cr1,r9,r11
- 4: GETL R9, t4
- 5: GETL R11, t6
- 6: CMPL t4, t6, t8 (-rSo)
- 7: ICRFL t8, $0x1, CR
- 8: INCEIPL $4
-
- 0x2547923C: 41860024 bc 12,6,0x25479260
- 9: Js06o $0x25479260
-
-
-. 0 25479234 12
-. 81 66 00 00 7C 89 58 00 41 86 00 24
-
-==== BB 475 (0x25479260) approx BBs exec'd 0 ====
-
- 0x25479260: 3B7F0158 addi r27,r31,344
- 0: GETL R31, t0
- 1: ADDL $0x158, t0
- 2: PUTL t0, R27
- 3: INCEIPL $4
-
- 0x25479264: 937F01C4 stw r27,452(r31)
- 4: GETL R27, t2
- 5: GETL R31, t4
- 6: ADDL $0x1C4, t4
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0x25479268: 8BB70000 lbz r29,0(r23)
- 9: GETL R23, t6
- 10: LDB (t6), t8
- 11: PUTL t8, R29
- 12: INCEIPL $4
-
- 0x2547926C: 2F1D0000 cmpi cr6,r29,0
- 13: GETL R29, t10
- 14: CMP0L t10, t12 (-rSo)
- 15: ICRFL t12, $0x6, CR
- 16: INCEIPL $4
-
- 0x25479270: 419A006C bc 12,26,0x254792DC
- 17: Js26o $0x254792DC
-
-
-. 0 25479260 20
-. 3B 7F 01 58 93 7F 01 C4 8B B7 00 00 2F 1D 00 00 41 9A 00 6C
-
-==== BB 476 (0x25479274) approx BBs exec'd 0 ====
-
- 0x25479274: 7EE3BB78 or r3,r23,r23
- 0: GETL R23, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25479278: 3B800000 li r28,0
- 3: MOVL $0x0, t2
- 4: PUTL t2, R28
- 5: INCEIPL $4
-
- 0x2547927C: 48009D55 bl 0x25482FD0
- 6: MOVL $0x25479280, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0x25482FD0 ($4)
-
-
-. 0 25479274 12
-. 7E E3 BB 78 3B 80 00 00 48 00 9D 55
-
-==== BB 477 (0x25479280) approx BBs exec'd 0 ====
-
- 0x25479280: 2F9D002F cmpi cr7,r29,47
- 0: GETL R29, t0
- 1: MOVL $0x2F, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0x25479284: 3B630001 addi r27,r3,1
- 5: GETL R3, t6
- 6: ADDL $0x1, t6
- 7: PUTL t6, R27
- 8: INCEIPL $4
-
- 0x25479288: 835E0514 lwz r26,1300(r30)
- 9: GETL R30, t8
- 10: ADDL $0x514, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R26
- 13: INCEIPL $4
-
- 0x2547928C: 7F7DDB78 or r29,r27,r27
- 14: GETL R27, t12
- 15: PUTL t12, R29
- 16: INCEIPL $4
-
- 0x25479290: 419E0154 bc 12,30,0x254793E4
- 17: Js30o $0x254793E4
-
-
-. 0 25479280 20
-. 2F 9D 00 2F 3B 63 00 01 83 5E 05 14 7F 7D DB 78 41 9E 01 54
-
-==== BB 478 (0x254793E4) approx BBs exec'd 0 ====
-
- 0x254793E4: 7F63DB78 or r3,r27,r27
- 0: GETL R27, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x254793E8: 4801E63D bl 0x25497A24
- 3: MOVL $0x254793EC, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x25497A24 ($4)
-
-
-. 0 254793E4 8
-. 7F 63 DB 78 48 01 E6 3D
-
-==== BB 479 (0x254793EC) approx BBs exec'd 0 ====
-
- 0x254793EC: 2C830000 cmpi cr1,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x254793F0: 7C7C1B78 or r28,r3,r3
- 4: GETL R3, t4
- 5: PUTL t4, R28
- 6: INCEIPL $4
-
- 0x254793F4: 4086FFB0 bc 4,6,0x254793A4
- 7: Jc06o $0x254793A4
-
-
-. 0 254793EC 12
-. 2C 83 00 00 7C 7C 1B 78 40 86 FF B0
-
-==== BB 480 (0x254793A4) approx BBs exec'd 0 ====
-
- 0x254793A4: 7EE4BB78 or r4,r23,r23
- 0: GETL R23, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x254793A8: 7F65DB78 or r5,r27,r27
- 3: GETL R27, t2
- 4: PUTL t2, R5
- 5: INCEIPL $4
-
- 0x254793AC: 4800A675 bl 0x25483A20
- 6: MOVL $0x254793B0, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0x25483A20 ($4)
-
-
-. 0 254793A4 12
-. 7E E4 BB 78 7F 65 DB 78 48 00 A6 75
-
-==== BB 481 (0x254793B0) approx BBs exec'd 0 ====
-
- 0x254793B0: 8EE3FFFF lbzu r23,-1(r3)
- 0: GETL R3, t0
- 1: ADDL $0xFFFFFFFF, t0
- 2: PUTL t0, R3
- 3: LDB (t0), t2
- 4: PUTL t2, R23
- 5: INCEIPL $4
-
- 0x254793B4: 2C17002F cmpi cr0,r23,47
- 6: GETL R23, t4
- 7: MOVL $0x2F, t8
- 8: CMPL t4, t8, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x254793B8: 4082FFF8 bc 4,2,0x254793B0
- 11: Jc02o $0x254793B0
-
-
-. 0 254793B0 12
-. 8E E3 FF FF 2C 17 00 2F 40 82 FF F8
-
-==== BB 482 (0x254793BC) approx BBs exec'd 0 ====
-
- 0x254793BC: 7F03E000 cmp cr6,r3,r28
- 0: GETL R3, t0
- 1: GETL R28, t2
- 2: CMPL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x6, CR
- 4: INCEIPL $4
-
- 0x254793C0: 419A0014 bc 12,26,0x254793D4
- 5: Js26o $0x254793D4
-
-
-. 0 254793BC 8
-. 7F 03 E0 00 41 9A 00 14
-
-==== BB 483 (0x254793C4) approx BBs exec'd 0 ====
-
- 0x254793C4: 38C00000 li r6,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R6
- 2: INCEIPL $4
-
- 0x254793C8: 98C30000 stb r6,0(r3)
- 3: GETL R6, t2
- 4: GETL R3, t4
- 5: STB t2, (t4)
- 6: INCEIPL $4
-
- 0x254793CC: 939F019C stw r28,412(r31)
- 7: GETL R28, t6
- 8: GETL R31, t8
- 9: ADDL $0x19C, t8
- 10: STL t6, (t8)
- 11: INCEIPL $4
-
- 0x254793D0: 4BFFFF0C b 0x254792DC
- 12: JMPo $0x254792DC ($4)
-
-
-. 0 254793C4 16
-. 38 C0 00 00 98 C3 00 00 93 9F 01 9C 4B FF FF 0C
-
-==== BB 484 (0x25475748) approx BBs exec'd 0 ====
-
- 0x25475748: 3B1C0004 addi r24,r28,4
- 0: GETL R28, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R24
- 3: INCEIPL $4
-
- 0x2547574C: 7C7A1B79 or. r26,r3,r3
- 4: GETL R3, t2
- 5: PUTL t2, R26
- 6: CMP0L t2, t4 (-rSo)
- 7: ICRFL t4, $0x0, CR
- 8: INCEIPL $4
-
- 0x25475750: 41820708 bc 12,2,0x25475E58
- 9: Js02o $0x25475E58
-
-
-. 0 25475748 12
-. 3B 1C 00 04 7C 7A 1B 79 41 82 07 08
-
-==== BB 485 (0x25475754) approx BBs exec'd 0 ====
-
- 0x25475754: A1F8002C lhz r15,44(r24)
- 0: GETL R24, t0
- 1: ADDL $0x2C, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R15
- 4: INCEIPL $4
-
- 0x25475758: 81D80018 lwz r14,24(r24)
- 5: GETL R24, t4
- 6: ADDL $0x18, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R14
- 9: INCEIPL $4
-
- 0x2547575C: A1580010 lhz r10,16(r24)
- 10: GETL R24, t8
- 11: ADDL $0x10, t8
- 12: LDW (t8), t10
- 13: PUTL t10, R10
- 14: INCEIPL $4
-
- 0x25475760: B1FA0154 sth r15,340(r26)
- 15: GETL R15, t12
- 16: GETL R26, t14
- 17: ADDL $0x154, t14
- 18: STW t12, (t14)
- 19: INCEIPL $4
-
- 0x25475764: 91DA0150 stw r14,336(r26)
- 20: GETL R14, t16
- 21: GETL R26, t18
- 22: ADDL $0x150, t18
- 23: STL t16, (t18)
- 24: INCEIPL $4
-
- 0x25475768: A118002C lhz r8,44(r24)
- 25: GETL R24, t20
- 26: ADDL $0x2C, t20
- 27: LDW (t20), t22
- 28: PUTL t22, R8
- 29: INCEIPL $4
-
- 0x2547576C: 8378001C lwz r27,28(r24)
- 30: GETL R24, t24
- 31: ADDL $0x1C, t24
- 32: LDL (t24), t26
- 33: PUTL t26, R27
- 34: INCEIPL $4
-
- 0x25475770: 551D2834 rlwinm r29,r8,5,0,26
- 35: GETL R8, t28
- 36: SHLL $0x5, t28
- 37: PUTL t28, R29
- 38: INCEIPL $4
-
- 0x25475774: 80DC0000 lwz r6,0(r28)
- 39: GETL R28, t30
- 40: LDL (t30), t32
- 41: PUTL t32, R6
- 42: INCEIPL $4
-
- 0x25475778: 7CFBEA14 add r7,r27,r29
- 43: GETL R27, t34
- 44: GETL R29, t36
- 45: ADDL t34, t36
- 46: PUTL t36, R7
- 47: INCEIPL $4
-
- 0x2547577C: 7F3BE214 add r25,r27,r28
- 48: GETL R27, t38
- 49: GETL R28, t40
- 50: ADDL t38, t40
- 51: PUTL t40, R25
- 52: INCEIPL $4
-
- 0x25475780: 7F873040 cmpl cr7,r7,r6
- 53: GETL R7, t42
- 54: GETL R6, t44
- 55: CMPUL t42, t44, t46 (-rSo)
- 56: ICRFL t46, $0x7, CR
- 57: INCEIPL $4
-
- 0x25475784: 915F009C stw r10,156(r31)
- 58: GETL R10, t48
- 59: GETL R31, t50
- 60: ADDL $0x9C, t50
- 61: STL t48, (t50)
- 62: INCEIPL $4
-
- 0x25475788: 3B790004 addi r27,r25,4
- 63: GETL R25, t52
- 64: ADDL $0x4, t52
- 65: PUTL t52, R27
- 66: INCEIPL $4
-
- 0x2547578C: 419D0438 bc 12,29,0x25475BC4
- 67: Js29o $0x25475BC4
-
-
-. 0 25475754 60
-. A1 F8 00 2C 81 D8 00 18 A1 58 00 10 B1 FA 01 54 91 DA 01 50 A1 18 00 2C 83 78 00 1C 55 1D 28 34 80 DC 00 00 7C FB EA 14 7F 3B E2 14 7F 87 30 40 91 5F 00 9C 3B 79 00 04 41 9D 04 38
-
-==== BB 486 (0x25475790) approx BBs exec'd 0 ====
-
- 0x25475790: A11A0154 lhz r8,340(r26)
- 0: GETL R26, t0
- 1: ADDL $0x154, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x25475794: 7C320B78 or r18,r1,r1
- 5: GETL R1, t4
- 6: PUTL t4, R18
- 7: INCEIPL $4
-
- 0x25475798: 80810000 lwz r4,0(r1)
- 8: GETL R1, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R4
- 11: INCEIPL $4
-
- 0x2547579C: 3BA00007 li r29,7
- 12: MOVL $0x7, t10
- 13: PUTL t10, R29
- 14: INCEIPL $4
-
- 0x254757A0: 1CE80018 mulli r7,r8,24
- 15: GETL R8, t12
- 16: MULL $0x18, t12
- 17: PUTL t12, R7
- 18: INCEIPL $4
-
- 0x254757A4: 3B800000 li r28,0
- 19: MOVL $0x0, t14
- 20: PUTL t14, R28
- 21: INCEIPL $4
-
- 0x254757A8: 38C7001E addi r6,r7,30
- 22: GETL R7, t16
- 23: ADDL $0x1E, t16
- 24: PUTL t16, R6
- 25: INCEIPL $4
-
- 0x254757AC: 54D902B6 rlwinm r25,r6,0,10,27
- 26: GETL R6, t18
- 27: ANDL $0x3FFFF0, t18
- 28: PUTL t18, R25
- 29: INCEIPL $4
-
- 0x254757B0: 7CB900D0 neg r5,r25
- 30: GETL R25, t20
- 31: NEGL t20
- 32: PUTL t20, R5
- 33: INCEIPL $4
-
- 0x254757B4: 7C81296E stwux r4,r1,r5
- 34: GETL R5, t22
- 35: GETL R1, t24
- 36: ADDL t24, t22
- 37: PUTL t22, R1
- 38: GETL R4, t26
- 39: STL t26, (t22)
- 40: INCEIPL $4
-
- 0x254757B8: A0FA0154 lhz r7,340(r26)
- 41: GETL R26, t28
- 42: ADDL $0x154, t28
- 43: LDW (t28), t30
- 44: PUTL t30, R7
- 45: INCEIPL $4
-
- 0x254757BC: 3861002F addi r3,r1,47
- 46: GETL R1, t32
- 47: ADDL $0x2F, t32
- 48: PUTL t32, R3
- 49: INCEIPL $4
-
- 0x254757C0: 93BF00A4 stw r29,164(r31)
- 50: GETL R29, t34
- 51: GETL R31, t36
- 52: ADDL $0xA4, t36
- 53: STL t34, (t36)
- 54: INCEIPL $4
-
- 0x254757C4: 54750036 rlwinm r21,r3,0,0,27
- 55: GETL R3, t38
- 56: ANDL $0xFFFFFFF0, t38
- 57: PUTL t38, R21
- 58: INCEIPL $4
-
- 0x254757C8: 54E92834 rlwinm r9,r7,5,0,26
- 59: GETL R7, t40
- 60: SHLL $0x5, t40
- 61: PUTL t40, R9
- 62: INCEIPL $4
-
- 0x254757CC: 939F00A8 stw r28,168(r31)
- 63: GETL R28, t42
- 64: GETL R31, t44
- 65: ADDL $0xA8, t44
- 66: STL t42, (t44)
- 67: INCEIPL $4
-
- 0x254757D0: 7C09DA14 add r0,r9,r27
- 68: GETL R9, t46
- 69: GETL R27, t48
- 70: ADDL t46, t48
- 71: PUTL t48, R0
- 72: INCEIPL $4
-
- 0x254757D4: 7F7DDB78 or r29,r27,r27
- 73: GETL R27, t50
- 74: PUTL t50, R29
- 75: INCEIPL $4
-
- 0x254757D8: 7E00D840 cmpl cr4,r0,r27
- 76: GETL R0, t52
- 77: GETL R27, t54
- 78: CMPUL t52, t54, t56 (-rSo)
- 79: ICRFL t56, $0x4, CR
- 80: INCEIPL $4
-
- 0x254757DC: 409103A8 bc 4,17,0x25475B84
- 81: Jc17o $0x25475B84
-
-
-. 0 25475790 80
-. A1 1A 01 54 7C 32 0B 78 80 81 00 00 3B A0 00 07 1C E8 00 18 3B 80 00 00 38 C7 00 1E 54 D9 02 B6 7C B9 00 D0 7C 81 29 6E A0 FA 01 54 38 61 00 2F 93 BF 00 A4 54 75 00 36 54 E9 28 34 93 9F 00 A8 7C 09 DA 14 7F 7D DB 78 7E 00 D8 40 40 91 03 A8
-
-==== BB 487 (0x254757E0) approx BBs exec'd 0 ====
-
- 0x254757E0: 3B200000 li r25,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R25
- 2: INCEIPL $4
-
- 0x254757E4: 48000028 b 0x2547580C
- 3: JMPo $0x2547580C ($4)
-
-
-. 0 254757E0 8
-. 3B 20 00 00 48 00 00 28
-
-==== BB 488 (0x2547580C) approx BBs exec'd 0 ====
-
- 0x2547580C: 813D0000 lwz r9,0(r29)
- 0: GETL R29, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0x25475810: 2F090006 cmpi cr6,r9,6
- 4: GETL R9, t4
- 5: MOVL $0x6, t8
- 6: CMPL t4, t8, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x25475814: 419A0094 bc 12,26,0x254758A8
- 9: Js26o $0x254758A8
-
-
-. 0 2547580C 12
-. 81 3D 00 00 2F 09 00 06 41 9A 00 94
-
-==== BB 489 (0x25475818) approx BBs exec'd 0 ====
-
- 0x25475818: 28090006 cmpli cr0,r9,6
- 0: GETL R9, t0
- 1: MOVL $0x6, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x2547581C: 40A1FFCC bc 5,1,0x254757E8
- 5: Jc01o $0x254757E8
-
-
-. 0 25475818 8
-. 28 09 00 06 40 A1 FF CC
-
-==== BB 490 (0x254757E8) approx BBs exec'd 0 ====
-
- 0x254757E8: 2F890001 cmpi cr7,r9,1
- 0: GETL R9, t0
- 1: MOVL $0x1, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0x254757EC: 419E02C4 bc 12,30,0x25475AB0
- 5: Js30o $0x25475AB0
-
-
-. 0 254757E8 8
-. 2F 89 00 01 41 9E 02 C4
-
-==== BB 491 (0x25475AB0) approx BBs exec'd 0 ====
-
- 0x25475AB0: 81310004 lwz r9,4(r17)
- 0: GETL R17, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25475AB4: 817D001C lwz r11,28(r29)
- 5: GETL R29, t4
- 6: ADDL $0x1C, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R11
- 9: INCEIPL $4
-
- 0x25475AB8: 3909FFFF addi r8,r9,-1
- 10: GETL R9, t8
- 11: ADDL $0xFFFFFFFF, t8
- 12: PUTL t8, R8
- 13: INCEIPL $4
-
- 0x25475ABC: 7D694039 and. r9,r11,r8
- 14: GETL R11, t10
- 15: GETL R8, t12
- 16: ANDL t10, t12
- 17: PUTL t12, R9
- 18: CMP0L t12, t14 (-rSo)
- 19: ICRFL t14, $0x0, CR
- 20: INCEIPL $4
-
- 0x25475AC0: 4082062C bc 4,2,0x254760EC
- 21: Jc02o $0x254760EC
-
-
-. 0 25475AB0 20
-. 81 31 00 04 81 7D 00 1C 39 09 FF FF 7D 69 40 39 40 82 06 2C
-
-==== BB 492 (0x25475AC4) approx BBs exec'd 0 ====
-
- 0x25475AC4: 815D0008 lwz r10,8(r29)
- 0: GETL R29, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x25475AC8: 38ABFFFF addi r5,r11,-1
- 5: GETL R11, t4
- 6: ADDL $0xFFFFFFFF, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x25475ACC: 80DD0004 lwz r6,4(r29)
- 9: GETL R29, t6
- 10: ADDL $0x4, t6
- 11: LDL (t6), t8
- 12: PUTL t8, R6
- 13: INCEIPL $4
-
- 0x25475AD0: 7C865050 subf r4,r6,r10
- 14: GETL R6, t10
- 15: GETL R10, t12
- 16: SUBL t10, t12
- 17: PUTL t12, R4
- 18: INCEIPL $4
-
- 0x25475AD4: 7C8B2839 and. r11,r4,r5
- 19: GETL R4, t14
- 20: GETL R5, t16
- 21: ANDL t14, t16
- 22: PUTL t16, R11
- 23: CMP0L t16, t18 (-rSo)
- 24: ICRFL t18, $0x0, CR
- 25: INCEIPL $4
-
- 0x25475AD8: 40820650 bc 4,2,0x25476128
- 26: Jc02o $0x25476128
-
-
-. 0 25475AC4 24
-. 81 5D 00 08 38 AB FF FF 80 DD 00 04 7C 86 50 50 7C 8B 28 39 40 82 06 50
-
-==== BB 493 (0x25475ADC) approx BBs exec'd 0 ====
-
- 0x25475ADC: 7D4A4078 andc r10,r10,r8
- 0: GETL R10, t0
- 1: GETL R8, t2
- 2: NOTL t2
- 3: ANDL t0, t2
- 4: PUTL t2, R10
- 5: INCEIPL $4
-
- 0x25475AE0: 3B9C0001 addi r28,r28,1
- 6: GETL R28, t4
- 7: ADDL $0x1, t4
- 8: PUTL t4, R28
- 9: INCEIPL $4
-
- 0x25475AE4: 7D55C92E stwx r10,r21,r25
- 10: GETL R25, t6
- 11: GETL R21, t8
- 12: ADDL t8, t6
- 13: GETL R10, t10
- 14: STL t10, (t6)
- 15: INCEIPL $4
-
- 0x25475AE8: 289C0001 cmpli cr1,r28,1
- 16: GETL R28, t12
- 17: MOVL $0x1, t16
- 18: CMPUL t12, t16, t14 (-rSo)
- 19: ICRFL t14, $0x1, CR
- 20: INCEIPL $4
-
- 0x25475AEC: 813D0008 lwz r9,8(r29)
- 21: GETL R29, t18
- 22: ADDL $0x8, t18
- 23: LDL (t18), t20
- 24: PUTL t20, R9
- 25: INCEIPL $4
-
- 0x25475AF0: 801D0010 lwz r0,16(r29)
- 26: GETL R29, t22
- 27: ADDL $0x10, t22
- 28: LDL (t22), t24
- 29: PUTL t24, R0
- 30: INCEIPL $4
-
- 0x25475AF4: 81F10004 lwz r15,4(r17)
- 31: GETL R17, t26
- 32: ADDL $0x4, t26
- 33: LDL (t26), t28
- 34: PUTL t28, R15
- 35: INCEIPL $4
-
- 0x25475AF8: 7C690214 add r3,r9,r0
- 36: GETL R9, t30
- 37: GETL R0, t32
- 38: ADDL t30, t32
- 39: PUTL t32, R3
- 40: INCEIPL $4
-
- 0x25475AFC: 7D837A14 add r12,r3,r15
- 41: GETL R3, t34
- 42: GETL R15, t36
- 43: ADDL t34, t36
- 44: PUTL t36, R12
- 45: INCEIPL $4
-
- 0x25475B00: 7DCF00D0 neg r14,r15
- 46: GETL R15, t38
- 47: NEGL t38
- 48: PUTL t38, R14
- 49: INCEIPL $4
-
- 0x25475B04: 396CFFFF addi r11,r12,-1
- 50: GETL R12, t40
- 51: ADDL $0xFFFFFFFF, t40
- 52: PUTL t40, R11
- 53: INCEIPL $4
-
- 0x25475B08: 7D687038 and r8,r11,r14
- 54: GETL R11, t42
- 55: GETL R14, t44
- 56: ANDL t42, t44
- 57: PUTL t44, R8
- 58: INCEIPL $4
-
- 0x25475B0C: 7D75CA14 add r11,r21,r25
- 59: GETL R21, t46
- 60: GETL R25, t48
- 61: ADDL t46, t48
- 62: PUTL t48, R11
- 63: INCEIPL $4
-
- 0x25475B10: 910B0004 stw r8,4(r11)
- 64: GETL R8, t50
- 65: GETL R11, t52
- 66: ADDL $0x4, t52
- 67: STL t50, (t52)
- 68: INCEIPL $4
-
- 0x25475B14: 3B390018 addi r25,r25,24
- 69: GETL R25, t54
- 70: ADDL $0x18, t54
- 71: PUTL t54, R25
- 72: INCEIPL $4
-
- 0x25475B18: 809D0008 lwz r4,8(r29)
- 73: GETL R29, t56
- 74: ADDL $0x8, t56
- 75: LDL (t56), t58
- 76: PUTL t58, R4
- 77: INCEIPL $4
-
- 0x25475B1C: 80DD0010 lwz r6,16(r29)
- 78: GETL R29, t60
- 79: ADDL $0x10, t60
- 80: LDL (t60), t62
- 81: PUTL t62, R6
- 82: INCEIPL $4
-
- 0x25475B20: 7CA43214 add r5,r4,r6
- 83: GETL R4, t64
- 84: GETL R6, t66
- 85: ADDL t64, t66
- 86: PUTL t66, R5
- 87: INCEIPL $4
-
- 0x25475B24: 90AB0008 stw r5,8(r11)
- 88: GETL R5, t68
- 89: GETL R11, t70
- 90: ADDL $0x8, t70
- 91: STL t68, (t70)
- 92: INCEIPL $4
-
- 0x25475B28: 813D0008 lwz r9,8(r29)
- 93: GETL R29, t72
- 94: ADDL $0x8, t72
- 95: LDL (t72), t74
- 96: PUTL t74, R9
- 97: INCEIPL $4
-
- 0x25475B2C: 801D0014 lwz r0,20(r29)
- 98: GETL R29, t76
- 99: ADDL $0x14, t76
- 100: LDL (t76), t78
- 101: PUTL t78, R0
- 102: INCEIPL $4
-
- 0x25475B30: 7C690214 add r3,r9,r0
- 103: GETL R9, t80
- 104: GETL R0, t82
- 105: ADDL t80, t82
- 106: PUTL t82, R3
- 107: INCEIPL $4
-
- 0x25475B34: 906B000C stw r3,12(r11)
- 108: GETL R3, t84
- 109: GETL R11, t86
- 110: ADDL $0xC, t86
- 111: STL t84, (t86)
- 112: INCEIPL $4
-
- 0x25475B38: 81910004 lwz r12,4(r17)
- 113: GETL R17, t88
- 114: ADDL $0x4, t88
- 115: LDL (t88), t90
- 116: PUTL t90, R12
- 117: INCEIPL $4
-
- 0x25475B3C: 81DD0004 lwz r14,4(r29)
- 118: GETL R29, t92
- 119: ADDL $0x4, t92
- 120: LDL (t92), t94
- 121: PUTL t94, R14
- 122: INCEIPL $4
-
- 0x25475B40: 7DEC00D0 neg r15,r12
- 123: GETL R12, t96
- 124: NEGL t96
- 125: PUTL t96, R15
- 126: INCEIPL $4
-
- 0x25475B44: 7DC87838 and r8,r14,r15
- 127: GETL R14, t98
- 128: GETL R15, t100
- 129: ANDL t98, t100
- 130: PUTL t100, R8
- 131: INCEIPL $4
-
- 0x25475B48: 910B0010 stw r8,16(r11)
- 132: GETL R8, t102
- 133: GETL R11, t104
- 134: ADDL $0x10, t104
- 135: STL t102, (t104)
- 136: INCEIPL $4
-
- 0x25475B4C: 40850018 bc 4,5,0x25475B64
- 137: Jc05o $0x25475B64
-
-
-. 0 25475ADC 116
-. 7D 4A 40 78 3B 9C 00 01 7D 55 C9 2E 28 9C 00 01 81 3D 00 08 80 1D 00 10 81 F1 00 04 7C 69 02 14 7D 83 7A 14 7D CF 00 D0 39 6C FF FF 7D 68 70 38 7D 75 CA 14 91 0B 00 04 3B 39 00 18 80 9D 00 08 80 DD 00 10 7C A4 32 14 90 AB 00 08 81 3D 00 08 80 1D 00 14 7C 69 02 14 90 6B 00 0C 81 91 00 04 81 DD 00 04 7D EC 00 D0 7D C8 78 38 91 0B 00 10 40 85 00 18
-
-==== BB 494 (0x25475B64) approx BBs exec'd 0 ====
-
- 0x25475B64: 807D0018 lwz r3,24(r29)
- 0: GETL R29, t0
- 1: ADDL $0x18, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25475B68: 3D807351 lis r12,29521
- 5: MOVL $0x73510000, t4
- 6: PUTL t4, R12
- 7: INCEIPL $4
-
- 0x25475B6C: 618E6240 ori r14,r12,0x6240
- 8: MOVL $0x73516240, t6
- 9: PUTL t6, R14
- 10: INCEIPL $4
-
- 0x25475B70: 546F16FA rlwinm r15,r3,2,27,29
- 11: GETL R3, t8
- 12: ROLL $0x2, t8
- 13: ANDL $0x1C, t8
- 14: PUTL t8, R15
- 15: INCEIPL $4
-
- 0x25475B74: 7DC87E30 sraw r8,r14,r15
- 16: GETL R14, t12
- 17: GETL R15, t10
- 18: SARL t10, t12 (-wCa)
- 19: PUTL t12, R8
- 20: INCEIPL $4
-
- 0x25475B78: 5506073E rlwinm r6,r8,0,28,31
- 21: GETL R8, t14
- 22: ANDL $0xF, t14
- 23: PUTL t14, R6
- 24: INCEIPL $4
-
- 0x25475B7C: 90CB0014 stw r6,20(r11)
- 25: GETL R6, t16
- 26: GETL R11, t18
- 27: ADDL $0x14, t18
- 28: STL t16, (t18)
- 29: INCEIPL $4
-
- 0x25475B80: 4BFFFC78 b 0x254757F8
- 30: JMPo $0x254757F8 ($4)
-
-
-. 0 25475B64 32
-. 80 7D 00 18 3D 80 73 51 61 8E 62 40 54 6F 16 FA 7D C8 7E 30 55 06 07 3E 90 CB 00 14 4B FF FC 78
-
-==== BB 495 (0x254757F8) approx BBs exec'd 0 ====
-
- 0x254757F8: 54EF2834 rlwinm r15,r7,5,0,26
- 0: GETL R7, t0
- 1: SHLL $0x5, t0
- 2: PUTL t0, R15
- 3: INCEIPL $4
-
- 0x254757FC: 3BBD0020 addi r29,r29,32
- 4: GETL R29, t2
- 5: ADDL $0x20, t2
- 6: PUTL t2, R29
- 7: INCEIPL $4
-
- 0x25475800: 7DCFDA14 add r14,r15,r27
- 8: GETL R15, t4
- 9: GETL R27, t6
- 10: ADDL t4, t6
- 11: PUTL t6, R14
- 12: INCEIPL $4
-
- 0x25475804: 7C8EE840 cmpl cr1,r14,r29
- 13: GETL R14, t8
- 14: GETL R29, t10
- 15: CMPUL t8, t10, t12 (-rSo)
- 16: ICRFL t12, $0x1, CR
- 17: INCEIPL $4
-
- 0x25475808: 408500BC bc 4,5,0x254758C4
- 18: Jc05o $0x254758C4
-
-
-. 0 254757F8 20
-. 54 EF 28 34 3B BD 00 20 7D CF DA 14 7C 8E E8 40 40 85 00 BC
-
-==== BB 496 (0x25475B50) approx BBs exec'd 0 ====
-
- 0x25475B50: 808BFFEC lwz r4,-20(r11)
- 0: GETL R11, t0
- 1: ADDL $0xFFFFFFEC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x25475B54: 7E045000 cmp cr4,r4,r10
- 5: GETL R4, t4
- 6: GETL R10, t6
- 7: CMPL t4, t6, t8 (-rSo)
- 8: ICRFL t8, $0x4, CR
- 9: INCEIPL $4
-
- 0x25475B58: 4192000C bc 12,18,0x25475B64
- 10: Js18o $0x25475B64
-
-
-. 0 25475B50 12
-. 80 8B FF EC 7E 04 50 00 41 92 00 0C
-
-==== BB 497 (0x25475B5C) approx BBs exec'd 0 ====
-
- 0x25475B5C: 39400001 li r10,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R10
- 2: INCEIPL $4
-
- 0x25475B60: 915F00A8 stw r10,168(r31)
- 3: GETL R10, t2
- 4: GETL R31, t4
- 5: ADDL $0xA8, t4
- 6: STL t2, (t4)
- 7: INCEIPL $4
-
- 0x25475B64: 807D0018 lwz r3,24(r29)
- 8: GETL R29, t6
- 9: ADDL $0x18, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R3
- 12: INCEIPL $4
-
- 0x25475B68: 3D807351 lis r12,29521
- 13: MOVL $0x73510000, t10
- 14: PUTL t10, R12
- 15: INCEIPL $4
-
- 0x25475B6C: 618E6240 ori r14,r12,0x6240
- 16: MOVL $0x73516240, t12
- 17: PUTL t12, R14
- 18: INCEIPL $4
-
- 0x25475B70: 546F16FA rlwinm r15,r3,2,27,29
- 19: GETL R3, t14
- 20: ROLL $0x2, t14
- 21: ANDL $0x1C, t14
- 22: PUTL t14, R15
- 23: INCEIPL $4
-
- 0x25475B74: 7DC87E30 sraw r8,r14,r15
- 24: GETL R14, t18
- 25: GETL R15, t16
- 26: SARL t16, t18 (-wCa)
- 27: PUTL t18, R8
- 28: INCEIPL $4
-
- 0x25475B78: 5506073E rlwinm r6,r8,0,28,31
- 29: GETL R8, t20
- 30: ANDL $0xF, t20
- 31: PUTL t20, R6
- 32: INCEIPL $4
-
- 0x25475B7C: 90CB0014 stw r6,20(r11)
- 33: GETL R6, t22
- 34: GETL R11, t24
- 35: ADDL $0x14, t24
- 36: STL t22, (t24)
- 37: INCEIPL $4
-
- 0x25475B80: 4BFFFC78 b 0x254757F8
- 38: JMPo $0x254757F8 ($4)
-
-
-. 0 25475B5C 40
-. 39 40 00 01 91 5F 00 A8 80 7D 00 18 3D 80 73 51 61 8E 62 40 54 6F 16 FA 7D C8 7E 30 55 06 07 3E 90 CB 00 14 4B FF FC 78
-
-==== BB 498 (0x254757F0) approx BBs exec'd 0 ====
-
- 0x254757F0: 2C890002 cmpi cr1,r9,2
- 0: GETL R9, t0
- 1: MOVL $0x2, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0x254757F4: 418603B8 bc 12,6,0x25475BAC
- 5: Js06o $0x25475BAC
-
-
-. 0 254757F0 8
-. 2C 89 00 02 41 86 03 B8
-
-==== BB 499 (0x25475BAC) approx BBs exec'd 0 ====
-
- 0x25475BAC: 807D0014 lwz r3,20(r29)
- 0: GETL R29, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25475BB0: 819D0008 lwz r12,8(r29)
- 5: GETL R29, t4
- 6: ADDL $0x8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R12
- 9: INCEIPL $4
-
- 0x25475BB4: 546BE8FE rlwinm r11,r3,29,3,31
- 10: GETL R3, t8
- 11: SHRL $0x3, t8
- 12: PUTL t8, R11
- 13: INCEIPL $4
-
- 0x25475BB8: 919A0008 stw r12,8(r26)
- 14: GETL R12, t10
- 15: GETL R26, t12
- 16: ADDL $0x8, t12
- 17: STL t10, (t12)
- 18: INCEIPL $4
-
- 0x25475BBC: B17A0156 sth r11,342(r26)
- 19: GETL R11, t14
- 20: GETL R26, t16
- 21: ADDL $0x156, t16
- 22: STW t14, (t16)
- 23: INCEIPL $4
-
- 0x25475BC0: 4BFFFC38 b 0x254757F8
- 24: JMPo $0x254757F8 ($4)
-
-
-. 0 25475BAC 24
-. 80 7D 00 14 81 9D 00 08 54 6B E8 FE 91 9A 00 08 B1 7A 01 56 4B FF FC 38
-
-==== BB 500 (0x25475820) approx BBs exec'd 0 ====
-
- 0x25475820: 3DC06474 lis r14,25716
- 0: MOVL $0x64740000, t0
- 1: PUTL t0, R14
- 2: INCEIPL $4
-
- 0x25475824: 61C0E551 ori r0,r14,0xE551
- 3: MOVL $0x6474E551, t2
- 4: PUTL t2, R0
- 5: INCEIPL $4
-
- 0x25475828: 7E090000 cmp cr4,r9,r0
- 6: GETL R9, t4
- 7: GETL R0, t6
- 8: CMPL t4, t6, t8 (-rSo)
- 9: ICRFL t8, $0x4, CR
- 10: INCEIPL $4
-
- 0x2547582C: 41920278 bc 12,18,0x25475AA4
- 11: Js18o $0x25475AA4
-
-
-. 0 25475820 16
-. 3D C0 64 74 61 C0 E5 51 7E 09 00 00 41 92 02 78
-
-==== BB 501 (0x25475AA4) approx BBs exec'd 0 ====
-
- 0x25475AA4: 815D0018 lwz r10,24(r29)
- 0: GETL R29, t0
- 1: ADDL $0x18, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x25475AA8: 915F00A4 stw r10,164(r31)
- 5: GETL R10, t4
- 6: GETL R31, t6
- 7: ADDL $0xA4, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x25475AAC: 4BFFFD4C b 0x254757F8
- 10: JMPo $0x254757F8 ($4)
-
-
-. 0 25475AA4 12
-. 81 5D 00 18 91 5F 00 A4 4B FF FD 4C
-
-==== BB 502 (0x254758C4) approx BBs exec'd 0 ====
-
- 0x254758C4: 2E1C0000 cmpi cr4,r28,0
- 0: GETL R28, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x4, CR
- 3: INCEIPL $4
-
- 0x254758C8: 419202BC bc 12,18,0x25475B84
- 4: Js18o $0x25475B84
-
-
-. 0 254758C4 8
-. 2E 1C 00 00 41 92 02 BC
-
-==== BB 503 (0x254758CC) approx BBs exec'd 0 ====
-
- 0x254758CC: 1DFC0018 mulli r15,r28,24
- 0: GETL R28, t0
- 1: MULL $0x18, t0
- 2: PUTL t0, R15
- 3: INCEIPL $4
-
- 0x254758D0: 839F009C lwz r28,156(r31)
- 4: GETL R31, t2
- 5: ADDL $0x9C, t2
- 6: LDL (t2), t4
- 7: PUTL t4, R28
- 8: INCEIPL $4
-
- 0x254758D4: 81750000 lwz r11,0(r21)
- 9: GETL R21, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R11
- 12: INCEIPL $4
-
- 0x254758D8: 7EBDAB78 or r29,r21,r21
- 13: GETL R21, t10
- 14: PUTL t10, R29
- 15: INCEIPL $4
-
- 0x254758DC: 2E1C0003 cmpi cr4,r28,3
- 16: GETL R28, t12
- 17: MOVL $0x3, t16
- 18: CMPL t12, t16, t14 (-rSo)
- 19: ICRFL t14, $0x4, CR
- 20: INCEIPL $4
-
- 0x254758E0: 7F8FAA14 add r28,r15,r21
- 21: GETL R15, t18
- 22: GETL R21, t20
- 23: ADDL t18, t20
- 24: PUTL t20, R28
- 25: INCEIPL $4
-
- 0x254758E4: 833CFFF4 lwz r25,-12(r28)
- 26: GETL R28, t22
- 27: ADDL $0xFFFFFFF4, t22
- 28: LDL (t22), t24
- 29: PUTL t24, R25
- 30: INCEIPL $4
-
- 0x254758E8: 7DCBC850 subf r14,r11,r25
- 31: GETL R11, t26
- 32: GETL R25, t28
- 33: SUBL t26, t28
- 34: PUTL t28, R14
- 35: INCEIPL $4
-
- 0x254758EC: 40920818 bc 4,18,0x25476104
- 36: Jc18o $0x25476104
-
-
-. 0 254758CC 36
-. 1D FC 00 18 83 9F 00 9C 81 75 00 00 7E BD AB 78 2E 1C 00 03 7F 8F AA 14 83 3C FF F4 7D CB C8 50 40 92 08 18
-
-==== BB 504 (0x254758F0) approx BBs exec'd 0 ====
-
- 0x254758F0: 8191004C lwz r12,76(r17)
- 0: GETL R17, t0
- 1: ADDL $0x4C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R12
- 4: INCEIPL $4
-
- 0x254758F4: 7DC47378 or r4,r14,r14
- 5: GETL R14, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0x254758F8: 7EE3BB78 or r3,r23,r23
- 8: GETL R23, t6
- 9: PUTL t6, R3
- 10: INCEIPL $4
-
- 0x254758FC: 7D656038 and r5,r11,r12
- 11: GETL R11, t8
- 12: GETL R12, t10
- 13: ANDL t8, t10
- 14: PUTL t10, R5
- 15: INCEIPL $4
-
- 0x25475900: 4800ADE9 bl 0x254806E8
- 16: MOVL $0x25475904, t12
- 17: PUTL t12, LR
- 18: JMPo-c $0x254806E8 ($4)
-
-
-. 0 254758F0 20
-. 81 91 00 4C 7D C4 73 78 7E E3 BB 78 7D 65 60 38 48 00 AD E9
-
-==== BB 505 __elf_preferred_address(0x254806E8) approx BBs exec'd 0 ====
-
- 0x254806E8: 7CA32B79 or. r3,r5,r5
- 0: GETL R5, t0
- 1: PUTL t0, R3
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x254806EC: 7D8802A6 mflr r12
- 5: GETL LR, t4
- 6: PUTL t4, R12
- 7: INCEIPL $4
-
- 0x254806F0: 9421FFE0 stwu r1,-32(r1)
- 8: GETL R1, t6
- 9: GETL R1, t8
- 10: ADDL $0xFFFFFFE0, t8
- 11: PUTL t8, R1
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x254806F4: 4801690D bl 0x25497000
- 14: MOVL $0x254806F8, t10
- 15: PUTL t10, LR
- 16: JMPo-c $0x25497000 ($4)
-
-
-. 0 254806E8 16
-. 7C A3 2B 79 7D 88 02 A6 94 21 FF E0 48 01 69 0D
-
-==== BB 506 (0x254806F8) approx BBs exec'd 0 ====
-
- 0x254806F8: 93A10014 stw r29,20(r1)
- 0: GETL R29, t0
- 1: GETL R1, t2
- 2: ADDL $0x14, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x254806FC: 7C9D2378 or r29,r4,r4
- 5: GETL R4, t4
- 6: PUTL t4, R29
- 7: INCEIPL $4
-
- 0x25480700: 93C10018 stw r30,24(r1)
- 8: GETL R30, t6
- 9: GETL R1, t8
- 10: ADDL $0x18, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x25480704: 7FC802A6 mflr r30
- 13: GETL LR, t10
- 14: PUTL t10, R30
- 15: INCEIPL $4
-
- 0x25480708: 93810010 stw r28,16(r1)
- 16: GETL R28, t12
- 17: GETL R1, t14
- 18: ADDL $0x10, t14
- 19: STL t12, (t14)
- 20: INCEIPL $4
-
- 0x2548070C: 93E1001C stw r31,28(r1)
- 21: GETL R31, t16
- 22: GETL R1, t18
- 23: ADDL $0x1C, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x25480710: 7D8803A6 mtlr r12
- 26: GETL R12, t20
- 27: PUTL t20, LR
- 28: INCEIPL $4
-
- 0x25480714: 408200FC bc 4,2,0x25480810
- 29: Jc02o $0x25480810
-
-
-. 0 254806F8 32
-. 93 A1 00 14 7C 9D 23 78 93 C1 00 18 7F C8 02 A6 93 81 00 10 93 E1 00 1C 7D 88 03 A6 40 82 00 FC
-
-==== BB 507 (0x25480718) approx BBs exec'd 0 ====
-
- 0x25480718: 3CC00003 lis r6,3
- 0: MOVL $0x30000, t0
- 1: PUTL t0, R6
- 2: INCEIPL $4
-
- 0x2548071C: 83FE04F4 lwz r31,1268(r30)
- 3: GETL R30, t2
- 4: ADDL $0x4F4, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R31
- 7: INCEIPL $4
-
- 0x25480720: 809E04C8 lwz r4,1224(r30)
- 8: GETL R30, t6
- 9: ADDL $0x4C8, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R4
- 12: INCEIPL $4
-
- 0x25480724: 60C6FFFF ori r6,r6,0xFFFF
- 13: MOVL $0x3FFFF, t10
- 14: PUTL t10, R6
- 15: INCEIPL $4
-
- 0x25480728: 3CE07000 lis r7,28672
- 16: MOVL $0x70000000, t12
- 17: PUTL t12, R7
- 18: INCEIPL $4
-
- 0x2548072C: 3980000F li r12,15
- 19: MOVL $0xF, t14
- 20: PUTL t14, R12
- 21: INCEIPL $4
-
- 0x25480730: 81640000 lwz r11,0(r4)
- 22: GETL R4, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R11
- 25: INCEIPL $4
-
- 0x25480734: 38840018 addi r4,r4,24
- 26: GETL R4, t20
- 27: ADDL $0x18, t20
- 28: PUTL t20, R4
- 29: INCEIPL $4
-
- 0x25480738: 2F8B0000 cmpi cr7,r11,0
- 30: GETL R11, t22
- 31: CMP0L t22, t24 (-rSo)
- 32: ICRFL t24, $0x7, CR
- 33: INCEIPL $4
-
- 0x2548073C: 419E009C bc 12,30,0x254807D8
- 34: Js30o $0x254807D8
-
-
-. 0 25480718 40
-. 3C C0 00 03 83 FE 04 F4 80 9E 04 C8 60 C6 FF FF 3C E0 70 00 39 80 00 0F 81 64 00 00 38 84 00 18 2F 8B 00 00 41 9E 00 9C
-
-==== BB 508 (0x25480740) approx BBs exec'd 0 ====
-
- 0x25480740: 813F0004 lwz r9,4(r31)
- 0: GETL R31, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25480744: 38A9FFFF addi r5,r9,-1
- 5: GETL R9, t4
- 6: ADDL $0xFFFFFFFF, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x25480748: 7CA328F8 nor r3,r5,r5
- 9: GETL R5, t6
- 10: NOTL t6
- 11: PUTL t6, R3
- 12: INCEIPL $4
-
- 0x2548074C: 800B01A4 lwz r0,420(r11)
- 13: GETL R11, t8
- 14: ADDL $0x1A4, t8
- 15: LDL (t8), t10
- 16: PUTL t10, R0
- 17: INCEIPL $4
-
- 0x25480750: 838B01A0 lwz r28,416(r11)
- 18: GETL R11, t12
- 19: ADDL $0x1A0, t12
- 20: LDL (t12), t14
- 21: PUTL t14, R28
- 22: INCEIPL $4
-
- 0x25480754: 7C082B78 or r8,r0,r5
- 23: GETL R0, t16
- 24: GETL R5, t18
- 25: ORL t18, t16
- 26: PUTL t16, R8
- 27: INCEIPL $4
-
- 0x25480758: 7C883840 cmpl cr1,r8,r7
- 28: GETL R8, t20
- 29: GETL R7, t22
- 30: CMPUL t20, t22, t24 (-rSo)
- 31: ICRFL t24, $0x1, CR
- 32: INCEIPL $4
-
- 0x2548075C: 7F8A1838 and r10,r28,r3
- 33: GETL R28, t26
- 34: GETL R3, t28
- 35: ANDL t26, t28
- 36: PUTL t28, R10
- 37: INCEIPL $4
-
- 0x25480760: 40840010 bc 4,4,0x25480770
- 38: Jc04o $0x25480770
-
-
-. 0 25480740 36
-. 81 3F 00 04 38 A9 FF FF 7C A3 28 F8 80 0B 01 A4 83 8B 01 A0 7C 08 2B 78 7C 88 38 40 7F 8A 18 38 40 84 00 10
-
-==== BB 509 (0x25480764) approx BBs exec'd 0 ====
-
- 0x25480764: 838B0180 lwz r28,384(r11)
- 0: GETL R11, t0
- 1: ADDL $0x180, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R28
- 4: INCEIPL $4
-
- 0x25480768: 7789C000 andis. r9,r28,0xC000
- 5: GETL R28, t4
- 6: ANDL $0xC0000000, t4
- 7: PUTL t4, R9
- 8: CMP0L t4, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x2548076C: 4082000C bc 4,2,0x25480778
- 11: Jc02o $0x25480778
-
-
-. 0 25480764 12
-. 83 8B 01 80 77 89 C0 00 40 82 00 0C
-
-==== BB 510 (0x25480770) approx BBs exec'd 0 ====
-
- 0x25480770: 7F075040 cmpl cr6,r7,r10
- 0: GETL R7, t0
- 1: GETL R10, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x6, CR
- 4: INCEIPL $4
-
- 0x25480774: 40980054 bc 4,24,0x254807C8
- 5: Jc24o $0x254807C8
-
-
-. 0 25480770 8
-. 7F 07 50 40 40 98 00 54
-
-==== BB 511 (0x254807C8) approx BBs exec'd 0 ====
-
- 0x254807C8: 7D475378 or r7,r10,r10
- 0: GETL R10, t0
- 1: PUTL t0, R7
- 2: INCEIPL $4
-
- 0x254807CC: 816B000C lwz r11,12(r11)
- 3: GETL R11, t2
- 4: ADDL $0xC, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R11
- 7: INCEIPL $4
-
- 0x254807D0: 2C8B0000 cmpi cr1,r11,0
- 8: GETL R11, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x1, CR
- 11: INCEIPL $4
-
- 0x254807D4: 4086FF78 bc 4,6,0x2548074C
- 12: Jc06o $0x2548074C
-
-
-. 0 254807C8 16
-. 7D 47 53 78 81 6B 00 0C 2C 8B 00 00 40 86 FF 78
-
-==== BB 512 (0x2548074C) approx BBs exec'd 0 ====
-
- 0x2548074C: 800B01A4 lwz r0,420(r11)
- 0: GETL R11, t0
- 1: ADDL $0x1A4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25480750: 838B01A0 lwz r28,416(r11)
- 5: GETL R11, t4
- 6: ADDL $0x1A0, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R28
- 9: INCEIPL $4
-
- 0x25480754: 7C082B78 or r8,r0,r5
- 10: GETL R0, t8
- 11: GETL R5, t10
- 12: ORL t10, t8
- 13: PUTL t8, R8
- 14: INCEIPL $4
-
- 0x25480758: 7C883840 cmpl cr1,r8,r7
- 15: GETL R8, t12
- 16: GETL R7, t14
- 17: CMPUL t12, t14, t16 (-rSo)
- 18: ICRFL t16, $0x1, CR
- 19: INCEIPL $4
-
- 0x2548075C: 7F8A1838 and r10,r28,r3
- 20: GETL R28, t18
- 21: GETL R3, t20
- 22: ANDL t18, t20
- 23: PUTL t20, R10
- 24: INCEIPL $4
-
- 0x25480760: 40840010 bc 4,4,0x25480770
- 25: Jc04o $0x25480770
-
-
-. 0 2548074C 24
-. 80 0B 01 A4 83 8B 01 A0 7C 08 2B 78 7C 88 38 40 7F 8A 18 38 40 84 00 10
-
-==== BB 513 (0x25480778) approx BBs exec'd 0 ====
-
- 0x25480778: 7C064010 subfc r0,r6,r8
- 0: GETL R6, t0
- 1: GETL R8, t2
- 2: SBBL t0, t2 (-wCa)
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x2548077C: 38000000 li r0,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R0
- 7: INCEIPL $4
-
- 0x25480780: 7C000114 adde r0,r0,r0
- 8: GETL R0, t6
- 9: GETL R0, t8
- 10: ADCL t6, t8 (-rCa-wCa)
- 11: PUTL t8, R0
- 12: INCEIPL $4
-
- 0x25480784: 7D2A3010 subfc r9,r10,r6
- 13: GETL R10, t10
- 14: GETL R6, t12
- 15: SBBL t10, t12 (-wCa)
- 16: PUTL t12, R9
- 17: INCEIPL $4
-
- 0x25480788: 39200000 li r9,0
- 18: MOVL $0x0, t14
- 19: PUTL t14, R9
- 20: INCEIPL $4
-
- 0x2548078C: 7D294914 adde r9,r9,r9
- 21: GETL R9, t16
- 22: GETL R9, t18
- 23: ADCL t16, t18 (-rCa-wCa)
- 24: PUTL t18, R9
- 25: INCEIPL $4
-
- 0x25480790: 7C1C4839 and. r28,r0,r9
- 26: GETL R0, t20
- 27: GETL R9, t22
- 28: ANDL t20, t22
- 29: PUTL t22, R28
- 30: CMP0L t22, t24 (-rSo)
- 31: ICRFL t24, $0x0, CR
- 32: INCEIPL $4
-
- 0x25480794: 40820094 bc 4,2,0x25480828
- 33: Jc02o $0x25480828
-
-
-. 0 25480778 32
-. 7C 06 40 10 38 00 00 00 7C 00 01 14 7D 2A 30 10 39 20 00 00 7D 29 49 14 7C 1C 48 39 40 82 00 94
-
-==== BB 514 (0x25480798) approx BBs exec'd 0 ====
-
- 0x25480798: 7C083810 subfc r0,r8,r7
- 0: GETL R8, t0
- 1: GETL R7, t2
- 2: SBBL t0, t2 (-wCa)
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x2548079C: 38000000 li r0,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R0
- 7: INCEIPL $4
-
- 0x254807A0: 7C000114 adde r0,r0,r0
- 8: GETL R0, t6
- 9: GETL R0, t8
- 10: ADCL t6, t8 (-rCa-wCa)
- 11: PUTL t8, R0
- 12: INCEIPL $4
-
- 0x254807A4: 7D265010 subfc r9,r6,r10
- 13: GETL R6, t10
- 14: GETL R10, t12
- 15: SBBL t10, t12 (-wCa)
- 16: PUTL t12, R9
- 17: INCEIPL $4
-
- 0x254807A8: 39200000 li r9,0
- 18: MOVL $0x0, t14
- 19: PUTL t14, R9
- 20: INCEIPL $4
-
- 0x254807AC: 7D294914 adde r9,r9,r9
- 21: GETL R9, t16
- 22: GETL R9, t18
- 23: ADCL t16, t18 (-rCa-wCa)
- 24: PUTL t18, R9
- 25: INCEIPL $4
-
- 0x254807B0: 7C1C4839 and. r28,r0,r9
- 26: GETL R0, t20
- 27: GETL R9, t22
- 28: ANDL t20, t22
- 29: PUTL t22, R28
- 30: CMP0L t22, t24 (-rSo)
- 31: ICRFL t24, $0x0, CR
- 32: INCEIPL $4
-
- 0x254807B4: 41820018 bc 12,2,0x254807CC
- 33: Js02o $0x254807CC
-
-
-. 0 25480798 32
-. 7C 08 38 10 38 00 00 00 7C 00 01 14 7D 26 50 10 39 20 00 00 7D 29 49 14 7C 1C 48 39 41 82 00 18
-
-==== BB 515 (0x254807CC) approx BBs exec'd 0 ====
-
- 0x254807CC: 816B000C lwz r11,12(r11)
- 0: GETL R11, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x254807D0: 2C8B0000 cmpi cr1,r11,0
- 5: GETL R11, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x254807D4: 4086FF78 bc 4,6,0x2548074C
- 9: Jc06o $0x2548074C
-
-
-. 0 254807CC 12
-. 81 6B 00 0C 2C 8B 00 00 40 86 FF 78
-
-==== BB 516 (0x254807D8) approx BBs exec'd 0 ====
-
- 0x254807D8: 358CFFFF addic. r12,r12,-1
- 0: GETL R12, t0
- 1: ADCL $0xFFFFFFFF, t0 (-wCa)
- 2: PUTL t0, R12
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x254807DC: 4080FF54 bc 4,0,0x25480730
- 6: Jc00o $0x25480730
-
-
-. 0 254807D8 8
-. 35 8C FF FF 40 80 FF 54
-
-==== BB 517 (0x25480730) approx BBs exec'd 0 ====
-
- 0x25480730: 81640000 lwz r11,0(r4)
- 0: GETL R4, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R11
- 3: INCEIPL $4
-
- 0x25480734: 38840018 addi r4,r4,24
- 4: GETL R4, t4
- 5: ADDL $0x18, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0x25480738: 2F8B0000 cmpi cr7,r11,0
- 8: GETL R11, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x7, CR
- 11: INCEIPL $4
-
- 0x2548073C: 419E009C bc 12,30,0x254807D8
- 12: Js30o $0x254807D8
-
-
-. 0 25480730 16
-. 81 64 00 00 38 84 00 18 2F 8B 00 00 41 9E 00 9C
-
-==== BB 518 (0x254807E0) approx BBs exec'd 0 ====
-
- 0x254807E0: 3C67FFFF addis r3,r7,-1
- 0: GETL R7, t0
- 1: ADDL $0xFFFF0000, t0
- 2: PUTL t0, R3
- 3: INCEIPL $4
-
- 0x254807E4: 80FF0004 lwz r7,4(r31)
- 4: GETL R31, t2
- 5: ADDL $0x4, t2
- 6: LDL (t2), t4
- 7: PUTL t4, R7
- 8: INCEIPL $4
-
- 0x254807E8: 7F033040 cmpl cr6,r3,r6
- 9: GETL R3, t6
- 10: GETL R6, t8
- 11: CMPUL t6, t8, t10 (-rSo)
- 12: ICRFL t10, $0x6, CR
- 13: INCEIPL $4
-
- 0x254807EC: 3887FFFF addi r4,r7,-1
- 14: GETL R7, t12
- 15: ADDL $0xFFFFFFFF, t12
- 16: PUTL t12, R4
- 17: INCEIPL $4
-
- 0x254807F0: 7C85EB78 or r5,r4,r29
- 18: GETL R4, t14
- 19: GETL R29, t16
- 20: ORL t16, t14
- 21: PUTL t14, R5
- 22: INCEIPL $4
-
- 0x254807F4: 38850001 addi r4,r5,1
- 23: GETL R5, t18
- 24: ADDL $0x1, t18
- 25: PUTL t18, R4
- 26: INCEIPL $4
-
- 0x254807F8: 40990014 bc 4,25,0x2548080C
- 27: Jc25o $0x2548080C
-
-
-. 0 254807E0 28
-. 3C 67 FF FF 80 FF 00 04 7F 03 30 40 38 87 FF FF 7C 85 EB 78 38 85 00 01 40 99 00 14
-
-==== BB 519 (0x254807FC) approx BBs exec'd 0 ====
-
- 0x254807FC: 7D061850 subf r8,r6,r3
- 0: GETL R6, t0
- 1: GETL R3, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x25480800: 7C641850 subf r3,r4,r3
- 5: GETL R4, t4
- 6: GETL R3, t6
- 7: SUBL t4, t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x25480804: 7F882040 cmpl cr7,r8,r4
- 10: GETL R8, t8
- 11: GETL R4, t10
- 12: CMPUL t8, t10, t12 (-rSo)
- 13: ICRFL t12, $0x7, CR
- 14: INCEIPL $4
-
- 0x25480808: 409C0008 bc 4,28,0x25480810
- 15: Jc28o $0x25480810
-
-
-. 0 254807FC 16
-. 7D 06 18 50 7C 64 18 50 7F 88 20 40 40 9C 00 08
-
-==== BB 520 (0x25480810) approx BBs exec'd 0 ====
-
- 0x25480810: 83810010 lwz r28,16(r1)
- 0: GETL R1, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R28
- 4: INCEIPL $4
-
- 0x25480814: 83A10014 lwz r29,20(r1)
- 5: GETL R1, t4
- 6: ADDL $0x14, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R29
- 9: INCEIPL $4
-
- 0x25480818: 83C10018 lwz r30,24(r1)
- 10: GETL R1, t8
- 11: ADDL $0x18, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R30
- 14: INCEIPL $4
-
- 0x2548081C: 83E1001C lwz r31,28(r1)
- 15: GETL R1, t12
- 16: ADDL $0x1C, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R31
- 19: INCEIPL $4
-
- 0x25480820: 38210020 addi r1,r1,32
- 20: GETL R1, t16
- 21: ADDL $0x20, t16
- 22: PUTL t16, R1
- 23: INCEIPL $4
-
- 0x25480824: 4E800020 blr
- 24: GETL LR, t18
- 25: JMPo-r t18 ($4)
-
-
-. 0 25480810 24
-. 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 521 (0x25475904) approx BBs exec'd 0 ====
-
- 0x25475904: 80B50014 lwz r5,20(r21)
- 0: GETL R21, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25475908: 81150010 lwz r8,16(r21)
- 5: GETL R21, t4
- 6: ADDL $0x10, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R8
- 9: INCEIPL $4
-
- 0x2547590C: 7DC47378 or r4,r14,r14
- 10: GETL R14, t8
- 11: PUTL t8, R4
- 12: INCEIPL $4
-
- 0x25475910: 38C00802 li r6,2050
- 13: MOVL $0x802, t10
- 14: PUTL t10, R6
- 15: INCEIPL $4
-
- 0x25475914: 7E679B78 or r7,r19,r19
- 16: GETL R19, t12
- 17: PUTL t12, R7
- 18: INCEIPL $4
-
- 0x25475918: 4800CE81 bl 0x25482798
- 19: MOVL $0x2547591C, t14
- 20: PUTL t14, LR
- 21: JMPo-c $0x25482798 ($4)
-
-
-. 0 25475904 24
-. 80 B5 00 14 81 15 00 10 7D C4 73 78 38 C0 08 02 7E 67 9B 78 48 00 CE 81
-
-==9225== Reading syms from /home/sewardj/valgrind-2.2.0-ppc/Inst/lib/valgrind/vg_inject.so (0xFFDD000)
-==== BB 522 (0x2547591C) approx BBs exec'd 0 ====
-
- 0x2547591C: 2F03FFFF cmpi cr6,r3,-1
- 0: GETL R3, t0
- 1: MOVL $0xFFFFFFFF, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x6, CR
- 4: INCEIPL $4
-
- 0x25475920: 907A01A0 stw r3,416(r26)
- 5: GETL R3, t6
- 6: GETL R26, t8
- 7: ADDL $0x1A0, t8
- 8: STL t6, (t8)
- 9: INCEIPL $4
-
- 0x25475924: 419A013C bc 12,26,0x25475A60
- 10: Js26o $0x25475A60
-
-
-. 0 2547591C 12
-. 2F 03 FF FF 90 7A 01 A0 41 9A 01 3C
-
-==== BB 523 (0x25475928) approx BBs exec'd 0 ====
-
- 0x25475928: 817F00A8 lwz r11,168(r31)
- 0: GETL R31, t0
- 1: ADDL $0xA8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547592C: 7CA37214 add r5,r3,r14
- 5: GETL R3, t4
- 6: GETL R14, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R5
- 9: INCEIPL $4
-
- 0x25475930: 90BA01A4 stw r5,420(r26)
- 10: GETL R5, t8
- 11: GETL R26, t10
- 12: ADDL $0x1A4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25475934: 2F8B0000 cmpi cr7,r11,0
- 15: GETL R11, t12
- 16: CMP0L t12, t14 (-rSo)
- 17: ICRFL t14, $0x7, CR
- 18: INCEIPL $4
-
- 0x25475938: 80F50000 lwz r7,0(r21)
- 19: GETL R21, t16
- 20: LDL (t16), t18
- 21: PUTL t18, R7
- 22: INCEIPL $4
-
- 0x2547593C: 7C071850 subf r0,r7,r3
- 23: GETL R7, t20
- 24: GETL R3, t22
- 25: SUBL t20, t22
- 26: PUTL t22, R0
- 27: INCEIPL $4
-
- 0x25475940: 901A0000 stw r0,0(r26)
- 28: GETL R0, t24
- 29: GETL R26, t26
- 30: STL t24, (t26)
- 31: INCEIPL $4
-
- 0x25475944: 409E0534 bc 4,30,0x25475E78
- 32: Jc30o $0x25475E78
-
-
-. 0 25475928 32
-. 81 7F 00 A8 7C A3 72 14 90 BA 01 A4 2F 8B 00 00 80 F5 00 00 7C 07 18 50 90 1A 00 00 40 9E 05 34
-
-==== BB 524 (0x25475E78) approx BBs exec'd 0 ====
-
- 0x25475E78: 80750004 lwz r3,4(r21)
- 0: GETL R21, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25475E7C: 38A00000 li r5,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x25475E80: 809CFFF4 lwz r4,-12(r28)
- 8: GETL R28, t6
- 9: ADDL $0xFFFFFFF4, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R4
- 12: INCEIPL $4
-
- 0x25475E84: 7C832050 subf r4,r3,r4
- 13: GETL R3, t10
- 14: GETL R4, t12
- 15: SUBL t10, t12
- 16: PUTL t12, R4
- 17: INCEIPL $4
-
- 0x25475E88: 7C601A14 add r3,r0,r3
- 18: GETL R0, t14
- 19: GETL R3, t16
- 20: ADDL t14, t16
- 21: PUTL t16, R3
- 22: INCEIPL $4
-
- 0x25475E8C: 4800C92D bl 0x254827B8
- 23: MOVL $0x25475E90, t18
- 24: PUTL t18, LR
- 25: JMPo-c $0x254827B8 ($4)
-
-
-. 0 25475E78 24
-. 80 75 00 04 38 A0 00 00 80 9C FF F4 7C 83 20 50 7C 60 1A 14 48 00 C9 2D
-
-==== BB 525 mprotect(0x254827B8) approx BBs exec'd 0 ====
-
- 0x254827B8: 3800007D li r0,125
- 0: MOVL $0x7D, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x254827BC: 44000002 sc
- 3: JMPo-sys $0x254827C0 ($4)
-
-
-. 0 254827B8 8
-. 38 00 00 7D 44 00 00 02
-
-==== BB 526 (0x254827C0) approx BBs exec'd 0 ====
-
- 0x254827C0: 4CA30020 bclr 5,3
- 0: GETL LR, t0
- 1: Jc03o-r t0
-
-
-. 0 254827C0 4
-. 4C A3 00 20
-
-==== BB 527 (0x25475E90) approx BBs exec'd 0 ====
-
- 0x25475E90: 4BFFFAB8 b 0x25475948
- 0: JMPo $0x25475948 ($4)
-
-
-. 0 25475E90 4
-. 4B FF FA B8
-
-==== BB 528 (0x25475948) approx BBs exec'd 0 ====
-
- 0x25475948: 80DD0014 lwz r6,20(r29)
- 0: GETL R29, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x2547594C: 70C90004 andi. r9,r6,0x4
- 5: GETL R6, t4
- 6: ANDL $0x4, t4
- 7: PUTL t4, R9
- 8: CMP0L t4, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x25475950: 41820014 bc 12,2,0x25475964
- 11: Js02o $0x25475964
-
-
-. 0 25475948 12
-. 80 DD 00 14 70 C9 00 04 41 82 00 14
-
-==== BB 529 (0x25475954) approx BBs exec'd 0 ====
-
- 0x25475954: 839D0004 lwz r28,4(r29)
- 0: GETL R29, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R28
- 4: INCEIPL $4
-
- 0x25475958: 833A0000 lwz r25,0(r26)
- 5: GETL R26, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R25
- 8: INCEIPL $4
-
- 0x2547595C: 7D19E214 add r8,r25,r28
- 9: GETL R25, t8
- 10: GETL R28, t10
- 11: ADDL t8, t10
- 12: PUTL t10, R8
- 13: INCEIPL $4
-
- 0x25475960: 911A01A8 stw r8,424(r26)
- 14: GETL R8, t12
- 15: GETL R26, t14
- 16: ADDL $0x1A8, t14
- 17: STL t12, (t14)
- 18: INCEIPL $4
-
- 0x25475964: 819A014C lwz r12,332(r26)
- 19: GETL R26, t16
- 20: ADDL $0x14C, t16
- 21: LDL (t16), t18
- 22: PUTL t18, R12
- 23: INCEIPL $4
-
- 0x25475968: 2F8C0000 cmpi cr7,r12,0
- 24: GETL R12, t20
- 25: CMP0L t20, t22 (-rSo)
- 26: ICRFL t22, $0x7, CR
- 27: INCEIPL $4
-
- 0x2547596C: 409E0038 bc 4,30,0x254759A4
- 28: Jc30o $0x254759A4
-
-
-. 0 25475954 28
-. 83 9D 00 04 83 3A 00 00 7D 19 E2 14 91 1A 01 A8 81 9A 01 4C 2F 8C 00 00 40 9E 00 38
-
-==== BB 530 (0x25475970) approx BBs exec'd 0 ====
-
- 0x25475970: 815D0010 lwz r10,16(r29)
- 0: GETL R29, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x25475974: 8178001C lwz r11,28(r24)
- 5: GETL R24, t4
- 6: ADDL $0x1C, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R11
- 9: INCEIPL $4
-
- 0x25475978: 7C8A5840 cmpl cr1,r10,r11
- 10: GETL R10, t8
- 11: GETL R11, t10
- 12: CMPUL t8, t10, t12 (-rSo)
- 13: ICRFL t12, $0x1, CR
- 14: INCEIPL $4
-
- 0x2547597C: 41850028 bc 12,5,0x254759A4
- 15: Js05o $0x254759A4
-
-
-. 0 25475970 16
-. 81 5D 00 10 81 78 00 1C 7C 8A 58 40 41 85 00 28
-
-==== BB 531 (0x25475980) approx BBs exec'd 0 ====
-
- 0x25475980: 801D0004 lwz r0,4(r29)
- 0: GETL R29, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25475984: 811D0000 lwz r8,0(r29)
- 5: GETL R29, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R8
- 8: INCEIPL $4
-
- 0x25475988: A138002C lhz r9,44(r24)
- 9: GETL R24, t8
- 10: ADDL $0x2C, t8
- 11: LDW (t8), t10
- 12: PUTL t10, R9
- 13: INCEIPL $4
-
- 0x2547598C: 7C880050 subf r4,r8,r0
- 14: GETL R8, t12
- 15: GETL R0, t14
- 16: SUBL t12, t14
- 17: PUTL t14, R4
- 18: INCEIPL $4
-
- 0x25475990: 55232834 rlwinm r3,r9,5,0,26
- 19: GETL R9, t16
- 20: SHLL $0x5, t16
- 21: PUTL t16, R3
- 22: INCEIPL $4
-
- 0x25475994: 7CA45214 add r5,r4,r10
- 23: GETL R4, t18
- 24: GETL R10, t20
- 25: ADDL t18, t20
- 26: PUTL t20, R5
- 27: INCEIPL $4
-
- 0x25475998: 7CEB1A14 add r7,r11,r3
- 28: GETL R11, t22
- 29: GETL R3, t24
- 30: ADDL t22, t24
- 31: PUTL t24, R7
- 32: INCEIPL $4
-
- 0x2547599C: 7F053840 cmpl cr6,r5,r7
- 33: GETL R5, t26
- 34: GETL R7, t28
- 35: CMPUL t26, t28, t30 (-rSo)
- 36: ICRFL t30, $0x6, CR
- 37: INCEIPL $4
-
- 0x254759A0: 4098069C bc 4,24,0x2547603C
- 38: Jc24o $0x2547603C
-
-
-. 0 25475980 36
-. 80 1D 00 04 81 1D 00 00 A1 38 00 2C 7C 88 00 50 55 23 28 34 7C A4 52 14 7C EB 1A 14 7F 05 38 40 40 98 06 9C
-
-==== BB 532 (0x2547603C) approx BBs exec'd 0 ====
-
- 0x2547603C: 7EE85A14 add r23,r8,r11
- 0: GETL R8, t0
- 1: GETL R11, t2
- 2: ADDL t0, t2
- 3: PUTL t2, R23
- 4: INCEIPL $4
-
- 0x25476040: 7D6AB850 subf r11,r10,r23
- 5: GETL R10, t4
- 6: GETL R23, t6
- 7: SUBL t4, t6
- 8: PUTL t6, R11
- 9: INCEIPL $4
-
- 0x25476044: 917A014C stw r11,332(r26)
- 10: GETL R11, t8
- 11: GETL R26, t10
- 12: ADDL $0x14C, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25476048: 4BFFF95C b 0x254759A4
- 15: JMPo $0x254759A4 ($4)
-
-
-. 0 2547603C 16
-. 7E E8 5A 14 7D 6A B8 50 91 7A 01 4C 4B FF F9 5C
-
-==== BB 533 (0x254759A4) approx BBs exec'd 0 ====
-
- 0x254759A4: 809D000C lwz r4,12(r29)
- 0: GETL R29, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x254759A8: 807D0008 lwz r3,8(r29)
- 5: GETL R29, t4
- 6: ADDL $0x8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x254759AC: 7C041840 cmpl cr0,r4,r3
- 10: GETL R4, t8
- 11: GETL R3, t10
- 12: CMPUL t8, t10, t12 (-rSo)
- 13: ICRFL t12, $0x0, CR
- 14: INCEIPL $4
-
- 0x254759B0: 40810068 bc 4,1,0x25475A18
- 15: Jc01o $0x25475A18
-
-
-. 0 254759A4 16
-. 80 9D 00 0C 80 7D 00 08 7C 04 18 40 40 81 00 68
-
-==== BB 534 (0x25475A18) approx BBs exec'd 0 ====
-
- 0x25475A18: 3BBD0018 addi r29,r29,24
- 0: GETL R29, t0
- 1: ADDL $0x18, t0
- 2: PUTL t0, R29
- 3: INCEIPL $4
-
- 0x25475A1C: 7F357A14 add r25,r21,r15
- 4: GETL R21, t2
- 5: GETL R15, t4
- 6: ADDL t2, t4
- 7: PUTL t4, R25
- 8: INCEIPL $4
-
- 0x25475A20: 7F99E840 cmpl cr7,r25,r29
- 9: GETL R25, t6
- 10: GETL R29, t8
- 11: CMPUL t6, t8, t10 (-rSo)
- 12: ICRFL t10, $0x7, CR
- 13: INCEIPL $4
-
- 0x25475A24: 409D01F8 bc 4,29,0x25475C1C
- 14: Jc29o $0x25475C1C
-
-
-. 0 25475A18 16
-. 3B BD 00 18 7F 35 7A 14 7F 99 E8 40 40 9D 01 F8
-
-==== BB 535 (0x25475A28) approx BBs exec'd 0 ====
-
- 0x25475A28: 809D0004 lwz r4,4(r29)
- 0: GETL R29, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x25475A2C: 801D0000 lwz r0,0(r29)
- 5: GETL R29, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R0
- 8: INCEIPL $4
-
- 0x25475A30: 7C840040 cmpl cr1,r4,r0
- 9: GETL R4, t8
- 10: GETL R0, t10
- 11: CMPUL t8, t10, t12 (-rSo)
- 12: ICRFL t12, $0x1, CR
- 13: INCEIPL $4
-
- 0x25475A34: 4085FF14 bc 4,5,0x25475948
- 14: Jc05o $0x25475948
-
-
-. 0 25475A28 16
-. 80 9D 00 04 80 1D 00 00 7C 84 00 40 40 85 FF 14
-
-==== BB 536 (0x25475A38) approx BBs exec'd 0 ====
-
- 0x25475A38: 815A0000 lwz r10,0(r26)
- 0: GETL R26, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R10
- 3: INCEIPL $4
-
- 0x25475A3C: 7C802050 subf r4,r0,r4
- 4: GETL R0, t4
- 5: GETL R4, t6
- 6: SUBL t4, t6
- 7: PUTL t6, R4
- 8: INCEIPL $4
-
- 0x25475A40: 80BD0014 lwz r5,20(r29)
- 9: GETL R29, t8
- 10: ADDL $0x14, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R5
- 13: INCEIPL $4
-
- 0x25475A44: 38C00812 li r6,2066
- 14: MOVL $0x812, t12
- 15: PUTL t12, R6
- 16: INCEIPL $4
-
- 0x25475A48: 811D0010 lwz r8,16(r29)
- 17: GETL R29, t14
- 18: ADDL $0x10, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R8
- 21: INCEIPL $4
-
- 0x25475A4C: 7C6A0214 add r3,r10,r0
- 22: GETL R10, t18
- 23: GETL R0, t20
- 24: ADDL t18, t20
- 25: PUTL t20, R3
- 26: INCEIPL $4
-
- 0x25475A50: 7E679B78 or r7,r19,r19
- 27: GETL R19, t22
- 28: PUTL t22, R7
- 29: INCEIPL $4
-
- 0x25475A54: 4800CD45 bl 0x25482798
- 30: MOVL $0x25475A58, t24
- 31: PUTL t24, LR
- 32: JMPo-c $0x25482798 ($4)
-
-
-. 0 25475A38 32
-. 81 5A 00 00 7C 80 20 50 80 BD 00 14 38 C0 08 12 81 1D 00 10 7C 6A 02 14 7E 67 9B 78 48 00 CD 45
-
-==== BB 537 (0x25475A58) approx BBs exec'd 0 ====
-
- 0x25475A58: 2F03FFFF cmpi cr6,r3,-1
- 0: GETL R3, t0
- 1: MOVL $0xFFFFFFFF, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x6, CR
- 4: INCEIPL $4
-
- 0x25475A5C: 409AFEEC bc 4,26,0x25475948
- 5: Jc26o $0x25475948
-
-
-. 0 25475A58 8
-. 2F 03 FF FF 40 9A FE EC
-
-==== BB 538 (0x254759B4) approx BBs exec'd 0 ====
-
- 0x254759B4: 80DA0000 lwz r6,0(r26)
- 0: GETL R26, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R6
- 3: INCEIPL $4
-
- 0x254759B8: 81710004 lwz r11,4(r17)
- 4: GETL R17, t4
- 5: ADDL $0x4, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R11
- 8: INCEIPL $4
-
- 0x254759BC: 7F261A14 add r25,r6,r3
- 9: GETL R6, t8
- 10: GETL R3, t10
- 11: ADDL t8, t10
- 12: PUTL t10, R25
- 13: INCEIPL $4
-
- 0x254759C0: 7EE62214 add r23,r6,r4
- 14: GETL R6, t12
- 15: GETL R4, t14
- 16: ADDL t12, t14
- 17: PUTL t14, R23
- 18: INCEIPL $4
-
- 0x254759C4: 7D0BCA14 add r8,r11,r25
- 19: GETL R11, t16
- 20: GETL R25, t18
- 21: ADDL t16, t18
- 22: PUTL t18, R8
- 23: INCEIPL $4
-
- 0x254759C8: 7C6B00D0 neg r3,r11
- 24: GETL R11, t20
- 25: NEGL t20
- 26: PUTL t20, R3
- 27: INCEIPL $4
-
- 0x254759CC: 3948FFFF addi r10,r8,-1
- 28: GETL R8, t22
- 29: ADDL $0xFFFFFFFF, t22
- 30: PUTL t22, R10
- 31: INCEIPL $4
-
- 0x254759D0: 7D5C1838 and r28,r10,r3
- 32: GETL R10, t24
- 33: GETL R3, t26
- 34: ANDL t24, t26
- 35: PUTL t26, R28
- 36: INCEIPL $4
-
- 0x254759D4: 7F97E040 cmpl cr7,r23,r28
- 37: GETL R23, t28
- 38: GETL R28, t30
- 39: CMPUL t28, t30, t32 (-rSo)
- 40: ICRFL t32, $0x7, CR
- 41: INCEIPL $4
-
- 0x254759D8: 409C0008 bc 4,28,0x254759E0
- 42: Jc28o $0x254759E0
-
-
-. 0 254759B4 40
-. 80 DA 00 00 81 71 00 04 7F 26 1A 14 7E E6 22 14 7D 0B CA 14 7C 6B 00 D0 39 48 FF FF 7D 5C 18 38 7F 97 E0 40 40 9C 00 08
-
-==== BB 539 (0x254759DC) approx BBs exec'd 0 ====
-
- 0x254759DC: 7EFCBB78 or r28,r23,r23
- 0: GETL R23, t0
- 1: PUTL t0, R28
- 2: INCEIPL $4
-
- 0x254759E0: 7C9CC840 cmpl cr1,r28,r25
- 3: GETL R28, t2
- 4: GETL R25, t4
- 5: CMPUL t2, t4, t6 (-rSo)
- 6: ICRFL t6, $0x1, CR
- 7: INCEIPL $4
-
- 0x254759E4: 4085002C bc 4,5,0x25475A10
- 8: Jc05o $0x25475A10
-
-
-. 0 254759DC 12
-. 7E FC BB 78 7C 9C C8 40 40 85 00 2C
-
-==== BB 540 (0x254759E8) approx BBs exec'd 0 ====
-
- 0x254759E8: 80BD0014 lwz r5,20(r29)
- 0: GETL R29, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x254759EC: 70AA0002 andi. r10,r5,0x2
- 5: GETL R5, t4
- 6: ANDL $0x2, t4
- 7: PUTL t4, R10
- 8: CMP0L t4, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x254759F0: 41820838 bc 12,2,0x25476228
- 11: Js02o $0x25476228
-
-
-. 0 254759E8 12
-. 80 BD 00 14 70 AA 00 02 41 82 08 38
-
-==== BB 541 (0x254759F4) approx BBs exec'd 0 ====
-
- 0x254759F4: 7CB9E050 subf r5,r25,r28
- 0: GETL R25, t0
- 1: GETL R28, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x254759F8: 7F23CB78 or r3,r25,r25
- 5: GETL R25, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x254759FC: 38800000 li r4,0
- 8: MOVL $0x0, t6
- 9: PUTL t6, R4
- 10: INCEIPL $4
-
- 0x25475A00: 4800DD45 bl 0x25483744
- 11: MOVL $0x25475A04, t8
- 12: PUTL t8, LR
- 13: JMPo-c $0x25483744 ($4)
-
-
-. 0 254759F4 16
-. 7C B9 E0 50 7F 23 CB 78 38 80 00 00 48 00 DD 45
-
-==== BB 542 memset(0x25483744) approx BBs exec'd 0 ====
-
- 0x25483744: 28850004 cmpli cr1,r5,4
- 0: GETL R5, t0
- 1: MOVL $0x4, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0x25483748: 70670003 andi. r7,r3,0x3
- 5: GETL R3, t6
- 6: ANDL $0x3, t6
- 7: PUTL t6, R7
- 8: CMP0L t6, t8 (-rSo)
- 9: ICRFL t8, $0x0, CR
- 10: INCEIPL $4
-
- 0x2548374C: 7C661B78 or r6,r3,r3
- 11: GETL R3, t10
- 12: PUTL t10, R6
- 13: INCEIPL $4
-
- 0x25483750: 40850190 bc 4,5,0x254838E0
- 14: Jc05o $0x254838E0
-
-
-. 0 25483744 16
-. 28 85 00 04 70 67 00 03 7C 66 1B 78 40 85 01 90
-
-==== BB 543 (0x25483754) approx BBs exec'd 0 ====
-
- 0x25483754: 2A85001F cmpli cr5,r5,31
- 0: GETL R5, t0
- 1: MOVL $0x1F, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x5, CR
- 4: INCEIPL $4
-
- 0x25483758: 5084442E rlwimi r4,r4,8,16,23
- 5: GETL R4, t6
- 6: GETL R4, t8
- 7: ROLL $0x8, t8
- 8: ANDL $0xFF00, t8
- 9: ANDL $0xFFFF00FF, t6
- 10: ORL t6, t8
- 11: PUTL t8, R4
- 12: INCEIPL $4
-
- 0x2548375C: 41A20024 bc 13,2,0x25483780
- 13: Js02o $0x25483780
-
-
-. 0 25483754 12
-. 2A 85 00 1F 50 84 44 2E 41 A2 00 24
-
-==== BB 544 (0x25483780) approx BBs exec'd 0 ====
-
- 0x25483780: 7CA01120 mtcrf 0x1,r5
- 0: GETL R5, t0
- 1: ICRFL t0, $0x7, CR
- 2: INCEIPL $4
-
- 0x25483784: 5084801E rlwimi r4,r4,16,0,15
- 3: GETL R4, t2
- 4: GETL R4, t4
- 5: ROLL $0x10, t4
- 6: ANDL $0xFFFF0000, t4
- 7: ANDL $0xFFFF, t2
- 8: ORL t2, t4
- 9: PUTL t4, R4
- 10: INCEIPL $4
-
- 0x25483788: 40950198 bc 4,21,0x25483920
- 11: Jc21o $0x25483920
-
-
-. 0 25483780 12
-. 7C A0 11 20 50 84 80 1E 40 95 01 98
-
-==== BB 545 (0x2548378C) approx BBs exec'd 0 ====
-
- 0x2548378C: 70C7001C andi. r7,r6,0x1C
- 0: GETL R6, t0
- 1: ANDL $0x1C, t0
- 2: PUTL t0, R7
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x25483790: 20E70020 subfic r7,r7,32
- 6: GETL R7, t4
- 7: MOVL $0x20, t6
- 8: SBBL t4, t6 (-wCa)
- 9: PUTL t6, R7
- 10: INCEIPL $4
-
- 0x25483794: 41820040 bc 12,2,0x254837D4
- 11: Js02o $0x254837D4
-
-
-. 0 2548378C 12
-. 70 C7 00 1C 20 E7 00 20 41 82 00 40
-
-==== BB 546 (0x25483798) approx BBs exec'd 0 ====
-
- 0x25483798: 7CE01120 mtcrf 0x1,r7
- 0: GETL R7, t0
- 1: ICRFL t0, $0x7, CR
- 2: INCEIPL $4
-
- 0x2548379C: 7CC63A14 add r6,r6,r7
- 3: GETL R6, t2
- 4: GETL R7, t4
- 5: ADDL t2, t4
- 6: PUTL t4, R6
- 7: INCEIPL $4
-
- 0x254837A0: 7CA72850 subf r5,r7,r5
- 8: GETL R7, t6
- 9: GETL R5, t8
- 10: SUBL t6, t8
- 11: PUTL t8, R5
- 12: INCEIPL $4
-
- 0x254837A4: 28870010 cmpli cr1,r7,16
- 13: GETL R7, t10
- 14: MOVL $0x10, t14
- 15: CMPUL t10, t14, t12 (-rSo)
- 16: ICRFL t12, $0x1, CR
- 17: INCEIPL $4
-
- 0x254837A8: 7CC83378 or r8,r6,r6
- 18: GETL R6, t16
- 19: PUTL t16, R8
- 20: INCEIPL $4
-
- 0x254837AC: 409C000C bc 4,28,0x254837B8
- 21: Jc28o $0x254837B8
-
-
-. 0 25483798 24
-. 7C E0 11 20 7C C6 3A 14 7C A7 28 50 28 87 00 10 7C C8 33 78 40 9C 00 0C
-
-==== BB 547 (0x254837B8) approx BBs exec'd 0 ====
-
- 0x254837B8: 41840014 bc 12,4,0x254837CC
- 0: Js04o $0x254837CC
-
-
-. 0 254837B8 4
-. 41 84 00 14
-
-==== BB 548 (0x254837CC) approx BBs exec'd 0 ====
-
- 0x254837CC: 409D0008 bc 4,29,0x254837D4
- 0: Jc29o $0x254837D4
-
-
-. 0 254837CC 4
-. 40 9D 00 08
-
-==== BB 549 (0x254837D0) approx BBs exec'd 0 ====
-
- 0x254837D0: 9088FFFC stw r4,-4(r8)
- 0: GETL R4, t0
- 1: GETL R8, t2
- 2: ADDL $0xFFFFFFFC, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x254837D4: 28840000 cmpli cr1,r4,0
- 5: GETL R4, t4
- 6: MOVL $0x0, t8
- 7: CMPUL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x1, CR
- 9: INCEIPL $4
-
- 0x254837D8: 54A70035 rlwinm. r7,r5,0,0,26
- 10: GETL R5, t10
- 11: ANDL $0xFFFFFFE0, t10
- 12: PUTL t10, R7
- 13: CMP0L t10, t12 (-rSo)
- 14: ICRFL t12, $0x0, CR
- 15: INCEIPL $4
-
- 0x254837DC: 7CA01120 mtcrf 0x1,r5
- 16: GETL R5, t14
- 17: ICRFL t14, $0x7, CR
- 18: INCEIPL $4
-
- 0x254837E0: 418601A0 bc 12,6,0x25483980
- 19: Js06o $0x25483980
-
-
-. 0 254837D0 20
-. 90 88 FF FC 28 84 00 00 54 A7 00 35 7C A0 11 20 41 86 01 A0
-
-==== BB 550 (0x25483980) approx BBs exec'd 0 ====
-
- 0x25483980: 7C0802A6 mflr r0
- 0: GETL LR, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x25483984: 4182FF9C bc 12,2,0x25483920
- 3: Js02o $0x25483920
-
-
-. 0 25483980 8
-. 7C 08 02 A6 41 82 FF 9C
-
-==== BB 551 (0x25483988) approx BBs exec'd 0 ====
-
- 0x25483988: 48013679 bl 0x25497000
- 0: MOVL $0x2548398C, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x25497000 ($4)
-
-
-. 0 25483988 4
-. 48 01 36 79
-
-==== BB 552 (0x2548398C) approx BBs exec'd 0 ====
-
- 0x2548398C: 7D2802A6 mflr r9
- 0: GETL LR, t0
- 1: PUTL t0, R9
- 2: INCEIPL $4
-
- 0x25483990: 812904F0 lwz r9,1264(r9)
- 3: GETL R9, t2
- 4: ADDL $0x4F0, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R9
- 7: INCEIPL $4
-
- 0x25483994: 81090000 lwz r8,0(r9)
- 8: GETL R9, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R8
- 11: INCEIPL $4
-
- 0x25483998: 7C0803A6 mtlr r0
- 12: GETL R0, t10
- 13: PUTL t10, LR
- 14: INCEIPL $4
-
- 0x2548399C: 28880000 cmpli cr1,r8,0
- 15: GETL R8, t12
- 16: MOVL $0x0, t16
- 17: CMPUL t12, t16, t14 (-rSo)
- 18: ICRFL t14, $0x1, CR
- 19: INCEIPL $4
-
- 0x254839A0: 4186FE44 bc 12,6,0x254837E4
- 20: Js06o $0x254837E4
-
-
-. 0 2548398C 24
-. 7D 28 02 A6 81 29 04 F0 81 09 00 00 7C 08 03 A6 28 88 00 00 41 86 FE 44
-
-==== BB 553 (0x254839A4) approx BBs exec'd 0 ====
-
- 0x254839A4: 28880020 cmpli cr1,r8,32
- 0: GETL R8, t0
- 1: MOVL $0x20, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0x254839A8: 4186FEBC bc 12,6,0x25483864
- 5: Js06o $0x25483864
-
-
-. 0 254839A4 8
-. 28 88 00 20 41 86 FE BC
-
-==== BB 554 (0x25483864) approx BBs exec'd 0 ====
-
- 0x25483864: 54A506FE rlwinm r5,r5,0,27,31
- 0: GETL R5, t0
- 1: ANDL $0x1F, t0
- 2: PUTL t0, R5
- 3: INCEIPL $4
-
- 0x25483868: 7CE02120 mtcrf 0x2,r7
- 4: GETL R7, t2
- 5: ICRFL t2, $0x6, CR
- 6: INCEIPL $4
-
- 0x2548386C: 54E0C9FF rlwinm. r0,r7,25,7,31
- 7: GETL R7, t4
- 8: SHRL $0x7, t4
- 9: PUTL t4, R0
- 10: CMP0L t4, t6 (-rSo)
- 11: ICRFL t6, $0x0, CR
- 12: INCEIPL $4
-
- 0x25483870: 7C0903A6 mtctr r0
- 13: GETL R0, t8
- 14: PUTL t8, CTR
- 15: INCEIPL $4
-
- 0x25483874: 38E00020 li r7,32
- 16: MOVL $0x20, t10
- 17: PUTL t10, R7
- 18: INCEIPL $4
-
- 0x25483878: 3900FFC0 li r8,-64
- 19: MOVL $0xFFFFFFC0, t12
- 20: PUTL t12, R8
- 21: INCEIPL $4
-
- 0x2548387C: 28850010 cmpli cr1,r5,16
- 22: GETL R5, t14
- 23: MOVL $0x10, t18
- 24: CMPUL t14, t18, t16 (-rSo)
- 25: ICRFL t16, $0x1, CR
- 26: INCEIPL $4
-
- 0x25483880: 409A000C bc 4,26,0x2548388C
- 27: Jc26o $0x2548388C
-
-
-. 0 25483864 32
-. 54 A5 06 FE 7C E0 21 20 54 E0 C9 FF 7C 09 03 A6 38 E0 00 20 39 00 FF C0 28 85 00 10 40 9A 00 0C
-
-==== BB 555 (0x2548388C) approx BBs exec'd 0 ====
-
- 0x2548388C: 3920FFE0 li r9,-32
- 0: MOVL $0xFFFFFFE0, t0
- 1: PUTL t0, R9
- 2: INCEIPL $4
-
- 0x25483890: 40990010 bc 4,25,0x254838A0
- 3: Jc25o $0x254838A0
-
-
-. 0 2548388C 8
-. 39 20 FF E0 40 99 00 10
-
-==== BB 556 (0x254838A0) approx BBs exec'd 0 ====
-
- 0x254838A0: 2A850000 cmpli cr5,r5,0
- 0: GETL R5, t0
- 1: MOVL $0x0, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x5, CR
- 4: INCEIPL $4
-
- 0x254838A4: 4182007C bc 12,2,0x25483920
- 5: Js02o $0x25483920
-
-
-. 0 254838A0 8
-. 2A 85 00 00 41 82 00 7C
-
-==== BB 557 (0x254838A8) approx BBs exec'd 0 ====
-
- 0x254838A8: 7C0037EC dcbz r0,r6
- 0: GETL R6, t0
- 1: ANDL $0xFFFFFFE0, t0
- 2: MOVL $0x0, t2
- 3: STL t2, (t0)
- 4: ADDL $0x4, t0
- 5: STL t2, (t0)
- 6: ADDL $0x4, t0
- 7: STL t2, (t0)
- 8: ADDL $0x4, t0
- 9: STL t2, (t0)
- 10: ADDL $0x4, t0
- 11: STL t2, (t0)
- 12: ADDL $0x4, t0
- 13: STL t2, (t0)
- 14: ADDL $0x4, t0
- 15: STL t2, (t0)
- 16: ADDL $0x4, t0
- 17: STL t2, (t0)
- 18: INCEIPL $4
-
- 0x254838AC: 7C0737EC dcbz r7,r6
- 19: GETL R6, t4
- 20: GETL R7, t6
- 21: ADDL t6, t4
- 22: ANDL $0xFFFFFFE0, t4
- 23: MOVL $0x0, t8
- 24: STL t8, (t4)
- 25: ADDL $0x4, t4
- 26: STL t8, (t4)
- 27: ADDL $0x4, t4
- 28: STL t8, (t4)
- 29: ADDL $0x4, t4
- 30: STL t8, (t4)
- 31: ADDL $0x4, t4
- 32: STL t8, (t4)
- 33: ADDL $0x4, t4
- 34: STL t8, (t4)
- 35: ADDL $0x4, t4
- 36: STL t8, (t4)
- 37: ADDL $0x4, t4
- 38: STL t8, (t4)
- 39: INCEIPL $4
-
- 0x254838B0: 38C60080 addi r6,r6,128
- 40: GETL R6, t10
- 41: ADDL $0x80, t10
- 42: PUTL t10, R6
- 43: INCEIPL $4
-
- 0x254838B4: 7C0837EC dcbz r8,r6
- 44: GETL R6, t12
- 45: GETL R8, t14
- 46: ADDL t14, t12
- 47: ANDL $0xFFFFFFE0, t12
- 48: MOVL $0x0, t16
- 49: STL t16, (t12)
- 50: ADDL $0x4, t12
- 51: STL t16, (t12)
- 52: ADDL $0x4, t12
- 53: STL t16, (t12)
- 54: ADDL $0x4, t12
- 55: STL t16, (t12)
- 56: ADDL $0x4, t12
- 57: STL t16, (t12)
- 58: ADDL $0x4, t12
- 59: STL t16, (t12)
- 60: ADDL $0x4, t12
- 61: STL t16, (t12)
- 62: ADDL $0x4, t12
- 63: STL t16, (t12)
- 64: INCEIPL $4
-
- 0x254838B8: 7C0937EC dcbz r9,r6
- 65: GETL R6, t18
- 66: GETL R9, t20
- 67: ADDL t20, t18
- 68: ANDL $0xFFFFFFE0, t18
- 69: MOVL $0x0, t22
- 70: STL t22, (t18)
- 71: ADDL $0x4, t18
- 72: STL t22, (t18)
- 73: ADDL $0x4, t18
- 74: STL t22, (t18)
- 75: ADDL $0x4, t18
- 76: STL t22, (t18)
- 77: ADDL $0x4, t18
- 78: STL t22, (t18)
- 79: ADDL $0x4, t18
- 80: STL t22, (t18)
- 81: ADDL $0x4, t18
- 82: STL t22, (t18)
- 83: ADDL $0x4, t18
- 84: STL t22, (t18)
- 85: INCEIPL $4
-
- 0x254838BC: 4200FFEC bc 16,0,0x254838A8
- 86: GETL CTR, t24
- 87: ADDL $0xFFFFFFFF, t24
- 88: PUTL t24, CTR
- 89: JIFZL t24, $0x254838C0
- 90: JMPo $0x254838A8 ($4)
-
-
-. 0 254838A8 24
-. 7C 00 37 EC 7C 07 37 EC 38 C6 00 80 7C 08 37 EC 7C 09 37 EC 42 00 FF EC
-
-==== BB 558 (0x254838C0) approx BBs exec'd 0 ====
-
- 0x254838C0: 4D960020 bclr 12,22
- 0: GETL LR, t0
- 1: Js22o-r t0
-
-
-. 0 254838C0 4
-. 4D 96 00 20
-
-==== BB 559 (0x254838C4) approx BBs exec'd 0 ====
-
- 0x254838C4: 48000060 b 0x25483924
- 0: JMPo $0x25483924 ($4)
-
-
-. 0 254838C4 4
-. 48 00 00 60
-
-==== BB 560 (0x25483924) approx BBs exec'd 0 ====
-
- 0x25483924: 7CC62A14 add r6,r6,r5
- 0: GETL R6, t0
- 1: GETL R5, t2
- 2: ADDL t0, t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x25483928: 419F0020 bc 12,31,0x25483948
- 5: Js31o $0x25483948
-
-
-. 0 25483924 8
-. 7C C6 2A 14 41 9F 00 20
-
-==== BB 561 (0x2548392C) approx BBs exec'd 0 ====
-
- 0x2548392C: 419E0024 bc 12,30,0x25483950
- 0: Js30o $0x25483950
-
-
-. 0 2548392C 4
-. 41 9E 00 24
-
-==== BB 562 (0x25483930) approx BBs exec'd 0 ====
-
- 0x25483930: 419D0028 bc 12,29,0x25483958
- 0: Js29o $0x25483958
-
-
-. 0 25483930 4
-. 41 9D 00 28
-
-==== BB 563 (0x25483958) approx BBs exec'd 0 ====
-
- 0x25483958: 9486FFFC stwu r4,-4(r6)
- 0: GETL R4, t0
- 1: GETL R6, t2
- 2: ADDL $0xFFFFFFFC, t2
- 3: PUTL t2, R6
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2548395C: 41840014 bc 12,4,0x25483970
- 6: Js04o $0x25483970
-
-
-. 0 25483958 8
-. 94 86 FF FC 41 84 00 14
-
-==== BB 564 (0x25483970) approx BBs exec'd 0 ====
-
- 0x25483970: 4C9C0020 bclr 4,28
- 0: GETL LR, t0
- 1: Jc28o-r t0
-
-
-. 0 25483970 4
-. 4C 9C 00 20
-
-==== BB 565 (0x25475A04) approx BBs exec'd 0 ====
-
- 0x25475A04: 80BD0014 lwz r5,20(r29)
- 0: GETL R29, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25475A08: 70A00002 andi. r0,r5,0x2
- 5: GETL R5, t4
- 6: ANDL $0x2, t4
- 7: PUTL t4, R0
- 8: CMP0L t4, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x25475A0C: 41820808 bc 12,2,0x25476214
- 11: Js02o $0x25476214
-
-
-. 0 25475A04 12
-. 80 BD 00 14 70 A0 00 02 41 82 08 08
-
-==== BB 566 (0x25475A10) approx BBs exec'd 0 ====
-
- 0x25475A10: 7F97E040 cmpl cr7,r23,r28
- 0: GETL R23, t0
- 1: GETL R28, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x7, CR
- 4: INCEIPL $4
-
- 0x25475A14: 419D06AC bc 12,29,0x254760C0
- 5: Js29o $0x254760C0
-
-
-. 0 25475A10 8
-. 7F 97 E0 40 41 9D 06 AC
-
-==== BB 567 (0x25475C1C) approx BBs exec'd 0 ====
-
- 0x25475C1C: 82A10000 lwz r21,0(r1)
- 0: GETL R1, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R21
- 3: INCEIPL $4
-
- 0x25475C20: 7E419378 or r1,r18,r18
- 4: GETL R18, t4
- 5: PUTL t4, R1
- 6: INCEIPL $4
-
- 0x25475C24: 92A10000 stw r21,0(r1)
- 7: GETL R21, t6
- 8: GETL R1, t8
- 9: STL t6, (t8)
- 10: INCEIPL $4
-
- 0x25475C28: 813A0008 lwz r9,8(r26)
- 11: GETL R26, t10
- 12: ADDL $0x8, t10
- 13: LDL (t10), t12
- 14: PUTL t12, R9
- 15: INCEIPL $4
-
- 0x25475C2C: 2F090000 cmpi cr6,r9,0
- 16: GETL R9, t14
- 17: CMP0L t14, t16 (-rSo)
- 18: ICRFL t16, $0x6, CR
- 19: INCEIPL $4
-
- 0x25475C30: 409A0264 bc 4,26,0x25475E94
- 20: Jc26o $0x25475E94
-
-
-. 0 25475C1C 24
-. 82 A1 00 00 7E 41 93 78 92 A1 00 00 81 3A 00 08 2F 09 00 00 40 9A 02 64
-
-==== BB 568 (0x25475E94) approx BBs exec'd 0 ====
-
- 0x25475E94: 825A0000 lwz r18,0(r26)
- 0: GETL R26, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R18
- 3: INCEIPL $4
-
- 0x25475E98: 7D299214 add r9,r9,r18
- 4: GETL R9, t4
- 5: GETL R18, t6
- 6: ADDL t4, t6
- 7: PUTL t6, R9
- 8: INCEIPL $4
-
- 0x25475E9C: 913A0008 stw r9,8(r26)
- 9: GETL R9, t8
- 10: GETL R26, t10
- 11: ADDL $0x8, t10
- 12: STL t8, (t10)
- 13: INCEIPL $4
-
- 0x25475EA0: 4BFFFD98 b 0x25475C38
- 14: JMPo $0x25475C38 ($4)
-
-
-. 0 25475E94 16
-. 82 5A 00 00 7D 29 92 14 91 3A 00 08 4B FF FD 98
-
-==== BB 569 (0x25475C38) approx BBs exec'd 0 ====
-
- 0x25475C38: 2E090000 cmpi cr4,r9,0
- 0: GETL R9, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x4, CR
- 3: INCEIPL $4
-
- 0x25475C3C: 7D2A4B78 or r10,r9,r9
- 4: GETL R9, t4
- 5: PUTL t4, R10
- 6: INCEIPL $4
-
- 0x25475C40: 41920264 bc 12,18,0x25475EA4
- 7: Js18o $0x25475EA4
-
-
-. 0 25475C38 12
-. 2E 09 00 00 7D 2A 4B 78 41 92 02 64
-
-==== BB 570 (0x25475C44) approx BBs exec'd 0 ====
-
- 0x25475C44: 81690000 lwz r11,0(r9)
- 0: GETL R9, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R11
- 3: INCEIPL $4
-
- 0x25475C48: 391A0020 addi r8,r26,32
- 4: GETL R26, t4
- 5: ADDL $0x20, t4
- 6: PUTL t4, R8
- 7: INCEIPL $4
-
- 0x25475C4C: 2C0B0000 cmpi cr0,r11,0
- 8: GETL R11, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x0, CR
- 11: INCEIPL $4
-
- 0x25475C50: 41820064 bc 12,2,0x25475CB4
- 12: Js02o $0x25475CB4
-
-
-. 0 25475C44 16
-. 81 69 00 00 39 1A 00 20 2C 0B 00 00 41 82 00 64
-
-==== BB 571 (0x25475C54) approx BBs exec'd 0 ====
-
- 0x25475C54: 3C607000 lis r3,28672
- 0: MOVL $0x70000000, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25475C58: 3CE06FFF lis r7,28671
- 3: MOVL $0x6FFF0000, t2
- 4: PUTL t2, R7
- 5: INCEIPL $4
-
- 0x25475C5C: 3CA06FFF lis r5,28671
- 6: MOVL $0x6FFF0000, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x25475C60: 3F806FFF lis r28,28671
- 9: MOVL $0x6FFF0000, t6
- 10: PUTL t6, R28
- 11: INCEIPL $4
-
- 0x25475C64: 3DE06FFF lis r15,28671
- 12: MOVL $0x6FFF0000, t8
- 13: PUTL t8, R15
- 14: INCEIPL $4
-
- 0x25475C68: 3FA06FFF lis r29,28671
- 15: MOVL $0x6FFF0000, t10
- 16: PUTL t10, R29
- 17: INCEIPL $4
-
- 0x25475C6C: 60660021 ori r6,r3,0x21
- 18: MOVL $0x70000021, t12
- 19: PUTL t12, R6
- 20: INCEIPL $4
-
- 0x25475C70: 60E7FFFF ori r7,r7,0xFFFF
- 21: MOVL $0x6FFFFFFF, t14
- 22: PUTL t14, R7
- 23: INCEIPL $4
-
- 0x25475C74: 60A5FDFF ori r5,r5,0xFDFF
- 24: MOVL $0x6FFFFDFF, t16
- 25: PUTL t16, R5
- 26: INCEIPL $4
-
- 0x25475C78: 6384FE34 ori r4,r28,0xFE34
- 27: MOVL $0x6FFFFE34, t18
- 28: PUTL t18, R4
- 29: INCEIPL $4
-
- 0x25475C7C: 61E3FEFF ori r3,r15,0xFEFF
- 30: MOVL $0x6FFFFEFF, t20
- 31: PUTL t20, R3
- 32: INCEIPL $4
-
- 0x25475C80: 63BDFF40 ori r29,r29,0xFF40
- 33: MOVL $0x6FFFFF40, t22
- 34: PUTL t22, R29
- 35: INCEIPL $4
-
- 0x25475C84: 2F8B0021 cmpi cr7,r11,33
- 36: GETL R11, t24
- 37: MOVL $0x21, t28
- 38: CMPL t24, t28, t26 (-rSo)
- 39: ICRFL t26, $0x7, CR
- 40: INCEIPL $4
-
- 0x25475C88: 5560103A rlwinm r0,r11,2,0,29
- 41: GETL R11, t30
- 42: SHLL $0x2, t30
- 43: PUTL t30, R0
- 44: INCEIPL $4
-
- 0x25475C8C: 409D0018 bc 4,29,0x25475CA4
- 45: Jc29o $0x25475CA4
-
-
-. 0 25475C54 60
-. 3C 60 70 00 3C E0 6F FF 3C A0 6F FF 3F 80 6F FF 3D E0 6F FF 3F A0 6F FF 60 66 00 21 60 E7 FF FF 60 A5 FD FF 63 84 FE 34 61 E3 FE FF 63 BD FF 40 2F 8B 00 21 55 60 10 3A 40 9D 00 18
-
-==== BB 572 (0x25475CA4) approx BBs exec'd 0 ====
-
- 0x25475CA4: 7D48012E stwx r10,r8,r0
- 0: GETL R0, t0
- 1: GETL R8, t2
- 2: ADDL t2, t0
- 3: GETL R10, t4
- 4: STL t4, (t0)
- 5: INCEIPL $4
-
- 0x25475CA8: 856A0008 lwzu r11,8(r10)
- 6: GETL R10, t6
- 7: ADDL $0x8, t6
- 8: PUTL t6, R10
- 9: LDL (t6), t8
- 10: PUTL t8, R11
- 11: INCEIPL $4
-
- 0x25475CAC: 2F8B0000 cmpi cr7,r11,0
- 12: GETL R11, t10
- 13: CMP0L t10, t12 (-rSo)
- 14: ICRFL t12, $0x7, CR
- 15: INCEIPL $4
-
- 0x25475CB0: 409EFFD4 bc 4,30,0x25475C84
- 16: Jc30o $0x25475C84
-
-
-. 0 25475CA4 16
-. 7D 48 01 2E 85 6A 00 08 2F 8B 00 00 40 9E FF D4
-
-==== BB 573 (0x25475C84) approx BBs exec'd 0 ====
-
- 0x25475C84: 2F8B0021 cmpi cr7,r11,33
- 0: GETL R11, t0
- 1: MOVL $0x21, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0x25475C88: 5560103A rlwinm r0,r11,2,0,29
- 5: GETL R11, t6
- 6: SHLL $0x2, t6
- 7: PUTL t6, R0
- 8: INCEIPL $4
-
- 0x25475C8C: 409D0018 bc 4,29,0x25475CA4
- 9: Jc29o $0x25475CA4
-
-
-. 0 25475C84 12
-. 2F 8B 00 21 55 60 10 3A 40 9D 00 18
-
-==== BB 574 (0x25475C90) approx BBs exec'd 0 ====
-
- 0x25475C90: 7D2B3850 subf r9,r11,r7
- 0: GETL R11, t0
- 1: GETL R7, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25475C94: 2889000F cmpli cr1,r9,15
- 5: GETL R9, t4
- 6: MOVL $0xF, t8
- 7: CMPUL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x1, CR
- 9: INCEIPL $4
-
- 0x25475C98: 418503BC bc 12,5,0x25476054
- 10: Js05o $0x25476054
-
-
-. 0 25475C90 12
-. 7D 2B 38 50 28 89 00 0F 41 85 03 BC
-
-==== BB 575 (0x25475C9C) approx BBs exec'd 0 ====
-
- 0x25475C9C: 7C0B3050 subf r0,r11,r6
- 0: GETL R11, t0
- 1: GETL R6, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25475CA0: 5400103A rlwinm r0,r0,2,0,29
- 5: GETL R0, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x25475CA4: 7D48012E stwx r10,r8,r0
- 9: GETL R0, t6
- 10: GETL R8, t8
- 11: ADDL t8, t6
- 12: GETL R10, t10
- 13: STL t10, (t6)
- 14: INCEIPL $4
-
- 0x25475CA8: 856A0008 lwzu r11,8(r10)
- 15: GETL R10, t12
- 16: ADDL $0x8, t12
- 17: PUTL t12, R10
- 18: LDL (t12), t14
- 19: PUTL t14, R11
- 20: INCEIPL $4
-
- 0x25475CAC: 2F8B0000 cmpi cr7,r11,0
- 21: GETL R11, t16
- 22: CMP0L t16, t18 (-rSo)
- 23: ICRFL t18, $0x7, CR
- 24: INCEIPL $4
-
- 0x25475CB0: 409EFFD4 bc 4,30,0x25475C84
- 25: Jc30o $0x25475C84
-
-
-. 0 25475C9C 24
-. 7C 0B 30 50 54 00 10 3A 7D 48 01 2E 85 6A 00 08 2F 8B 00 00 40 9E FF D4
-
-==== BB 576 (0x25475CB4) approx BBs exec'd 0 ====
-
- 0x25475CB4: 817A0000 lwz r11,0(r26)
- 0: GETL R26, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R11
- 3: INCEIPL $4
-
- 0x25475CB8: 2C8B0000 cmpi cr1,r11,0
- 4: GETL R11, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x1, CR
- 7: INCEIPL $4
-
- 0x25475CBC: 418600AC bc 12,6,0x25475D68
- 8: Js06o $0x25475D68
-
-
-. 0 25475CB4 12
-. 81 7A 00 00 2C 8B 00 00 41 86 00 AC
-
-==== BB 577 (0x25475CC0) approx BBs exec'd 0 ====
-
- 0x25475CC0: 81280010 lwz r9,16(r8)
- 0: GETL R8, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25475CC4: 2F090000 cmpi cr6,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x25475CC8: 419A0010 bc 12,26,0x25475CD8
- 9: Js26o $0x25475CD8
-
-
-. 0 25475CC0 12
-. 81 28 00 10 2F 09 00 00 41 9A 00 10
-
-==== BB 578 (0x25475CCC) approx BBs exec'd 0 ====
-
- 0x25475CCC: 81490004 lwz r10,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x25475CD0: 7C8A5A14 add r4,r10,r11
- 5: GETL R10, t4
- 6: GETL R11, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R4
- 9: INCEIPL $4
-
- 0x25475CD4: 90890004 stw r4,4(r9)
- 10: GETL R4, t8
- 11: GETL R9, t10
- 12: ADDL $0x4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25475CD8: 8128000C lwz r9,12(r8)
- 15: GETL R8, t12
- 16: ADDL $0xC, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25475CDC: 2E090000 cmpi cr4,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x4, CR
- 23: INCEIPL $4
-
- 0x25475CE0: 41920010 bc 12,18,0x25475CF0
- 24: Js18o $0x25475CF0
-
-
-. 0 25475CCC 24
-. 81 49 00 04 7C 8A 5A 14 90 89 00 04 81 28 00 0C 2E 09 00 00 41 92 00 10
-
-==== BB 579 (0x25475CE4) approx BBs exec'd 0 ====
-
- 0x25475CE4: 82490004 lwz r18,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R18
- 4: INCEIPL $4
-
- 0x25475CE8: 7CD25A14 add r6,r18,r11
- 5: GETL R18, t4
- 6: GETL R11, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R6
- 9: INCEIPL $4
-
- 0x25475CEC: 90C90004 stw r6,4(r9)
- 10: GETL R6, t8
- 11: GETL R9, t10
- 12: ADDL $0x4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25475CF0: 81280014 lwz r9,20(r8)
- 15: GETL R8, t12
- 16: ADDL $0x14, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25475CF4: 2C090000 cmpi cr0,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x0, CR
- 23: INCEIPL $4
-
- 0x25475CF8: 41820010 bc 12,2,0x25475D08
- 24: Js02o $0x25475D08
-
-
-. 0 25475CE4 24
-. 82 49 00 04 7C D2 5A 14 90 C9 00 04 81 28 00 14 2C 09 00 00 41 82 00 10
-
-==== BB 580 (0x25475CFC) approx BBs exec'd 0 ====
-
- 0x25475CFC: 81E90004 lwz r15,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R15
- 4: INCEIPL $4
-
- 0x25475D00: 7FAF5A14 add r29,r15,r11
- 5: GETL R15, t4
- 6: GETL R11, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R29
- 9: INCEIPL $4
-
- 0x25475D04: 93A90004 stw r29,4(r9)
- 10: GETL R29, t8
- 11: GETL R9, t10
- 12: ADDL $0x4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25475D08: 81280018 lwz r9,24(r8)
- 15: GETL R8, t12
- 16: ADDL $0x18, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25475D0C: 2F890000 cmpi cr7,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x7, CR
- 23: INCEIPL $4
-
- 0x25475D10: 419E0010 bc 12,30,0x25475D20
- 24: Js30o $0x25475D20
-
-
-. 0 25475CFC 24
-. 81 E9 00 04 7F AF 5A 14 93 A9 00 04 81 28 00 18 2F 89 00 00 41 9E 00 10
-
-==== BB 581 (0x25475D14) approx BBs exec'd 0 ====
-
- 0x25475D14: 80A90004 lwz r5,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25475D18: 7F855A14 add r28,r5,r11
- 5: GETL R5, t4
- 6: GETL R11, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R28
- 9: INCEIPL $4
-
- 0x25475D1C: 93890004 stw r28,4(r9)
- 10: GETL R28, t8
- 11: GETL R9, t10
- 12: ADDL $0x4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25475D20: 8128001C lwz r9,28(r8)
- 15: GETL R8, t12
- 16: ADDL $0x1C, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25475D24: 2C890000 cmpi cr1,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x1, CR
- 23: INCEIPL $4
-
- 0x25475D28: 41860010 bc 12,6,0x25475D38
- 24: Js06o $0x25475D38
-
-
-. 0 25475D14 24
-. 80 A9 00 04 7F 85 5A 14 93 89 00 04 81 28 00 1C 2C 89 00 00 41 86 00 10
-
-==== BB 582 (0x25475D2C) approx BBs exec'd 0 ====
-
- 0x25475D2C: 80E90004 lwz r7,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x25475D30: 7C675A14 add r3,r7,r11
- 5: GETL R7, t4
- 6: GETL R11, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x25475D34: 90690004 stw r3,4(r9)
- 10: GETL R3, t8
- 11: GETL R9, t10
- 12: ADDL $0x4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25475D38: 8128005C lwz r9,92(r8)
- 15: GETL R8, t12
- 16: ADDL $0x5C, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25475D3C: 2F090000 cmpi cr6,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x6, CR
- 23: INCEIPL $4
-
- 0x25475D40: 419A0010 bc 12,26,0x25475D50
- 24: Js26o $0x25475D50
-
-
-. 0 25475D2C 24
-. 80 E9 00 04 7C 67 5A 14 90 69 00 04 81 28 00 5C 2F 09 00 00 41 9A 00 10
-
-==== BB 583 (0x25475D44) approx BBs exec'd 0 ====
-
- 0x25475D44: 80090004 lwz r0,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25475D48: 7EE05A14 add r23,r0,r11
- 5: GETL R0, t4
- 6: GETL R11, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R23
- 9: INCEIPL $4
-
- 0x25475D4C: 92E90004 stw r23,4(r9)
- 10: GETL R23, t8
- 11: GETL R9, t10
- 12: ADDL $0x4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25475D50: 812800C4 lwz r9,196(r8)
- 15: GETL R8, t12
- 16: ADDL $0xC4, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25475D54: 2E090000 cmpi cr4,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x4, CR
- 23: INCEIPL $4
-
- 0x25475D58: 41920010 bc 12,18,0x25475D68
- 24: Js18o $0x25475D68
-
-
-. 0 25475D44 24
-. 80 09 00 04 7E E0 5A 14 92 E9 00 04 81 28 00 C4 2E 09 00 00 41 92 00 10
-
-==== BB 584 (0x25475D5C) approx BBs exec'd 0 ====
-
- 0x25475D5C: 83290004 lwz r25,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R25
- 4: INCEIPL $4
-
- 0x25475D60: 7D995A14 add r12,r25,r11
- 5: GETL R25, t4
- 6: GETL R11, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R12
- 9: INCEIPL $4
-
- 0x25475D64: 91890004 stw r12,4(r9)
- 10: GETL R12, t8
- 11: GETL R9, t10
- 12: ADDL $0x4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25475D68: 81280078 lwz r9,120(r8)
- 15: GETL R8, t12
- 16: ADDL $0x78, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25475D6C: 2C090000 cmpi cr0,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x0, CR
- 23: INCEIPL $4
-
- 0x25475D70: 41820030 bc 12,2,0x25475DA0
- 24: Js02o $0x25475DA0
-
-
-. 0 25475D5C 24
-. 83 29 00 04 7D 99 5A 14 91 89 00 04 81 28 00 78 2C 09 00 00 41 82 00 30
-
-==== BB 585 (0x25475DA0) approx BBs exec'd 0 ====
-
- 0x25475DA0: 81280098 lwz r9,152(r8)
- 0: GETL R8, t0
- 1: ADDL $0x98, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25475DA4: 2F890000 cmpi cr7,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x25475DA8: 419E0354 bc 12,30,0x254760FC
- 9: Js30o $0x254760FC
-
-
-. 0 25475DA0 12
-. 81 28 00 98 2F 89 00 00 41 9E 03 54
-
-==== BB 586 (0x25475DAC) approx BBs exec'd 0 ====
-
- 0x25475DAC: 81690004 lwz r11,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25475DB0: 71600001 andi. r0,r11,0x1
- 5: GETL R11, t4
- 6: ANDL $0x1, t4
- 7: PUTL t4, R0
- 8: CMP0L t4, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x25475DB4: 917A01FC stw r11,508(r26)
- 11: GETL R11, t8
- 12: GETL R26, t10
- 13: ADDL $0x1FC, t10
- 14: STL t8, (t10)
- 15: INCEIPL $4
-
- 0x25475DB8: 41820008 bc 12,2,0x25475DC0
- 16: Js02o $0x25475DC0
-
-
-. 0 25475DAC 16
-. 81 69 00 04 71 60 00 01 91 7A 01 FC 41 82 00 08
-
-==== BB 587 (0x25475DC0) approx BBs exec'd 0 ====
-
- 0x25475DC0: 81280074 lwz r9,116(r8)
- 0: GETL R8, t0
- 1: ADDL $0x74, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25475DC4: 2C890000 cmpi cr1,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x25475DC8: 418600E0 bc 12,6,0x25475EA8
- 9: Js06o $0x25475EA8
-
-
-. 0 25475DC0 12
-. 81 28 00 74 2C 89 00 00 41 86 00 E0
-
-==== BB 588 (0x25475EA8) approx BBs exec'd 0 ====
-
- 0x25475EA8: 71690040 andi. r9,r11,0x40
- 0: GETL R11, t0
- 1: ANDL $0x40, t0
- 2: PUTL t0, R9
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x25475EAC: 408202A4 bc 4,2,0x25476150
- 6: Jc02o $0x25476150
-
-
-. 0 25475EA8 8
-. 71 69 00 40 40 82 02 A4
-
-==== BB 589 (0x25475EB0) approx BBs exec'd 0 ====
-
- 0x25475EB0: 813A014C lwz r9,332(r26)
- 0: GETL R26, t0
- 1: ADDL $0x14C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25475EB4: 2F890000 cmpi cr7,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x25475EB8: 419E01CC bc 12,30,0x25476084
- 9: Js30o $0x25476084
-
-
-. 0 25475EB0 12
-. 81 3A 01 4C 2F 89 00 00 41 9E 01 CC
-
-==== BB 590 (0x25475EBC) approx BBs exec'd 0 ====
-
- 0x25475EBC: 825A0000 lwz r18,0(r26)
- 0: GETL R26, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R18
- 3: INCEIPL $4
-
- 0x25475EC0: 7CC99214 add r6,r9,r18
- 4: GETL R9, t4
- 5: GETL R18, t6
- 6: ADDL t4, t6
- 7: PUTL t6, R6
- 8: INCEIPL $4
-
- 0x25475EC4: 90DA014C stw r6,332(r26)
- 9: GETL R6, t8
- 10: GETL R26, t10
- 11: ADDL $0x14C, t10
- 12: STL t8, (t10)
- 13: INCEIPL $4
-
- 0x25475EC8: 80BE04C8 lwz r5,1224(r30)
- 14: GETL R30, t12
- 15: ADDL $0x4C8, t12
- 16: LDL (t12), t14
- 17: PUTL t14, R5
- 18: INCEIPL $4
-
- 0x25475ECC: 839F00A4 lwz r28,164(r31)
- 19: GETL R31, t16
- 20: ADDL $0xA4, t16
- 21: LDL (t16), t18
- 22: PUTL t18, R28
- 23: INCEIPL $4
-
- 0x25475ED0: 81E50400 lwz r15,1024(r5)
- 24: GETL R5, t20
- 25: ADDL $0x400, t20
- 26: LDL (t20), t22
- 27: PUTL t22, R15
- 28: INCEIPL $4
-
- 0x25475ED4: 7F9D7878 andc r29,r28,r15
- 29: GETL R28, t24
- 30: GETL R15, t26
- 31: NOTL t26
- 32: ANDL t24, t26
- 33: PUTL t26, R29
- 34: INCEIPL $4
-
- 0x25475ED8: 73AB0001 andi. r11,r29,0x1
- 35: GETL R29, t28
- 36: ANDL $0x1, t28
- 37: PUTL t28, R11
- 38: CMP0L t28, t30 (-rSo)
- 39: ICRFL t30, $0x0, CR
- 40: INCEIPL $4
-
- 0x25475EDC: 408202B0 bc 4,2,0x2547618C
- 41: Jc02o $0x2547618C
-
-
-. 0 25475EBC 36
-. 82 5A 00 00 7C C9 92 14 90 DA 01 4C 80 BE 04 C8 83 9F 00 A4 81 E5 04 00 7F 9D 78 78 73 AB 00 01 40 82 02 B0
-
-==== BB 591 (0x25475EE0) approx BBs exec'd 0 ====
-
- 0x25475EE0: 813A0218 lwz r9,536(r26)
- 0: GETL R26, t0
- 1: ADDL $0x218, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25475EE4: 2F890000 cmpi cr7,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x25475EE8: 419E0010 bc 12,30,0x25475EF8
- 9: Js30o $0x25475EF8
-
-
-. 0 25475EE0 12
-. 81 3A 02 18 2F 89 00 00 41 9E 00 10
-
-==== BB 592 (0x25475EF8) approx BBs exec'd 0 ====
-
- 0x25475EF8: 7E639B78 or r3,r19,r19
- 0: GETL R19, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25475EFC: 4800C0F5 bl 0x25481FF0
- 3: MOVL $0x25475F00, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x25481FF0 ($4)
-
-
-. 0 25475EF8 8
-. 7E 63 9B 78 48 00 C0 F5
-
-==== BB 593 close(0x25481FF0) approx BBs exec'd 0 ====
-
- 0x25481FF0: 38000006 li r0,6
- 0: MOVL $0x6, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x25481FF4: 44000002 sc
- 3: JMPo-sys $0x25481FF8 ($4)
-
-
-. 0 25481FF0 8
-. 38 00 00 06 44 00 00 02
-
-==== BB 594 (0x25481FF8) approx BBs exec'd 0 ====
-
- 0x25481FF8: 4CA30020 bclr 5,3
- 0: GETL LR, t0
- 1: Jc03o-r t0
-
-
-. 0 25481FF8 4
-. 4C A3 00 20
-
-==== BB 595 (0x25475F00) approx BBs exec'd 0 ====
-
- 0x25475F00: 811E01C8 lwz r8,456(r30)
- 0: GETL R30, t0
- 1: ADDL $0x1C8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x25475F04: 2C830000 cmpi cr1,r3,0
- 5: GETL R3, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x25475F08: 40A6FB68 bc 5,6,0x25475A70
- 9: Jc06o $0x25475A70
-
-
-. 0 25475F00 12
-. 81 1E 01 C8 2C 83 00 00 40 A6 FB 68
-
-==== BB 596 (0x25475F0C) approx BBs exec'd 0 ====
-
- 0x25475F0C: 817A0180 lwz r11,384(r26)
- 0: GETL R26, t0
- 1: ADDL $0x180, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25475F10: 81FF009C lwz r15,156(r31)
- 5: GETL R31, t4
- 6: ADDL $0x9C, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R15
- 9: INCEIPL $4
-
- 0x25475F14: 557D0002 rlwinm r29,r11,0,0,1
- 10: GETL R11, t8
- 11: ANDL $0xC0000000, t8
- 12: PUTL t8, R29
- 13: INCEIPL $4
-
- 0x25475F18: 69F30002 xori r19,r15,0x2
- 14: GETL R15, t10
- 15: XORL $0x2, t10
- 16: PUTL t10, R19
- 17: INCEIPL $4
-
- 0x25475F1C: 21330000 subfic r9,r19,0
- 18: GETL R19, t12
- 19: MOVL $0x0, t14
- 20: SBBL t12, t14 (-wCa)
- 21: PUTL t14, R9
- 22: INCEIPL $4
-
- 0x25475F20: 7E699914 adde r19,r9,r19
- 23: GETL R9, t16
- 24: GETL R19, t18
- 25: ADCL t16, t18 (-rCa-wCa)
- 26: PUTL t18, R19
- 27: INCEIPL $4
-
- 0x25475F24: 6FB24000 xoris r18,r29,0x4000
- 28: GETL R29, t20
- 29: XORL $0x40000000, t20
- 30: PUTL t20, R18
- 31: INCEIPL $4
-
- 0x25475F28: 21520000 subfic r10,r18,0
- 32: GETL R18, t22
- 33: MOVL $0x0, t24
- 34: SBBL t22, t24 (-wCa)
- 35: PUTL t24, R10
- 36: INCEIPL $4
-
- 0x25475F2C: 7E4A9114 adde r18,r10,r18
- 37: GETL R10, t26
- 38: GETL R18, t28
- 39: ADCL t26, t28 (-rCa-wCa)
- 40: PUTL t28, R18
- 41: INCEIPL $4
-
- 0x25475F30: 7E4A9839 and. r10,r18,r19
- 42: GETL R18, t30
- 43: GETL R19, t32
- 44: ANDL t30, t32
- 45: PUTL t32, R10
- 46: CMP0L t32, t34 (-rSo)
- 47: ICRFL t34, $0x0, CR
- 48: INCEIPL $4
-
- 0x25475F34: 3A60FFFF li r19,-1
- 49: MOVL $0xFFFFFFFF, t36
- 50: PUTL t36, R19
- 51: INCEIPL $4
-
- 0x25475F38: 408200BC bc 4,2,0x25475FF4
- 52: Jc02o $0x25475FF4
-
-
-. 0 25475F0C 48
-. 81 7A 01 80 81 FF 00 9C 55 7D 00 02 69 F3 00 02 21 33 00 00 7E 69 99 14 6F B2 40 00 21 52 00 00 7E 4A 91 14 7E 4A 98 39 3A 60 FF FF 40 82 00 BC
-
-==== BB 597 (0x25475F3C) approx BBs exec'd 0 ====
-
- 0x25475F3C: 807A0150 lwz r3,336(r26)
- 0: GETL R26, t0
- 1: ADDL $0x150, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25475F40: 80FA0000 lwz r7,0(r26)
- 5: GETL R26, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R7
- 8: INCEIPL $4
-
- 0x25475F44: 7D633A14 add r11,r3,r7
- 9: GETL R3, t8
- 10: GETL R7, t10
- 11: ADDL t8, t10
- 12: PUTL t10, R11
- 13: INCEIPL $4
-
- 0x25475F48: 917A0150 stw r11,336(r26)
- 14: GETL R11, t12
- 15: GETL R26, t14
- 16: ADDL $0x150, t14
- 17: STL t12, (t14)
- 18: INCEIPL $4
-
- 0x25475F4C: 80B10000 lwz r5,0(r17)
- 19: GETL R17, t16
- 20: LDL (t16), t18
- 21: PUTL t18, R5
- 22: INCEIPL $4
-
- 0x25475F50: 70A90040 andi. r9,r5,0x40
- 23: GETL R5, t20
- 24: ANDL $0x40, t20
- 25: PUTL t20, R9
- 26: CMP0L t20, t22 (-rSo)
- 27: ICRFL t22, $0x0, CR
- 28: INCEIPL $4
-
- 0x25475F54: 40820278 bc 4,2,0x254761CC
- 29: Jc02o $0x254761CC
-
-
-. 0 25475F3C 28
-. 80 7A 01 50 80 FA 00 00 7D 63 3A 14 91 7A 01 50 80 B1 00 00 70 A9 00 40 40 82 02 78
-
-==== BB 598 (0x25475F58) approx BBs exec'd 0 ====
-
- 0x25475F58: 7F43D378 or r3,r26,r26
- 0: GETL R26, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25475F5C: 48002611 bl 0x2547856C
- 3: MOVL $0x25475F60, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x2547856C ($4)
-
-
-. 0 25475F58 8
-. 7F 43 D3 78 48 00 26 11
-
-==== BB 599 (0x25475F60) approx BBs exec'd 0 ====
-
- 0x25475F60: 72C00008 andi. r0,r22,0x8
- 0: GETL R22, t0
- 1: ANDL $0x8, t0
- 2: PUTL t0, R0
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x25475F64: 40820010 bc 4,2,0x25475F74
- 6: Jc02o $0x25475F74
-
-
-. 0 25475F60 8
-. 72 C0 00 08 40 82 00 10
-
-==== BB 600 (0x25475F68) approx BBs exec'd 0 ====
-
- 0x25475F68: 81DA0060 lwz r14,96(r26)
- 0: GETL R26, t0
- 1: ADDL $0x60, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R14
- 4: INCEIPL $4
-
- 0x25475F6C: 2F0E0000 cmpi cr6,r14,0
- 5: GETL R14, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x25475F70: 409A02E0 bc 4,26,0x25476250
- 9: Jc26o $0x25476250
-
-
-. 0 25475F68 12
-. 81 DA 00 60 2F 0E 00 00 40 9A 02 E0
-
-==== BB 601 (0x25475F74) approx BBs exec'd 0 ====
-
- 0x25475F74: 811A01FC lwz r8,508(r26)
- 0: GETL R26, t0
- 1: ADDL $0x1FC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x25475F78: 71090020 andi. r9,r8,0x20
- 5: GETL R8, t4
- 6: ANDL $0x20, t4
- 7: PUTL t4, R9
- 8: CMP0L t4, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x25475F7C: 4182000C bc 12,2,0x25475F88
- 11: Js02o $0x25475F88
-
-
-. 0 25475F74 12
-. 81 1A 01 FC 71 09 00 20 41 82 00 0C
-
-==== BB 602 (0x25475F80) approx BBs exec'd 0 ====
-
- 0x25475F80: 813E04C8 lwz r9,1224(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4C8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25475F84: 934901A0 stw r26,416(r9)
- 5: GETL R26, t4
- 6: GETL R9, t6
- 7: ADDL $0x1A0, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x25475F88: 80910050 lwz r4,80(r17)
- 10: GETL R17, t8
- 11: ADDL $0x50, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R4
- 14: INCEIPL $4
-
- 0x25475F8C: C81F0028 lfd f0,40(r31)
- 15: GETL R31, t12
- 16: ADDL $0x28, t12
- 17: FPU_RQ (t12), 0x0:0x0
- 18: INCEIPL $4
-
- 0x25475F90: 2C840000 cmpi cr1,r4,0
- 19: GETL R4, t14
- 20: CMP0L t14, t16 (-rSo)
- 21: ICRFL t16, $0x1, CR
- 22: INCEIPL $4
-
- 0x25475F94: D81A01D0 stfd f0,464(r26)
- 23: GETL R26, t18
- 24: ADDL $0x1D0, t18
- 25: FPU_WQ 0x0:0x0, (t18)
- 26: INCEIPL $4
-
- 0x25475F98: C9BF0030 lfd f13,48(r31)
- 27: GETL R31, t20
- 28: ADDL $0x30, t20
- 29: FPU_RQ (t20), 0x0:0xD
- 30: INCEIPL $4
-
- 0x25475F9C: D9BA01D8 stfd f13,472(r26)
- 31: GETL R26, t22
- 32: ADDL $0x1D8, t22
- 33: FPU_WQ 0x0:0xD, (t22)
- 34: INCEIPL $4
-
- 0x25475FA0: 4186FEB0 bc 12,6,0x25475E50
- 35: Js06o $0x25475E50
-
-
-. 0 25475F80 36
-. 81 3E 04 C8 93 49 01 A0 80 91 00 50 C8 1F 00 28 2C 84 00 00 D8 1A 01 D0 C9 BF 00 30 D9 BA 01 D8 41 86 FE B0
-
-==== BB 603 (0x25475E50) approx BBs exec'd 0 ====
-
- 0x25475E50: 7F43D378 or r3,r26,r26
- 0: GETL R26, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25475E54: 4BFFF850 b 0x254756A4
- 3: JMPo $0x254756A4 ($4)
-
-
-. 0 25475E50 8
-. 7F 43 D3 78 4B FF F8 50
-
-==== BB 604 (0x254756A4) approx BBs exec'd 0 ====
-
- 0x254756A4: 80A10000 lwz r5,0(r1)
- 0: GETL R1, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R5
- 3: INCEIPL $4
-
- 0x254756A8: 83450004 lwz r26,4(r5)
- 4: GETL R5, t4
- 5: ADDL $0x4, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R26
- 8: INCEIPL $4
-
- 0x254756AC: 8185FFB4 lwz r12,-76(r5)
- 9: GETL R5, t8
- 10: ADDL $0xFFFFFFB4, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R12
- 13: INCEIPL $4
-
- 0x254756B0: 7F4803A6 mtlr r26
- 14: GETL R26, t12
- 15: PUTL t12, LR
- 16: INCEIPL $4
-
- 0x254756B4: 81C5FFB8 lwz r14,-72(r5)
- 17: GETL R5, t14
- 18: ADDL $0xFFFFFFB8, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R14
- 21: INCEIPL $4
-
- 0x254756B8: 81E5FFBC lwz r15,-68(r5)
- 22: GETL R5, t18
- 23: ADDL $0xFFFFFFBC, t18
- 24: LDL (t18), t20
- 25: PUTL t20, R15
- 26: INCEIPL $4
-
- 0x254756BC: 7D808120 mtcrf 0x8,r12
- 27: GETL R12, t22
- 28: ICRFL t22, $0x4, CR
- 29: INCEIPL $4
-
- 0x254756C0: 8205FFC0 lwz r16,-64(r5)
- 30: GETL R5, t24
- 31: ADDL $0xFFFFFFC0, t24
- 32: LDL (t24), t26
- 33: PUTL t26, R16
- 34: INCEIPL $4
-
- 0x254756C4: 8225FFC4 lwz r17,-60(r5)
- 35: GETL R5, t28
- 36: ADDL $0xFFFFFFC4, t28
- 37: LDL (t28), t30
- 38: PUTL t30, R17
- 39: INCEIPL $4
-
- 0x254756C8: 8245FFC8 lwz r18,-56(r5)
- 40: GETL R5, t32
- 41: ADDL $0xFFFFFFC8, t32
- 42: LDL (t32), t34
- 43: PUTL t34, R18
- 44: INCEIPL $4
-
- 0x254756CC: 8265FFCC lwz r19,-52(r5)
- 45: GETL R5, t36
- 46: ADDL $0xFFFFFFCC, t36
- 47: LDL (t36), t38
- 48: PUTL t38, R19
- 49: INCEIPL $4
-
- 0x254756D0: 8285FFD0 lwz r20,-48(r5)
- 50: GETL R5, t40
- 51: ADDL $0xFFFFFFD0, t40
- 52: LDL (t40), t42
- 53: PUTL t42, R20
- 54: INCEIPL $4
-
- 0x254756D4: 82A5FFD4 lwz r21,-44(r5)
- 55: GETL R5, t44
- 56: ADDL $0xFFFFFFD4, t44
- 57: LDL (t44), t46
- 58: PUTL t46, R21
- 59: INCEIPL $4
-
- 0x254756D8: 82C5FFD8 lwz r22,-40(r5)
- 60: GETL R5, t48
- 61: ADDL $0xFFFFFFD8, t48
- 62: LDL (t48), t50
- 63: PUTL t50, R22
- 64: INCEIPL $4
-
- 0x254756DC: 82E5FFDC lwz r23,-36(r5)
- 65: GETL R5, t52
- 66: ADDL $0xFFFFFFDC, t52
- 67: LDL (t52), t54
- 68: PUTL t54, R23
- 69: INCEIPL $4
-
- 0x254756E0: 8305FFE0 lwz r24,-32(r5)
- 70: GETL R5, t56
- 71: ADDL $0xFFFFFFE0, t56
- 72: LDL (t56), t58
- 73: PUTL t58, R24
- 74: INCEIPL $4
-
- 0x254756E4: 8325FFE4 lwz r25,-28(r5)
- 75: GETL R5, t60
- 76: ADDL $0xFFFFFFE4, t60
- 77: LDL (t60), t62
- 78: PUTL t62, R25
- 79: INCEIPL $4
-
- 0x254756E8: 8345FFE8 lwz r26,-24(r5)
- 80: GETL R5, t64
- 81: ADDL $0xFFFFFFE8, t64
- 82: LDL (t64), t66
- 83: PUTL t66, R26
- 84: INCEIPL $4
-
- 0x254756EC: 8365FFEC lwz r27,-20(r5)
- 85: GETL R5, t68
- 86: ADDL $0xFFFFFFEC, t68
- 87: LDL (t68), t70
- 88: PUTL t70, R27
- 89: INCEIPL $4
-
- 0x254756F0: 8385FFF0 lwz r28,-16(r5)
- 90: GETL R5, t72
- 91: ADDL $0xFFFFFFF0, t72
- 92: LDL (t72), t74
- 93: PUTL t74, R28
- 94: INCEIPL $4
-
- 0x254756F4: 83A5FFF4 lwz r29,-12(r5)
- 95: GETL R5, t76
- 96: ADDL $0xFFFFFFF4, t76
- 97: LDL (t76), t78
- 98: PUTL t78, R29
- 99: INCEIPL $4
-
- 0x254756F8: 83C5FFF8 lwz r30,-8(r5)
- 100: GETL R5, t80
- 101: ADDL $0xFFFFFFF8, t80
- 102: LDL (t80), t82
- 103: PUTL t82, R30
- 104: INCEIPL $4
-
- 0x254756FC: 83E5FFFC lwz r31,-4(r5)
- 105: GETL R5, t84
- 106: ADDL $0xFFFFFFFC, t84
- 107: LDL (t84), t86
- 108: PUTL t86, R31
- 109: INCEIPL $4
-
- 0x25475700: 7CA12B78 or r1,r5,r5
- 110: GETL R5, t88
- 111: PUTL t88, R1
- 112: INCEIPL $4
-
- 0x25475704: 4E800020 blr
- 113: GETL LR, t90
- 114: JMPo-r t90 ($4)
-
-
-. 0 254756A4 100
-. 80 A1 00 00 83 45 00 04 81 85 FF B4 7F 48 03 A6 81 C5 FF B8 81 E5 FF BC 7D 80 81 20 82 05 FF C0 82 25 FF C4 82 45 FF C8 82 65 FF CC 82 85 FF D0 82 A5 FF D4 82 C5 FF D8 82 E5 FF DC 83 05 FF E0 83 25 FF E4 83 45 FF E8 83 65 FF EC 83 85 FF F0 83 A5 FF F4 83 C5 FF F8 83 E5 FF FC 7C A1 2B 78 4E 80 00 20
-
-==== BB 605 (0x25477054) approx BBs exec'd 0 ====
-
- 0x25477054: 4BFFFF04 b 0x25476F58
- 0: JMPo $0x25476F58 ($4)
-
-
-. 0 25477054 4
-. 4B FF FF 04
-
-==== BB 606 (0x25476F58) approx BBs exec'd 0 ====
-
- 0x25476F58: 83E10294 lwz r31,660(r1)
- 0: GETL R1, t0
- 1: ADDL $0x294, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R31
- 4: INCEIPL $4
-
- 0x25476F5C: 81810244 lwz r12,580(r1)
- 5: GETL R1, t4
- 6: ADDL $0x244, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R12
- 9: INCEIPL $4
-
- 0x25476F60: 7FE803A6 mtlr r31
- 10: GETL R31, t8
- 11: PUTL t8, LR
- 12: INCEIPL $4
-
- 0x25476F64: 81C10248 lwz r14,584(r1)
- 13: GETL R1, t10
- 14: ADDL $0x248, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R14
- 17: INCEIPL $4
-
- 0x25476F68: 81E1024C lwz r15,588(r1)
- 18: GETL R1, t14
- 19: ADDL $0x24C, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R15
- 22: INCEIPL $4
-
- 0x25476F6C: 7D818120 mtcrf 0x18,r12
- 23: GETL R12, t18
- 24: ICRFL t18, $0x3, CR
- 25: ICRFL t18, $0x4, CR
- 26: INCEIPL $4
-
- 0x25476F70: 82010250 lwz r16,592(r1)
- 27: GETL R1, t20
- 28: ADDL $0x250, t20
- 29: LDL (t20), t22
- 30: PUTL t22, R16
- 31: INCEIPL $4
-
- 0x25476F74: 82210254 lwz r17,596(r1)
- 32: GETL R1, t24
- 33: ADDL $0x254, t24
- 34: LDL (t24), t26
- 35: PUTL t26, R17
- 36: INCEIPL $4
-
- 0x25476F78: 82410258 lwz r18,600(r1)
- 37: GETL R1, t28
- 38: ADDL $0x258, t28
- 39: LDL (t28), t30
- 40: PUTL t30, R18
- 41: INCEIPL $4
-
- 0x25476F7C: 8261025C lwz r19,604(r1)
- 42: GETL R1, t32
- 43: ADDL $0x25C, t32
- 44: LDL (t32), t34
- 45: PUTL t34, R19
- 46: INCEIPL $4
-
- 0x25476F80: 82810260 lwz r20,608(r1)
- 47: GETL R1, t36
- 48: ADDL $0x260, t36
- 49: LDL (t36), t38
- 50: PUTL t38, R20
- 51: INCEIPL $4
-
- 0x25476F84: 82A10264 lwz r21,612(r1)
- 52: GETL R1, t40
- 53: ADDL $0x264, t40
- 54: LDL (t40), t42
- 55: PUTL t42, R21
- 56: INCEIPL $4
-
- 0x25476F88: 82C10268 lwz r22,616(r1)
- 57: GETL R1, t44
- 58: ADDL $0x268, t44
- 59: LDL (t44), t46
- 60: PUTL t46, R22
- 61: INCEIPL $4
-
- 0x25476F8C: 82E1026C lwz r23,620(r1)
- 62: GETL R1, t48
- 63: ADDL $0x26C, t48
- 64: LDL (t48), t50
- 65: PUTL t50, R23
- 66: INCEIPL $4
-
- 0x25476F90: 83010270 lwz r24,624(r1)
- 67: GETL R1, t52
- 68: ADDL $0x270, t52
- 69: LDL (t52), t54
- 70: PUTL t54, R24
- 71: INCEIPL $4
-
- 0x25476F94: 83210274 lwz r25,628(r1)
- 72: GETL R1, t56
- 73: ADDL $0x274, t56
- 74: LDL (t56), t58
- 75: PUTL t58, R25
- 76: INCEIPL $4
-
- 0x25476F98: 83410278 lwz r26,632(r1)
- 77: GETL R1, t60
- 78: ADDL $0x278, t60
- 79: LDL (t60), t62
- 80: PUTL t62, R26
- 81: INCEIPL $4
-
- 0x25476F9C: 8361027C lwz r27,636(r1)
- 82: GETL R1, t64
- 83: ADDL $0x27C, t64
- 84: LDL (t64), t66
- 85: PUTL t66, R27
- 86: INCEIPL $4
-
- 0x25476FA0: 83810280 lwz r28,640(r1)
- 87: GETL R1, t68
- 88: ADDL $0x280, t68
- 89: LDL (t68), t70
- 90: PUTL t70, R28
- 91: INCEIPL $4
-
- 0x25476FA4: 83A10284 lwz r29,644(r1)
- 92: GETL R1, t72
- 93: ADDL $0x284, t72
- 94: LDL (t72), t74
- 95: PUTL t74, R29
- 96: INCEIPL $4
-
- 0x25476FA8: 83C10288 lwz r30,648(r1)
- 97: GETL R1, t76
- 98: ADDL $0x288, t76
- 99: LDL (t76), t78
- 100: PUTL t78, R30
- 101: INCEIPL $4
-
- 0x25476FAC: 83E1028C lwz r31,652(r1)
- 102: GETL R1, t80
- 103: ADDL $0x28C, t80
- 104: LDL (t80), t82
- 105: PUTL t82, R31
- 106: INCEIPL $4
-
- 0x25476FB0: 38210290 addi r1,r1,656
- 107: GETL R1, t84
- 108: ADDL $0x290, t84
- 109: PUTL t84, R1
- 110: INCEIPL $4
-
- 0x25476FB4: 4E800020 blr
- 111: GETL LR, t86
- 112: JMPo-r t86 ($4)
-
-
-. 0 25476F58 96
-. 83 E1 02 94 81 81 02 44 7F E8 03 A6 81 C1 02 48 81 E1 02 4C 7D 81 81 20 82 01 02 50 82 21 02 54 82 41 02 58 82 61 02 5C 82 81 02 60 82 A1 02 64 82 C1 02 68 82 E1 02 6C 83 01 02 70 83 21 02 74 83 41 02 78 83 61 02 7C 83 81 02 80 83 A1 02 84 83 C1 02 88 83 E1 02 8C 38 21 02 90 4E 80 00 20
-
-==== BB 607 (0x254734A8) approx BBs exec'd 0 ====
-
- 0x254734A8: 809E00D0 lwz r4,208(r30)
- 0: GETL R30, t0
- 1: ADDL $0xD0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x254734AC: 82E30178 lwz r23,376(r3)
- 5: GETL R3, t4
- 6: ADDL $0x178, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R23
- 9: INCEIPL $4
-
- 0x254734B0: 3A770001 addi r19,r23,1
- 10: GETL R23, t8
- 11: ADDL $0x1, t8
- 12: PUTL t8, R19
- 13: INCEIPL $4
-
- 0x254734B4: 92630178 stw r19,376(r3)
- 14: GETL R19, t10
- 15: GETL R3, t12
- 16: ADDL $0x178, t12
- 17: STL t10, (t12)
- 18: INCEIPL $4
-
- 0x254734B8: 387F0044 addi r3,r31,68
- 19: GETL R31, t14
- 20: ADDL $0x44, t14
- 21: PUTL t14, R3
- 22: INCEIPL $4
-
- 0x254734BC: 6A7D0001 xori r29,r19,0x1
- 23: GETL R19, t16
- 24: XORL $0x1, t16
- 25: PUTL t16, R29
- 26: INCEIPL $4
-
- 0x254734C0: 23BD0000 subfic r29,r29,0
- 27: GETL R29, t18
- 28: MOVL $0x0, t20
- 29: SBBL t18, t20 (-wCa)
- 30: PUTL t20, R29
- 31: INCEIPL $4
-
- 0x254734C4: 7FB90194 addze r29,r25
- 32: GETL R25, t22
- 33: ADCL $0x0, t22 (-rCa-wCa)
- 34: PUTL t22, R29
- 35: INCEIPL $4
-
- 0x254734C8: 4800CE75 bl 0x2548033C
- 36: MOVL $0x254734CC, t24
- 37: PUTL t24, LR
- 38: JMPo-c $0x2548033C ($4)
-
-
-. 0 254734A8 36
-. 80 9E 00 D0 82 E3 01 78 3A 77 00 01 92 63 01 78 38 7F 00 44 6A 7D 00 01 23 BD 00 00 7F B9 01 94 48 00 CE 75
-
-==== BB 608 (0x254734CC) approx BBs exec'd 0 ====
-
- 0x254734CC: 7FB9EB78 or r25,r29,r29
- 0: GETL R29, t0
- 1: PUTL t0, R25
- 2: INCEIPL $4
-
- 0x254734D0: 7C7D1B79 or. r29,r3,r3
- 3: GETL R3, t2
- 4: PUTL t2, R29
- 5: CMP0L t2, t4 (-rSo)
- 6: ICRFL t4, $0x0, CR
- 7: INCEIPL $4
-
- 0x254734D4: 4082FF9C bc 4,2,0x25473470
- 8: Jc02o $0x25473470
-
-
-. 0 254734CC 12
-. 7F B9 EB 78 7C 7D 1B 79 40 82 FF 9C
-
-==== BB 609 (0x254734D8) approx BBs exec'd 0 ====
-
- 0x254734D8: 807E003C lwz r3,60(r30)
- 0: GETL R30, t0
- 1: ADDL $0x3C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x254734DC: 38800004 li r4,4
- 5: MOVL $0x4, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0x254734E0: 4800EB51 bl 0x25482030
- 8: MOVL $0x254734E4, t6
- 9: PUTL t6, LR
- 10: JMPo-c $0x25482030 ($4)
-
-
-. 0 254734D8 12
-. 80 7E 00 3C 38 80 00 04 48 00 EB 51
-
-==== BB 610 access(0x25482030) approx BBs exec'd 0 ====
-
- 0x25482030: 38000021 li r0,33
- 0: MOVL $0x21, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x25482034: 44000002 sc
- 3: JMPo-sys $0x25482038 ($4)
-
-
-. 0 25482030 8
-. 38 00 00 21 44 00 00 02
-
-==== BB 611 (0x25482038) approx BBs exec'd 0 ====
-
- 0x25482038: 4CA30020 bclr 5,3
- 0: GETL LR, t0
- 1: Jc03o-r t0
-
-
-. 0 25482038 4
-. 4C A3 00 20
-
-==== BB 612 (0x2548203C) approx BBs exec'd 0 ====
-
- 0x2548203C: 4BFFF2F4 b 0x25481330
- 0: JMPo $0x25481330 ($4)
-
-
-. 0 2548203C 4
-. 4B FF F2 F4
-
-==== BB 613 __syscall_error(0x25481330) approx BBs exec'd 0 ====
-
- 0x25481330: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25481334: 7D8802A6 mflr r12
- 6: GETL LR, t4
- 7: PUTL t4, R12
- 8: INCEIPL $4
-
- 0x25481338: 48015CC9 bl 0x25497000
- 9: MOVL $0x2548133C, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 25481330 12
-. 94 21 FF F0 7D 88 02 A6 48 01 5C C9
-
-==== BB 614 (0x2548133C) approx BBs exec'd 0 ====
-
- 0x2548133C: 93C10008 stw r30,8(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25481340: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x25481344: 7D8803A6 mtlr r12
- 8: GETL R12, t6
- 9: PUTL t6, LR
- 10: INCEIPL $4
-
- 0x25481348: 813E0514 lwz r9,1300(r30)
- 11: GETL R30, t8
- 12: ADDL $0x514, t8
- 13: LDL (t8), t10
- 14: PUTL t10, R9
- 15: INCEIPL $4
-
- 0x2548134C: 83C10008 lwz r30,8(r1)
- 16: GETL R1, t12
- 17: ADDL $0x8, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R30
- 20: INCEIPL $4
-
- 0x25481350: 38210010 addi r1,r1,16
- 21: GETL R1, t16
- 22: ADDL $0x10, t16
- 23: PUTL t16, R1
- 24: INCEIPL $4
-
- 0x25481354: 90690000 stw r3,0(r9)
- 25: GETL R3, t18
- 26: GETL R9, t20
- 27: STL t18, (t20)
- 28: INCEIPL $4
-
- 0x25481358: 3860FFFF li r3,-1
- 29: MOVL $0xFFFFFFFF, t22
- 30: PUTL t22, R3
- 31: INCEIPL $4
-
- 0x2548135C: 4E800020 blr
- 32: GETL LR, t24
- 33: JMPo-r t24 ($4)
-
-
-. 0 2548133C 36
-. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 81 3E 05 14 83 C1 00 08 38 21 00 10 90 69 00 00 38 60 FF FF 4E 80 00 20
-
-==== BB 615 (0x254734E4) approx BBs exec'd 0 ====
-
- 0x254734E4: 2E030000 cmpi cr4,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x4, CR
- 3: INCEIPL $4
-
- 0x254734E8: 4092F2D0 bc 4,18,0x254727B8
- 4: Jc18o $0x254727B8
-
-
-. 0 254734E4 8
-. 2E 03 00 00 40 92 F2 D0
-
-==== BB 616 (0x254727B8) approx BBs exec'd 0 ====
-
- 0x254727B8: 2C190000 cmpi cr0,r25,0
- 0: GETL R25, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0x254727BC: 408213F0 bc 4,2,0x25473BAC
- 4: Jc02o $0x25473BAC
-
-
-. 0 254727B8 8
-. 2C 19 00 00 40 82 13 F0
-
-==== BB 617 (0x25473BAC) approx BBs exec'd 0 ====
-
- 0x25473BAC: 5736103A rlwinm r22,r25,2,0,29
- 0: GETL R25, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R22
- 3: INCEIPL $4
-
- 0x25473BB0: 83A10000 lwz r29,0(r1)
- 4: GETL R1, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R29
- 7: INCEIPL $4
-
- 0x25473BB4: 38D6001E addi r6,r22,30
- 8: GETL R22, t6
- 9: ADDL $0x1E, t6
- 10: PUTL t6, R6
- 11: INCEIPL $4
-
- 0x25473BB8: 39600000 li r11,0
- 12: MOVL $0x0, t8
- 13: PUTL t8, R11
- 14: INCEIPL $4
-
- 0x25473BBC: 54C00036 rlwinm r0,r6,0,0,27
- 15: GETL R6, t10
- 16: ANDL $0xFFFFFFF0, t10
- 17: PUTL t10, R0
- 18: INCEIPL $4
-
- 0x25473BC0: 7F4000D0 neg r26,r0
- 19: GETL R0, t12
- 20: NEGL t12
- 21: PUTL t12, R26
- 22: INCEIPL $4
-
- 0x25473BC4: 7FA1D16E stwux r29,r1,r26
- 23: GETL R26, t14
- 24: GETL R1, t16
- 25: ADDL t16, t14
- 26: PUTL t14, R1
- 27: GETL R29, t18
- 28: STL t18, (t14)
- 29: INCEIPL $4
-
- 0x25473BC8: 3B610017 addi r27,r1,23
- 30: GETL R1, t20
- 31: ADDL $0x17, t20
- 32: PUTL t20, R27
- 33: INCEIPL $4
-
- 0x25473BCC: 812E01C4 lwz r9,452(r14)
- 34: GETL R14, t22
- 35: ADDL $0x1C4, t22
- 36: LDL (t22), t24
- 37: PUTL t24, R9
- 38: INCEIPL $4
-
- 0x25473BD0: 577A0036 rlwinm r26,r27,0,0,27
- 39: GETL R27, t26
- 40: ANDL $0xFFFFFFF0, t26
- 41: PUTL t26, R26
- 42: INCEIPL $4
-
- 0x25473BD4: 556C103A rlwinm r12,r11,2,0,29
- 43: GETL R11, t28
- 44: SHLL $0x2, t28
- 45: PUTL t28, R12
- 46: INCEIPL $4
-
- 0x25473BD8: 396B0001 addi r11,r11,1
- 47: MOVL $0x1, t30
- 48: PUTL t30, R11
- 49: INCEIPL $4
-
- 0x25473BDC: 7D2CD12E stwx r9,r12,r26
- 50: GETL R26, t32
- 51: GETL R12, t34
- 52: ADDL t34, t32
- 53: GETL R9, t36
- 54: STL t36, (t32)
- 55: INCEIPL $4
-
- 0x25473BE0: 8129000C lwz r9,12(r9)
- 56: GETL R9, t38
- 57: ADDL $0xC, t38
- 58: LDL (t38), t40
- 59: PUTL t40, R9
- 60: INCEIPL $4
-
- 0x25473BE4: 2F890000 cmpi cr7,r9,0
- 61: GETL R9, t42
- 62: CMP0L t42, t44 (-rSo)
- 63: ICRFL t44, $0x7, CR
- 64: INCEIPL $4
-
- 0x25473BE8: 409EFFEC bc 4,30,0x25473BD4
- 65: Jc30o $0x25473BD4
-
-
-. 0 25473BAC 64
-. 57 36 10 3A 83 A1 00 00 38 D6 00 1E 39 60 00 00 54 C0 00 36 7F 40 00 D0 7F A1 D1 6E 3B 61 00 17 81 2E 01 C4 57 7A 00 36 55 6C 10 3A 39 6B 00 01 7D 2C D1 2E 81 29 00 0C 2F 89 00 00 40 9E FF EC
-
-==== BB 618 (0x25473BEC) approx BBs exec'd 0 ====
-
- 0x25473BEC: 4BFFEBD4 b 0x254727C0
- 0: JMPo $0x254727C0 ($4)
-
-
-. 0 25473BEC 4
-. 4B FF EB D4
-
-==== BB 619 (0x254727C0) approx BBs exec'd 0 ====
-
- 0x254727C0: 817F0030 lwz r11,48(r31)
- 0: GETL R31, t0
- 1: ADDL $0x30, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x254727C4: 38E00000 li r7,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R7
- 7: INCEIPL $4
-
- 0x254727C8: 7F44D378 or r4,r26,r26
- 8: GETL R26, t6
- 9: PUTL t6, R4
- 10: INCEIPL $4
-
- 0x254727CC: 7F25CB78 or r5,r25,r25
- 11: GETL R25, t8
- 12: PUTL t8, R5
- 13: INCEIPL $4
-
- 0x254727D0: 69660003 xori r6,r11,0x3
- 14: GETL R11, t10
- 15: XORL $0x3, t10
- 16: PUTL t10, R6
- 17: INCEIPL $4
-
- 0x254727D4: 20060000 subfic r0,r6,0
- 18: GETL R6, t12
- 19: MOVL $0x0, t14
- 20: SBBL t12, t14 (-wCa)
- 21: PUTL t14, R0
- 22: INCEIPL $4
-
- 0x254727D8: 7CC03114 adde r6,r0,r6
- 23: GETL R0, t16
- 24: GETL R6, t18
- 25: ADCL t16, t18 (-rCa-wCa)
- 26: PUTL t18, R6
- 27: INCEIPL $4
-
- 0x254727DC: 7E83A378 or r3,r20,r20
- 28: GETL R20, t20
- 29: PUTL t20, R3
- 30: INCEIPL $4
-
- 0x254727E0: 480079E5 bl 0x2547A1C4
- 31: MOVL $0x254727E4, t22
- 32: PUTL t22, LR
- 33: JMPo-c $0x2547A1C4 ($4)
-
-
-. 0 254727C0 36
-. 81 7F 00 30 38 E0 00 00 7F 44 D3 78 7F 25 CB 78 69 66 00 03 20 06 00 00 7C C0 31 14 7E 83 A3 78 48 00 79 E5
-
-==== BB 620 _dl_map_object_deps(0x2547A1C4) approx BBs exec'd 0 ====
-
- 0x2547A1C4: 9421FF60 stwu r1,-160(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFF60, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547A1C8: 7D2802A6 mflr r9
- 6: GETL LR, t4
- 7: PUTL t4, R9
- 8: INCEIPL $4
-
- 0x2547A1CC: 91E1005C stw r15,92(r1)
- 9: GETL R15, t6
- 10: GETL R1, t8
- 11: ADDL $0x5C, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547A1D0: 1DE5000C mulli r15,r5,12
- 14: GETL R5, t10
- 15: MULL $0xC, t10
- 16: PUTL t10, R15
- 17: INCEIPL $4
-
- 0x2547A1D4: 91C10058 stw r14,88(r1)
- 18: GETL R14, t12
- 19: GETL R1, t14
- 20: ADDL $0x58, t14
- 21: STL t12, (t14)
- 22: INCEIPL $4
-
- 0x2547A1D8: 4801CE29 bl 0x25497000
- 23: MOVL $0x2547A1DC, t16
- 24: PUTL t16, LR
- 25: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547A1C4 24
-. 94 21 FF 60 7D 28 02 A6 91 E1 00 5C 1D E5 00 0C 91 C1 00 58 48 01 CE 29
-
-==== BB 621 (0x2547A1DC) approx BBs exec'd 0 ====
-
- 0x2547A1DC: 39CF0036 addi r14,r15,54
- 0: GETL R15, t0
- 1: ADDL $0x36, t0
- 2: PUTL t0, R14
- 3: INCEIPL $4
-
- 0x2547A1E0: 81410000 lwz r10,0(r1)
- 4: GETL R1, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R10
- 7: INCEIPL $4
-
- 0x2547A1E4: 55CC0036 rlwinm r12,r14,0,0,27
- 8: GETL R14, t6
- 9: ANDL $0xFFFFFFF0, t6
- 10: PUTL t6, R12
- 11: INCEIPL $4
-
- 0x2547A1E8: 93A10094 stw r29,148(r1)
- 12: GETL R29, t8
- 13: GETL R1, t10
- 14: ADDL $0x94, t10
- 15: STL t8, (t10)
- 16: INCEIPL $4
-
- 0x2547A1EC: 7D0C00D0 neg r8,r12
- 17: GETL R12, t12
- 18: NEGL t12
- 19: PUTL t12, R8
- 20: INCEIPL $4
-
- 0x2547A1F0: 3BA00000 li r29,0
- 21: MOVL $0x0, t14
- 22: PUTL t14, R29
- 23: INCEIPL $4
-
- 0x2547A1F4: 912100A4 stw r9,164(r1)
- 24: GETL R9, t16
- 25: GETL R1, t18
- 26: ADDL $0xA4, t18
- 27: STL t16, (t18)
- 28: INCEIPL $4
-
- 0x2547A1F8: 7F9D2840 cmpl cr7,r29,r5
- 29: GETL R29, t20
- 30: GETL R5, t22
- 31: CMPUL t20, t22, t24 (-rSo)
- 32: ICRFL t24, $0x7, CR
- 33: INCEIPL $4
-
- 0x2547A1FC: 92E1007C stw r23,124(r1)
- 34: GETL R23, t26
- 35: GETL R1, t28
- 36: ADDL $0x7C, t28
- 37: STL t26, (t28)
- 38: INCEIPL $4
-
- 0x2547A200: 7C771B78 or r23,r3,r3
- 39: GETL R3, t30
- 40: PUTL t30, R23
- 41: INCEIPL $4
-
- 0x2547A204: 93C10098 stw r30,152(r1)
- 42: GETL R30, t32
- 43: GETL R1, t34
- 44: ADDL $0x98, t34
- 45: STL t32, (t34)
- 46: INCEIPL $4
-
- 0x2547A208: 38000000 li r0,0
- 47: MOVL $0x0, t36
- 48: PUTL t36, R0
- 49: INCEIPL $4
-
- 0x2547A20C: 93E1009C stw r31,156(r1)
- 50: GETL R31, t38
- 51: GETL R1, t40
- 52: ADDL $0x9C, t40
- 53: STL t38, (t40)
- 54: INCEIPL $4
-
- 0x2547A210: 7C3F0B78 or r31,r1,r1
- 55: GETL R1, t42
- 56: PUTL t42, R31
- 57: INCEIPL $4
-
- 0x2547A214: 92010060 stw r16,96(r1)
- 58: GETL R16, t44
- 59: GETL R1, t46
- 60: ADDL $0x60, t46
- 61: STL t44, (t46)
- 62: INCEIPL $4
-
- 0x2547A218: 7FC802A6 mflr r30
- 63: GETL LR, t48
- 64: PUTL t48, R30
- 65: INCEIPL $4
-
- 0x2547A21C: 92210064 stw r17,100(r1)
- 66: GETL R17, t50
- 67: GETL R1, t52
- 68: ADDL $0x64, t52
- 69: STL t50, (t52)
- 70: INCEIPL $4
-
- 0x2547A220: 7CCF3378 or r15,r6,r6
- 71: GETL R6, t54
- 72: PUTL t54, R15
- 73: INCEIPL $4
-
- 0x2547A224: 92410068 stw r18,104(r1)
- 74: GETL R18, t56
- 75: GETL R1, t58
- 76: ADDL $0x68, t58
- 77: STL t56, (t58)
- 78: INCEIPL $4
-
- 0x2547A228: 7CEE3B78 or r14,r7,r7
- 79: GETL R7, t60
- 80: PUTL t60, R14
- 81: INCEIPL $4
-
- 0x2547A22C: 9261006C stw r19,108(r1)
- 82: GETL R19, t62
- 83: GETL R1, t64
- 84: ADDL $0x6C, t64
- 85: STL t62, (t64)
- 86: INCEIPL $4
-
- 0x2547A230: 92810070 stw r20,112(r1)
- 87: GETL R20, t66
- 88: GETL R1, t68
- 89: ADDL $0x70, t68
- 90: STL t66, (t68)
- 91: INCEIPL $4
-
- 0x2547A234: 92A10074 stw r21,116(r1)
- 92: GETL R21, t70
- 93: GETL R1, t72
- 94: ADDL $0x74, t72
- 95: STL t70, (t72)
- 96: INCEIPL $4
-
- 0x2547A238: 92C10078 stw r22,120(r1)
- 97: GETL R22, t74
- 98: GETL R1, t76
- 99: ADDL $0x78, t76
- 100: STL t74, (t76)
- 101: INCEIPL $4
-
- 0x2547A23C: 93010080 stw r24,128(r1)
- 102: GETL R24, t78
- 103: GETL R1, t80
- 104: ADDL $0x80, t80
- 105: STL t78, (t80)
- 106: INCEIPL $4
-
- 0x2547A240: 93210084 stw r25,132(r1)
- 107: GETL R25, t82
- 108: GETL R1, t84
- 109: ADDL $0x84, t84
- 110: STL t82, (t84)
- 111: INCEIPL $4
-
- 0x2547A244: 93410088 stw r26,136(r1)
- 112: GETL R26, t86
- 113: GETL R1, t88
- 114: ADDL $0x88, t88
- 115: STL t86, (t88)
- 116: INCEIPL $4
-
- 0x2547A248: 9361008C stw r27,140(r1)
- 117: GETL R27, t90
- 118: GETL R1, t92
- 119: ADDL $0x8C, t92
- 120: STL t90, (t92)
- 121: INCEIPL $4
-
- 0x2547A24C: 93810090 stw r28,144(r1)
- 122: GETL R28, t94
- 123: GETL R1, t96
- 124: ADDL $0x90, t96
- 125: STL t94, (t96)
- 126: INCEIPL $4
-
- 0x2547A250: 7D41416E stwux r10,r1,r8
- 127: GETL R8, t98
- 128: GETL R1, t100
- 129: ADDL t100, t98
- 130: PUTL t98, R1
- 131: GETL R10, t102
- 132: STL t102, (t98)
- 133: INCEIPL $4
-
- 0x2547A254: 39000001 li r8,1
- 134: MOVL $0x1, t104
- 135: PUTL t104, R8
- 136: INCEIPL $4
-
- 0x2547A258: 81230180 lwz r9,384(r3)
- 137: GETL R3, t106
- 138: ADDL $0x180, t106
- 139: LDL (t106), t108
- 140: PUTL t108, R9
- 141: INCEIPL $4
-
- 0x2547A25C: 38610017 addi r3,r1,23
- 142: GETL R1, t110
- 143: ADDL $0x17, t110
- 144: PUTL t110, R3
- 145: INCEIPL $4
-
- 0x2547A260: 546A0036 rlwinm r10,r3,0,0,27
- 146: GETL R3, t112
- 147: ANDL $0xFFFFFFF0, t112
- 148: PUTL t112, R10
- 149: INCEIPL $4
-
- 0x2547A264: 5109C94C rlwimi r9,r8,25,5,6
- 150: GETL R9, t114
- 151: GETL R8, t116
- 152: ROLL $0x19, t116
- 153: ANDL $0x6000000, t116
- 154: ANDL $0xF9FFFFFF, t114
- 155: ORL t114, t116
- 156: PUTL t116, R9
- 157: INCEIPL $4
-
- 0x2547A268: 396A000C addi r11,r10,12
- 158: GETL R10, t118
- 159: ADDL $0xC, t118
- 160: PUTL t118, R11
- 161: INCEIPL $4
-
- 0x2547A26C: 900A0000 stw r0,0(r10)
- 162: GETL R0, t120
- 163: GETL R10, t122
- 164: STL t120, (t122)
- 165: INCEIPL $4
-
- 0x2547A270: 916A0008 stw r11,8(r10)
- 166: GETL R11, t124
- 167: GETL R10, t126
- 168: ADDL $0x8, t126
- 169: STL t124, (t126)
- 170: INCEIPL $4
-
- 0x2547A274: 91370180 stw r9,384(r23)
- 171: GETL R9, t128
- 172: GETL R23, t130
- 173: ADDL $0x180, t130
- 174: STL t128, (t130)
- 175: INCEIPL $4
-
- 0x2547A278: 915F0008 stw r10,8(r31)
- 176: GETL R10, t132
- 177: GETL R31, t134
- 178: ADDL $0x8, t134
- 179: STL t132, (t134)
- 180: INCEIPL $4
-
- 0x2547A27C: 92EA0004 stw r23,4(r10)
- 181: GETL R23, t136
- 182: GETL R10, t138
- 183: ADDL $0x4, t138
- 184: STL t136, (t138)
- 185: INCEIPL $4
-
- 0x2547A280: 911F000C stw r8,12(r31)
- 186: GETL R8, t140
- 187: GETL R31, t142
- 188: ADDL $0xC, t142
- 189: STL t140, (t142)
- 190: INCEIPL $4
-
- 0x2547A284: 409C005C bc 4,28,0x2547A2E0
- 191: Jc28o $0x2547A2E0
-
-
-. 0 2547A1DC 172
-. 39 CF 00 36 81 41 00 00 55 CC 00 36 93 A1 00 94 7D 0C 00 D0 3B A0 00 00 91 21 00 A4 7F 9D 28 40 92 E1 00 7C 7C 77 1B 78 93 C1 00 98 38 00 00 00 93 E1 00 9C 7C 3F 0B 78 92 01 00 60 7F C8 02 A6 92 21 00 64 7C CF 33 78 92 41 00 68 7C EE 3B 78 92 61 00 6C 92 81 00 70 92 A1 00 74 92 C1 00 78 93 01 00 80 93 21 00 84 93 41 00 88 93 61 00 8C 93 81 00 90 7D 41 41 6E 39 00 00 01 81 23 01 80 38 61 00 17 54 6A 00 36 51 09 C9 4C 39 6A 00 0C 90 0A 00 00 91 6A 00 08 91 37 01 80 91 5F 00 08 92 EA 00 04 91 1F 00 0C 40 9C 00 5C
-
-==== BB 622 (0x2547A288) approx BBs exec'd 0 ====
-
- 0x2547A288: 7CA903A6 mtctr r5
- 0: GETL R5, t0
- 1: PUTL t0, CTR
- 2: INCEIPL $4
-
- 0x2547A28C: 7D475378 or r7,r10,r10
- 3: GETL R10, t2
- 4: PUTL t2, R7
- 5: INCEIPL $4
-
- 0x2547A290: 38A00000 li r5,0
- 6: MOVL $0x0, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x2547A294: 38C00001 li r6,1
- 9: MOVL $0x1, t6
- 10: PUTL t6, R6
- 11: INCEIPL $4
-
- 0x2547A298: 48000008 b 0x2547A2A0
- 12: JMPo $0x2547A2A0 ($4)
-
-
-. 0 2547A288 20
-. 7C A9 03 A6 7D 47 53 78 38 A0 00 00 38 C0 00 01 48 00 00 08
-
-==== BB 623 (0x2547A2A0) approx BBs exec'd 0 ====
-
- 0x2547A2A0: 1E68000C mulli r19,r8,12
- 0: GETL R8, t0
- 1: MULL $0xC, t0
- 2: PUTL t0, R19
- 3: INCEIPL $4
-
- 0x2547A2A4: 57B5103A rlwinm r21,r29,2,0,29
- 4: GETL R29, t2
- 5: SHLL $0x2, t2
- 6: PUTL t2, R21
- 7: INCEIPL $4
-
- 0x2547A2A8: 7E15202E lwzx r16,r21,r4
- 8: GETL R4, t4
- 9: GETL R21, t6
- 10: ADDL t6, t4
- 11: LDL (t4), t8
- 12: PUTL t8, R16
- 13: INCEIPL $4
-
- 0x2547A2AC: 39280001 addi r9,r8,1
- 14: GETL R8, t10
- 15: ADDL $0x1, t10
- 16: PUTL t10, R9
- 17: INCEIPL $4
-
- 0x2547A2B0: 7E533A14 add r18,r19,r7
- 18: GETL R19, t12
- 19: GETL R7, t14
- 20: ADDL t12, t14
- 21: PUTL t14, R18
- 22: INCEIPL $4
-
- 0x2547A2B4: 7CB3392E stwx r5,r19,r7
- 23: GETL R7, t16
- 24: GETL R19, t18
- 25: ADDL t18, t16
- 26: GETL R5, t20
- 27: STL t20, (t16)
- 28: INCEIPL $4
-
- 0x2547A2B8: 3A92000C addi r20,r18,12
- 29: GETL R18, t22
- 30: ADDL $0xC, t22
- 31: PUTL t22, R20
- 32: INCEIPL $4
-
- 0x2547A2BC: 92120004 stw r16,4(r18)
- 33: GETL R16, t24
- 34: GETL R18, t26
- 35: ADDL $0x4, t26
- 36: STL t24, (t26)
- 37: INCEIPL $4
-
- 0x2547A2C0: 92920008 stw r20,8(r18)
- 38: GETL R20, t28
- 39: GETL R18, t30
- 40: ADDL $0x8, t30
- 41: STL t28, (t30)
- 42: INCEIPL $4
-
- 0x2547A2C4: 3BBD0001 addi r29,r29,1
- 43: GETL R29, t32
- 44: ADDL $0x1, t32
- 45: PUTL t32, R29
- 46: INCEIPL $4
-
- 0x2547A2C8: 82300180 lwz r17,384(r16)
- 47: GETL R16, t34
- 48: ADDL $0x180, t34
- 49: LDL (t34), t36
- 50: PUTL t36, R17
- 51: INCEIPL $4
-
- 0x2547A2CC: 913F000C stw r9,12(r31)
- 52: GETL R9, t38
- 53: GETL R31, t40
- 54: ADDL $0xC, t40
- 55: STL t38, (t40)
- 56: INCEIPL $4
-
- 0x2547A2D0: 50D1C94C rlwimi r17,r6,25,5,6
- 57: GETL R17, t42
- 58: GETL R6, t44
- 59: ROLL $0x19, t44
- 60: ANDL $0x6000000, t44
- 61: ANDL $0xF9FFFFFF, t42
- 62: ORL t42, t44
- 63: PUTL t44, R17
- 64: INCEIPL $4
-
- 0x2547A2D4: 92300180 stw r17,384(r16)
- 65: GETL R17, t46
- 66: GETL R16, t48
- 67: ADDL $0x180, t48
- 68: STL t46, (t48)
- 69: INCEIPL $4
-
- 0x2547A2D8: 4200FFC4 bc 16,0,0x2547A29C
- 70: GETL CTR, t50
- 71: ADDL $0xFFFFFFFF, t50
- 72: PUTL t50, CTR
- 73: JIFZL t50, $0x2547A2DC
- 74: JMPo $0x2547A29C ($4)
-
-
-. 0 2547A2A0 60
-. 1E 68 00 0C 57 B5 10 3A 7E 15 20 2E 39 28 00 01 7E 53 3A 14 7C B3 39 2E 3A 92 00 0C 92 12 00 04 92 92 00 08 3B BD 00 01 82 30 01 80 91 3F 00 0C 50 D1 C9 4C 92 30 01 80 42 00 FF C4
-
-==== BB 624 (0x2547A2DC) approx BBs exec'd 0 ====
-
- 0x2547A2DC: 7D284B78 or r8,r9,r9
- 0: GETL R9, t0
- 1: PUTL t0, R8
- 2: INCEIPL $4
-
- 0x2547A2E0: 831F0008 lwz r24,8(r31)
- 3: GETL R31, t2
- 4: ADDL $0x8, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R24
- 7: INCEIPL $4
-
- 0x2547A2E4: 1EC8000C mulli r22,r8,12
- 8: GETL R8, t6
- 9: MULL $0xC, t6
- 10: PUTL t6, R22
- 11: INCEIPL $4
-
- 0x2547A2E8: 821E0514 lwz r16,1300(r30)
- 12: GETL R30, t8
- 13: ADDL $0x514, t8
- 14: LDL (t8), t10
- 15: PUTL t10, R16
- 16: INCEIPL $4
-
- 0x2547A2EC: 3A200000 li r17,0
- 17: MOVL $0x0, t12
- 18: PUTL t12, R17
- 19: INCEIPL $4
-
- 0x2547A2F0: 7F1BC379 or. r27,r24,r24
- 20: GETL R24, t14
- 21: PUTL t14, R27
- 22: CMP0L t14, t16 (-rSo)
- 23: ICRFL t16, $0x0, CR
- 24: INCEIPL $4
-
- 0x2547A2F4: 7CF6C214 add r7,r22,r24
- 25: GETL R22, t18
- 26: GETL R24, t20
- 27: ADDL t18, t20
- 28: PUTL t20, R7
- 29: INCEIPL $4
-
- 0x2547A2F8: 80900000 lwz r4,0(r16)
- 30: GETL R16, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R4
- 33: INCEIPL $4
-
- 0x2547A2FC: 38A7FFF4 addi r5,r7,-12
- 34: GETL R7, t26
- 35: ADDL $0xFFFFFFF4, t26
- 36: PUTL t26, R5
- 37: INCEIPL $4
-
- 0x2547A300: 38C00000 li r6,0
- 38: MOVL $0x0, t28
- 39: PUTL t28, R6
- 40: INCEIPL $4
-
- 0x2547A304: 7CB32B78 or r19,r5,r5
- 41: GETL R5, t30
- 42: PUTL t30, R19
- 43: INCEIPL $4
-
- 0x2547A308: 90C50008 stw r6,8(r5)
- 44: GETL R6, t32
- 45: GETL R5, t34
- 46: ADDL $0x8, t34
- 47: STL t32, (t34)
- 48: INCEIPL $4
-
- 0x2547A30C: 923F0034 stw r17,52(r31)
- 49: GETL R17, t36
- 50: GETL R31, t38
- 51: ADDL $0x34, t38
- 52: STL t36, (t38)
- 53: INCEIPL $4
-
- 0x2547A310: 909F0038 stw r4,56(r31)
- 54: GETL R4, t40
- 55: GETL R31, t42
- 56: ADDL $0x38, t42
- 57: STL t40, (t42)
- 58: INCEIPL $4
-
- 0x2547A314: 92300000 stw r17,0(r16)
- 59: GETL R17, t44
- 60: GETL R16, t46
- 61: STL t44, (t46)
- 62: INCEIPL $4
-
- 0x2547A318: 418202AC bc 12,2,0x2547A5C4
- 63: Js02o $0x2547A5C4
-
-
-. 0 2547A2DC 64
-. 7D 28 4B 78 83 1F 00 08 1E C8 00 0C 82 1E 05 14 3A 20 00 00 7F 1B C3 79 7C F6 C2 14 80 90 00 00 38 A7 FF F4 38 C0 00 00 7C B3 2B 78 90 C5 00 08 92 3F 00 34 90 9F 00 38 92 30 00 00 41 82 02 AC
-
-==== BB 625 (0x2547A31C) approx BBs exec'd 0 ====
-
- 0x2547A31C: 835B0004 lwz r26,4(r27)
- 0: GETL R27, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0x2547A320: 3B800001 li r28,1
- 5: MOVL $0x1, t4
- 6: PUTL t4, R28
- 7: INCEIPL $4
-
- 0x2547A324: 939B0000 stw r28,0(r27)
- 8: GETL R28, t6
- 9: GETL R27, t8
- 10: STL t6, (t8)
- 11: INCEIPL $4
-
- 0x2547A328: 3B000000 li r24,0
- 12: MOVL $0x0, t10
- 13: PUTL t10, R24
- 14: INCEIPL $4
-
- 0x2547A32C: 833A0158 lwz r25,344(r26)
- 15: GETL R26, t12
- 16: ADDL $0x158, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R25
- 19: INCEIPL $4
-
- 0x2547A330: 3AC00000 li r22,0
- 20: MOVL $0x0, t16
- 21: PUTL t16, R22
- 22: INCEIPL $4
-
- 0x2547A334: 2C990000 cmpi cr1,r25,0
- 23: GETL R25, t18
- 24: CMP0L t18, t20 (-rSo)
- 25: ICRFL t20, $0x1, CR
- 26: INCEIPL $4
-
- 0x2547A338: 40860030 bc 4,6,0x2547A368
- 27: Jc06o $0x2547A368
-
-
-. 0 2547A31C 32
-. 83 5B 00 04 3B 80 00 01 93 9B 00 00 3B 00 00 00 83 3A 01 58 3A C0 00 00 2C 99 00 00 40 86 00 30
-
-==== BB 626 (0x2547A33C) approx BBs exec'd 0 ====
-
- 0x2547A33C: 807A01E8 lwz r3,488(r26)
- 0: GETL R26, t0
- 1: ADDL $0x1E8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x2547A340: 7F4BBA78 xor r11,r26,r23
- 5: GETL R26, t4
- 6: GETL R23, t6
- 7: XORL t4, t6
- 8: PUTL t6, R11
- 9: INCEIPL $4
-
- 0x2547A344: 314BFFFF addic r10,r11,-1
- 10: GETL R11, t8
- 11: ADCL $0xFFFFFFFF, t8 (-wCa)
- 12: PUTL t8, R10
- 13: INCEIPL $4
-
- 0x2547A348: 7FAA5910 subfe r29,r10,r11
- 14: GETL R10, t10
- 15: GETL R11, t12
- 16: SBBL t10, t12 (-rCa-wCa)
- 17: PUTL t12, R29
- 18: INCEIPL $4
-
- 0x2547A34C: 21230000 subfic r9,r3,0
- 19: GETL R3, t14
- 20: MOVL $0x0, t16
- 21: SBBL t14, t16 (-wCa)
- 22: PUTL t16, R9
- 23: INCEIPL $4
-
- 0x2547A350: 7C091914 adde r0,r9,r3
- 24: GETL R9, t18
- 25: GETL R3, t20
- 26: ADCL t18, t20 (-rCa-wCa)
- 27: PUTL t20, R0
- 28: INCEIPL $4
-
- 0x2547A354: 7C0BE839 and. r11,r0,r29
- 29: GETL R0, t22
- 30: GETL R29, t24
- 31: ANDL t22, t24
- 32: PUTL t24, R11
- 33: CMP0L t24, t26 (-rSo)
- 34: ICRFL t26, $0x0, CR
- 35: INCEIPL $4
-
- 0x2547A358: 41820010 bc 12,2,0x2547A368
- 36: Js02o $0x2547A368
-
-
-. 0 2547A33C 32
-. 80 7A 01 E8 7F 4B BA 78 31 4B FF FF 7F AA 59 10 21 23 00 00 7C 09 19 14 7C 0B E8 39 41 82 00 10
-
-==== BB 627 (0x2547A368) approx BBs exec'd 0 ====
-
- 0x2547A368: 82BA0024 lwz r21,36(r26)
- 0: GETL R26, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R21
- 4: INCEIPL $4
-
- 0x2547A36C: 2F950000 cmpi cr7,r21,0
- 5: GETL R21, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x2547A370: 409E001C bc 4,30,0x2547A38C
- 9: Jc30o $0x2547A38C
-
-
-. 0 2547A368 12
-. 82 BA 00 24 2F 95 00 00 40 9E 00 1C
-
-==== BB 628 (0x2547A38C) approx BBs exec'd 0 ====
-
- 0x2547A38C: 80DA0034 lwz r6,52(r26)
- 0: GETL R26, t0
- 1: ADDL $0x34, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x2547A390: 7F72DB78 or r18,r27,r27
- 5: GETL R27, t4
- 6: PUTL t4, R18
- 7: INCEIPL $4
-
- 0x2547A394: 839A0008 lwz r28,8(r26)
- 8: GETL R26, t6
- 9: ADDL $0x8, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R28
- 12: INCEIPL $4
-
- 0x2547A398: 82A60004 lwz r21,4(r6)
- 13: GETL R6, t10
- 14: ADDL $0x4, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R21
- 17: INCEIPL $4
-
- 0x2547A39C: 91FF0014 stw r15,20(r31)
- 18: GETL R15, t14
- 19: GETL R31, t16
- 20: ADDL $0x14, t16
- 21: STL t14, (t16)
- 22: INCEIPL $4
-
- 0x2547A3A0: 91DF0018 stw r14,24(r31)
- 23: GETL R14, t18
- 24: GETL R31, t20
- 25: ADDL $0x18, t20
- 26: STL t18, (t20)
- 27: INCEIPL $4
-
- 0x2547A3A4: 813C0000 lwz r9,0(r28)
- 28: GETL R28, t22
- 29: LDL (t22), t24
- 30: PUTL t24, R9
- 31: INCEIPL $4
-
- 0x2547A3A8: 92BF001C stw r21,28(r31)
- 32: GETL R21, t26
- 33: GETL R31, t28
- 34: ADDL $0x1C, t28
- 35: STL t26, (t28)
- 36: INCEIPL $4
-
- 0x2547A3AC: 2F090000 cmpi cr6,r9,0
- 37: GETL R9, t30
- 38: CMP0L t30, t32 (-rSo)
- 39: ICRFL t32, $0x6, CR
- 40: INCEIPL $4
-
- 0x2547A3B0: 935F0010 stw r26,16(r31)
- 41: GETL R26, t34
- 42: GETL R31, t36
- 43: ADDL $0x10, t36
- 44: STL t34, (t36)
- 45: INCEIPL $4
-
- 0x2547A3B4: 419A0504 bc 12,26,0x2547A8B8
- 46: Js26o $0x2547A8B8
-
-
-. 0 2547A38C 44
-. 80 DA 00 34 7F 72 DB 78 83 9A 00 08 82 A6 00 04 91 FF 00 14 91 DF 00 18 81 3C 00 00 92 BF 00 1C 2F 09 00 00 93 5F 00 10 41 9A 05 04
-
-==== BB 629 (0x2547A3B8) approx BBs exec'd 0 ====
-
- 0x2547A3B8: 3F207FFF lis r25,32767
- 0: MOVL $0x7FFF0000, t0
- 1: PUTL t0, R25
- 2: INCEIPL $4
-
- 0x2547A3BC: 6327FFFD ori r7,r25,0xFFFD
- 3: MOVL $0x7FFFFFFD, t2
- 4: PUTL t2, R7
- 5: INCEIPL $4
-
- 0x2547A3C0: 90FF0040 stw r7,64(r31)
- 6: GETL R7, t4
- 7: GETL R31, t6
- 8: ADDL $0x40, t6
- 9: STL t4, (t6)
- 10: INCEIPL $4
-
- 0x2547A3C4: 480000BC b 0x2547A480
- 11: JMPo $0x2547A480 ($4)
-
-
-. 0 2547A3B8 16
-. 3F 20 7F FF 63 27 FF FD 90 FF 00 40 48 00 00 BC
-
-==== BB 630 (0x2547A480) approx BBs exec'd 0 ====
-
- 0x2547A480: 2F890001 cmpi cr7,r9,1
- 0: GETL R9, t0
- 1: MOVL $0x1, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0x2547A484: 419EFF44 bc 12,30,0x2547A3C8
- 5: Js30o $0x2547A3C8
-
-
-. 0 2547A480 8
-. 2F 89 00 01 41 9E FF 44
-
-==== BB 631 (0x2547A3C8) approx BBs exec'd 0 ====
-
- 0x2547A3C8: 801C0004 lwz r0,4(r28)
- 0: GETL R28, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x2547A3CC: 38800024 li r4,36
- 5: MOVL $0x24, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0x2547A3D0: 7FA0AA14 add r29,r0,r21
- 8: GETL R0, t6
- 9: GETL R21, t8
- 10: ADDL t6, t8
- 11: PUTL t8, R29
- 12: INCEIPL $4
-
- 0x2547A3D4: 7FA3EB78 or r3,r29,r29
- 13: GETL R29, t10
- 14: PUTL t10, R3
- 15: INCEIPL $4
-
- 0x2547A3D8: 7FB9EB78 or r25,r29,r29
- 16: GETL R29, t12
- 17: PUTL t12, R25
- 18: INCEIPL $4
-
- 0x2547A3DC: 48008A25 bl 0x25482E00
- 19: MOVL $0x2547A3E0, t14
- 20: PUTL t14, LR
- 21: JMPo-c $0x25482E00 ($4)
-
-
-. 0 2547A3C8 24
-. 80 1C 00 04 38 80 00 24 7F A0 AA 14 7F A3 EB 78 7F B9 EB 78 48 00 8A 25
-
-==== BB 632 (0x2547A3E0) approx BBs exec'd 0 ====
-
- 0x2547A3E0: 2C830000 cmpi cr1,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x2547A3E4: 40860588 bc 4,6,0x2547A96C
- 4: Jc06o $0x2547A96C
-
-
-. 0 2547A3E0 8
-. 2C 83 00 00 40 86 05 88
-
-==== BB 633 (0x2547A3E8) approx BBs exec'd 0 ====
-
- 0x2547A3E8: 80BE02F8 lwz r5,760(r30)
- 0: GETL R30, t0
- 1: ADDL $0x2F8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x2547A3EC: 387F0030 addi r3,r31,48
- 5: GETL R31, t4
- 6: ADDL $0x30, t4
- 7: PUTL t4, R3
- 8: INCEIPL $4
-
- 0x2547A3F0: 389F0034 addi r4,r31,52
- 9: GETL R31, t6
- 10: ADDL $0x34, t6
- 11: PUTL t6, R4
- 12: INCEIPL $4
-
- 0x2547A3F4: 38DF0010 addi r6,r31,16
- 13: GETL R31, t8
- 14: ADDL $0x10, t8
- 15: PUTL t8, R6
- 16: INCEIPL $4
-
- 0x2547A3F8: 93BF0020 stw r29,32(r31)
- 17: GETL R29, t10
- 18: GETL R31, t12
- 19: ADDL $0x20, t12
- 20: STL t10, (t12)
- 21: INCEIPL $4
-
- 0x2547A3FC: 480011A5 bl 0x2547B5A0
- 22: MOVL $0x2547A400, t14
- 23: PUTL t14, LR
- 24: JMPo-c $0x2547B5A0 ($4)
-
-
-. 0 2547A3E8 24
-. 80 BE 02 F8 38 7F 00 30 38 9F 00 34 38 DF 00 10 93 BF 00 20 48 00 11 A5
-
-==== BB 634 _dl_catch_error(0x2547B5A0) approx BBs exec'd 0 ====
-
- 0x2547B5A0: 9421FD60 stwu r1,-672(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFD60, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547B5A4: 7D4802A6 mflr r10
- 6: GETL LR, t4
- 7: PUTL t4, R10
- 8: INCEIPL $4
-
- 0x2547B5A8: 4801BA59 bl 0x25497000
- 9: MOVL $0x2547B5AC, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547B5A0 12
-. 94 21 FD 60 7D 48 02 A6 48 01 BA 59
-
-==== BB 635 (0x2547B5AC) approx BBs exec'd 0 ====
-
- 0x2547B5AC: 93C10298 stw r30,664(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x298, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547B5B0: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x2547B5B4: 39000000 li r8,0
- 8: MOVL $0x0, t6
- 9: PUTL t6, R8
- 10: INCEIPL $4
-
- 0x2547B5B8: 914102A4 stw r10,676(r1)
- 11: GETL R10, t8
- 12: GETL R1, t10
- 13: ADDL $0x2A4, t10
- 14: STL t8, (t10)
- 15: INCEIPL $4
-
- 0x2547B5BC: 93E1029C stw r31,668(r1)
- 16: GETL R31, t12
- 17: GETL R1, t14
- 18: ADDL $0x29C, t14
- 19: STL t12, (t14)
- 20: INCEIPL $4
-
- 0x2547B5C0: 80FE04C8 lwz r7,1224(r30)
- 21: GETL R30, t16
- 22: ADDL $0x4C8, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R7
- 25: INCEIPL $4
-
- 0x2547B5C4: 91010014 stw r8,20(r1)
- 26: GETL R8, t20
- 27: GETL R1, t22
- 28: ADDL $0x14, t22
- 29: STL t20, (t22)
- 30: INCEIPL $4
-
- 0x2547B5C8: 812701B4 lwz r9,436(r7)
- 31: GETL R7, t24
- 32: ADDL $0x1B4, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R9
- 35: INCEIPL $4
-
- 0x2547B5CC: 90810274 stw r4,628(r1)
- 36: GETL R4, t28
- 37: GETL R1, t30
- 38: ADDL $0x274, t30
- 39: STL t28, (t30)
- 40: INCEIPL $4
-
- 0x2547B5D0: 7D2903A6 mtctr r9
- 41: GETL R9, t32
- 42: PUTL t32, CTR
- 43: INCEIPL $4
-
- 0x2547B5D4: 90A10278 stw r5,632(r1)
- 44: GETL R5, t34
- 45: GETL R1, t36
- 46: ADDL $0x278, t36
- 47: STL t34, (t36)
- 48: INCEIPL $4
-
- 0x2547B5D8: 90C1027C stw r6,636(r1)
- 49: GETL R6, t38
- 50: GETL R1, t40
- 51: ADDL $0x27C, t40
- 52: STL t38, (t40)
- 53: INCEIPL $4
-
- 0x2547B5DC: 90610270 stw r3,624(r1)
- 54: GETL R3, t42
- 55: GETL R1, t44
- 56: ADDL $0x270, t44
- 57: STL t42, (t44)
- 58: INCEIPL $4
-
- 0x2547B5E0: 4E800421 bctrl
- 59: MOVL $0x2547B5E4, t46
- 60: PUTL t46, LR
- 61: GETL CTR, t48
- 62: JMPo-c t48 ($4)
-
-
-. 0 2547B5AC 56
-. 93 C1 02 98 7F C8 02 A6 39 00 00 00 91 41 02 A4 93 E1 02 9C 80 FE 04 C8 91 01 00 14 81 27 01 B4 90 81 02 74 7D 29 03 A6 90 A1 02 78 90 C1 02 7C 90 61 02 70 4E 80 04 21
-
-==== BB 636 _dl_initial_error_catch_tsd(0x2547185C) approx BBs exec'd 0 ====
-
- 0x2547185C: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25471860: 7D8802A6 mflr r12
- 6: GETL LR, t4
- 7: PUTL t4, R12
- 8: INCEIPL $4
-
- 0x25471864: 4802579D bl 0x25497000
- 9: MOVL $0x25471868, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547185C 12
-. 94 21 FF F0 7D 88 02 A6 48 02 57 9D
-
-==== BB 637 (0x25471868) approx BBs exec'd 0 ====
-
- 0x25471868: 93C10008 stw r30,8(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547186C: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x25471870: 7D8803A6 mtlr r12
- 8: GETL R12, t6
- 9: PUTL t6, LR
- 10: INCEIPL $4
-
- 0x25471874: 807E0018 lwz r3,24(r30)
- 11: GETL R30, t8
- 12: ADDL $0x18, t8
- 13: LDL (t8), t10
- 14: PUTL t10, R3
- 15: INCEIPL $4
-
- 0x25471878: 83C10008 lwz r30,8(r1)
- 16: GETL R1, t12
- 17: ADDL $0x8, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R30
- 20: INCEIPL $4
-
- 0x2547187C: 38210010 addi r1,r1,16
- 21: GETL R1, t16
- 22: ADDL $0x10, t16
- 23: PUTL t16, R1
- 24: INCEIPL $4
-
- 0x25471880: 4E800020 blr
- 25: GETL LR, t18
- 26: JMPo-r t18 ($4)
-
-
-. 0 25471868 28
-. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 80 7E 00 18 83 C1 00 08 38 21 00 10 4E 80 00 20
-
-==== BB 638 (0x2547B5E4) approx BBs exec'd 0 ====
-
- 0x2547B5E4: 80030000 lwz r0,0(r3)
- 0: GETL R3, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x2547B5E8: 90610280 stw r3,640(r1)
- 4: GETL R3, t4
- 5: GETL R1, t6
- 6: ADDL $0x280, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0x2547B5EC: 38610020 addi r3,r1,32
- 9: GETL R1, t8
- 10: ADDL $0x20, t8
- 11: PUTL t8, R3
- 12: INCEIPL $4
-
- 0x2547B5F0: 90010008 stw r0,8(r1)
- 13: GETL R0, t10
- 14: GETL R1, t12
- 15: ADDL $0x8, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x2547B5F4: 480072BD bl 0x254828B0
- 18: MOVL $0x2547B5F8, t14
- 19: PUTL t14, LR
- 20: JMPo-c $0x254828B0 ($4)
-
-
-. 0 2547B5E4 20
-. 80 03 00 00 90 61 02 80 38 61 00 20 90 01 00 08 48 00 72 BD
-
-==== BB 639 _setjmp(0x254828B0) approx BBs exec'd 0 ====
-
- 0x254828B0: 38800000 li r4,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x254828B4: 480001DC b 0x25482A90
- 3: JMPo $0x25482A90 ($4)
-
-
-. 0 254828B0 8
-. 38 80 00 00 48 00 01 DC
-
-==== BB 640 __sigsetjmp(0x25482A90) approx BBs exec'd 0 ====
-
- 0x25482A90: 90230000 stw r1,0(r3)
- 0: GETL R1, t0
- 1: GETL R3, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0x25482A94: 7C0802A6 mflr r0
- 4: GETL LR, t4
- 5: PUTL t4, R0
- 6: INCEIPL $4
-
- 0x25482A98: 91C3000C stw r14,12(r3)
- 7: GETL R14, t6
- 8: GETL R3, t8
- 9: ADDL $0xC, t8
- 10: STL t6, (t8)
- 11: INCEIPL $4
-
- 0x25482A9C: D9C30058 stfd f14,88(r3)
- 12: GETL R3, t10
- 13: ADDL $0x58, t10
- 14: FPU_WQ 0x0:0xE, (t10)
- 15: INCEIPL $4
-
- 0x25482AA0: 90030008 stw r0,8(r3)
- 16: GETL R0, t12
- 17: GETL R3, t14
- 18: ADDL $0x8, t14
- 19: STL t12, (t14)
- 20: INCEIPL $4
-
- 0x25482AA4: 91E30010 stw r15,16(r3)
- 21: GETL R15, t16
- 22: GETL R3, t18
- 23: ADDL $0x10, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x25482AA8: D9E30060 stfd f15,96(r3)
- 26: GETL R3, t20
- 27: ADDL $0x60, t20
- 28: FPU_WQ 0x0:0xF, (t20)
- 29: INCEIPL $4
-
- 0x25482AAC: 7C000026 mfcr r0
- 30: GETL CR, t22
- 31: PUTL t22, R0
- 32: INCEIPL $4
-
- 0x25482AB0: 92030014 stw r16,20(r3)
- 33: GETL R16, t24
- 34: GETL R3, t26
- 35: ADDL $0x14, t26
- 36: STL t24, (t26)
- 37: INCEIPL $4
-
- 0x25482AB4: DA030068 stfd f16,104(r3)
- 38: GETL R3, t28
- 39: ADDL $0x68, t28
- 40: FPU_WQ 0x0:0x10, (t28)
- 41: INCEIPL $4
-
- 0x25482AB8: 90030054 stw r0,84(r3)
- 42: GETL R0, t30
- 43: GETL R3, t32
- 44: ADDL $0x54, t32
- 45: STL t30, (t32)
- 46: INCEIPL $4
-
- 0x25482ABC: 92230018 stw r17,24(r3)
- 47: GETL R17, t34
- 48: GETL R3, t36
- 49: ADDL $0x18, t36
- 50: STL t34, (t36)
- 51: INCEIPL $4
-
- 0x25482AC0: DA230070 stfd f17,112(r3)
- 52: GETL R3, t38
- 53: ADDL $0x70, t38
- 54: FPU_WQ 0x0:0x11, (t38)
- 55: INCEIPL $4
-
- 0x25482AC4: 9243001C stw r18,28(r3)
- 56: GETL R18, t40
- 57: GETL R3, t42
- 58: ADDL $0x1C, t42
- 59: STL t40, (t42)
- 60: INCEIPL $4
-
- 0x25482AC8: DA430078 stfd f18,120(r3)
- 61: GETL R3, t44
- 62: ADDL $0x78, t44
- 63: FPU_WQ 0x0:0x12, (t44)
- 64: INCEIPL $4
-
- 0x25482ACC: 92630020 stw r19,32(r3)
- 65: GETL R19, t46
- 66: GETL R3, t48
- 67: ADDL $0x20, t48
- 68: STL t46, (t48)
- 69: INCEIPL $4
-
- 0x25482AD0: DA630080 stfd f19,128(r3)
- 70: GETL R3, t50
- 71: ADDL $0x80, t50
- 72: FPU_WQ 0x0:0x13, (t50)
- 73: INCEIPL $4
-
- 0x25482AD4: 92830024 stw r20,36(r3)
- 74: GETL R20, t52
- 75: GETL R3, t54
- 76: ADDL $0x24, t54
- 77: STL t52, (t54)
- 78: INCEIPL $4
-
- 0x25482AD8: DA830088 stfd f20,136(r3)
- 79: GETL R3, t56
- 80: ADDL $0x88, t56
- 81: FPU_WQ 0x0:0x14, (t56)
- 82: INCEIPL $4
-
- 0x25482ADC: 92A30028 stw r21,40(r3)
- 83: GETL R21, t58
- 84: GETL R3, t60
- 85: ADDL $0x28, t60
- 86: STL t58, (t60)
- 87: INCEIPL $4
-
- 0x25482AE0: DAA30090 stfd f21,144(r3)
- 88: GETL R3, t62
- 89: ADDL $0x90, t62
- 90: FPU_WQ 0x0:0x15, (t62)
- 91: INCEIPL $4
-
- 0x25482AE4: 92C3002C stw r22,44(r3)
- 92: GETL R22, t64
- 93: GETL R3, t66
- 94: ADDL $0x2C, t66
- 95: STL t64, (t66)
- 96: INCEIPL $4
-
- 0x25482AE8: DAC30098 stfd f22,152(r3)
- 97: GETL R3, t68
- 98: ADDL $0x98, t68
- 99: FPU_WQ 0x0:0x16, (t68)
- 100: INCEIPL $4
-
- 0x25482AEC: 92E30030 stw r23,48(r3)
- 101: GETL R23, t70
- 102: GETL R3, t72
- 103: ADDL $0x30, t72
- 104: STL t70, (t72)
- 105: INCEIPL $4
-
- 0x25482AF0: DAE300A0 stfd f23,160(r3)
- 106: GETL R3, t74
- 107: ADDL $0xA0, t74
- 108: FPU_WQ 0x0:0x17, (t74)
- 109: INCEIPL $4
-
- 0x25482AF4: 93030034 stw r24,52(r3)
- 110: GETL R24, t76
- 111: GETL R3, t78
- 112: ADDL $0x34, t78
- 113: STL t76, (t78)
- 114: INCEIPL $4
-
- 0x25482AF8: DB0300A8 stfd f24,168(r3)
- 115: GETL R3, t80
- 116: ADDL $0xA8, t80
- 117: FPU_WQ 0x0:0x18, (t80)
- 118: INCEIPL $4
-
- 0x25482AFC: 93230038 stw r25,56(r3)
- 119: GETL R25, t82
- 120: GETL R3, t84
- 121: ADDL $0x38, t84
- 122: STL t82, (t84)
- 123: INCEIPL $4
-
- 0x25482B00: DB2300B0 stfd f25,176(r3)
- 124: GETL R3, t86
- 125: ADDL $0xB0, t86
- 126: FPU_WQ 0x0:0x19, (t86)
- 127: INCEIPL $4
-
- 0x25482B04: 9343003C stw r26,60(r3)
- 128: GETL R26, t88
- 129: GETL R3, t90
- 130: ADDL $0x3C, t90
- 131: STL t88, (t90)
- 132: INCEIPL $4
-
- 0x25482B08: DB4300B8 stfd f26,184(r3)
- 133: GETL R3, t92
- 134: ADDL $0xB8, t92
- 135: FPU_WQ 0x0:0x1A, (t92)
- 136: INCEIPL $4
-
- 0x25482B0C: 93630040 stw r27,64(r3)
- 137: GETL R27, t94
- 138: GETL R3, t96
- 139: ADDL $0x40, t96
- 140: STL t94, (t96)
- 141: INCEIPL $4
-
- 0x25482B10: DB6300C0 stfd f27,192(r3)
- 142: GETL R3, t98
- 143: ADDL $0xC0, t98
- 144: FPU_WQ 0x0:0x1B, (t98)
- 145: INCEIPL $4
-
- 0x25482B14: 93830044 stw r28,68(r3)
- 146: GETL R28, t100
- 147: GETL R3, t102
- 148: ADDL $0x44, t102
- 149: STL t100, (t102)
- 150: INCEIPL $4
-
- 0x25482B18: DB8300C8 stfd f28,200(r3)
- 151: GETL R3, t104
- 152: ADDL $0xC8, t104
- 153: FPU_WQ 0x0:0x1C, (t104)
- 154: INCEIPL $4
-
- 0x25482B1C: 93A30048 stw r29,72(r3)
- 155: GETL R29, t106
- 156: GETL R3, t108
- 157: ADDL $0x48, t108
- 158: STL t106, (t108)
- 159: INCEIPL $4
-
- 0x25482B20: DBA300D0 stfd f29,208(r3)
- 160: GETL R3, t110
- 161: ADDL $0xD0, t110
- 162: FPU_WQ 0x0:0x1D, (t110)
- 163: INCEIPL $4
-
- 0x25482B24: 93C3004C stw r30,76(r3)
- 164: GETL R30, t112
- 165: GETL R3, t114
- 166: ADDL $0x4C, t114
- 167: STL t112, (t114)
- 168: INCEIPL $4
-
- 0x25482B28: DBC300D8 stfd f30,216(r3)
- 169: GETL R3, t116
- 170: ADDL $0xD8, t116
- 171: FPU_WQ 0x0:0x1E, (t116)
- 172: INCEIPL $4
-
- 0x25482B2C: 93E30050 stw r31,80(r3)
- 173: GETL R31, t118
- 174: GETL R3, t120
- 175: ADDL $0x50, t120
- 176: STL t118, (t120)
- 177: INCEIPL $4
-
- 0x25482B30: DBE300E0 stfd f31,224(r3)
- 178: GETL R3, t122
- 179: ADDL $0xE0, t122
- 180: FPU_WQ 0x0:0x1F, (t122)
- 181: INCEIPL $4
-
- 0x25482B34: 7CC802A6 mflr r6
- 182: GETL LR, t124
- 183: PUTL t124, R6
- 184: INCEIPL $4
-
- 0x25482B38: 480144C9 bl 0x25497000
- 185: MOVL $0x25482B3C, t126
- 186: PUTL t126, LR
- 187: JMPo-c $0x25497000 ($4)
-
-
-. 0 25482A90 172
-. 90 23 00 00 7C 08 02 A6 91 C3 00 0C D9 C3 00 58 90 03 00 08 91 E3 00 10 D9 E3 00 60 7C 00 00 26 92 03 00 14 DA 03 00 68 90 03 00 54 92 23 00 18 DA 23 00 70 92 43 00 1C DA 43 00 78 92 63 00 20 DA 63 00 80 92 83 00 24 DA 83 00 88 92 A3 00 28 DA A3 00 90 92 C3 00 2C DA C3 00 98 92 E3 00 30 DA E3 00 A0 93 03 00 34 DB 03 00 A8 93 23 00 38 DB 23 00 B0 93 43 00 3C DB 43 00 B8 93 63 00 40 DB 63 00 C0 93 83 00 44 DB 83 00 C8 93 A3 00 48 DB A3 00 D0 93 C3 00 4C DB C3 00 D8 93 E3 00 50 DB E3 00 E0 7C C8 02 A6 48 01 44 C9
-
-==== BB 641 (0x25482B3C) approx BBs exec'd 0 ====
-
- 0x25482B3C: 7CA802A6 mflr r5
- 0: GETL LR, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x25482B40: 80A504E4 lwz r5,1252(r5)
- 3: GETL R5, t2
- 4: ADDL $0x4E4, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x25482B44: 7CC803A6 mtlr r6
- 8: GETL R6, t6
- 9: PUTL t6, LR
- 10: INCEIPL $4
-
- 0x25482B48: 80A5003C lwz r5,60(r5)
- 11: GETL R5, t8
- 12: ADDL $0x3C, t8
- 13: LDL (t8), t10
- 14: PUTL t10, R5
- 15: INCEIPL $4
-
- 0x25482B4C: 74A51000 andis. r5,r5,0x1000
- 16: GETL R5, t12
- 17: ANDL $0x10000000, t12
- 18: PUTL t12, R5
- 19: CMP0L t12, t14 (-rSo)
- 20: ICRFL t14, $0x0, CR
- 21: INCEIPL $4
-
- 0x25482B50: 41820158 bc 12,2,0x25482CA8
- 22: Js02o $0x25482CA8
-
-
-. 0 25482B3C 24
-. 7C A8 02 A6 80 A5 04 E4 7C C8 03 A6 80 A5 00 3C 74 A5 10 00 41 82 01 58
-
-==== BB 642 (0x25482CA8) approx BBs exec'd 0 ====
-
- 0x25482CA8: 4BFFD2F0 b 0x2547FF98
- 0: JMPo $0x2547FF98 ($4)
-
-
-. 0 25482CA8 4
-. 4B FF D2 F0
-
-==== BB 643 __sigjmp_save(0x2547FF98) approx BBs exec'd 0 ====
-
- 0x2547FF98: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547FF9C: 38000000 li r0,0
- 6: MOVL $0x0, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x2547FFA0: 900301C0 stw r0,448(r3)
- 9: GETL R0, t6
- 10: GETL R3, t8
- 11: ADDL $0x1C0, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547FFA4: 38210010 addi r1,r1,16
- 14: GETL R1, t10
- 15: ADDL $0x10, t10
- 16: PUTL t10, R1
- 17: INCEIPL $4
-
- 0x2547FFA8: 38600000 li r3,0
- 18: MOVL $0x0, t12
- 19: PUTL t12, R3
- 20: INCEIPL $4
-
- 0x2547FFAC: 4E800020 blr
- 21: GETL LR, t14
- 22: JMPo-r t14 ($4)
-
-
-. 0 2547FF98 24
-. 94 21 FF F0 38 00 00 00 90 03 01 C0 38 21 00 10 38 60 00 00 4E 80 00 20
-
-==== BB 644 (0x2547B5F8) approx BBs exec'd 0 ====
-
- 0x2547B5F8: 7C7F1B79 or. r31,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R31
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x2547B5FC: 8061027C lwz r3,636(r1)
- 5: GETL R1, t4
- 6: ADDL $0x27C, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x2547B600: 7FEAFB78 or r10,r31,r31
- 10: GETL R31, t8
- 11: PUTL t8, R10
- 12: INCEIPL $4
-
- 0x2547B604: 2F9FFFFF cmpi cr7,r31,-1
- 13: GETL R31, t10
- 14: MOVL $0xFFFFFFFF, t14
- 15: CMPL t10, t14, t12 (-rSo)
- 16: ICRFL t12, $0x7, CR
- 17: INCEIPL $4
-
- 0x2547B608: 40820054 bc 4,2,0x2547B65C
- 18: Jc02o $0x2547B65C
-
-
-. 0 2547B5F8 20
-. 7C 7F 1B 79 80 61 02 7C 7F EA FB 78 2F 9F FF FF 40 82 00 54
-
-==== BB 645 (0x2547B60C) approx BBs exec'd 0 ====
-
- 0x2547B60C: 81210280 lwz r9,640(r1)
- 0: GETL R1, t0
- 1: ADDL $0x280, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547B610: 38010010 addi r0,r1,16
- 5: GETL R1, t4
- 6: ADDL $0x10, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x2547B614: 81810278 lwz r12,632(r1)
- 9: GETL R1, t6
- 10: ADDL $0x278, t6
- 11: LDL (t6), t8
- 12: PUTL t8, R12
- 13: INCEIPL $4
-
- 0x2547B618: 90090000 stw r0,0(r9)
- 14: GETL R0, t10
- 15: GETL R9, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x2547B61C: 7D8903A6 mtctr r12
- 18: GETL R12, t14
- 19: PUTL t14, CTR
- 20: INCEIPL $4
-
- 0x2547B620: 4E800421 bctrl
- 21: MOVL $0x2547B624, t16
- 22: PUTL t16, LR
- 23: GETL CTR, t18
- 24: JMPo-c t18 ($4)
-
-
-. 0 2547B60C 24
-. 81 21 02 80 38 01 00 10 81 81 02 78 90 09 00 00 7D 89 03 A6 4E 80 04 21
-
-==== BB 646 openaux(0x2547A0BC) approx BBs exec'd 0 ====
-
- 0x2547A0BC: 7C8802A6 mflr r4
- 0: GETL LR, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x2547A0C0: 9421FFF0 stwu r1,-16(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFFF0, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0x2547A0C4: 93E10008 stw r31,8(r1)
- 9: GETL R31, t6
- 10: GETL R1, t8
- 11: ADDL $0x8, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547A0C8: 7C7F1B78 or r31,r3,r3
- 14: GETL R3, t10
- 15: PUTL t10, R31
- 16: INCEIPL $4
-
- 0x2547A0CC: 38A00000 li r5,0
- 17: MOVL $0x0, t12
- 18: PUTL t12, R5
- 19: INCEIPL $4
-
- 0x2547A0D0: 90810014 stw r4,20(r1)
- 20: GETL R4, t14
- 21: GETL R1, t16
- 22: ADDL $0x14, t16
- 23: STL t14, (t16)
- 24: INCEIPL $4
-
- 0x2547A0D4: 80630000 lwz r3,0(r3)
- 25: GETL R3, t18
- 26: LDL (t18), t20
- 27: PUTL t20, R3
- 28: INCEIPL $4
-
- 0x2547A0D8: 809F0010 lwz r4,16(r31)
- 29: GETL R31, t22
- 30: ADDL $0x10, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R4
- 33: INCEIPL $4
-
- 0x2547A0DC: 80030180 lwz r0,384(r3)
- 34: GETL R3, t26
- 35: ADDL $0x180, t26
- 36: LDL (t26), t28
- 37: PUTL t28, R0
- 38: INCEIPL $4
-
- 0x2547A0E0: 7409C000 andis. r9,r0,0xC000
- 39: GETL R0, t30
- 40: ANDL $0xC0000000, t30
- 41: PUTL t30, R9
- 42: CMP0L t30, t32 (-rSo)
- 43: ICRFL t32, $0x0, CR
- 44: INCEIPL $4
-
- 0x2547A0E4: 540617BE rlwinm r6,r0,2,30,31
- 45: GETL R0, t34
- 46: SHRL $0x1E, t34
- 47: PUTL t34, R6
- 48: INCEIPL $4
-
- 0x2547A0E8: 40820008 bc 4,2,0x2547A0F0
- 49: Jc02o $0x2547A0F0
-
-
-. 0 2547A0BC 48
-. 7C 88 02 A6 94 21 FF F0 93 E1 00 08 7C 7F 1B 78 38 A0 00 00 90 81 00 14 80 63 00 00 80 9F 00 10 80 03 01 80 74 09 C0 00 54 06 17 BE 40 82 00 08
-
-==== BB 647 (0x2547A0EC) approx BBs exec'd 0 ====
-
- 0x2547A0EC: 38C00001 li r6,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R6
- 2: INCEIPL $4
-
- 0x2547A0F0: 80FF0004 lwz r7,4(r31)
- 3: GETL R31, t2
- 4: ADDL $0x4, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R7
- 7: INCEIPL $4
-
- 0x2547A0F4: 811F0008 lwz r8,8(r31)
- 8: GETL R31, t6
- 9: ADDL $0x8, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R8
- 12: INCEIPL $4
-
- 0x2547A0F8: 81230018 lwz r9,24(r3)
- 13: GETL R3, t10
- 14: ADDL $0x18, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R9
- 17: INCEIPL $4
-
- 0x2547A0FC: 4BFFCBED bl 0x25476CE8
- 18: MOVL $0x2547A100, t14
- 19: PUTL t14, LR
- 20: JMPo-c $0x25476CE8 ($4)
-
-
-. 0 2547A0EC 20
-. 38 C0 00 01 80 FF 00 04 81 1F 00 08 81 23 00 18 4B FF CB ED
-
-==== BB 648 (0x25482FA8) approx BBs exec'd 0 ====
-
- 0x25482FA8: 8CA30001 lbzu r5,1(r3)
- 0: GETL R3, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R3
- 3: LDB (t0), t2
- 4: PUTL t2, R5
- 5: INCEIPL $4
-
- 0x25482FAC: 8CC40001 lbzu r6,1(r4)
- 6: GETL R4, t4
- 7: ADDL $0x1, t4
- 8: PUTL t4, R4
- 9: LDB (t4), t6
- 10: PUTL t6, R6
- 11: INCEIPL $4
-
- 0x25482FB0: 2C850000 cmpi cr1,r5,0
- 12: GETL R5, t8
- 13: CMP0L t8, t10 (-rSo)
- 14: ICRFL t10, $0x1, CR
- 15: INCEIPL $4
-
- 0x25482FB4: 7C053000 cmp cr0,r5,r6
- 16: GETL R5, t12
- 17: GETL R6, t14
- 18: CMPL t12, t14, t16 (-rSo)
- 19: ICRFL t16, $0x0, CR
- 20: INCEIPL $4
-
- 0x25482FB8: 4086FFD4 bc 4,6,0x25482F8C
- 21: Jc06o $0x25482F8C
-
-
-. 0 25482FA8 20
-. 8C A3 00 01 8C C4 00 01 2C 85 00 00 7C 05 30 00 40 86 FF D4
-
-==== BB 649 (0x25482F8C) approx BBs exec'd 0 ====
-
- 0x25482F8C: 8CA30001 lbzu r5,1(r3)
- 0: GETL R3, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R3
- 3: LDB (t0), t2
- 4: PUTL t2, R5
- 5: INCEIPL $4
-
- 0x25482F90: 40820034 bc 4,2,0x25482FC4
- 6: Jc02o $0x25482FC4
-
-
-. 0 25482F8C 8
-. 8C A3 00 01 40 82 00 34
-
-==== BB 650 (0x25482FC4) approx BBs exec'd 0 ====
-
- 0x25482FC4: 88A3FFFF lbz r5,-1(r3)
- 0: GETL R3, t0
- 1: ADDL $0xFFFFFFFF, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25482FC8: 7C662850 subf r3,r6,r5
- 5: GETL R6, t4
- 6: GETL R5, t6
- 7: SUBL t4, t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x25482FCC: 4E800020 blr
- 10: GETL LR, t8
- 11: JMPo-r t8 ($4)
-
-
-. 0 25482FC4 12
-. 88 A3 FF FF 7C 66 28 50 4E 80 00 20
-
-==== BB 651 (0x2547706C) approx BBs exec'd 0 ====
-
- 0x2547706C: 7FE3FB78 or r3,r31,r31
- 0: GETL R31, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25477070: 4800BF61 bl 0x25482FD0
- 3: MOVL $0x25477074, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x25482FD0 ($4)
-
-
-. 0 2547706C 8
-. 7F E3 FB 78 48 00 BF 61
-
-==== BB 652 (0x25477074) approx BBs exec'd 0 ====
-
- 0x25477074: 83540000 lwz r26,0(r20)
- 0: GETL R20, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R26
- 3: INCEIPL $4
-
- 0x25477078: 3AC30001 addi r22,r3,1
- 4: GETL R3, t4
- 5: ADDL $0x1, t4
- 6: PUTL t4, R22
- 7: INCEIPL $4
-
- 0x2547707C: 73490001 andi. r9,r26,0x1
- 8: GETL R26, t6
- 9: ANDL $0x1, t6
- 10: PUTL t6, R9
- 11: CMP0L t6, t8 (-rSo)
- 12: ICRFL t8, $0x0, CR
- 13: INCEIPL $4
-
- 0x25477080: 408203C4 bc 4,2,0x25477444
- 14: Jc02o $0x25477444
-
-
-. 0 25477074 16
-. 83 54 00 00 3A C3 00 01 73 49 00 01 40 82 03 C4
-
-==== BB 653 (0x25477084) approx BBs exec'd 0 ====
-
- 0x25477084: 3B40FFFF li r26,-1
- 0: MOVL $0xFFFFFFFF, t0
- 1: PUTL t0, R26
- 2: INCEIPL $4
-
- 0x25477088: 418E0020 bc 12,14,0x254770A8
- 3: Js14o $0x254770A8
-
-
-. 0 25477084 8
-. 3B 40 FF FF 41 8E 00 20
-
-==== BB 654 (0x2547708C) approx BBs exec'd 0 ====
-
- 0x2547708C: 839B0094 lwz r28,148(r27)
- 0: GETL R27, t0
- 1: ADDL $0x94, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R28
- 4: INCEIPL $4
-
- 0x25477090: 7F6CFE70 srawi r12,r27,31
- 5: GETL R27, t4
- 6: SARL $0x1F, t4 (-wCa)
- 7: PUTL t4, R12
- 8: INCEIPL $4
-
- 0x25477094: 7D9DDA78 xor r29,r12,r27
- 9: GETL R12, t6
- 10: GETL R27, t8
- 11: XORL t6, t8
- 12: PUTL t8, R29
- 13: INCEIPL $4
-
- 0x25477098: 2E1AFFFF cmpi cr4,r26,-1
- 14: GETL R26, t10
- 15: MOVL $0xFFFFFFFF, t14
- 16: CMPL t10, t14, t12 (-rSo)
- 17: ICRFL t12, $0x4, CR
- 18: INCEIPL $4
-
- 0x2547709C: 2F9C0000 cmpi cr7,r28,0
- 19: GETL R28, t16
- 20: CMP0L t16, t18 (-rSo)
- 21: ICRFL t18, $0x7, CR
- 22: INCEIPL $4
-
- 0x254770A0: 7DCCE850 subf r14,r12,r29
- 23: GETL R12, t20
- 24: GETL R29, t22
- 25: SUBL t20, t22
- 26: PUTL t22, R14
- 27: INCEIPL $4
-
- 0x254770A4: 409E016C bc 4,30,0x25477210
- 28: Jc30o $0x25477210
-
-
-. 0 2547708C 28
-. 83 9B 00 94 7F 6C FE 70 7D 9D DA 78 2E 1A FF FF 2F 9C 00 00 7D CC E8 50 40 9E 01 6C
-
-==== BB 655 (0x254770A8) approx BBs exec'd 0 ====
-
- 0x254770A8: 2C9B0000 cmpi cr1,r27,0
- 0: GETL R27, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x254770AC: 7F65FE70 srawi r5,r27,31
- 4: GETL R27, t4
- 5: SARL $0x1F, t4 (-wCa)
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x254770B0: 7CA0DA78 xor r0,r5,r27
- 8: GETL R5, t6
- 9: GETL R27, t8
- 10: XORL t6, t8
- 11: PUTL t8, R0
- 12: INCEIPL $4
-
- 0x254770B4: 7F7DDB78 or r29,r27,r27
- 13: GETL R27, t10
- 14: PUTL t10, R29
- 15: INCEIPL $4
-
- 0x254770B8: 7DC50050 subf r14,r5,r0
- 16: GETL R5, t12
- 17: GETL R0, t14
- 18: SUBL t12, t14
- 19: PUTL t14, R14
- 20: INCEIPL $4
-
- 0x254770BC: 41860370 bc 12,6,0x2547742C
- 21: Js06o $0x2547742C
-
-
-. 0 254770A8 24
-. 2C 9B 00 00 7F 65 FE 70 7C A0 DA 78 7F 7D DB 78 7D C5 00 50 41 86 03 70
-
-==== BB 656 (0x254770C0) approx BBs exec'd 0 ====
-
- 0x254770C0: 825E019C lwz r18,412(r30)
- 0: GETL R30, t0
- 1: ADDL $0x19C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R18
- 4: INCEIPL $4
-
- 0x254770C4: 39E0FFFF li r15,-1
- 5: MOVL $0xFFFFFFFF, t4
- 6: PUTL t4, R15
- 7: INCEIPL $4
-
- 0x254770C8: 48000024 b 0x254770EC
- 8: JMPo $0x254770EC ($4)
-
-
-. 0 254770C0 12
-. 82 5E 01 9C 39 E0 FF FF 48 00 00 24
-
-==== BB 657 (0x254770EC) approx BBs exec'd 0 ====
-
- 0x254770EC: 807D018C lwz r3,396(r29)
- 0: GETL R29, t0
- 1: ADDL $0x18C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x254770F0: 3B9D018C addi r28,r29,396
- 5: GETL R29, t4
- 6: ADDL $0x18C, t4
- 7: PUTL t4, R28
- 8: INCEIPL $4
-
- 0x254770F4: 38000000 li r0,0
- 9: MOVL $0x0, t6
- 10: PUTL t6, R0
- 11: INCEIPL $4
-
- 0x254770F8: 2E03FFFF cmpi cr4,r3,-1
- 12: GETL R3, t8
- 13: MOVL $0xFFFFFFFF, t12
- 14: CMPL t8, t12, t10 (-rSo)
- 15: ICRFL t10, $0x4, CR
- 16: INCEIPL $4
-
- 0x254770FC: 2F030000 cmpi cr6,r3,0
- 17: GETL R3, t14
- 18: CMP0L t14, t16 (-rSo)
- 19: ICRFL t16, $0x6, CR
- 20: INCEIPL $4
-
- 0x25477100: 4192002C bc 12,18,0x2547712C
- 21: Js18o $0x2547712C
-
-
-. 0 254770EC 24
-. 80 7D 01 8C 3B 9D 01 8C 38 00 00 00 2E 03 FF FF 2F 03 00 00 41 92 00 2C
-
-==== BB 658 (0x2547712C) approx BBs exec'd 0 ====
-
- 0x2547712C: 2C000000 cmpi cr0,r0,0
- 0: GETL R0, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0x25477130: 7F86E378 or r6,r28,r28
- 4: GETL R28, t4
- 5: PUTL t4, R6
- 6: INCEIPL $4
-
- 0x25477134: 7FE3FB78 or r3,r31,r31
- 7: GETL R31, t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x25477138: 7EC4B378 or r4,r22,r22
- 10: GETL R22, t8
- 11: PUTL t8, R4
- 12: INCEIPL $4
-
- 0x2547713C: 7EE5BB78 or r5,r23,r23
- 13: GETL R23, t10
- 14: PUTL t10, R5
- 15: INCEIPL $4
-
- 0x25477140: 38E10228 addi r7,r1,552
- 16: GETL R1, t12
- 17: ADDL $0x228, t12
- 18: PUTL t12, R7
- 19: INCEIPL $4
-
- 0x25477144: 39010018 addi r8,r1,24
- 20: GETL R1, t14
- 21: ADDL $0x18, t14
- 22: PUTL t14, R8
- 23: INCEIPL $4
-
- 0x25477148: 4182FF84 bc 12,2,0x254770CC
- 24: Js02o $0x254770CC
-
-
-. 0 2547712C 32
-. 2C 00 00 00 7F 86 E3 78 7F E3 FB 78 7E C4 B3 78 7E E5 BB 78 38 E1 02 28 39 01 00 18 41 82 FF 84
-
-==== BB 659 (0x254770CC) approx BBs exec'd 0 ====
-
- 0x254770CC: 2E1AFFFF cmpi cr4,r26,-1
- 0: GETL R26, t0
- 1: MOVL $0xFFFFFFFF, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x4, CR
- 4: INCEIPL $4
-
- 0x254770D0: 83BD0168 lwz r29,360(r29)
- 5: GETL R29, t6
- 6: ADDL $0x168, t6
- 7: LDL (t6), t8
- 8: PUTL t8, R29
- 9: INCEIPL $4
-
- 0x254770D4: 313DFFFF addic r9,r29,-1
- 10: GETL R29, t10
- 11: ADCL $0xFFFFFFFF, t10 (-wCa)
- 12: PUTL t10, R9
- 13: INCEIPL $4
-
- 0x254770D8: 7CC9E910 subfe r6,r9,r29
- 14: GETL R9, t12
- 15: GETL R29, t14
- 16: SBBL t12, t14 (-rCa-wCa)
- 17: PUTL t14, R6
- 18: INCEIPL $4
-
- 0x254770DC: 7D200026 mfcr r9
- 19: GETL CR, t16
- 20: PUTL t16, R9
- 21: INCEIPL $4
-
- 0x254770E0: 55299FFE rlwinm r9,r9,19,31,31
- 22: GETL R9, t18
- 23: ROLL $0x13, t18
- 24: ANDL $0x1, t18
- 25: PUTL t18, R9
- 26: INCEIPL $4
-
- 0x254770E4: 7D2B3039 and. r11,r9,r6
- 27: GETL R9, t20
- 28: GETL R6, t22
- 29: ANDL t20, t22
- 30: PUTL t22, R11
- 31: CMP0L t22, t24 (-rSo)
- 32: ICRFL t24, $0x0, CR
- 33: INCEIPL $4
-
- 0x254770E8: 418200B0 bc 12,2,0x25477198
- 34: Js02o $0x25477198
-
-
-. 0 254770CC 32
-. 2E 1A FF FF 83 BD 01 68 31 3D FF FF 7C C9 E9 10 7D 20 00 26 55 29 9F FE 7D 2B 30 39 41 82 00 B0
-
-==== BB 660 (0x25477198) approx BBs exec'd 0 ====
-
- 0x25477198: 409200A8 bc 4,18,0x25477240
- 0: Jc18o $0x25477240
-
-
-. 0 25477198 4
-. 40 92 00 A8
-
-==== BB 661 (0x2547719C) approx BBs exec'd 0 ====
-
- 0x2547719C: 80B50000 lwz r5,0(r21)
- 0: GETL R21, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R5
- 3: INCEIPL $4
-
- 0x254771A0: 2F850000 cmpi cr7,r5,0
- 4: GETL R5, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x7, CR
- 7: INCEIPL $4
-
- 0x254771A4: 419E0068 bc 12,30,0x2547720C
- 8: Js30o $0x2547720C
-
-
-. 0 2547719C 12
-. 80 B5 00 00 2F 85 00 00 41 9E 00 68
-
-==== BB 662 (0x254771A8) approx BBs exec'd 0 ====
-
- 0x254771A8: 83A50180 lwz r29,384(r5)
- 0: GETL R5, t0
- 1: ADDL $0x180, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x254771AC: 7CAADA78 xor r10,r5,r27
- 5: GETL R5, t4
- 6: GETL R27, t6
- 7: XORL t4, t6
- 8: PUTL t6, R10
- 9: INCEIPL $4
-
- 0x254771B0: 300AFFFF addic r0,r10,-1
- 10: GETL R10, t8
- 11: ADCL $0xFFFFFFFF, t8 (-wCa)
- 12: PUTL t8, R0
- 13: INCEIPL $4
-
- 0x254771B4: 7D005110 subfe r8,r0,r10
- 14: GETL R0, t10
- 15: GETL R10, t12
- 16: SBBL t10, t12 (-rCa-wCa)
- 17: PUTL t12, R8
- 18: INCEIPL $4
-
- 0x254771B8: 57BC0002 rlwinm r28,r29,0,0,1
- 19: GETL R29, t14
- 20: ANDL $0xC0000000, t14
- 21: PUTL t14, R28
- 22: INCEIPL $4
-
- 0x254771BC: 6F928000 xoris r18,r28,0x8000
- 23: GETL R28, t16
- 24: XORL $0x80000000, t16
- 25: PUTL t16, R18
- 26: INCEIPL $4
-
- 0x254771C0: 3132FFFF addic r9,r18,-1
- 27: GETL R18, t18
- 28: ADCL $0xFFFFFFFF, t18 (-wCa)
- 29: PUTL t18, R9
- 30: INCEIPL $4
-
- 0x254771C4: 7DE99110 subfe r15,r9,r18
- 31: GETL R9, t20
- 32: GETL R18, t22
- 33: SBBL t20, t22 (-rCa-wCa)
- 34: PUTL t22, R15
- 35: INCEIPL $4
-
- 0x254771C8: 7DE04039 and. r0,r15,r8
- 36: GETL R15, t24
- 37: GETL R8, t26
- 38: ANDL t24, t26
- 39: PUTL t26, R0
- 40: CMP0L t26, t28 (-rSo)
- 41: ICRFL t28, $0x0, CR
- 42: INCEIPL $4
-
- 0x254771CC: 41820040 bc 12,2,0x2547720C
- 43: Js02o $0x2547720C
-
-
-. 0 254771A8 40
-. 83 A5 01 80 7C AA DA 78 30 0A FF FF 7D 00 51 10 57 BC 00 02 6F 92 80 00 31 32 FF FF 7D E9 91 10 7D E0 40 39 41 82 00 40
-
-==== BB 663 (0x2547720C) approx BBs exec'd 0 ====
-
- 0x2547720C: 40920034 bc 4,18,0x25477240
- 0: Jc18o $0x25477240
-
-
-. 0 2547720C 4
-. 40 92 00 34
-
-==== BB 664 (0x25477210) approx BBs exec'd 0 ====
-
- 0x25477210: 80DE0168 lwz r6,360(r30)
- 0: GETL R30, t0
- 1: ADDL $0x168, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x25477214: 80A60000 lwz r5,0(r6)
- 5: GETL R6, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R5
- 8: INCEIPL $4
-
- 0x25477218: 2C85FFFF cmpi cr1,r5,-1
- 9: GETL R5, t8
- 10: MOVL $0xFFFFFFFF, t12
- 11: CMPL t8, t12, t10 (-rSo)
- 12: ICRFL t10, $0x1, CR
- 13: INCEIPL $4
-
- 0x2547721C: 41860024 bc 12,6,0x25477240
- 14: Js06o $0x25477240
-
-
-. 0 25477210 16
-. 80 DE 01 68 80 A6 00 00 2C 85 FF FF 41 86 00 24
-
-==== BB 665 (0x25477220) approx BBs exec'd 0 ====
-
- 0x25477220: 7FE3FB78 or r3,r31,r31
- 0: GETL R31, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25477224: 7EC4B378 or r4,r22,r22
- 3: GETL R22, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x25477228: 7EE5BB78 or r5,r23,r23
- 6: GETL R23, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x2547722C: 38E10228 addi r7,r1,552
- 9: GETL R1, t6
- 10: ADDL $0x228, t6
- 11: PUTL t6, R7
- 12: INCEIPL $4
-
- 0x25477230: 39010018 addi r8,r1,24
- 13: GETL R1, t8
- 14: ADDL $0x18, t8
- 15: PUTL t8, R8
- 16: INCEIPL $4
-
- 0x25477234: 4BFFF561 bl 0x25476794
- 17: MOVL $0x25477238, t10
- 18: PUTL t10, LR
- 19: JMPo-c $0x25476794 ($4)
-
-
-. 0 25477220 24
-. 7F E3 FB 78 7E C4 B3 78 7E E5 BB 78 38 E1 02 28 39 01 00 18 4B FF F5 61
-
-==== BB 666 open_path(0x25476794) approx BBs exec'd 0 ====
-
- 0x25476794: 9421FF00 stwu r1,-256(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFF00, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25476798: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x2547679C: 48020865 bl 0x25497000
- 9: MOVL $0x254767A0, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 25476794 12
-. 94 21 FF 00 7C 08 02 A6 48 02 08 65
-
-==== BB 667 (0x254767A0) approx BBs exec'd 0 ====
-
- 0x254767A0: 93C100F8 stw r30,248(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0xF8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x254767A4: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x254767A8: 924100C8 stw r18,200(r1)
- 8: GETL R18, t6
- 9: GETL R1, t8
- 10: ADDL $0xC8, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x254767AC: 926100CC stw r19,204(r1)
- 13: GETL R19, t10
- 14: GETL R1, t12
- 15: ADDL $0xCC, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x254767B0: 7D200026 mfcr r9
- 18: GETL CR, t14
- 19: PUTL t14, R9
- 20: INCEIPL $4
-
- 0x254767B4: 90010104 stw r0,260(r1)
- 21: GETL R0, t16
- 22: GETL R1, t18
- 23: ADDL $0x104, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x254767B8: 38000000 li r0,0
- 26: MOVL $0x0, t20
- 27: PUTL t20, R0
- 28: INCEIPL $4
-
- 0x254767BC: 825E015C lwz r18,348(r30)
- 29: GETL R30, t22
- 30: ADDL $0x15C, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R18
- 33: INCEIPL $4
-
- 0x254767C0: 827E0158 lwz r19,344(r30)
- 34: GETL R30, t26
- 35: ADDL $0x158, t26
- 36: LDL (t26), t28
- 37: PUTL t28, R19
- 38: INCEIPL $4
-
- 0x254767C4: 920100C0 stw r16,192(r1)
- 39: GETL R16, t30
- 40: GETL R1, t32
- 41: ADDL $0xC0, t32
- 42: STL t30, (t32)
- 43: INCEIPL $4
-
- 0x254767C8: 922100C4 stw r17,196(r1)
- 44: GETL R17, t34
- 45: GETL R1, t36
- 46: ADDL $0xC4, t36
- 47: STL t34, (t36)
- 48: INCEIPL $4
-
- 0x254767CC: 82130000 lwz r16,0(r19)
- 49: GETL R19, t38
- 50: LDL (t38), t40
- 51: PUTL t40, R16
- 52: INCEIPL $4
-
- 0x254767D0: 82320000 lwz r17,0(r18)
- 53: GETL R18, t42
- 54: LDL (t42), t44
- 55: PUTL t44, R17
- 56: INCEIPL $4
-
- 0x254767D4: 7D124378 or r18,r8,r8
- 57: GETL R8, t46
- 58: PUTL t46, R18
- 59: INCEIPL $4
-
- 0x254767D8: 91E100BC stw r15,188(r1)
- 60: GETL R15, t48
- 61: GETL R1, t50
- 62: ADDL $0xBC, t50
- 63: STL t48, (t50)
- 64: INCEIPL $4
-
- 0x254767DC: 7DF08A14 add r15,r16,r17
- 65: GETL R16, t52
- 66: GETL R17, t54
- 67: ADDL t52, t54
- 68: PUTL t54, R15
- 69: INCEIPL $4
-
- 0x254767E0: 91C100B8 stw r14,184(r1)
- 70: GETL R14, t56
- 71: GETL R1, t58
- 72: ADDL $0xB8, t58
- 73: STL t56, (t58)
- 74: INCEIPL $4
-
- 0x254767E4: 93E100FC stw r31,252(r1)
- 75: GETL R31, t60
- 76: GETL R1, t62
- 77: ADDL $0xFC, t62
- 78: STL t60, (t62)
- 79: INCEIPL $4
-
- 0x254767E8: 7DCF2214 add r14,r15,r4
- 80: GETL R15, t64
- 81: GETL R4, t66
- 82: ADDL t64, t66
- 83: PUTL t66, R14
- 84: INCEIPL $4
-
- 0x254767EC: 7C3F0B78 or r31,r1,r1
- 85: GETL R1, t68
- 86: PUTL t68, R31
- 87: INCEIPL $4
-
- 0x254767F0: 398E001E addi r12,r14,30
- 88: GETL R14, t70
- 89: ADDL $0x1E, t70
- 90: PUTL t70, R12
- 91: INCEIPL $4
-
- 0x254767F4: 90DF0084 stw r6,132(r31)
- 92: GETL R6, t72
- 93: GETL R31, t74
- 94: ADDL $0x84, t74
- 95: STL t72, (t74)
- 96: INCEIPL $4
-
- 0x254767F8: 558B0036 rlwinm r11,r12,0,0,27
- 97: GETL R12, t76
- 98: ANDL $0xFFFFFFF0, t76
- 99: PUTL t76, R11
- 100: INCEIPL $4
-
- 0x254767FC: 81410000 lwz r10,0(r1)
- 101: GETL R1, t78
- 102: LDL (t78), t80
- 103: PUTL t80, R10
- 104: INCEIPL $4
-
- 0x25476800: 7C711B78 or r17,r3,r3
- 105: GETL R3, t82
- 106: PUTL t82, R17
- 107: INCEIPL $4
-
- 0x25476804: 92A100D4 stw r21,212(r1)
- 108: GETL R21, t84
- 109: GETL R1, t86
- 110: ADDL $0xD4, t86
- 111: STL t84, (t86)
- 112: INCEIPL $4
-
- 0x25476808: 39E00000 li r15,0
- 113: MOVL $0x0, t88
- 114: PUTL t88, R15
- 115: INCEIPL $4
-
- 0x2547680C: 912100B4 stw r9,180(r1)
- 116: GETL R9, t90
- 117: GETL R1, t92
- 118: ADDL $0xB4, t92
- 119: STL t90, (t92)
- 120: INCEIPL $4
-
- 0x25476810: 7D2B00D0 neg r9,r11
- 121: GETL R11, t94
- 122: NEGL t94
- 123: PUTL t94, R9
- 124: INCEIPL $4
-
- 0x25476814: 82A60000 lwz r21,0(r6)
- 125: GETL R6, t96
- 126: LDL (t96), t98
- 127: PUTL t98, R21
- 128: INCEIPL $4
-
- 0x25476818: 92C100D8 stw r22,216(r1)
- 129: GETL R22, t100
- 130: GETL R1, t102
- 131: ADDL $0xD8, t102
- 132: STL t100, (t102)
- 133: INCEIPL $4
-
- 0x2547681C: 7C962378 or r22,r4,r4
- 134: GETL R4, t104
- 135: PUTL t104, R22
- 136: INCEIPL $4
-
- 0x25476820: 934100E8 stw r26,232(r1)
- 137: GETL R26, t106
- 138: GETL R1, t108
- 139: ADDL $0xE8, t108
- 140: STL t106, (t108)
- 141: INCEIPL $4
-
- 0x25476824: 3B40FFFF li r26,-1
- 142: MOVL $0xFFFFFFFF, t110
- 143: PUTL t110, R26
- 144: INCEIPL $4
-
- 0x25476828: 936100EC stw r27,236(r1)
- 145: GETL R27, t112
- 146: GETL R1, t114
- 147: ADDL $0xEC, t114
- 148: STL t112, (t114)
- 149: INCEIPL $4
-
- 0x2547682C: 2E1AFFFF cmpi cr4,r26,-1
- 150: GETL R26, t116
- 151: MOVL $0xFFFFFFFF, t120
- 152: CMPL t116, t120, t118 (-rSo)
- 153: ICRFL t118, $0x4, CR
- 154: INCEIPL $4
-
- 0x25476830: 93A100F4 stw r29,244(r1)
- 155: GETL R29, t122
- 156: GETL R1, t124
- 157: ADDL $0xF4, t124
- 158: STL t122, (t124)
- 159: INCEIPL $4
-
- 0x25476834: 928100D0 stw r20,208(r1)
- 160: GETL R20, t126
- 161: GETL R1, t128
- 162: ADDL $0xD0, t128
- 163: STL t126, (t128)
- 164: INCEIPL $4
-
- 0x25476838: 92E100DC stw r23,220(r1)
- 165: GETL R23, t130
- 166: GETL R1, t132
- 167: ADDL $0xDC, t132
- 168: STL t130, (t132)
- 169: INCEIPL $4
-
- 0x2547683C: 930100E0 stw r24,224(r1)
- 170: GETL R24, t134
- 171: GETL R1, t136
- 172: ADDL $0xE0, t136
- 173: STL t134, (t136)
- 174: INCEIPL $4
-
- 0x25476840: 932100E4 stw r25,228(r1)
- 175: GETL R25, t138
- 176: GETL R1, t140
- 177: ADDL $0xE4, t140
- 178: STL t138, (t140)
- 179: INCEIPL $4
-
- 0x25476844: 938100F0 stw r28,240(r1)
- 180: GETL R28, t142
- 181: GETL R1, t144
- 182: ADDL $0xF0, t144
- 183: STL t142, (t144)
- 184: INCEIPL $4
-
- 0x25476848: 7D41496E stwux r10,r1,r9
- 185: GETL R9, t146
- 186: GETL R1, t148
- 187: ADDL t148, t146
- 188: PUTL t146, R1
- 189: GETL R10, t150
- 190: STL t150, (t146)
- 191: INCEIPL $4
-
- 0x2547684C: 38810017 addi r4,r1,23
- 192: GETL R1, t152
- 193: ADDL $0x17, t152
- 194: PUTL t152, R4
- 195: INCEIPL $4
-
- 0x25476850: 83B50000 lwz r29,0(r21)
- 196: GETL R21, t154
- 197: LDL (t154), t156
- 198: PUTL t156, R29
- 199: INCEIPL $4
-
- 0x25476854: 81DE04F4 lwz r14,1268(r30)
- 200: GETL R30, t158
- 201: ADDL $0x4F4, t158
- 202: LDL (t158), t160
- 203: PUTL t160, R14
- 204: INCEIPL $4
-
- 0x25476858: 549B0036 rlwinm r27,r4,0,0,27
- 205: GETL R4, t162
- 206: ANDL $0xFFFFFFF0, t162
- 207: PUTL t162, R27
- 208: INCEIPL $4
-
- 0x2547685C: 90BF0080 stw r5,128(r31)
- 209: GETL R5, t164
- 210: GETL R31, t166
- 211: ADDL $0x80, t166
- 212: STL t164, (t166)
- 213: INCEIPL $4
-
- 0x25476860: 90FF0088 stw r7,136(r31)
- 214: GETL R7, t168
- 215: GETL R31, t170
- 216: ADDL $0x88, t170
- 217: STL t168, (t170)
- 218: INCEIPL $4
-
- 0x25476864: 901F008C stw r0,140(r31)
- 219: GETL R0, t172
- 220: GETL R31, t174
- 221: ADDL $0x8C, t174
- 222: STL t172, (t174)
- 223: INCEIPL $4
-
- 0x25476868: 806E0000 lwz r3,0(r14)
- 224: GETL R14, t176
- 225: LDL (t176), t178
- 226: PUTL t178, R3
- 227: INCEIPL $4
-
- 0x2547686C: 3A600000 li r19,0
- 228: MOVL $0x0, t180
- 229: PUTL t180, R19
- 230: INCEIPL $4
-
- 0x25476870: 3AE00000 li r23,0
- 231: MOVL $0x0, t182
- 232: PUTL t182, R23
- 233: INCEIPL $4
-
- 0x25476874: 70690001 andi. r9,r3,0x1
- 234: GETL R3, t184
- 235: ANDL $0x1, t184
- 236: PUTL t184, R9
- 237: CMP0L t184, t186 (-rSo)
- 238: ICRFL t186, $0x0, CR
- 239: INCEIPL $4
-
- 0x25476878: 4082025C bc 4,2,0x25476AD4
- 240: Jc02o $0x25476AD4
-
-
-. 0 254767A0 220
-. 93 C1 00 F8 7F C8 02 A6 92 41 00 C8 92 61 00 CC 7D 20 00 26 90 01 01 04 38 00 00 00 82 5E 01 5C 82 7E 01 58 92 01 00 C0 92 21 00 C4 82 13 00 00 82 32 00 00 7D 12 43 78 91 E1 00 BC 7D F0 8A 14 91 C1 00 B8 93 E1 00 FC 7D CF 22 14 7C 3F 0B 78 39 8E 00 1E 90 DF 00 84 55 8B 00 36 81 41 00 00 7C 71 1B 78 92 A1 00 D4 39 E0 00 00 91 21 00 B4 7D 2B 00 D0 82 A6 00 00 92 C1 00 D8 7C 96 23 78 93 41 00 E8 3B 40 FF FF 93 61 00 EC 2E 1A FF FF 93 A1 00 F4 92 81 00 D0 92 E1 00 DC 93 01 00 E0 93 21 00 E4 93 81 00 F0 7D 41 49 6E 38 81 00 17 83 B5 00 00 81 DE 04 F4 54 9B 00 36 90 BF 00 80 90 FF 00 88 90 1F 00 8C 80 6E 00 00 3A 60 00 00 3A E0 00 00 70 69 00 01 40 82 02 5C
-
-==== BB 668 (0x2547687C) approx BBs exec'd 0 ====
-
- 0x2547687C: 809D000C lwz r4,12(r29)
- 0: GETL R29, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x25476880: 7F63DB78 or r3,r27,r27
- 5: GETL R27, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25476884: 80BD0010 lwz r5,16(r29)
- 8: GETL R29, t6
- 9: ADDL $0x10, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R5
- 12: INCEIPL $4
-
- 0x25476888: 3B800000 li r28,0
- 13: MOVL $0x0, t10
- 14: PUTL t10, R28
- 15: INCEIPL $4
-
- 0x2547688C: 4800D195 bl 0x25483A20
- 16: MOVL $0x25476890, t12
- 17: PUTL t12, LR
- 18: JMPo-c $0x25483A20 ($4)
-
-
-. 0 2547687C 20
-. 80 9D 00 0C 7F 63 DB 78 80 BD 00 10 3B 80 00 00 48 00 D1 95
-
-==== BB 669 (0x25476890) approx BBs exec'd 0 ====
-
- 0x25476890: 7C781B78 or r24,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R24
- 2: INCEIPL $4
-
- 0x25476894: 409201A0 bc 4,18,0x25476A34
- 3: Jc18o $0x25476A34
-
-
-. 0 25476890 8
-. 7C 78 1B 78 40 92 01 A0
-
-==== BB 670 (0x25476898) approx BBs exec'd 0 ====
-
- 0x25476898: 833E0154 lwz r25,340(r30)
- 0: GETL R30, t0
- 1: ADDL $0x154, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R25
- 4: INCEIPL $4
-
- 0x2547689C: 81990000 lwz r12,0(r25)
- 5: GETL R25, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R12
- 8: INCEIPL $4
-
- 0x254768A0: 7F9C6040 cmpl cr7,r28,r12
- 9: GETL R28, t8
- 10: GETL R12, t10
- 11: CMPUL t8, t10, t12 (-rSo)
- 12: ICRFL t12, $0x7, CR
- 13: INCEIPL $4
-
- 0x254768A4: 409C014C bc 4,28,0x254769F0
- 14: Jc28o $0x254769F0
-
-
-. 0 25476898 16
-. 83 3E 01 54 81 99 00 00 7F 9C 60 40 40 9C 01 4C
-
-==== BB 671 (0x254768A8) approx BBs exec'd 0 ====
-
- 0x254768A8: 817E0228 lwz r11,552(r30)
- 0: GETL R30, t0
- 1: ADDL $0x228, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x254768AC: 3A800002 li r20,2
- 5: MOVL $0x2, t4
- 6: PUTL t4, R20
- 7: INCEIPL $4
-
- 0x254768B0: 820B0000 lwz r16,0(r11)
- 8: GETL R11, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R16
- 11: INCEIPL $4
-
- 0x254768B4: 4800001C b 0x254768D0
- 12: JMPo $0x254768D0 ($4)
-
-
-. 0 254768A8 16
-. 81 7E 02 28 3A 80 00 02 82 0B 00 00 48 00 00 1C
-
-==== BB 672 (0x254768D0) approx BBs exec'd 0 ====
-
- 0x254768D0: 80DD0014 lwz r6,20(r29)
- 0: GETL R29, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x254768D4: 2C860001 cmpi cr1,r6,1
- 5: GETL R6, t4
- 6: MOVL $0x1, t8
- 7: CMPL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x1, CR
- 9: INCEIPL $4
-
- 0x254768D8: 41A6FFE0 bc 13,6,0x254768B8
- 10: Js06o $0x254768B8
-
-
-. 0 254768D0 12
-. 80 DD 00 14 2C 86 00 01 41 A6 FF E0
-
-==== BB 673 (0x254768DC) approx BBs exec'd 0 ====
-
- 0x254768DC: 813E0160 lwz r9,352(r30)
- 0: GETL R30, t0
- 1: ADDL $0x160, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x254768E0: 578A1838 rlwinm r10,r28,3,0,28
- 5: GETL R28, t4
- 6: SHLL $0x3, t4
- 7: PUTL t4, R10
- 8: INCEIPL $4
-
- 0x254768E4: 7F03C378 or r3,r24,r24
- 9: GETL R24, t6
- 10: PUTL t6, R3
- 11: INCEIPL $4
-
- 0x254768E8: 80A90000 lwz r5,0(r9)
- 12: GETL R9, t8
- 13: LDL (t8), t10
- 14: PUTL t10, R5
- 15: INCEIPL $4
-
- 0x254768EC: 7E6A2A14 add r19,r10,r5
- 16: GETL R10, t12
- 17: GETL R5, t14
- 18: ADDL t12, t14
- 19: PUTL t14, R19
- 20: INCEIPL $4
-
- 0x254768F0: 7C8A282E lwzx r4,r10,r5
- 21: GETL R5, t16
- 22: GETL R10, t18
- 23: ADDL t18, t16
- 24: LDL (t16), t20
- 25: PUTL t20, R4
- 26: INCEIPL $4
-
- 0x254768F4: 80B30004 lwz r5,4(r19)
- 27: GETL R19, t22
- 28: ADDL $0x4, t22
- 29: LDL (t22), t24
- 30: PUTL t24, R5
- 31: INCEIPL $4
-
- 0x254768F8: 4800D129 bl 0x25483A20
- 32: MOVL $0x254768FC, t26
- 33: PUTL t26, LR
- 34: JMPo-c $0x25483A20 ($4)
-
-
-. 0 254768DC 32
-. 81 3E 01 60 57 8A 18 38 7F 03 C3 78 80 A9 00 00 7E 6A 2A 14 7C 8A 28 2E 80 B3 00 04 48 00 D1 29
-
-==== BB 674 (0x254768FC) approx BBs exec'd 0 ====
-
- 0x254768FC: 7E248B78 or r4,r17,r17
- 0: GETL R17, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x25476900: 7EC5B378 or r5,r22,r22
- 3: GETL R22, t2
- 4: PUTL t2, R5
- 5: INCEIPL $4
-
- 0x25476904: 4800D11D bl 0x25483A20
- 6: MOVL $0x25476908, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0x25483A20 ($4)
-
-
-. 0 254768FC 12
-. 7E 24 8B 78 7E C5 B3 78 48 00 D1 1D
-
-==== BB 675 (0x25476908) approx BBs exec'd 0 ====
-
- 0x25476908: 834E0000 lwz r26,0(r14)
- 0: GETL R14, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R26
- 3: INCEIPL $4
-
- 0x2547690C: 7E7B1850 subf r19,r27,r3
- 4: GETL R27, t4
- 5: GETL R3, t6
- 6: SUBL t4, t6
- 7: PUTL t6, R19
- 8: INCEIPL $4
-
- 0x25476910: 73490001 andi. r9,r26,0x1
- 9: GETL R26, t8
- 10: ANDL $0x1, t8
- 11: PUTL t8, R9
- 12: CMP0L t8, t10 (-rSo)
- 13: ICRFL t10, $0x0, CR
- 14: INCEIPL $4
-
- 0x25476914: 408201AC bc 4,2,0x25476AC0
- 15: Jc02o $0x25476AC0
-
-
-. 0 25476908 16
-. 83 4E 00 00 7E 7B 18 50 73 49 00 01 40 82 01 AC
-
-==== BB 676 (0x25476918) approx BBs exec'd 0 ====
-
- 0x25476918: 7F63DB78 or r3,r27,r27
- 0: GETL R27, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547691C: 7E449378 or r4,r18,r18
- 3: GETL R18, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x25476920: 4BFFFB25 bl 0x25476444
- 6: MOVL $0x25476924, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0x25476444 ($4)
-
-
-. 0 25476918 12
-. 7F 63 DB 78 7E 44 93 78 4B FF FB 25
-
-==== BB 677 (0x25481FEC) approx BBs exec'd 0 ====
-
- 0x25481FEC: 4BFFF344 b 0x25481330
- 0: JMPo $0x25481330 ($4)
-
-
-. 0 25481FEC 4
-. 4B FF F3 44
-
-==== BB 678 (0x25476924) approx BBs exec'd 0 ====
-
- 0x25476924: 801D0014 lwz r0,20(r29)
- 0: GETL R29, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25476928: 7C7A1B78 or r26,r3,r3
- 5: GETL R3, t4
- 6: PUTL t4, R26
- 7: INCEIPL $4
-
- 0x2547692C: 2E03FFFF cmpi cr4,r3,-1
- 8: GETL R3, t6
- 9: MOVL $0xFFFFFFFF, t10
- 10: CMPL t6, t10, t8 (-rSo)
- 11: ICRFL t8, $0x4, CR
- 12: INCEIPL $4
-
- 0x25476930: 2F000000 cmpi cr6,r0,0
- 13: GETL R0, t12
- 14: CMP0L t12, t14 (-rSo)
- 15: ICRFL t14, $0x6, CR
- 16: INCEIPL $4
-
- 0x25476934: 409A000C bc 4,26,0x25476940
- 17: Jc26o $0x25476940
-
-
-. 0 25476924 20
-. 80 1D 00 14 7C 7A 1B 78 2E 03 FF FF 2F 00 00 00 40 9A 00 0C
-
-==== BB 679 (0x25476938) approx BBs exec'd 0 ====
-
- 0x25476938: 41920078 bc 12,18,0x254769B0
- 0: Js18o $0x254769B0
-
-
-. 0 25476938 4
-. 41 92 00 78
-
-==== BB 680 (0x254769B0) approx BBs exec'd 0 ====
-
- 0x254769B0: 7C769850 subf r3,r22,r19
- 0: GETL R22, t0
- 1: GETL R19, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x254769B4: 7F64DB78 or r4,r27,r27
- 5: GETL R27, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0x254769B8: 7CFB1A14 add r7,r27,r3
- 8: GETL R27, t6
- 9: GETL R3, t8
- 10: ADDL t6, t8
- 11: PUTL t8, R7
- 12: INCEIPL $4
-
- 0x254769BC: 38BF0010 addi r5,r31,16
- 13: GETL R31, t10
- 14: ADDL $0x10, t10
- 15: PUTL t10, R5
- 16: INCEIPL $4
-
- 0x254769C0: 9807FFFF stb r0,-1(r7)
- 17: GETL R0, t12
- 18: GETL R7, t14
- 19: ADDL $0xFFFFFFFF, t14
- 20: STB t12, (t14)
- 21: INCEIPL $4
-
- 0x254769C4: 38600003 li r3,3
- 22: MOVL $0x3, t16
- 23: PUTL t16, R3
- 24: INCEIPL $4
-
- 0x254769C8: 4800B3A1 bl 0x25481D68
- 25: MOVL $0x254769CC, t18
- 26: PUTL t18, LR
- 27: JMPo-c $0x25481D68 ($4)
-
-
-. 0 254769B0 28
-. 7C 76 98 50 7F 64 DB 78 7C FB 1A 14 38 BF 00 10 98 07 FF FF 38 60 00 03 48 00 B3 A1
-
-==== BB 681 __GI___xstat64(0x25481D68) approx BBs exec'd 0 ====
-
- 0x25481D68: 9421FF80 stwu r1,-128(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFF80, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25481D6C: 7CC802A6 mflr r6
- 6: GETL LR, t4
- 7: PUTL t4, R6
- 8: INCEIPL $4
-
- 0x25481D70: 48015291 bl 0x25497000
- 9: MOVL $0x25481D74, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 25481D68 12
-. 94 21 FF 80 7C C8 02 A6 48 01 52 91
-
-==== BB 682 (0x25481D74) approx BBs exec'd 0 ====
-
- 0x25481D74: 93C10078 stw r30,120(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x78, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25481D78: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x25481D7C: 9361006C stw r27,108(r1)
- 8: GETL R27, t6
- 9: GETL R1, t8
- 10: ADDL $0x6C, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x25481D80: 90C10084 stw r6,132(r1)
- 13: GETL R6, t10
- 14: GETL R1, t12
- 15: ADDL $0x84, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x25481D84: 93210064 stw r25,100(r1)
- 18: GETL R25, t14
- 19: GETL R1, t16
- 20: ADDL $0x64, t16
- 21: STL t14, (t16)
- 22: INCEIPL $4
-
- 0x25481D88: 7C791B78 or r25,r3,r3
- 23: GETL R3, t18
- 24: PUTL t18, R25
- 25: INCEIPL $4
-
- 0x25481D8C: 837E04EC lwz r27,1260(r30)
- 26: GETL R30, t20
- 27: ADDL $0x4EC, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R27
- 30: INCEIPL $4
-
- 0x25481D90: 93810070 stw r28,112(r1)
- 31: GETL R28, t24
- 32: GETL R1, t26
- 33: ADDL $0x70, t26
- 34: STL t24, (t26)
- 35: INCEIPL $4
-
- 0x25481D94: 7CBC2B78 or r28,r5,r5
- 36: GETL R5, t28
- 37: PUTL t28, R28
- 38: INCEIPL $4
-
- 0x25481D98: 801B0000 lwz r0,0(r27)
- 39: GETL R27, t30
- 40: LDL (t30), t32
- 41: PUTL t32, R0
- 42: INCEIPL $4
-
- 0x25481D9C: 93E1007C stw r31,124(r1)
- 43: GETL R31, t34
- 44: GETL R1, t36
- 45: ADDL $0x7C, t36
- 46: STL t34, (t36)
- 47: INCEIPL $4
-
- 0x25481DA0: 7C9F2378 or r31,r4,r4
- 48: GETL R4, t38
- 49: PUTL t38, R31
- 50: INCEIPL $4
-
- 0x25481DA4: 2F800000 cmpi cr7,r0,0
- 51: GETL R0, t40
- 52: CMP0L t40, t42 (-rSo)
- 53: ICRFL t42, $0x7, CR
- 54: INCEIPL $4
-
- 0x25481DA8: 93410068 stw r26,104(r1)
- 55: GETL R26, t44
- 56: GETL R1, t46
- 57: ADDL $0x68, t46
- 58: STL t44, (t46)
- 59: INCEIPL $4
-
- 0x25481DAC: 93A10074 stw r29,116(r1)
- 60: GETL R29, t48
- 61: GETL R1, t50
- 62: ADDL $0x74, t50
- 63: STL t48, (t50)
- 64: INCEIPL $4
-
- 0x25481DB0: 409E0048 bc 4,30,0x25481DF8
- 65: Jc30o $0x25481DF8
-
-
-. 0 25481D74 64
-. 93 C1 00 78 7F C8 02 A6 93 61 00 6C 90 C1 00 84 93 21 00 64 7C 79 1B 78 83 7E 04 EC 93 81 00 70 7C BC 2B 78 80 1B 00 00 93 E1 00 7C 7C 9F 23 78 2F 80 00 00 93 41 00 68 93 A1 00 74 40 9E 00 48
-
-==== BB 683 (0x25481DB4) approx BBs exec'd 0 ====
-
- 0x25481DB4: 83BE0514 lwz r29,1300(r30)
- 0: GETL R30, t0
- 1: ADDL $0x514, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x25481DB8: 7C832378 or r3,r4,r4
- 5: GETL R4, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25481DBC: 380000C3 li r0,195
- 8: MOVL $0xC3, t6
- 9: PUTL t6, R0
- 10: INCEIPL $4
-
- 0x25481DC0: 7CA42B78 or r4,r5,r5
- 11: GETL R5, t8
- 12: PUTL t8, R4
- 13: INCEIPL $4
-
- 0x25481DC4: 835D0000 lwz r26,0(r29)
- 14: GETL R29, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R26
- 17: INCEIPL $4
-
- 0x25481DC8: 44000002 sc
- 18: JMPo-sys $0x25481DCC ($4)
-
-
-. 0 25481DB4 24
-. 83 BE 05 14 7C 83 23 78 38 00 00 C3 7C A4 2B 78 83 5D 00 00 44 00 00 02
-
-==== BB 684 (0x25481DCC) approx BBs exec'd 0 ====
-
- 0x25481DCC: 7C000026 mfcr r0
- 0: GETL CR, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x25481DD0: 74091000 andis. r9,r0,0x1000
- 3: GETL R0, t2
- 4: ANDL $0x10000000, t2
- 5: PUTL t2, R9
- 6: CMP0L t2, t4 (-rSo)
- 7: ICRFL t4, $0x0, CR
- 8: INCEIPL $4
-
- 0x25481DD4: 408200C4 bc 4,2,0x25481E98
- 9: Jc02o $0x25481E98
-
-
-. 0 25481DCC 12
-. 7C 00 00 26 74 09 10 00 40 82 00 C4
-
-==== BB 685 (0x25481E98) approx BBs exec'd 0 ====
-
- 0x25481E98: 907D0000 stw r3,0(r29)
- 0: GETL R3, t0
- 1: GETL R29, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0x25481E9C: 3860FFFF li r3,-1
- 4: MOVL $0xFFFFFFFF, t4
- 5: PUTL t4, R3
- 6: INCEIPL $4
-
- 0x25481EA0: 4BFFFF38 b 0x25481DD8
- 7: JMPo $0x25481DD8 ($4)
-
-
-. 0 25481E98 12
-. 90 7D 00 00 38 60 FF FF 4B FF FF 38
-
-==== BB 686 (0x25481DD8) approx BBs exec'd 0 ====
-
- 0x25481DD8: 2C83FFFF cmpi cr1,r3,-1
- 0: GETL R3, t0
- 1: MOVL $0xFFFFFFFF, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0x25481DDC: 40A60044 bc 5,6,0x25481E20
- 5: Jc06o $0x25481E20
-
-
-. 0 25481DD8 8
-. 2C 83 FF FF 40 A6 00 44
-
-==== BB 687 (0x25481DE0) approx BBs exec'd 0 ====
-
- 0x25481DE0: 809D0000 lwz r4,0(r29)
- 0: GETL R29, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R4
- 3: INCEIPL $4
-
- 0x25481DE4: 2F040026 cmpi cr6,r4,38
- 4: GETL R4, t4
- 5: MOVL $0x26, t8
- 6: CMPL t4, t8, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x25481DE8: 40BA0038 bc 5,26,0x25481E20
- 9: Jc26o $0x25481E20
-
-
-. 0 25481DE0 12
-. 80 9D 00 00 2F 04 00 26 40 BA 00 38
-
-==== BB 688 (0x25481E20) approx BBs exec'd 0 ====
-
- 0x25481E20: 80A10084 lwz r5,132(r1)
- 0: GETL R1, t0
- 1: ADDL $0x84, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25481E24: 83210064 lwz r25,100(r1)
- 5: GETL R1, t4
- 6: ADDL $0x64, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R25
- 9: INCEIPL $4
-
- 0x25481E28: 83410068 lwz r26,104(r1)
- 10: GETL R1, t8
- 11: ADDL $0x68, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R26
- 14: INCEIPL $4
-
- 0x25481E2C: 7CA803A6 mtlr r5
- 15: GETL R5, t12
- 16: PUTL t12, LR
- 17: INCEIPL $4
-
- 0x25481E30: 8361006C lwz r27,108(r1)
- 18: GETL R1, t14
- 19: ADDL $0x6C, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R27
- 22: INCEIPL $4
-
- 0x25481E34: 83810070 lwz r28,112(r1)
- 23: GETL R1, t18
- 24: ADDL $0x70, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R28
- 27: INCEIPL $4
-
- 0x25481E38: 83A10074 lwz r29,116(r1)
- 28: GETL R1, t22
- 29: ADDL $0x74, t22
- 30: LDL (t22), t24
- 31: PUTL t24, R29
- 32: INCEIPL $4
-
- 0x25481E3C: 83C10078 lwz r30,120(r1)
- 33: GETL R1, t26
- 34: ADDL $0x78, t26
- 35: LDL (t26), t28
- 36: PUTL t28, R30
- 37: INCEIPL $4
-
- 0x25481E40: 83E1007C lwz r31,124(r1)
- 38: GETL R1, t30
- 39: ADDL $0x7C, t30
- 40: LDL (t30), t32
- 41: PUTL t32, R31
- 42: INCEIPL $4
-
- 0x25481E44: 38210080 addi r1,r1,128
- 43: GETL R1, t34
- 44: ADDL $0x80, t34
- 45: PUTL t34, R1
- 46: INCEIPL $4
-
- 0x25481E48: 4E800020 blr
- 47: GETL LR, t36
- 48: JMPo-r t36 ($4)
-
-
-. 0 25481E20 44
-. 80 A1 00 84 83 21 00 64 83 41 00 68 7C A8 03 A6 83 61 00 6C 83 81 00 70 83 A1 00 74 83 C1 00 78 83 E1 00 7C 38 21 00 80 4E 80 00 20
-
-==== BB 689 (0x254769CC) approx BBs exec'd 0 ====
-
- 0x254769CC: 2F830000 cmpi cr7,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x254769D0: 409E0014 bc 4,30,0x254769E4
- 4: Jc30o $0x254769E4
-
-
-. 0 254769CC 8
-. 2F 83 00 00 40 9E 00 14
-
-==== BB 690 (0x254769E4) approx BBs exec'd 0 ====
-
- 0x254769E4: 38800001 li r4,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x254769E8: 909D0014 stw r4,20(r29)
- 3: GETL R4, t2
- 4: GETL R29, t4
- 5: ADDL $0x14, t4
- 6: STL t2, (t4)
- 7: INCEIPL $4
-
- 0x254769EC: 4BFFFF54 b 0x25476940
- 8: JMPo $0x25476940 ($4)
-
-
-. 0 254769E4 12
-. 38 80 00 01 90 9D 00 14 4B FF FF 54
-
-==== BB 691 (0x25476940) approx BBs exec'd 0 ====
-
- 0x25476940: 817D0014 lwz r11,20(r29)
- 0: GETL R29, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25476944: 696C0002 xori r12,r11,0x2
- 5: GETL R11, t4
- 6: XORL $0x2, t4
- 7: PUTL t4, R12
- 8: INCEIPL $4
-
- 0x25476948: 212C0000 subfic r9,r12,0
- 9: GETL R12, t6
- 10: MOVL $0x0, t8
- 11: SBBL t6, t8 (-wCa)
- 12: PUTL t8, R9
- 13: INCEIPL $4
-
- 0x2547694C: 7D896114 adde r12,r9,r12
- 14: GETL R9, t10
- 15: GETL R12, t12
- 16: ADCL t10, t12 (-rCa-wCa)
- 17: PUTL t12, R12
- 18: INCEIPL $4
-
- 0x25476950: 7EF76378 or r23,r23,r12
- 19: GETL R23, t14
- 20: GETL R12, t16
- 21: ORL t16, t14
- 22: PUTL t14, R23
- 23: INCEIPL $4
-
- 0x25476954: 41B2FF64 bc 13,18,0x254768B8
- 24: Js18o $0x254768B8
-
-
-. 0 25476940 24
-. 81 7D 00 14 69 6C 00 02 21 2C 00 00 7D 89 61 14 7E F7 63 78 41 B2 FF 64
-
-==== BB 692 (0x254768B8) approx BBs exec'd 0 ====
-
- 0x254768B8: 3B9C0001 addi r28,r28,1
- 0: GETL R28, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R28
- 3: INCEIPL $4
-
- 0x254768BC: 3BBD0004 addi r29,r29,4
- 4: GETL R29, t2
- 5: ADDL $0x4, t2
- 6: PUTL t2, R29
- 7: INCEIPL $4
-
- 0x254768C0: 40920174 bc 4,18,0x25476A34
- 8: Jc18o $0x25476A34
-
-
-. 0 254768B8 12
-. 3B 9C 00 01 3B BD 00 04 40 92 01 74
-
-==== BB 693 (0x254768C4) approx BBs exec'd 0 ====
-
- 0x254768C4: 81390000 lwz r9,0(r25)
- 0: GETL R25, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0x254768C8: 7C9C4840 cmpl cr1,r28,r9
- 4: GETL R28, t4
- 5: GETL R9, t6
- 6: CMPUL t4, t6, t8 (-rSo)
- 7: ICRFL t8, $0x1, CR
- 8: INCEIPL $4
-
- 0x254768CC: 40840124 bc 4,4,0x254769F0
- 9: Jc04o $0x254769F0
-
-
-. 0 254768C4 12
-. 81 39 00 00 7C 9C 48 40 40 84 01 24
-
-==== BB 694 (0x254769D4) approx BBs exec'd 0 ====
-
- 0x254769D4: 811F0020 lwz r8,32(r31)
- 0: GETL R31, t0
- 1: ADDL $0x20, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x254769D8: 55000426 rlwinm r0,r8,0,16,19
- 5: GETL R8, t4
- 6: ANDL $0xF000, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x254769DC: 2C804000 cmpi cr1,r0,16384
- 9: GETL R0, t6
- 10: MOVL $0x4000, t10
- 11: CMPL t6, t10, t8 (-rSo)
- 12: ICRFL t8, $0x1, CR
- 13: INCEIPL $4
-
- 0x254769E0: 41A6FF5C bc 13,6,0x2547693C
- 14: Js06o $0x2547693C
-
-
-. 0 254769D4 16
-. 81 1F 00 20 55 00 04 26 2C 80 40 00 41 A6 FF 5C
-
-==== BB 695 (0x2547693C) approx BBs exec'd 0 ====
-
- 0x2547693C: 929D0014 stw r20,20(r29)
- 0: GETL R20, t0
- 1: GETL R29, t2
- 2: ADDL $0x14, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25476940: 817D0014 lwz r11,20(r29)
- 5: GETL R29, t4
- 6: ADDL $0x14, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R11
- 9: INCEIPL $4
-
- 0x25476944: 696C0002 xori r12,r11,0x2
- 10: GETL R11, t8
- 11: XORL $0x2, t8
- 12: PUTL t8, R12
- 13: INCEIPL $4
-
- 0x25476948: 212C0000 subfic r9,r12,0
- 14: GETL R12, t10
- 15: MOVL $0x0, t12
- 16: SBBL t10, t12 (-wCa)
- 17: PUTL t12, R9
- 18: INCEIPL $4
-
- 0x2547694C: 7D896114 adde r12,r9,r12
- 19: GETL R9, t14
- 20: GETL R12, t16
- 21: ADCL t14, t16 (-rCa-wCa)
- 22: PUTL t16, R12
- 23: INCEIPL $4
-
- 0x25476950: 7EF76378 or r23,r23,r12
- 24: GETL R23, t18
- 25: GETL R12, t20
- 26: ORL t20, t18
- 27: PUTL t18, R23
- 28: INCEIPL $4
-
- 0x25476954: 41B2FF64 bc 13,18,0x254768B8
- 29: Js18o $0x254768B8
-
-
-. 0 2547693C 28
-. 92 9D 00 14 81 7D 00 14 69 6C 00 02 21 2C 00 00 7D 89 61 14 7E F7 63 78 41 B2 FF 64
-
-==== BB 696 (0x254769F0) approx BBs exec'd 0 ====
-
- 0x254769F0: 40920044 bc 4,18,0x25476A34
- 0: Jc18o $0x25476A34
-
-
-. 0 254769F0 4
-. 40 92 00 44
-
-==== BB 697 (0x254769F4) approx BBs exec'd 0 ====
-
- 0x254769F4: 2F170000 cmpi cr6,r23,0
- 0: GETL R23, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x254769F8: 419A001C bc 12,26,0x25476A14
- 4: Js26o $0x25476A14
-
-
-. 0 254769F4 8
-. 2F 17 00 00 41 9A 00 1C
-
-==== BB 698 (0x254769FC) approx BBs exec'd 0 ====
-
- 0x254769FC: 83BE0514 lwz r29,1300(r30)
- 0: GETL R30, t0
- 1: ADDL $0x514, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x25476A00: 813D0000 lwz r9,0(r29)
- 5: GETL R29, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R9
- 8: INCEIPL $4
-
- 0x25476A04: 2F890002 cmpi cr7,r9,2
- 9: GETL R9, t8
- 10: MOVL $0x2, t12
- 11: CMPL t8, t12, t10 (-rSo)
- 12: ICRFL t10, $0x7, CR
- 13: INCEIPL $4
-
- 0x25476A08: 419E000C bc 12,30,0x25476A14
- 14: Js30o $0x25476A14
-
-
-. 0 254769FC 16
-. 83 BE 05 14 81 3D 00 00 2F 89 00 02 41 9E 00 0C
-
-==== BB 699 (0x25476A14) approx BBs exec'd 0 ====
-
- 0x25476A14: 87B50004 lwzu r29,4(r21)
- 0: GETL R21, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R21
- 3: LDL (t0), t2
- 4: PUTL t2, R29
- 5: INCEIPL $4
-
- 0x25476A18: 7DEFBB78 or r15,r15,r23
- 6: GETL R15, t4
- 7: GETL R23, t6
- 8: ORL t6, t4
- 9: PUTL t4, R15
- 10: INCEIPL $4
-
- 0x25476A1C: 2C9D0000 cmpi cr1,r29,0
- 11: GETL R29, t8
- 12: CMP0L t8, t10 (-rSo)
- 13: ICRFL t10, $0x1, CR
- 14: INCEIPL $4
-
- 0x25476A20: 4086FE48 bc 4,6,0x25476868
- 15: Jc06o $0x25476868
-
-
-. 0 25476A14 16
-. 87 B5 00 04 7D EF BB 78 2C 9D 00 00 40 86 FE 48
-
-==== BB 700 (0x25476868) approx BBs exec'd 0 ====
-
- 0x25476868: 806E0000 lwz r3,0(r14)
- 0: GETL R14, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R3
- 3: INCEIPL $4
-
- 0x2547686C: 3A600000 li r19,0
- 4: MOVL $0x0, t4
- 5: PUTL t4, R19
- 6: INCEIPL $4
-
- 0x25476870: 3AE00000 li r23,0
- 7: MOVL $0x0, t6
- 8: PUTL t6, R23
- 9: INCEIPL $4
-
- 0x25476874: 70690001 andi. r9,r3,0x1
- 10: GETL R3, t8
- 11: ANDL $0x1, t8
- 12: PUTL t8, R9
- 13: CMP0L t8, t10 (-rSo)
- 14: ICRFL t10, $0x0, CR
- 15: INCEIPL $4
-
- 0x25476878: 4082025C bc 4,2,0x25476AD4
- 16: Jc02o $0x25476AD4
-
-
-. 0 25476868 20
-. 80 6E 00 00 3A 60 00 00 3A E0 00 00 70 69 00 01 40 82 02 5C
-
-==== BB 701 (0x25483DE0) approx BBs exec'd 0 ====
-
- 0x25483DE0: 80040000 lwz r0,0(r4)
- 0: GETL R4, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x25483DE4: 3884FFF8 addi r4,r4,-8
- 4: GETL R4, t4
- 5: ADDL $0xFFFFFFF8, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0x25483DE8: 8124000C lwz r9,12(r4)
- 8: GETL R4, t6
- 9: ADDL $0xC, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R9
- 12: INCEIPL $4
-
- 0x25483DEC: 3863FFF4 addi r3,r3,-12
- 13: GETL R3, t10
- 14: ADDL $0xFFFFFFF4, t10
- 15: PUTL t10, R3
- 16: INCEIPL $4
-
- 0x25483DF0: 38A50002 addi r5,r5,2
- 17: GETL R5, t12
- 18: ADDL $0x2, t12
- 19: PUTL t12, R5
- 20: INCEIPL $4
-
- 0x25483DF4: 9003000C stw r0,12(r3)
- 21: GETL R0, t14
- 22: GETL R3, t16
- 23: ADDL $0xC, t16
- 24: STL t14, (t16)
- 25: INCEIPL $4
-
- 0x25483DF8: 4BFFFF34 b 0x25483D2C
- 26: JMPo $0x25483D2C ($4)
-
-
-. 0 25483DE0 28
-. 80 04 00 00 38 84 FF F8 81 24 00 0C 38 63 FF F4 38 A5 00 02 90 03 00 0C 4B FF FF 34
-
-==== BB 702 (0x25483D2C) approx BBs exec'd 0 ====
-
- 0x25483D2C: 80040010 lwz r0,16(r4)
- 0: GETL R4, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25483D30: 91230010 stw r9,16(r3)
- 5: GETL R9, t4
- 6: GETL R3, t6
- 7: ADDL $0x10, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x25483D34: 81240014 lwz r9,20(r4)
- 10: GETL R4, t8
- 11: ADDL $0x14, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R9
- 14: INCEIPL $4
-
- 0x25483D38: 90030014 stw r0,20(r3)
- 15: GETL R0, t12
- 16: GETL R3, t14
- 17: ADDL $0x14, t14
- 18: STL t12, (t14)
- 19: INCEIPL $4
-
- 0x25483D3C: 80040018 lwz r0,24(r4)
- 20: GETL R4, t16
- 21: ADDL $0x18, t16
- 22: LDL (t16), t18
- 23: PUTL t18, R0
- 24: INCEIPL $4
-
- 0x25483D40: 91230018 stw r9,24(r3)
- 25: GETL R9, t20
- 26: GETL R3, t22
- 27: ADDL $0x18, t22
- 28: STL t20, (t22)
- 29: INCEIPL $4
-
- 0x25483D44: 34A5FFF8 addic. r5,r5,-8
- 30: GETL R5, t24
- 31: ADCL $0xFFFFFFF8, t24 (-wCa)
- 32: PUTL t24, R5
- 33: CMP0L t24, t26 (-rSo)
- 34: ICRFL t26, $0x0, CR
- 35: INCEIPL $4
-
- 0x25483D48: 8124001C lwz r9,28(r4)
- 36: GETL R4, t28
- 37: ADDL $0x1C, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R9
- 40: INCEIPL $4
-
- 0x25483D4C: 9003001C stw r0,28(r3)
- 41: GETL R0, t32
- 42: GETL R3, t34
- 43: ADDL $0x1C, t34
- 44: STL t32, (t34)
- 45: INCEIPL $4
-
- 0x25483D50: 38840020 addi r4,r4,32
- 46: GETL R4, t36
- 47: ADDL $0x20, t36
- 48: PUTL t36, R4
- 49: INCEIPL $4
-
- 0x25483D54: 38630020 addi r3,r3,32
- 50: GETL R3, t38
- 51: ADDL $0x20, t38
- 52: PUTL t38, R3
- 53: INCEIPL $4
-
- 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
- 54: Jc02o $0x25483D0C
-
-
-. 0 25483D2C 48
-. 80 04 00 10 91 23 00 10 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
-
-==== BB 703 (0x25483DC4) approx BBs exec'd 0 ====
-
- 0x25483DC4: 81240000 lwz r9,0(r4)
- 0: GETL R4, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0x25483DC8: 3884FFF4 addi r4,r4,-12
- 4: GETL R4, t4
- 5: ADDL $0xFFFFFFF4, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0x25483DCC: 80040010 lwz r0,16(r4)
- 8: GETL R4, t6
- 9: ADDL $0x10, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R0
- 12: INCEIPL $4
-
- 0x25483DD0: 3863FFF0 addi r3,r3,-16
- 13: GETL R3, t10
- 14: ADDL $0xFFFFFFF0, t10
- 15: PUTL t10, R3
- 16: INCEIPL $4
-
- 0x25483DD4: 38A50003 addi r5,r5,3
- 17: GETL R5, t12
- 18: ADDL $0x3, t12
- 19: PUTL t12, R5
- 20: INCEIPL $4
-
- 0x25483DD8: 91230010 stw r9,16(r3)
- 21: GETL R9, t14
- 22: GETL R3, t16
- 23: ADDL $0x10, t16
- 24: STL t14, (t16)
- 25: INCEIPL $4
-
- 0x25483DDC: 4BFFFF58 b 0x25483D34
- 26: JMPo $0x25483D34 ($4)
-
-
-. 0 25483DC4 28
-. 81 24 00 00 38 84 FF F4 80 04 00 10 38 63 FF F0 38 A5 00 03 91 23 00 10 4B FF FF 58
-
-==== BB 704 (0x25483D34) approx BBs exec'd 0 ====
-
- 0x25483D34: 81240014 lwz r9,20(r4)
- 0: GETL R4, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25483D38: 90030014 stw r0,20(r3)
- 5: GETL R0, t4
- 6: GETL R3, t6
- 7: ADDL $0x14, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x25483D3C: 80040018 lwz r0,24(r4)
- 10: GETL R4, t8
- 11: ADDL $0x18, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R0
- 14: INCEIPL $4
-
- 0x25483D40: 91230018 stw r9,24(r3)
- 15: GETL R9, t12
- 16: GETL R3, t14
- 17: ADDL $0x18, t14
- 18: STL t12, (t14)
- 19: INCEIPL $4
-
- 0x25483D44: 34A5FFF8 addic. r5,r5,-8
- 20: GETL R5, t16
- 21: ADCL $0xFFFFFFF8, t16 (-wCa)
- 22: PUTL t16, R5
- 23: CMP0L t16, t18 (-rSo)
- 24: ICRFL t18, $0x0, CR
- 25: INCEIPL $4
-
- 0x25483D48: 8124001C lwz r9,28(r4)
- 26: GETL R4, t20
- 27: ADDL $0x1C, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R9
- 30: INCEIPL $4
-
- 0x25483D4C: 9003001C stw r0,28(r3)
- 31: GETL R0, t24
- 32: GETL R3, t26
- 33: ADDL $0x1C, t26
- 34: STL t24, (t26)
- 35: INCEIPL $4
-
- 0x25483D50: 38840020 addi r4,r4,32
- 36: GETL R4, t28
- 37: ADDL $0x20, t28
- 38: PUTL t28, R4
- 39: INCEIPL $4
-
- 0x25483D54: 38630020 addi r3,r3,32
- 40: GETL R3, t30
- 41: ADDL $0x20, t30
- 42: PUTL t30, R3
- 43: INCEIPL $4
-
- 0x25483D58: 40A2FFB4 bc 5,2,0x25483D0C
- 44: Jc02o $0x25483D0C
-
-
-. 0 25483D34 40
-. 81 24 00 14 90 03 00 14 80 04 00 18 91 23 00 18 34 A5 FF F8 81 24 00 1C 90 03 00 1C 38 84 00 20 38 63 00 20 40 A2 FF B4
-
-==== BB 705 (0x25476A24) approx BBs exec'd 0 ====
-
- 0x25476A24: 2E0F0000 cmpi cr4,r15,0
- 0: GETL R15, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x4, CR
- 3: INCEIPL $4
-
- 0x25476A28: 4192026C bc 12,18,0x25476C94
- 4: Js18o $0x25476C94
-
-
-. 0 25476A24 8
-. 2E 0F 00 00 41 92 02 6C
-
-==== BB 706 (0x25476A2C) approx BBs exec'd 0 ====
-
- 0x25476A2C: 3860FFFF li r3,-1
- 0: MOVL $0xFFFFFFFF, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25476A30: 4800002C b 0x25476A5C
- 3: JMPo $0x25476A5C ($4)
-
-
-. 0 25476A2C 8
-. 38 60 FF FF 48 00 00 2C
-
-==== BB 707 (0x25476A5C) approx BBs exec'd 0 ====
-
- 0x25476A5C: 81010000 lwz r8,0(r1)
- 0: GETL R1, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R8
- 3: INCEIPL $4
-
- 0x25476A60: 81E80004 lwz r15,4(r8)
- 4: GETL R8, t4
- 5: ADDL $0x4, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R15
- 8: INCEIPL $4
-
- 0x25476A64: 8088FFB4 lwz r4,-76(r8)
- 9: GETL R8, t8
- 10: ADDL $0xFFFFFFB4, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R4
- 13: INCEIPL $4
-
- 0x25476A68: 7DE803A6 mtlr r15
- 14: GETL R15, t12
- 15: PUTL t12, LR
- 16: INCEIPL $4
-
- 0x25476A6C: 81C8FFB8 lwz r14,-72(r8)
- 17: GETL R8, t14
- 18: ADDL $0xFFFFFFB8, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R14
- 21: INCEIPL $4
-
- 0x25476A70: 81E8FFBC lwz r15,-68(r8)
- 22: GETL R8, t18
- 23: ADDL $0xFFFFFFBC, t18
- 24: LDL (t18), t20
- 25: PUTL t20, R15
- 26: INCEIPL $4
-
- 0x25476A74: 7C808120 mtcrf 0x8,r4
- 27: GETL R4, t22
- 28: ICRFL t22, $0x4, CR
- 29: INCEIPL $4
-
- 0x25476A78: 8208FFC0 lwz r16,-64(r8)
- 30: GETL R8, t24
- 31: ADDL $0xFFFFFFC0, t24
- 32: LDL (t24), t26
- 33: PUTL t26, R16
- 34: INCEIPL $4
-
- 0x25476A7C: 8228FFC4 lwz r17,-60(r8)
- 35: GETL R8, t28
- 36: ADDL $0xFFFFFFC4, t28
- 37: LDL (t28), t30
- 38: PUTL t30, R17
- 39: INCEIPL $4
-
- 0x25476A80: 8248FFC8 lwz r18,-56(r8)
- 40: GETL R8, t32
- 41: ADDL $0xFFFFFFC8, t32
- 42: LDL (t32), t34
- 43: PUTL t34, R18
- 44: INCEIPL $4
-
- 0x25476A84: 8268FFCC lwz r19,-52(r8)
- 45: GETL R8, t36
- 46: ADDL $0xFFFFFFCC, t36
- 47: LDL (t36), t38
- 48: PUTL t38, R19
- 49: INCEIPL $4
-
- 0x25476A88: 8288FFD0 lwz r20,-48(r8)
- 50: GETL R8, t40
- 51: ADDL $0xFFFFFFD0, t40
- 52: LDL (t40), t42
- 53: PUTL t42, R20
- 54: INCEIPL $4
-
- 0x25476A8C: 82A8FFD4 lwz r21,-44(r8)
- 55: GETL R8, t44
- 56: ADDL $0xFFFFFFD4, t44
- 57: LDL (t44), t46
- 58: PUTL t46, R21
- 59: INCEIPL $4
-
- 0x25476A90: 82C8FFD8 lwz r22,-40(r8)
- 60: GETL R8, t48
- 61: ADDL $0xFFFFFFD8, t48
- 62: LDL (t48), t50
- 63: PUTL t50, R22
- 64: INCEIPL $4
-
- 0x25476A94: 82E8FFDC lwz r23,-36(r8)
- 65: GETL R8, t52
- 66: ADDL $0xFFFFFFDC, t52
- 67: LDL (t52), t54
- 68: PUTL t54, R23
- 69: INCEIPL $4
-
- 0x25476A98: 8308FFE0 lwz r24,-32(r8)
- 70: GETL R8, t56
- 71: ADDL $0xFFFFFFE0, t56
- 72: LDL (t56), t58
- 73: PUTL t58, R24
- 74: INCEIPL $4
-
- 0x25476A9C: 8328FFE4 lwz r25,-28(r8)
- 75: GETL R8, t60
- 76: ADDL $0xFFFFFFE4, t60
- 77: LDL (t60), t62
- 78: PUTL t62, R25
- 79: INCEIPL $4
-
- 0x25476AA0: 8348FFE8 lwz r26,-24(r8)
- 80: GETL R8, t64
- 81: ADDL $0xFFFFFFE8, t64
- 82: LDL (t64), t66
- 83: PUTL t66, R26
- 84: INCEIPL $4
-
- 0x25476AA4: 8368FFEC lwz r27,-20(r8)
- 85: GETL R8, t68
- 86: ADDL $0xFFFFFFEC, t68
- 87: LDL (t68), t70
- 88: PUTL t70, R27
- 89: INCEIPL $4
-
- 0x25476AA8: 8388FFF0 lwz r28,-16(r8)
- 90: GETL R8, t72
- 91: ADDL $0xFFFFFFF0, t72
- 92: LDL (t72), t74
- 93: PUTL t74, R28
- 94: INCEIPL $4
-
- 0x25476AAC: 83A8FFF4 lwz r29,-12(r8)
- 95: GETL R8, t76
- 96: ADDL $0xFFFFFFF4, t76
- 97: LDL (t76), t78
- 98: PUTL t78, R29
- 99: INCEIPL $4
-
- 0x25476AB0: 83C8FFF8 lwz r30,-8(r8)
- 100: GETL R8, t80
- 101: ADDL $0xFFFFFFF8, t80
- 102: LDL (t80), t82
- 103: PUTL t82, R30
- 104: INCEIPL $4
-
- 0x25476AB4: 83E8FFFC lwz r31,-4(r8)
- 105: GETL R8, t84
- 106: ADDL $0xFFFFFFFC, t84
- 107: LDL (t84), t86
- 108: PUTL t86, R31
- 109: INCEIPL $4
-
- 0x25476AB8: 7D014378 or r1,r8,r8
- 110: GETL R8, t88
- 111: PUTL t88, R1
- 112: INCEIPL $4
-
- 0x25476ABC: 4E800020 blr
- 113: GETL LR, t90
- 114: JMPo-r t90 ($4)
-
-
-. 0 25476A5C 100
-. 81 01 00 00 81 E8 00 04 80 88 FF B4 7D E8 03 A6 81 C8 FF B8 81 E8 FF BC 7C 80 81 20 82 08 FF C0 82 28 FF C4 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
-
-==== BB 708 (0x25477238) approx BBs exec'd 0 ====
-
- 0x25477238: 2E03FFFF cmpi cr4,r3,-1
- 0: GETL R3, t0
- 1: MOVL $0xFFFFFFFF, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x4, CR
- 4: INCEIPL $4
-
- 0x2547723C: 7C7A1B78 or r26,r3,r3
- 5: GETL R3, t6
- 6: PUTL t6, R26
- 7: INCEIPL $4
-
- 0x25477240: 7D6E00D0 neg r11,r14
- 8: GETL R14, t8
- 9: NEGL t8
- 10: PUTL t8, R11
- 11: INCEIPL $4
-
- 0x25477244: 7CE00026 mfcr r7
- 12: GETL CR, t10
- 13: PUTL t10, R7
- 14: INCEIPL $4
-
- 0x25477248: 54E79FFE rlwinm r7,r7,19,31,31
- 15: GETL R7, t12
- 16: ROLL $0x13, t12
- 17: ANDL $0x1, t12
- 18: PUTL t12, R7
- 19: INCEIPL $4
-
- 0x2547724C: 556E0FFE rlwinm r14,r11,1,31,31
- 20: GETL R11, t14
- 21: SHRL $0x1F, t14
- 22: PUTL t14, R14
- 23: INCEIPL $4
-
- 0x25477250: 7CEB7039 and. r11,r7,r14
- 24: GETL R7, t16
- 25: GETL R14, t18
- 26: ANDL t16, t18
- 27: PUTL t18, R11
- 28: CMP0L t18, t20 (-rSo)
- 29: ICRFL t20, $0x0, CR
- 30: INCEIPL $4
-
- 0x25477254: 41820044 bc 12,2,0x25477298
- 31: Js02o $0x25477298
-
-
-. 0 25477238 32
-. 2E 03 FF FF 7C 7A 1B 78 7D 6E 00 D0 7C E0 00 26 54 E7 9F FE 55 6E 0F FE 7C EB 70 39 41 82 00 44
-
-==== BB 709 (0x25477258) approx BBs exec'd 0 ====
-
- 0x25477258: 801B01E0 lwz r0,480(r27)
- 0: GETL R27, t0
- 1: ADDL $0x1E0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x2547725C: 3BBB01E0 addi r29,r27,480
- 5: GETL R27, t4
- 6: ADDL $0x1E0, t4
- 7: PUTL t4, R29
- 8: INCEIPL $4
-
- 0x25477260: 39200000 li r9,0
- 9: MOVL $0x0, t6
- 10: PUTL t6, R9
- 11: INCEIPL $4
-
- 0x25477264: 2F00FFFF cmpi cr6,r0,-1
- 12: GETL R0, t8
- 13: MOVL $0xFFFFFFFF, t12
- 14: CMPL t8, t12, t10 (-rSo)
- 15: ICRFL t10, $0x6, CR
- 16: INCEIPL $4
-
- 0x25477268: 419A0028 bc 12,26,0x25477290
- 17: Js26o $0x25477290
-
-
-. 0 25477258 20
-. 80 1B 01 E0 3B BB 01 E0 39 20 00 00 2F 00 FF FF 41 9A 00 28
-
-==== BB 710 (0x25477290) approx BBs exec'd 0 ====
-
- 0x25477290: 2C090000 cmpi cr0,r9,0
- 0: GETL R9, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0x25477294: 408200DC bc 4,2,0x25477370
- 4: Jc02o $0x25477370
-
-
-. 0 25477290 8
-. 2C 09 00 00 40 82 00 DC
-
-==== BB 711 (0x25477298) approx BBs exec'd 0 ====
-
- 0x25477298: 4092008C bc 4,18,0x25477324
- 0: Jc18o $0x25477324
-
-
-. 0 25477298 4
-. 40 92 00 8C
-
-==== BB 712 (0x2547729C) approx BBs exec'd 0 ====
-
- 0x2547729C: 2F170000 cmpi cr6,r23,0
- 0: GETL R23, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x254772A0: 409A01E4 bc 4,26,0x25477484
- 4: Jc26o $0x25477484
-
-
-. 0 2547729C 8
-. 2F 17 00 00 40 9A 01 E4
-
-==== BB 713 (0x254772A4) approx BBs exec'd 0 ====
-
- 0x254772A4: 7FE3FB78 or r3,r31,r31
- 0: GETL R31, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x254772A8: 48000949 bl 0x25477BF0
- 3: MOVL $0x254772AC, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x25477BF0 ($4)
-
-
-. 0 254772A4 8
-. 7F E3 FB 78 48 00 09 49
-
-==== BB 714 _dl_load_cache_lookup(0x25477BF0) approx BBs exec'd 0 ====
-
- 0x25477BF0: 9421FFC0 stwu r1,-64(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFC0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25477BF4: 7C8802A6 mflr r4
- 6: GETL LR, t4
- 7: PUTL t4, R4
- 8: INCEIPL $4
-
- 0x25477BF8: 4801F409 bl 0x25497000
- 9: MOVL $0x25477BFC, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 25477BF0 12
-. 94 21 FF C0 7C 88 02 A6 48 01 F4 09
-
-==== BB 715 (0x25477BFC) approx BBs exec'd 0 ====
-
- 0x25477BFC: 93C10038 stw r30,56(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x38, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25477C00: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x25477C04: 9261000C stw r19,12(r1)
- 8: GETL R19, t6
- 9: GETL R1, t8
- 10: ADDL $0xC, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x25477C08: 90810044 stw r4,68(r1)
- 13: GETL R4, t10
- 14: GETL R1, t12
- 15: ADDL $0x44, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x25477C0C: 7D800026 mfcr r12
- 18: GETL CR, t14
- 19: PUTL t14, R12
- 20: INCEIPL $4
-
- 0x25477C10: 92E1001C stw r23,28(r1)
- 21: GETL R23, t16
- 22: GETL R1, t18
- 23: ADDL $0x1C, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x25477C14: 7C771B78 or r23,r3,r3
- 26: GETL R3, t20
- 27: PUTL t20, R23
- 28: INCEIPL $4
-
- 0x25477C18: 827E04F4 lwz r19,1268(r30)
- 29: GETL R30, t22
- 30: ADDL $0x4F4, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R19
- 33: INCEIPL $4
-
- 0x25477C1C: 92810010 stw r20,16(r1)
- 34: GETL R20, t26
- 35: GETL R1, t28
- 36: ADDL $0x10, t28
- 37: STL t26, (t28)
- 38: INCEIPL $4
-
- 0x25477C20: 80130000 lwz r0,0(r19)
- 39: GETL R19, t30
- 40: LDL (t30), t32
- 41: PUTL t32, R0
- 42: INCEIPL $4
-
- 0x25477C24: 92A10014 stw r21,20(r1)
- 43: GETL R21, t34
- 44: GETL R1, t36
- 45: ADDL $0x14, t36
- 46: STL t34, (t36)
- 47: INCEIPL $4
-
- 0x25477C28: 70090001 andi. r9,r0,0x1
- 48: GETL R0, t38
- 49: ANDL $0x1, t38
- 50: PUTL t38, R9
- 51: CMP0L t38, t40 (-rSo)
- 52: ICRFL t40, $0x0, CR
- 53: INCEIPL $4
-
- 0x25477C2C: 92C10018 stw r22,24(r1)
- 54: GETL R22, t42
- 55: GETL R1, t44
- 56: ADDL $0x18, t44
- 57: STL t42, (t44)
- 58: INCEIPL $4
-
- 0x25477C30: 93010020 stw r24,32(r1)
- 59: GETL R24, t46
- 60: GETL R1, t48
- 61: ADDL $0x20, t48
- 62: STL t46, (t48)
- 63: INCEIPL $4
-
- 0x25477C34: 93210024 stw r25,36(r1)
- 64: GETL R25, t50
- 65: GETL R1, t52
- 66: ADDL $0x24, t52
- 67: STL t50, (t52)
- 68: INCEIPL $4
-
- 0x25477C38: 93410028 stw r26,40(r1)
- 69: GETL R26, t54
- 70: GETL R1, t56
- 71: ADDL $0x28, t56
- 72: STL t54, (t56)
- 73: INCEIPL $4
-
- 0x25477C3C: 9361002C stw r27,44(r1)
- 74: GETL R27, t58
- 75: GETL R1, t60
- 76: ADDL $0x2C, t60
- 77: STL t58, (t60)
- 78: INCEIPL $4
-
- 0x25477C40: 93810030 stw r28,48(r1)
- 79: GETL R28, t62
- 80: GETL R1, t64
- 81: ADDL $0x30, t64
- 82: STL t62, (t64)
- 83: INCEIPL $4
-
- 0x25477C44: 93A10034 stw r29,52(r1)
- 84: GETL R29, t66
- 85: GETL R1, t68
- 86: ADDL $0x34, t68
- 87: STL t66, (t68)
- 88: INCEIPL $4
-
- 0x25477C48: 93E1003C stw r31,60(r1)
- 89: GETL R31, t70
- 90: GETL R1, t72
- 91: ADDL $0x3C, t72
- 92: STL t70, (t72)
- 93: INCEIPL $4
-
- 0x25477C4C: 91810008 stw r12,8(r1)
- 94: GETL R12, t74
- 95: GETL R1, t76
- 96: ADDL $0x8, t76
- 97: STL t74, (t76)
- 98: INCEIPL $4
-
- 0x25477C50: 4082037C bc 4,2,0x25477FCC
- 99: Jc02o $0x25477FCC
-
-
-. 0 25477BFC 88
-. 93 C1 00 38 7F C8 02 A6 92 61 00 0C 90 81 00 44 7D 80 00 26 92 E1 00 1C 7C 77 1B 78 82 7E 04 F4 92 81 00 10 80 13 00 00 92 A1 00 14 70 09 00 01 92 C1 00 18 93 01 00 20 93 21 00 24 93 41 00 28 93 61 00 2C 93 81 00 30 93 A1 00 34 93 E1 00 3C 91 81 00 08 40 82 03 7C
-
-==== BB 716 (0x25477C54) approx BBs exec'd 0 ====
-
- 0x25477C54: 82DE0254 lwz r22,596(r30)
- 0: GETL R30, t0
- 1: ADDL $0x254, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R22
- 4: INCEIPL $4
-
- 0x25477C58: 80760000 lwz r3,0(r22)
- 5: GETL R22, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R3
- 8: INCEIPL $4
-
- 0x25477C5C: 2F830000 cmpi cr7,r3,0
- 9: GETL R3, t8
- 10: CMP0L t8, t10 (-rSo)
- 11: ICRFL t10, $0x7, CR
- 12: INCEIPL $4
-
- 0x25477C60: 419E00FC bc 12,30,0x25477D5C
- 13: Js30o $0x25477D5C
-
-
-. 0 25477C54 16
-. 82 DE 02 54 80 76 00 00 2F 83 00 00 41 9E 00 FC
-
-==== BB 717 (0x25477D5C) approx BBs exec'd 0 ====
-
- 0x25477D5C: 807E0260 lwz r3,608(r30)
- 0: GETL R30, t0
- 1: ADDL $0x260, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25477D60: 38A00001 li r5,1
- 5: MOVL $0x1, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x25477D64: 809E025C lwz r4,604(r30)
- 8: GETL R30, t6
- 9: ADDL $0x25C, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R4
- 12: INCEIPL $4
-
- 0x25477D68: 48004245 bl 0x2547BFAC
- 13: MOVL $0x25477D6C, t10
- 14: PUTL t10, LR
- 15: JMPo-c $0x2547BFAC ($4)
-
-
-. 0 25477D5C 16
-. 80 7E 02 60 38 A0 00 01 80 9E 02 5C 48 00 42 45
-
-==== BB 718 _dl_sysdep_read_whole_file(0x2547BFAC) approx BBs exec'd 0 ====
-
- 0x2547BFAC: 7C0802A6 mflr r0
- 0: GETL LR, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x2547BFB0: 9421FF60 stwu r1,-160(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFF60, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0x2547BFB4: 93810090 stw r28,144(r1)
- 9: GETL R28, t6
- 10: GETL R1, t8
- 11: ADDL $0x90, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547BFB8: 7C9C2378 or r28,r4,r4
- 14: GETL R4, t10
- 15: PUTL t10, R28
- 16: INCEIPL $4
-
- 0x2547BFBC: 38800000 li r4,0
- 17: MOVL $0x0, t12
- 18: PUTL t12, R4
- 19: INCEIPL $4
-
- 0x2547BFC0: 9361008C stw r27,140(r1)
- 20: GETL R27, t14
- 21: GETL R1, t16
- 22: ADDL $0x8C, t16
- 23: STL t14, (t16)
- 24: INCEIPL $4
-
- 0x2547BFC4: 93A10094 stw r29,148(r1)
- 25: GETL R29, t18
- 26: GETL R1, t20
- 27: ADDL $0x94, t20
- 28: STL t18, (t20)
- 29: INCEIPL $4
-
- 0x2547BFC8: 7CBD2B78 or r29,r5,r5
- 30: GETL R5, t22
- 31: PUTL t22, R29
- 32: INCEIPL $4
-
- 0x2547BFCC: 93E1009C stw r31,156(r1)
- 33: GETL R31, t24
- 34: GETL R1, t26
- 35: ADDL $0x9C, t26
- 36: STL t24, (t26)
- 37: INCEIPL $4
-
- 0x2547BFD0: 3B60FFFF li r27,-1
- 38: MOVL $0xFFFFFFFF, t28
- 39: PUTL t28, R27
- 40: INCEIPL $4
-
- 0x2547BFD4: 93C10098 stw r30,152(r1)
- 41: GETL R30, t30
- 42: GETL R1, t32
- 43: ADDL $0x98, t32
- 44: STL t30, (t32)
- 45: INCEIPL $4
-
- 0x2547BFD8: 900100A4 stw r0,164(r1)
- 46: GETL R0, t34
- 47: GETL R1, t36
- 48: ADDL $0xA4, t36
- 49: STL t34, (t36)
- 50: INCEIPL $4
-
- 0x2547BFDC: 48006005 bl 0x25481FE0
- 51: MOVL $0x2547BFE0, t38
- 52: PUTL t38, LR
- 53: JMPo-c $0x25481FE0 ($4)
-
-
-. 0 2547BFAC 52
-. 7C 08 02 A6 94 21 FF 60 93 81 00 90 7C 9C 23 78 38 80 00 00 93 61 00 8C 93 A1 00 94 7C BD 2B 78 93 E1 00 9C 3B 60 FF FF 93 C1 00 98 90 01 00 A4 48 00 60 05
-
-==== BB 719 (0x2547BFE0) approx BBs exec'd 0 ====
-
- 0x2547BFE0: 7C7F1B79 or. r31,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R31
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x2547BFE4: 38A10010 addi r5,r1,16
- 5: GETL R1, t4
- 6: ADDL $0x10, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x2547BFE8: 38600003 li r3,3
- 9: MOVL $0x3, t6
- 10: PUTL t6, R3
- 11: INCEIPL $4
-
- 0x2547BFEC: 7FE4FB78 or r4,r31,r31
- 12: GETL R31, t8
- 13: PUTL t8, R4
- 14: INCEIPL $4
-
- 0x2547BFF0: 41800040 bc 12,0,0x2547C030
- 15: Js00o $0x2547C030
-
-
-. 0 2547BFE0 20
-. 7C 7F 1B 79 38 A1 00 10 38 60 00 03 7F E4 FB 78 41 80 00 40
-
-==== BB 720 (0x2547BFF4) approx BBs exec'd 0 ====
-
- 0x2547BFF4: 48005EB1 bl 0x25481EA4
- 0: MOVL $0x2547BFF8, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x25481EA4 ($4)
-
-
-. 0 2547BFF4 4
-. 48 00 5E B1
-
-==== BB 721 (0x2547BFF8) approx BBs exec'd 0 ====
-
- 0x2547BFF8: 2F830000 cmpi cr7,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x2547BFFC: 419C002C bc 12,28,0x2547C028
- 4: Js28o $0x2547C028
-
-
-. 0 2547BFF8 8
-. 2F 83 00 00 41 9C 00 2C
-
-==== BB 722 (0x2547C000) approx BBs exec'd 0 ====
-
- 0x2547C000: 81210044 lwz r9,68(r1)
- 0: GETL R1, t0
- 1: ADDL $0x44, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547C004: 7FA5EB78 or r5,r29,r29
- 5: GETL R29, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x2547C008: 38C00002 li r6,2
- 8: MOVL $0x2, t6
- 9: PUTL t6, R6
- 10: INCEIPL $4
-
- 0x2547C00C: 7FE7FB78 or r7,r31,r31
- 11: GETL R31, t8
- 12: PUTL t8, R7
- 13: INCEIPL $4
-
- 0x2547C010: 2C890000 cmpi cr1,r9,0
- 14: GETL R9, t10
- 15: CMP0L t10, t12 (-rSo)
- 16: ICRFL t12, $0x1, CR
- 17: INCEIPL $4
-
- 0x2547C014: 7D244B78 or r4,r9,r9
- 18: GETL R9, t14
- 19: PUTL t14, R4
- 20: INCEIPL $4
-
- 0x2547C018: 39000000 li r8,0
- 21: MOVL $0x0, t16
- 22: PUTL t16, R8
- 23: INCEIPL $4
-
- 0x2547C01C: 38600000 li r3,0
- 24: MOVL $0x0, t18
- 25: PUTL t18, R3
- 26: INCEIPL $4
-
- 0x2547C020: 913C0000 stw r9,0(r28)
- 27: GETL R9, t20
- 28: GETL R28, t22
- 29: STL t20, (t22)
- 30: INCEIPL $4
-
- 0x2547C024: 40860034 bc 4,6,0x2547C058
- 31: Jc06o $0x2547C058
-
-
-. 0 2547C000 40
-. 81 21 00 44 7F A5 EB 78 38 C0 00 02 7F E7 FB 78 2C 89 00 00 7D 24 4B 78 39 00 00 00 38 60 00 00 91 3C 00 00 40 86 00 34
-
-==== BB 723 (0x2547C058) approx BBs exec'd 0 ====
-
- 0x2547C058: 48006741 bl 0x25482798
- 0: MOVL $0x2547C05C, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x25482798 ($4)
-
-
-. 0 2547C058 4
-. 48 00 67 41
-
-==== BB 724 (0x2547C05C) approx BBs exec'd 0 ====
-
- 0x2547C05C: 7C7B1B78 or r27,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R27
- 2: INCEIPL $4
-
- 0x2547C060: 4BFFFFC8 b 0x2547C028
- 3: JMPo $0x2547C028 ($4)
-
-
-. 0 2547C05C 8
-. 7C 7B 1B 78 4B FF FF C8
-
-==== BB 725 (0x2547C028) approx BBs exec'd 0 ====
-
- 0x2547C028: 7FE3FB78 or r3,r31,r31
- 0: GETL R31, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547C02C: 48005FC5 bl 0x25481FF0
- 3: MOVL $0x2547C030, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x25481FF0 ($4)
-
-
-. 0 2547C028 8
-. 7F E3 FB 78 48 00 5F C5
-
-==== BB 726 (0x2547C030) approx BBs exec'd 0 ====
-
- 0x2547C030: 808100A4 lwz r4,164(r1)
- 0: GETL R1, t0
- 1: ADDL $0xA4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547C034: 7F63DB78 or r3,r27,r27
- 5: GETL R27, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x2547C038: 83810090 lwz r28,144(r1)
- 8: GETL R1, t6
- 9: ADDL $0x90, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R28
- 12: INCEIPL $4
-
- 0x2547C03C: 8361008C lwz r27,140(r1)
- 13: GETL R1, t10
- 14: ADDL $0x8C, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R27
- 17: INCEIPL $4
-
- 0x2547C040: 7C8803A6 mtlr r4
- 18: GETL R4, t14
- 19: PUTL t14, LR
- 20: INCEIPL $4
-
- 0x2547C044: 83A10094 lwz r29,148(r1)
- 21: GETL R1, t16
- 22: ADDL $0x94, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R29
- 25: INCEIPL $4
-
- 0x2547C048: 83C10098 lwz r30,152(r1)
- 26: GETL R1, t20
- 27: ADDL $0x98, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R30
- 30: INCEIPL $4
-
- 0x2547C04C: 83E1009C lwz r31,156(r1)
- 31: GETL R1, t24
- 32: ADDL $0x9C, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R31
- 35: INCEIPL $4
-
- 0x2547C050: 382100A0 addi r1,r1,160
- 36: GETL R1, t28
- 37: ADDL $0xA0, t28
- 38: PUTL t28, R1
- 39: INCEIPL $4
-
- 0x2547C054: 4E800020 blr
- 40: GETL LR, t30
- 41: JMPo-r t30 ($4)
-
-
-. 0 2547C030 40
-. 80 81 00 A4 7F 63 DB 78 83 81 00 90 83 61 00 8C 7C 88 03 A6 83 A1 00 94 83 C1 00 98 83 E1 00 9C 38 21 00 A0 4E 80 00 20
-
-==== BB 727 (0x25477D6C) approx BBs exec'd 0 ====
-
- 0x25477D6C: 2E03FFFF cmpi cr4,r3,-1
- 0: GETL R3, t0
- 1: MOVL $0xFFFFFFFF, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x4, CR
- 4: INCEIPL $4
-
- 0x25477D70: 7C7F1B78 or r31,r3,r3
- 5: GETL R3, t6
- 6: PUTL t6, R31
- 7: INCEIPL $4
-
- 0x25477D74: 41920154 bc 12,18,0x25477EC8
- 8: Js18o $0x25477EC8
-
-
-. 0 25477D6C 12
-. 2E 03 FF FF 7C 7F 1B 78 41 92 01 54
-
-==== BB 728 (0x25477D78) approx BBs exec'd 0 ====
-
- 0x25477D78: 813E025C lwz r9,604(r30)
- 0: GETL R30, t0
- 1: ADDL $0x25C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25477D7C: 83A90000 lwz r29,0(r9)
- 5: GETL R9, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R29
- 8: INCEIPL $4
-
- 0x25477D80: 289D0010 cmpli cr1,r29,16
- 9: GETL R29, t8
- 10: MOVL $0x10, t12
- 11: CMPUL t8, t12, t10 (-rSo)
- 12: ICRFL t10, $0x1, CR
- 13: INCEIPL $4
-
- 0x25477D84: 408500E8 bc 4,5,0x25477E6C
- 14: Jc05o $0x25477E6C
-
-
-. 0 25477D78 16
-. 81 3E 02 5C 83 A9 00 00 28 9D 00 10 40 85 00 E8
-
-==== BB 729 (0x25477D88) approx BBs exec'd 0 ====
-
- 0x25477D88: 809E0264 lwz r4,612(r30)
- 0: GETL R30, t0
- 1: ADDL $0x264, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x25477D8C: 38A0000B li r5,11
- 5: MOVL $0xB, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x25477D90: 4800B509 bl 0x25483298
- 8: MOVL $0x25477D94, t6
- 9: PUTL t6, LR
- 10: JMPo-c $0x25483298 ($4)
-
-
-. 0 25477D88 12
-. 80 9E 02 64 38 A0 00 0B 48 00 B5 09
-
-==== BB 730 (0x25477D94) approx BBs exec'd 0 ====
-
- 0x25477D94: 2F030000 cmpi cr6,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x25477D98: 409A00D4 bc 4,26,0x25477E6C
- 4: Jc26o $0x25477E6C
-
-
-. 0 25477D94 8
-. 2F 03 00 00 40 9A 00 D4
-
-==== BB 731 (0x25477D9C) approx BBs exec'd 0 ====
-
- 0x25477D9C: 815F000C lwz r10,12(r31)
- 0: GETL R31, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x25477DA0: 93F60000 stw r31,0(r22)
- 5: GETL R31, t4
- 6: GETL R22, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0x25477DA4: 1D0A000C mulli r8,r10,12
- 9: GETL R10, t8
- 10: MULL $0xC, t8
- 11: PUTL t8, R8
- 12: INCEIPL $4
-
- 0x25477DA8: 839E0258 lwz r28,600(r30)
- 13: GETL R30, t10
- 14: ADDL $0x258, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R28
- 17: INCEIPL $4
-
- 0x25477DAC: 38E80017 addi r7,r8,23
- 18: GETL R8, t14
- 19: ADDL $0x17, t14
- 20: PUTL t14, R7
- 21: INCEIPL $4
-
- 0x25477DB0: 54E50038 rlwinm r5,r7,0,0,28
- 22: GETL R7, t16
- 23: ANDL $0xFFFFFFF8, t16
- 24: PUTL t16, R5
- 25: INCEIPL $4
-
- 0x25477DB4: 38C50030 addi r6,r5,48
- 26: GETL R5, t18
- 27: ADDL $0x30, t18
- 28: PUTL t18, R6
- 29: INCEIPL $4
-
- 0x25477DB8: 7C7F2A14 add r3,r31,r5
- 30: GETL R31, t20
- 31: GETL R5, t22
- 32: ADDL t20, t22
- 33: PUTL t22, R3
- 34: INCEIPL $4
-
- 0x25477DBC: 7E06E840 cmpl cr4,r6,r29
- 35: GETL R6, t24
- 36: GETL R29, t26
- 37: CMPUL t24, t26, t28 (-rSo)
- 38: ICRFL t28, $0x4, CR
- 39: INCEIPL $4
-
- 0x25477DC0: 4191001C bc 12,17,0x25477DDC
- 40: Js17o $0x25477DDC
-
-
-. 0 25477D9C 40
-. 81 5F 00 0C 93 F6 00 00 1D 0A 00 0C 83 9E 02 58 38 E8 00 17 54 E5 00 38 38 C5 00 30 7C 7F 2A 14 7E 06 E8 40 41 91 00 1C
-
-==== BB 732 (0x25477DC4) approx BBs exec'd 0 ====
-
- 0x25477DC4: 809E0268 lwz r4,616(r30)
- 0: GETL R30, t0
- 1: ADDL $0x268, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x25477DC8: 38A00014 li r5,20
- 5: MOVL $0x14, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x25477DCC: 907C0000 stw r3,0(r28)
- 8: GETL R3, t6
- 9: GETL R28, t8
- 10: STL t6, (t8)
- 11: INCEIPL $4
-
- 0x25477DD0: 4800B4C9 bl 0x25483298
- 12: MOVL $0x25477DD4, t10
- 13: PUTL t10, LR
- 14: JMPo-c $0x25483298 ($4)
-
-
-. 0 25477DC4 16
-. 80 9E 02 68 38 A0 00 14 90 7C 00 00 48 00 B4 C9
-
-==== BB 733 (0x254832B8) approx BBs exec'd 0 ====
-
- 0x254832B8: 548007BE rlwinm r0,r4,0,30,31
- 0: GETL R4, t0
- 1: ANDL $0x3, t0
- 2: PUTL t0, R0
- 3: INCEIPL $4
-
- 0x254832BC: 2C000000 cmpi cr0,r0,0
- 4: GETL R0, t2
- 5: CMP0L t2, t4 (-rSo)
- 6: ICRFL t4, $0x0, CR
- 7: INCEIPL $4
-
- 0x254832C0: 4182002C bc 12,2,0x254832EC
- 8: Js02o $0x254832EC
-
-
-. 0 254832B8 12
-. 54 80 07 BE 2C 00 00 00 41 82 00 2C
-
-==== BB 734 (0x254832EC) approx BBs exec'd 0 ====
-
- 0x254832EC: 556907BE rlwinm r9,r11,0,30,31
- 0: GETL R11, t0
- 1: ANDL $0x3, t0
- 2: PUTL t0, R9
- 3: INCEIPL $4
-
- 0x254832F0: 2F090000 cmpi cr6,r9,0
- 4: GETL R9, t2
- 5: CMP0L t2, t4 (-rSo)
- 6: ICRFL t4, $0x6, CR
- 7: INCEIPL $4
-
- 0x254832F4: 409A00C0 bc 4,26,0x254833B4
- 8: Jc26o $0x254833B4
-
-
-. 0 254832EC 12
-. 55 69 07 BE 2F 09 00 00 40 9A 00 C0
-
-==== BB 735 (0x254832F8) approx BBs exec'd 0 ====
-
- 0x254832F8: 54A8F0BE rlwinm r8,r5,30,2,31
- 0: GETL R5, t0
- 1: SHRL $0x2, t0
- 2: PUTL t0, R8
- 3: INCEIPL $4
-
- 0x254832FC: 7D6A5B78 or r10,r11,r11
- 4: GETL R11, t2
- 5: PUTL t2, R10
- 6: INCEIPL $4
-
- 0x25483300: 550007BE rlwinm r0,r8,0,30,31
- 7: GETL R8, t4
- 8: ANDL $0x3, t4
- 9: PUTL t4, R0
- 10: INCEIPL $4
-
- 0x25483304: 7C892378 or r9,r4,r4
- 11: GETL R4, t6
- 12: PUTL t6, R9
- 13: INCEIPL $4
-
- 0x25483308: 2F800001 cmpi cr7,r0,1
- 14: GETL R0, t8
- 15: MOVL $0x1, t12
- 16: CMPL t8, t12, t10 (-rSo)
- 17: ICRFL t10, $0x7, CR
- 18: INCEIPL $4
-
- 0x2548330C: 419E0150 bc 12,30,0x2548345C
- 19: Js30o $0x2548345C
-
-
-. 0 254832F8 24
-. 54 A8 F0 BE 7D 6A 5B 78 55 00 07 BE 7C 89 23 78 2F 80 00 01 41 9E 01 50
-
-==== BB 736 (0x2548345C) approx BBs exec'd 0 ====
-
- 0x2548345C: 806B0000 lwz r3,0(r11)
- 0: GETL R11, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R3
- 3: INCEIPL $4
-
- 0x25483460: 3908FFFF addi r8,r8,-1
- 4: GETL R8, t4
- 5: ADDL $0xFFFFFFFF, t4
- 6: PUTL t4, R8
- 7: INCEIPL $4
-
- 0x25483464: 80C40000 lwz r6,0(r4)
- 8: GETL R4, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R6
- 11: INCEIPL $4
-
- 0x25483468: 394B0004 addi r10,r11,4
- 12: GETL R11, t10
- 13: ADDL $0x4, t10
- 14: PUTL t10, R10
- 15: INCEIPL $4
-
- 0x2548346C: 39240004 addi r9,r4,4
- 16: GETL R4, t12
- 17: ADDL $0x4, t12
- 18: PUTL t12, R9
- 19: INCEIPL $4
-
- 0x25483470: 7F033000 cmp cr6,r3,r6
- 20: GETL R3, t14
- 21: GETL R6, t16
- 22: CMPL t14, t16, t18 (-rSo)
- 23: ICRFL t18, $0x6, CR
- 24: INCEIPL $4
-
- 0x25483474: 80EA0000 lwz r7,0(r10)
- 25: GETL R10, t20
- 26: LDL (t20), t22
- 27: PUTL t22, R7
- 28: INCEIPL $4
-
- 0x25483478: 80090000 lwz r0,0(r9)
- 29: GETL R9, t24
- 30: LDL (t24), t26
- 31: PUTL t26, R0
- 32: INCEIPL $4
-
- 0x2548347C: 419A00C8 bc 12,26,0x25483544
- 33: Js26o $0x25483544
-
-
-. 0 2548345C 36
-. 80 6B 00 00 39 08 FF FF 80 C4 00 00 39 4B 00 04 39 24 00 04 7F 03 30 00 80 EA 00 00 80 09 00 00 41 9A 00 C8
-
-==== BB 737 (0x25483544) approx BBs exec'd 0 ====
-
- 0x25483544: 7F870000 cmp cr7,r7,r0
- 0: GETL R7, t0
- 1: GETL R0, t2
- 2: CMPL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x7, CR
- 4: INCEIPL $4
-
- 0x25483548: 806A0004 lwz r3,4(r10)
- 5: GETL R10, t6
- 6: ADDL $0x4, t6
- 7: LDL (t6), t8
- 8: PUTL t8, R3
- 9: INCEIPL $4
-
- 0x2548354C: 80C90004 lwz r6,4(r9)
- 10: GETL R9, t10
- 11: ADDL $0x4, t10
- 12: LDL (t10), t12
- 13: PUTL t12, R6
- 14: INCEIPL $4
-
- 0x25483550: 409EFDF4 bc 4,30,0x25483344
- 15: Jc30o $0x25483344
-
-
-. 0 25483544 16
-. 7F 87 00 00 80 6A 00 04 80 C9 00 04 40 9E FD F4
-
-==== BB 738 (0x25483554) approx BBs exec'd 0 ====
-
- 0x25483554: 7C033000 cmp cr0,r3,r6
- 0: GETL R3, t0
- 1: GETL R6, t2
- 2: CMPL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x0, CR
- 4: INCEIPL $4
-
- 0x25483558: 80EA0008 lwz r7,8(r10)
- 5: GETL R10, t6
- 6: ADDL $0x8, t6
- 7: LDL (t6), t8
- 8: PUTL t8, R7
- 9: INCEIPL $4
-
- 0x2548355C: 80090008 lwz r0,8(r9)
- 10: GETL R9, t10
- 11: ADDL $0x8, t10
- 12: LDL (t10), t12
- 13: PUTL t12, R0
- 14: INCEIPL $4
-
- 0x25483560: 41A2FDD4 bc 13,2,0x25483334
- 15: Js02o $0x25483334
-
-
-. 0 25483554 16
-. 7C 03 30 00 80 EA 00 08 80 09 00 08 41 A2 FD D4
-
-==== BB 739 (0x25483334) approx BBs exec'd 0 ====
-
- 0x25483334: 7C870000 cmp cr1,r7,r0
- 0: GETL R7, t0
- 1: GETL R0, t2
- 2: CMPL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x1, CR
- 4: INCEIPL $4
-
- 0x25483338: 806A000C lwz r3,12(r10)
- 5: GETL R10, t6
- 6: ADDL $0xC, t6
- 7: LDL (t6), t8
- 8: PUTL t8, R3
- 9: INCEIPL $4
-
- 0x2548333C: 80C9000C lwz r6,12(r9)
- 10: GETL R9, t10
- 11: ADDL $0xC, t10
- 12: LDL (t10), t12
- 13: PUTL t12, R6
- 14: INCEIPL $4
-
- 0x25483340: 41860148 bc 12,6,0x25483488
- 15: Js06o $0x25483488
-
-
-. 0 25483334 16
-. 7C 87 00 00 80 6A 00 0C 80 C9 00 0C 41 86 01 48
-
-==== BB 740 (0x25483488) approx BBs exec'd 0 ====
-
- 0x25483488: 3908FFFC addi r8,r8,-4
- 0: GETL R8, t0
- 1: ADDL $0xFFFFFFFC, t0
- 2: PUTL t0, R8
- 3: INCEIPL $4
-
- 0x2548348C: 394A0010 addi r10,r10,16
- 4: GETL R10, t2
- 5: ADDL $0x10, t2
- 6: PUTL t2, R10
- 7: INCEIPL $4
-
- 0x25483490: 2F080000 cmpi cr6,r8,0
- 8: GETL R8, t4
- 9: CMP0L t4, t6 (-rSo)
- 10: ICRFL t6, $0x6, CR
- 11: INCEIPL $4
-
- 0x25483494: 39290010 addi r9,r9,16
- 12: GETL R9, t8
- 13: ADDL $0x10, t8
- 14: PUTL t8, R9
- 15: INCEIPL $4
-
- 0x25483498: 40BAFFD8 bc 5,26,0x25483470
- 16: Jc26o $0x25483470
-
-
-. 0 25483488 20
-. 39 08 FF FC 39 4A 00 10 2F 08 00 00 39 29 00 10 40 BA FF D8
-
-==== BB 741 (0x2548349C) approx BBs exec'd 0 ====
-
- 0x2548349C: 7F833000 cmp cr7,r3,r6
- 0: GETL R3, t0
- 1: GETL R6, t2
- 2: CMPL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x7, CR
- 4: INCEIPL $4
-
- 0x254834A0: 7C033010 subfc r0,r3,r6
- 5: GETL R3, t6
- 6: GETL R6, t8
- 7: SBBL t6, t8 (-wCa)
- 8: PUTL t8, R0
- 9: INCEIPL $4
-
- 0x254834A4: 7C000110 subfe r0,r0,r0
- 10: GETL R0, t10
- 11: GETL R0, t12
- 12: SBBL t10, t12 (-rCa-wCa)
- 13: PUTL t12, R0
- 14: INCEIPL $4
-
- 0x254834A8: 7C0003B8 nand r0,r0,r0
- 15: GETL R0, t14
- 16: GETL R0, t16
- 17: ANDL t14, t16
- 18: NOTL t16
- 19: PUTL t16, R0
- 20: INCEIPL $4
-
- 0x254834AC: 60000001 ori r0,r0,0x1
- 21: GETL R0, t18
- 22: ORL $0x1, t18
- 23: PUTL t18, R0
- 24: INCEIPL $4
-
- 0x254834B0: 409EFEA4 bc 4,30,0x25483354
- 25: Jc30o $0x25483354
-
-
-. 0 2548349C 24
-. 7F 83 30 00 7C 03 30 10 7C 00 01 10 7C 00 03 B8 60 00 00 01 40 9E FE A4
-
-==== BB 742 (0x254834B4) approx BBs exec'd 0 ====
-
- 0x254834B4: 38000000 li r0,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x254834B8: 4BFFFE9C b 0x25483354
- 3: JMPo $0x25483354 ($4)
-
-
-. 0 254834B4 8
-. 38 00 00 00 4B FF FE 9C
-
-==== BB 743 (0x25483354) approx BBs exec'd 0 ====
-
- 0x25483354: 2F800000 cmpi cr7,r0,0
- 0: GETL R0, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x25483358: 7C030378 or r3,r0,r0
- 4: GETL R0, t4
- 5: PUTL t4, R3
- 6: INCEIPL $4
-
- 0x2548335C: 409E0040 bc 4,30,0x2548339C
- 7: Jc30o $0x2548339C
-
-
-. 0 25483354 12
-. 2F 80 00 00 7C 03 03 78 40 9E 00 40
-
-==== BB 744 (0x25483360) approx BBs exec'd 0 ====
-
- 0x25483360: 54BC003A rlwinm r28,r5,0,0,29
- 0: GETL R5, t0
- 1: ANDL $0xFFFFFFFC, t0
- 2: PUTL t0, R28
- 3: INCEIPL $4
-
- 0x25483364: 54A507BE rlwinm r5,r5,0,30,31
- 4: GETL R5, t2
- 5: ANDL $0x3, t2
- 6: PUTL t2, R5
- 7: INCEIPL $4
-
- 0x25483368: 7C84E214 add r4,r4,r28
- 8: GETL R4, t4
- 9: GETL R28, t6
- 10: ADDL t4, t6
- 11: PUTL t6, R4
- 12: INCEIPL $4
-
- 0x2548336C: 7D6BE214 add r11,r11,r28
- 13: GETL R11, t8
- 14: GETL R28, t10
- 15: ADDL t8, t10
- 16: PUTL t10, R11
- 17: INCEIPL $4
-
- 0x25483370: 2C050000 cmpi cr0,r5,0
- 18: GETL R5, t12
- 19: CMP0L t12, t14 (-rSo)
- 20: ICRFL t14, $0x0, CR
- 21: INCEIPL $4
-
- 0x25483374: 41820024 bc 12,2,0x25483398
- 22: Js02o $0x25483398
-
-
-. 0 25483360 24
-. 54 BC 00 3A 54 A5 07 BE 7C 84 E2 14 7D 6B E2 14 2C 05 00 00 41 82 00 24
-
-==== BB 745 (0x25477DD4) approx BBs exec'd 0 ====
-
- 0x25477DD4: 2C030000 cmpi cr0,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0x25477DD8: 41A2FE8C bc 13,2,0x25477C64
- 4: Js02o $0x25477C64
-
-
-. 0 25477DD4 8
-. 2C 03 00 00 41 A2 FE 8C
-
-==== BB 746 (0x25477C64) approx BBs exec'd 0 ====
-
- 0x25477C64: 81560000 lwz r10,0(r22)
- 0: GETL R22, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R10
- 3: INCEIPL $4
-
- 0x25477C68: 38600000 li r3,0
- 4: MOVL $0x0, t4
- 5: PUTL t4, R3
- 6: INCEIPL $4
-
- 0x25477C6C: 2F0AFFFF cmpi cr6,r10,-1
- 7: GETL R10, t6
- 8: MOVL $0xFFFFFFFF, t10
- 9: CMPL t6, t10, t8 (-rSo)
- 10: ICRFL t8, $0x6, CR
- 11: INCEIPL $4
-
- 0x25477C70: 419A0094 bc 12,26,0x25477D04
- 12: Js26o $0x25477D04
-
-
-. 0 25477C64 16
-. 81 56 00 00 38 60 00 00 2F 0A FF FF 41 9A 00 94
-
-==== BB 747 (0x25477C74) approx BBs exec'd 0 ====
-
- 0x25477C74: 831E0258 lwz r24,600(r30)
- 0: GETL R30, t0
- 1: ADDL $0x258, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R24
- 4: INCEIPL $4
-
- 0x25477C78: 3AA00000 li r21,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R21
- 7: INCEIPL $4
-
- 0x25477C7C: 83780000 lwz r27,0(r24)
- 8: GETL R24, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R27
- 11: INCEIPL $4
-
- 0x25477C80: 2E1BFFFF cmpi cr4,r27,-1
- 12: GETL R27, t10
- 13: MOVL $0xFFFFFFFF, t14
- 14: CMPL t10, t14, t12 (-rSo)
- 15: ICRFL t12, $0x4, CR
- 16: INCEIPL $4
-
- 0x25477C84: 41920164 bc 12,18,0x25477DE8
- 17: Js18o $0x25477DE8
-
-
-. 0 25477C74 20
-. 83 1E 02 58 3A A0 00 00 83 78 00 00 2E 1B FF FF 41 92 01 64
-
-==== BB 748 (0x25477C88) approx BBs exec'd 0 ====
-
- 0x25477C88: 83FB0014 lwz r31,20(r27)
- 0: GETL R27, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R31
- 4: INCEIPL $4
-
- 0x25477C8C: 839E025C lwz r28,604(r30)
- 5: GETL R30, t4
- 6: ADDL $0x25C, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R28
- 9: INCEIPL $4
-
- 0x25477C90: 3B5FFFFF addi r26,r31,-1
- 10: GETL R31, t8
- 11: ADDL $0xFFFFFFFF, t8
- 12: PUTL t8, R26
- 13: INCEIPL $4
-
- 0x25477C94: 7F95D000 cmp cr7,r21,r26
- 14: GETL R21, t10
- 15: GETL R26, t12
- 16: CMPL t10, t12, t14 (-rSo)
- 17: ICRFL t14, $0x7, CR
- 18: INCEIPL $4
-
- 0x25477C98: 83BC0000 lwz r29,0(r28)
- 19: GETL R28, t16
- 20: LDL (t16), t18
- 21: PUTL t18, R29
- 22: INCEIPL $4
-
- 0x25477C9C: 3B800000 li r28,0
- 23: MOVL $0x0, t20
- 24: PUTL t20, R28
- 25: INCEIPL $4
-
- 0x25477CA0: 7ECAEA14 add r22,r10,r29
- 26: GETL R10, t22
- 27: GETL R29, t24
- 28: ADDL t22, t24
- 29: PUTL t24, R22
- 30: INCEIPL $4
-
- 0x25477CA4: 7F3BB050 subf r25,r27,r22
- 31: GETL R27, t26
- 32: GETL R22, t28
- 33: SUBL t26, t28
- 34: PUTL t28, R25
- 35: INCEIPL $4
-
- 0x25477CA8: 419D004C bc 12,29,0x25477CF4
- 36: Js29o $0x25477CF4
-
-
-. 0 25477C88 36
-. 83 FB 00 14 83 9E 02 5C 3B 5F FF FF 7F 95 D0 00 83 BC 00 00 3B 80 00 00 7E CA EA 14 7F 3B B0 50 41 9D 00 4C
-
-==== BB 749 (0x25477CAC) approx BBs exec'd 0 ====
-
- 0x25477CAC: 7C7CD214 add r3,r28,r26
- 0: GETL R28, t0
- 1: GETL R26, t2
- 2: ADDL t0, t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25477CB0: 80980000 lwz r4,0(r24)
- 5: GETL R24, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R4
- 8: INCEIPL $4
-
- 0x25477CB4: 7C7D0E70 srawi r29,r3,1
- 9: GETL R3, t8
- 10: SARL $0x1, t8 (-wCa)
- 11: PUTL t8, R29
- 12: INCEIPL $4
-
- 0x25477CB8: 7FBD0194 addze r29,r29
- 13: GETL R29, t10
- 14: ADCL $0x0, t10 (-rCa-wCa)
- 15: PUTL t10, R29
- 16: INCEIPL $4
-
- 0x25477CBC: 7EE3BB78 or r3,r23,r23
- 17: GETL R23, t12
- 18: PUTL t12, R3
- 19: INCEIPL $4
-
- 0x25477CC0: 1FFD0018 mulli r31,r29,24
- 20: GETL R29, t14
- 21: MULL $0x18, t14
- 22: PUTL t14, R31
- 23: INCEIPL $4
-
- 0x25477CC4: 7D9F2214 add r12,r31,r4
- 24: GETL R31, t16
- 25: GETL R4, t18
- 26: ADDL t16, t18
- 27: PUTL t18, R12
- 28: INCEIPL $4
-
- 0x25477CC8: 800C0034 lwz r0,52(r12)
- 29: GETL R12, t20
- 30: ADDL $0x34, t20
- 31: LDL (t20), t22
- 32: PUTL t22, R0
- 33: INCEIPL $4
-
- 0x25477CCC: 7C00C840 cmpl cr0,r0,r25
- 34: GETL R0, t24
- 35: GETL R25, t26
- 36: CMPUL t24, t26, t28 (-rSo)
- 37: ICRFL t28, $0x0, CR
- 38: INCEIPL $4
-
- 0x25477CD0: 7C9B0214 add r4,r27,r0
- 39: GETL R27, t30
- 40: GETL R0, t32
- 41: ADDL t30, t32
- 42: PUTL t32, R4
- 43: INCEIPL $4
-
- 0x25477CD4: 40800020 bc 4,0,0x25477CF4
- 44: Jc00o $0x25477CF4
-
-
-. 0 25477CAC 44
-. 7C 7C D2 14 80 98 00 00 7C 7D 0E 70 7F BD 01 94 7E E3 BB 78 1F FD 00 18 7D 9F 22 14 80 0C 00 34 7C 00 C8 40 7C 9B 02 14 40 80 00 20
-
-==== BB 750 (0x25477CD8) approx BBs exec'd 0 ====
-
- 0x25477CD8: 4BFFFDFD bl 0x25477AD4
- 0: MOVL $0x25477CDC, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x25477AD4 ($4)
-
-
-. 0 25477CD8 4
-. 4B FF FD FD
-
-==== BB 751 _dl_cache_libcmp(0x25477AD4) approx BBs exec'd 0 ====
-
- 0x25477AD4: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25477AD8: 7C671B78 or r7,r3,r3
- 6: GETL R3, t4
- 7: PUTL t4, R7
- 8: INCEIPL $4
-
- 0x25477ADC: 89430000 lbz r10,0(r3)
- 9: GETL R3, t6
- 10: LDB (t6), t8
- 11: PUTL t8, R10
- 12: INCEIPL $4
-
- 0x25477AE0: 2F8A0000 cmpi cr7,r10,0
- 13: GETL R10, t10
- 14: CMP0L t10, t12 (-rSo)
- 15: ICRFL t12, $0x7, CR
- 16: INCEIPL $4
-
- 0x25477AE4: 419E00DC bc 12,30,0x25477BC0
- 17: Js30o $0x25477BC0
-
-
-. 0 25477AD4 20
-. 94 21 FF F0 7C 67 1B 78 89 43 00 00 2F 8A 00 00 41 9E 00 DC
-
-==== BB 752 (0x25477AE8) approx BBs exec'd 0 ====
-
- 0x25477AE8: 88640000 lbz r3,0(r4)
- 0: GETL R4, t0
- 1: LDB (t0), t2
- 2: PUTL t2, R3
- 3: INCEIPL $4
-
- 0x25477AEC: 380AFFD0 addi r0,r10,-48
- 4: GETL R10, t4
- 5: ADDL $0xFFFFFFD0, t4
- 6: PUTL t4, R0
- 7: INCEIPL $4
-
- 0x25477AF0: 7D4B5378 or r11,r10,r10
- 8: GETL R10, t6
- 9: PUTL t6, R11
- 10: INCEIPL $4
-
- 0x25477AF4: 28000009 cmpli cr0,r0,9
- 11: GETL R0, t8
- 12: MOVL $0x9, t12
- 13: CMPUL t8, t12, t10 (-rSo)
- 14: ICRFL t10, $0x0, CR
- 15: INCEIPL $4
-
- 0x25477AF8: 4181008C bc 12,1,0x25477B84
- 16: Js01o $0x25477B84
-
-
-. 0 25477AE8 20
-. 88 64 00 00 38 0A FF D0 7D 4B 53 78 28 00 00 09 41 81 00 8C
-
-==== BB 753 (0x25477B84) approx BBs exec'd 0 ====
-
- 0x25477B84: 3903FFD0 addi r8,r3,-48
- 0: GETL R3, t0
- 1: ADDL $0xFFFFFFD0, t0
- 2: PUTL t0, R8
- 3: INCEIPL $4
-
- 0x25477B88: 7C601B78 or r0,r3,r3
- 4: GETL R3, t2
- 5: PUTL t2, R0
- 6: INCEIPL $4
-
- 0x25477B8C: 28080009 cmpli cr0,r8,9
- 7: GETL R8, t4
- 8: MOVL $0x9, t8
- 9: CMPUL t4, t8, t6 (-rSo)
- 10: ICRFL t6, $0x0, CR
- 11: INCEIPL $4
-
- 0x25477B90: 40810048 bc 4,1,0x25477BD8
- 12: Jc01o $0x25477BD8
-
-
-. 0 25477B84 16
-. 39 03 FF D0 7C 60 1B 78 28 08 00 09 40 81 00 48
-
-==== BB 754 (0x25477B94) approx BBs exec'd 0 ====
-
- 0x25477B94: 5543063E rlwinm r3,r10,0,24,31
- 0: GETL R10, t0
- 1: ANDL $0xFF, t0
- 2: PUTL t0, R3
- 3: INCEIPL $4
-
- 0x25477B98: 5400063E rlwinm r0,r0,0,24,31
- 4: GETL R0, t2
- 5: ANDL $0xFF, t2
- 6: PUTL t2, R0
- 7: INCEIPL $4
-
- 0x25477B9C: 7C830000 cmp cr1,r3,r0
- 8: GETL R3, t4
- 9: GETL R0, t6
- 10: CMPL t4, t6, t8 (-rSo)
- 11: ICRFL t8, $0x1, CR
- 12: INCEIPL $4
-
- 0x25477BA0: 40860044 bc 4,6,0x25477BE4
- 13: Jc06o $0x25477BE4
-
-
-. 0 25477B94 16
-. 55 43 06 3E 54 00 06 3E 7C 83 00 00 40 86 00 44
-
-==== BB 755 (0x25477BA4) approx BBs exec'd 0 ====
-
- 0x25477BA4: 8D470001 lbzu r10,1(r7)
- 0: GETL R7, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R7
- 3: LDB (t0), t2
- 4: PUTL t2, R10
- 5: INCEIPL $4
-
- 0x25477BA8: 8C640001 lbzu r3,1(r4)
- 6: GETL R4, t4
- 7: ADDL $0x1, t4
- 8: PUTL t4, R4
- 9: LDB (t4), t6
- 10: PUTL t6, R3
- 11: INCEIPL $4
-
- 0x25477BAC: 2F0A0000 cmpi cr6,r10,0
- 12: GETL R10, t8
- 13: CMP0L t8, t10 (-rSo)
- 14: ICRFL t10, $0x6, CR
- 15: INCEIPL $4
-
- 0x25477BB0: 409AFF3C bc 4,26,0x25477AEC
- 16: Jc26o $0x25477AEC
-
-
-. 0 25477BA4 16
-. 8D 47 00 01 8C 64 00 01 2F 0A 00 00 40 9A FF 3C
-
-==== BB 756 (0x25477AEC) approx BBs exec'd 0 ====
-
- 0x25477AEC: 380AFFD0 addi r0,r10,-48
- 0: GETL R10, t0
- 1: ADDL $0xFFFFFFD0, t0
- 2: PUTL t0, R0
- 3: INCEIPL $4
-
- 0x25477AF0: 7D4B5378 or r11,r10,r10
- 4: GETL R10, t2
- 5: PUTL t2, R11
- 6: INCEIPL $4
-
- 0x25477AF4: 28000009 cmpli cr0,r0,9
- 7: GETL R0, t4
- 8: MOVL $0x9, t8
- 9: CMPUL t4, t8, t6 (-rSo)
- 10: ICRFL t6, $0x0, CR
- 11: INCEIPL $4
-
- 0x25477AF8: 4181008C bc 12,1,0x25477B84
- 12: Js01o $0x25477B84
-
-
-. 0 25477AEC 16
-. 38 0A FF D0 7D 4B 53 78 28 00 00 09 41 81 00 8C
-
-==== BB 757 (0x25477BE4) approx BBs exec'd 0 ====
-
- 0x25477BE4: 7C601850 subf r3,r0,r3
- 0: GETL R0, t0
- 1: GETL R3, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25477BE8: 38210010 addi r1,r1,16
- 5: GETL R1, t4
- 6: ADDL $0x10, t4
- 7: PUTL t4, R1
- 8: INCEIPL $4
-
- 0x25477BEC: 4E800020 blr
- 9: GETL LR, t6
- 10: JMPo-r t6 ($4)
-
-
-. 0 25477BE4 12
-. 7C 60 18 50 38 21 00 10 4E 80 00 20
-
-==== BB 758 (0x25477CDC) approx BBs exec'd 0 ====
-
- 0x25477CDC: 2F830000 cmpi cr7,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x25477CE0: 419E0214 bc 12,30,0x25477EF4
- 4: Js30o $0x25477EF4
-
-
-. 0 25477CDC 8
-. 2F 83 00 00 41 9E 02 14
-
-==== BB 759 (0x25477CE4) approx BBs exec'd 0 ====
-
- 0x25477CE4: 409C006C bc 4,28,0x25477D50
- 0: Jc28o $0x25477D50
-
-
-. 0 25477CE4 4
-. 40 9C 00 6C
-
-==== BB 760 (0x25477CE8) approx BBs exec'd 0 ====
-
- 0x25477CE8: 3B9D0001 addi r28,r29,1
- 0: GETL R29, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R28
- 3: INCEIPL $4
-
- 0x25477CEC: 7F9CD000 cmp cr7,r28,r26
- 4: GETL R28, t2
- 5: GETL R26, t4
- 6: CMPL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x25477CF0: 409DFFBC bc 4,29,0x25477CAC
- 9: Jc29o $0x25477CAC
-
-
-. 0 25477CE8 12
-. 3B 9D 00 01 7F 9C D0 00 40 9D FF BC
-
-==== BB 761 (0x25477D50) approx BBs exec'd 0 ====
-
- 0x25477D50: 3B5DFFFF addi r26,r29,-1
- 0: GETL R29, t0
- 1: ADDL $0xFFFFFFFF, t0
- 2: PUTL t0, R26
- 3: INCEIPL $4
-
- 0x25477D54: 7F9CD000 cmp cr7,r28,r26
- 4: GETL R28, t2
- 5: GETL R26, t4
- 6: CMPL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x25477D58: 4BFFFF98 b 0x25477CF0
- 9: JMPo $0x25477CF0 ($4)
-
-
-. 0 25477D50 12
-. 3B 5D FF FF 7F 9C D0 00 4B FF FF 98
-
-==== BB 762 (0x25477CF0) approx BBs exec'd 0 ====
-
- 0x25477CF0: 409DFFBC bc 4,29,0x25477CAC
- 0: Jc29o $0x25477CAC
-
-
-. 0 25477CF0 4
-. 40 9D FF BC
-
-==== BB 763 (0x25477AFC) approx BBs exec'd 0 ====
-
- 0x25477AFC: 38A3FFD0 addi r5,r3,-48
- 0: GETL R3, t0
- 1: ADDL $0xFFFFFFD0, t0
- 2: PUTL t0, R5
- 3: INCEIPL $4
-
- 0x25477B00: 7C691B78 or r9,r3,r3
- 4: GETL R3, t2
- 5: PUTL t2, R9
- 6: INCEIPL $4
-
- 0x25477B04: 28850009 cmpli cr1,r5,9
- 7: GETL R5, t4
- 8: MOVL $0x9, t8
- 9: CMPUL t4, t8, t6 (-rSo)
- 10: ICRFL t6, $0x1, CR
- 11: INCEIPL $4
-
- 0x25477B08: 418500C4 bc 12,5,0x25477BCC
- 12: Js05o $0x25477BCC
-
-
-. 0 25477AFC 16
-. 38 A3 FF D0 7C 69 1B 78 28 85 00 09 41 85 00 C4
-
-==== BB 764 (0x25477B0C) approx BBs exec'd 0 ====
-
- 0x25477B0C: 8D470001 lbzu r10,1(r7)
- 0: GETL R7, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R7
- 3: LDB (t0), t2
- 4: PUTL t2, R10
- 5: INCEIPL $4
-
- 0x25477B10: 556B063E rlwinm r11,r11,0,24,31
- 6: GETL R11, t4
- 7: ANDL $0xFF, t4
- 8: PUTL t4, R11
- 9: INCEIPL $4
-
- 0x25477B14: 5529063E rlwinm r9,r9,0,24,31
- 10: GETL R9, t6
- 11: ANDL $0xFF, t6
- 12: PUTL t6, R9
- 13: INCEIPL $4
-
- 0x25477B18: 390BFFD0 addi r8,r11,-48
- 14: GETL R11, t8
- 15: ADDL $0xFFFFFFD0, t8
- 16: PUTL t8, R8
- 17: INCEIPL $4
-
- 0x25477B1C: 386AFFD0 addi r3,r10,-48
- 18: GETL R10, t10
- 19: ADDL $0xFFFFFFD0, t10
- 20: PUTL t10, R3
- 21: INCEIPL $4
-
- 0x25477B20: 3969FFD0 addi r11,r9,-48
- 22: GETL R9, t12
- 23: ADDL $0xFFFFFFD0, t12
- 24: PUTL t12, R11
- 25: INCEIPL $4
-
- 0x25477B24: 2B830009 cmpli cr7,r3,9
- 26: GETL R3, t14
- 27: MOVL $0x9, t18
- 28: CMPUL t14, t18, t16 (-rSo)
- 29: ICRFL t16, $0x7, CR
- 30: INCEIPL $4
-
- 0x25477B28: 38840001 addi r4,r4,1
- 31: GETL R4, t20
- 32: ADDL $0x1, t20
- 33: PUTL t20, R4
- 34: INCEIPL $4
-
- 0x25477B2C: 419D0020 bc 12,29,0x25477B4C
- 35: Js29o $0x25477B4C
-
-
-. 0 25477B0C 36
-. 8D 47 00 01 55 6B 06 3E 55 29 06 3E 39 0B FF D0 38 6A FF D0 39 69 FF D0 2B 83 00 09 38 84 00 01 41 9D 00 20
-
-==== BB 765 (0x25477B4C) approx BBs exec'd 0 ====
-
- 0x25477B4C: 88640000 lbz r3,0(r4)
- 0: GETL R4, t0
- 1: LDB (t0), t2
- 2: PUTL t2, R3
- 3: INCEIPL $4
-
- 0x25477B50: 48000014 b 0x25477B64
- 4: JMPo $0x25477B64 ($4)
-
-
-. 0 25477B4C 8
-. 88 64 00 00 48 00 00 14
-
-==== BB 766 (0x25477B64) approx BBs exec'd 0 ====
-
- 0x25477B64: 38A3FFD0 addi r5,r3,-48
- 0: GETL R3, t0
- 1: ADDL $0xFFFFFFD0, t0
- 2: PUTL t0, R5
- 3: INCEIPL $4
-
- 0x25477B68: 2B050009 cmpli cr6,r5,9
- 4: GETL R5, t2
- 5: MOVL $0x9, t6
- 6: CMPUL t2, t6, t4 (-rSo)
- 7: ICRFL t4, $0x6, CR
- 8: INCEIPL $4
-
- 0x25477B6C: 4099FFE8 bc 4,25,0x25477B54
- 9: Jc25o $0x25477B54
-
-
-. 0 25477B64 12
-. 38 A3 FF D0 2B 05 00 09 40 99 FF E8
-
-==== BB 767 (0x25477B70) approx BBs exec'd 0 ====
-
- 0x25477B70: 7F885800 cmp cr7,r8,r11
- 0: GETL R8, t0
- 1: GETL R11, t2
- 2: CMPL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x7, CR
- 4: INCEIPL $4
-
- 0x25477B74: 41BE0038 bc 13,30,0x25477BAC
- 5: Js30o $0x25477BAC
-
-
-. 0 25477B70 8
-. 7F 88 58 00 41 BE 00 38
-
-==== BB 768 (0x25477BAC) approx BBs exec'd 0 ====
-
- 0x25477BAC: 2F0A0000 cmpi cr6,r10,0
- 0: GETL R10, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x25477BB0: 409AFF3C bc 4,26,0x25477AEC
- 4: Jc26o $0x25477AEC
-
-
-. 0 25477BAC 8
-. 2F 0A 00 00 40 9A FF 3C
-
-==== BB 769 (0x25477BB4) approx BBs exec'd 0 ====
-
- 0x25477BB4: 7C635050 subf r3,r3,r10
- 0: GETL R3, t0
- 1: GETL R10, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25477BB8: 38210010 addi r1,r1,16
- 5: GETL R1, t4
- 6: ADDL $0x10, t4
- 7: PUTL t4, R1
- 8: INCEIPL $4
-
- 0x25477BBC: 4E800020 blr
- 9: GETL LR, t6
- 10: JMPo-r t6 ($4)
-
-
-. 0 25477BB4 12
-. 7C 63 50 50 38 21 00 10 4E 80 00 20
-
-==== BB 770 (0x25477EF4) approx BBs exec'd 0 ====
-
- 0x25477EF4: 2F9D0000 cmpi cr7,r29,0
- 0: GETL R29, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x25477EF8: 7FB6EB78 or r22,r29,r29
- 4: GETL R29, t4
- 5: PUTL t4, R22
- 6: INCEIPL $4
-
- 0x25477EFC: 7FFCFB78 or r28,r31,r31
- 7: GETL R31, t6
- 8: PUTL t6, R28
- 9: INCEIPL $4
-
- 0x25477F00: 41BD0020 bc 13,29,0x25477F20
- 10: Js29o $0x25477F20
-
-
-. 0 25477EF4 16
-. 2F 9D 00 00 7F B6 EB 78 7F FC FB 78 41 BD 00 20
-
-==== BB 771 (0x25477F20) approx BBs exec'd 0 ====
-
- 0x25477F20: 80D80000 lwz r6,0(r24)
- 0: GETL R24, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R6
- 3: INCEIPL $4
-
- 0x25477F24: 7EE3BB78 or r3,r23,r23
- 4: GETL R23, t4
- 5: PUTL t4, R3
- 6: INCEIPL $4
-
- 0x25477F28: 3B9CFFE8 addi r28,r28,-24
- 7: GETL R28, t6
- 8: ADDL $0xFFFFFFE8, t6
- 9: PUTL t6, R28
- 10: INCEIPL $4
-
- 0x25477F2C: 7D3F3214 add r9,r31,r6
- 11: GETL R31, t8
- 12: GETL R6, t10
- 13: ADDL t8, t10
- 14: PUTL t10, R9
- 15: INCEIPL $4
-
- 0x25477F30: 80A9001C lwz r5,28(r9)
- 16: GETL R9, t12
- 17: ADDL $0x1C, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R5
- 20: INCEIPL $4
-
- 0x25477F34: 7C85C840 cmpl cr1,r5,r25
- 21: GETL R5, t16
- 22: GETL R25, t18
- 23: CMPUL t16, t18, t20 (-rSo)
- 24: ICRFL t20, $0x1, CR
- 25: INCEIPL $4
-
- 0x25477F38: 7C9B2A14 add r4,r27,r5
- 26: GETL R27, t22
- 27: GETL R5, t24
- 28: ADDL t22, t24
- 29: PUTL t24, R4
- 30: INCEIPL $4
-
- 0x25477F3C: 4184FFCC bc 12,4,0x25477F08
- 31: Js04o $0x25477F08
-
-
-. 0 25477F20 32
-. 80 D8 00 00 7E E3 BB 78 3B 9C FF E8 7D 3F 32 14 80 A9 00 1C 7C 85 C8 40 7C 9B 2A 14 41 84 FF CC
-
-==== BB 772 (0x25477F08) approx BBs exec'd 0 ====
-
- 0x25477F08: 4BFFFBCD bl 0x25477AD4
- 0: MOVL $0x25477F0C, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x25477AD4 ($4)
-
-
-. 0 25477F08 4
-. 4B FF FB CD
-
-==== BB 773 (0x25477F0C) approx BBs exec'd 0 ====
-
- 0x25477F0C: 2F030000 cmpi cr6,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x25477F10: 409A0030 bc 4,26,0x25477F40
- 4: Jc26o $0x25477F40
-
-
-. 0 25477F0C 8
-. 2F 03 00 00 40 9A 00 30
-
-==== BB 774 (0x25477F40) approx BBs exec'd 0 ====
-
- 0x25477F40: 7E1DB000 cmp cr4,r29,r22
- 0: GETL R29, t0
- 1: GETL R22, t2
- 2: CMPL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x4, CR
- 4: INCEIPL $4
-
- 0x25477F44: 80F80000 lwz r7,0(r24)
- 5: GETL R24, t6
- 6: LDL (t6), t8
- 7: PUTL t8, R7
- 8: INCEIPL $4
-
- 0x25477F48: 7FFF3A14 add r31,r31,r7
- 9: GETL R31, t10
- 10: GETL R7, t12
- 11: ADDL t10, t12
- 12: PUTL t12, R31
- 13: INCEIPL $4
-
- 0x25477F4C: 3B9F0030 addi r28,r31,48
- 14: GETL R31, t14
- 15: ADDL $0x30, t14
- 16: PUTL t14, R28
- 17: INCEIPL $4
-
- 0x25477F50: 40910024 bc 4,17,0x25477F74
- 18: Jc17o $0x25477F74
-
-
-. 0 25477F40 20
-. 7E 1D B0 00 80 F8 00 00 7F FF 3A 14 3B 9F 00 30 40 91 00 24
-
-==== BB 775 (0x25477F74) approx BBs exec'd 0 ====
-
- 0x25477F74: 811F0030 lwz r8,48(r31)
- 0: GETL R31, t0
- 1: ADDL $0x30, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x25477F78: 691F0001 xori r31,r8,0x1
- 5: GETL R8, t4
- 6: XORL $0x1, t4
- 7: PUTL t4, R31
- 8: INCEIPL $4
-
- 0x25477F7C: 213F0000 subfic r9,r31,0
- 9: GETL R31, t6
- 10: MOVL $0x0, t8
- 11: SBBL t6, t8 (-wCa)
- 12: PUTL t8, R9
- 13: INCEIPL $4
-
- 0x25477F80: 7FE9F914 adde r31,r9,r31
- 14: GETL R9, t10
- 15: GETL R31, t12
- 16: ADCL t10, t12 (-rCa-wCa)
- 17: PUTL t12, R31
- 18: INCEIPL $4
-
- 0x25477F84: 69140003 xori r20,r8,0x3
- 19: GETL R8, t14
- 20: XORL $0x3, t14
- 21: PUTL t14, R20
- 22: INCEIPL $4
-
- 0x25477F88: 21540000 subfic r10,r20,0
- 23: GETL R20, t16
- 24: MOVL $0x0, t18
- 25: SBBL t16, t18 (-wCa)
- 26: PUTL t18, R10
- 27: INCEIPL $4
-
- 0x25477F8C: 7E8AA114 adde r20,r10,r20
- 28: GETL R10, t20
- 29: GETL R20, t22
- 30: ADCL t20, t22 (-rCa-wCa)
- 31: PUTL t22, R20
- 32: INCEIPL $4
-
- 0x25477F90: 7FEBA379 or. r11,r31,r20
- 33: GETL R31, t24
- 34: GETL R20, t26
- 35: ORL t26, t24
- 36: PUTL t24, R11
- 37: CMP0L t24, t28 (-rSo)
- 38: ICRFL t28, $0x0, CR
- 39: INCEIPL $4
-
- 0x25477F94: 41820024 bc 12,2,0x25477FB8
- 40: Js02o $0x25477FB8
-
-
-. 0 25477F74 36
-. 81 1F 00 30 69 1F 00 01 21 3F 00 00 7F E9 F9 14 69 14 00 03 21 54 00 00 7E 8A A1 14 7F EB A3 79 41 82 00 24
-
-==== BB 776 (0x25477F98) approx BBs exec'd 0 ====
-
- 0x25477F98: 80FC0008 lwz r7,8(r28)
- 0: GETL R28, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x25477F9C: 7F07C840 cmpl cr6,r7,r25
- 5: GETL R7, t4
- 6: GETL R25, t6
- 7: CMPUL t4, t6, t8 (-rSo)
- 8: ICRFL t8, $0x6, CR
- 9: INCEIPL $4
-
- 0x25477FA0: 40980018 bc 4,24,0x25477FB8
- 10: Jc24o $0x25477FB8
-
-
-. 0 25477F98 12
-. 80 FC 00 08 7F 07 C8 40 40 98 00 18
-
-==== BB 777 (0x25477FA4) approx BBs exec'd 0 ====
-
- 0x25477FA4: 2E150000 cmpi cr4,r21,0
- 0: GETL R21, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x4, CR
- 3: INCEIPL $4
-
- 0x25477FA8: 41920128 bc 12,18,0x254780D0
- 4: Js18o $0x254780D0
-
-
-. 0 25477FA4 8
-. 2E 15 00 00 41 92 01 28
-
-==== BB 778 (0x254780D0) approx BBs exec'd 0 ====
-
- 0x254780D0: 81330008 lwz r9,8(r19)
- 0: GETL R19, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x254780D4: 2C890000 cmpi cr1,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x254780D8: 41860010 bc 12,6,0x254780E8
- 9: Js06o $0x254780E8
-
-
-. 0 254780D0 12
-. 81 33 00 08 2C 89 00 00 41 86 00 10
-
-==== BB 779 (0x254780DC) approx BBs exec'd 0 ====
-
- 0x254780DC: 817C000C lwz r11,12(r28)
- 0: GETL R28, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x254780E0: 7C0B4840 cmpl cr0,r11,r9
- 5: GETL R11, t4
- 6: GETL R9, t6
- 7: CMPUL t4, t6, t8 (-rSo)
- 8: ICRFL t8, $0x0, CR
- 9: INCEIPL $4
-
- 0x254780E4: 4181FED4 bc 12,1,0x25477FB8
- 10: Js01o $0x25477FB8
-
-
-. 0 254780DC 12
-. 81 7C 00 0C 7C 0B 48 40 41 81 FE D4
-
-==== BB 780 (0x254780E8) approx BBs exec'd 0 ====
-
- 0x254780E8: 80D3003C lwz r6,60(r19)
- 0: GETL R19, t0
- 1: ADDL $0x3C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x254780EC: 3A800000 li r20,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R20
- 7: INCEIPL $4
-
- 0x254780F0: 807C0010 lwz r3,16(r28)
- 8: GETL R28, t6
- 9: ADDL $0x10, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R3
- 12: INCEIPL $4
-
- 0x254780F4: 66898000 oris r9,r20,0x8000
- 13: MOVL $0x80000000, t10
- 14: PUTL t10, R9
- 15: INCEIPL $4
-
- 0x254780F8: 801C0014 lwz r0,20(r28)
- 16: GETL R28, t12
- 17: ADDL $0x14, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R0
- 20: INCEIPL $4
-
- 0x254780FC: 7D2548F8 nor r5,r9,r9
- 21: GETL R9, t16
- 22: NOTL t16
- 23: PUTL t16, R5
- 24: INCEIPL $4
-
- 0x25478100: 7CCC30F8 nor r12,r6,r6
- 25: GETL R6, t18
- 26: NOTL t18
- 27: PUTL t18, R12
- 28: INCEIPL $4
-
- 0x25478104: 7C642838 and r4,r3,r5
- 29: GETL R3, t20
- 30: GETL R5, t22
- 31: ANDL t20, t22
- 32: PUTL t22, R4
- 33: INCEIPL $4
-
- 0x25478108: 7C1C6038 and r28,r0,r12
- 34: GETL R0, t24
- 35: GETL R12, t26
- 36: ANDL t24, t26
- 37: PUTL t26, R28
- 38: INCEIPL $4
-
- 0x2547810C: 7C80E379 or. r0,r4,r28
- 39: GETL R4, t28
- 40: GETL R28, t30
- 41: ORL t30, t28
- 42: PUTL t28, R0
- 43: CMP0L t28, t32 (-rSo)
- 44: ICRFL t32, $0x0, CR
- 45: INCEIPL $4
-
- 0x25478110: 4082FEA8 bc 4,2,0x25477FB8
- 46: Jc02o $0x25477FB8
-
-
-. 0 254780E8 44
-. 80 D3 00 3C 3A 80 00 00 80 7C 00 10 66 89 80 00 80 1C 00 14 7D 25 48 F8 7C CC 30 F8 7C 64 28 38 7C 1C 60 38 7C 80 E3 79 40 82 FE A8
-
-==== BB 781 (0x25478114) approx BBs exec'd 0 ====
-
- 0x25478114: 83F30038 lwz r31,56(r19)
- 0: GETL R19, t0
- 1: ADDL $0x38, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R31
- 4: INCEIPL $4
-
- 0x25478118: 7EA7DA14 add r21,r7,r27
- 5: GETL R7, t4
- 6: GETL R27, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R21
- 9: INCEIPL $4
-
- 0x2547811C: 7F1F4000 cmp cr6,r31,r8
- 10: GETL R31, t8
- 11: GETL R8, t10
- 12: CMPL t8, t10, t12 (-rSo)
- 13: ICRFL t12, $0x6, CR
- 14: INCEIPL $4
-
- 0x25478120: 409AFE98 bc 4,26,0x25477FB8
- 15: Jc26o $0x25477FB8
-
-
-. 0 25478114 16
-. 83 F3 00 38 7E A7 DA 14 7F 1F 40 00 40 9A FE 98
-
-==== BB 782 (0x25478124) approx BBs exec'd 0 ====
-
- 0x25478124: 4BFFFBD0 b 0x25477CF4
- 0: JMPo $0x25477CF4 ($4)
-
-
-. 0 25478124 4
-. 4B FF FB D0
-
-==== BB 783 (0x25477CF4) approx BBs exec'd 0 ====
-
- 0x25477CF4: 82F30000 lwz r23,0(r19)
- 0: GETL R19, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R23
- 3: INCEIPL $4
-
- 0x25477CF8: 72EB0001 andi. r11,r23,0x1
- 4: GETL R23, t4
- 5: ANDL $0x1, t4
- 6: PUTL t4, R11
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x0, CR
- 9: INCEIPL $4
-
- 0x25477CFC: 408201AC bc 4,2,0x25477EA8
- 10: Jc02o $0x25477EA8
-
-
-. 0 25477CF4 12
-. 82 F3 00 00 72 EB 00 01 40 82 01 AC
-
-==== BB 784 (0x25477D00) approx BBs exec'd 0 ====
-
- 0x25477D00: 7EA3AB78 or r3,r21,r21
- 0: GETL R21, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25477D04: 82610044 lwz r19,68(r1)
- 3: GETL R1, t2
- 4: ADDL $0x44, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R19
- 7: INCEIPL $4
-
- 0x25477D08: 80E10008 lwz r7,8(r1)
- 8: GETL R1, t6
- 9: ADDL $0x8, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R7
- 12: INCEIPL $4
-
- 0x25477D0C: 7E6803A6 mtlr r19
- 13: GETL R19, t10
- 14: PUTL t10, LR
- 15: INCEIPL $4
-
- 0x25477D10: 82810010 lwz r20,16(r1)
- 16: GETL R1, t12
- 17: ADDL $0x10, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R20
- 20: INCEIPL $4
-
- 0x25477D14: 8261000C lwz r19,12(r1)
- 21: GETL R1, t16
- 22: ADDL $0xC, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R19
- 25: INCEIPL $4
-
- 0x25477D18: 7CE08120 mtcrf 0x8,r7
- 26: GETL R7, t20
- 27: ICRFL t20, $0x4, CR
- 28: INCEIPL $4
-
- 0x25477D1C: 82A10014 lwz r21,20(r1)
- 29: GETL R1, t22
- 30: ADDL $0x14, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R21
- 33: INCEIPL $4
-
- 0x25477D20: 82C10018 lwz r22,24(r1)
- 34: GETL R1, t26
- 35: ADDL $0x18, t26
- 36: LDL (t26), t28
- 37: PUTL t28, R22
- 38: INCEIPL $4
-
- 0x25477D24: 82E1001C lwz r23,28(r1)
- 39: GETL R1, t30
- 40: ADDL $0x1C, t30
- 41: LDL (t30), t32
- 42: PUTL t32, R23
- 43: INCEIPL $4
-
- 0x25477D28: 83010020 lwz r24,32(r1)
- 44: GETL R1, t34
- 45: ADDL $0x20, t34
- 46: LDL (t34), t36
- 47: PUTL t36, R24
- 48: INCEIPL $4
-
- 0x25477D2C: 83210024 lwz r25,36(r1)
- 49: GETL R1, t38
- 50: ADDL $0x24, t38
- 51: LDL (t38), t40
- 52: PUTL t40, R25
- 53: INCEIPL $4
-
- 0x25477D30: 83410028 lwz r26,40(r1)
- 54: GETL R1, t42
- 55: ADDL $0x28, t42
- 56: LDL (t42), t44
- 57: PUTL t44, R26
- 58: INCEIPL $4
-
- 0x25477D34: 8361002C lwz r27,44(r1)
- 59: GETL R1, t46
- 60: ADDL $0x2C, t46
- 61: LDL (t46), t48
- 62: PUTL t48, R27
- 63: INCEIPL $4
-
- 0x25477D38: 83810030 lwz r28,48(r1)
- 64: GETL R1, t50
- 65: ADDL $0x30, t50
- 66: LDL (t50), t52
- 67: PUTL t52, R28
- 68: INCEIPL $4
-
- 0x25477D3C: 83A10034 lwz r29,52(r1)
- 69: GETL R1, t54
- 70: ADDL $0x34, t54
- 71: LDL (t54), t56
- 72: PUTL t56, R29
- 73: INCEIPL $4
-
- 0x25477D40: 83C10038 lwz r30,56(r1)
- 74: GETL R1, t58
- 75: ADDL $0x38, t58
- 76: LDL (t58), t60
- 77: PUTL t60, R30
- 78: INCEIPL $4
-
- 0x25477D44: 83E1003C lwz r31,60(r1)
- 79: GETL R1, t62
- 80: ADDL $0x3C, t62
- 81: LDL (t62), t64
- 82: PUTL t64, R31
- 83: INCEIPL $4
-
- 0x25477D48: 38210040 addi r1,r1,64
- 84: GETL R1, t66
- 85: ADDL $0x40, t66
- 86: PUTL t66, R1
- 87: INCEIPL $4
-
- 0x25477D4C: 4E800020 blr
- 88: GETL LR, t68
- 89: JMPo-r t68 ($4)
-
-
-. 0 25477D00 80
-. 7E A3 AB 78 82 61 00 44 80 E1 00 08 7E 68 03 A6 82 81 00 10 82 61 00 0C 7C E0 81 20 82 A1 00 14 82 C1 00 18 82 E1 00 1C 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 83 C1 00 38 83 E1 00 3C 38 21 00 40 4E 80 00 20
-
-==== BB 785 (0x254772AC) approx BBs exec'd 0 ====
-
- 0x254772AC: 7C721B79 or. r18,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R18
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x254772B0: 7F800026 mfcr r28
- 5: GETL CR, t4
- 6: PUTL t4, R28
- 7: INCEIPL $4
-
- 0x254772B4: 41820020 bc 12,2,0x254772D4
- 8: Js02o $0x254772D4
-
-
-. 0 254772AC 12
-. 7C 72 1B 79 7F 80 00 26 41 82 00 20
-
-==== BB 786 (0x254772B8) approx BBs exec'd 0 ====
-
- 0x254772B8: 418E017C bc 12,14,0x25477434
- 0: Js14o $0x25477434
-
-
-. 0 254772B8 4
-. 41 8E 01 7C
-
-==== BB 787 (0x254772BC) approx BBs exec'd 0 ====
-
- 0x254772BC: 7F69DB78 or r9,r27,r27
- 0: GETL R27, t0
- 1: PUTL t0, R9
- 2: INCEIPL $4
-
- 0x254772C0: 83A901FC lwz r29,508(r9)
- 3: GETL R9, t2
- 4: ADDL $0x1FC, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R29
- 7: INCEIPL $4
-
- 0x254772C4: 73A90800 andi. r9,r29,0x800
- 8: GETL R29, t6
- 9: ANDL $0x800, t6
- 10: PUTL t6, R9
- 11: CMP0L t6, t8 (-rSo)
- 12: ICRFL t8, $0x0, CR
- 13: INCEIPL $4
-
- 0x254772C8: 408201D4 bc 4,2,0x2547749C
- 14: Jc02o $0x2547749C
-
-
-. 0 254772BC 16
-. 7F 69 DB 78 83 A9 01 FC 73 A9 08 00 40 82 01 D4
-
-==== BB 788 (0x254772CC) approx BBs exec'd 0 ====
-
- 0x254772CC: 7F880120 mtcrf 0x80,r28
- 0: GETL R28, t0
- 1: ICRFL t0, $0x0, CR
- 2: INCEIPL $4
-
- 0x254772D0: 408200C8 bc 4,2,0x25477398
- 3: Jc02o $0x25477398
-
-
-. 0 254772CC 8
-. 7F 88 01 20 40 82 00 C8
-
-==== BB 789 (0x25477398) approx BBs exec'd 0 ====
-
- 0x25477398: 7E439378 or r3,r18,r18
- 0: GETL R18, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547739C: 38810018 addi r4,r1,24
- 3: GETL R1, t2
- 4: ADDL $0x18, t2
- 5: PUTL t2, R4
- 6: INCEIPL $4
-
- 0x254773A0: 4BFFF0A5 bl 0x25476444
- 7: MOVL $0x254773A4, t4
- 8: PUTL t4, LR
- 9: JMPo-c $0x25476444 ($4)
-
-
-. 0 25477398 12
-. 7E 43 93 78 38 81 00 18 4B FF F0 A5
-
-==== BB 790 (0x254765B4) approx BBs exec'd 0 ====
-
- 0x254765B4: 80FD0010 lwz r7,16(r29)
- 0: GETL R29, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x254765B8: 2F070020 cmpi cr6,r7,32
- 5: GETL R7, t4
- 6: MOVL $0x20, t8
- 7: CMPL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x6, CR
- 9: INCEIPL $4
-
- 0x254765BC: 409AFFA0 bc 4,26,0x2547655C
- 10: Jc26o $0x2547655C
-
-
-. 0 254765B4 12
-. 80 FD 00 10 2F 07 00 20 40 9A FF A0
-
-==== BB 791 (0x254765C0) approx BBs exec'd 0 ====
-
- 0x254765C0: 815D001C lwz r10,28(r29)
- 0: GETL R29, t0
- 1: ADDL $0x1C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x254765C4: 2B8A0003 cmpli cr7,r10,3
- 5: GETL R10, t4
- 6: MOVL $0x3, t8
- 7: CMPUL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x7, CR
- 9: INCEIPL $4
-
- 0x254765C8: 40BDFF94 bc 5,29,0x2547655C
- 10: Jc29o $0x2547655C
-
-
-. 0 254765C0 12
-. 81 5D 00 1C 2B 8A 00 03 40 BD FF 94
-
-==== BB 792 (0x254765CC) approx BBs exec'd 0 ====
-
- 0x254765CC: 819D0004 lwz r12,4(r29)
- 0: GETL R29, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R12
- 4: INCEIPL $4
-
- 0x254765D0: 38A00000 li r5,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x254765D4: 81180000 lwz r8,0(r24)
- 8: GETL R24, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R8
- 11: INCEIPL $4
-
- 0x254765D8: 3ABF0010 addi r21,r31,16
- 12: GETL R31, t10
- 13: ADDL $0x10, t10
- 14: PUTL t10, R21
- 15: INCEIPL $4
-
- 0x254765DC: 380C0020 addi r0,r12,32
- 16: GETL R12, t12
- 17: ADDL $0x20, t12
- 18: PUTL t12, R0
- 19: INCEIPL $4
-
- 0x254765E0: 7D6CC214 add r11,r12,r24
- 20: GETL R12, t14
- 21: GETL R24, t16
- 22: ADDL t14, t16
- 23: PUTL t16, R11
- 24: INCEIPL $4
-
- 0x254765E4: 7C004040 cmpl cr0,r0,r8
- 25: GETL R0, t18
- 26: GETL R8, t20
- 27: CMPUL t18, t20, t22 (-rSo)
- 28: ICRFL t22, $0x0, CR
- 29: INCEIPL $4
-
- 0x254765E8: 7F23CB78 or r3,r25,r25
- 30: GETL R25, t24
- 31: PUTL t24, R3
- 32: INCEIPL $4
-
- 0x254765EC: 7D846378 or r4,r12,r12
- 33: GETL R12, t26
- 34: PUTL t26, R4
- 35: INCEIPL $4
-
- 0x254765F0: 3B6B0004 addi r27,r11,4
- 36: GETL R11, t28
- 37: ADDL $0x4, t28
- 38: PUTL t28, R27
- 39: INCEIPL $4
-
- 0x254765F4: 418100FC bc 12,1,0x254766F0
- 40: Js01o $0x254766F0
-
-
-. 0 254765CC 44
-. 81 9D 00 04 38 A0 00 00 81 18 00 00 3A BF 00 10 38 0C 00 20 7D 6C C2 14 7C 00 40 40 7F 23 CB 78 7D 84 63 78 3B 6B 00 04 41 81 00 FC
-
-==== BB 793 (0x254765F8) approx BBs exec'd 0 ====
-
- 0x254765F8: 809E0170 lwz r4,368(r30)
- 0: GETL R30, t0
- 1: ADDL $0x170, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x254765FC: 7F63DB78 or r3,r27,r27
- 5: GETL R27, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25476600: 38A00010 li r5,16
- 8: MOVL $0x10, t6
- 9: PUTL t6, R5
- 10: INCEIPL $4
-
- 0x25476604: 4800CC95 bl 0x25483298
- 11: MOVL $0x25476608, t8
- 12: PUTL t8, LR
- 13: JMPo-c $0x25483298 ($4)
-
-
-. 0 254765F8 16
-. 80 9E 01 70 7F 63 DB 78 38 A0 00 10 48 00 CC 95
-
-==== BB 794 (0x25483310) approx BBs exec'd 0 ====
-
- 0x25483310: 28000001 cmpli cr0,r0,1
- 0: GETL R0, t0
- 1: MOVL $0x1, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x25483314: 41800228 bc 12,0,0x2548353C
- 5: Js00o $0x2548353C
-
-
-. 0 25483310 8
-. 28 00 00 01 41 80 02 28
-
-==== BB 795 (0x2548353C) approx BBs exec'd 0 ====
-
- 0x2548353C: 80EB0000 lwz r7,0(r11)
- 0: GETL R11, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R7
- 3: INCEIPL $4
-
- 0x25483540: 80040000 lwz r0,0(r4)
- 4: GETL R4, t4
- 5: LDL (t4), t6
- 6: PUTL t6, R0
- 7: INCEIPL $4
-
- 0x25483544: 7F870000 cmp cr7,r7,r0
- 8: GETL R7, t8
- 9: GETL R0, t10
- 10: CMPL t8, t10, t12 (-rSo)
- 11: ICRFL t12, $0x7, CR
- 12: INCEIPL $4
-
- 0x25483548: 806A0004 lwz r3,4(r10)
- 13: GETL R10, t14
- 14: ADDL $0x4, t14
- 15: LDL (t14), t16
- 16: PUTL t16, R3
- 17: INCEIPL $4
-
- 0x2548354C: 80C90004 lwz r6,4(r9)
- 18: GETL R9, t18
- 19: ADDL $0x4, t18
- 20: LDL (t18), t20
- 21: PUTL t20, R6
- 22: INCEIPL $4
-
- 0x25483550: 409EFDF4 bc 4,30,0x25483344
- 23: Jc30o $0x25483344
-
-
-. 0 2548353C 24
-. 80 EB 00 00 80 04 00 00 7F 87 00 00 80 6A 00 04 80 C9 00 04 40 9E FD F4
-
-==== BB 796 (0x25476608) approx BBs exec'd 0 ====
-
- 0x25476608: 2F030000 cmpi cr6,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x2547660C: 419A0084 bc 12,26,0x25476690
- 4: Js26o $0x25476690
-
-
-. 0 25476608 8
-. 2F 03 00 00 41 9A 00 84
-
-==== BB 797 (0x25476690) approx BBs exec'd 0 ====
-
- 0x25476690: 813B0010 lwz r9,16(r27)
- 0: GETL R27, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25476694: 8B5B0017 lbz r26,23(r27)
- 5: GETL R27, t4
- 6: ADDL $0x17, t4
- 7: LDB (t4), t6
- 8: PUTL t6, R26
- 9: INCEIPL $4
-
- 0x25476698: 8BBB001B lbz r29,27(r27)
- 10: GETL R27, t8
- 11: ADDL $0x1B, t8
- 12: LDB (t8), t10
- 13: PUTL t10, R29
- 14: INCEIPL $4
-
- 0x2547669C: 2F890000 cmpi cr7,r9,0
- 15: GETL R9, t12
- 16: CMP0L t12, t14 (-rSo)
- 17: ICRFL t14, $0x7, CR
- 18: INCEIPL $4
-
- 0x254766A0: 5755402E rlwinm r21,r26,8,0,23
- 19: GETL R26, t16
- 20: SHLL $0x8, t16
- 21: PUTL t16, R21
- 22: INCEIPL $4
-
- 0x254766A4: 8B1B001F lbz r24,31(r27)
- 23: GETL R27, t18
- 24: ADDL $0x1F, t18
- 25: LDB (t18), t20
- 26: PUTL t20, R24
- 27: INCEIPL $4
-
- 0x254766A8: 7F95EA14 add r28,r21,r29
- 28: GETL R21, t22
- 29: GETL R29, t24
- 30: ADDL t22, t24
- 31: PUTL t24, R28
- 32: INCEIPL $4
-
- 0x254766AC: 5796402E rlwinm r22,r28,8,0,23
- 33: GETL R28, t26
- 34: SHLL $0x8, t26
- 35: PUTL t26, R22
- 36: INCEIPL $4
-
- 0x254766B0: 7C16C214 add r0,r22,r24
- 37: GETL R22, t28
- 38: GETL R24, t30
- 39: ADDL t28, t30
- 40: PUTL t30, R0
- 41: INCEIPL $4
-
- 0x254766B4: 409E001C bc 4,30,0x254766D0
- 42: Jc30o $0x254766D0
-
-
-. 0 25476690 40
-. 81 3B 00 10 8B 5B 00 17 8B BB 00 1B 2F 89 00 00 57 55 40 2E 8B 1B 00 1F 7F 95 EA 14 57 96 40 2E 7C 16 C2 14 40 9E 00 1C
-
-==== BB 798 (0x254766B8) approx BBs exec'd 0 ====
-
- 0x254766B8: 807E04F4 lwz r3,1268(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4F4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x254766BC: 81230008 lwz r9,8(r3)
- 5: GETL R3, t4
- 6: ADDL $0x8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R9
- 9: INCEIPL $4
-
- 0x254766C0: 2C090000 cmpi cr0,r9,0
- 10: GETL R9, t8
- 11: CMP0L t8, t10 (-rSo)
- 12: ICRFL t10, $0x0, CR
- 13: INCEIPL $4
-
- 0x254766C4: 41A2FEAC bc 13,2,0x25476570
- 14: Js02o $0x25476570
-
-
-. 0 254766B8 16
-. 80 7E 04 F4 81 23 00 08 2C 09 00 00 41 A2 FE AC
-
-==== BB 799 (0x254766C8) approx BBs exec'd 0 ====
-
- 0x254766C8: 7C890040 cmpl cr1,r9,r0
- 0: GETL R9, t0
- 1: GETL R0, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x1, CR
- 4: INCEIPL $4
-
- 0x254766CC: 40A4FEA4 bc 5,4,0x25476570
- 5: Jc04o $0x25476570
-
-
-. 0 254766C8 8
-. 7C 89 00 40 40 A4 FE A4
-
-==== BB 800 (0x254773A4) approx BBs exec'd 0 ====
-
- 0x254773A4: 2E03FFFF cmpi cr4,r3,-1
- 0: GETL R3, t0
- 1: MOVL $0xFFFFFFFF, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x4, CR
- 4: INCEIPL $4
-
- 0x254773A8: 7C7A1B78 or r26,r3,r3
- 5: GETL R3, t6
- 6: PUTL t6, R26
- 7: INCEIPL $4
-
- 0x254773AC: 41B2FF2C bc 13,18,0x254772D8
- 8: Js18o $0x254772D8
-
-
-. 0 254773A4 12
-. 2E 03 FF FF 7C 7A 1B 78 41 B2 FF 2C
-
-==== BB 801 (0x254773B0) approx BBs exec'd 0 ====
-
- 0x254773B0: 7E439378 or r3,r18,r18
- 0: GETL R18, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x254773B4: 4800BC1D bl 0x25482FD0
- 3: MOVL $0x254773B8, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x25482FD0 ($4)
-
-
-. 0 254773B0 8
-. 7E 43 93 78 48 00 BC 1D
-
-==== BB 802 (0x254773B8) approx BBs exec'd 0 ====
-
- 0x254773B8: 3BA30001 addi r29,r3,1
- 0: GETL R3, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R29
- 3: INCEIPL $4
-
- 0x254773BC: 7FA3EB78 or r3,r29,r29
- 4: GETL R29, t2
- 5: PUTL t2, R3
- 6: INCEIPL $4
-
- 0x254773C0: 48020665 bl 0x25497A24
- 7: MOVL $0x254773C4, t4
- 8: PUTL t4, LR
- 9: JMPo-c $0x25497A24 ($4)
-
-
-. 0 254773B8 12
-. 3B A3 00 01 7F A3 EB 78 48 02 06 65
-
-==== BB 803 (0x254773C4) approx BBs exec'd 0 ====
-
- 0x254773C4: 38000000 li r0,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x254773C8: 2F030000 cmpi cr6,r3,0
- 3: GETL R3, t2
- 4: CMP0L t2, t4 (-rSo)
- 5: ICRFL t4, $0x6, CR
- 6: INCEIPL $4
-
- 0x254773CC: 419A0014 bc 12,26,0x254773E0
- 7: Js26o $0x254773E0
-
-
-. 0 254773C4 12
-. 38 00 00 00 2F 03 00 00 41 9A 00 14
-
-==== BB 804 (0x254773D0) approx BBs exec'd 0 ====
-
- 0x254773D0: 7E449378 or r4,r18,r18
- 0: GETL R18, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x254773D4: 7FA5EB78 or r5,r29,r29
- 3: GETL R29, t2
- 4: PUTL t2, R5
- 5: INCEIPL $4
-
- 0x254773D8: 4800C809 bl 0x25483BE0
- 6: MOVL $0x254773DC, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0x25483BE0 ($4)
-
-
-. 0 254773D0 12
-. 7E 44 93 78 7F A5 EB 78 48 00 C8 09
-
-==== BB 805 (0x25483C74) approx BBs exec'd 0 ====
-
- 0x25483C74: 88FD0000 lbz r7,0(r29)
- 0: GETL R29, t0
- 1: LDB (t0), t2
- 2: PUTL t2, R7
- 3: INCEIPL $4
-
- 0x25483C78: 3BBD0001 addi r29,r29,1
- 4: GETL R29, t4
- 5: ADDL $0x1, t4
- 6: PUTL t4, R29
- 7: INCEIPL $4
-
- 0x25483C7C: 98FF0000 stb r7,0(r31)
- 8: GETL R7, t6
- 9: GETL R31, t8
- 10: STB t6, (t8)
- 11: INCEIPL $4
-
- 0x25483C80: 3BFF0001 addi r31,r31,1
- 12: GETL R31, t10
- 13: ADDL $0x1, t10
- 14: PUTL t10, R31
- 15: INCEIPL $4
-
- 0x25483C84: 4200FFF0 bc 16,0,0x25483C74
- 16: GETL CTR, t12
- 17: ADDL $0xFFFFFFFF, t12
- 18: PUTL t12, CTR
- 19: JIFZL t12, $0x25483C88
- 20: JMPo $0x25483C74 ($4)
-
-
-. 0 25483C74 20
-. 88 FD 00 00 3B BD 00 01 98 FF 00 00 3B FF 00 01 42 00 FF F0
-
-==== BB 806 (0x254773DC) approx BBs exec'd 0 ====
-
- 0x254773DC: 7C601B78 or r0,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x254773E0: 2F800000 cmpi cr7,r0,0
- 3: GETL R0, t2
- 4: CMP0L t2, t4 (-rSo)
- 5: ICRFL t4, $0x7, CR
- 6: INCEIPL $4
-
- 0x254773E4: 90010228 stw r0,552(r1)
- 7: GETL R0, t6
- 8: GETL R1, t8
- 9: ADDL $0x228, t8
- 10: STL t6, (t8)
- 11: INCEIPL $4
-
- 0x254773E8: 409EFEEC bc 4,30,0x254772D4
- 12: Jc30o $0x254772D4
-
-
-. 0 254773DC 16
-. 7C 60 1B 78 2F 80 00 00 90 01 02 28 40 9E FE EC
-
-==== BB 807 (0x254772D4) approx BBs exec'd 0 ====
-
- 0x254772D4: 40920050 bc 4,18,0x25477324
- 0: Jc18o $0x25477324
-
-
-. 0 254772D4 4
-. 40 92 00 50
-
-==== BB 808 (0x25477324) approx BBs exec'd 0 ====
-
- 0x25477324: 82F40000 lwz r23,0(r20)
- 0: GETL R20, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R23
- 3: INCEIPL $4
-
- 0x25477328: 72E90001 andi. r9,r23,0x1
- 4: GETL R23, t4
- 5: ANDL $0x1, t4
- 6: PUTL t4, R9
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x0, CR
- 9: INCEIPL $4
-
- 0x2547732C: 4182FAD8 bc 12,2,0x25476E04
- 10: Js02o $0x25476E04
-
-
-. 0 25477324 12
-. 82 F4 00 00 72 E9 00 01 41 82 FA D8
-
-==== BB 809 (0x254758A8) approx BBs exec'd 0 ====
-
- 0x254758A8: 54EF2834 rlwinm r15,r7,5,0,26
- 0: GETL R7, t0
- 1: SHLL $0x5, t0
- 2: PUTL t0, R15
- 3: INCEIPL $4
-
- 0x254758AC: 801D0008 lwz r0,8(r29)
- 4: GETL R29, t2
- 5: ADDL $0x8, t2
- 6: LDL (t2), t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x254758B0: 7DCFDA14 add r14,r15,r27
- 9: GETL R15, t6
- 10: GETL R27, t8
- 11: ADDL t6, t8
- 12: PUTL t8, R14
- 13: INCEIPL $4
-
- 0x254758B4: 3BBD0020 addi r29,r29,32
- 14: GETL R29, t10
- 15: ADDL $0x20, t10
- 16: PUTL t10, R29
- 17: INCEIPL $4
-
- 0x254758B8: 7C8EE840 cmpl cr1,r14,r29
- 18: GETL R14, t12
- 19: GETL R29, t14
- 20: CMPUL t12, t14, t16 (-rSo)
- 21: ICRFL t16, $0x1, CR
- 22: INCEIPL $4
-
- 0x254758BC: 901A014C stw r0,332(r26)
- 23: GETL R0, t18
- 24: GETL R26, t20
- 25: ADDL $0x14C, t20
- 26: STL t18, (t20)
- 27: INCEIPL $4
-
- 0x254758C0: 4185FF4C bc 12,5,0x2547580C
- 28: Js05o $0x2547580C
-
-
-. 0 254758A8 28
-. 54 EF 28 34 80 1D 00 08 7D CF DA 14 3B BD 00 20 7C 8E E8 40 90 1A 01 4C 41 85 FF 4C
-
-==== BB 810 (0x25475830) approx BBs exec'd 0 ====
-
- 0x25475830: 7F090040 cmpl cr6,r9,r0
- 0: GETL R9, t0
- 1: GETL R0, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x6, CR
- 4: INCEIPL $4
-
- 0x25475834: 4199024C bc 12,25,0x25475A80
- 5: Js25o $0x25475A80
-
-
-. 0 25475830 8
-. 7F 09 00 40 41 99 02 4C
-
-==== BB 811 (0x25475838) approx BBs exec'd 0 ====
-
- 0x25475838: 2C090007 cmpi cr0,r9,7
- 0: GETL R9, t0
- 1: MOVL $0x7, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x2547583C: 4082FFBC bc 4,2,0x254757F8
- 5: Jc02o $0x254757F8
-
-
-. 0 25475838 8
-. 2C 09 00 07 40 82 FF BC
-
-==== BB 812 (0x25475840) approx BBs exec'd 0 ====
-
- 0x25475840: 801D0014 lwz r0,20(r29)
- 0: GETL R29, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25475844: 2F000000 cmpi cr6,r0,0
- 5: GETL R0, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x25475848: 41BAFFB0 bc 13,26,0x254757F8
- 9: Js26o $0x254757F8
-
-
-. 0 25475840 12
-. 80 1D 00 14 2F 00 00 00 41 BA FF B0
-
-==== BB 813 (0x2547584C) approx BBs exec'd 0 ====
-
- 0x2547584C: 901A0220 stw r0,544(r26)
- 0: GETL R0, t0
- 1: GETL R26, t2
- 2: ADDL $0x220, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25475850: 817D001C lwz r11,28(r29)
- 5: GETL R29, t4
- 6: ADDL $0x1C, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R11
- 9: INCEIPL $4
-
- 0x25475854: 917A0224 stw r11,548(r26)
- 10: GETL R11, t8
- 11: GETL R26, t10
- 12: ADDL $0x224, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25475858: 813D001C lwz r9,28(r29)
- 15: GETL R29, t12
- 16: ADDL $0x1C, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x2547585C: 2F890000 cmpi cr7,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x7, CR
- 23: INCEIPL $4
-
- 0x25475860: 419E07EC bc 12,30,0x2547604C
- 24: Js30o $0x2547604C
-
-
-. 0 2547584C 24
-. 90 1A 02 20 81 7D 00 1C 91 7A 02 24 81 3D 00 1C 2F 89 00 00 41 9E 07 EC
-
-==== BB 814 (0x25475864) approx BBs exec'd 0 ====
-
- 0x25475864: 80BD0008 lwz r5,8(r29)
- 0: GETL R29, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25475868: 3929FFFF addi r9,r9,-1
- 5: GETL R9, t4
- 6: ADDL $0xFFFFFFFF, t4
- 7: PUTL t4, R9
- 8: INCEIPL $4
-
- 0x2547586C: 7CA04838 and r0,r5,r9
- 9: GETL R5, t6
- 10: GETL R9, t8
- 11: ANDL t6, t8
- 12: PUTL t8, R0
- 13: INCEIPL $4
-
- 0x25475870: 901A0228 stw r0,552(r26)
- 14: GETL R0, t10
- 15: GETL R26, t12
- 16: ADDL $0x228, t12
- 17: STL t10, (t12)
- 18: INCEIPL $4
-
- 0x25475874: 81DA0180 lwz r14,384(r26)
- 19: GETL R26, t14
- 20: ADDL $0x180, t14
- 21: LDL (t14), t16
- 22: PUTL t16, R14
- 23: INCEIPL $4
-
- 0x25475878: 3CC04000 lis r6,16384
- 24: MOVL $0x40000000, t18
- 25: PUTL t18, R6
- 26: INCEIPL $4
-
- 0x2547587C: 815D0010 lwz r10,16(r29)
- 27: GETL R29, t20
- 28: ADDL $0x10, t20
- 29: LDL (t20), t22
- 30: PUTL t22, R10
- 31: INCEIPL $4
-
- 0x25475880: 55C80002 rlwinm r8,r14,0,0,1
- 32: GETL R14, t24
- 33: ANDL $0xC0000000, t24
- 34: PUTL t24, R8
- 35: INCEIPL $4
-
- 0x25475884: 7C083000 cmp cr0,r8,r6
- 36: GETL R8, t26
- 37: GETL R6, t28
- 38: CMPL t26, t28, t30 (-rSo)
- 39: ICRFL t30, $0x0, CR
- 40: INCEIPL $4
-
- 0x25475888: 915A021C stw r10,540(r26)
- 41: GETL R10, t32
- 42: GETL R26, t34
- 43: ADDL $0x21C, t34
- 44: STL t32, (t34)
- 45: INCEIPL $4
-
- 0x2547588C: 809D0008 lwz r4,8(r29)
- 46: GETL R29, t36
- 47: ADDL $0x8, t36
- 48: LDL (t36), t38
- 49: PUTL t38, R4
- 50: INCEIPL $4
-
- 0x25475890: 909A0218 stw r4,536(r26)
- 51: GETL R4, t40
- 52: GETL R26, t42
- 53: ADDL $0x218, t42
- 54: STL t40, (t42)
- 55: INCEIPL $4
-
- 0x25475894: 40820A24 bc 4,2,0x254762B8
- 56: Jc02o $0x254762B8
-
-
-. 0 25475864 52
-. 80 BD 00 08 39 29 FF FF 7C A0 48 38 90 1A 02 28 81 DA 01 80 3C C0 40 00 81 5D 00 10 55 C8 00 02 7C 08 30 00 91 5A 02 1C 80 9D 00 08 90 9A 02 18 40 82 0A 24
-
-==== BB 815 (0x25475898) approx BBs exec'd 0 ====
-
- 0x25475898: 4800837D bl 0x2547DC14
- 0: MOVL $0x2547589C, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x2547DC14 ($4)
-
-
-. 0 25475898 4
-. 48 00 83 7D
-
-==== BB 816 _dl_next_tls_modid(0x2547DC14) approx BBs exec'd 0 ====
-
- 0x2547DC14: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547DC18: 7D8802A6 mflr r12
- 6: GETL LR, t4
- 7: PUTL t4, R12
- 8: INCEIPL $4
-
- 0x2547DC1C: 480193E5 bl 0x25497000
- 9: MOVL $0x2547DC20, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547DC14 12
-. 94 21 FF F0 7D 88 02 A6 48 01 93 E5
-
-==== BB 817 (0x2547DC20) approx BBs exec'd 0 ====
-
- 0x2547DC20: 93C10008 stw r30,8(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547DC24: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x2547DC28: 7D8803A6 mtlr r12
- 8: GETL R12, t6
- 9: PUTL t6, LR
- 10: INCEIPL $4
-
- 0x2547DC2C: 80DE04C8 lwz r6,1224(r30)
- 11: GETL R30, t8
- 12: ADDL $0x4C8, t8
- 13: LDL (t8), t10
- 14: PUTL t10, R6
- 15: INCEIPL $4
-
- 0x2547DC30: 8806040C lbz r0,1036(r6)
- 16: GETL R6, t12
- 17: ADDL $0x40C, t12
- 18: LDB (t12), t14
- 19: PUTL t14, R0
- 20: INCEIPL $4
-
- 0x2547DC34: 2F800000 cmpi cr7,r0,0
- 21: GETL R0, t16
- 22: CMP0L t16, t18 (-rSo)
- 23: ICRFL t18, $0x7, CR
- 24: INCEIPL $4
-
- 0x2547DC38: 409E0020 bc 4,30,0x2547DC58
- 25: Jc30o $0x2547DC58
-
-
-. 0 2547DC20 28
-. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 80 DE 04 C8 88 06 04 0C 2F 80 00 00 40 9E 00 20
-
-==== BB 818 (0x2547DC3C) approx BBs exec'd 0 ====
-
- 0x2547DC3C: 81460408 lwz r10,1032(r6)
- 0: GETL R6, t0
- 1: ADDL $0x408, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x2547DC40: 390A0001 addi r8,r10,1
- 5: GETL R10, t4
- 6: ADDL $0x1, t4
- 7: PUTL t4, R8
- 8: INCEIPL $4
-
- 0x2547DC44: 91060408 stw r8,1032(r6)
- 9: GETL R8, t6
- 10: GETL R6, t8
- 11: ADDL $0x408, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547DC48: 7D034378 or r3,r8,r8
- 14: GETL R8, t10
- 15: PUTL t10, R3
- 16: INCEIPL $4
-
- 0x2547DC4C: 83C10008 lwz r30,8(r1)
- 17: GETL R1, t12
- 18: ADDL $0x8, t12
- 19: LDL (t12), t14
- 20: PUTL t14, R30
- 21: INCEIPL $4
-
- 0x2547DC50: 38210010 addi r1,r1,16
- 22: GETL R1, t16
- 23: ADDL $0x10, t16
- 24: PUTL t16, R1
- 25: INCEIPL $4
-
- 0x2547DC54: 4E800020 blr
- 26: GETL LR, t18
- 27: JMPo-r t18 ($4)
-
-
-. 0 2547DC3C 28
-. 81 46 04 08 39 0A 00 01 91 06 04 08 7D 03 43 78 83 C1 00 08 38 21 00 10 4E 80 00 20
-
-==== BB 819 (0x2547589C) approx BBs exec'd 0 ====
-
- 0x2547589C: A0FA0154 lhz r7,340(r26)
- 0: GETL R26, t0
- 1: ADDL $0x154, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x254758A0: 907A0230 stw r3,560(r26)
- 5: GETL R3, t4
- 6: GETL R26, t6
- 7: ADDL $0x230, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x254758A4: 4BFFFF54 b 0x254757F8
- 10: JMPo $0x254757F8 ($4)
-
-
-. 0 2547589C 12
-. A0 FA 01 54 90 7A 02 30 4B FF FF 54
-
-==== BB 820 (0x25475A80) approx BBs exec'd 0 ====
-
- 0x25475A80: 3D406474 lis r10,25716
- 0: MOVL $0x64740000, t0
- 1: PUTL t0, R10
- 2: INCEIPL $4
-
- 0x25475A84: 614FE552 ori r15,r10,0xE552
- 3: MOVL $0x6474E552, t2
- 4: PUTL t2, R15
- 5: INCEIPL $4
-
- 0x25475A88: 7F897800 cmp cr7,r9,r15
- 6: GETL R9, t4
- 7: GETL R15, t6
- 8: CMPL t4, t6, t8 (-rSo)
- 9: ICRFL t8, $0x7, CR
- 10: INCEIPL $4
-
- 0x25475A8C: 409EFD6C bc 4,30,0x254757F8
- 11: Jc30o $0x254757F8
-
-
-. 0 25475A80 16
-. 3D 40 64 74 61 4F E5 52 7F 89 78 00 40 9E FD 6C
-
-==== BB 821 (0x25475A90) approx BBs exec'd 0 ====
-
- 0x25475A90: 811D0008 lwz r8,8(r29)
- 0: GETL R29, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x25475A94: 911A0234 stw r8,564(r26)
- 5: GETL R8, t4
- 6: GETL R26, t6
- 7: ADDL $0x234, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x25475A98: 80DD0014 lwz r6,20(r29)
- 10: GETL R29, t8
- 11: ADDL $0x14, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R6
- 14: INCEIPL $4
-
- 0x25475A9C: 90DA0238 stw r6,568(r26)
- 15: GETL R6, t12
- 16: GETL R26, t14
- 17: ADDL $0x238, t14
- 18: STL t12, (t14)
- 19: INCEIPL $4
-
- 0x25475AA0: 4BFFFD58 b 0x254757F8
- 20: JMPo $0x254757F8 ($4)
-
-
-. 0 25475A90 20
-. 81 1D 00 08 91 1A 02 34 80 DD 00 14 90 DA 02 38 4B FF FD 58
-
-==9225== Reading syms from /lib/tls/libc-2.3.4.so (0xFE80000)
-==9225== object doesn't have any debug info
-==== BB 822 (0x254759E0) approx BBs exec'd 0 ====
-
- 0x254759E0: 7C9CC840 cmpl cr1,r28,r25
- 0: GETL R28, t0
- 1: GETL R25, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x1, CR
- 4: INCEIPL $4
-
- 0x254759E4: 4085002C bc 4,5,0x25475A10
- 5: Jc05o $0x25475A10
-
-
-. 0 254759E0 8
-. 7C 9C C8 40 40 85 00 2C
-
-==== BB 823 (0x254837B0) approx BBs exec'd 0 ====
-
- 0x254837B0: 9088FFFC stw r4,-4(r8)
- 0: GETL R4, t0
- 1: GETL R8, t2
- 2: ADDL $0xFFFFFFFC, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x254837B4: 9488FFF8 stwu r4,-8(r8)
- 5: GETL R4, t4
- 6: GETL R8, t6
- 7: ADDL $0xFFFFFFF8, t6
- 8: PUTL t6, R8
- 9: STL t4, (t6)
- 10: INCEIPL $4
-
- 0x254837B8: 41840014 bc 12,4,0x254837CC
- 11: Js04o $0x254837CC
-
-
-. 0 254837B0 12
-. 90 88 FF FC 94 88 FF F8 41 84 00 14
-
-==== BB 824 (0x254837D4) approx BBs exec'd 0 ====
-
- 0x254837D4: 28840000 cmpli cr1,r4,0
- 0: GETL R4, t0
- 1: MOVL $0x0, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0x254837D8: 54A70035 rlwinm. r7,r5,0,0,26
- 5: GETL R5, t6
- 6: ANDL $0xFFFFFFE0, t6
- 7: PUTL t6, R7
- 8: CMP0L t6, t8 (-rSo)
- 9: ICRFL t8, $0x0, CR
- 10: INCEIPL $4
-
- 0x254837DC: 7CA01120 mtcrf 0x1,r5
- 11: GETL R5, t10
- 12: ICRFL t10, $0x7, CR
- 13: INCEIPL $4
-
- 0x254837E0: 418601A0 bc 12,6,0x25483980
- 14: Js06o $0x25483980
-
-
-. 0 254837D4 16
-. 28 84 00 00 54 A7 00 35 7C A0 11 20 41 86 01 A0
-
-==== BB 825 (0x25483884) approx BBs exec'd 0 ====
-
- 0x25483884: 7C0037EC dcbz r0,r6
- 0: GETL R6, t0
- 1: ANDL $0xFFFFFFE0, t0
- 2: MOVL $0x0, t2
- 3: STL t2, (t0)
- 4: ADDL $0x4, t0
- 5: STL t2, (t0)
- 6: ADDL $0x4, t0
- 7: STL t2, (t0)
- 8: ADDL $0x4, t0
- 9: STL t2, (t0)
- 10: ADDL $0x4, t0
- 11: STL t2, (t0)
- 12: ADDL $0x4, t0
- 13: STL t2, (t0)
- 14: ADDL $0x4, t0
- 15: STL t2, (t0)
- 16: ADDL $0x4, t0
- 17: STL t2, (t0)
- 18: INCEIPL $4
-
- 0x25483888: 38C60020 addi r6,r6,32
- 19: GETL R6, t4
- 20: ADDL $0x20, t4
- 21: PUTL t4, R6
- 22: INCEIPL $4
-
- 0x2548388C: 3920FFE0 li r9,-32
- 23: MOVL $0xFFFFFFE0, t6
- 24: PUTL t6, R9
- 25: INCEIPL $4
-
- 0x25483890: 40990010 bc 4,25,0x254838A0
- 26: Jc25o $0x254838A0
-
-
-. 0 25483884 16
-. 7C 00 37 EC 38 C6 00 20 39 20 FF E0 40 99 00 10
-
-==== BB 826 (0x254760C0) approx BBs exec'd 0 ====
-
- 0x254760C0: 80BD0014 lwz r5,20(r29)
- 0: GETL R29, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x254760C4: 7F83E378 or r3,r28,r28
- 5: GETL R28, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x254760C8: 7C9CB850 subf r4,r28,r23
- 8: GETL R28, t6
- 9: GETL R23, t8
- 10: SUBL t6, t8
- 11: PUTL t8, R4
- 12: INCEIPL $4
-
- 0x254760CC: 38C00032 li r6,50
- 13: MOVL $0x32, t10
- 14: PUTL t10, R6
- 15: INCEIPL $4
-
- 0x254760D0: 38E0FFFF li r7,-1
- 16: MOVL $0xFFFFFFFF, t12
- 17: PUTL t12, R7
- 18: INCEIPL $4
-
- 0x254760D4: 39000000 li r8,0
- 19: MOVL $0x0, t14
- 20: PUTL t14, R8
- 21: INCEIPL $4
-
- 0x254760D8: 4800C6C1 bl 0x25482798
- 22: MOVL $0x254760DC, t16
- 23: PUTL t16, LR
- 24: JMPo-c $0x25482798 ($4)
-
-
-. 0 254760C0 28
-. 80 BD 00 14 7F 83 E3 78 7C 9C B8 50 38 C0 00 32 38 E0 FF FF 39 00 00 00 48 00 C6 C1
-
-==== BB 827 (0x254760DC) approx BBs exec'd 0 ====
-
- 0x254760DC: 2C83FFFF cmpi cr1,r3,-1
- 0: GETL R3, t0
- 1: MOVL $0xFFFFFFFF, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0x254760E0: 4086F938 bc 4,6,0x25475A18
- 5: Jc06o $0x25475A18
-
-
-. 0 254760DC 8
-. 2C 83 FF FF 40 86 F9 38
-
-==== BB 828 (0x25476054) approx BBs exec'd 0 ====
-
- 0x25476054: 556C083C rlwinm r12,r11,1,0,30
- 0: GETL R11, t0
- 1: SHLL $0x1, t0
- 2: PUTL t0, R12
- 3: INCEIPL $4
-
- 0x25476058: 7D800E70 srawi r0,r12,1
- 4: GETL R12, t2
- 5: SARL $0x1, t2 (-wCa)
- 6: PUTL t2, R0
- 7: INCEIPL $4
-
- 0x2547605C: 7C1700F8 nor r23,r0,r0
- 8: GETL R0, t4
- 9: NOTL t4
- 10: PUTL t4, R23
- 11: INCEIPL $4
-
- 0x25476060: 20000031 subfic r0,r0,49
- 12: GETL R0, t6
- 13: MOVL $0x31, t8
- 14: SBBL t6, t8 (-wCa)
- 15: PUTL t8, R0
- 16: INCEIPL $4
-
- 0x25476064: 2B170002 cmpli cr6,r23,2
- 17: GETL R23, t10
- 18: MOVL $0x2, t14
- 19: CMPUL t10, t14, t12 (-rSo)
- 20: ICRFL t12, $0x6, CR
- 21: INCEIPL $4
-
- 0x25476068: 40B9FC38 bc 5,25,0x25475CA0
- 22: Jc25o $0x25475CA0
-
-
-. 0 25476054 24
-. 55 6C 08 3C 7D 80 0E 70 7C 17 00 F8 20 00 00 31 2B 17 00 02 40 B9 FC 38
-
-==== BB 829 (0x2547606C) approx BBs exec'd 0 ====
-
- 0x2547606C: 7F2B2850 subf r25,r11,r5
- 0: GETL R11, t0
- 1: GETL R5, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R25
- 4: INCEIPL $4
-
- 0x25476070: 2A19000B cmpli cr4,r25,11
- 5: GETL R25, t4
- 6: MOVL $0xB, t8
- 7: CMPUL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x4, CR
- 9: INCEIPL $4
-
- 0x25476074: 419100C4 bc 12,17,0x25476138
- 10: Js17o $0x25476138
-
-
-. 0 2547606C 12
-. 7F 2B 28 50 2A 19 00 0B 41 91 00 C4
-
-==== BB 830 (0x25476078) approx BBs exec'd 0 ====
-
- 0x25476078: 7C0B2050 subf r0,r11,r4
- 0: GETL R11, t0
- 1: GETL R4, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x2547607C: 5400103A rlwinm r0,r0,2,0,29
- 5: GETL R0, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x25476080: 4BFFFC24 b 0x25475CA4
- 9: JMPo $0x25475CA4 ($4)
-
-
-. 0 25476078 12
-. 7C 0B 20 50 54 00 10 3A 4B FF FC 24
-
-==== BB 831 (0x25475D68) approx BBs exec'd 0 ====
-
- 0x25475D68: 81280078 lwz r9,120(r8)
- 0: GETL R8, t0
- 1: ADDL $0x78, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25475D6C: 2C090000 cmpi cr0,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x25475D70: 41820030 bc 12,2,0x25475DA0
- 9: Js02o $0x25475DA0
-
-
-. 0 25475D68 12
-. 81 28 00 78 2C 09 00 00 41 82 00 30
-
-==== BB 832 (0x25475D74) approx BBs exec'd 0 ====
-
- 0x25475D74: 80090004 lwz r0,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25475D78: 700A0002 andi. r10,r0,0x2
- 5: GETL R0, t4
- 6: ANDL $0x2, t4
- 7: PUTL t4, R10
- 8: CMP0L t4, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x25475D7C: 901A0200 stw r0,512(r26)
- 11: GETL R0, t8
- 12: GETL R26, t10
- 13: ADDL $0x200, t10
- 14: STL t8, (t10)
- 15: INCEIPL $4
-
- 0x25475D80: 41820008 bc 12,2,0x25475D88
- 16: Js02o $0x25475D88
-
-
-. 0 25475D74 16
-. 80 09 00 04 70 0A 00 02 90 1A 02 00 41 82 00 08
-
-==== BB 833 (0x25475D88) approx BBs exec'd 0 ====
-
- 0x25475D88: 700B0004 andi. r11,r0,0x4
- 0: GETL R0, t0
- 1: ANDL $0x4, t0
- 2: PUTL t0, R11
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x25475D8C: 41820008 bc 12,2,0x25475D94
- 6: Js02o $0x25475D94
-
-
-. 0 25475D88 8
-. 70 0B 00 04 41 82 00 08
-
-==== BB 834 (0x25475D94) approx BBs exec'd 0 ====
-
- 0x25475D94: 700A0008 andi. r10,r0,0x8
- 0: GETL R0, t0
- 1: ANDL $0x8, t0
- 2: PUTL t0, R10
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x25475D98: 41820008 bc 12,2,0x25475DA0
- 6: Js02o $0x25475DA0
-
-
-. 0 25475D94 8
-. 70 0A 00 08 41 82 00 08
-
-==== BB 835 (0x25475D9C) approx BBs exec'd 0 ====
-
- 0x25475D9C: 91280060 stw r9,96(r8)
- 0: GETL R9, t0
- 1: GETL R8, t2
- 2: ADDL $0x60, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25475DA0: 81280098 lwz r9,152(r8)
- 5: GETL R8, t4
- 6: ADDL $0x98, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R9
- 9: INCEIPL $4
-
- 0x25475DA4: 2F890000 cmpi cr7,r9,0
- 10: GETL R9, t8
- 11: CMP0L t8, t10 (-rSo)
- 12: ICRFL t10, $0x7, CR
- 13: INCEIPL $4
-
- 0x25475DA8: 419E0354 bc 12,30,0x254760FC
- 14: Js30o $0x254760FC
-
-
-. 0 25475D9C 16
-. 91 28 00 60 81 28 00 98 2F 89 00 00 41 9E 03 54
-
-==== BB 836 (0x25475DBC) approx BBs exec'd 0 ====
-
- 0x25475DBC: 91280060 stw r9,96(r8)
- 0: GETL R9, t0
- 1: GETL R8, t2
- 2: ADDL $0x60, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25475DC0: 81280074 lwz r9,116(r8)
- 5: GETL R8, t4
- 6: ADDL $0x74, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R9
- 9: INCEIPL $4
-
- 0x25475DC4: 2C890000 cmpi cr1,r9,0
- 10: GETL R9, t8
- 11: CMP0L t8, t10 (-rSo)
- 12: ICRFL t10, $0x1, CR
- 13: INCEIPL $4
-
- 0x25475DC8: 418600E0 bc 12,6,0x25475EA8
- 14: Js06o $0x25475EA8
-
-
-. 0 25475DBC 16
-. 91 28 00 60 81 28 00 74 2C 89 00 00 41 86 00 E0
-
-==== BB 837 (0x25475EEC) approx BBs exec'd 0 ====
-
- 0x25475EEC: 80DA0000 lwz r6,0(r26)
- 0: GETL R26, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R6
- 3: INCEIPL $4
-
- 0x25475EF0: 7D493214 add r10,r9,r6
- 4: GETL R9, t4
- 5: GETL R6, t6
- 6: ADDL t4, t6
- 7: PUTL t6, R10
- 8: INCEIPL $4
-
- 0x25475EF4: 915A0218 stw r10,536(r26)
- 9: GETL R10, t8
- 10: GETL R26, t10
- 11: ADDL $0x218, t10
- 12: STL t8, (t10)
- 13: INCEIPL $4
-
- 0x25475EF8: 7E639B78 or r3,r19,r19
- 14: GETL R19, t12
- 15: PUTL t12, R3
- 16: INCEIPL $4
-
- 0x25475EFC: 4800C0F5 bl 0x25481FF0
- 17: MOVL $0x25475F00, t14
- 18: PUTL t14, LR
- 19: JMPo-c $0x25481FF0 ($4)
-
-
-. 0 25475EEC 20
-. 80 DA 00 00 7D 49 32 14 91 5A 02 18 7E 63 9B 78 48 00 C0 F5
-
-==== BB 838 (0x25475F88) approx BBs exec'd 0 ====
-
- 0x25475F88: 80910050 lwz r4,80(r17)
- 0: GETL R17, t0
- 1: ADDL $0x50, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x25475F8C: C81F0028 lfd f0,40(r31)
- 5: GETL R31, t4
- 6: ADDL $0x28, t4
- 7: FPU_RQ (t4), 0x0:0x0
- 8: INCEIPL $4
-
- 0x25475F90: 2C840000 cmpi cr1,r4,0
- 9: GETL R4, t6
- 10: CMP0L t6, t8 (-rSo)
- 11: ICRFL t8, $0x1, CR
- 12: INCEIPL $4
-
- 0x25475F94: D81A01D0 stfd f0,464(r26)
- 13: GETL R26, t10
- 14: ADDL $0x1D0, t10
- 15: FPU_WQ 0x0:0x0, (t10)
- 16: INCEIPL $4
-
- 0x25475F98: C9BF0030 lfd f13,48(r31)
- 17: GETL R31, t12
- 18: ADDL $0x30, t12
- 19: FPU_RQ (t12), 0x0:0xD
- 20: INCEIPL $4
-
- 0x25475F9C: D9BA01D8 stfd f13,472(r26)
- 21: GETL R26, t14
- 22: ADDL $0x1D8, t14
- 23: FPU_WQ 0x0:0xD, (t14)
- 24: INCEIPL $4
-
- 0x25475FA0: 4186FEB0 bc 12,6,0x25475E50
- 25: Js06o $0x25475E50
-
-
-. 0 25475F88 28
-. 80 91 00 50 C8 1F 00 28 2C 84 00 00 D8 1A 01 D0 C9 BF 00 30 D9 BA 01 D8 41 86 FE B0
-
-==== BB 839 (0x2547A100) approx BBs exec'd 0 ====
-
- 0x2547A100: 907F0014 stw r3,20(r31)
- 0: GETL R3, t0
- 1: GETL R31, t2
- 2: ADDL $0x14, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547A104: 80610014 lwz r3,20(r1)
- 5: GETL R1, t4
- 6: ADDL $0x14, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x2547A108: 83E10008 lwz r31,8(r1)
- 10: GETL R1, t8
- 11: ADDL $0x8, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R31
- 14: INCEIPL $4
-
- 0x2547A10C: 38210010 addi r1,r1,16
- 15: GETL R1, t12
- 16: ADDL $0x10, t12
- 17: PUTL t12, R1
- 18: INCEIPL $4
-
- 0x2547A110: 7C6803A6 mtlr r3
- 19: GETL R3, t14
- 20: PUTL t14, LR
- 21: INCEIPL $4
-
- 0x2547A114: 4E800020 blr
- 22: GETL LR, t16
- 23: JMPo-r t16 ($4)
-
-
-. 0 2547A100 24
-. 90 7F 00 14 80 61 00 14 83 E1 00 08 38 21 00 10 7C 68 03 A6 4E 80 00 20
-
-==== BB 840 (0x2547B624) approx BBs exec'd 0 ====
-
- 0x2547B624: 38600000 li r3,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547B628: 81610008 lwz r11,8(r1)
- 3: GETL R1, t2
- 4: ADDL $0x8, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R11
- 7: INCEIPL $4
-
- 0x2547B62C: 80C10280 lwz r6,640(r1)
- 8: GETL R1, t6
- 9: ADDL $0x280, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R6
- 12: INCEIPL $4
-
- 0x2547B630: 80A10270 lwz r5,624(r1)
- 13: GETL R1, t10
- 14: ADDL $0x270, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R5
- 17: INCEIPL $4
-
- 0x2547B634: 80810274 lwz r4,628(r1)
- 18: GETL R1, t14
- 19: ADDL $0x274, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R4
- 22: INCEIPL $4
-
- 0x2547B638: 93E50000 stw r31,0(r5)
- 23: GETL R31, t18
- 24: GETL R5, t20
- 25: STL t18, (t20)
- 26: INCEIPL $4
-
- 0x2547B63C: 91660000 stw r11,0(r6)
- 27: GETL R11, t22
- 28: GETL R6, t24
- 29: STL t22, (t24)
- 30: INCEIPL $4
-
- 0x2547B640: 93E40000 stw r31,0(r4)
- 31: GETL R31, t26
- 32: GETL R4, t28
- 33: STL t26, (t28)
- 34: INCEIPL $4
-
- 0x2547B644: 814102A4 lwz r10,676(r1)
- 35: GETL R1, t30
- 36: ADDL $0x2A4, t30
- 37: LDL (t30), t32
- 38: PUTL t32, R10
- 39: INCEIPL $4
-
- 0x2547B648: 83C10298 lwz r30,664(r1)
- 40: GETL R1, t34
- 41: ADDL $0x298, t34
- 42: LDL (t34), t36
- 43: PUTL t36, R30
- 44: INCEIPL $4
-
- 0x2547B64C: 83E1029C lwz r31,668(r1)
- 45: GETL R1, t38
- 46: ADDL $0x29C, t38
- 47: LDL (t38), t40
- 48: PUTL t40, R31
- 49: INCEIPL $4
-
- 0x2547B650: 7D4803A6 mtlr r10
- 50: GETL R10, t42
- 51: PUTL t42, LR
- 52: INCEIPL $4
-
- 0x2547B654: 382102A0 addi r1,r1,672
- 53: GETL R1, t44
- 54: ADDL $0x2A0, t44
- 55: PUTL t44, R1
- 56: INCEIPL $4
-
- 0x2547B658: 4E800020 blr
- 57: GETL LR, t46
- 58: JMPo-r t46 ($4)
-
-
-. 0 2547B624 56
-. 38 60 00 00 81 61 00 08 80 C1 02 80 80 A1 02 70 80 81 02 74 93 E5 00 00 91 66 00 00 93 E4 00 00 81 41 02 A4 83 C1 02 98 83 E1 02 9C 7D 48 03 A6 38 21 02 A0 4E 80 00 20
-
-==== BB 841 (0x2547A400) approx BBs exec'd 0 ====
-
- 0x2547A400: 833F0034 lwz r25,52(r31)
- 0: GETL R31, t0
- 1: ADDL $0x34, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R25
- 4: INCEIPL $4
-
- 0x2547A404: 2F190000 cmpi cr6,r25,0
- 5: GETL R25, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x2547A408: 409A01AC bc 4,26,0x2547A5B4
- 9: Jc26o $0x2547A5B4
-
-
-. 0 2547A400 12
-. 83 3F 00 34 2F 19 00 00 40 9A 01 AC
-
-==== BB 842 (0x2547A40C) approx BBs exec'd 0 ====
-
- 0x2547A40C: 815F0024 lwz r10,36(r31)
- 0: GETL R31, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x2547A410: 808A0180 lwz r4,384(r10)
- 5: GETL R10, t4
- 6: ADDL $0x180, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R4
- 9: INCEIPL $4
-
- 0x2547A414: 54893FBE rlwinm r9,r4,7,30,31
- 10: GETL R4, t8
- 11: ROLL $0x7, t8
- 12: ANDL $0x3, t8
- 13: PUTL t8, R9
- 14: INCEIPL $4
-
- 0x2547A418: 2F890000 cmpi cr7,r9,0
- 15: GETL R9, t10
- 16: CMP0L t10, t12 (-rSo)
- 17: ICRFL t12, $0x7, CR
- 18: INCEIPL $4
-
- 0x2547A41C: 409E0044 bc 4,30,0x2547A460
- 19: Jc30o $0x2547A460
-
-
-. 0 2547A40C 20
-. 81 5F 00 24 80 8A 01 80 54 89 3F BE 2F 89 00 00 40 9E 00 44
-
-==== BB 843 (0x2547A420) approx BBs exec'd 0 ====
-
- 0x2547A420: 80010000 lwz r0,0(r1)
- 0: GETL R1, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x2547A424: 38C00001 li r6,1
- 4: MOVL $0x1, t4
- 5: PUTL t4, R6
- 6: INCEIPL $4
-
- 0x2547A428: 80FF000C lwz r7,12(r31)
- 7: GETL R31, t6
- 8: ADDL $0xC, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R7
- 11: INCEIPL $4
-
- 0x2547A42C: 9401FFE0 stwu r0,-32(r1)
- 12: GETL R0, t10
- 13: GETL R1, t12
- 14: ADDL $0xFFFFFFE0, t12
- 15: PUTL t12, R1
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x2547A430: 3A810017 addi r20,r1,23
- 18: GETL R1, t14
- 19: ADDL $0x17, t14
- 20: PUTL t14, R20
- 21: INCEIPL $4
-
- 0x2547A434: 56850036 rlwinm r5,r20,0,0,27
- 22: GETL R20, t16
- 23: ANDL $0xFFFFFFF0, t16
- 24: PUTL t16, R5
- 25: INCEIPL $4
-
- 0x2547A438: 91250008 stw r9,8(r5)
- 26: GETL R9, t18
- 27: GETL R5, t20
- 28: ADDL $0x8, t20
- 29: STL t18, (t20)
- 30: INCEIPL $4
-
- 0x2547A43C: 91250000 stw r9,0(r5)
- 31: GETL R9, t22
- 32: GETL R5, t24
- 33: STL t22, (t24)
- 34: INCEIPL $4
-
- 0x2547A440: 39270001 addi r9,r7,1
- 35: GETL R7, t26
- 36: ADDL $0x1, t26
- 37: PUTL t26, R9
- 38: INCEIPL $4
-
- 0x2547A444: 90B30008 stw r5,8(r19)
- 39: GETL R5, t28
- 40: GETL R19, t30
- 41: ADDL $0x8, t30
- 42: STL t28, (t30)
- 43: INCEIPL $4
-
- 0x2547A448: 91450004 stw r10,4(r5)
- 44: GETL R10, t32
- 45: GETL R5, t34
- 46: ADDL $0x4, t34
- 47: STL t32, (t34)
- 48: INCEIPL $4
-
- 0x2547A44C: 826A0180 lwz r19,384(r10)
- 49: GETL R10, t36
- 50: ADDL $0x180, t36
- 51: LDL (t36), t38
- 52: PUTL t38, R19
- 53: INCEIPL $4
-
- 0x2547A450: 913F000C stw r9,12(r31)
- 54: GETL R9, t40
- 55: GETL R31, t42
- 56: ADDL $0xC, t42
- 57: STL t40, (t42)
- 58: INCEIPL $4
-
- 0x2547A454: 50D3C94C rlwimi r19,r6,25,5,6
- 59: GETL R19, t44
- 60: GETL R6, t46
- 61: ROLL $0x19, t46
- 62: ANDL $0x6000000, t46
- 63: ANDL $0xF9FFFFFF, t44
- 64: ORL t44, t46
- 65: PUTL t46, R19
- 66: INCEIPL $4
-
- 0x2547A458: 926A0180 stw r19,384(r10)
- 67: GETL R19, t48
- 68: GETL R10, t50
- 69: ADDL $0x180, t50
- 70: STL t48, (t50)
- 71: INCEIPL $4
-
- 0x2547A45C: 7CB32B78 or r19,r5,r5
- 72: GETL R5, t52
- 73: PUTL t52, R19
- 74: INCEIPL $4
-
- 0x2547A460: 2C980000 cmpi cr1,r24,0
- 75: GETL R24, t54
- 76: CMP0L t54, t56 (-rSo)
- 77: ICRFL t56, $0x1, CR
- 78: INCEIPL $4
-
- 0x2547A464: 41860010 bc 12,6,0x2547A474
- 79: Js06o $0x2547A474
-
-
-. 0 2547A420 72
-. 80 01 00 00 38 C0 00 01 80 FF 00 0C 94 01 FF E0 3A 81 00 17 56 85 00 36 91 25 00 08 91 25 00 00 39 27 00 01 90 B3 00 08 91 45 00 04 82 6A 01 80 91 3F 00 0C 50 D3 C9 4C 92 6A 01 80 7C B3 2B 78 2C 98 00 00 41 86 00 10
-
-==== BB 844 (0x2547A474) approx BBs exec'd 0 ====
-
- 0x2547A474: 853C0008 lwzu r9,8(r28)
- 0: GETL R28, t0
- 1: ADDL $0x8, t0
- 2: PUTL t0, R28
- 3: LDL (t0), t2
- 4: PUTL t2, R9
- 5: INCEIPL $4
-
- 0x2547A478: 2C090000 cmpi cr0,r9,0
- 6: GETL R9, t4
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x0, CR
- 9: INCEIPL $4
-
- 0x2547A47C: 4182043C bc 12,2,0x2547A8B8
- 10: Js02o $0x2547A8B8
-
-
-. 0 2547A474 12
-. 85 3C 00 08 2C 09 00 00 41 82 04 3C
-
-==== BB 845 (0x2547A488) approx BBs exec'd 0 ====
-
- 0x2547A488: 807F0040 lwz r3,64(r31)
- 0: GETL R31, t0
- 1: ADDL $0x40, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x2547A48C: 7C091800 cmp cr0,r9,r3
- 5: GETL R9, t4
- 6: GETL R3, t6
- 7: CMPL t4, t6, t8 (-rSo)
- 8: ICRFL t8, $0x0, CR
- 9: INCEIPL $4
-
- 0x2547A490: 41820014 bc 12,2,0x2547A4A4
- 10: Js02o $0x2547A4A4
-
-
-. 0 2547A488 12
-. 80 7F 00 40 7C 09 18 00 41 82 00 14
-
-==== BB 846 (0x2547A494) approx BBs exec'd 0 ====
-
- 0x2547A494: 3D407FFF lis r10,32767
- 0: MOVL $0x7FFF0000, t0
- 1: PUTL t0, R10
- 2: INCEIPL $4
-
- 0x2547A498: 6148FFFF ori r8,r10,0xFFFF
- 3: MOVL $0x7FFFFFFF, t2
- 4: PUTL t2, R8
- 5: INCEIPL $4
-
- 0x2547A49C: 7F094000 cmp cr6,r9,r8
- 6: GETL R9, t4
- 7: GETL R8, t6
- 8: CMPL t4, t6, t8 (-rSo)
- 9: ICRFL t8, $0x6, CR
- 10: INCEIPL $4
-
- 0x2547A4A0: 409AFFD4 bc 4,26,0x2547A474
- 11: Jc26o $0x2547A474
-
-
-. 0 2547A494 16
-. 3D 40 7F FF 61 48 FF FF 7F 09 40 00 40 9A FF D4
-
-==== BB 847 (0x2547A8B8) approx BBs exec'd 0 ====
-
- 0x2547A8B8: 2F980000 cmpi cr7,r24,0
- 0: GETL R24, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x2547A8BC: 419E005C bc 12,30,0x2547A918
- 4: Js30o $0x2547A918
-
-
-. 0 2547A8B8 8
-. 2F 98 00 00 41 9E 00 5C
-
-==== BB 848 (0x2547A918) approx BBs exec'd 0 ====
-
- 0x2547A918: 801B0000 lwz r0,0(r27)
- 0: GETL R27, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x2547A91C: 2F1B0000 cmpi cr6,r27,0
- 4: GETL R27, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x6, CR
- 7: INCEIPL $4
-
- 0x2547A920: 2C000000 cmpi cr0,r0,0
- 8: GETL R0, t8
- 9: CMP0L t8, t10 (-rSo)
- 10: ICRFL t10, $0x0, CR
- 11: INCEIPL $4
-
- 0x2547A924: 4182001C bc 12,2,0x2547A940
- 12: Js02o $0x2547A940
-
-
-. 0 2547A918 16
-. 80 1B 00 00 2F 1B 00 00 2C 00 00 00 41 82 00 1C
-
-==== BB 849 (0x2547A928) approx BBs exec'd 0 ====
-
- 0x2547A928: 837B0008 lwz r27,8(r27)
- 0: GETL R27, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R27
- 4: INCEIPL $4
-
- 0x2547A92C: 2F1B0000 cmpi cr6,r27,0
- 5: GETL R27, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x2547A930: 41BAFC94 bc 13,26,0x2547A5C4
- 9: Js26o $0x2547A5C4
-
-
-. 0 2547A928 12
-. 83 7B 00 08 2F 1B 00 00 41 BA FC 94
-
-==== BB 850 (0x2547A934) approx BBs exec'd 0 ====
-
- 0x2547A934: 801B0000 lwz r0,0(r27)
- 0: GETL R27, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x2547A938: 2C000000 cmpi cr0,r0,0
- 4: GETL R0, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x0, CR
- 7: INCEIPL $4
-
- 0x2547A93C: 4082FFEC bc 4,2,0x2547A928
- 8: Jc02o $0x2547A928
-
-
-. 0 2547A934 12
-. 80 1B 00 00 2C 00 00 00 40 82 FF EC
-
-==== BB 851 (0x2547A940) approx BBs exec'd 0 ====
-
- 0x2547A940: 409AF9DC bc 4,26,0x2547A31C
- 0: Jc26o $0x2547A31C
-
-
-. 0 2547A940 4
-. 40 9A F9 DC
-
-==== BB 852 (0x2547A35C) approx BBs exec'd 0 ====
-
- 0x2547A35C: A13A0156 lhz r9,342(r26)
- 0: GETL R26, t0
- 1: ADDL $0x156, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547A360: 2F090000 cmpi cr6,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x2547A364: 409A05E4 bc 4,26,0x2547A948
- 9: Jc26o $0x2547A948
-
-
-. 0 2547A35C 12
-. A1 3A 01 56 2F 09 00 00 40 9A 05 E4
-
-==== BB 853 (0x2547A948) approx BBs exec'd 0 ====
-
- 0x2547A948: 5534103A rlwinm r20,r9,2,0,29
- 0: GETL R9, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R20
- 3: INCEIPL $4
-
- 0x2547A94C: 81810000 lwz r12,0(r1)
- 4: GETL R1, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R12
- 7: INCEIPL $4
-
- 0x2547A950: 3A54001E addi r18,r20,30
- 8: GETL R20, t6
- 9: ADDL $0x1E, t6
- 10: PUTL t6, R18
- 11: INCEIPL $4
-
- 0x2547A954: 56490376 rlwinm r9,r18,0,13,27
- 12: GETL R18, t8
- 13: ANDL $0x7FFF0, t8
- 14: PUTL t8, R9
- 15: INCEIPL $4
-
- 0x2547A958: 7D4900D0 neg r10,r9
- 16: GETL R9, t10
- 17: NEGL t10
- 18: PUTL t10, R10
- 19: INCEIPL $4
-
- 0x2547A95C: 7D81516E stwux r12,r1,r10
- 20: GETL R10, t12
- 21: GETL R1, t14
- 22: ADDL t14, t12
- 23: PUTL t12, R1
- 24: GETL R12, t16
- 25: STL t16, (t12)
- 26: INCEIPL $4
-
- 0x2547A960: 39010017 addi r8,r1,23
- 27: GETL R1, t18
- 28: ADDL $0x17, t18
- 29: PUTL t18, R8
- 30: INCEIPL $4
-
- 0x2547A964: 55180036 rlwinm r24,r8,0,0,27
- 31: GETL R8, t20
- 32: ANDL $0xFFFFFFF0, t20
- 33: PUTL t20, R24
- 34: INCEIPL $4
-
- 0x2547A968: 4BFFFA00 b 0x2547A368
- 35: JMPo $0x2547A368 ($4)
-
-
-. 0 2547A948 36
-. 55 34 10 3A 81 81 00 00 3A 54 00 1E 56 49 03 76 7D 49 00 D0 7D 81 51 6E 39 01 00 17 55 18 00 36 4B FF FA 00
-
-==== BB 854 (0x2547A0F0) approx BBs exec'd 0 ====
-
- 0x2547A0F0: 80FF0004 lwz r7,4(r31)
- 0: GETL R31, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x2547A0F4: 811F0008 lwz r8,8(r31)
- 5: GETL R31, t4
- 6: ADDL $0x8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R8
- 9: INCEIPL $4
-
- 0x2547A0F8: 81230018 lwz r9,24(r3)
- 10: GETL R3, t8
- 11: ADDL $0x18, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R9
- 14: INCEIPL $4
-
- 0x2547A0FC: 4BFFCBED bl 0x25476CE8
- 15: MOVL $0x2547A100, t12
- 16: PUTL t12, LR
- 17: JMPo-c $0x25476CE8 ($4)
-
-
-. 0 2547A0F0 16
-. 80 FF 00 04 81 1F 00 08 81 23 00 18 4B FF CB ED
-
-==== BB 855 (0x25482F10) approx BBs exec'd 0 ====
-
- 0x25482F10: 84C40004 lwzu r6,4(r4)
- 0: GETL R4, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R4
- 3: LDL (t0), t2
- 4: PUTL t2, R6
- 5: INCEIPL $4
-
- 0x25482F14: 7C072A14 add r0,r7,r5
- 6: GETL R7, t4
- 7: GETL R5, t6
- 8: ADDL t4, t6
- 9: PUTL t6, R0
- 10: INCEIPL $4
-
- 0x25482F18: 7D0928F8 nor r9,r8,r5
- 11: GETL R8, t8
- 12: GETL R5, t10
- 13: ORL t10, t8
- 14: NOTL t8
- 15: PUTL t8, R9
- 16: INCEIPL $4
-
- 0x25482F1C: 7C004839 and. r0,r0,r9
- 17: GETL R0, t12
- 18: GETL R9, t14
- 19: ANDL t12, t14
- 20: PUTL t14, R0
- 21: CMP0L t14, t16 (-rSo)
- 22: ICRFL t16, $0x0, CR
- 23: INCEIPL $4
-
- 0x25482F20: 7C853000 cmp cr1,r5,r6
- 24: GETL R5, t18
- 25: GETL R6, t20
- 26: CMPL t18, t20, t22 (-rSo)
- 27: ICRFL t22, $0x1, CR
- 28: INCEIPL $4
-
- 0x25482F24: 4182FFE4 bc 12,2,0x25482F08
- 29: Js02o $0x25482F08
-
-
-. 0 25482F10 24
-. 84 C4 00 04 7C 07 2A 14 7D 09 28 F8 7C 00 48 39 7C 85 30 00 41 82 FF E4
-
-==== BB 856 (0x25482F28) approx BBs exec'd 0 ====
-
- 0x25482F28: 7D002838 and r0,r8,r5
- 0: GETL R8, t0
- 1: GETL R5, t2
- 2: ANDL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25482F2C: 4186002C bc 12,6,0x25482F58
- 5: Js06o $0x25482F58
-
-
-. 0 25482F28 8
-. 7D 00 28 38 41 86 00 2C
-
-==== BB 857 (0x25482F30) approx BBs exec'd 0 ====
-
- 0x25482F30: 7C004214 add r0,r0,r8
- 0: GETL R0, t0
- 1: GETL R8, t2
- 2: ADDL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x25482F34: 7CAA3279 xor. r10,r5,r6
- 5: GETL R5, t4
- 6: GETL R6, t6
- 7: XORL t4, t6
- 8: PUTL t6, R10
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x0, CR
- 11: INCEIPL $4
-
- 0x25482F38: 7D290078 andc r9,r9,r0
- 12: GETL R9, t10
- 13: GETL R0, t12
- 14: NOTL t12
- 15: ANDL t10, t12
- 16: PUTL t12, R9
- 17: INCEIPL $4
-
- 0x25482F3C: 41800034 bc 12,0,0x25482F70
- 18: Js00o $0x25482F70
-
-
-. 0 25482F30 16
-. 7C 00 42 14 7C AA 32 79 7D 29 00 78 41 80 00 34
-
-==== BB 858 (0x25482F40) approx BBs exec'd 0 ====
-
- 0x25482F40: 7D4A0034 cntlzw r10,r10
- 0: GETL R10, t0
- 1: CNTLZL t0
- 2: PUTL t0, R10
- 3: INCEIPL $4
-
- 0x25482F44: 7D290034 cntlzw r9,r9
- 4: GETL R9, t2
- 5: CNTLZL t2
- 6: PUTL t2, R9
- 7: INCEIPL $4
-
- 0x25482F48: 39290007 addi r9,r9,7
- 8: GETL R9, t4
- 9: ADDL $0x7, t4
- 10: PUTL t4, R9
- 11: INCEIPL $4
-
- 0x25482F4C: 7C895000 cmp cr1,r9,r10
- 12: GETL R9, t6
- 13: GETL R10, t8
- 14: CMPL t6, t8, t10 (-rSo)
- 15: ICRFL t10, $0x1, CR
- 16: INCEIPL $4
-
- 0x25482F50: 7C662850 subf r3,r6,r5
- 17: GETL R6, t12
- 18: GETL R5, t14
- 19: SUBL t12, t14
- 20: PUTL t14, R3
- 21: INCEIPL $4
-
- 0x25482F54: 4CA40020 bclr 5,4
- 22: GETL LR, t16
- 23: Jc04o-r t16
-
-
-. 0 25482F40 24
-. 7D 4A 00 34 7D 29 00 34 39 29 00 07 7C 89 50 00 7C 66 28 50 4C A4 00 20
-
-==== BB 859 (0x25482F58) approx BBs exec'd 0 ====
-
- 0x25482F58: 38600000 li r3,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25482F5C: 4E800020 blr
- 3: GETL LR, t2
- 4: JMPo-r t2 ($4)
-
-
-. 0 25482F58 8
-. 38 60 00 00 4E 80 00 20
-
-==== BB 860 (0x2547C750) approx BBs exec'd 0 ====
-
- 0x2547C750: 80810024 lwz r4,36(r1)
- 0: GETL R1, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547C754: 38600001 li r3,1
- 5: MOVL $0x1, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x2547C758: 83A10014 lwz r29,20(r1)
- 8: GETL R1, t6
- 9: ADDL $0x14, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R29
- 12: INCEIPL $4
-
- 0x2547C75C: 83C10018 lwz r30,24(r1)
- 13: GETL R1, t10
- 14: ADDL $0x18, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R30
- 17: INCEIPL $4
-
- 0x2547C760: 7C8803A6 mtlr r4
- 18: GETL R4, t14
- 19: PUTL t14, LR
- 20: INCEIPL $4
-
- 0x2547C764: 83E1001C lwz r31,28(r1)
- 21: GETL R1, t16
- 22: ADDL $0x1C, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R31
- 25: INCEIPL $4
-
- 0x2547C768: 38210020 addi r1,r1,32
- 26: GETL R1, t20
- 27: ADDL $0x20, t20
- 28: PUTL t20, R1
- 29: INCEIPL $4
-
- 0x2547C76C: 4E800020 blr
- 30: GETL LR, t22
- 31: JMPo-r t22 ($4)
-
-
-. 0 2547C750 32
-. 80 81 00 24 38 60 00 01 83 A1 00 14 83 C1 00 18 7C 88 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 861 (0x25476F54) approx BBs exec'd 0 ====
-
- 0x25476F54: 7FA3EB78 or r3,r29,r29
- 0: GETL R29, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25476F58: 83E10294 lwz r31,660(r1)
- 3: GETL R1, t2
- 4: ADDL $0x294, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R31
- 7: INCEIPL $4
-
- 0x25476F5C: 81810244 lwz r12,580(r1)
- 8: GETL R1, t6
- 9: ADDL $0x244, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R12
- 12: INCEIPL $4
-
- 0x25476F60: 7FE803A6 mtlr r31
- 13: GETL R31, t10
- 14: PUTL t10, LR
- 15: INCEIPL $4
-
- 0x25476F64: 81C10248 lwz r14,584(r1)
- 16: GETL R1, t12
- 17: ADDL $0x248, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R14
- 20: INCEIPL $4
-
- 0x25476F68: 81E1024C lwz r15,588(r1)
- 21: GETL R1, t16
- 22: ADDL $0x24C, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R15
- 25: INCEIPL $4
-
- 0x25476F6C: 7D818120 mtcrf 0x18,r12
- 26: GETL R12, t20
- 27: ICRFL t20, $0x3, CR
- 28: ICRFL t20, $0x4, CR
- 29: INCEIPL $4
-
- 0x25476F70: 82010250 lwz r16,592(r1)
- 30: GETL R1, t22
- 31: ADDL $0x250, t22
- 32: LDL (t22), t24
- 33: PUTL t24, R16
- 34: INCEIPL $4
-
- 0x25476F74: 82210254 lwz r17,596(r1)
- 35: GETL R1, t26
- 36: ADDL $0x254, t26
- 37: LDL (t26), t28
- 38: PUTL t28, R17
- 39: INCEIPL $4
-
- 0x25476F78: 82410258 lwz r18,600(r1)
- 40: GETL R1, t30
- 41: ADDL $0x258, t30
- 42: LDL (t30), t32
- 43: PUTL t32, R18
- 44: INCEIPL $4
-
- 0x25476F7C: 8261025C lwz r19,604(r1)
- 45: GETL R1, t34
- 46: ADDL $0x25C, t34
- 47: LDL (t34), t36
- 48: PUTL t36, R19
- 49: INCEIPL $4
-
- 0x25476F80: 82810260 lwz r20,608(r1)
- 50: GETL R1, t38
- 51: ADDL $0x260, t38
- 52: LDL (t38), t40
- 53: PUTL t40, R20
- 54: INCEIPL $4
-
- 0x25476F84: 82A10264 lwz r21,612(r1)
- 55: GETL R1, t42
- 56: ADDL $0x264, t42
- 57: LDL (t42), t44
- 58: PUTL t44, R21
- 59: INCEIPL $4
-
- 0x25476F88: 82C10268 lwz r22,616(r1)
- 60: GETL R1, t46
- 61: ADDL $0x268, t46
- 62: LDL (t46), t48
- 63: PUTL t48, R22
- 64: INCEIPL $4
-
- 0x25476F8C: 82E1026C lwz r23,620(r1)
- 65: GETL R1, t50
- 66: ADDL $0x26C, t50
- 67: LDL (t50), t52
- 68: PUTL t52, R23
- 69: INCEIPL $4
-
- 0x25476F90: 83010270 lwz r24,624(r1)
- 70: GETL R1, t54
- 71: ADDL $0x270, t54
- 72: LDL (t54), t56
- 73: PUTL t56, R24
- 74: INCEIPL $4
-
- 0x25476F94: 83210274 lwz r25,628(r1)
- 75: GETL R1, t58
- 76: ADDL $0x274, t58
- 77: LDL (t58), t60
- 78: PUTL t60, R25
- 79: INCEIPL $4
-
- 0x25476F98: 83410278 lwz r26,632(r1)
- 80: GETL R1, t62
- 81: ADDL $0x278, t62
- 82: LDL (t62), t64
- 83: PUTL t64, R26
- 84: INCEIPL $4
-
- 0x25476F9C: 8361027C lwz r27,636(r1)
- 85: GETL R1, t66
- 86: ADDL $0x27C, t66
- 87: LDL (t66), t68
- 88: PUTL t68, R27
- 89: INCEIPL $4
-
- 0x25476FA0: 83810280 lwz r28,640(r1)
- 90: GETL R1, t70
- 91: ADDL $0x280, t70
- 92: LDL (t70), t72
- 93: PUTL t72, R28
- 94: INCEIPL $4
-
- 0x25476FA4: 83A10284 lwz r29,644(r1)
- 95: GETL R1, t74
- 96: ADDL $0x284, t74
- 97: LDL (t74), t76
- 98: PUTL t76, R29
- 99: INCEIPL $4
-
- 0x25476FA8: 83C10288 lwz r30,648(r1)
- 100: GETL R1, t78
- 101: ADDL $0x288, t78
- 102: LDL (t78), t80
- 103: PUTL t80, R30
- 104: INCEIPL $4
-
- 0x25476FAC: 83E1028C lwz r31,652(r1)
- 105: GETL R1, t82
- 106: ADDL $0x28C, t82
- 107: LDL (t82), t84
- 108: PUTL t84, R31
- 109: INCEIPL $4
-
- 0x25476FB0: 38210290 addi r1,r1,656
- 110: GETL R1, t86
- 111: ADDL $0x290, t86
- 112: PUTL t86, R1
- 113: INCEIPL $4
-
- 0x25476FB4: 4E800020 blr
- 114: GETL LR, t88
- 115: JMPo-r t88 ($4)
-
-
-. 0 25476F54 100
-. 7F A3 EB 78 83 E1 02 94 81 81 02 44 7F E8 03 A6 81 C1 02 48 81 E1 02 4C 7D 81 81 20 82 01 02 50 82 21 02 54 82 41 02 58 82 61 02 5C 82 81 02 60 82 A1 02 64 82 C1 02 68 82 E1 02 6C 83 01 02 70 83 21 02 74 83 41 02 78 83 61 02 7C 83 81 02 80 83 A1 02 84 83 C1 02 88 83 E1 02 8C 38 21 02 90 4E 80 00 20
-
-==== BB 862 (0x2547A460) approx BBs exec'd 0 ====
-
- 0x2547A460: 2C980000 cmpi cr1,r24,0
- 0: GETL R24, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x2547A464: 41860010 bc 12,6,0x2547A474
- 4: Js06o $0x2547A474
-
-
-. 0 2547A460 8
-. 2C 98 00 00 41 86 00 10
-
-==== BB 863 (0x2547A468) approx BBs exec'd 0 ====
-
- 0x2547A468: 56CB103A rlwinm r11,r22,2,0,29
- 0: GETL R22, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R11
- 3: INCEIPL $4
-
- 0x2547A46C: 3AD60001 addi r22,r22,1
- 4: GETL R22, t2
- 5: ADDL $0x1, t2
- 6: PUTL t2, R22
- 7: INCEIPL $4
-
- 0x2547A470: 7D4BC12E stwx r10,r11,r24
- 8: GETL R24, t4
- 9: GETL R11, t6
- 10: ADDL t6, t4
- 11: GETL R10, t8
- 12: STL t8, (t4)
- 13: INCEIPL $4
-
- 0x2547A474: 853C0008 lwzu r9,8(r28)
- 14: GETL R28, t10
- 15: ADDL $0x8, t10
- 16: PUTL t10, R28
- 17: LDL (t10), t12
- 18: PUTL t12, R9
- 19: INCEIPL $4
-
- 0x2547A478: 2C090000 cmpi cr0,r9,0
- 20: GETL R9, t14
- 21: CMP0L t14, t16 (-rSo)
- 22: ICRFL t16, $0x0, CR
- 23: INCEIPL $4
-
- 0x2547A47C: 4182043C bc 12,2,0x2547A8B8
- 24: Js02o $0x2547A8B8
-
-
-. 0 2547A468 24
-. 56 CB 10 3A 3A D6 00 01 7D 4B C1 2E 85 3C 00 08 2C 09 00 00 41 82 04 3C
-
-==== BB 864 (0x2547A8C0) approx BBs exec'd 0 ====
-
- 0x2547A8C0: 3BB60001 addi r29,r22,1
- 0: GETL R22, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R29
- 3: INCEIPL $4
-
- 0x2547A8C4: 56DC103A rlwinm r28,r22,2,0,29
- 4: GETL R22, t2
- 5: SHLL $0x2, t2
- 6: PUTL t2, R28
- 7: INCEIPL $4
-
- 0x2547A8C8: 3A400000 li r18,0
- 8: MOVL $0x0, t4
- 9: PUTL t4, R18
- 10: INCEIPL $4
-
- 0x2547A8CC: 57B61838 rlwinm r22,r29,3,0,28
- 11: GETL R29, t6
- 12: SHLL $0x3, t6
- 13: PUTL t6, R22
- 14: INCEIPL $4
-
- 0x2547A8D0: 7E5CC12E stwx r18,r28,r24
- 15: GETL R24, t8
- 16: GETL R28, t10
- 17: ADDL t10, t8
- 18: GETL R18, t12
- 19: STL t12, (t8)
- 20: INCEIPL $4
-
- 0x2547A8D4: 38760004 addi r3,r22,4
- 21: GETL R22, t14
- 22: ADDL $0x4, t14
- 23: PUTL t14, R3
- 24: INCEIPL $4
-
- 0x2547A8D8: 4801D14D bl 0x25497A24
- 25: MOVL $0x2547A8DC, t16
- 26: PUTL t16, LR
- 27: JMPo-c $0x25497A24 ($4)
-
-
-. 0 2547A8C0 28
-. 3B B6 00 01 56 DC 10 3A 3A 40 00 00 57 B6 18 38 7E 5C C1 2E 38 76 00 04 48 01 D1 4D
-
-==== BB 865 (0x2547A8DC) approx BBs exec'd 0 ====
-
- 0x2547A8DC: 2C830000 cmpi cr1,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x2547A8E0: 7C691B78 or r9,r3,r3
- 4: GETL R3, t4
- 5: PUTL t4, R9
- 6: INCEIPL $4
-
- 0x2547A8E4: 907A01E8 stw r3,488(r26)
- 7: GETL R3, t6
- 8: GETL R26, t8
- 9: ADDL $0x1E8, t8
- 10: STL t6, (t8)
- 11: INCEIPL $4
-
- 0x2547A8E8: 418605C4 bc 12,6,0x2547AEAC
- 12: Js06o $0x2547AEAC
-
-
-. 0 2547A8DC 16
-. 2C 83 00 00 7C 69 1B 78 90 7A 01 E8 41 86 05 C4
-
-==== BB 866 (0x2547A8EC) approx BBs exec'd 0 ====
-
- 0x2547A8EC: 57B5103A rlwinm r21,r29,2,0,29
- 0: GETL R29, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R21
- 3: INCEIPL $4
-
- 0x2547A8F0: 7F04C378 or r4,r24,r24
- 4: GETL R24, t2
- 5: PUTL t2, R4
- 6: INCEIPL $4
-
- 0x2547A8F4: 7EA5AB78 or r5,r21,r21
- 7: GETL R21, t4
- 8: PUTL t4, R5
- 9: INCEIPL $4
-
- 0x2547A8F8: 93490000 stw r26,0(r9)
- 10: GETL R26, t6
- 11: GETL R9, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547A8FC: 38630004 addi r3,r3,4
- 14: GETL R3, t10
- 15: ADDL $0x4, t10
- 16: PUTL t10, R3
- 17: INCEIPL $4
-
- 0x2547A900: 480092E1 bl 0x25483BE0
- 18: MOVL $0x2547A904, t12
- 19: PUTL t12, LR
- 20: JMPo-c $0x25483BE0 ($4)
-
-
-. 0 2547A8EC 24
-. 57 B5 10 3A 7F 04 C3 78 7E A5 AB 78 93 49 00 00 38 63 00 04 48 00 92 E1
-
-==== BB 867 (0x2547A904) approx BBs exec'd 0 ====
-
- 0x2547A904: 809A01E8 lwz r4,488(r26)
- 0: GETL R26, t0
- 1: ADDL $0x1E8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547A908: 7EA5AB78 or r5,r21,r21
- 5: GETL R21, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x2547A90C: 7F552214 add r26,r21,r4
- 8: GETL R21, t6
- 9: GETL R4, t8
- 10: ADDL t6, t8
- 11: PUTL t8, R26
- 12: INCEIPL $4
-
- 0x2547A910: 387A0004 addi r3,r26,4
- 13: GETL R26, t10
- 14: ADDL $0x4, t10
- 15: PUTL t10, R3
- 16: INCEIPL $4
-
- 0x2547A914: 480092CD bl 0x25483BE0
- 17: MOVL $0x2547A918, t12
- 18: PUTL t12, LR
- 19: JMPo-c $0x25483BE0 ($4)
-
-
-. 0 2547A904 20
-. 80 9A 01 E8 7E A5 AB 78 7F 55 22 14 38 7A 00 04 48 00 92 CD
-
-==== BB 868 (0x25482F94) approx BBs exec'd 0 ====
-
- 0x25482F94: 8CC40001 lbzu r6,1(r4)
- 0: GETL R4, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R4
- 3: LDB (t0), t2
- 4: PUTL t2, R6
- 5: INCEIPL $4
-
- 0x25482F98: 2C850000 cmpi cr1,r5,0
- 6: GETL R5, t4
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x1, CR
- 9: INCEIPL $4
-
- 0x25482F9C: 41860020 bc 12,6,0x25482FBC
- 10: Js06o $0x25482FBC
-
-
-. 0 25482F94 12
-. 8C C4 00 01 2C 85 00 00 41 86 00 20
-
-==== BB 869 (0x25476ED0) approx BBs exec'd 0 ====
-
- 0x25476ED0: 809D001C lwz r4,28(r29)
- 0: GETL R29, t0
- 1: ADDL $0x1C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x25476ED4: 3B600000 li r27,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R27
- 7: INCEIPL $4
-
- 0x25476ED8: 48000020 b 0x25476EF8
- 8: JMPo $0x25476EF8 ($4)
-
-
-. 0 25476ED0 12
-. 80 9D 00 1C 3B 60 00 00 48 00 00 20
-
-==== BB 870 (0x25476EF8) approx BBs exec'd 0 ====
-
- 0x25476EF8: 2F040000 cmpi cr6,r4,0
- 0: GETL R4, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x25476EFC: 409AFFE0 bc 4,26,0x25476EDC
- 4: Jc26o $0x25476EDC
-
-
-. 0 25476EF8 8
-. 2F 04 00 00 40 9A FF E0
-
-==== BB 871 (0x25476EDC) approx BBs exec'd 0 ====
-
- 0x25476EDC: 7C9B2378 or r27,r4,r4
- 0: GETL R4, t0
- 1: PUTL t0, R27
- 2: INCEIPL $4
-
- 0x25476EE0: 80840000 lwz r4,0(r4)
- 3: GETL R4, t2
- 4: LDL (t2), t4
- 5: PUTL t4, R4
- 6: INCEIPL $4
-
- 0x25476EE4: 7F83E378 or r3,r28,r28
- 7: GETL R28, t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x25476EE8: 4800BFF9 bl 0x25482EE0
- 10: MOVL $0x25476EEC, t8
- 11: PUTL t8, LR
- 12: JMPo-c $0x25482EE0 ($4)
-
-
-. 0 25476EDC 16
-. 7C 9B 23 78 80 84 00 00 7F 83 E3 78 48 00 BF F9
-
-==== BB 872 (0x25476EEC) approx BBs exec'd 0 ====
-
- 0x25476EEC: 2F830000 cmpi cr7,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x25476EF0: 419E0058 bc 12,30,0x25476F48
- 4: Js30o $0x25476F48
-
-
-. 0 25476EEC 8
-. 2F 83 00 00 41 9E 00 58
-
-==== BB 873 (0x25476EF4) approx BBs exec'd 0 ====
-
- 0x25476EF4: 809B0004 lwz r4,4(r27)
- 0: GETL R27, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x25476EF8: 2F040000 cmpi cr6,r4,0
- 5: GETL R4, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x25476EFC: 409AFFE0 bc 4,26,0x25476EDC
- 9: Jc26o $0x25476EDC
-
-
-. 0 25476EF4 12
-. 80 9B 00 04 2F 04 00 00 40 9A FF E0
-
-==== BB 874 (0x25476F00) approx BBs exec'd 0 ====
-
- 0x25476F00: 7F83E378 or r3,r28,r28
- 0: GETL R28, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25476F04: 4800C0CD bl 0x25482FD0
- 3: MOVL $0x25476F08, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x25482FD0 ($4)
-
-
-. 0 25476F00 8
-. 7F 83 E3 78 48 00 C0 CD
-
-==== BB 875 (0x25476F08) approx BBs exec'd 0 ====
-
- 0x25476F08: 7C661B78 or r6,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R6
- 2: INCEIPL $4
-
- 0x25476F0C: 3863000D addi r3,r3,13
- 3: GETL R3, t2
- 4: ADDL $0xD, t2
- 5: PUTL t2, R3
- 6: INCEIPL $4
-
- 0x25476F10: 3B460001 addi r26,r6,1
- 7: GETL R6, t4
- 8: ADDL $0x1, t4
- 9: PUTL t4, R26
- 10: INCEIPL $4
-
- 0x25476F14: 48020B11 bl 0x25497A24
- 11: MOVL $0x25476F18, t6
- 12: PUTL t6, LR
- 13: JMPo-c $0x25497A24 ($4)
-
-
-. 0 25476F08 16
-. 7C 66 1B 78 38 63 00 0D 3B 46 00 01 48 02 0B 11
-
-==== BB 876 (0x25476F18) approx BBs exec'd 0 ====
-
- 0x25476F18: 7C7F1B79 or. r31,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R31
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x25476F1C: 80DE01AC lwz r6,428(r30)
- 5: GETL R30, t4
- 6: ADDL $0x1AC, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R6
- 9: INCEIPL $4
-
- 0x25476F20: 7F84E378 or r4,r28,r28
- 10: GETL R28, t8
- 11: PUTL t8, R4
- 12: INCEIPL $4
-
- 0x25476F24: 4182013C bc 12,2,0x25477060
- 13: Js02o $0x25477060
-
-
-. 0 25476F18 16
-. 7C 7F 1B 79 80 DE 01 AC 7F 84 E3 78 41 82 01 3C
-
-==== BB 877 (0x25476F28) approx BBs exec'd 0 ====
-
- 0x25476F28: 7F84E378 or r4,r28,r28
- 0: GETL R28, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x25476F2C: 7F45D378 or r5,r26,r26
- 3: GETL R26, t2
- 4: PUTL t2, R5
- 5: INCEIPL $4
-
- 0x25476F30: 387F000C addi r3,r31,12
- 6: GETL R31, t4
- 7: ADDL $0xC, t4
- 8: PUTL t4, R3
- 9: INCEIPL $4
-
- 0x25476F34: 4800CCAD bl 0x25483BE0
- 10: MOVL $0x25476F38, t6
- 11: PUTL t6, LR
- 12: JMPo-c $0x25483BE0 ($4)
-
-
-. 0 25476F28 16
-. 7F 84 E3 78 7F 45 D3 78 38 7F 00 0C 48 00 CC AD
-
-==== BB 878 (0x25476F38) approx BBs exec'd 0 ====
-
- 0x25476F38: 92DF0004 stw r22,4(r31)
- 0: GETL R22, t0
- 1: GETL R31, t2
- 2: ADDL $0x4, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25476F3C: 907F0000 stw r3,0(r31)
- 5: GETL R3, t4
- 6: GETL R31, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0x25476F40: 92DF0008 stw r22,8(r31)
- 9: GETL R22, t8
- 10: GETL R31, t10
- 11: ADDL $0x8, t10
- 12: STL t8, (t10)
- 13: INCEIPL $4
-
- 0x25476F44: 93FB0004 stw r31,4(r27)
- 14: GETL R31, t12
- 15: GETL R27, t14
- 16: ADDL $0x4, t14
- 17: STL t12, (t14)
- 18: INCEIPL $4
-
- 0x25476F48: 811D0180 lwz r8,384(r29)
- 19: GETL R29, t16
- 20: ADDL $0x180, t16
- 21: LDL (t16), t18
- 22: PUTL t18, R8
- 23: INCEIPL $4
-
- 0x25476F4C: 65070080 oris r7,r8,0x80
- 24: GETL R8, t20
- 25: ORL $0x800000, t20
- 26: PUTL t20, R7
- 27: INCEIPL $4
-
- 0x25476F50: 90FD0180 stw r7,384(r29)
- 28: GETL R7, t22
- 29: GETL R29, t24
- 30: ADDL $0x180, t24
- 31: STL t22, (t24)
- 32: INCEIPL $4
-
- 0x25476F54: 7FA3EB78 or r3,r29,r29
- 33: GETL R29, t26
- 34: PUTL t26, R3
- 35: INCEIPL $4
-
- 0x25476F58: 83E10294 lwz r31,660(r1)
- 36: GETL R1, t28
- 37: ADDL $0x294, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R31
- 40: INCEIPL $4
-
- 0x25476F5C: 81810244 lwz r12,580(r1)
- 41: GETL R1, t32
- 42: ADDL $0x244, t32
- 43: LDL (t32), t34
- 44: PUTL t34, R12
- 45: INCEIPL $4
-
- 0x25476F60: 7FE803A6 mtlr r31
- 46: GETL R31, t36
- 47: PUTL t36, LR
- 48: INCEIPL $4
-
- 0x25476F64: 81C10248 lwz r14,584(r1)
- 49: GETL R1, t38
- 50: ADDL $0x248, t38
- 51: LDL (t38), t40
- 52: PUTL t40, R14
- 53: INCEIPL $4
-
- 0x25476F68: 81E1024C lwz r15,588(r1)
- 54: GETL R1, t42
- 55: ADDL $0x24C, t42
- 56: LDL (t42), t44
- 57: PUTL t44, R15
- 58: INCEIPL $4
-
- 0x25476F6C: 7D818120 mtcrf 0x18,r12
- 59: GETL R12, t46
- 60: ICRFL t46, $0x3, CR
- 61: ICRFL t46, $0x4, CR
- 62: INCEIPL $4
-
- 0x25476F70: 82010250 lwz r16,592(r1)
- 63: GETL R1, t48
- 64: ADDL $0x250, t48
- 65: LDL (t48), t50
- 66: PUTL t50, R16
- 67: INCEIPL $4
-
- 0x25476F74: 82210254 lwz r17,596(r1)
- 68: GETL R1, t52
- 69: ADDL $0x254, t52
- 70: LDL (t52), t54
- 71: PUTL t54, R17
- 72: INCEIPL $4
-
- 0x25476F78: 82410258 lwz r18,600(r1)
- 73: GETL R1, t56
- 74: ADDL $0x258, t56
- 75: LDL (t56), t58
- 76: PUTL t58, R18
- 77: INCEIPL $4
-
- 0x25476F7C: 8261025C lwz r19,604(r1)
- 78: GETL R1, t60
- 79: ADDL $0x25C, t60
- 80: LDL (t60), t62
- 81: PUTL t62, R19
- 82: INCEIPL $4
-
- 0x25476F80: 82810260 lwz r20,608(r1)
- 83: GETL R1, t64
- 84: ADDL $0x260, t64
- 85: LDL (t64), t66
- 86: PUTL t66, R20
- 87: INCEIPL $4
-
- 0x25476F84: 82A10264 lwz r21,612(r1)
- 88: GETL R1, t68
- 89: ADDL $0x264, t68
- 90: LDL (t68), t70
- 91: PUTL t70, R21
- 92: INCEIPL $4
-
- 0x25476F88: 82C10268 lwz r22,616(r1)
- 93: GETL R1, t72
- 94: ADDL $0x268, t72
- 95: LDL (t72), t74
- 96: PUTL t74, R22
- 97: INCEIPL $4
-
- 0x25476F8C: 82E1026C lwz r23,620(r1)
- 98: GETL R1, t76
- 99: ADDL $0x26C, t76
- 100: LDL (t76), t78
- 101: PUTL t78, R23
- 102: INCEIPL $4
-
- 0x25476F90: 83010270 lwz r24,624(r1)
- 103: GETL R1, t80
- 104: ADDL $0x270, t80
- 105: LDL (t80), t82
- 106: PUTL t82, R24
- 107: INCEIPL $4
-
- 0x25476F94: 83210274 lwz r25,628(r1)
- 108: GETL R1, t84
- 109: ADDL $0x274, t84
- 110: LDL (t84), t86
- 111: PUTL t86, R25
- 112: INCEIPL $4
-
- 0x25476F98: 83410278 lwz r26,632(r1)
- 113: GETL R1, t88
- 114: ADDL $0x278, t88
- 115: LDL (t88), t90
- 116: PUTL t90, R26
- 117: INCEIPL $4
-
- 0x25476F9C: 8361027C lwz r27,636(r1)
- 118: GETL R1, t92
- 119: ADDL $0x27C, t92
- 120: LDL (t92), t94
- 121: PUTL t94, R27
- 122: INCEIPL $4
-
- 0x25476FA0: 83810280 lwz r28,640(r1)
- 123: GETL R1, t96
- 124: ADDL $0x280, t96
- 125: LDL (t96), t98
- 126: PUTL t98, R28
- 127: INCEIPL $4
-
- 0x25476FA4: 83A10284 lwz r29,644(r1)
- 128: GETL R1, t100
- 129: ADDL $0x284, t100
- 130: LDL (t100), t102
- 131: PUTL t102, R29
- 132: INCEIPL $4
-
- 0x25476FA8: 83C10288 lwz r30,648(r1)
- 133: GETL R1, t104
- 134: ADDL $0x288, t104
- 135: LDL (t104), t106
- 136: PUTL t106, R30
- 137: INCEIPL $4
-
- 0x25476FAC: 83E1028C lwz r31,652(r1)
- 138: GETL R1, t108
- 139: ADDL $0x28C, t108
- 140: LDL (t108), t110
- 141: PUTL t110, R31
- 142: INCEIPL $4
-
- 0x25476FB0: 38210290 addi r1,r1,656
- 143: GETL R1, t112
- 144: ADDL $0x290, t112
- 145: PUTL t112, R1
- 146: INCEIPL $4
-
- 0x25476FB4: 4E800020 blr
- 147: GETL LR, t114
- 148: JMPo-r t114 ($4)
-
-
-. 0 25476F38 128
-. 92 DF 00 04 90 7F 00 00 92 DF 00 08 93 FB 00 04 81 1D 01 80 65 07 00 80 90 FD 01 80 7F A3 EB 78 83 E1 02 94 81 81 02 44 7F E8 03 A6 81 C1 02 48 81 E1 02 4C 7D 81 81 20 82 01 02 50 82 21 02 54 82 41 02 58 82 61 02 5C 82 81 02 60 82 A1 02 64 82 C1 02 68 82 E1 02 6C 83 01 02 70 83 21 02 74 83 41 02 78 83 61 02 7C 83 81 02 80 83 A1 02 84 83 C1 02 88 83 E1 02 8C 38 21 02 90 4E 80 00 20
-
-==== BB 879 (0x2547A374) approx BBs exec'd 0 ====
-
- 0x2547A374: 809A00F0 lwz r4,240(r26)
- 0: GETL R26, t0
- 1: ADDL $0xF0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547A378: 2C840000 cmpi cr1,r4,0
- 5: GETL R4, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x2547A37C: 40860010 bc 4,6,0x2547A38C
- 9: Jc06o $0x2547A38C
-
-
-. 0 2547A374 12
-. 80 9A 00 F0 2C 84 00 00 40 86 00 10
-
-==== BB 880 (0x2547A380) approx BBs exec'd 0 ====
-
- 0x2547A380: 80BA00E8 lwz r5,232(r26)
- 0: GETL R26, t0
- 1: ADDL $0xE8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x2547A384: 2C050000 cmpi cr0,r5,0
- 5: GETL R5, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x2547A388: 41820530 bc 12,2,0x2547A8B8
- 9: Js02o $0x2547A8B8
-
-
-. 0 2547A380 12
-. 80 BA 00 E8 2C 05 00 00 41 82 05 30
-
-==== BB 881 (0x2547A5C4) approx BBs exec'd 0 ====
-
- 0x2547A5C4: 83100000 lwz r24,0(r16)
- 0: GETL R16, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R24
- 3: INCEIPL $4
-
- 0x2547A5C8: 827F0038 lwz r19,56(r31)
- 4: GETL R31, t4
- 5: ADDL $0x38, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R19
- 8: INCEIPL $4
-
- 0x2547A5CC: 21780000 subfic r11,r24,0
- 9: GETL R24, t8
- 10: MOVL $0x0, t10
- 11: SBBL t8, t10 (-wCa)
- 12: PUTL t10, R11
- 13: INCEIPL $4
-
- 0x2547A5D0: 7DCBC114 adde r14,r11,r24
- 14: GETL R11, t12
- 15: GETL R24, t14
- 16: ADCL t12, t14 (-rCa-wCa)
- 17: PUTL t14, R14
- 18: INCEIPL $4
-
- 0x2547A5D4: 3153FFFF addic r10,r19,-1
- 19: GETL R19, t16
- 20: ADCL $0xFFFFFFFF, t16 (-wCa)
- 21: PUTL t16, R10
- 22: INCEIPL $4
-
- 0x2547A5D8: 7F6A9910 subfe r27,r10,r19
- 23: GETL R10, t18
- 24: GETL R19, t20
- 25: SBBL t18, t20 (-rCa-wCa)
- 26: PUTL t20, R27
- 27: INCEIPL $4
-
- 0x2547A5DC: 7DC8D839 and. r8,r14,r27
- 28: GETL R14, t22
- 29: GETL R27, t24
- 30: ANDL t22, t24
- 31: PUTL t24, R8
- 32: CMP0L t24, t26 (-rSo)
- 33: ICRFL t26, $0x0, CR
- 34: INCEIPL $4
-
- 0x2547A5E0: 4182000C bc 12,2,0x2547A5EC
- 35: Js02o $0x2547A5EC
-
-
-. 0 2547A5C4 32
-. 83 10 00 00 82 7F 00 38 21 78 00 00 7D CB C1 14 31 53 FF FF 7F 6A 99 10 7D C8 D8 39 41 82 00 0C
-
-==== BB 882 (0x2547A5E4) approx BBs exec'd 0 ====
-
- 0x2547A5E4: 811F0038 lwz r8,56(r31)
- 0: GETL R31, t0
- 1: ADDL $0x38, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x2547A5E8: 91100000 stw r8,0(r16)
- 5: GETL R8, t4
- 6: GETL R16, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0x2547A5EC: 807701E8 lwz r3,488(r23)
- 9: GETL R23, t8
- 10: ADDL $0x1E8, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R3
- 13: INCEIPL $4
-
- 0x2547A5F0: 2F030000 cmpi cr6,r3,0
- 14: GETL R3, t12
- 15: CMP0L t12, t14 (-rSo)
- 16: ICRFL t14, $0x6, CR
- 17: INCEIPL $4
-
- 0x2547A5F4: 419A0018 bc 12,26,0x2547A60C
- 18: Js26o $0x2547A60C
-
-
-. 0 2547A5E4 20
-. 81 1F 00 38 91 10 00 00 80 77 01 E8 2F 03 00 00 41 9A 00 18
-
-==== BB 883 (0x2547A60C) approx BBs exec'd 0 ====
-
- 0x2547A60C: 80DF000C lwz r6,12(r31)
- 0: GETL R31, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x2547A610: 54C51838 rlwinm r5,r6,3,0,28
- 5: GETL R6, t4
- 6: SHLL $0x3, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x2547A614: 38650004 addi r3,r5,4
- 9: GETL R5, t6
- 10: ADDL $0x4, t6
- 11: PUTL t6, R3
- 12: INCEIPL $4
-
- 0x2547A618: 4801D40D bl 0x25497A24
- 13: MOVL $0x2547A61C, t8
- 14: PUTL t8, LR
- 15: JMPo-c $0x25497A24 ($4)
-
-
-. 0 2547A60C 16
-. 80 DF 00 0C 54 C5 18 38 38 65 00 04 48 01 D4 0D
-
-==== BB 884 (0x2547A61C) approx BBs exec'd 0 ====
-
- 0x2547A61C: 2C830000 cmpi cr1,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x2547A620: 907701E8 stw r3,488(r23)
- 4: GETL R3, t4
- 5: GETL R23, t6
- 6: ADDL $0x1E8, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0x2547A624: 4186089C bc 12,6,0x2547AEC0
- 9: Js06o $0x2547AEC0
-
-
-. 0 2547A61C 12
-. 2C 83 00 00 90 77 01 E8 41 86 08 9C
-
-==== BB 885 (0x2547A628) approx BBs exec'd 0 ====
-
- 0x2547A628: 80FF0008 lwz r7,8(r31)
- 0: GETL R31, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x2547A62C: 38A00000 li r5,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x2547A630: 829F000C lwz r20,12(r31)
- 8: GETL R31, t6
- 9: ADDL $0xC, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R20
- 12: INCEIPL $4
-
- 0x2547A634: 2C070000 cmpi cr0,r7,0
- 13: GETL R7, t10
- 14: CMP0L t10, t12 (-rSo)
- 15: ICRFL t12, $0x0, CR
- 16: INCEIPL $4
-
- 0x2547A638: 569D103A rlwinm r29,r20,2,0,29
- 17: GETL R20, t14
- 18: SHLL $0x2, t14
- 19: PUTL t14, R29
- 20: INCEIPL $4
-
- 0x2547A63C: 9297015C stw r20,348(r23)
- 21: GETL R20, t16
- 22: GETL R23, t18
- 23: ADDL $0x15C, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x2547A640: 7D23EA14 add r9,r3,r29
- 26: GETL R3, t20
- 27: GETL R29, t22
- 28: ADDL t20, t22
- 29: PUTL t22, R9
- 30: INCEIPL $4
-
- 0x2547A644: 90BF000C stw r5,12(r31)
- 31: GETL R5, t24
- 32: GETL R31, t26
- 33: ADDL $0xC, t26
- 34: STL t24, (t26)
- 35: INCEIPL $4
-
- 0x2547A648: 38890004 addi r4,r9,4
- 36: GETL R9, t28
- 37: ADDL $0x4, t28
- 38: PUTL t28, R4
- 39: INCEIPL $4
-
- 0x2547A64C: 90970158 stw r4,344(r23)
- 40: GETL R4, t30
- 41: GETL R23, t32
- 42: ADDL $0x158, t32
- 43: STL t30, (t32)
- 44: INCEIPL $4
-
- 0x2547A650: 41820050 bc 12,2,0x2547A6A0
- 45: Js02o $0x2547A6A0
-
-
-. 0 2547A628 44
-. 80 FF 00 08 38 A0 00 00 82 9F 00 0C 2C 07 00 00 56 9D 10 3A 92 97 01 5C 7D 23 EA 14 90 BF 00 0C 38 89 00 04 90 97 01 58 41 82 00 50
-
-==== BB 886 (0x2547A654) approx BBs exec'd 0 ====
-
- 0x2547A654: 2F0F0000 cmpi cr6,r15,0
- 0: GETL R15, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x2547A658: 38C00000 li r6,0
- 4: MOVL $0x0, t4
- 5: PUTL t4, R6
- 6: INCEIPL $4
-
- 0x2547A65C: 409A01F8 bc 4,26,0x2547A854
- 7: Jc26o $0x2547A854
-
-
-. 0 2547A654 12
-. 2F 0F 00 00 38 C0 00 00 40 9A 01 F8
-
-==== BB 887 (0x2547A660) approx BBs exec'd 0 ====
-
- 0x2547A660: 817F000C lwz r11,12(r31)
- 0: GETL R31, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547A664: 80070004 lwz r0,4(r7)
- 5: GETL R7, t4
- 6: ADDL $0x4, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R0
- 9: INCEIPL $4
-
- 0x2547A668: 83370158 lwz r25,344(r23)
- 10: GETL R23, t8
- 11: ADDL $0x158, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R25
- 14: INCEIPL $4
-
- 0x2547A66C: 5576103A rlwinm r22,r11,2,0,29
- 15: GETL R11, t12
- 16: SHLL $0x2, t12
- 17: PUTL t12, R22
- 18: INCEIPL $4
-
- 0x2547A670: 398B0001 addi r12,r11,1
- 19: GETL R11, t14
- 20: ADDL $0x1, t14
- 21: PUTL t14, R12
- 22: INCEIPL $4
-
- 0x2547A674: 7C16C92E stwx r0,r22,r25
- 23: GETL R25, t16
- 24: GETL R22, t18
- 25: ADDL t18, t16
- 26: GETL R0, t20
- 27: STL t20, (t16)
- 28: INCEIPL $4
-
- 0x2547A678: 81E70004 lwz r15,4(r7)
- 29: GETL R7, t22
- 30: ADDL $0x4, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R15
- 33: INCEIPL $4
-
- 0x2547A67C: 806F0180 lwz r3,384(r15)
- 34: GETL R15, t26
- 35: ADDL $0x180, t26
- 36: LDL (t26), t28
- 37: PUTL t28, R3
- 38: INCEIPL $4
-
- 0x2547A680: 919F000C stw r12,12(r31)
- 39: GETL R12, t30
- 40: GETL R31, t32
- 41: ADDL $0xC, t32
- 42: STL t30, (t32)
- 43: INCEIPL $4
-
- 0x2547A684: 50C3C94C rlwimi r3,r6,25,5,6
- 44: GETL R3, t34
- 45: GETL R6, t36
- 46: ROLL $0x19, t36
- 47: ANDL $0x6000000, t36
- 48: ANDL $0xF9FFFFFF, t34
- 49: ORL t34, t36
- 50: PUTL t36, R3
- 51: INCEIPL $4
-
- 0x2547A688: 906F0180 stw r3,384(r15)
- 52: GETL R3, t38
- 53: GETL R15, t40
- 54: ADDL $0x180, t40
- 55: STL t38, (t40)
- 56: INCEIPL $4
-
- 0x2547A68C: 80E70008 lwz r7,8(r7)
- 57: GETL R7, t42
- 58: ADDL $0x8, t42
- 59: LDL (t42), t44
- 60: PUTL t44, R7
- 61: INCEIPL $4
-
- 0x2547A690: 2F070000 cmpi cr6,r7,0
- 62: GETL R7, t46
- 63: CMP0L t46, t48 (-rSo)
- 64: ICRFL t48, $0x6, CR
- 65: INCEIPL $4
-
- 0x2547A694: 409AFFCC bc 4,26,0x2547A660
- 66: Jc26o $0x2547A660
-
-
-. 0 2547A660 56
-. 81 7F 00 0C 80 07 00 04 83 37 01 58 55 76 10 3A 39 8B 00 01 7C 16 C9 2E 81 E7 00 04 80 6F 01 80 91 9F 00 0C 50 C3 C9 4C 90 6F 01 80 80 E7 00 08 2F 07 00 00 40 9A FF CC
-
-==== BB 888 (0x2547A698) approx BBs exec'd 0 ====
-
- 0x2547A698: 80BF000C lwz r5,12(r31)
- 0: GETL R31, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x2547A69C: 80970158 lwz r4,344(r23)
- 5: GETL R23, t4
- 6: ADDL $0x158, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R4
- 9: INCEIPL $4
-
- 0x2547A6A0: 839E04F4 lwz r28,1268(r30)
- 10: GETL R30, t8
- 11: ADDL $0x4F4, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R28
- 14: INCEIPL $4
-
- 0x2547A6A4: 80FC0000 lwz r7,0(r28)
- 15: GETL R28, t12
- 16: LDL (t12), t14
- 17: PUTL t14, R7
- 18: INCEIPL $4
-
- 0x2547A6A8: 70E80400 andi. r8,r7,0x400
- 19: GETL R7, t16
- 20: ANDL $0x400, t16
- 21: PUTL t16, R8
- 22: CMP0L t16, t18 (-rSo)
- 23: ICRFL t18, $0x0, CR
- 24: INCEIPL $4
-
- 0x2547A6AC: 408204E0 bc 4,2,0x2547AB8C
- 25: Jc02o $0x2547AB8C
-
-
-. 0 2547A698 24
-. 80 BF 00 0C 80 97 01 58 83 9E 04 F4 80 FC 00 00 70 E8 04 00 40 82 04 E0
-
-==== BB 889 (0x2547A6B0) approx BBs exec'd 0 ====
-
- 0x2547A6B0: 80D701F0 lwz r6,496(r23)
- 0: GETL R23, t0
- 1: ADDL $0x1F0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x2547A6B4: 38600000 li r3,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x2547A6B8: 2B860000 cmpli cr7,r6,0
- 8: GETL R6, t6
- 9: MOVL $0x0, t10
- 10: CMPUL t6, t10, t8 (-rSo)
- 11: ICRFL t8, $0x7, CR
- 12: INCEIPL $4
-
- 0x2547A6BC: 409D0048 bc 4,29,0x2547A704
- 13: Jc29o $0x2547A704
-
-
-. 0 2547A6B0 16
-. 80 D7 01 F0 38 60 00 00 2B 86 00 00 40 9D 00 48
-
-==== BB 890 (0x2547A704) approx BBs exec'd 0 ====
-
- 0x2547A704: 807701E8 lwz r3,488(r23)
- 0: GETL R23, t0
- 1: ADDL $0x1E8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x2547A708: 54A5103A rlwinm r5,r5,2,0,29
- 5: GETL R5, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x2547A70C: 3B000001 li r24,1
- 9: MOVL $0x1, t6
- 10: PUTL t6, R24
- 11: INCEIPL $4
-
- 0x2547A710: 480094D1 bl 0x25483BE0
- 12: MOVL $0x2547A714, t8
- 13: PUTL t8, LR
- 14: JMPo-c $0x25483BE0 ($4)
-
-
-. 0 2547A704 16
-. 80 77 01 E8 54 A5 10 3A 3B 00 00 01 48 00 94 D1
-
-==== BB 891 (0x2547A714) approx BBs exec'd 0 ====
-
- 0x2547A714: 80FF000C lwz r7,12(r31)
- 0: GETL R31, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x2547A718: 7C183840 cmpl cr0,r24,r7
- 5: GETL R24, t4
- 6: GETL R7, t6
- 7: CMPUL t4, t6, t8 (-rSo)
- 8: ICRFL t8, $0x0, CR
- 9: INCEIPL $4
-
- 0x2547A71C: 4080032C bc 4,0,0x2547AA48
- 10: Jc00o $0x2547AA48
-
-
-. 0 2547A714 12
-. 80 FF 00 0C 7C 18 38 40 40 80 03 2C
-
-==== BB 892 (0x2547A720) approx BBs exec'd 0 ====
-
- 0x2547A720: 815701E8 lwz r10,488(r23)
- 0: GETL R23, t0
- 1: ADDL $0x1E8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x2547A724: 82570158 lwz r18,344(r23)
- 5: GETL R23, t4
- 6: ADDL $0x158, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R18
- 9: INCEIPL $4
-
- 0x2547A728: 5715103A rlwinm r21,r24,2,0,29
- 10: GETL R24, t8
- 11: SHLL $0x2, t8
- 12: PUTL t8, R21
- 13: INCEIPL $4
-
- 0x2547A72C: 806A0004 lwz r3,4(r10)
- 14: GETL R10, t10
- 15: ADDL $0x4, t10
- 16: LDL (t10), t12
- 17: PUTL t12, R3
- 18: INCEIPL $4
-
- 0x2547A730: 3B200001 li r25,1
- 19: MOVL $0x1, t14
- 20: PUTL t14, R25
- 21: INCEIPL $4
-
- 0x2547A734: 7F55902E lwzx r26,r21,r18
- 22: GETL R18, t16
- 23: GETL R21, t18
- 24: ADDL t18, t16
- 25: LDL (t16), t20
- 26: PUTL t20, R26
- 27: INCEIPL $4
-
- 0x2547A738: 7F83D000 cmp cr7,r3,r26
- 28: GETL R3, t22
- 29: GETL R26, t24
- 30: CMPL t22, t24, t26 (-rSo)
- 31: ICRFL t26, $0x7, CR
- 32: INCEIPL $4
-
- 0x2547A73C: 419E0018 bc 12,30,0x2547A754
- 33: Js30o $0x2547A754
-
-
-. 0 2547A720 32
-. 81 57 01 E8 82 57 01 58 57 15 10 3A 80 6A 00 04 3B 20 00 01 7F 55 90 2E 7F 83 D0 00 41 9E 00 18
-
-==== BB 893 (0x2547A754) approx BBs exec'd 0 ====
-
- 0x2547A754: 3B790001 addi r27,r25,1
- 0: GETL R25, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R27
- 3: INCEIPL $4
-
- 0x2547A758: 7C9B3840 cmpl cr1,r27,r7
- 4: GETL R27, t2
- 5: GETL R7, t4
- 6: CMPUL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x2547A75C: 4084007C bc 4,4,0x2547A7D8
- 9: Jc04o $0x2547A7D8
-
-
-. 0 2547A754 12
-. 3B 79 00 01 7C 9B 38 40 40 84 00 7C
-
-==== BB 894 (0x2547A760) approx BBs exec'd 0 ====
-
- 0x2547A760: 5768103A rlwinm r8,r27,2,0,29
- 0: GETL R27, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R8
- 3: INCEIPL $4
-
- 0x2547A764: 7E68502E lwzx r19,r8,r10
- 4: GETL R10, t2
- 5: GETL R8, t4
- 6: ADDL t4, t2
- 7: LDL (t2), t6
- 8: PUTL t6, R19
- 9: INCEIPL $4
-
- 0x2547A768: 817301E8 lwz r11,488(r19)
- 10: GETL R19, t8
- 11: ADDL $0x1E8, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R11
- 14: INCEIPL $4
-
- 0x2547A76C: 2F0B0000 cmpi cr6,r11,0
- 15: GETL R11, t12
- 16: CMP0L t12, t14 (-rSo)
- 17: ICRFL t14, $0x6, CR
- 18: INCEIPL $4
-
- 0x2547A770: 419A005C bc 12,26,0x2547A7CC
- 19: Js26o $0x2547A7CC
-
-
-. 0 2547A760 20
-. 57 68 10 3A 7E 68 50 2E 81 73 01 E8 2F 0B 00 00 41 9A 00 5C
-
-==== BB 895 (0x2547A774) approx BBs exec'd 0 ====
-
- 0x2547A774: 812B0000 lwz r9,0(r11)
- 0: GETL R11, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0x2547A778: 2F890000 cmpi cr7,r9,0
- 4: GETL R9, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x7, CR
- 7: INCEIPL $4
-
- 0x2547A77C: 419E0050 bc 12,30,0x2547A7CC
- 8: Js30o $0x2547A7CC
-
-
-. 0 2547A774 12
-. 81 2B 00 00 2F 89 00 00 41 9E 00 50
-
-==== BB 896 (0x2547A780) approx BBs exec'd 0 ====
-
- 0x2547A780: 7E19D850 subf r16,r25,r27
- 0: GETL R25, t0
- 1: GETL R27, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R16
- 4: INCEIPL $4
-
- 0x2547A784: 5605103A rlwinm r5,r16,2,0,29
- 5: GETL R16, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x2547A788: 48000010 b 0x2547A798
- 9: JMPo $0x2547A798 ($4)
-
-
-. 0 2547A780 12
-. 7E 19 D8 50 56 05 10 3A 48 00 00 10
-
-==== BB 897 (0x2547A798) approx BBs exec'd 0 ====
-
- 0x2547A798: 7C09D000 cmp cr0,r9,r26
- 0: GETL R9, t0
- 1: GETL R26, t2
- 2: CMPL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x0, CR
- 4: INCEIPL $4
-
- 0x2547A79C: 396B0004 addi r11,r11,4
- 5: GETL R11, t6
- 6: ADDL $0x4, t6
- 7: PUTL t6, R11
- 8: INCEIPL $4
-
- 0x2547A7A0: 4082FFEC bc 4,2,0x2547A78C
- 9: Jc02o $0x2547A78C
-
-
-. 0 2547A798 12
-. 7C 09 D0 00 39 6B 00 04 40 82 FF EC
-
-==== BB 898 (0x2547A78C) approx BBs exec'd 0 ====
-
- 0x2547A78C: 812B0000 lwz r9,0(r11)
- 0: GETL R11, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0x2547A790: 2C890000 cmpi cr1,r9,0
- 4: GETL R9, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x1, CR
- 7: INCEIPL $4
-
- 0x2547A794: 41860038 bc 12,6,0x2547A7CC
- 8: Js06o $0x2547A7CC
-
-
-. 0 2547A78C 12
-. 81 2B 00 00 2C 89 00 00 41 86 00 38
-
-==== BB 899 (0x2547A7CC) approx BBs exec'd 0 ====
-
- 0x2547A7CC: 3B7B0001 addi r27,r27,1
- 0: GETL R27, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R27
- 3: INCEIPL $4
-
- 0x2547A7D0: 7C9B3840 cmpl cr1,r27,r7
- 4: GETL R27, t2
- 5: GETL R7, t4
- 6: CMPUL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x2547A7D4: 4184FF8C bc 12,4,0x2547A760
- 9: Js04o $0x2547A760
-
-
-. 0 2547A7CC 12
-. 3B 7B 00 01 7C 9B 38 40 41 84 FF 8C
-
-==== BB 900 (0x2547A7D8) approx BBs exec'd 0 ====
-
- 0x2547A7D8: 3B180001 addi r24,r24,1
- 0: GETL R24, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R24
- 3: INCEIPL $4
-
- 0x2547A7DC: 7F183840 cmpl cr6,r24,r7
- 4: GETL R24, t2
- 5: GETL R7, t4
- 6: CMPUL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x2547A7E0: 4198FF44 bc 12,24,0x2547A724
- 9: Js24o $0x2547A724
-
-
-. 0 2547A7D8 12
-. 3B 18 00 01 7F 18 38 40 41 98 FF 44
-
-==== BB 901 (0x2547A724) approx BBs exec'd 0 ====
-
- 0x2547A724: 82570158 lwz r18,344(r23)
- 0: GETL R23, t0
- 1: ADDL $0x158, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R18
- 4: INCEIPL $4
-
- 0x2547A728: 5715103A rlwinm r21,r24,2,0,29
- 5: GETL R24, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R21
- 8: INCEIPL $4
-
- 0x2547A72C: 806A0004 lwz r3,4(r10)
- 9: GETL R10, t6
- 10: ADDL $0x4, t6
- 11: LDL (t6), t8
- 12: PUTL t8, R3
- 13: INCEIPL $4
-
- 0x2547A730: 3B200001 li r25,1
- 14: MOVL $0x1, t10
- 15: PUTL t10, R25
- 16: INCEIPL $4
-
- 0x2547A734: 7F55902E lwzx r26,r21,r18
- 17: GETL R18, t12
- 18: GETL R21, t14
- 19: ADDL t14, t12
- 20: LDL (t12), t16
- 21: PUTL t16, R26
- 22: INCEIPL $4
-
- 0x2547A738: 7F83D000 cmp cr7,r3,r26
- 23: GETL R3, t18
- 24: GETL R26, t20
- 25: CMPL t18, t20, t22 (-rSo)
- 26: ICRFL t22, $0x7, CR
- 27: INCEIPL $4
-
- 0x2547A73C: 419E0018 bc 12,30,0x2547A754
- 28: Js30o $0x2547A754
-
-
-. 0 2547A724 28
-. 82 57 01 58 57 15 10 3A 80 6A 00 04 3B 20 00 01 7F 55 90 2E 7F 83 D0 00 41 9E 00 18
-
-==== BB 902 (0x2547A740) approx BBs exec'd 0 ====
-
- 0x2547A740: 3B390001 addi r25,r25,1
- 0: GETL R25, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R25
- 3: INCEIPL $4
-
- 0x2547A744: 572E103A rlwinm r14,r25,2,0,29
- 4: GETL R25, t2
- 5: SHLL $0x2, t2
- 6: PUTL t2, R14
- 7: INCEIPL $4
-
- 0x2547A748: 7F6E502E lwzx r27,r14,r10
- 8: GETL R10, t4
- 9: GETL R14, t6
- 10: ADDL t6, t4
- 11: LDL (t4), t8
- 12: PUTL t8, R27
- 13: INCEIPL $4
-
- 0x2547A74C: 7F9BD000 cmp cr7,r27,r26
- 14: GETL R27, t10
- 15: GETL R26, t12
- 16: CMPL t10, t12, t14 (-rSo)
- 17: ICRFL t14, $0x7, CR
- 18: INCEIPL $4
-
- 0x2547A750: 409EFFF0 bc 4,30,0x2547A740
- 19: Jc30o $0x2547A740
-
-
-. 0 2547A740 20
-. 3B 39 00 01 57 2E 10 3A 7F 6E 50 2E 7F 9B D0 00 40 9E FF F0
-
-==== BB 903 (0x2547A7E4) approx BBs exec'd 0 ====
-
- 0x2547A7E4: 2F910000 cmpi cr7,r17,0
- 0: GETL R17, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x2547A7E8: 54F7103A rlwinm r23,r7,2,0,29
- 4: GETL R7, t4
- 5: SHLL $0x2, t4
- 6: PUTL t4, R23
- 7: INCEIPL $4
-
- 0x2547A7EC: 3B400000 li r26,0
- 8: MOVL $0x0, t6
- 9: PUTL t6, R26
- 10: INCEIPL $4
-
- 0x2547A7F0: 7F57512E stwx r26,r23,r10
- 11: GETL R10, t8
- 12: GETL R23, t10
- 13: ADDL t10, t8
- 14: GETL R26, t12
- 15: STL t12, (t8)
- 16: INCEIPL $4
-
- 0x2547A7F4: 409E06DC bc 4,30,0x2547AED0
- 17: Jc30o $0x2547AED0
-
-
-. 0 2547A7E4 20
-. 2F 91 00 00 54 F7 10 3A 3B 40 00 00 7F 57 51 2E 40 9E 06 DC
-
-==== BB 904 (0x2547A7F8) approx BBs exec'd 0 ====
-
- 0x2547A7F8: 81010000 lwz r8,0(r1)
- 0: GETL R1, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R8
- 3: INCEIPL $4
-
- 0x2547A7FC: 82280004 lwz r17,4(r8)
- 4: GETL R8, t4
- 5: ADDL $0x4, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R17
- 8: INCEIPL $4
-
- 0x2547A800: 81C8FFB8 lwz r14,-72(r8)
- 9: GETL R8, t8
- 10: ADDL $0xFFFFFFB8, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R14
- 13: INCEIPL $4
-
- 0x2547A804: 7E2803A6 mtlr r17
- 14: GETL R17, t12
- 15: PUTL t12, LR
- 16: INCEIPL $4
-
- 0x2547A808: 81E8FFBC lwz r15,-68(r8)
- 17: GETL R8, t14
- 18: ADDL $0xFFFFFFBC, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R15
- 21: INCEIPL $4
-
- 0x2547A80C: 8208FFC0 lwz r16,-64(r8)
- 22: GETL R8, t18
- 23: ADDL $0xFFFFFFC0, t18
- 24: LDL (t18), t20
- 25: PUTL t20, R16
- 26: INCEIPL $4
-
- 0x2547A810: 8228FFC4 lwz r17,-60(r8)
- 27: GETL R8, t22
- 28: ADDL $0xFFFFFFC4, t22
- 29: LDL (t22), t24
- 30: PUTL t24, R17
- 31: INCEIPL $4
-
- 0x2547A814: 8248FFC8 lwz r18,-56(r8)
- 32: GETL R8, t26
- 33: ADDL $0xFFFFFFC8, t26
- 34: LDL (t26), t28
- 35: PUTL t28, R18
- 36: INCEIPL $4
-
- 0x2547A818: 8268FFCC lwz r19,-52(r8)
- 37: GETL R8, t30
- 38: ADDL $0xFFFFFFCC, t30
- 39: LDL (t30), t32
- 40: PUTL t32, R19
- 41: INCEIPL $4
-
- 0x2547A81C: 8288FFD0 lwz r20,-48(r8)
- 42: GETL R8, t34
- 43: ADDL $0xFFFFFFD0, t34
- 44: LDL (t34), t36
- 45: PUTL t36, R20
- 46: INCEIPL $4
-
- 0x2547A820: 82A8FFD4 lwz r21,-44(r8)
- 47: GETL R8, t38
- 48: ADDL $0xFFFFFFD4, t38
- 49: LDL (t38), t40
- 50: PUTL t40, R21
- 51: INCEIPL $4
-
- 0x2547A824: 82C8FFD8 lwz r22,-40(r8)
- 52: GETL R8, t42
- 53: ADDL $0xFFFFFFD8, t42
- 54: LDL (t42), t44
- 55: PUTL t44, R22
- 56: INCEIPL $4
-
- 0x2547A828: 82E8FFDC lwz r23,-36(r8)
- 57: GETL R8, t46
- 58: ADDL $0xFFFFFFDC, t46
- 59: LDL (t46), t48
- 60: PUTL t48, R23
- 61: INCEIPL $4
-
- 0x2547A82C: 8308FFE0 lwz r24,-32(r8)
- 62: GETL R8, t50
- 63: ADDL $0xFFFFFFE0, t50
- 64: LDL (t50), t52
- 65: PUTL t52, R24
- 66: INCEIPL $4
-
- 0x2547A830: 8328FFE4 lwz r25,-28(r8)
- 67: GETL R8, t54
- 68: ADDL $0xFFFFFFE4, t54
- 69: LDL (t54), t56
- 70: PUTL t56, R25
- 71: INCEIPL $4
-
- 0x2547A834: 8348FFE8 lwz r26,-24(r8)
- 72: GETL R8, t58
- 73: ADDL $0xFFFFFFE8, t58
- 74: LDL (t58), t60
- 75: PUTL t60, R26
- 76: INCEIPL $4
-
- 0x2547A838: 8368FFEC lwz r27,-20(r8)
- 77: GETL R8, t62
- 78: ADDL $0xFFFFFFEC, t62
- 79: LDL (t62), t64
- 80: PUTL t64, R27
- 81: INCEIPL $4
-
- 0x2547A83C: 8388FFF0 lwz r28,-16(r8)
- 82: GETL R8, t66
- 83: ADDL $0xFFFFFFF0, t66
- 84: LDL (t66), t68
- 85: PUTL t68, R28
- 86: INCEIPL $4
-
- 0x2547A840: 83A8FFF4 lwz r29,-12(r8)
- 87: GETL R8, t70
- 88: ADDL $0xFFFFFFF4, t70
- 89: LDL (t70), t72
- 90: PUTL t72, R29
- 91: INCEIPL $4
-
- 0x2547A844: 83C8FFF8 lwz r30,-8(r8)
- 92: GETL R8, t74
- 93: ADDL $0xFFFFFFF8, t74
- 94: LDL (t74), t76
- 95: PUTL t76, R30
- 96: INCEIPL $4
-
- 0x2547A848: 83E8FFFC lwz r31,-4(r8)
- 97: GETL R8, t78
- 98: ADDL $0xFFFFFFFC, t78
- 99: LDL (t78), t80
- 100: PUTL t80, R31
- 101: INCEIPL $4
-
- 0x2547A84C: 7D014378 or r1,r8,r8
- 102: GETL R8, t82
- 103: PUTL t82, R1
- 104: INCEIPL $4
-
- 0x2547A850: 4E800020 blr
- 105: GETL LR, t84
- 106: JMPo-r t84 ($4)
-
-
-. 0 2547A7F8 92
-. 81 01 00 00 82 28 00 04 81 C8 FF B8 7E 28 03 A6 81 E8 FF BC 82 08 FF C0 82 28 FF C4 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
-
-==== BB 905 (0x254727E4) approx BBs exec'd 0 ====
-
- 0x254727E4: 80F4015C lwz r7,348(r20)
- 0: GETL R20, t0
- 1: ADDL $0x15C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x254727E8: 2C870000 cmpi cr1,r7,0
- 5: GETL R7, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x254727EC: 4186003C bc 12,6,0x25472828
- 9: Js06o $0x25472828
-
-
-. 0 254727E4 12
-. 80 F4 01 5C 2C 87 00 00 41 86 00 3C
-
-==== BB 906 (0x254727F0) approx BBs exec'd 0 ====
-
- 0x254727F0: 81140158 lwz r8,344(r20)
- 0: GETL R20, t0
- 1: ADDL $0x158, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x254727F4: 7CE903A6 mtctr r7
- 5: GETL R7, t4
- 6: PUTL t4, CTR
- 7: INCEIPL $4
-
- 0x254727F8: 38E7FFFF addi r7,r7,-1
- 8: GETL R7, t6
- 9: ADDL $0xFFFFFFFF, t6
- 10: PUTL t6, R7
- 11: INCEIPL $4
-
- 0x254727FC: 54F1103A rlwinm r17,r7,2,0,29
- 12: GETL R7, t8
- 13: SHLL $0x2, t8
- 14: PUTL t8, R17
- 15: INCEIPL $4
-
- 0x25472800: 7F11402E lwzx r24,r17,r8
- 16: GETL R8, t10
- 17: GETL R17, t12
- 18: ADDL t12, t10
- 19: LDL (t10), t14
- 20: PUTL t14, R24
- 21: INCEIPL $4
-
- 0x25472804: 82B80180 lwz r21,384(r24)
- 22: GETL R24, t16
- 23: ADDL $0x180, t16
- 24: LDL (t16), t18
- 25: PUTL t18, R21
- 26: INCEIPL $4
-
- 0x25472808: 66A80800 oris r8,r21,0x800
- 27: GETL R21, t20
- 28: ORL $0x8000000, t20
- 29: PUTL t20, R8
- 30: INCEIPL $4
-
- 0x2547280C: 91180180 stw r8,384(r24)
- 31: GETL R8, t22
- 32: GETL R24, t24
- 33: ADDL $0x180, t24
- 34: STL t22, (t24)
- 35: INCEIPL $4
-
- 0x25472810: 81140158 lwz r8,344(r20)
- 36: GETL R20, t26
- 37: ADDL $0x158, t26
- 38: LDL (t26), t28
- 39: PUTL t28, R8
- 40: INCEIPL $4
-
- 0x25472814: 7F31402E lwzx r25,r17,r8
- 41: GETL R8, t30
- 42: GETL R17, t32
- 43: ADDL t32, t30
- 44: LDL (t30), t34
- 45: PUTL t34, R25
- 46: INCEIPL $4
-
- 0x25472818: 81390178 lwz r9,376(r25)
- 47: GETL R25, t36
- 48: ADDL $0x178, t36
- 49: LDL (t36), t38
- 50: PUTL t38, R9
- 51: INCEIPL $4
-
- 0x2547281C: 3B890001 addi r28,r9,1
- 52: GETL R9, t40
- 53: ADDL $0x1, t40
- 54: PUTL t40, R28
- 55: INCEIPL $4
-
- 0x25472820: 93990178 stw r28,376(r25)
- 56: GETL R28, t42
- 57: GETL R25, t44
- 58: ADDL $0x178, t44
- 59: STL t42, (t44)
- 60: INCEIPL $4
-
- 0x25472824: 4200FFD4 bc 16,0,0x254727F8
- 61: GETL CTR, t46
- 62: ADDL $0xFFFFFFFF, t46
- 63: PUTL t46, CTR
- 64: JIFZL t46, $0x25472828
- 65: JMPo $0x254727F8 ($4)
-
-
-. 0 254727F0 56
-. 81 14 01 58 7C E9 03 A6 38 E7 FF FF 54 F1 10 3A 7F 11 40 2E 82 B8 01 80 66 A8 08 00 91 18 01 80 81 14 01 58 7F 31 40 2E 81 39 01 78 3B 89 00 01 93 99 01 78 42 00 FF D4
-
-==== BB 907 (0x254727F8) approx BBs exec'd 0 ====
-
- 0x254727F8: 38E7FFFF addi r7,r7,-1
- 0: GETL R7, t0
- 1: ADDL $0xFFFFFFFF, t0
- 2: PUTL t0, R7
- 3: INCEIPL $4
-
- 0x254727FC: 54F1103A rlwinm r17,r7,2,0,29
- 4: GETL R7, t2
- 5: SHLL $0x2, t2
- 6: PUTL t2, R17
- 7: INCEIPL $4
-
- 0x25472800: 7F11402E lwzx r24,r17,r8
- 8: GETL R8, t4
- 9: GETL R17, t6
- 10: ADDL t6, t4
- 11: LDL (t4), t8
- 12: PUTL t8, R24
- 13: INCEIPL $4
-
- 0x25472804: 82B80180 lwz r21,384(r24)
- 14: GETL R24, t10
- 15: ADDL $0x180, t10
- 16: LDL (t10), t12
- 17: PUTL t12, R21
- 18: INCEIPL $4
-
- 0x25472808: 66A80800 oris r8,r21,0x800
- 19: GETL R21, t14
- 20: ORL $0x8000000, t14
- 21: PUTL t14, R8
- 22: INCEIPL $4
-
- 0x2547280C: 91180180 stw r8,384(r24)
- 23: GETL R8, t16
- 24: GETL R24, t18
- 25: ADDL $0x180, t18
- 26: STL t16, (t18)
- 27: INCEIPL $4
-
- 0x25472810: 81140158 lwz r8,344(r20)
- 28: GETL R20, t20
- 29: ADDL $0x158, t20
- 30: LDL (t20), t22
- 31: PUTL t22, R8
- 32: INCEIPL $4
-
- 0x25472814: 7F31402E lwzx r25,r17,r8
- 33: GETL R8, t24
- 34: GETL R17, t26
- 35: ADDL t26, t24
- 36: LDL (t24), t28
- 37: PUTL t28, R25
- 38: INCEIPL $4
-
- 0x25472818: 81390178 lwz r9,376(r25)
- 39: GETL R25, t30
- 40: ADDL $0x178, t30
- 41: LDL (t30), t32
- 42: PUTL t32, R9
- 43: INCEIPL $4
-
- 0x2547281C: 3B890001 addi r28,r9,1
- 44: GETL R9, t34
- 45: ADDL $0x1, t34
- 46: PUTL t34, R28
- 47: INCEIPL $4
-
- 0x25472820: 93990178 stw r28,376(r25)
- 48: GETL R28, t36
- 49: GETL R25, t38
- 50: ADDL $0x178, t38
- 51: STL t36, (t38)
- 52: INCEIPL $4
-
- 0x25472824: 4200FFD4 bc 16,0,0x254727F8
- 53: GETL CTR, t40
- 54: ADDL $0xFFFFFFFF, t40
- 55: PUTL t40, CTR
- 56: JIFZL t40, $0x25472828
- 57: JMPo $0x254727F8 ($4)
-
-
-. 0 254727F8 48
-. 38 E7 FF FF 54 F1 10 3A 7F 11 40 2E 82 B8 01 80 66 A8 08 00 91 18 01 80 81 14 01 58 7F 31 40 2E 81 39 01 78 3B 89 00 01 93 99 01 78 42 00 FF D4
-
-==== BB 908 (0x25472828) approx BBs exec'd 0 ====
-
- 0x25472828: 816E01C8 lwz r11,456(r14)
- 0: GETL R14, t0
- 1: ADDL $0x1C8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547282C: 80EE01C4 lwz r7,452(r14)
- 5: GETL R14, t4
- 6: ADDL $0x1C4, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R7
- 9: INCEIPL $4
-
- 0x25472830: 90EB000C stw r7,12(r11)
- 10: GETL R7, t8
- 11: GETL R11, t10
- 12: ADDL $0xC, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x25472834: 812E01C4 lwz r9,452(r14)
- 15: GETL R14, t12
- 16: ADDL $0x1C4, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25472838: 2E090000 cmpi cr4,r9,0
- 20: GETL R9, t16
- 21: CMP0L t16, t18 (-rSo)
- 22: ICRFL t18, $0x4, CR
- 23: INCEIPL $4
-
- 0x2547283C: 41920008 bc 12,18,0x25472844
- 24: Js18o $0x25472844
-
-
-. 0 25472828 24
-. 81 6E 01 C8 80 EE 01 C4 90 EB 00 0C 81 2E 01 C4 2E 09 00 00 41 92 00 08
-
-==== BB 909 (0x25472840) approx BBs exec'd 0 ====
-
- 0x25472840: 91690010 stw r11,16(r9)
- 0: GETL R11, t0
- 1: GETL R9, t2
- 2: ADDL $0x10, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25472844: 814E0330 lwz r10,816(r14)
- 5: GETL R14, t4
- 6: ADDL $0x330, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R10
- 9: INCEIPL $4
-
- 0x25472848: 2B0A0001 cmpli cr6,r10,1
- 10: GETL R10, t8
- 11: MOVL $0x1, t12
- 12: CMPUL t8, t12, t10 (-rSo)
- 13: ICRFL t10, $0x6, CR
- 14: INCEIPL $4
-
- 0x2547284C: 40991358 bc 4,25,0x25473BA4
- 15: Jc25o $0x25473BA4
-
-
-. 0 25472840 16
-. 91 69 00 10 81 4E 03 30 2B 0A 00 01 40 99 13 58
-
-==== BB 910 (0x25472850) approx BBs exec'd 0 ====
-
- 0x25472850: 81540158 lwz r10,344(r20)
- 0: GETL R20, t0
- 1: ADDL $0x158, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x25472854: 390E01B8 addi r8,r14,440
- 5: GETL R14, t4
- 6: ADDL $0x1B8, t4
- 7: PUTL t4, R8
- 8: INCEIPL $4
-
- 0x25472858: 39200001 li r9,1
- 9: MOVL $0x1, t6
- 10: PUTL t6, R9
- 11: INCEIPL $4
-
- 0x2547285C: 39600004 li r11,4
- 12: MOVL $0x4, t8
- 13: PUTL t8, R11
- 14: INCEIPL $4
-
- 0x25472860: 806A0004 lwz r3,4(r10)
- 15: GETL R10, t10
- 16: ADDL $0x4, t10
- 17: LDL (t10), t12
- 18: PUTL t12, R3
- 19: INCEIPL $4
-
- 0x25472864: 7F834000 cmp cr7,r3,r8
- 20: GETL R3, t14
- 21: GETL R8, t16
- 22: CMPL t14, t16, t18 (-rSo)
- 23: ICRFL t18, $0x7, CR
- 24: INCEIPL $4
-
- 0x25472868: 419E0018 bc 12,30,0x25472880
- 25: Js30o $0x25472880
-
-
-. 0 25472850 28
-. 81 54 01 58 39 0E 01 B8 39 20 00 01 39 60 00 04 80 6A 00 04 7F 83 40 00 41 9E 00 18
-
-==== BB 911 (0x2547286C) approx BBs exec'd 0 ====
-
- 0x2547286C: 39290001 addi r9,r9,1
- 0: GETL R9, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R9
- 3: INCEIPL $4
-
- 0x25472870: 552B103A rlwinm r11,r9,2,0,29
- 4: GETL R9, t2
- 5: SHLL $0x2, t2
- 6: PUTL t2, R11
- 7: INCEIPL $4
-
- 0x25472874: 7C8B502E lwzx r4,r11,r10
- 8: GETL R10, t4
- 9: GETL R11, t6
- 10: ADDL t6, t4
- 11: LDL (t4), t8
- 12: PUTL t8, R4
- 13: INCEIPL $4
-
- 0x25472878: 7F844000 cmp cr7,r4,r8
- 14: GETL R4, t10
- 15: GETL R8, t12
- 16: CMPL t10, t12, t14 (-rSo)
- 17: ICRFL t14, $0x7, CR
- 18: INCEIPL $4
-
- 0x2547287C: 409EFFF0 bc 4,30,0x2547286C
- 19: Jc30o $0x2547286C
-
-
-. 0 2547286C 20
-. 39 29 00 01 55 2B 10 3A 7C 8B 50 2E 7F 84 40 00 40 9E FF F0
-
-==== BB 912 (0x25472880) approx BBs exec'd 0 ====
-
- 0x25472880: 811F0030 lwz r8,48(r31)
- 0: GETL R31, t0
- 1: ADDL $0x30, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x25472884: 7D4B5214 add r10,r11,r10
- 5: GETL R11, t4
- 6: GETL R10, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R10
- 9: INCEIPL $4
-
- 0x25472888: 816AFFFC lwz r11,-4(r10)
- 10: GETL R10, t8
- 11: ADDL $0xFFFFFFFC, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R11
- 14: INCEIPL $4
-
- 0x2547288C: 2C080000 cmpi cr0,r8,0
- 15: GETL R8, t12
- 16: CMP0L t12, t14 (-rSo)
- 17: ICRFL t14, $0x0, CR
- 18: INCEIPL $4
-
- 0x25472890: 916E01C8 stw r11,456(r14)
- 19: GETL R11, t16
- 20: GETL R14, t18
- 21: ADDL $0x1C8, t18
- 22: STL t16, (t18)
- 23: INCEIPL $4
-
- 0x25472894: 40820F34 bc 4,2,0x254737C8
- 24: Jc02o $0x254737C8
-
-
-. 0 25472880 24
-. 81 1F 00 30 7D 4B 52 14 81 6A FF FC 2C 08 00 00 91 6E 01 C8 40 82 0F 34
-
-==== BB 913 (0x25472898) approx BBs exec'd 0 ====
-
- 0x25472898: 8274015C lwz r19,348(r20)
- 0: GETL R20, t0
- 1: ADDL $0x15C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R19
- 4: INCEIPL $4
-
- 0x2547289C: 3AE90001 addi r23,r9,1
- 5: GETL R9, t4
- 6: ADDL $0x1, t4
- 7: PUTL t4, R23
- 8: INCEIPL $4
-
- 0x254728A0: 38000000 li r0,0
- 9: MOVL $0x0, t6
- 10: PUTL t6, R0
- 11: INCEIPL $4
-
- 0x254728A4: 7DC97378 or r9,r14,r14
- 12: GETL R14, t8
- 13: PUTL t8, R9
- 14: INCEIPL $4
-
- 0x254728A8: 7F979840 cmpl cr7,r23,r19
- 15: GETL R23, t10
- 16: GETL R19, t12
- 17: CMPUL t10, t12, t14 (-rSo)
- 18: ICRFL t14, $0x7, CR
- 19: INCEIPL $4
-
- 0x254728AC: 409C0008 bc 4,28,0x254728B4
- 20: Jc28o $0x254728B4
-
-
-. 0 25472898 24
-. 82 74 01 5C 3A E9 00 01 38 00 00 00 7D C9 73 78 7F 97 98 40 40 9C 00 08
-
-==== BB 914 (0x254728B4) approx BBs exec'd 0 ====
-
- 0x254728B4: 900901C4 stw r0,452(r9)
- 0: GETL R0, t0
- 1: GETL R9, t2
- 2: ADDL $0x1C4, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x254728B8: 820E01C8 lwz r16,456(r14)
- 5: GETL R14, t4
- 6: ADDL $0x1C8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R16
- 9: INCEIPL $4
-
- 0x254728BC: 380E01B8 addi r0,r14,440
- 10: GETL R14, t8
- 11: ADDL $0x1B8, t8
- 12: PUTL t8, R0
- 13: INCEIPL $4
-
- 0x254728C0: 9010000C stw r0,12(r16)
- 14: GETL R0, t10
- 15: GETL R16, t12
- 16: ADDL $0xC, t12
- 17: STL t10, (t12)
- 18: INCEIPL $4
-
- 0x254728C4: 812E01C4 lwz r9,452(r14)
- 19: GETL R14, t14
- 20: ADDL $0x1C4, t14
- 21: LDL (t14), t16
- 22: PUTL t16, R9
- 23: INCEIPL $4
-
- 0x254728C8: 2C890000 cmpi cr1,r9,0
- 24: GETL R9, t18
- 25: CMP0L t18, t20 (-rSo)
- 26: ICRFL t20, $0x1, CR
- 27: INCEIPL $4
-
- 0x254728CC: 41860008 bc 12,6,0x254728D4
- 28: Js06o $0x254728D4
-
-
-. 0 254728B4 28
-. 90 09 01 C4 82 0E 01 C8 38 0E 01 B8 90 10 00 0C 81 2E 01 C4 2C 89 00 00 41 86 00 08
-
-==== BB 915 (0x254728D4) approx BBs exec'd 0 ====
-
- 0x254728D4: 807E002C lwz r3,44(r30)
- 0: GETL R30, t0
- 1: ADDL $0x2C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x254728D8: 691A0003 xori r26,r8,0x3
- 5: GETL R8, t4
- 6: XORL $0x3, t4
- 7: PUTL t4, R26
- 8: INCEIPL $4
-
- 0x254728DC: 201A0000 subfic r0,r26,0
- 9: GETL R26, t6
- 10: MOVL $0x0, t8
- 11: SBBL t6, t8 (-wCa)
- 12: PUTL t8, R0
- 13: INCEIPL $4
-
- 0x254728E0: 7F40D114 adde r26,r0,r26
- 14: GETL R0, t10
- 15: GETL R26, t12
- 16: ADCL t10, t12 (-rCa-wCa)
- 17: PUTL t12, R26
- 18: INCEIPL $4
-
- 0x254728E4: 809E0014 lwz r4,20(r30)
- 19: GETL R30, t14
- 20: ADDL $0x14, t14
- 21: LDL (t14), t16
- 22: PUTL t16, R4
- 23: INCEIPL $4
-
- 0x254728E8: 21480000 subfic r10,r8,0
- 24: GETL R8, t18
- 25: MOVL $0x0, t20
- 26: SBBL t18, t20 (-wCa)
- 27: PUTL t20, R10
- 28: INCEIPL $4
-
- 0x254728EC: 7FAA4114 adde r29,r10,r8
- 29: GETL R10, t22
- 30: GETL R8, t24
- 31: ADCL t22, t24 (-rCa-wCa)
- 32: PUTL t24, R29
- 33: INCEIPL $4
-
- 0x254728F0: 38BF0058 addi r5,r31,88
- 34: GETL R31, t26
- 35: ADDL $0x58, t26
- 36: PUTL t26, R5
- 37: INCEIPL $4
-
- 0x254728F4: 93BF0058 stw r29,88(r31)
- 38: GETL R29, t28
- 39: GETL R31, t30
- 40: ADDL $0x58, t30
- 41: STL t28, (t30)
- 42: INCEIPL $4
-
- 0x254728F8: 935F005C stw r26,92(r31)
- 43: GETL R26, t32
- 44: GETL R31, t34
- 45: ADDL $0x5C, t34
- 46: STL t32, (t34)
- 47: INCEIPL $4
-
- 0x254728FC: 48008D9D bl 0x2547B698
- 48: MOVL $0x25472900, t36
- 49: PUTL t36, LR
- 50: JMPo-c $0x2547B698 ($4)
-
-
-. 0 254728D4 44
-. 80 7E 00 2C 69 1A 00 03 20 1A 00 00 7F 40 D1 14 80 9E 00 14 21 48 00 00 7F AA 41 14 38 BF 00 58 93 BF 00 58 93 5F 00 5C 48 00 8D 9D
-
-==== BB 916 _dl_receive_error(0x2547B698) approx BBs exec'd 0 ====
-
- 0x2547B698: 9421FFD0 stwu r1,-48(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFD0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547B69C: 7CC802A6 mflr r6
- 6: GETL LR, t4
- 7: PUTL t4, R6
- 8: INCEIPL $4
-
- 0x2547B6A0: 4801B961 bl 0x25497000
- 9: MOVL $0x2547B6A4, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547B698 12
-. 94 21 FF D0 7C C8 02 A6 48 01 B9 61
-
-==== BB 917 (0x2547B6A4) approx BBs exec'd 0 ====
-
- 0x2547B6A4: 93C10028 stw r30,40(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x28, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547B6A8: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x2547B6AC: 9361001C stw r27,28(r1)
- 8: GETL R27, t6
- 9: GETL R1, t8
- 10: ADDL $0x1C, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2547B6B0: 7CBB2B78 or r27,r5,r5
- 13: GETL R5, t10
- 14: PUTL t10, R27
- 15: INCEIPL $4
-
- 0x2547B6B4: 90C10034 stw r6,52(r1)
- 16: GETL R6, t12
- 17: GETL R1, t14
- 18: ADDL $0x34, t14
- 19: STL t12, (t14)
- 20: INCEIPL $4
-
- 0x2547B6B8: 92E1000C stw r23,12(r1)
- 21: GETL R23, t16
- 22: GETL R1, t18
- 23: ADDL $0xC, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x2547B6BC: 7C972378 or r23,r4,r4
- 26: GETL R4, t20
- 27: PUTL t20, R23
- 28: INCEIPL $4
-
- 0x2547B6C0: 80BE04C8 lwz r5,1224(r30)
- 29: GETL R30, t22
- 30: ADDL $0x4C8, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R5
- 33: INCEIPL $4
-
- 0x2547B6C4: 93210014 stw r25,20(r1)
- 34: GETL R25, t26
- 35: GETL R1, t28
- 36: ADDL $0x14, t28
- 37: STL t26, (t28)
- 38: INCEIPL $4
-
- 0x2547B6C8: 7C791B78 or r25,r3,r3
- 39: GETL R3, t30
- 40: PUTL t30, R25
- 41: INCEIPL $4
-
- 0x2547B6CC: 812501B4 lwz r9,436(r5)
- 42: GETL R5, t32
- 43: ADDL $0x1B4, t32
- 44: LDL (t32), t34
- 45: PUTL t34, R9
- 46: INCEIPL $4
-
- 0x2547B6D0: 93410018 stw r26,24(r1)
- 47: GETL R26, t36
- 48: GETL R1, t38
- 49: ADDL $0x18, t38
- 50: STL t36, (t38)
- 51: INCEIPL $4
-
- 0x2547B6D4: 93810020 stw r28,32(r1)
- 52: GETL R28, t40
- 53: GETL R1, t42
- 54: ADDL $0x20, t42
- 55: STL t40, (t42)
- 56: INCEIPL $4
-
- 0x2547B6D8: 7D2903A6 mtctr r9
- 57: GETL R9, t44
- 58: PUTL t44, CTR
- 59: INCEIPL $4
-
- 0x2547B6DC: 93A10024 stw r29,36(r1)
- 60: GETL R29, t46
- 61: GETL R1, t48
- 62: ADDL $0x24, t48
- 63: STL t46, (t48)
- 64: INCEIPL $4
-
- 0x2547B6E0: 839E031C lwz r28,796(r30)
- 65: GETL R30, t50
- 66: ADDL $0x31C, t50
- 67: LDL (t50), t52
- 68: PUTL t52, R28
- 69: INCEIPL $4
-
- 0x2547B6E4: 4E800421 bctrl
- 70: MOVL $0x2547B6E8, t54
- 71: PUTL t54, LR
- 72: GETL CTR, t56
- 73: JMPo-c t56 ($4)
-
-
-. 0 2547B6A4 68
-. 93 C1 00 28 7F C8 02 A6 93 61 00 1C 7C BB 2B 78 90 C1 00 34 92 E1 00 0C 7C 97 23 78 80 BE 04 C8 93 21 00 14 7C 79 1B 78 81 25 01 B4 93 41 00 18 93 81 00 20 7D 29 03 A6 93 A1 00 24 83 9E 03 1C 4E 80 04 21
-
-==== BB 918 (0x2547B6E8) approx BBs exec'd 0 ====
-
- 0x2547B6E8: 38800000 li r4,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x2547B6EC: 7C7D1B78 or r29,r3,r3
- 3: GETL R3, t2
- 4: PUTL t2, R29
- 5: INCEIPL $4
-
- 0x2547B6F0: 7EE803A6 mtlr r23
- 6: GETL R23, t4
- 7: PUTL t4, LR
- 8: INCEIPL $4
-
- 0x2547B6F4: 835D0000 lwz r26,0(r29)
- 9: GETL R29, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R26
- 12: INCEIPL $4
-
- 0x2547B6F8: 7F63DB78 or r3,r27,r27
- 13: GETL R27, t10
- 14: PUTL t10, R3
- 15: INCEIPL $4
-
- 0x2547B6FC: 909D0000 stw r4,0(r29)
- 16: GETL R4, t12
- 17: GETL R29, t14
- 18: STL t12, (t14)
- 19: INCEIPL $4
-
- 0x2547B700: 837C0000 lwz r27,0(r28)
- 20: GETL R28, t16
- 21: LDL (t16), t18
- 22: PUTL t18, R27
- 23: INCEIPL $4
-
- 0x2547B704: 933C0000 stw r25,0(r28)
- 24: GETL R25, t20
- 25: GETL R28, t22
- 26: STL t20, (t22)
- 27: INCEIPL $4
-
- 0x2547B708: 4E800021 blrl
- 28: GETL LR, t24
- 29: MOVL $0x2547B70C, t26
- 30: PUTL t26, LR
- 31: JMPo-r t24 ($4)
-
-
-. 0 2547B6E8 36
-. 38 80 00 00 7C 7D 1B 78 7E E8 03 A6 83 5D 00 00 7F 63 DB 78 90 9D 00 00 83 7C 00 00 93 3C 00 00 4E 80 00 21
-
-==== BB 919 version_check_doit(0x254717D4) approx BBs exec'd 0 ====
-
- 0x254717D4: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x254717D8: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x254717DC: 48025825 bl 0x25497000
- 9: MOVL $0x254717E0, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 254717D4 12
-. 94 21 FF E0 7C 08 02 A6 48 02 58 25
-
-==== BB 920 (0x254717E0) approx BBs exec'd 0 ====
-
- 0x254717E0: 93C10018 stw r30,24(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x18, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x254717E4: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x254717E8: 93E1001C stw r31,28(r1)
- 8: GETL R31, t6
- 9: GETL R1, t8
- 10: ADDL $0x1C, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x254717EC: 90010024 stw r0,36(r1)
- 13: GETL R0, t10
- 14: GETL R1, t12
- 15: ADDL $0x24, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x254717F0: 7C7F1B78 or r31,r3,r3
- 18: GETL R3, t14
- 19: PUTL t14, R31
- 20: INCEIPL $4
-
- 0x254717F4: 80BF0004 lwz r5,4(r31)
- 21: GETL R31, t16
- 22: ADDL $0x4, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R5
- 25: INCEIPL $4
-
- 0x254717F8: 38800001 li r4,1
- 26: MOVL $0x1, t20
- 27: PUTL t20, R4
- 28: INCEIPL $4
-
- 0x254717FC: 813E04C8 lwz r9,1224(r30)
- 29: GETL R30, t22
- 30: ADDL $0x4C8, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R9
- 33: INCEIPL $4
-
- 0x25471800: 93A10014 stw r29,20(r1)
- 34: GETL R29, t26
- 35: GETL R1, t28
- 36: ADDL $0x14, t28
- 37: STL t26, (t28)
- 38: INCEIPL $4
-
- 0x25471804: 80690000 lwz r3,0(r9)
- 39: GETL R9, t30
- 40: LDL (t30), t32
- 41: PUTL t32, R3
- 42: INCEIPL $4
-
- 0x25471808: 4800B7C1 bl 0x2547CFC8
- 43: MOVL $0x2547180C, t34
- 44: PUTL t34, LR
- 45: JMPo-c $0x2547CFC8 ($4)
-
-
-. 0 254717E0 44
-. 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 90 01 00 24 7C 7F 1B 78 80 BF 00 04 38 80 00 01 81 3E 04 C8 93 A1 00 14 80 69 00 00 48 00 B7 C1
-
-==== BB 921 _dl_check_all_versions(0x2547CFC8) approx BBs exec'd 0 ====
-
- 0x2547CFC8: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547CFCC: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x2547CFD0: 93E1001C stw r31,28(r1)
- 9: GETL R31, t6
- 10: GETL R1, t8
- 11: ADDL $0x1C, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547CFD4: 7C7F1B79 or. r31,r3,r3
- 14: GETL R3, t10
- 15: PUTL t10, R31
- 16: CMP0L t10, t12 (-rSo)
- 17: ICRFL t12, $0x0, CR
- 18: INCEIPL $4
-
- 0x2547CFD8: 93410008 stw r26,8(r1)
- 19: GETL R26, t14
- 20: GETL R1, t16
- 21: ADDL $0x8, t16
- 22: STL t14, (t16)
- 23: INCEIPL $4
-
- 0x2547CFDC: 7C9A2378 or r26,r4,r4
- 24: GETL R4, t18
- 25: PUTL t18, R26
- 26: INCEIPL $4
-
- 0x2547CFE0: 9361000C stw r27,12(r1)
- 27: GETL R27, t20
- 28: GETL R1, t22
- 29: ADDL $0xC, t22
- 30: STL t20, (t22)
- 31: INCEIPL $4
-
- 0x2547CFE4: 7CBB2B78 or r27,r5,r5
- 32: GETL R5, t24
- 33: PUTL t24, R27
- 34: INCEIPL $4
-
- 0x2547CFE8: 93810010 stw r28,16(r1)
- 35: GETL R28, t26
- 36: GETL R1, t28
- 37: ADDL $0x10, t28
- 38: STL t26, (t28)
- 39: INCEIPL $4
-
- 0x2547CFEC: 3B800000 li r28,0
- 40: MOVL $0x0, t30
- 41: PUTL t30, R28
- 42: INCEIPL $4
-
- 0x2547CFF0: 93A10014 stw r29,20(r1)
- 43: GETL R29, t32
- 44: GETL R1, t34
- 45: ADDL $0x14, t34
- 46: STL t32, (t34)
- 47: INCEIPL $4
-
- 0x2547CFF4: 93C10018 stw r30,24(r1)
- 48: GETL R30, t36
- 49: GETL R1, t38
- 50: ADDL $0x18, t38
- 51: STL t36, (t38)
- 52: INCEIPL $4
-
- 0x2547CFF8: 90010024 stw r0,36(r1)
- 53: GETL R0, t40
- 54: GETL R1, t42
- 55: ADDL $0x24, t42
- 56: STL t40, (t42)
- 57: INCEIPL $4
-
- 0x2547CFFC: 40A20018 bc 5,2,0x2547D014
- 58: Jc02o $0x2547D014
-
-
-. 0 2547CFC8 56
-. 94 21 FF E0 7C 08 02 A6 93 E1 00 1C 7C 7F 1B 79 93 41 00 08 7C 9A 23 78 93 61 00 0C 7C BB 2B 78 93 81 00 10 3B 80 00 00 93 A1 00 14 93 C1 00 18 90 01 00 24 40 A2 00 18
-
-==== BB 922 (0x2547D014) approx BBs exec'd 0 ====
-
- 0x2547D014: 80DF0180 lwz r6,384(r31)
- 0: GETL R31, t0
- 1: ADDL $0x180, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x2547D018: 7FE3FB78 or r3,r31,r31
- 5: GETL R31, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x2547D01C: 7F44D378 or r4,r26,r26
- 8: GETL R26, t6
- 9: PUTL t6, R4
- 10: INCEIPL $4
-
- 0x2547D020: 7F65DB78 or r5,r27,r27
- 11: GETL R27, t8
- 12: PUTL t8, R5
- 13: INCEIPL $4
-
- 0x2547D024: 74C90040 andis. r9,r6,0x40
- 14: GETL R6, t10
- 15: ANDL $0x400000, t10
- 16: PUTL t10, R9
- 17: CMP0L t10, t12 (-rSo)
- 18: ICRFL t12, $0x0, CR
- 19: INCEIPL $4
-
- 0x2547D028: 3BA00000 li r29,0
- 20: MOVL $0x0, t14
- 21: PUTL t14, R29
- 22: INCEIPL $4
-
- 0x2547D02C: 4082FFD8 bc 4,2,0x2547D004
- 23: Jc02o $0x2547D004
-
-
-. 0 2547D014 28
-. 80 DF 01 80 7F E3 FB 78 7F 44 D3 78 7F 65 DB 78 74 C9 00 40 3B A0 00 00 40 82 FF D8
-
-==== BB 923 (0x2547D030) approx BBs exec'd 0 ====
-
- 0x2547D030: 4BFFFB41 bl 0x2547CB70
- 0: MOVL $0x2547D034, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x2547CB70 ($4)
-
-
-. 0 2547D030 4
-. 4B FF FB 41
-
-==== BB 924 _dl_check_map_versions(0x2547CB70) approx BBs exec'd 0 ====
-
- 0x2547CB70: 7C0802A6 mflr r0
- 0: GETL LR, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x2547CB74: 9421FF60 stwu r1,-160(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFF60, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0x2547CB78: 7D800026 mfcr r12
- 9: GETL CR, t6
- 10: PUTL t6, R12
- 11: INCEIPL $4
-
- 0x2547CB7C: 4801A485 bl 0x25497000
- 12: MOVL $0x2547CB80, t8
- 13: PUTL t8, LR
- 14: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547CB70 16
-. 7C 08 02 A6 94 21 FF 60 7D 80 00 26 48 01 A4 85
-
-==== BB 925 (0x2547CB80) approx BBs exec'd 0 ====
-
- 0x2547CB80: 92010060 stw r16,96(r1)
- 0: GETL R16, t0
- 1: GETL R1, t2
- 2: ADDL $0x60, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547CB84: 3A000000 li r16,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R16
- 7: INCEIPL $4
-
- 0x2547CB88: 900100A4 stw r0,164(r1)
- 8: GETL R0, t6
- 9: GETL R1, t8
- 10: ADDL $0xA4, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2547CB8C: 81230034 lwz r9,52(r3)
- 13: GETL R3, t10
- 14: ADDL $0x34, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R9
- 17: INCEIPL $4
-
- 0x2547CB90: 92A10074 stw r21,116(r1)
- 18: GETL R21, t14
- 19: GETL R1, t16
- 20: ADDL $0x74, t16
- 21: STL t14, (t16)
- 22: INCEIPL $4
-
- 0x2547CB94: 7C952378 or r21,r4,r4
- 23: GETL R4, t18
- 24: PUTL t18, R21
- 25: INCEIPL $4
-
- 0x2547CB98: 2F890000 cmpi cr7,r9,0
- 26: GETL R9, t20
- 27: CMP0L t20, t22 (-rSo)
- 28: ICRFL t22, $0x7, CR
- 29: INCEIPL $4
-
- 0x2547CB9C: 92C10078 stw r22,120(r1)
- 30: GETL R22, t24
- 31: GETL R1, t26
- 32: ADDL $0x78, t26
- 33: STL t24, (t26)
- 34: INCEIPL $4
-
- 0x2547CBA0: 93010080 stw r24,128(r1)
- 35: GETL R24, t28
- 36: GETL R1, t30
- 37: ADDL $0x80, t30
- 38: STL t28, (t30)
- 39: INCEIPL $4
-
- 0x2547CBA4: 3AC00000 li r22,0
- 40: MOVL $0x0, t32
- 41: PUTL t32, R22
- 42: INCEIPL $4
-
- 0x2547CBA8: 9361008C stw r27,140(r1)
- 43: GETL R27, t34
- 44: GETL R1, t36
- 45: ADDL $0x8C, t36
- 46: STL t34, (t36)
- 47: INCEIPL $4
-
- 0x2547CBAC: 3B000000 li r24,0
- 48: MOVL $0x0, t38
- 49: PUTL t38, R24
- 50: INCEIPL $4
-
- 0x2547CBB0: 93C10098 stw r30,152(r1)
- 51: GETL R30, t40
- 52: GETL R1, t42
- 53: ADDL $0x98, t42
- 54: STL t40, (t42)
- 55: INCEIPL $4
-
- 0x2547CBB4: 7C7B1B78 or r27,r3,r3
- 56: GETL R3, t44
- 57: PUTL t44, R27
- 58: INCEIPL $4
-
- 0x2547CBB8: 93E1009C stw r31,156(r1)
- 59: GETL R31, t46
- 60: GETL R1, t48
- 61: ADDL $0x9C, t48
- 62: STL t46, (t48)
- 63: INCEIPL $4
-
- 0x2547CBBC: 7FC802A6 mflr r30
- 64: GETL LR, t50
- 65: PUTL t50, R30
- 66: INCEIPL $4
-
- 0x2547CBC0: 92210064 stw r17,100(r1)
- 67: GETL R17, t52
- 68: GETL R1, t54
- 69: ADDL $0x64, t54
- 70: STL t52, (t54)
- 71: INCEIPL $4
-
- 0x2547CBC4: 7C3F0B78 or r31,r1,r1
- 72: GETL R1, t56
- 73: PUTL t56, R31
- 74: INCEIPL $4
-
- 0x2547CBC8: 92410068 stw r18,104(r1)
- 75: GETL R18, t58
- 76: GETL R1, t60
- 77: ADDL $0x68, t60
- 78: STL t58, (t60)
- 79: INCEIPL $4
-
- 0x2547CBCC: 38600000 li r3,0
- 80: MOVL $0x0, t62
- 81: PUTL t62, R3
- 82: INCEIPL $4
-
- 0x2547CBD0: 9261006C stw r19,108(r1)
- 83: GETL R19, t64
- 84: GETL R1, t66
- 85: ADDL $0x6C, t66
- 86: STL t64, (t66)
- 87: INCEIPL $4
-
- 0x2547CBD4: 92810070 stw r20,112(r1)
- 88: GETL R20, t68
- 89: GETL R1, t70
- 90: ADDL $0x70, t70
- 91: STL t68, (t70)
- 92: INCEIPL $4
-
- 0x2547CBD8: 92E1007C stw r23,124(r1)
- 93: GETL R23, t72
- 94: GETL R1, t74
- 95: ADDL $0x7C, t74
- 96: STL t72, (t74)
- 97: INCEIPL $4
-
- 0x2547CBDC: 93210084 stw r25,132(r1)
- 98: GETL R25, t76
- 99: GETL R1, t78
- 100: ADDL $0x84, t78
- 101: STL t76, (t78)
- 102: INCEIPL $4
-
- 0x2547CBE0: 93410088 stw r26,136(r1)
- 103: GETL R26, t80
- 104: GETL R1, t82
- 105: ADDL $0x88, t82
- 106: STL t80, (t82)
- 107: INCEIPL $4
-
- 0x2547CBE4: 93810090 stw r28,144(r1)
- 108: GETL R28, t84
- 109: GETL R1, t86
- 110: ADDL $0x90, t86
- 111: STL t84, (t86)
- 112: INCEIPL $4
-
- 0x2547CBE8: 93A10094 stw r29,148(r1)
- 113: GETL R29, t88
- 114: GETL R1, t90
- 115: ADDL $0x94, t90
- 116: STL t88, (t90)
- 117: INCEIPL $4
-
- 0x2547CBEC: 9181005C stw r12,92(r1)
- 118: GETL R12, t92
- 119: GETL R1, t94
- 120: ADDL $0x5C, t94
- 121: STL t92, (t94)
- 122: INCEIPL $4
-
- 0x2547CBF0: 419E0180 bc 12,30,0x2547CD70
- 123: Js30o $0x2547CD70
-
-
-. 0 2547CB80 116
-. 92 01 00 60 3A 00 00 00 90 01 00 A4 81 23 00 34 92 A1 00 74 7C 95 23 78 2F 89 00 00 92 C1 00 78 93 01 00 80 3A C0 00 00 93 61 00 8C 3B 00 00 00 93 C1 00 98 7C 7B 1B 78 93 E1 00 9C 7F C8 02 A6 92 21 00 64 7C 3F 0B 78 92 41 00 68 38 60 00 00 92 61 00 6C 92 81 00 70 92 E1 00 7C 93 21 00 84 93 41 00 88 93 81 00 90 93 A1 00 94 91 81 00 5C 41 9E 01 80
-
-==== BB 926 (0x2547CBF4) approx BBs exec'd 0 ====
-
- 0x2547CBF4: 825B00AC lwz r18,172(r27)
- 0: GETL R27, t0
- 1: ADDL $0xAC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R18
- 4: INCEIPL $4
-
- 0x2547CBF8: 83290004 lwz r25,4(r9)
- 5: GETL R9, t4
- 6: ADDL $0x4, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R25
- 9: INCEIPL $4
-
- 0x2547CBFC: 2D920000 cmpi cr3,r18,0
- 10: GETL R18, t8
- 11: CMP0L t8, t10 (-rSo)
- 12: ICRFL t10, $0x3, CR
- 13: INCEIPL $4
-
- 0x2547CC00: 823B00B4 lwz r17,180(r27)
- 14: GETL R27, t12
- 15: ADDL $0xB4, t12
- 16: LDL (t12), t14
- 17: PUTL t14, R17
- 18: INCEIPL $4
-
- 0x2547CC04: 418E0128 bc 12,14,0x2547CD2C
- 19: Js14o $0x2547CD2C
-
-
-. 0 2547CBF4 20
-. 82 5B 00 AC 83 29 00 04 2D 92 00 00 82 3B 00 B4 41 8E 01 28
-
-==== BB 927 (0x2547CC08) approx BBs exec'd 0 ====
-
- 0x2547CC08: 817B0000 lwz r11,0(r27)
- 0: GETL R27, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R11
- 3: INCEIPL $4
-
- 0x2547CC0C: 2E050000 cmpi cr4,r5,0
- 4: GETL R5, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x4, CR
- 7: INCEIPL $4
-
- 0x2547CC10: 81320004 lwz r9,4(r18)
- 8: GETL R18, t8
- 9: ADDL $0x4, t8
- 10: LDL (t8), t10
- 11: PUTL t10, R9
- 12: INCEIPL $4
-
- 0x2547CC14: 829E04C8 lwz r20,1224(r30)
- 13: GETL R30, t12
- 14: ADDL $0x4C8, t12
- 15: LDL (t12), t14
- 16: PUTL t14, R20
- 17: INCEIPL $4
-
- 0x2547CC18: 7C8B4A2E lhzx r4,r11,r9
- 18: GETL R9, t16
- 19: GETL R11, t18
- 20: ADDL t18, t16
- 21: LDW (t16), t20
- 22: PUTL t20, R4
- 23: INCEIPL $4
-
- 0x2547CC1C: 7EEB4A14 add r23,r11,r9
- 24: GETL R11, t22
- 25: GETL R9, t24
- 26: ADDL t22, t24
- 27: PUTL t24, R23
- 28: INCEIPL $4
-
- 0x2547CC20: 827E04D4 lwz r19,1236(r30)
- 29: GETL R30, t26
- 30: ADDL $0x4D4, t26
- 31: LDL (t26), t28
- 32: PUTL t28, R19
- 33: INCEIPL $4
-
- 0x2547CC24: 2C040001 cmpi cr0,r4,1
- 34: GETL R4, t30
- 35: MOVL $0x1, t34
- 36: CMPL t30, t34, t32 (-rSo)
- 37: ICRFL t32, $0x0, CR
- 38: INCEIPL $4
-
- 0x2547CC28: 408202D0 bc 4,2,0x2547CEF8
- 39: Jc02o $0x2547CEF8
-
-
-. 0 2547CC08 36
-. 81 7B 00 00 2E 05 00 00 81 32 00 04 82 9E 04 C8 7C 8B 4A 2E 7E EB 4A 14 82 7E 04 D4 2C 04 00 01 40 82 02 D0
-
-==== BB 928 (0x2547CC2C) approx BBs exec'd 0 ====
-
- 0x2547CC2C: 835B0018 lwz r26,24(r27)
- 0: GETL R27, t0
- 1: ADDL $0x18, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0x2547CC30: 83970004 lwz r28,4(r23)
- 5: GETL R23, t4
- 6: ADDL $0x4, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R28
- 9: INCEIPL $4
-
- 0x2547CC34: 1E1A0018 mulli r16,r26,24
- 10: GETL R26, t8
- 11: MULL $0x18, t8
- 12: PUTL t8, R16
- 13: INCEIPL $4
-
- 0x2547CC38: 7F5CCA14 add r26,r28,r25
- 14: GETL R28, t10
- 15: GETL R25, t12
- 16: ADDL t10, t12
- 17: PUTL t12, R26
- 18: INCEIPL $4
-
- 0x2547CC3C: 7FB0A02E lwzx r29,r16,r20
- 19: GETL R20, t14
- 20: GETL R16, t16
- 21: ADDL t16, t14
- 22: LDL (t14), t18
- 23: PUTL t18, R29
- 24: INCEIPL $4
-
- 0x2547CC40: 4800001C b 0x2547CC5C
- 25: JMPo $0x2547CC5C ($4)
-
-
-. 0 2547CC2C 24
-. 83 5B 00 18 83 97 00 04 1E 1A 00 18 7F 5C CA 14 7F B0 A0 2E 48 00 00 1C
-
-==== BB 929 (0x2547CC5C) approx BBs exec'd 0 ====
-
- 0x2547CC5C: 2F1D0000 cmpi cr6,r29,0
- 0: GETL R29, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x2547CC60: 409AFFE4 bc 4,26,0x2547CC44
- 4: Jc26o $0x2547CC44
-
-
-. 0 2547CC5C 8
-. 2F 1D 00 00 40 9A FF E4
-
-==== BB 930 (0x2547CC44) approx BBs exec'd 0 ====
-
- 0x2547CC44: 7FA4EB78 or r4,r29,r29
- 0: GETL R29, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x2547CC48: 7F43D378 or r3,r26,r26
- 3: GETL R26, t2
- 4: PUTL t2, R3
- 5: INCEIPL $4
-
- 0x2547CC4C: 4BFFFA89 bl 0x2547C6D4
- 6: MOVL $0x2547CC50, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0x2547C6D4 ($4)
-
-
-. 0 2547CC44 12
-. 7F A4 EB 78 7F 43 D3 78 4B FF FA 89
-
-==== BB 931 (0x2547CC50) approx BBs exec'd 0 ====
-
- 0x2547CC50: 2F830000 cmpi cr7,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x2547CC54: 409E0220 bc 4,30,0x2547CE74
- 4: Jc30o $0x2547CE74
-
-
-. 0 2547CC50 8
-. 2F 83 00 00 40 9E 02 20
-
-==== BB 932 (0x2547CC58) approx BBs exec'd 0 ====
-
- 0x2547CC58: 83BD000C lwz r29,12(r29)
- 0: GETL R29, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x2547CC5C: 2F1D0000 cmpi cr6,r29,0
- 5: GETL R29, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x2547CC60: 409AFFE4 bc 4,26,0x2547CC44
- 9: Jc26o $0x2547CC44
-
-
-. 0 2547CC58 12
-. 83 BD 00 0C 2F 1D 00 00 40 9A FF E4
-
-==== BB 933 (0x2547CE74) approx BBs exec'd 0 ====
-
- 0x2547CE74: 7FBCEB78 or r28,r29,r29
- 0: GETL R29, t0
- 1: PUTL t0, R28
- 2: INCEIPL $4
-
- 0x2547CE78: 4192FE30 bc 12,18,0x2547CCA8
- 3: Js18o $0x2547CCA8
-
-
-. 0 2547CE74 8
-. 7F BC EB 78 41 92 FE 30
-
-==== BB 934 (0x2547CCA8) approx BBs exec'd 0 ====
-
- 0x2547CCA8: 80970008 lwz r4,8(r23)
- 0: GETL R23, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547CCAC: 7FA4BA14 add r29,r4,r23
- 5: GETL R4, t4
- 6: GETL R23, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R29
- 9: INCEIPL $4
-
- 0x2547CCB0: 7E7A9B78 or r26,r19,r19
- 10: GETL R19, t8
- 11: PUTL t8, R26
- 12: INCEIPL $4
-
- 0x2547CCB4: 811B0004 lwz r8,4(r27)
- 13: GETL R27, t10
- 14: ADDL $0x4, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R8
- 17: INCEIPL $4
-
- 0x2547CCB8: 7EA7AB78 or r7,r21,r21
- 18: GETL R21, t14
- 19: PUTL t14, R7
- 20: INCEIPL $4
-
- 0x2547CCBC: 88A80000 lbz r5,0(r8)
- 21: GETL R8, t16
- 22: LDB (t16), t18
- 23: PUTL t18, R5
- 24: INCEIPL $4
-
- 0x2547CCC0: 7D034378 or r3,r8,r8
- 25: GETL R8, t20
- 26: PUTL t20, R3
- 27: INCEIPL $4
-
- 0x2547CCC4: 2C850000 cmpi cr1,r5,0
- 28: GETL R5, t22
- 29: CMP0L t22, t24 (-rSo)
- 30: ICRFL t24, $0x1, CR
- 31: INCEIPL $4
-
- 0x2547CCC8: 4086000C bc 4,6,0x2547CCD4
- 32: Jc06o $0x2547CCD4
-
-
-. 0 2547CCA8 36
-. 80 97 00 08 7F A4 BA 14 7E 7A 9B 78 81 1B 00 04 7E A7 AB 78 88 A8 00 00 7D 03 43 78 2C 85 00 00 40 86 00 0C
-
-==== BB 935 (0x2547CCCC) approx BBs exec'd 0 ====
-
- 0x2547CCCC: 80DA0000 lwz r6,0(r26)
- 0: GETL R26, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R6
- 3: INCEIPL $4
-
- 0x2547CCD0: 80660000 lwz r3,0(r6)
- 4: GETL R6, t4
- 5: LDL (t4), t6
- 6: PUTL t6, R3
- 7: INCEIPL $4
-
- 0x2547CCD4: 815D0008 lwz r10,8(r29)
- 8: GETL R29, t8
- 9: ADDL $0x8, t8
- 10: LDL (t8), t10
- 11: PUTL t10, R10
- 12: INCEIPL $4
-
- 0x2547CCD8: A21D0004 lhz r16,4(r29)
- 13: GETL R29, t12
- 14: ADDL $0x4, t12
- 15: LDW (t12), t14
- 16: PUTL t14, R16
- 17: INCEIPL $4
-
- 0x2547CCDC: 809D0000 lwz r4,0(r29)
- 18: GETL R29, t16
- 19: LDL (t16), t18
- 20: PUTL t18, R4
- 21: INCEIPL $4
-
- 0x2547CCE0: 7CAACA14 add r5,r10,r25
- 22: GETL R10, t20
- 23: GETL R25, t22
- 24: ADDL t20, t22
- 25: PUTL t22, R5
- 26: INCEIPL $4
-
- 0x2547CCE4: 80DC0014 lwz r6,20(r28)
- 27: GETL R28, t24
- 28: ADDL $0x14, t24
- 29: LDL (t24), t26
- 30: PUTL t26, R6
- 31: INCEIPL $4
-
- 0x2547CCE8: 560807BC rlwinm r8,r16,0,30,30
- 32: GETL R16, t28
- 33: ANDL $0x2, t28
- 34: PUTL t28, R8
- 35: INCEIPL $4
-
- 0x2547CCEC: 4BFFFA85 bl 0x2547C770
- 36: MOVL $0x2547CCF0, t30
- 37: PUTL t30, LR
- 38: JMPo-c $0x2547C770 ($4)
-
-
-. 0 2547CCCC 36
-. 80 DA 00 00 80 66 00 00 81 5D 00 08 A2 1D 00 04 80 9D 00 00 7C AA CA 14 80 DC 00 14 56 08 07 BC 4B FF FA 85
-
-==== BB 936 match_symbol(0x2547C770) approx BBs exec'd 0 ====
-
- 0x2547C770: 9421FF20 stwu r1,-224(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFF20, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547C774: 7D4802A6 mflr r10
- 6: GETL LR, t4
- 7: PUTL t4, R10
- 8: INCEIPL $4
-
- 0x2547C778: 4801A889 bl 0x25497000
- 9: MOVL $0x2547C77C, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547C770 12
-. 94 21 FF 20 7D 48 02 A6 48 01 A8 89
-
-==== BB 937 (0x2547C77C) approx BBs exec'd 0 ====
-
- 0x2547C77C: 93C100D8 stw r30,216(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0xD8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547C780: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x2547C784: 926100AC stw r19,172(r1)
- 8: GETL R19, t6
- 9: GETL R1, t8
- 10: ADDL $0xAC, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2547C788: 914100E4 stw r10,228(r1)
- 13: GETL R10, t10
- 14: GETL R1, t12
- 15: ADDL $0xE4, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x2547C78C: 3A600000 li r19,0
- 18: MOVL $0x0, t14
- 19: PUTL t14, R19
- 20: INCEIPL $4
-
- 0x2547C790: 81660034 lwz r11,52(r6)
- 21: GETL R6, t16
- 22: ADDL $0x34, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R11
- 25: INCEIPL $4
-
- 0x2547C794: 813E04F4 lwz r9,1268(r30)
- 26: GETL R30, t20
- 27: ADDL $0x4F4, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R9
- 30: INCEIPL $4
-
- 0x2547C798: 92C100B8 stw r22,184(r1)
- 31: GETL R22, t24
- 32: GETL R1, t26
- 33: ADDL $0xB8, t26
- 34: STL t24, (t26)
- 35: INCEIPL $4
-
- 0x2547C79C: 7CF63B78 or r22,r7,r7
- 36: GETL R7, t28
- 37: PUTL t28, R22
- 38: INCEIPL $4
-
- 0x2547C7A0: 80090000 lwz r0,0(r9)
- 39: GETL R9, t30
- 40: LDL (t30), t32
- 41: PUTL t32, R0
- 42: INCEIPL $4
-
- 0x2547C7A4: 92E100BC stw r23,188(r1)
- 43: GETL R23, t34
- 44: GETL R1, t36
- 45: ADDL $0xBC, t36
- 46: STL t34, (t36)
- 47: INCEIPL $4
-
- 0x2547C7A8: 7D174378 or r23,r8,r8
- 48: GETL R8, t38
- 49: PUTL t38, R23
- 50: INCEIPL $4
-
- 0x2547C7AC: 70090010 andi. r9,r0,0x10
- 51: GETL R0, t40
- 52: ANDL $0x10, t40
- 53: PUTL t40, R9
- 54: CMP0L t40, t42 (-rSo)
- 55: ICRFL t42, $0x0, CR
- 56: INCEIPL $4
-
- 0x2547C7B0: 930100C0 stw r24,192(r1)
- 57: GETL R24, t44
- 58: GETL R1, t46
- 59: ADDL $0xC0, t46
- 60: STL t44, (t46)
- 61: INCEIPL $4
-
- 0x2547C7B4: 932100C4 stw r25,196(r1)
- 62: GETL R25, t48
- 63: GETL R1, t50
- 64: ADDL $0xC4, t50
- 65: STL t48, (t50)
- 66: INCEIPL $4
-
- 0x2547C7B8: 7C781B78 or r24,r3,r3
- 67: GETL R3, t52
- 68: PUTL t52, R24
- 69: INCEIPL $4
-
- 0x2547C7BC: 936100CC stw r27,204(r1)
- 70: GETL R27, t54
- 71: GETL R1, t56
- 72: ADDL $0xCC, t56
- 73: STL t54, (t56)
- 74: INCEIPL $4
-
- 0x2547C7C0: 7CD93378 or r25,r6,r6
- 75: GETL R6, t58
- 76: PUTL t58, R25
- 77: INCEIPL $4
-
- 0x2547C7C4: 938100D0 stw r28,208(r1)
- 78: GETL R28, t60
- 79: GETL R1, t62
- 80: ADDL $0xD0, t62
- 81: STL t60, (t62)
- 82: INCEIPL $4
-
- 0x2547C7C8: 7C9B2378 or r27,r4,r4
- 83: GETL R4, t64
- 84: PUTL t64, R27
- 85: INCEIPL $4
-
- 0x2547C7CC: 93E100DC stw r31,220(r1)
- 86: GETL R31, t66
- 87: GETL R1, t68
- 88: ADDL $0xDC, t68
- 89: STL t66, (t68)
- 90: INCEIPL $4
-
- 0x2547C7D0: 7CBC2B78 or r28,r5,r5
- 91: GETL R5, t70
- 92: PUTL t70, R28
- 93: INCEIPL $4
-
- 0x2547C7D4: 928100B0 stw r20,176(r1)
- 94: GETL R20, t72
- 95: GETL R1, t74
- 96: ADDL $0xB0, t74
- 97: STL t72, (t74)
- 98: INCEIPL $4
-
- 0x2547C7D8: 7C3F0B78 or r31,r1,r1
- 99: GETL R1, t76
- 100: PUTL t76, R31
- 101: INCEIPL $4
-
- 0x2547C7DC: 92A100B4 stw r21,180(r1)
- 102: GETL R21, t78
- 103: GETL R1, t80
- 104: ADDL $0xB4, t80
- 105: STL t78, (t80)
- 106: INCEIPL $4
-
- 0x2547C7E0: 934100C8 stw r26,200(r1)
- 107: GETL R26, t82
- 108: GETL R1, t84
- 109: ADDL $0xC8, t84
- 110: STL t82, (t84)
- 111: INCEIPL $4
-
- 0x2547C7E4: 93A100D4 stw r29,212(r1)
- 112: GETL R29, t86
- 113: GETL R1, t88
- 114: ADDL $0xD4, t88
- 115: STL t86, (t88)
- 116: INCEIPL $4
-
- 0x2547C7E8: 834B0004 lwz r26,4(r11)
- 117: GETL R11, t90
- 118: ADDL $0x4, t90
- 119: LDL (t90), t92
- 120: PUTL t92, R26
- 121: INCEIPL $4
-
- 0x2547C7EC: 40820230 bc 4,2,0x2547CA1C
- 122: Jc02o $0x2547CA1C
-
-
-. 0 2547C77C 116
-. 93 C1 00 D8 7F C8 02 A6 92 61 00 AC 91 41 00 E4 3A 60 00 00 81 66 00 34 81 3E 04 F4 92 C1 00 B8 7C F6 3B 78 80 09 00 00 92 E1 00 BC 7D 17 43 78 70 09 00 10 93 01 00 C0 93 21 00 C4 7C 78 1B 78 93 61 00 CC 7C D9 33 78 93 81 00 D0 7C 9B 23 78 93 E1 00 DC 7C BC 2B 78 92 81 00 B0 7C 3F 0B 78 92 A1 00 B4 93 41 00 C8 93 A1 00 D4 83 4B 00 04 40 82 02 30
-
-==== BB 938 (0x2547C7F0) approx BBs exec'd 0 ====
-
- 0x2547C7F0: 813900B4 lwz r9,180(r25)
- 0: GETL R25, t0
- 1: ADDL $0xB4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547C7F4: 2C890000 cmpi cr1,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x2547C7F8: 41860264 bc 12,6,0x2547CA5C
- 9: Js06o $0x2547CA5C
-
-
-. 0 2547C7F0 12
-. 81 39 00 B4 2C 89 00 00 41 86 02 64
-
-==== BB 939 (0x2547C7FC) approx BBs exec'd 0 ====
-
- 0x2547C7FC: 81690004 lwz r11,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547C800: 3A9F0008 addi r20,r31,8
- 5: GETL R31, t4
- 6: ADDL $0x8, t4
- 7: PUTL t4, R20
- 8: INCEIPL $4
-
- 0x2547C804: 80190000 lwz r0,0(r25)
- 9: GETL R25, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R0
- 12: INCEIPL $4
-
- 0x2547C808: 82BE0358 lwz r21,856(r30)
- 13: GETL R30, t10
- 14: ADDL $0x358, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R21
- 17: INCEIPL $4
-
- 0x2547C80C: 7FA05A14 add r29,r0,r11
- 18: GETL R0, t14
- 19: GETL R11, t16
- 20: ADDL t14, t16
- 21: PUTL t16, R29
- 22: INCEIPL $4
-
- 0x2547C810: A13D0000 lhz r9,0(r29)
- 23: GETL R29, t18
- 24: LDW (t18), t20
- 25: PUTL t20, R9
- 26: INCEIPL $4
-
- 0x2547C814: 7F83E378 or r3,r28,r28
- 27: GETL R28, t22
- 28: PUTL t22, R3
- 29: INCEIPL $4
-
- 0x2547C818: 2F890001 cmpi cr7,r9,1
- 30: GETL R9, t24
- 31: MOVL $0x1, t28
- 32: CMPL t24, t28, t26 (-rSo)
- 33: ICRFL t26, $0x7, CR
- 34: INCEIPL $4
-
- 0x2547C81C: 409E0124 bc 4,30,0x2547C940
- 35: Jc30o $0x2547C940
-
-
-. 0 2547C7FC 36
-. 81 69 00 04 3A 9F 00 08 80 19 00 00 82 BE 03 58 7F A0 5A 14 A1 3D 00 00 7F 83 E3 78 2F 89 00 01 40 9E 01 24
-
-==== BB 940 (0x2547C820) approx BBs exec'd 0 ====
-
- 0x2547C820: 809D0008 lwz r4,8(r29)
- 0: GETL R29, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547C824: 7C84D800 cmp cr1,r4,r27
- 5: GETL R4, t4
- 6: GETL R27, t6
- 7: CMPL t4, t6, t8 (-rSo)
- 8: ICRFL t8, $0x1, CR
- 9: INCEIPL $4
-
- 0x2547C828: 418600B4 bc 12,6,0x2547C8DC
- 10: Js06o $0x2547C8DC
-
-
-. 0 2547C820 12
-. 80 9D 00 08 7C 84 D8 00 41 86 00 B4
-
-==== BB 941 (0x2547C82C) approx BBs exec'd 0 ====
-
- 0x2547C82C: 80FD0010 lwz r7,16(r29)
- 0: GETL R29, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x2547C830: 2F870000 cmpi cr7,r7,0
- 5: GETL R7, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x2547C834: 7FBD3A14 add r29,r29,r7
- 9: GETL R29, t8
- 10: GETL R7, t10
- 11: ADDL t8, t10
- 12: PUTL t10, R29
- 13: INCEIPL $4
-
- 0x2547C838: 409EFFD8 bc 4,30,0x2547C810
- 14: Jc30o $0x2547C810
-
-
-. 0 2547C82C 16
-. 80 FD 00 10 2F 87 00 00 7F BD 3A 14 40 9E FF D8
-
-==== BB 942 (0x2547C810) approx BBs exec'd 0 ====
-
- 0x2547C810: A13D0000 lhz r9,0(r29)
- 0: GETL R29, t0
- 1: LDW (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0x2547C814: 7F83E378 or r3,r28,r28
- 4: GETL R28, t4
- 5: PUTL t4, R3
- 6: INCEIPL $4
-
- 0x2547C818: 2F890001 cmpi cr7,r9,1
- 7: GETL R9, t6
- 8: MOVL $0x1, t10
- 9: CMPL t6, t10, t8 (-rSo)
- 10: ICRFL t8, $0x7, CR
- 11: INCEIPL $4
-
- 0x2547C81C: 409E0124 bc 4,30,0x2547C940
- 12: Jc30o $0x2547C940
-
-
-. 0 2547C810 16
-. A1 3D 00 00 7F 83 E3 78 2F 89 00 01 40 9E 01 24
-
-==== BB 943 (0x2547C8DC) approx BBs exec'd 0 ====
-
- 0x2547C8DC: 80BD000C lwz r5,12(r29)
- 0: GETL R29, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x2547C8E0: 7CC5E82E lwzx r6,r5,r29
- 5: GETL R29, t4
- 6: GETL R5, t6
- 7: ADDL t6, t4
- 8: LDL (t4), t8
- 9: PUTL t8, R6
- 10: INCEIPL $4
-
- 0x2547C8E4: 7C86D214 add r4,r6,r26
- 11: GETL R6, t10
- 12: GETL R26, t12
- 13: ADDL t10, t12
- 14: PUTL t12, R4
- 15: INCEIPL $4
-
- 0x2547C8E8: 480065F9 bl 0x25482EE0
- 16: MOVL $0x2547C8EC, t14
- 17: PUTL t14, LR
- 18: JMPo-c $0x25482EE0 ($4)
-
-
-. 0 2547C8DC 16
-. 80 BD 00 0C 7C C5 E8 2E 7C 86 D2 14 48 00 65 F9
-
-==== BB 944 (0x2547C8EC) approx BBs exec'd 0 ====
-
- 0x2547C8EC: 2F030000 cmpi cr6,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x2547C8F0: 40BAFF3C bc 5,26,0x2547C82C
- 4: Jc26o $0x2547C82C
-
-
-. 0 2547C8EC 8
-. 2F 03 00 00 40 BA FF 3C
-
-==== BB 945 (0x2547C8F4) approx BBs exec'd 0 ====
-
- 0x2547C8F4: 38600000 li r3,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547C8F8: 80C10000 lwz r6,0(r1)
- 3: GETL R1, t2
- 4: LDL (t2), t4
- 5: PUTL t4, R6
- 6: INCEIPL $4
-
- 0x2547C8FC: 80E60004 lwz r7,4(r6)
- 7: GETL R6, t6
- 8: ADDL $0x4, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R7
- 11: INCEIPL $4
-
- 0x2547C900: 8266FFCC lwz r19,-52(r6)
- 12: GETL R6, t10
- 13: ADDL $0xFFFFFFCC, t10
- 14: LDL (t10), t12
- 15: PUTL t12, R19
- 16: INCEIPL $4
-
- 0x2547C904: 8286FFD0 lwz r20,-48(r6)
- 17: GETL R6, t14
- 18: ADDL $0xFFFFFFD0, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R20
- 21: INCEIPL $4
-
- 0x2547C908: 7CE803A6 mtlr r7
- 22: GETL R7, t18
- 23: PUTL t18, LR
- 24: INCEIPL $4
-
- 0x2547C90C: 82A6FFD4 lwz r21,-44(r6)
- 25: GETL R6, t20
- 26: ADDL $0xFFFFFFD4, t20
- 27: LDL (t20), t22
- 28: PUTL t22, R21
- 29: INCEIPL $4
-
- 0x2547C910: 82C6FFD8 lwz r22,-40(r6)
- 30: GETL R6, t24
- 31: ADDL $0xFFFFFFD8, t24
- 32: LDL (t24), t26
- 33: PUTL t26, R22
- 34: INCEIPL $4
-
- 0x2547C914: 82E6FFDC lwz r23,-36(r6)
- 35: GETL R6, t28
- 36: ADDL $0xFFFFFFDC, t28
- 37: LDL (t28), t30
- 38: PUTL t30, R23
- 39: INCEIPL $4
-
- 0x2547C918: 8306FFE0 lwz r24,-32(r6)
- 40: GETL R6, t32
- 41: ADDL $0xFFFFFFE0, t32
- 42: LDL (t32), t34
- 43: PUTL t34, R24
- 44: INCEIPL $4
-
- 0x2547C91C: 8326FFE4 lwz r25,-28(r6)
- 45: GETL R6, t36
- 46: ADDL $0xFFFFFFE4, t36
- 47: LDL (t36), t38
- 48: PUTL t38, R25
- 49: INCEIPL $4
-
- 0x2547C920: 8346FFE8 lwz r26,-24(r6)
- 50: GETL R6, t40
- 51: ADDL $0xFFFFFFE8, t40
- 52: LDL (t40), t42
- 53: PUTL t42, R26
- 54: INCEIPL $4
-
- 0x2547C924: 8366FFEC lwz r27,-20(r6)
- 55: GETL R6, t44
- 56: ADDL $0xFFFFFFEC, t44
- 57: LDL (t44), t46
- 58: PUTL t46, R27
- 59: INCEIPL $4
-
- 0x2547C928: 8386FFF0 lwz r28,-16(r6)
- 60: GETL R6, t48
- 61: ADDL $0xFFFFFFF0, t48
- 62: LDL (t48), t50
- 63: PUTL t50, R28
- 64: INCEIPL $4
-
- 0x2547C92C: 83A6FFF4 lwz r29,-12(r6)
- 65: GETL R6, t52
- 66: ADDL $0xFFFFFFF4, t52
- 67: LDL (t52), t54
- 68: PUTL t54, R29
- 69: INCEIPL $4
-
- 0x2547C930: 83C6FFF8 lwz r30,-8(r6)
- 70: GETL R6, t56
- 71: ADDL $0xFFFFFFF8, t56
- 72: LDL (t56), t58
- 73: PUTL t58, R30
- 74: INCEIPL $4
-
- 0x2547C934: 83E6FFFC lwz r31,-4(r6)
- 75: GETL R6, t60
- 76: ADDL $0xFFFFFFFC, t60
- 77: LDL (t60), t62
- 78: PUTL t62, R31
- 79: INCEIPL $4
-
- 0x2547C938: 7CC13378 or r1,r6,r6
- 80: GETL R6, t64
- 81: PUTL t64, R1
- 82: INCEIPL $4
-
- 0x2547C93C: 4E800020 blr
- 83: GETL LR, t66
- 84: JMPo-r t66 ($4)
-
-
-. 0 2547C8F4 76
-. 38 60 00 00 80 C1 00 00 80 E6 00 04 82 66 FF CC 82 86 FF D0 7C E8 03 A6 82 A6 FF D4 82 C6 FF D8 82 E6 FF DC 83 06 FF E0 83 26 FF E4 83 46 FF E8 83 66 FF EC 83 86 FF F0 83 A6 FF F4 83 C6 FF F8 83 E6 FF FC 7C C1 33 78 4E 80 00 20
-
-==== BB 946 (0x2547CCF0) approx BBs exec'd 0 ====
-
- 0x2547CCF0: A17D0006 lhz r11,6(r29)
- 0: GETL R29, t0
- 1: ADDL $0x6, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547CCF4: 7ED61B78 or r22,r22,r3
- 5: GETL R22, t4
- 6: GETL R3, t6
- 7: ORL t6, t4
- 8: PUTL t4, R22
- 9: INCEIPL $4
-
- 0x2547CCF8: 5560047E rlwinm r0,r11,0,17,31
- 10: GETL R11, t8
- 11: ANDL $0x7FFF, t8
- 12: PUTL t8, R0
- 13: INCEIPL $4
-
- 0x2547CCFC: 7F00C040 cmpl cr6,r0,r24
- 14: GETL R0, t10
- 15: GETL R24, t12
- 16: CMPUL t10, t12, t14 (-rSo)
- 17: ICRFL t14, $0x6, CR
- 18: INCEIPL $4
-
- 0x2547CD00: 40990008 bc 4,25,0x2547CD08
- 19: Jc25o $0x2547CD08
-
-
-. 0 2547CCF0 20
-. A1 7D 00 06 7E D6 1B 78 55 60 04 7E 7F 00 C0 40 40 99 00 08
-
-==== BB 947 (0x2547CD04) approx BBs exec'd 0 ====
-
- 0x2547CD04: 7C180378 or r24,r0,r0
- 0: GETL R0, t0
- 1: PUTL t0, R24
- 2: INCEIPL $4
-
- 0x2547CD08: 807D000C lwz r3,12(r29)
- 3: GETL R29, t2
- 4: ADDL $0xC, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x2547CD0C: 2F830000 cmpi cr7,r3,0
- 8: GETL R3, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x7, CR
- 11: INCEIPL $4
-
- 0x2547CD10: 7FBD1A14 add r29,r29,r3
- 12: GETL R29, t10
- 13: GETL R3, t12
- 14: ADDL t10, t12
- 15: PUTL t12, R29
- 16: INCEIPL $4
-
- 0x2547CD14: 409EFFA0 bc 4,30,0x2547CCB4
- 17: Jc30o $0x2547CCB4
-
-
-. 0 2547CD04 20
-. 7C 18 03 78 80 7D 00 0C 2F 83 00 00 7F BD 1A 14 40 9E FF A0
-
-==== BB 948 (0x2547CD18) approx BBs exec'd 0 ====
-
- 0x2547CD18: 8017000C lwz r0,12(r23)
- 0: GETL R23, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x2547CD1C: 2C000000 cmpi cr0,r0,0
- 5: GETL R0, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x2547CD20: 4182000C bc 12,2,0x2547CD2C
- 9: Js02o $0x2547CD2C
-
-
-. 0 2547CD18 12
-. 80 17 00 0C 2C 00 00 00 41 82 00 0C
-
-==== BB 949 (0x2547CD2C) approx BBs exec'd 0 ====
-
- 0x2547CD2C: 2E110000 cmpi cr4,r17,0
- 0: GETL R17, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x4, CR
- 3: INCEIPL $4
-
- 0x2547CD30: 41920034 bc 12,18,0x2547CD64
- 4: Js18o $0x2547CD64
-
-
-. 0 2547CD2C 8
-. 2E 11 00 00 41 92 00 34
-
-==== BB 950 (0x2547CD64) approx BBs exec'd 0 ====
-
- 0x2547CD64: 2F980000 cmpi cr7,r24,0
- 0: GETL R24, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x2547CD68: 409E0064 bc 4,30,0x2547CDCC
- 4: Jc30o $0x2547CDCC
-
-
-. 0 2547CD64 8
-. 2F 98 00 00 40 9E 00 64
-
-==== BB 951 (0x2547CDCC) approx BBs exec'd 0 ====
-
- 0x2547CDCC: 3BB80001 addi r29,r24,1
- 0: GETL R24, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R29
- 3: INCEIPL $4
-
- 0x2547CDD0: 38800010 li r4,16
- 4: MOVL $0x10, t2
- 5: PUTL t2, R4
- 6: INCEIPL $4
-
- 0x2547CDD4: 7FA3EB78 or r3,r29,r29
- 7: GETL R29, t4
- 8: PUTL t4, R3
- 9: INCEIPL $4
-
- 0x2547CDD8: 3A00000C li r16,12
- 10: MOVL $0xC, t6
- 11: PUTL t6, R16
- 12: INCEIPL $4
-
- 0x2547CDDC: 4801AC51 bl 0x25497A2C
- 13: MOVL $0x2547CDE0, t8
- 14: PUTL t8, LR
- 15: JMPo-c $0x25497A2C ($4)
-
-
-. 0 2547CDCC 20
-. 3B B8 00 01 38 80 00 10 7F A3 EB 78 3A 00 00 0C 48 01 AC 51
-
-==== BB 952 (0x2547CDE0) approx BBs exec'd 0 ====
-
- 0x2547CDE0: 80DE0378 lwz r6,888(r30)
- 0: GETL R30, t0
- 1: ADDL $0x378, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x2547CDE4: 2C030000 cmpi cr0,r3,0
- 5: GETL R3, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x2547CDE8: 7C651B78 or r5,r3,r3
- 9: GETL R3, t8
- 10: PUTL t8, R5
- 11: INCEIPL $4
-
- 0x2547CDEC: 907B0188 stw r3,392(r27)
- 12: GETL R3, t10
- 13: GETL R27, t12
- 14: ADDL $0x188, t12
- 15: STL t10, (t12)
- 16: INCEIPL $4
-
- 0x2547CDF0: 418201AC bc 12,2,0x2547CF9C
- 17: Js02o $0x2547CF9C
-
-
-. 0 2547CDE0 20
-. 80 DE 03 78 2C 03 00 00 7C 65 1B 78 90 7B 01 88 41 82 01 AC
-
-==== BB 953 (0x2547CDF4) approx BBs exec'd 0 ====
-
- 0x2547CDF4: 839B00E4 lwz r28,228(r27)
- 0: GETL R27, t0
- 1: ADDL $0xE4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R28
- 4: INCEIPL $4
-
- 0x2547CDF8: 93BB0184 stw r29,388(r27)
- 5: GETL R29, t4
- 6: GETL R27, t6
- 7: ADDL $0x184, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x2547CDFC: 831C0004 lwz r24,4(r28)
- 10: GETL R28, t8
- 11: ADDL $0x4, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R24
- 14: INCEIPL $4
-
- 0x2547CE00: 931B0198 stw r24,408(r27)
- 15: GETL R24, t12
- 16: GETL R27, t14
- 17: ADDL $0x198, t14
- 18: STL t12, (t14)
- 19: INCEIPL $4
-
- 0x2547CE04: 418E0088 bc 12,14,0x2547CE8C
- 20: Js14o $0x2547CE8C
-
-
-. 0 2547CDF4 20
-. 83 9B 00 E4 93 BB 01 84 83 1C 00 04 93 1B 01 98 41 8E 00 88
-
-==== BB 954 (0x2547CE08) approx BBs exec'd 0 ====
-
- 0x2547CE08: 83520004 lwz r26,4(r18)
- 0: GETL R18, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0x2547CE0C: 825B0000 lwz r18,0(r27)
- 5: GETL R27, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R18
- 8: INCEIPL $4
-
- 0x2547CE10: 7CD2D214 add r6,r18,r26
- 9: GETL R18, t8
- 10: GETL R26, t10
- 11: ADDL t8, t10
- 12: PUTL t10, R6
- 13: INCEIPL $4
-
- 0x2547CE14: 81860008 lwz r12,8(r6)
- 14: GETL R6, t12
- 15: ADDL $0x8, t12
- 16: LDL (t12), t14
- 17: PUTL t14, R12
- 18: INCEIPL $4
-
- 0x2547CE18: 7CEC3214 add r7,r12,r6
- 19: GETL R12, t16
- 20: GETL R6, t18
- 21: ADDL t16, t18
- 22: PUTL t18, R7
- 23: INCEIPL $4
-
- 0x2547CE1C: A2A70006 lhz r21,6(r7)
- 24: GETL R7, t20
- 25: ADDL $0x6, t20
- 26: LDW (t20), t22
- 27: PUTL t22, R21
- 28: INCEIPL $4
-
- 0x2547CE20: 80670000 lwz r3,0(r7)
- 29: GETL R7, t24
- 30: LDL (t24), t26
- 31: PUTL t26, R3
- 32: INCEIPL $4
-
- 0x2547CE24: 56A42376 rlwinm r4,r21,4,13,27
- 33: GETL R21, t28
- 34: ROLL $0x4, t28
- 35: ANDL $0x7FFF0, t28
- 36: PUTL t28, R4
- 37: INCEIPL $4
-
- 0x2547CE28: 56B00420 rlwinm r16,r21,0,16,16
- 38: GETL R21, t30
- 39: ANDL $0x8000, t30
- 40: PUTL t30, R16
- 41: INCEIPL $4
-
- 0x2547CE2C: 7FA42A14 add r29,r4,r5
- 42: GETL R4, t32
- 43: GETL R5, t34
- 44: ADDL t32, t34
- 45: PUTL t34, R29
- 46: INCEIPL $4
-
- 0x2547CE30: 907D0004 stw r3,4(r29)
- 47: GETL R3, t36
- 48: GETL R29, t38
- 49: ADDL $0x4, t38
- 50: STL t36, (t38)
- 51: INCEIPL $4
-
- 0x2547CE34: 921D0008 stw r16,8(r29)
- 52: GETL R16, t40
- 53: GETL R29, t42
- 54: ADDL $0x8, t42
- 55: STL t40, (t42)
- 56: INCEIPL $4
-
- 0x2547CE38: 8167000C lwz r11,12(r7)
- 57: GETL R7, t44
- 58: ADDL $0xC, t44
- 59: LDL (t44), t46
- 60: PUTL t46, R11
- 61: INCEIPL $4
-
- 0x2547CE3C: 81470008 lwz r10,8(r7)
- 62: GETL R7, t48
- 63: ADDL $0x8, t48
- 64: LDL (t48), t50
- 65: PUTL t50, R10
- 66: INCEIPL $4
-
- 0x2547CE40: 2D8B0000 cmpi cr3,r11,0
- 67: GETL R11, t52
- 68: CMP0L t52, t54 (-rSo)
- 69: ICRFL t54, $0x3, CR
- 70: INCEIPL $4
-
- 0x2547CE44: 81060004 lwz r8,4(r6)
- 71: GETL R6, t56
- 72: ADDL $0x4, t56
- 73: LDL (t56), t58
- 74: PUTL t58, R8
- 75: INCEIPL $4
-
- 0x2547CE48: 7D2ACA14 add r9,r10,r25
- 76: GETL R10, t60
- 77: GETL R25, t62
- 78: ADDL t60, t62
- 79: PUTL t62, R9
- 80: INCEIPL $4
-
- 0x2547CE4C: 7CE75A14 add r7,r7,r11
- 81: GETL R7, t64
- 82: GETL R11, t66
- 83: ADDL t64, t66
- 84: PUTL t66, R7
- 85: INCEIPL $4
-
- 0x2547CE50: 7C08CA14 add r0,r8,r25
- 86: GETL R8, t68
- 87: GETL R25, t70
- 88: ADDL t68, t70
- 89: PUTL t70, R0
- 90: INCEIPL $4
-
- 0x2547CE54: 7D24292E stwx r9,r4,r5
- 91: GETL R5, t72
- 92: GETL R4, t74
- 93: ADDL t74, t72
- 94: GETL R9, t76
- 95: STL t76, (t72)
- 96: INCEIPL $4
-
- 0x2547CE58: 901D000C stw r0,12(r29)
- 97: GETL R0, t78
- 98: GETL R29, t80
- 99: ADDL $0xC, t80
- 100: STL t78, (t80)
- 101: INCEIPL $4
-
- 0x2547CE5C: 408EFFC0 bc 4,14,0x2547CE1C
- 102: Jc14o $0x2547CE1C
-
-
-. 0 2547CE08 88
-. 83 52 00 04 82 5B 00 00 7C D2 D2 14 81 86 00 08 7C EC 32 14 A2 A7 00 06 80 67 00 00 56 A4 23 76 56 B0 04 20 7F A4 2A 14 90 7D 00 04 92 1D 00 08 81 67 00 0C 81 47 00 08 2D 8B 00 00 81 06 00 04 7D 2A CA 14 7C E7 5A 14 7C 08 CA 14 7D 24 29 2E 90 1D 00 0C 40 8E FF C0
-
-==== BB 955 (0x2547CE60) approx BBs exec'd 0 ====
-
- 0x2547CE60: 8006000C lwz r0,12(r6)
- 0: GETL R6, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x2547CE64: 2C800000 cmpi cr1,r0,0
- 5: GETL R0, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x2547CE68: 41860024 bc 12,6,0x2547CE8C
- 9: Js06o $0x2547CE8C
-
-
-. 0 2547CE60 12
-. 80 06 00 0C 2C 80 00 00 41 86 00 24
-
-==== BB 956 (0x2547CE8C) approx BBs exec'd 0 ====
-
- 0x2547CE8C: 41B2FEE0 bc 13,18,0x2547CD6C
- 0: Js18o $0x2547CD6C
-
-
-. 0 2547CE8C 4
-. 41 B2 FE E0
-
-==== BB 957 (0x2547CD6C) approx BBs exec'd 0 ====
-
- 0x2547CD6C: 7EC3B378 or r3,r22,r22
- 0: GETL R22, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547CD70: 80A10000 lwz r5,0(r1)
- 3: GETL R1, t2
- 4: LDL (t2), t4
- 5: PUTL t4, R5
- 6: INCEIPL $4
-
- 0x2547CD74: 82C50004 lwz r22,4(r5)
- 7: GETL R5, t6
- 8: ADDL $0x4, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R22
- 11: INCEIPL $4
-
- 0x2547CD78: 8185FFBC lwz r12,-68(r5)
- 12: GETL R5, t10
- 13: ADDL $0xFFFFFFBC, t10
- 14: LDL (t10), t12
- 15: PUTL t12, R12
- 16: INCEIPL $4
-
- 0x2547CD7C: 7EC803A6 mtlr r22
- 17: GETL R22, t14
- 18: PUTL t14, LR
- 19: INCEIPL $4
-
- 0x2547CD80: 8205FFC0 lwz r16,-64(r5)
- 20: GETL R5, t16
- 21: ADDL $0xFFFFFFC0, t16
- 22: LDL (t16), t18
- 23: PUTL t18, R16
- 24: INCEIPL $4
-
- 0x2547CD84: 8225FFC4 lwz r17,-60(r5)
- 25: GETL R5, t20
- 26: ADDL $0xFFFFFFC4, t20
- 27: LDL (t20), t22
- 28: PUTL t22, R17
- 29: INCEIPL $4
-
- 0x2547CD88: 7D818120 mtcrf 0x18,r12
- 30: GETL R12, t24
- 31: ICRFL t24, $0x3, CR
- 32: ICRFL t24, $0x4, CR
- 33: INCEIPL $4
-
- 0x2547CD8C: 8245FFC8 lwz r18,-56(r5)
- 34: GETL R5, t26
- 35: ADDL $0xFFFFFFC8, t26
- 36: LDL (t26), t28
- 37: PUTL t28, R18
- 38: INCEIPL $4
-
- 0x2547CD90: 8265FFCC lwz r19,-52(r5)
- 39: GETL R5, t30
- 40: ADDL $0xFFFFFFCC, t30
- 41: LDL (t30), t32
- 42: PUTL t32, R19
- 43: INCEIPL $4
-
- 0x2547CD94: 8285FFD0 lwz r20,-48(r5)
- 44: GETL R5, t34
- 45: ADDL $0xFFFFFFD0, t34
- 46: LDL (t34), t36
- 47: PUTL t36, R20
- 48: INCEIPL $4
-
- 0x2547CD98: 82A5FFD4 lwz r21,-44(r5)
- 49: GETL R5, t38
- 50: ADDL $0xFFFFFFD4, t38
- 51: LDL (t38), t40
- 52: PUTL t40, R21
- 53: INCEIPL $4
-
- 0x2547CD9C: 82C5FFD8 lwz r22,-40(r5)
- 54: GETL R5, t42
- 55: ADDL $0xFFFFFFD8, t42
- 56: LDL (t42), t44
- 57: PUTL t44, R22
- 58: INCEIPL $4
-
- 0x2547CDA0: 82E5FFDC lwz r23,-36(r5)
- 59: GETL R5, t46
- 60: ADDL $0xFFFFFFDC, t46
- 61: LDL (t46), t48
- 62: PUTL t48, R23
- 63: INCEIPL $4
-
- 0x2547CDA4: 8305FFE0 lwz r24,-32(r5)
- 64: GETL R5, t50
- 65: ADDL $0xFFFFFFE0, t50
- 66: LDL (t50), t52
- 67: PUTL t52, R24
- 68: INCEIPL $4
-
- 0x2547CDA8: 8325FFE4 lwz r25,-28(r5)
- 69: GETL R5, t54
- 70: ADDL $0xFFFFFFE4, t54
- 71: LDL (t54), t56
- 72: PUTL t56, R25
- 73: INCEIPL $4
-
- 0x2547CDAC: 8345FFE8 lwz r26,-24(r5)
- 74: GETL R5, t58
- 75: ADDL $0xFFFFFFE8, t58
- 76: LDL (t58), t60
- 77: PUTL t60, R26
- 78: INCEIPL $4
-
- 0x2547CDB0: 8365FFEC lwz r27,-20(r5)
- 79: GETL R5, t62
- 80: ADDL $0xFFFFFFEC, t62
- 81: LDL (t62), t64
- 82: PUTL t64, R27
- 83: INCEIPL $4
-
- 0x2547CDB4: 8385FFF0 lwz r28,-16(r5)
- 84: GETL R5, t66
- 85: ADDL $0xFFFFFFF0, t66
- 86: LDL (t66), t68
- 87: PUTL t68, R28
- 88: INCEIPL $4
-
- 0x2547CDB8: 83A5FFF4 lwz r29,-12(r5)
- 89: GETL R5, t70
- 90: ADDL $0xFFFFFFF4, t70
- 91: LDL (t70), t72
- 92: PUTL t72, R29
- 93: INCEIPL $4
-
- 0x2547CDBC: 83C5FFF8 lwz r30,-8(r5)
- 94: GETL R5, t74
- 95: ADDL $0xFFFFFFF8, t74
- 96: LDL (t74), t76
- 97: PUTL t76, R30
- 98: INCEIPL $4
-
- 0x2547CDC0: 83E5FFFC lwz r31,-4(r5)
- 99: GETL R5, t78
- 100: ADDL $0xFFFFFFFC, t78
- 101: LDL (t78), t80
- 102: PUTL t80, R31
- 103: INCEIPL $4
-
- 0x2547CDC4: 7CA12B78 or r1,r5,r5
- 104: GETL R5, t82
- 105: PUTL t82, R1
- 106: INCEIPL $4
-
- 0x2547CDC8: 4E800020 blr
- 107: GETL LR, t84
- 108: JMPo-r t84 ($4)
-
-
-. 0 2547CD6C 96
-. 7E C3 B3 78 80 A1 00 00 82 C5 00 04 81 85 FF BC 7E C8 03 A6 82 05 FF C0 82 25 FF C4 7D 81 81 20 82 45 FF C8 82 65 FF CC 82 85 FF D0 82 A5 FF D4 82 C5 FF D8 82 E5 FF DC 83 05 FF E0 83 25 FF E4 83 45 FF E8 83 65 FF EC 83 85 FF F0 83 A5 FF F4 83 C5 FF F8 83 E5 FF FC 7C A1 2B 78 4E 80 00 20
-
-==== BB 958 (0x2547D034) approx BBs exec'd 0 ====
-
- 0x2547D034: 2F830000 cmpi cr7,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x2547D038: 41BEFFCC bc 13,30,0x2547D004
- 4: Js30o $0x2547D004
-
-
-. 0 2547D034 8
-. 2F 83 00 00 41 BE FF CC
-
-==== BB 959 (0x2547D004) approx BBs exec'd 0 ====
-
- 0x2547D004: 83FF000C lwz r31,12(r31)
- 0: GETL R31, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R31
- 4: INCEIPL $4
-
- 0x2547D008: 7F9CEB78 or r28,r28,r29
- 5: GETL R28, t4
- 6: GETL R29, t6
- 7: ORL t6, t4
- 8: PUTL t4, R28
- 9: INCEIPL $4
-
- 0x2547D00C: 2C9F0000 cmpi cr1,r31,0
- 10: GETL R31, t8
- 11: CMP0L t8, t10 (-rSo)
- 12: ICRFL t10, $0x1, CR
- 13: INCEIPL $4
-
- 0x2547D010: 41860040 bc 12,6,0x2547D050
- 14: Js06o $0x2547D050
-
-
-. 0 2547D004 16
-. 83 FF 00 0C 7F 9C EB 78 2C 9F 00 00 41 86 00 40
-
-==== BB 960 (0x2547CCD4) approx BBs exec'd 0 ====
-
- 0x2547CCD4: 815D0008 lwz r10,8(r29)
- 0: GETL R29, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x2547CCD8: A21D0004 lhz r16,4(r29)
- 5: GETL R29, t4
- 6: ADDL $0x4, t4
- 7: LDW (t4), t6
- 8: PUTL t6, R16
- 9: INCEIPL $4
-
- 0x2547CCDC: 809D0000 lwz r4,0(r29)
- 10: GETL R29, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R4
- 13: INCEIPL $4
-
- 0x2547CCE0: 7CAACA14 add r5,r10,r25
- 14: GETL R10, t12
- 15: GETL R25, t14
- 16: ADDL t12, t14
- 17: PUTL t14, R5
- 18: INCEIPL $4
-
- 0x2547CCE4: 80DC0014 lwz r6,20(r28)
- 19: GETL R28, t16
- 20: ADDL $0x14, t16
- 21: LDL (t16), t18
- 22: PUTL t18, R6
- 23: INCEIPL $4
-
- 0x2547CCE8: 560807BC rlwinm r8,r16,0,30,30
- 24: GETL R16, t20
- 25: ANDL $0x2, t20
- 26: PUTL t20, R8
- 27: INCEIPL $4
-
- 0x2547CCEC: 4BFFFA85 bl 0x2547C770
- 28: MOVL $0x2547CCF0, t22
- 29: PUTL t22, LR
- 30: JMPo-c $0x2547C770 ($4)
-
-
-. 0 2547CCD4 28
-. 81 5D 00 08 A2 1D 00 04 80 9D 00 00 7C AA CA 14 80 DC 00 14 56 08 07 BC 4B FF FA 85
-
-==== BB 961 (0x2547CCB4) approx BBs exec'd 0 ====
-
- 0x2547CCB4: 811B0004 lwz r8,4(r27)
- 0: GETL R27, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x2547CCB8: 7EA7AB78 or r7,r21,r21
- 5: GETL R21, t4
- 6: PUTL t4, R7
- 7: INCEIPL $4
-
- 0x2547CCBC: 88A80000 lbz r5,0(r8)
- 8: GETL R8, t6
- 9: LDB (t6), t8
- 10: PUTL t8, R5
- 11: INCEIPL $4
-
- 0x2547CCC0: 7D034378 or r3,r8,r8
- 12: GETL R8, t10
- 13: PUTL t10, R3
- 14: INCEIPL $4
-
- 0x2547CCC4: 2C850000 cmpi cr1,r5,0
- 15: GETL R5, t12
- 16: CMP0L t12, t14 (-rSo)
- 17: ICRFL t14, $0x1, CR
- 18: INCEIPL $4
-
- 0x2547CCC8: 4086000C bc 4,6,0x2547CCD4
- 19: Jc06o $0x2547CCD4
-
-
-. 0 2547CCB4 24
-. 81 1B 00 04 7E A7 AB 78 88 A8 00 00 7D 03 43 78 2C 85 00 00 40 86 00 0C
-
-==== BB 962 (0x2547CD08) approx BBs exec'd 0 ====
-
- 0x2547CD08: 807D000C lwz r3,12(r29)
- 0: GETL R29, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x2547CD0C: 2F830000 cmpi cr7,r3,0
- 5: GETL R3, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x2547CD10: 7FBD1A14 add r29,r29,r3
- 9: GETL R29, t8
- 10: GETL R3, t10
- 11: ADDL t8, t10
- 12: PUTL t10, R29
- 13: INCEIPL $4
-
- 0x2547CD14: 409EFFA0 bc 4,30,0x2547CCB4
- 14: Jc30o $0x2547CCB4
-
-
-. 0 2547CD08 16
-. 80 7D 00 0C 2F 83 00 00 7F BD 1A 14 40 9E FF A0
-
-==== BB 963 (0x2547CE1C) approx BBs exec'd 0 ====
-
- 0x2547CE1C: A2A70006 lhz r21,6(r7)
- 0: GETL R7, t0
- 1: ADDL $0x6, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R21
- 4: INCEIPL $4
-
- 0x2547CE20: 80670000 lwz r3,0(r7)
- 5: GETL R7, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R3
- 8: INCEIPL $4
-
- 0x2547CE24: 56A42376 rlwinm r4,r21,4,13,27
- 9: GETL R21, t8
- 10: ROLL $0x4, t8
- 11: ANDL $0x7FFF0, t8
- 12: PUTL t8, R4
- 13: INCEIPL $4
-
- 0x2547CE28: 56B00420 rlwinm r16,r21,0,16,16
- 14: GETL R21, t10
- 15: ANDL $0x8000, t10
- 16: PUTL t10, R16
- 17: INCEIPL $4
-
- 0x2547CE2C: 7FA42A14 add r29,r4,r5
- 18: GETL R4, t12
- 19: GETL R5, t14
- 20: ADDL t12, t14
- 21: PUTL t14, R29
- 22: INCEIPL $4
-
- 0x2547CE30: 907D0004 stw r3,4(r29)
- 23: GETL R3, t16
- 24: GETL R29, t18
- 25: ADDL $0x4, t18
- 26: STL t16, (t18)
- 27: INCEIPL $4
-
- 0x2547CE34: 921D0008 stw r16,8(r29)
- 28: GETL R16, t20
- 29: GETL R29, t22
- 30: ADDL $0x8, t22
- 31: STL t20, (t22)
- 32: INCEIPL $4
-
- 0x2547CE38: 8167000C lwz r11,12(r7)
- 33: GETL R7, t24
- 34: ADDL $0xC, t24
- 35: LDL (t24), t26
- 36: PUTL t26, R11
- 37: INCEIPL $4
-
- 0x2547CE3C: 81470008 lwz r10,8(r7)
- 38: GETL R7, t28
- 39: ADDL $0x8, t28
- 40: LDL (t28), t30
- 41: PUTL t30, R10
- 42: INCEIPL $4
-
- 0x2547CE40: 2D8B0000 cmpi cr3,r11,0
- 43: GETL R11, t32
- 44: CMP0L t32, t34 (-rSo)
- 45: ICRFL t34, $0x3, CR
- 46: INCEIPL $4
-
- 0x2547CE44: 81060004 lwz r8,4(r6)
- 47: GETL R6, t36
- 48: ADDL $0x4, t36
- 49: LDL (t36), t38
- 50: PUTL t38, R8
- 51: INCEIPL $4
-
- 0x2547CE48: 7D2ACA14 add r9,r10,r25
- 52: GETL R10, t40
- 53: GETL R25, t42
- 54: ADDL t40, t42
- 55: PUTL t42, R9
- 56: INCEIPL $4
-
- 0x2547CE4C: 7CE75A14 add r7,r7,r11
- 57: GETL R7, t44
- 58: GETL R11, t46
- 59: ADDL t44, t46
- 60: PUTL t46, R7
- 61: INCEIPL $4
-
- 0x2547CE50: 7C08CA14 add r0,r8,r25
- 62: GETL R8, t48
- 63: GETL R25, t50
- 64: ADDL t48, t50
- 65: PUTL t50, R0
- 66: INCEIPL $4
-
- 0x2547CE54: 7D24292E stwx r9,r4,r5
- 67: GETL R5, t52
- 68: GETL R4, t54
- 69: ADDL t54, t52
- 70: GETL R9, t56
- 71: STL t56, (t52)
- 72: INCEIPL $4
-
- 0x2547CE58: 901D000C stw r0,12(r29)
- 73: GETL R0, t58
- 74: GETL R29, t60
- 75: ADDL $0xC, t60
- 76: STL t58, (t60)
- 77: INCEIPL $4
-
- 0x2547CE5C: 408EFFC0 bc 4,14,0x2547CE1C
- 78: Jc14o $0x2547CE1C
-
-
-. 0 2547CE1C 68
-. A2 A7 00 06 80 67 00 00 56 A4 23 76 56 B0 04 20 7F A4 2A 14 90 7D 00 04 92 1D 00 08 81 67 00 0C 81 47 00 08 2D 8B 00 00 81 06 00 04 7D 2A CA 14 7C E7 5A 14 7C 08 CA 14 7D 24 29 2E 90 1D 00 0C 40 8E FF C0
-
-==== BB 964 (0x2547CD34) approx BBs exec'd 0 ====
-
- 0x2547CD34: 82BB0000 lwz r21,0(r27)
- 0: GETL R27, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R21
- 3: INCEIPL $4
-
- 0x2547CD38: 82F10004 lwz r23,4(r17)
- 4: GETL R17, t4
- 5: ADDL $0x4, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R23
- 8: INCEIPL $4
-
- 0x2547CD3C: 7D35BA14 add r9,r21,r23
- 9: GETL R21, t8
- 10: GETL R23, t10
- 11: ADDL t8, t10
- 12: PUTL t10, R9
- 13: INCEIPL $4
-
- 0x2547CD40: A2690004 lhz r19,4(r9)
- 14: GETL R9, t12
- 15: ADDL $0x4, t12
- 16: LDW (t12), t14
- 17: PUTL t14, R19
- 18: INCEIPL $4
-
- 0x2547CD44: 5660047E rlwinm r0,r19,0,17,31
- 19: GETL R19, t16
- 20: ANDL $0x7FFF, t16
- 21: PUTL t16, R0
- 22: INCEIPL $4
-
- 0x2547CD48: 7C80C040 cmpl cr1,r0,r24
- 23: GETL R0, t18
- 24: GETL R24, t20
- 25: CMPUL t18, t20, t22 (-rSo)
- 26: ICRFL t22, $0x1, CR
- 27: INCEIPL $4
-
- 0x2547CD4C: 40850008 bc 4,5,0x2547CD54
- 28: Jc05o $0x2547CD54
-
-
-. 0 2547CD34 28
-. 82 BB 00 00 82 F1 00 04 7D 35 BA 14 A2 69 00 04 56 60 04 7E 7C 80 C0 40 40 85 00 08
-
-==== BB 965 (0x2547CD54) approx BBs exec'd 0 ====
-
- 0x2547CD54: 82890010 lwz r20,16(r9)
- 0: GETL R9, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R20
- 4: INCEIPL $4
-
- 0x2547CD58: 2F140000 cmpi cr6,r20,0
- 5: GETL R20, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x2547CD5C: 7D29A214 add r9,r9,r20
- 9: GETL R9, t8
- 10: GETL R20, t10
- 11: ADDL t8, t10
- 12: PUTL t10, R9
- 13: INCEIPL $4
-
- 0x2547CD60: 409AFFE0 bc 4,26,0x2547CD40
- 14: Jc26o $0x2547CD40
-
-
-. 0 2547CD54 16
-. 82 89 00 10 2F 14 00 00 7D 29 A2 14 40 9A FF E0
-
-==== BB 966 (0x2547CD40) approx BBs exec'd 0 ====
-
- 0x2547CD40: A2690004 lhz r19,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R19
- 4: INCEIPL $4
-
- 0x2547CD44: 5660047E rlwinm r0,r19,0,17,31
- 5: GETL R19, t4
- 6: ANDL $0x7FFF, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x2547CD48: 7C80C040 cmpl cr1,r0,r24
- 9: GETL R0, t6
- 10: GETL R24, t8
- 11: CMPUL t6, t8, t10 (-rSo)
- 12: ICRFL t10, $0x1, CR
- 13: INCEIPL $4
-
- 0x2547CD4C: 40850008 bc 4,5,0x2547CD54
- 14: Jc05o $0x2547CD54
-
-
-. 0 2547CD40 16
-. A2 69 00 04 56 60 04 7E 7C 80 C0 40 40 85 00 08
-
-==== BB 967 (0x2547CE90) approx BBs exec'd 0 ====
-
- 0x2547CE90: 80DB0000 lwz r6,0(r27)
- 0: GETL R27, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R6
- 3: INCEIPL $4
-
- 0x2547CE94: 38E00000 li r7,0
- 4: MOVL $0x0, t4
- 5: PUTL t4, R7
- 6: INCEIPL $4
-
- 0x2547CE98: 83710004 lwz r27,4(r17)
- 7: GETL R17, t6
- 8: ADDL $0x4, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R27
- 11: INCEIPL $4
-
- 0x2547CE9C: 7C66DA14 add r3,r6,r27
- 12: GETL R6, t10
- 13: GETL R27, t12
- 14: ADDL t10, t12
- 15: PUTL t12, R3
- 16: INCEIPL $4
-
- 0x2547CEA0: A2230002 lhz r17,2(r3)
- 17: GETL R3, t14
- 18: ADDL $0x2, t14
- 19: LDW (t14), t16
- 20: PUTL t16, R17
- 21: INCEIPL $4
-
- 0x2547CEA4: 8103000C lwz r8,12(r3)
- 22: GETL R3, t18
- 23: ADDL $0xC, t18
- 24: LDL (t18), t20
- 25: PUTL t20, R8
- 26: INCEIPL $4
-
- 0x2547CEA8: 72290001 andi. r9,r17,0x1
- 27: GETL R17, t22
- 28: ANDL $0x1, t22
- 29: PUTL t22, R9
- 30: CMP0L t22, t24 (-rSo)
- 31: ICRFL t24, $0x0, CR
- 32: INCEIPL $4
-
- 0x2547CEAC: 40820028 bc 4,2,0x2547CED4
- 33: Jc02o $0x2547CED4
-
-
-. 0 2547CE90 32
-. 80 DB 00 00 38 E0 00 00 83 71 00 04 7C 66 DA 14 A2 23 00 02 81 03 00 0C 72 29 00 01 40 82 00 28
-
-==== BB 968 (0x2547CED4) approx BBs exec'd 0 ====
-
- 0x2547CED4: 82430010 lwz r18,16(r3)
- 0: GETL R3, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R18
- 4: INCEIPL $4
-
- 0x2547CED8: 2E120000 cmpi cr4,r18,0
- 5: GETL R18, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x4, CR
- 8: INCEIPL $4
-
- 0x2547CEDC: 7C639214 add r3,r3,r18
- 9: GETL R3, t8
- 10: GETL R18, t10
- 11: ADDL t8, t10
- 12: PUTL t10, R3
- 13: INCEIPL $4
-
- 0x2547CEE0: 4092FFC0 bc 4,18,0x2547CEA0
- 14: Jc18o $0x2547CEA0
-
-
-. 0 2547CED4 16
-. 82 43 00 10 2E 12 00 00 7C 63 92 14 40 92 FF C0
-
-==== BB 969 (0x2547CEA0) approx BBs exec'd 0 ====
-
- 0x2547CEA0: A2230002 lhz r17,2(r3)
- 0: GETL R3, t0
- 1: ADDL $0x2, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R17
- 4: INCEIPL $4
-
- 0x2547CEA4: 8103000C lwz r8,12(r3)
- 5: GETL R3, t4
- 6: ADDL $0xC, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R8
- 9: INCEIPL $4
-
- 0x2547CEA8: 72290001 andi. r9,r17,0x1
- 10: GETL R17, t8
- 11: ANDL $0x1, t8
- 12: PUTL t8, R9
- 13: CMP0L t8, t10 (-rSo)
- 14: ICRFL t10, $0x0, CR
- 15: INCEIPL $4
-
- 0x2547CEAC: 40820028 bc 4,2,0x2547CED4
- 16: Jc02o $0x2547CED4
-
-
-. 0 2547CEA0 16
-. A2 23 00 02 81 03 00 0C 72 29 00 01 40 82 00 28
-
-==== BB 970 (0x2547CEB0) approx BBs exec'd 0 ====
-
- 0x2547CEB0: A3430004 lhz r26,4(r3)
- 0: GETL R3, t0
- 1: ADDL $0x4, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0x2547CEB4: 83830008 lwz r28,8(r3)
- 5: GETL R3, t4
- 6: ADDL $0x8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R28
- 9: INCEIPL $4
-
- 0x2547CEB8: 57572376 rlwinm r23,r26,4,13,27
- 10: GETL R26, t8
- 11: ROLL $0x4, t8
- 12: ANDL $0x7FFF0, t8
- 13: PUTL t8, R23
- 14: INCEIPL $4
-
- 0x2547CEBC: 7F172A14 add r24,r23,r5
- 15: GETL R23, t10
- 16: GETL R5, t12
- 17: ADDL t10, t12
- 18: PUTL t12, R24
- 19: INCEIPL $4
-
- 0x2547CEC0: 93980004 stw r28,4(r24)
- 20: GETL R28, t14
- 21: GETL R24, t16
- 22: ADDL $0x4, t16
- 23: STL t14, (t16)
- 24: INCEIPL $4
-
- 0x2547CEC4: 7E88182E lwzx r20,r8,r3
- 25: GETL R3, t18
- 26: GETL R8, t20
- 27: ADDL t20, t18
- 28: LDL (t18), t22
- 29: PUTL t22, R20
- 30: INCEIPL $4
-
- 0x2547CEC8: 90F8000C stw r7,12(r24)
- 31: GETL R7, t24
- 32: GETL R24, t26
- 33: ADDL $0xC, t26
- 34: STL t24, (t26)
- 35: INCEIPL $4
-
- 0x2547CECC: 7E74CA14 add r19,r20,r25
- 36: GETL R20, t28
- 37: GETL R25, t30
- 38: ADDL t28, t30
- 39: PUTL t30, R19
- 40: INCEIPL $4
-
- 0x2547CED0: 7E77292E stwx r19,r23,r5
- 41: GETL R5, t32
- 42: GETL R23, t34
- 43: ADDL t34, t32
- 44: GETL R19, t36
- 45: STL t36, (t32)
- 46: INCEIPL $4
-
- 0x2547CED4: 82430010 lwz r18,16(r3)
- 47: GETL R3, t38
- 48: ADDL $0x10, t38
- 49: LDL (t38), t40
- 50: PUTL t40, R18
- 51: INCEIPL $4
-
- 0x2547CED8: 2E120000 cmpi cr4,r18,0
- 52: GETL R18, t42
- 53: CMP0L t42, t44 (-rSo)
- 54: ICRFL t44, $0x4, CR
- 55: INCEIPL $4
-
- 0x2547CEDC: 7C639214 add r3,r3,r18
- 56: GETL R3, t46
- 57: GETL R18, t48
- 58: ADDL t46, t48
- 59: PUTL t48, R3
- 60: INCEIPL $4
-
- 0x2547CEE0: 4092FFC0 bc 4,18,0x2547CEA0
- 61: Jc18o $0x2547CEA0
-
-
-. 0 2547CEB0 52
-. A3 43 00 04 83 83 00 08 57 57 23 76 7F 17 2A 14 93 98 00 04 7E 88 18 2E 90 F8 00 0C 7E 74 CA 14 7E 77 29 2E 82 43 00 10 2E 12 00 00 7C 63 92 14 40 92 FF C0
-
-==== BB 971 (0x2547CEE4) approx BBs exec'd 0 ====
-
- 0x2547CEE4: 7EC3B378 or r3,r22,r22
- 0: GETL R22, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547CEE8: 4BFFFE88 b 0x2547CD70
- 3: JMPo $0x2547CD70 ($4)
-
-
-. 0 2547CEE4 8
-. 7E C3 B3 78 4B FF FE 88
-
-==== BB 972 (0x2547CD70) approx BBs exec'd 0 ====
-
- 0x2547CD70: 80A10000 lwz r5,0(r1)
- 0: GETL R1, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R5
- 3: INCEIPL $4
-
- 0x2547CD74: 82C50004 lwz r22,4(r5)
- 4: GETL R5, t4
- 5: ADDL $0x4, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R22
- 8: INCEIPL $4
-
- 0x2547CD78: 8185FFBC lwz r12,-68(r5)
- 9: GETL R5, t8
- 10: ADDL $0xFFFFFFBC, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R12
- 13: INCEIPL $4
-
- 0x2547CD7C: 7EC803A6 mtlr r22
- 14: GETL R22, t12
- 15: PUTL t12, LR
- 16: INCEIPL $4
-
- 0x2547CD80: 8205FFC0 lwz r16,-64(r5)
- 17: GETL R5, t14
- 18: ADDL $0xFFFFFFC0, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R16
- 21: INCEIPL $4
-
- 0x2547CD84: 8225FFC4 lwz r17,-60(r5)
- 22: GETL R5, t18
- 23: ADDL $0xFFFFFFC4, t18
- 24: LDL (t18), t20
- 25: PUTL t20, R17
- 26: INCEIPL $4
-
- 0x2547CD88: 7D818120 mtcrf 0x18,r12
- 27: GETL R12, t22
- 28: ICRFL t22, $0x3, CR
- 29: ICRFL t22, $0x4, CR
- 30: INCEIPL $4
-
- 0x2547CD8C: 8245FFC8 lwz r18,-56(r5)
- 31: GETL R5, t24
- 32: ADDL $0xFFFFFFC8, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R18
- 35: INCEIPL $4
-
- 0x2547CD90: 8265FFCC lwz r19,-52(r5)
- 36: GETL R5, t28
- 37: ADDL $0xFFFFFFCC, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R19
- 40: INCEIPL $4
-
- 0x2547CD94: 8285FFD0 lwz r20,-48(r5)
- 41: GETL R5, t32
- 42: ADDL $0xFFFFFFD0, t32
- 43: LDL (t32), t34
- 44: PUTL t34, R20
- 45: INCEIPL $4
-
- 0x2547CD98: 82A5FFD4 lwz r21,-44(r5)
- 46: GETL R5, t36
- 47: ADDL $0xFFFFFFD4, t36
- 48: LDL (t36), t38
- 49: PUTL t38, R21
- 50: INCEIPL $4
-
- 0x2547CD9C: 82C5FFD8 lwz r22,-40(r5)
- 51: GETL R5, t40
- 52: ADDL $0xFFFFFFD8, t40
- 53: LDL (t40), t42
- 54: PUTL t42, R22
- 55: INCEIPL $4
-
- 0x2547CDA0: 82E5FFDC lwz r23,-36(r5)
- 56: GETL R5, t44
- 57: ADDL $0xFFFFFFDC, t44
- 58: LDL (t44), t46
- 59: PUTL t46, R23
- 60: INCEIPL $4
-
- 0x2547CDA4: 8305FFE0 lwz r24,-32(r5)
- 61: GETL R5, t48
- 62: ADDL $0xFFFFFFE0, t48
- 63: LDL (t48), t50
- 64: PUTL t50, R24
- 65: INCEIPL $4
-
- 0x2547CDA8: 8325FFE4 lwz r25,-28(r5)
- 66: GETL R5, t52
- 67: ADDL $0xFFFFFFE4, t52
- 68: LDL (t52), t54
- 69: PUTL t54, R25
- 70: INCEIPL $4
-
- 0x2547CDAC: 8345FFE8 lwz r26,-24(r5)
- 71: GETL R5, t56
- 72: ADDL $0xFFFFFFE8, t56
- 73: LDL (t56), t58
- 74: PUTL t58, R26
- 75: INCEIPL $4
-
- 0x2547CDB0: 8365FFEC lwz r27,-20(r5)
- 76: GETL R5, t60
- 77: ADDL $0xFFFFFFEC, t60
- 78: LDL (t60), t62
- 79: PUTL t62, R27
- 80: INCEIPL $4
-
- 0x2547CDB4: 8385FFF0 lwz r28,-16(r5)
- 81: GETL R5, t64
- 82: ADDL $0xFFFFFFF0, t64
- 83: LDL (t64), t66
- 84: PUTL t66, R28
- 85: INCEIPL $4
-
- 0x2547CDB8: 83A5FFF4 lwz r29,-12(r5)
- 86: GETL R5, t68
- 87: ADDL $0xFFFFFFF4, t68
- 88: LDL (t68), t70
- 89: PUTL t70, R29
- 90: INCEIPL $4
-
- 0x2547CDBC: 83C5FFF8 lwz r30,-8(r5)
- 91: GETL R5, t72
- 92: ADDL $0xFFFFFFF8, t72
- 93: LDL (t72), t74
- 94: PUTL t74, R30
- 95: INCEIPL $4
-
- 0x2547CDC0: 83E5FFFC lwz r31,-4(r5)
- 96: GETL R5, t76
- 97: ADDL $0xFFFFFFFC, t76
- 98: LDL (t76), t78
- 99: PUTL t78, R31
- 100: INCEIPL $4
-
- 0x2547CDC4: 7CA12B78 or r1,r5,r5
- 101: GETL R5, t80
- 102: PUTL t80, R1
- 103: INCEIPL $4
-
- 0x2547CDC8: 4E800020 blr
- 104: GETL LR, t82
- 105: JMPo-r t82 ($4)
-
-
-. 0 2547CD70 92
-. 80 A1 00 00 82 C5 00 04 81 85 FF BC 7E C8 03 A6 82 05 FF C0 82 25 FF C4 7D 81 81 20 82 45 FF C8 82 65 FF CC 82 85 FF D0 82 A5 FF D4 82 C5 FF D8 82 E5 FF DC 83 05 FF E0 83 25 FF E4 83 45 FF E8 83 65 FF EC 83 85 FF F0 83 A5 FF F4 83 C5 FF F8 83 E5 FF FC 7C A1 2B 78 4E 80 00 20
-
-==== BB 973 (0x2547CD50) approx BBs exec'd 0 ====
-
- 0x2547CD50: 7C180378 or r24,r0,r0
- 0: GETL R0, t0
- 1: PUTL t0, R24
- 2: INCEIPL $4
-
- 0x2547CD54: 82890010 lwz r20,16(r9)
- 3: GETL R9, t2
- 4: ADDL $0x10, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R20
- 7: INCEIPL $4
-
- 0x2547CD58: 2F140000 cmpi cr6,r20,0
- 8: GETL R20, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x6, CR
- 11: INCEIPL $4
-
- 0x2547CD5C: 7D29A214 add r9,r9,r20
- 12: GETL R9, t10
- 13: GETL R20, t12
- 14: ADDL t10, t12
- 15: PUTL t12, R9
- 16: INCEIPL $4
-
- 0x2547CD60: 409AFFE0 bc 4,26,0x2547CD40
- 17: Jc26o $0x2547CD40
-
-
-. 0 2547CD50 20
-. 7C 18 03 78 82 89 00 10 2F 14 00 00 7D 29 A2 14 40 9A FF E0
-
-==== BB 974 (0x2547D050) approx BBs exec'd 0 ====
-
- 0x2547D050: 80810024 lwz r4,36(r1)
- 0: GETL R1, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547D054: 7F83E378 or r3,r28,r28
- 5: GETL R28, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x2547D058: 83410008 lwz r26,8(r1)
- 8: GETL R1, t6
- 9: ADDL $0x8, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R26
- 12: INCEIPL $4
-
- 0x2547D05C: 8361000C lwz r27,12(r1)
- 13: GETL R1, t10
- 14: ADDL $0xC, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R27
- 17: INCEIPL $4
-
- 0x2547D060: 7C8803A6 mtlr r4
- 18: GETL R4, t14
- 19: PUTL t14, LR
- 20: INCEIPL $4
-
- 0x2547D064: 83810010 lwz r28,16(r1)
- 21: GETL R1, t16
- 22: ADDL $0x10, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R28
- 25: INCEIPL $4
-
- 0x2547D068: 83A10014 lwz r29,20(r1)
- 26: GETL R1, t20
- 27: ADDL $0x14, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R29
- 30: INCEIPL $4
-
- 0x2547D06C: 83C10018 lwz r30,24(r1)
- 31: GETL R1, t24
- 32: ADDL $0x18, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R30
- 35: INCEIPL $4
-
- 0x2547D070: 83E1001C lwz r31,28(r1)
- 36: GETL R1, t28
- 37: ADDL $0x1C, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R31
- 40: INCEIPL $4
-
- 0x2547D074: 38210020 addi r1,r1,32
- 41: GETL R1, t32
- 42: ADDL $0x20, t32
- 43: PUTL t32, R1
- 44: INCEIPL $4
-
- 0x2547D078: 4E800020 blr
- 45: GETL LR, t34
- 46: JMPo-r t34 ($4)
-
-
-. 0 2547D050 44
-. 80 81 00 24 7F 83 E3 78 83 41 00 08 83 61 00 0C 7C 88 03 A6 83 81 00 10 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 975 (0x2547180C) approx BBs exec'd 0 ====
-
- 0x2547180C: 2F830000 cmpi cr7,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x25471810: 419E0014 bc 12,30,0x25471824
- 4: Js30o $0x25471824
-
-
-. 0 2547180C 8
-. 2F 83 00 00 41 9E 00 14
-
-==== BB 976 (0x25471824) approx BBs exec'd 0 ====
-
- 0x25471824: 80610024 lwz r3,36(r1)
- 0: GETL R1, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25471828: 83A10014 lwz r29,20(r1)
- 5: GETL R1, t4
- 6: ADDL $0x14, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R29
- 9: INCEIPL $4
-
- 0x2547182C: 83C10018 lwz r30,24(r1)
- 10: GETL R1, t8
- 11: ADDL $0x18, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R30
- 14: INCEIPL $4
-
- 0x25471830: 7C6803A6 mtlr r3
- 15: GETL R3, t12
- 16: PUTL t12, LR
- 17: INCEIPL $4
-
- 0x25471834: 83E1001C lwz r31,28(r1)
- 18: GETL R1, t14
- 19: ADDL $0x1C, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R31
- 22: INCEIPL $4
-
- 0x25471838: 38210020 addi r1,r1,32
- 23: GETL R1, t18
- 24: ADDL $0x20, t18
- 25: PUTL t18, R1
- 26: INCEIPL $4
-
- 0x2547183C: 4E800020 blr
- 27: GETL LR, t20
- 28: JMPo-r t20 ($4)
-
-
-. 0 25471824 28
-. 80 61 00 24 83 A1 00 14 83 C1 00 18 7C 68 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 977 (0x2547B70C) approx BBs exec'd 0 ====
-
- 0x2547B70C: 935D0000 stw r26,0(r29)
- 0: GETL R26, t0
- 1: GETL R29, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0x2547B710: 80010034 lwz r0,52(r1)
- 4: GETL R1, t4
- 5: ADDL $0x34, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R0
- 8: INCEIPL $4
-
- 0x2547B714: 937C0000 stw r27,0(r28)
- 9: GETL R27, t8
- 10: GETL R28, t10
- 11: STL t8, (t10)
- 12: INCEIPL $4
-
- 0x2547B718: 82E1000C lwz r23,12(r1)
- 13: GETL R1, t12
- 14: ADDL $0xC, t12
- 15: LDL (t12), t14
- 16: PUTL t14, R23
- 17: INCEIPL $4
-
- 0x2547B71C: 7C0803A6 mtlr r0
- 18: GETL R0, t16
- 19: PUTL t16, LR
- 20: INCEIPL $4
-
- 0x2547B720: 83210014 lwz r25,20(r1)
- 21: GETL R1, t18
- 22: ADDL $0x14, t18
- 23: LDL (t18), t20
- 24: PUTL t20, R25
- 25: INCEIPL $4
-
- 0x2547B724: 83410018 lwz r26,24(r1)
- 26: GETL R1, t22
- 27: ADDL $0x18, t22
- 28: LDL (t22), t24
- 29: PUTL t24, R26
- 30: INCEIPL $4
-
- 0x2547B728: 8361001C lwz r27,28(r1)
- 31: GETL R1, t26
- 32: ADDL $0x1C, t26
- 33: LDL (t26), t28
- 34: PUTL t28, R27
- 35: INCEIPL $4
-
- 0x2547B72C: 83810020 lwz r28,32(r1)
- 36: GETL R1, t30
- 37: ADDL $0x20, t30
- 38: LDL (t30), t32
- 39: PUTL t32, R28
- 40: INCEIPL $4
-
- 0x2547B730: 83A10024 lwz r29,36(r1)
- 41: GETL R1, t34
- 42: ADDL $0x24, t34
- 43: LDL (t34), t36
- 44: PUTL t36, R29
- 45: INCEIPL $4
-
- 0x2547B734: 83C10028 lwz r30,40(r1)
- 46: GETL R1, t38
- 47: ADDL $0x28, t38
- 48: LDL (t38), t40
- 49: PUTL t40, R30
- 50: INCEIPL $4
-
- 0x2547B738: 38210030 addi r1,r1,48
- 51: GETL R1, t42
- 52: ADDL $0x30, t42
- 53: PUTL t42, R1
- 54: INCEIPL $4
-
- 0x2547B73C: 4E800020 blr
- 55: GETL LR, t44
- 56: JMPo-r t44 ($4)
-
-
-. 0 2547B70C 52
-. 93 5D 00 00 80 01 00 34 93 7C 00 00 82 E1 00 0C 7C 08 03 A6 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 38 21 00 30 4E 80 00 20
-
-==== BB 978 (0x25472900) approx BBs exec'd 0 ====
-
- 0x25472900: 836E03D8 lwz r27,984(r14)
- 0: GETL R14, t0
- 1: ADDL $0x3D8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R27
- 4: INCEIPL $4
-
- 0x25472904: 2E1B0000 cmpi cr4,r27,0
- 5: GETL R27, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x4, CR
- 8: INCEIPL $4
-
- 0x25472908: 40920AEC bc 4,18,0x254733F4
- 9: Jc18o $0x254733F4
-
-
-. 0 25472900 12
-. 83 6E 03 D8 2E 1B 00 00 40 92 0A EC
-
-==== BB 979 (0x2547290C) approx BBs exec'd 0 ====
-
- 0x2547290C: 816E0408 lwz r11,1032(r14)
- 0: GETL R14, t0
- 1: ADDL $0x408, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25472910: 3ACB003F addi r22,r11,63
- 5: GETL R11, t4
- 6: ADDL $0x3F, t4
- 7: PUTL t4, R22
- 8: INCEIPL $4
-
- 0x25472914: 916E0414 stw r11,1044(r14)
- 9: GETL R11, t6
- 10: GETL R14, t8
- 11: ADDL $0x414, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x25472918: 56D91838 rlwinm r25,r22,3,0,28
- 14: GETL R22, t10
- 15: SHLL $0x3, t10
- 16: PUTL t10, R25
- 17: INCEIPL $4
-
- 0x2547291C: 38790008 addi r3,r25,8
- 18: GETL R25, t12
- 19: ADDL $0x8, t12
- 20: PUTL t12, R3
- 21: INCEIPL $4
-
- 0x25472920: 48025105 bl 0x25497A24
- 22: MOVL $0x25472924, t14
- 23: PUTL t14, LR
- 24: JMPo-c $0x25497A24 ($4)
-
-
-. 0 2547290C 24
-. 81 6E 04 08 3A CB 00 3F 91 6E 04 14 56 D9 18 38 38 79 00 08 48 02 51 05
-
-==== BB 980 (0x25472924) approx BBs exec'd 0 ====
-
- 0x25472924: 7F25CB78 or r5,r25,r25
- 0: GETL R25, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x25472928: 7C6C1B78 or r12,r3,r3
- 3: GETL R3, t2
- 4: PUTL t2, R12
- 5: INCEIPL $4
-
- 0x2547292C: 38800000 li r4,0
- 6: MOVL $0x0, t4
- 7: PUTL t4, R4
- 8: INCEIPL $4
-
- 0x25472930: 38630008 addi r3,r3,8
- 9: GETL R3, t6
- 10: ADDL $0x8, t6
- 11: PUTL t6, R3
- 12: INCEIPL $4
-
- 0x25472934: 918E0410 stw r12,1040(r14)
- 13: GETL R12, t8
- 14: GETL R14, t10
- 15: ADDL $0x410, t10
- 16: STL t8, (t10)
- 17: INCEIPL $4
-
- 0x25472938: 48010E0D bl 0x25483744
- 18: MOVL $0x2547293C, t12
- 19: PUTL t12, LR
- 20: JMPo-c $0x25483744 ($4)
-
-
-. 0 25472924 24
-. 7F 25 CB 78 7C 6C 1B 78 38 80 00 00 38 63 00 08 91 8E 04 10 48 01 0E 0D
-
-==== BB 981 (0x2547293C) approx BBs exec'd 0 ====
-
- 0x2547293C: 80CE0410 lwz r6,1040(r14)
- 0: GETL R14, t0
- 1: ADDL $0x410, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x25472940: 38000000 li r0,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R0
- 7: INCEIPL $4
-
- 0x25472944: 7E89A378 or r9,r20,r20
- 8: GETL R20, t6
- 9: PUTL t6, R9
- 10: INCEIPL $4
-
- 0x25472948: 90060004 stw r0,4(r6)
- 11: GETL R0, t8
- 12: GETL R6, t10
- 13: ADDL $0x4, t10
- 14: STL t8, (t10)
- 15: INCEIPL $4
-
- 0x2547294C: 92C60000 stw r22,0(r6)
- 16: GETL R22, t12
- 17: GETL R6, t14
- 18: STL t12, (t14)
- 19: INCEIPL $4
-
- 0x25472950: 418E0024 bc 12,14,0x25472974
- 20: Js14o $0x25472974
-
-
-. 0 2547293C 24
-. 80 CE 04 10 38 00 00 00 7E 89 A3 78 90 06 00 04 92 C6 00 00 41 8E 00 24
-
-==== BB 982 (0x25472954) approx BBs exec'd 0 ====
-
- 0x25472954: 38630004 addi r3,r3,4
- 0: GETL R3, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R3
- 3: INCEIPL $4
-
- 0x25472958: 83890220 lwz r28,544(r9)
- 4: GETL R9, t2
- 5: ADDL $0x220, t2
- 6: LDL (t2), t4
- 7: PUTL t4, R28
- 8: INCEIPL $4
-
- 0x2547295C: 2F1C0000 cmpi cr6,r28,0
- 9: GETL R28, t6
- 10: CMP0L t6, t8 (-rSo)
- 11: ICRFL t8, $0x6, CR
- 12: INCEIPL $4
-
- 0x25472960: 419A0008 bc 12,26,0x25472968
- 13: Js26o $0x25472968
-
-
-. 0 25472954 16
-. 38 63 00 04 83 89 02 20 2F 1C 00 00 41 9A 00 08
-
-==== BB 983 (0x25472968) approx BBs exec'd 0 ====
-
- 0x25472968: 8129000C lwz r9,12(r9)
- 0: GETL R9, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547296C: 2C090000 cmpi cr0,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x25472970: 4082FFE8 bc 4,2,0x25472958
- 9: Jc02o $0x25472958
-
-
-. 0 25472968 12
-. 81 29 00 0C 2C 09 00 00 40 82 FF E8
-
-==== BB 984 (0x25472958) approx BBs exec'd 0 ====
-
- 0x25472958: 83890220 lwz r28,544(r9)
- 0: GETL R9, t0
- 1: ADDL $0x220, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R28
- 4: INCEIPL $4
-
- 0x2547295C: 2F1C0000 cmpi cr6,r28,0
- 5: GETL R28, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x25472960: 419A0008 bc 12,26,0x25472968
- 9: Js26o $0x25472968
-
-
-. 0 25472958 12
-. 83 89 02 20 2F 1C 00 00 41 9A 00 08
-
-==== BB 985 (0x25472964) approx BBs exec'd 0 ====
-
- 0x25472964: 95230008 stwu r9,8(r3)
- 0: GETL R9, t0
- 1: GETL R3, t2
- 2: ADDL $0x8, t2
- 3: PUTL t2, R3
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25472968: 8129000C lwz r9,12(r9)
- 6: GETL R9, t4
- 7: ADDL $0xC, t4
- 8: LDL (t4), t6
- 9: PUTL t6, R9
- 10: INCEIPL $4
-
- 0x2547296C: 2C090000 cmpi cr0,r9,0
- 11: GETL R9, t8
- 12: CMP0L t8, t10 (-rSo)
- 13: ICRFL t10, $0x0, CR
- 14: INCEIPL $4
-
- 0x25472970: 4082FFE8 bc 4,2,0x25472958
- 15: Jc02o $0x25472958
-
-
-. 0 25472964 16
-. 95 23 00 08 81 29 00 0C 2C 09 00 00 40 82 FF E8
-
-==== BB 986 (0x25472974) approx BBs exec'd 0 ====
-
- 0x25472974: 4800B359 bl 0x2547DCCC
- 0: MOVL $0x25472978, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x2547DCCC ($4)
-
-
-. 0 25472974 4
-. 48 00 B3 59
-
-==== BB 987 _dl_determine_tlsoffset(0x2547DCCC) approx BBs exec'd 0 ====
-
- 0x2547DCCC: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547DCD0: 7D8802A6 mflr r12
- 6: GETL LR, t4
- 7: PUTL t4, R12
- 8: INCEIPL $4
-
- 0x2547DCD4: 4801932D bl 0x25497000
- 9: MOVL $0x2547DCD8, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547DCCC 12
-. 94 21 FF E0 7D 88 02 A6 48 01 93 2D
-
-==== BB 988 (0x2547DCD8) approx BBs exec'd 0 ====
-
- 0x2547DCD8: 93C10018 stw r30,24(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x18, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547DCDC: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x2547DCE0: 9361000C stw r27,12(r1)
- 8: GETL R27, t6
- 9: GETL R1, t8
- 10: ADDL $0xC, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2547DCE4: 93810010 stw r28,16(r1)
- 13: GETL R28, t10
- 14: GETL R1, t12
- 15: ADDL $0x10, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x2547DCE8: 38600000 li r3,0
- 18: MOVL $0x0, t14
- 19: PUTL t14, R3
- 20: INCEIPL $4
-
- 0x2547DCEC: 93A10014 stw r29,20(r1)
- 21: GETL R29, t16
- 22: GETL R1, t18
- 23: ADDL $0x14, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x2547DCF0: 7D8803A6 mtlr r12
- 26: GETL R12, t20
- 27: PUTL t20, LR
- 28: INCEIPL $4
-
- 0x2547DCF4: 837E04C8 lwz r27,1224(r30)
- 29: GETL R30, t22
- 30: ADDL $0x4C8, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R27
- 33: INCEIPL $4
-
- 0x2547DCF8: 3B800020 li r28,32
- 34: MOVL $0x20, t26
- 35: PUTL t26, R28
- 36: INCEIPL $4
-
- 0x2547DCFC: 93E1001C stw r31,28(r1)
- 37: GETL R31, t28
- 38: GETL R1, t30
- 39: ADDL $0x1C, t30
- 40: STL t28, (t30)
- 41: INCEIPL $4
-
- 0x2547DD00: 3BA00000 li r29,0
- 42: MOVL $0x0, t32
- 43: PUTL t32, R29
- 44: INCEIPL $4
-
- 0x2547DD04: 813B0410 lwz r9,1040(r27)
- 45: GETL R27, t34
- 46: ADDL $0x410, t34
- 47: LDL (t34), t36
- 48: PUTL t36, R9
- 49: INCEIPL $4
-
- 0x2547DD08: 3BE00000 li r31,0
- 50: MOVL $0x0, t38
- 51: PUTL t38, R31
- 52: INCEIPL $4
-
- 0x2547DD0C: 39800001 li r12,1
- 53: MOVL $0x1, t40
- 54: PUTL t40, R12
- 55: INCEIPL $4
-
- 0x2547DD10: 38A90008 addi r5,r9,8
- 56: GETL R9, t42
- 57: ADDL $0x8, t42
- 58: PUTL t42, R5
- 59: INCEIPL $4
-
- 0x2547DD14: 8005000C lwz r0,12(r5)
- 60: GETL R5, t44
- 61: ADDL $0xC, t44
- 62: LDL (t44), t46
- 63: PUTL t46, R0
- 64: INCEIPL $4
-
- 0x2547DD18: 2F800000 cmpi cr7,r0,0
- 65: GETL R0, t48
- 66: CMP0L t48, t50 (-rSo)
- 67: ICRFL t50, $0x7, CR
- 68: INCEIPL $4
-
- 0x2547DD1C: 419E0104 bc 12,30,0x2547DE20
- 69: Js30o $0x2547DE20
-
-
-. 0 2547DCD8 72
-. 93 C1 00 18 7F C8 02 A6 93 61 00 0C 93 81 00 10 38 60 00 00 93 A1 00 14 7D 88 03 A6 83 7E 04 C8 3B 80 00 20 93 E1 00 1C 3B A0 00 00 81 3B 04 10 3B E0 00 00 39 80 00 01 38 A9 00 08 80 05 00 0C 2F 80 00 00 41 9E 01 04
-
-==== BB 989 (0x2547DD20) approx BBs exec'd 0 ====
-
- 0x2547DD20: 38C00008 li r6,8
- 0: MOVL $0x8, t0
- 1: PUTL t0, R6
- 2: INCEIPL $4
-
- 0x2547DD24: 48000058 b 0x2547DD7C
- 3: JMPo $0x2547DD7C ($4)
-
-
-. 0 2547DD20 8
-. 38 C0 00 08 48 00 00 58
-
-==== BB 990 (0x2547DD7C) approx BBs exec'd 0 ====
-
- 0x2547DD7C: 7D662A14 add r11,r6,r5
- 0: GETL R6, t0
- 1: GETL R5, t2
- 2: ADDL t0, t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547DD80: 814B0004 lwz r10,4(r11)
- 5: GETL R11, t4
- 6: ADDL $0x4, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R10
- 9: INCEIPL $4
-
- 0x2547DD84: 816A0224 lwz r11,548(r10)
- 10: GETL R10, t8
- 11: ADDL $0x224, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R11
- 14: INCEIPL $4
-
- 0x2547DD88: 810A0228 lwz r8,552(r10)
- 15: GETL R10, t12
- 16: ADDL $0x228, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R8
- 19: INCEIPL $4
-
- 0x2547DD8C: 7C1C5840 cmpl cr0,r28,r11
- 20: GETL R28, t16
- 21: GETL R11, t18
- 22: CMPUL t16, t18, t20 (-rSo)
- 23: ICRFL t20, $0x0, CR
- 24: INCEIPL $4
-
- 0x2547DD90: 388BFFFF addi r4,r11,-1
- 25: GETL R11, t22
- 26: ADDL $0xFFFFFFFF, t22
- 27: PUTL t22, R4
- 28: INCEIPL $4
-
- 0x2547DD94: 7CE800D0 neg r7,r8
- 29: GETL R8, t24
- 30: NEGL t24
- 31: PUTL t24, R7
- 32: INCEIPL $4
-
- 0x2547DD98: 7CE82038 and r8,r7,r4
- 33: GETL R7, t26
- 34: GETL R4, t28
- 35: ANDL t26, t28
- 36: PUTL t28, R8
- 37: INCEIPL $4
-
- 0x2547DD9C: 40800008 bc 4,0,0x2547DDA4
- 38: Jc00o $0x2547DDA4
-
-
-. 0 2547DD7C 36
-. 7D 66 2A 14 81 4B 00 04 81 6A 02 24 81 0A 02 28 7C 1C 58 40 38 8B FF FF 7C E8 00 D0 7C E8 20 38 40 80 00 08
-
-==== BB 991 (0x2547DDA4) approx BBs exec'd 0 ====
-
- 0x2547DDA4: 80EA0220 lwz r7,544(r10)
- 0: GETL R10, t0
- 1: ADDL $0x220, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x2547DDA8: 7C9FE850 subf r4,r31,r29
- 5: GETL R31, t4
- 6: GETL R29, t6
- 7: SUBL t4, t6
- 8: PUTL t6, R4
- 9: INCEIPL $4
-
- 0x2547DDAC: 7C872040 cmpl cr1,r7,r4
- 10: GETL R7, t8
- 11: GETL R4, t10
- 12: CMPUL t8, t10, t12 (-rSo)
- 13: ICRFL t12, $0x1, CR
- 14: INCEIPL $4
-
- 0x2547DDB0: 40A5FF78 bc 5,5,0x2547DD28
- 15: Jc05o $0x2547DD28
-
-
-. 0 2547DDA4 16
-. 80 EA 02 20 7C 9F E8 50 7C 87 20 40 40 A5 FF 78
-
-==== BB 992 (0x2547DDB4) approx BBs exec'd 0 ====
-
- 0x2547DDB4: 7D662A14 add r11,r6,r5
- 0: GETL R6, t0
- 1: GETL R5, t2
- 2: ADDL t0, t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547DDB8: 814B0004 lwz r10,4(r11)
- 5: GETL R11, t4
- 6: ADDL $0x4, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R10
- 9: INCEIPL $4
-
- 0x2547DDBC: 816A0224 lwz r11,548(r10)
- 10: GETL R10, t8
- 11: ADDL $0x224, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R11
- 14: INCEIPL $4
-
- 0x2547DDC0: 7CCB1A14 add r6,r11,r3
- 15: GETL R11, t12
- 16: GETL R3, t14
- 17: ADDL t12, t14
- 18: PUTL t14, R6
- 19: INCEIPL $4
-
- 0x2547DDC4: 3806FFFF addi r0,r6,-1
- 20: GETL R6, t16
- 21: ADDL $0xFFFFFFFF, t16
- 22: PUTL t16, R0
- 23: INCEIPL $4
-
- 0x2547DDC8: 7D205B96 divwu r9, r0, r11
- 24: GETL R0, t20
- 25: GETL R11, t18
- 26: UDIVL t18, t20
- 27: PUTL t20, R9
- 28: INCEIPL $4
-
- 0x2547DDCC: 7D2959D6 mullw r9,r9,r11
- 29: GETL R9, t22
- 30: GETL R11, t24
- 31: MULL t22, t24
- 32: PUTL t24, R9
- 33: INCEIPL $4
-
- 0x2547DDD0: 7CE34850 subf r7,r3,r9
- 34: GETL R3, t26
- 35: GETL R9, t28
- 36: SUBL t26, t28
- 37: PUTL t28, R7
- 38: INCEIPL $4
-
- 0x2547DDD4: 7C074040 cmpl cr0,r7,r8
- 39: GETL R7, t30
- 40: GETL R8, t32
- 41: CMPUL t30, t32, t34 (-rSo)
- 42: ICRFL t34, $0x0, CR
- 43: INCEIPL $4
-
- 0x2547DDD8: 40800008 bc 4,0,0x2547DDE0
- 44: Jc00o $0x2547DDE0
-
-
-. 0 2547DDB4 40
-. 7D 66 2A 14 81 4B 00 04 81 6A 02 24 7C CB 1A 14 38 06 FF FF 7D 20 5B 96 7D 29 59 D6 7C E3 48 50 7C 07 40 40 40 80 00 08
-
-==== BB 993 (0x2547DDE0) approx BBs exec'd 0 ====
-
- 0x2547DDE0: 7D684850 subf r11,r8,r9
- 0: GETL R8, t0
- 1: GETL R9, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547DDE4: 7CE35850 subf r7,r3,r11
- 5: GETL R3, t4
- 6: GETL R11, t6
- 7: SUBL t4, t6
- 8: PUTL t6, R7
- 9: INCEIPL $4
-
- 0x2547DDE8: 916A022C stw r11,556(r10)
- 10: GETL R11, t8
- 11: GETL R10, t10
- 12: ADDL $0x22C, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x2547DDEC: 7C872040 cmpl cr1,r7,r4
- 15: GETL R7, t12
- 16: GETL R4, t14
- 17: CMPUL t12, t14, t16 (-rSo)
- 18: ICRFL t16, $0x1, CR
- 19: INCEIPL $4
-
- 0x2547DDF0: 4085000C bc 4,5,0x2547DDFC
- 20: Jc05o $0x2547DDFC
-
-
-. 0 2547DDE0 20
-. 7D 68 48 50 7C E3 58 50 91 6A 02 2C 7C 87 20 40 40 85 00 0C
-
-==== BB 994 (0x2547DDFC) approx BBs exec'd 0 ====
-
- 0x2547DDFC: 806A0220 lwz r3,544(r10)
- 0: GETL R10, t0
- 1: ADDL $0x220, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x2547DE00: 398C0001 addi r12,r12,1
- 5: GETL R12, t4
- 6: ADDL $0x1, t4
- 7: PUTL t4, R12
- 8: INCEIPL $4
-
- 0x2547DE04: 55861838 rlwinm r6,r12,3,0,28
- 9: GETL R12, t6
- 10: SHLL $0x3, t6
- 11: PUTL t6, R6
- 12: INCEIPL $4
-
- 0x2547DE08: 7D434A14 add r10,r3,r9
- 13: GETL R3, t8
- 14: GETL R9, t10
- 15: ADDL t8, t10
- 16: PUTL t10, R10
- 17: INCEIPL $4
-
- 0x2547DE0C: 7C685050 subf r3,r8,r10
- 18: GETL R8, t12
- 19: GETL R10, t14
- 20: SUBL t12, t14
- 21: PUTL t14, R3
- 22: INCEIPL $4
-
- 0x2547DE10: 7D062A14 add r8,r6,r5
- 23: GETL R6, t16
- 24: GETL R5, t18
- 25: ADDL t16, t18
- 26: PUTL t18, R8
- 27: INCEIPL $4
-
- 0x2547DE14: 80880004 lwz r4,4(r8)
- 28: GETL R8, t20
- 29: ADDL $0x4, t20
- 30: LDL (t20), t22
- 31: PUTL t22, R4
- 32: INCEIPL $4
-
- 0x2547DE18: 2F040000 cmpi cr6,r4,0
- 33: GETL R4, t24
- 34: CMP0L t24, t26 (-rSo)
- 35: ICRFL t26, $0x6, CR
- 36: INCEIPL $4
-
- 0x2547DE1C: 409AFF60 bc 4,26,0x2547DD7C
- 37: Jc26o $0x2547DD7C
-
-
-. 0 2547DDFC 36
-. 80 6A 02 20 39 8C 00 01 55 86 18 38 7D 43 4A 14 7C 68 50 50 7D 06 2A 14 80 88 00 04 2F 04 00 00 40 9A FF 60
-
-==== BB 995 (0x2547DE20) approx BBs exec'd 0 ====
-
- 0x2547DE20: 3BA3069F addi r29,r3,1695
- 0: GETL R3, t0
- 1: ADDL $0x69F, t0
- 2: PUTL t0, R29
- 3: INCEIPL $4
-
- 0x2547DE24: 939B0420 stw r28,1056(r27)
- 4: GETL R28, t2
- 5: GETL R27, t4
- 6: ADDL $0x420, t4
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0x2547DE28: 57A50034 rlwinm r5,r29,0,0,26
- 9: GETL R29, t6
- 10: ANDL $0xFFFFFFE0, t6
- 11: PUTL t6, R5
- 12: INCEIPL $4
-
- 0x2547DE2C: 907B041C stw r3,1052(r27)
- 13: GETL R3, t8
- 14: GETL R27, t10
- 15: ADDL $0x41C, t10
- 16: STL t8, (t10)
- 17: INCEIPL $4
-
- 0x2547DE30: 90BB0418 stw r5,1048(r27)
- 18: GETL R5, t12
- 19: GETL R27, t14
- 20: ADDL $0x418, t14
- 21: STL t12, (t14)
- 22: INCEIPL $4
-
- 0x2547DE34: 83810010 lwz r28,16(r1)
- 23: GETL R1, t16
- 24: ADDL $0x10, t16
- 25: LDL (t16), t18
- 26: PUTL t18, R28
- 27: INCEIPL $4
-
- 0x2547DE38: 8361000C lwz r27,12(r1)
- 28: GETL R1, t20
- 29: ADDL $0xC, t20
- 30: LDL (t20), t22
- 31: PUTL t22, R27
- 32: INCEIPL $4
-
- 0x2547DE3C: 83A10014 lwz r29,20(r1)
- 33: GETL R1, t24
- 34: ADDL $0x14, t24
- 35: LDL (t24), t26
- 36: PUTL t26, R29
- 37: INCEIPL $4
-
- 0x2547DE40: 83C10018 lwz r30,24(r1)
- 38: GETL R1, t28
- 39: ADDL $0x18, t28
- 40: LDL (t28), t30
- 41: PUTL t30, R30
- 42: INCEIPL $4
-
- 0x2547DE44: 83E1001C lwz r31,28(r1)
- 43: GETL R1, t32
- 44: ADDL $0x1C, t32
- 45: LDL (t32), t34
- 46: PUTL t34, R31
- 47: INCEIPL $4
-
- 0x2547DE48: 38210020 addi r1,r1,32
- 48: GETL R1, t36
- 49: ADDL $0x20, t36
- 50: PUTL t36, R1
- 51: INCEIPL $4
-
- 0x2547DE4C: 4E800020 blr
- 52: GETL LR, t38
- 53: JMPo-r t38 ($4)
-
-
-. 0 2547DE20 48
-. 3B A3 06 9F 93 9B 04 20 57 A5 00 34 90 7B 04 1C 90 BB 04 18 83 81 00 10 83 61 00 0C 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 996 (0x25472978) approx BBs exec'd 0 ====
-
- 0x25472978: 4800B57D bl 0x2547DEF4
- 0: MOVL $0x2547297C, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x2547DEF4 ($4)
-
-
-. 0 25472978 4
-. 48 00 B5 7D
-
-==== BB 997 _dl_allocate_tls_storage(0x2547DEF4) approx BBs exec'd 0 ====
-
- 0x2547DEF4: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547DEF8: 7C6802A6 mflr r3
- 6: GETL LR, t4
- 7: PUTL t4, R3
- 8: INCEIPL $4
-
- 0x2547DEFC: 48019105 bl 0x25497000
- 9: MOVL $0x2547DF00, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547DEF4 12
-. 94 21 FF E0 7C 68 02 A6 48 01 91 05
-
-==== BB 998 (0x2547DF00) approx BBs exec'd 0 ====
-
- 0x2547DF00: 93C10018 stw r30,24(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x18, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547DF04: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x2547DF08: 93810010 stw r28,16(r1)
- 8: GETL R28, t6
- 9: GETL R1, t8
- 10: ADDL $0x10, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2547DF0C: 90610024 stw r3,36(r1)
- 13: GETL R3, t10
- 14: GETL R1, t12
- 15: ADDL $0x24, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x2547DF10: 93A10014 stw r29,20(r1)
- 18: GETL R29, t14
- 19: GETL R1, t16
- 20: ADDL $0x14, t16
- 21: STL t14, (t16)
- 22: INCEIPL $4
-
- 0x2547DF14: 839E04C8 lwz r28,1224(r30)
- 23: GETL R30, t18
- 24: ADDL $0x4C8, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R28
- 27: INCEIPL $4
-
- 0x2547DF18: 9361000C stw r27,12(r1)
- 28: GETL R27, t22
- 29: GETL R1, t24
- 30: ADDL $0xC, t24
- 31: STL t22, (t24)
- 32: INCEIPL $4
-
- 0x2547DF1C: 807C0420 lwz r3,1056(r28)
- 33: GETL R28, t26
- 34: ADDL $0x420, t26
- 35: LDL (t26), t28
- 36: PUTL t28, R3
- 37: INCEIPL $4
-
- 0x2547DF20: 809C0418 lwz r4,1048(r28)
- 38: GETL R28, t30
- 39: ADDL $0x418, t30
- 40: LDL (t30), t32
- 41: PUTL t32, R4
- 42: INCEIPL $4
-
- 0x2547DF24: 38A3046F addi r5,r3,1135
- 43: GETL R3, t34
- 44: ADDL $0x46F, t34
- 45: PUTL t34, R5
- 46: INCEIPL $4
-
- 0x2547DF28: 7D2300D0 neg r9,r3
- 47: GETL R3, t36
- 48: NEGL t36
- 49: PUTL t36, R9
- 50: INCEIPL $4
-
- 0x2547DF2C: 7CA04838 and r0,r5,r9
- 51: GETL R5, t38
- 52: GETL R9, t40
- 53: ANDL t38, t40
- 54: PUTL t40, R0
- 55: INCEIPL $4
-
- 0x2547DF30: 93E1001C stw r31,28(r1)
- 56: GETL R31, t42
- 57: GETL R1, t44
- 58: ADDL $0x1C, t44
- 59: STL t42, (t44)
- 60: INCEIPL $4
-
- 0x2547DF34: 7FA40214 add r29,r4,r0
- 61: GETL R4, t46
- 62: GETL R0, t48
- 63: ADDL t46, t48
- 64: PUTL t48, R29
- 65: INCEIPL $4
-
- 0x2547DF38: 7FA4EB78 or r4,r29,r29
- 66: GETL R29, t50
- 67: PUTL t50, R4
- 68: INCEIPL $4
-
- 0x2547DF3C: 48019AE1 bl 0x25497A1C
- 69: MOVL $0x2547DF40, t52
- 70: PUTL t52, LR
- 71: JMPo-c $0x25497A1C ($4)
-
-
-. 0 2547DF00 64
-. 93 C1 00 18 7F C8 02 A6 93 81 00 10 90 61 00 24 93 A1 00 14 83 9E 04 C8 93 61 00 0C 80 7C 04 20 80 9C 04 18 38 A3 04 6F 7D 23 00 D0 7C A0 48 38 93 E1 00 1C 7F A4 02 14 7F A4 EB 78 48 01 9A E1
-
-==== BB 999 (0x2547DF40) approx BBs exec'd 0 ====
-
- 0x2547DF40: 38A00470 li r5,1136
- 0: MOVL $0x470, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x2547DF44: 7C7F1B79 or. r31,r3,r3
- 3: GETL R3, t2
- 4: PUTL t2, R31
- 5: CMP0L t2, t4 (-rSo)
- 6: ICRFL t4, $0x0, CR
- 7: INCEIPL $4
-
- 0x2547DF48: 38800000 li r4,0
- 8: MOVL $0x0, t6
- 9: PUTL t6, R4
- 10: INCEIPL $4
-
- 0x2547DF4C: 7FFBFB78 or r27,r31,r31
- 11: GETL R31, t8
- 12: PUTL t8, R27
- 13: INCEIPL $4
-
- 0x2547DF50: 7C1FEA14 add r0,r31,r29
- 14: GETL R31, t10
- 15: GETL R29, t12
- 16: ADDL t10, t12
- 17: PUTL t12, R0
- 18: INCEIPL $4
-
- 0x2547DF54: 4182004C bc 12,2,0x2547DFA0
- 19: Js02o $0x2547DFA0
-
-
-. 0 2547DF40 24
-. 38 A0 04 70 7C 7F 1B 79 38 80 00 00 7F FB FB 78 7C 1F EA 14 41 82 00 4C
-
-==== BB 1000 (0x2547DF58) approx BBs exec'd 0 ====
-
- 0x2547DF58: 80FC0418 lwz r7,1048(r28)
- 0: GETL R28, t0
- 1: ADDL $0x418, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x2547DF5C: 7FA70050 subf r29,r7,r0
- 5: GETL R7, t4
- 6: GETL R0, t6
- 7: SUBL t4, t6
- 8: PUTL t6, R29
- 9: INCEIPL $4
-
- 0x2547DF60: 387DFB90 addi r3,r29,-1136
- 10: GETL R29, t8
- 11: ADDL $0xFFFFFB90, t8
- 12: PUTL t8, R3
- 13: INCEIPL $4
-
- 0x2547DF64: 480057E1 bl 0x25483744
- 14: MOVL $0x2547DF68, t10
- 15: PUTL t10, LR
- 16: JMPo-c $0x25483744 ($4)
-
-
-. 0 2547DF58 16
-. 80 FC 04 18 7F A7 00 50 38 7D FB 90 48 00 57 E1
-
-==== BB 1001 (0x254837BC) approx BBs exec'd 0 ====
-
- 0x254837BC: 9088FFFC stw r4,-4(r8)
- 0: GETL R4, t0
- 1: GETL R8, t2
- 2: ADDL $0xFFFFFFFC, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x254837C0: 9088FFF8 stw r4,-8(r8)
- 5: GETL R4, t4
- 6: GETL R8, t6
- 7: ADDL $0xFFFFFFF8, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x254837C4: 9088FFF4 stw r4,-12(r8)
- 10: GETL R4, t8
- 11: GETL R8, t10
- 12: ADDL $0xFFFFFFF4, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x254837C8: 9488FFF0 stwu r4,-16(r8)
- 15: GETL R4, t12
- 16: GETL R8, t14
- 17: ADDL $0xFFFFFFF0, t14
- 18: PUTL t14, R8
- 19: STL t12, (t14)
- 20: INCEIPL $4
-
- 0x254837CC: 409D0008 bc 4,29,0x254837D4
- 21: Jc29o $0x254837D4
-
-
-. 0 254837BC 20
-. 90 88 FF FC 90 88 FF F8 90 88 FF F4 94 88 FF F0 40 9D 00 08
-
-==== BB 1002 (0x25483894) approx BBs exec'd 0 ====
-
- 0x25483894: 7C0037EC dcbz r0,r6
- 0: GETL R6, t0
- 1: ANDL $0xFFFFFFE0, t0
- 2: MOVL $0x0, t2
- 3: STL t2, (t0)
- 4: ADDL $0x4, t0
- 5: STL t2, (t0)
- 6: ADDL $0x4, t0
- 7: STL t2, (t0)
- 8: ADDL $0x4, t0
- 9: STL t2, (t0)
- 10: ADDL $0x4, t0
- 11: STL t2, (t0)
- 12: ADDL $0x4, t0
- 13: STL t2, (t0)
- 14: ADDL $0x4, t0
- 15: STL t2, (t0)
- 16: ADDL $0x4, t0
- 17: STL t2, (t0)
- 18: INCEIPL $4
-
- 0x25483898: 7C0737EC dcbz r7,r6
- 19: GETL R6, t4
- 20: GETL R7, t6
- 21: ADDL t6, t4
- 22: ANDL $0xFFFFFFE0, t4
- 23: MOVL $0x0, t8
- 24: STL t8, (t4)
- 25: ADDL $0x4, t4
- 26: STL t8, (t4)
- 27: ADDL $0x4, t4
- 28: STL t8, (t4)
- 29: ADDL $0x4, t4
- 30: STL t8, (t4)
- 31: ADDL $0x4, t4
- 32: STL t8, (t4)
- 33: ADDL $0x4, t4
- 34: STL t8, (t4)
- 35: ADDL $0x4, t4
- 36: STL t8, (t4)
- 37: ADDL $0x4, t4
- 38: STL t8, (t4)
- 39: INCEIPL $4
-
- 0x2548389C: 38C60040 addi r6,r6,64
- 40: GETL R6, t10
- 41: ADDL $0x40, t10
- 42: PUTL t10, R6
- 43: INCEIPL $4
-
- 0x254838A0: 2A850000 cmpli cr5,r5,0
- 44: GETL R5, t12
- 45: MOVL $0x0, t16
- 46: CMPUL t12, t16, t14 (-rSo)
- 47: ICRFL t14, $0x5, CR
- 48: INCEIPL $4
-
- 0x254838A4: 4182007C bc 12,2,0x25483920
- 49: Js02o $0x25483920
-
-
-. 0 25483894 20
-. 7C 00 37 EC 7C 07 37 EC 38 C6 00 40 2A 85 00 00 41 82 00 7C
-
-==== BB 1003 (0x2547DF68) approx BBs exec'd 0 ====
-
- 0x2547DF68: 80DC0408 lwz r6,1032(r28)
- 0: GETL R28, t0
- 1: ADDL $0x408, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x2547DF6C: 38800004 li r4,4
- 5: MOVL $0x4, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0x2547DF70: 38660010 addi r3,r6,16
- 8: GETL R6, t6
- 9: ADDL $0x10, t6
- 10: PUTL t6, R3
- 11: INCEIPL $4
-
- 0x2547DF74: 3BE6000E addi r31,r6,14
- 12: GETL R6, t8
- 13: ADDL $0xE, t8
- 14: PUTL t8, R31
- 15: INCEIPL $4
-
- 0x2547DF78: 48019AB5 bl 0x25497A2C
- 16: MOVL $0x2547DF7C, t10
- 17: PUTL t10, LR
- 18: JMPo-c $0x25497A2C ($4)
-
-
-. 0 2547DF68 20
-. 80 DC 04 08 38 80 00 04 38 66 00 10 3B E6 00 0E 48 01 9A B5
-
-==== BB 1004 (0x2547DF7C) approx BBs exec'd 0 ====
-
- 0x2547DF7C: 2C830000 cmpi cr1,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0x2547DF80: 38030004 addi r0,r3,4
- 4: GETL R3, t4
- 5: ADDL $0x4, t4
- 6: PUTL t4, R0
- 7: INCEIPL $4
-
- 0x2547DF84: 41860044 bc 12,6,0x2547DFC8
- 8: Js06o $0x2547DFC8
-
-
-. 0 2547DF7C 12
-. 2C 83 00 00 38 03 00 04 41 86 00 44
-
-==== BB 1005 (0x2547DF88) approx BBs exec'd 0 ====
-
- 0x2547DF88: 93E30000 stw r31,0(r3)
- 0: GETL R31, t0
- 1: GETL R3, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0x2547DF8C: 901DFFFC stw r0,-4(r29)
- 4: GETL R0, t4
- 5: GETL R29, t6
- 6: ADDL $0xFFFFFFFC, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0x2547DF90: 2F9D0000 cmpi cr7,r29,0
- 9: GETL R29, t8
- 10: CMP0L t8, t10 (-rSo)
- 11: ICRFL t10, $0x7, CR
- 12: INCEIPL $4
-
- 0x2547DF94: 7FBFEB78 or r31,r29,r29
- 13: GETL R29, t12
- 14: PUTL t12, R31
- 15: INCEIPL $4
-
- 0x2547DF98: 7F63DB78 or r3,r27,r27
- 16: GETL R27, t14
- 17: PUTL t14, R3
- 18: INCEIPL $4
-
- 0x2547DF9C: 419E0034 bc 12,30,0x2547DFD0
- 19: Js30o $0x2547DFD0
-
-
-. 0 2547DF88 24
-. 93 E3 00 00 90 1D FF FC 2F 9D 00 00 7F BF EB 78 7F 63 DB 78 41 9E 00 34
-
-==== BB 1006 (0x2547DFA0) approx BBs exec'd 0 ====
-
- 0x2547DFA0: 81010024 lwz r8,36(r1)
- 0: GETL R1, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x2547DFA4: 7FE3FB78 or r3,r31,r31
- 5: GETL R31, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x2547DFA8: 8361000C lwz r27,12(r1)
- 8: GETL R1, t6
- 9: ADDL $0xC, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R27
- 12: INCEIPL $4
-
- 0x2547DFAC: 83810010 lwz r28,16(r1)
- 13: GETL R1, t10
- 14: ADDL $0x10, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R28
- 17: INCEIPL $4
-
- 0x2547DFB0: 7D0803A6 mtlr r8
- 18: GETL R8, t14
- 19: PUTL t14, LR
- 20: INCEIPL $4
-
- 0x2547DFB4: 83A10014 lwz r29,20(r1)
- 21: GETL R1, t16
- 22: ADDL $0x14, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R29
- 25: INCEIPL $4
-
- 0x2547DFB8: 83C10018 lwz r30,24(r1)
- 26: GETL R1, t20
- 27: ADDL $0x18, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R30
- 30: INCEIPL $4
-
- 0x2547DFBC: 83E1001C lwz r31,28(r1)
- 31: GETL R1, t24
- 32: ADDL $0x1C, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R31
- 35: INCEIPL $4
-
- 0x2547DFC0: 38210020 addi r1,r1,32
- 36: GETL R1, t28
- 37: ADDL $0x20, t28
- 38: PUTL t28, R1
- 39: INCEIPL $4
-
- 0x2547DFC4: 4E800020 blr
- 40: GETL LR, t30
- 41: JMPo-r t30 ($4)
-
-
-. 0 2547DFA0 40
-. 81 01 00 24 7F E3 FB 78 83 61 00 0C 83 81 00 10 7D 08 03 A6 83 A1 00 14 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 1007 (0x2547297C) approx BBs exec'd 0 ====
-
- 0x2547297C: 7C711B79 or. r17,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R17
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x25472980: 41820E04 bc 12,2,0x25473784
- 5: Js02o $0x25473784
-
-
-. 0 2547297C 8
-. 7C 71 1B 79 41 82 0E 04
-
-==== BB 1008 (0x25472984) approx BBs exec'd 0 ====
-
- 0x25472984: 813F0030 lwz r9,48(r31)
- 0: GETL R31, t0
- 1: ADDL $0x30, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25472988: 39540158 addi r10,r20,344
- 5: GETL R20, t4
- 6: ADDL $0x158, t4
- 7: PUTL t4, R10
- 8: INCEIPL $4
-
- 0x2547298C: 8311FFFC lwz r24,-4(r17)
- 9: GETL R17, t6
- 10: ADDL $0xFFFFFFFC, t6
- 11: LDL (t6), t8
- 12: PUTL t8, R24
- 13: INCEIPL $4
-
- 0x25472990: 2F890000 cmpi cr7,r9,0
- 14: GETL R9, t10
- 15: CMP0L t10, t12 (-rSo)
- 16: ICRFL t12, $0x7, CR
- 17: INCEIPL $4
-
- 0x25472994: 915F0078 stw r10,120(r31)
- 18: GETL R10, t14
- 19: GETL R31, t16
- 20: ADDL $0x78, t16
- 21: STL t14, (t16)
- 22: INCEIPL $4
-
- 0x25472998: 930E0424 stw r24,1060(r14)
- 23: GETL R24, t18
- 24: GETL R14, t20
- 25: ADDL $0x424, t20
- 26: STL t18, (t20)
- 27: INCEIPL $4
-
- 0x2547299C: 409E0E38 bc 4,30,0x254737D4
- 28: Jc30o $0x254737D4
-
-
-. 0 25472984 28
-. 81 3F 00 30 39 54 01 58 83 11 FF FC 2F 89 00 00 91 5F 00 78 93 0E 04 24 40 9E 0E 38
-
-==== BB 1009 (0x254729A0) approx BBs exec'd 0 ====
-
- 0x254729A0: 8074013C lwz r3,316(r20)
- 0: GETL R20, t0
- 1: ADDL $0x13C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x254729A4: 2E120000 cmpi cr4,r18,0
- 5: GETL R18, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x4, CR
- 8: INCEIPL $4
-
- 0x254729A8: 2F830000 cmpi cr7,r3,0
- 9: GETL R3, t8
- 10: CMP0L t8, t10 (-rSo)
- 11: ICRFL t10, $0x7, CR
- 12: INCEIPL $4
-
- 0x254729AC: 419E0118 bc 12,30,0x25472AC4
- 13: Js30o $0x25472AC4
-
-
-. 0 254729A0 16
-. 80 74 01 3C 2E 12 00 00 2F 83 00 00 41 9E 01 18
-
-==== BB 1010 (0x25472AC4) approx BBs exec'd 0 ====
-
- 0x25472AC4: 806E01B8 lwz r3,440(r14)
- 0: GETL R14, t0
- 1: ADDL $0x1B8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25472AC8: 4800947D bl 0x2547BF44
- 5: MOVL $0x25472ACC, t4
- 6: PUTL t4, LR
- 7: JMPo-c $0x2547BF44 ($4)
-
-
-. 0 25472AC4 8
-. 80 6E 01 B8 48 00 94 7D
-
-==== BB 1011 _dl_debug_initialize(0x2547BF44) approx BBs exec'd 0 ====
-
- 0x2547BF44: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547BF48: 7D8802A6 mflr r12
- 6: GETL LR, t4
- 7: PUTL t4, R12
- 8: INCEIPL $4
-
- 0x2547BF4C: 4801B0B5 bl 0x25497000
- 9: MOVL $0x2547BF50, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547BF44 12
-. 94 21 FF F0 7D 88 02 A6 48 01 B0 B5
-
-==== BB 1012 (0x2547BF50) approx BBs exec'd 0 ====
-
- 0x2547BF50: 93C10008 stw r30,8(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547BF54: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x2547BF58: 7C681B78 or r8,r3,r3
- 8: GETL R3, t6
- 9: PUTL t6, R8
- 10: INCEIPL $4
-
- 0x2547BF5C: 7D8803A6 mtlr r12
- 11: GETL R12, t8
- 12: PUTL t8, LR
- 13: INCEIPL $4
-
- 0x2547BF60: 815E0518 lwz r10,1304(r30)
- 14: GETL R30, t10
- 15: ADDL $0x518, t10
- 16: LDL (t10), t12
- 17: PUTL t12, R10
- 18: INCEIPL $4
-
- 0x2547BF64: 800A0008 lwz r0,8(r10)
- 19: GETL R10, t14
- 20: ADDL $0x8, t14
- 21: LDL (t14), t16
- 22: PUTL t16, R0
- 23: INCEIPL $4
-
- 0x2547BF68: 7D435378 or r3,r10,r10
- 24: GETL R10, t18
- 25: PUTL t18, R3
- 26: INCEIPL $4
-
- 0x2547BF6C: 2F800000 cmpi cr7,r0,0
- 27: GETL R0, t20
- 28: CMP0L t20, t22 (-rSo)
- 29: ICRFL t22, $0x7, CR
- 30: INCEIPL $4
-
- 0x2547BF70: 409E0024 bc 4,30,0x2547BF94
- 31: Jc30o $0x2547BF94
-
-
-. 0 2547BF50 36
-. 93 C1 00 08 7F C8 02 A6 7C 68 1B 78 7D 88 03 A6 81 5E 05 18 80 0A 00 08 7D 43 53 78 2F 80 00 00 40 9E 00 24
-
-==== BB 1013 (0x2547BF74) approx BBs exec'd 0 ====
-
- 0x2547BF74: 813E04C8 lwz r9,1224(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4C8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547BF78: 38A00001 li r5,1
- 5: MOVL $0x1, t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0x2547BF7C: 809E0508 lwz r4,1288(r30)
- 8: GETL R30, t6
- 9: ADDL $0x508, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R4
- 12: INCEIPL $4
-
- 0x2547BF80: 81690000 lwz r11,0(r9)
- 13: GETL R9, t10
- 14: LDL (t10), t12
- 15: PUTL t12, R11
- 16: INCEIPL $4
-
- 0x2547BF84: 90AA0000 stw r5,0(r10)
- 17: GETL R5, t14
- 18: GETL R10, t16
- 19: STL t14, (t16)
- 20: INCEIPL $4
-
- 0x2547BF88: 910A0010 stw r8,16(r10)
- 21: GETL R8, t18
- 22: GETL R10, t20
- 23: ADDL $0x10, t20
- 24: STL t18, (t20)
- 25: INCEIPL $4
-
- 0x2547BF8C: 916A0004 stw r11,4(r10)
- 26: GETL R11, t22
- 27: GETL R10, t24
- 28: ADDL $0x4, t24
- 29: STL t22, (t24)
- 30: INCEIPL $4
-
- 0x2547BF90: 908A0008 stw r4,8(r10)
- 31: GETL R4, t26
- 32: GETL R10, t28
- 33: ADDL $0x8, t28
- 34: STL t26, (t28)
- 35: INCEIPL $4
-
- 0x2547BF94: 83C10008 lwz r30,8(r1)
- 36: GETL R1, t30
- 37: ADDL $0x8, t30
- 38: LDL (t30), t32
- 39: PUTL t32, R30
- 40: INCEIPL $4
-
- 0x2547BF98: 38210010 addi r1,r1,16
- 41: GETL R1, t34
- 42: ADDL $0x10, t34
- 43: PUTL t34, R1
- 44: INCEIPL $4
-
- 0x2547BF9C: 4E800020 blr
- 45: GETL LR, t36
- 46: JMPo-r t36 ($4)
-
-
-. 0 2547BF74 44
-. 81 3E 04 C8 38 A0 00 01 80 9E 05 08 81 69 00 00 90 AA 00 00 91 0A 00 10 91 6A 00 04 90 8A 00 08 83 C1 00 08 38 21 00 10 4E 80 00 20
-
-==== BB 1014 (0x25472ACC) approx BBs exec'd 0 ====
-
- 0x25472ACC: 81340074 lwz r9,116(r20)
- 0: GETL R20, t0
- 1: ADDL $0x74, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25472AD0: 7C7A1B78 or r26,r3,r3
- 5: GETL R3, t4
- 6: PUTL t4, R26
- 7: INCEIPL $4
-
- 0x25472AD4: 2F090000 cmpi cr6,r9,0
- 8: GETL R9, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x6, CR
- 11: INCEIPL $4
-
- 0x25472AD8: 419A0008 bc 12,26,0x25472AE0
- 12: Js26o $0x25472AE0
-
-
-. 0 25472ACC 16
-. 81 34 00 74 7C 7A 1B 78 2F 09 00 00 41 9A 00 08
-
-==== BB 1015 (0x25472ADC) approx BBs exec'd 0 ====
-
- 0x25472ADC: 90690004 stw r3,4(r9)
- 0: GETL R3, t0
- 1: GETL R9, t2
- 2: ADDL $0x4, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25472AE0: 812E022C lwz r9,556(r14)
- 5: GETL R14, t4
- 6: ADDL $0x22C, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R9
- 9: INCEIPL $4
-
- 0x25472AE4: 2F890000 cmpi cr7,r9,0
- 10: GETL R9, t8
- 11: CMP0L t8, t10 (-rSo)
- 12: ICRFL t10, $0x7, CR
- 13: INCEIPL $4
-
- 0x25472AE8: 419E0008 bc 12,30,0x25472AF0
- 14: Js30o $0x25472AF0
-
-
-. 0 25472ADC 16
-. 90 69 00 04 81 2E 02 2C 2F 89 00 00 41 9E 00 08
-
-==== BB 1016 (0x25472AF0) approx BBs exec'd 0 ====
-
- 0x25472AF0: 825F0078 lwz r18,120(r31)
- 0: GETL R31, t0
- 1: ADDL $0x78, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R18
- 4: INCEIPL $4
-
- 0x25472AF4: C8140158 lfd f0,344(r20)
- 5: GETL R20, t4
- 6: ADDL $0x158, t4
- 7: FPU_RQ (t4), 0x0:0x0
- 8: INCEIPL $4
-
- 0x25472AF8: 924E0008 stw r18,8(r14)
- 9: GETL R18, t6
- 10: GETL R14, t8
- 11: ADDL $0x8, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x25472AFC: D80F0014 stfd f0,20(r15)
- 14: GETL R15, t10
- 15: ADDL $0x14, t10
- 16: FPU_WQ 0x0:0x0, (t10)
- 17: INCEIPL $4
-
- 0x25472B00: 924E0010 stw r18,16(r14)
- 18: GETL R18, t12
- 19: GETL R14, t14
- 20: ADDL $0x10, t14
- 21: STL t12, (t14)
- 22: INCEIPL $4
-
- 0x25472B04: 41920844 bc 12,18,0x25473348
- 23: Js18o $0x25473348
-
-
-. 0 25472AF0 24
-. 82 5F 00 78 C8 14 01 58 92 4E 00 08 D8 0F 00 14 92 4E 00 10 41 92 08 44
-
-==== BB 1017 (0x25473348) approx BBs exec'd 0 ====
-
- 0x25473348: 8174000C lwz r11,12(r20)
- 0: GETL R20, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547334C: 7E9DA378 or r29,r20,r20
- 5: GETL R20, t4
- 6: PUTL t4, R29
- 7: INCEIPL $4
-
- 0x25473350: 820F0050 lwz r16,80(r15)
- 8: GETL R15, t6
- 9: ADDL $0x50, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R16
- 12: INCEIPL $4
-
- 0x25473354: 2C0B0000 cmpi cr0,r11,0
- 13: GETL R11, t10
- 14: CMP0L t10, t12 (-rSo)
- 15: ICRFL t12, $0x0, CR
- 16: INCEIPL $4
-
- 0x25473358: 82EF0028 lwz r23,40(r15)
- 17: GETL R15, t14
- 18: ADDL $0x28, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R23
- 21: INCEIPL $4
-
- 0x2547335C: 3150FFFF addic r10,r16,-1
- 22: GETL R16, t18
- 23: ADCL $0xFFFFFFFF, t18 (-wCa)
- 24: PUTL t18, R10
- 25: INCEIPL $4
-
- 0x25473360: 7F6A8110 subfe r27,r10,r16
- 26: GETL R10, t20
- 27: GETL R16, t22
- 28: SBBL t20, t22 (-rCa-wCa)
- 29: PUTL t22, R27
- 30: INCEIPL $4
-
- 0x25473364: 7EF3DB78 or r19,r23,r27
- 31: GETL R23, t24
- 32: GETL R27, t26
- 33: ORL t26, t24
- 34: PUTL t24, R19
- 35: INCEIPL $4
-
- 0x25473368: 926F0028 stw r19,40(r15)
- 36: GETL R19, t28
- 37: GETL R15, t30
- 38: ADDL $0x28, t30
- 39: STL t28, (t30)
- 40: INCEIPL $4
-
- 0x2547336C: 41820018 bc 12,2,0x25473384
- 41: Js02o $0x25473384
-
-
-. 0 25473348 40
-. 81 74 00 0C 7E 9D A3 78 82 0F 00 50 2C 0B 00 00 82 EF 00 28 31 50 FF FF 7F 6A 81 10 7E F3 DB 78 92 6F 00 28 41 82 00 18
-
-==== BB 1018 (0x25473370) approx BBs exec'd 0 ====
-
- 0x25473370: 7D605B78 or r0,r11,r11
- 0: GETL R11, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x25473374: 7C1D0378 or r29,r0,r0
- 3: GETL R0, t2
- 4: PUTL t2, R29
- 5: INCEIPL $4
-
- 0x25473378: 801D000C lwz r0,12(r29)
- 6: GETL R29, t4
- 7: ADDL $0xC, t4
- 8: LDL (t4), t6
- 9: PUTL t6, R0
- 10: INCEIPL $4
-
- 0x2547337C: 2F000000 cmpi cr6,r0,0
- 11: GETL R0, t8
- 12: CMP0L t8, t10 (-rSo)
- 13: ICRFL t10, $0x6, CR
- 14: INCEIPL $4
-
- 0x25473380: 409AFFF4 bc 4,26,0x25473374
- 15: Jc26o $0x25473374
-
-
-. 0 25473370 20
-. 7D 60 5B 78 7C 1D 03 78 80 1D 00 0C 2F 00 00 00 40 9A FF F4
-
-==== BB 1019 (0x25473374) approx BBs exec'd 0 ====
-
- 0x25473374: 7C1D0378 or r29,r0,r0
- 0: GETL R0, t0
- 1: PUTL t0, R29
- 2: INCEIPL $4
-
- 0x25473378: 801D000C lwz r0,12(r29)
- 3: GETL R29, t2
- 4: ADDL $0xC, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R0
- 7: INCEIPL $4
-
- 0x2547337C: 2F000000 cmpi cr6,r0,0
- 8: GETL R0, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x6, CR
- 11: INCEIPL $4
-
- 0x25473380: 409AFFF4 bc 4,26,0x25473374
- 12: Jc26o $0x25473374
-
-
-. 0 25473374 16
-. 7C 1D 03 78 80 1D 00 0C 2F 00 00 00 40 9A FF F4
-
-==== BB 1020 (0x25473384) approx BBs exec'd 0 ====
-
- 0x25473384: 82DD001C lwz r22,28(r29)
- 0: GETL R29, t0
- 1: ADDL $0x1C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R22
- 4: INCEIPL $4
-
- 0x25473388: 81360004 lwz r9,4(r22)
- 5: GETL R22, t4
- 6: ADDL $0x4, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R9
- 9: INCEIPL $4
-
- 0x2547338C: 2F890000 cmpi cr7,r9,0
- 10: GETL R9, t8
- 11: CMP0L t8, t10 (-rSo)
- 12: ICRFL t10, $0x7, CR
- 13: INCEIPL $4
-
- 0x25473390: 409E0420 bc 4,30,0x254737B0
- 14: Jc30o $0x254737B0
-
-
-. 0 25473384 16
-. 82 DD 00 1C 81 36 00 04 2F 89 00 00 40 9E 04 20
-
-==== BB 1021 (0x254737B0) approx BBs exec'd 0 ====
-
- 0x254737B0: 38000001 li r0,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x254737B4: 90090008 stw r0,8(r9)
- 3: GETL R0, t2
- 4: GETL R9, t4
- 5: ADDL $0x8, t4
- 6: STL t2, (t4)
- 7: INCEIPL $4
-
- 0x254737B8: 81290004 lwz r9,4(r9)
- 8: GETL R9, t6
- 9: ADDL $0x4, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R9
- 12: INCEIPL $4
-
- 0x254737BC: 2C890000 cmpi cr1,r9,0
- 13: GETL R9, t10
- 14: CMP0L t10, t12 (-rSo)
- 15: ICRFL t12, $0x1, CR
- 16: INCEIPL $4
-
- 0x254737C0: 4186FBD4 bc 12,6,0x25473394
- 17: Js06o $0x25473394
-
-
-. 0 254737B0 20
-. 38 00 00 01 90 09 00 08 81 29 00 04 2C 89 00 00 41 86 FB D4
-
-==== BB 1022 (0x25473394) approx BBs exec'd 0 ====
-
- 0x25473394: 3B8E01B8 addi r28,r14,440
- 0: GETL R14, t0
- 1: ADDL $0x1B8, t0
- 2: PUTL t0, R28
- 3: INCEIPL $4
-
- 0x25473398: 7D9CE800 cmp cr3,r28,r29
- 4: GETL R28, t2
- 5: GETL R29, t4
- 6: CMPL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x3, CR
- 8: INCEIPL $4
-
- 0x2547339C: 418E0018 bc 12,14,0x254733B4
- 9: Js14o $0x254733B4
-
-
-. 0 25473394 12
-. 3B 8E 01 B8 7D 9C E8 00 41 8E 00 18
-
-==== BB 1023 (0x254733B4) approx BBs exec'd 0 ====
-
- 0x254733B4: 83BD0010 lwz r29,16(r29)
- 0: GETL R29, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x254733B8: 2E1D0000 cmpi cr4,r29,0
- 5: GETL R29, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x4, CR
- 8: INCEIPL $4
-
- 0x254733BC: 4092FFC8 bc 4,18,0x25473384
- 9: Jc18o $0x25473384
-
-
-. 0 254733B4 12
-. 83 BD 00 10 2E 1D 00 00 40 92 FF C8
-
-==== BB 1024 (0x254733A0) approx BBs exec'd 0 ====
-
- 0x254733A0: 809D01C0 lwz r4,448(r29)
- 0: GETL R29, t0
- 1: ADDL $0x1C0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x254733A4: 7FA3EB78 or r3,r29,r29
- 5: GETL R29, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x254733A8: 80AF0028 lwz r5,40(r15)
- 8: GETL R15, t6
- 9: ADDL $0x28, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R5
- 12: INCEIPL $4
-
- 0x254733AC: 7F66DB78 or r6,r27,r27
- 13: GETL R27, t10
- 14: PUTL t10, R6
- 15: INCEIPL $4
-
- 0x254733B0: 48006211 bl 0x254795C0
- 16: MOVL $0x254733B4, t12
- 17: PUTL t12, LR
- 18: JMPo-c $0x254795C0 ($4)
-
-
-. 0 254733A0 20
-. 80 9D 01 C0 7F A3 EB 78 80 AF 00 28 7F 66 DB 78 48 00 62 11
-
-==== BB 1025 _dl_relocate_object(0x254795C0) approx BBs exec'd 0 ====
-
- 0x254795C0: 7CE802A6 mflr r7
- 0: GETL LR, t0
- 1: PUTL t0, R7
- 2: INCEIPL $4
-
- 0x254795C4: 9421FF50 stwu r1,-176(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFF50, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0x254795C8: 7D800026 mfcr r12
- 9: GETL CR, t6
- 10: PUTL t6, R12
- 11: INCEIPL $4
-
- 0x254795CC: 93E100AC stw r31,172(r1)
- 12: GETL R31, t8
- 13: GETL R1, t10
- 14: ADDL $0xAC, t10
- 15: STL t8, (t10)
- 16: INCEIPL $4
-
- 0x254795D0: 4801DA31 bl 0x25497000
- 17: MOVL $0x254795D4, t12
- 18: PUTL t12, LR
- 19: JMPo-c $0x25497000 ($4)
-
-
-. 0 254795C0 20
-. 7C E8 02 A6 94 21 FF 50 7D 80 00 26 93 E1 00 AC 48 01 DA 31
-
-==== BB 1026 (0x254795D4) approx BBs exec'd 0 ====
-
- 0x254795D4: 7C3F0B78 or r31,r1,r1
- 0: GETL R1, t0
- 1: PUTL t0, R31
- 2: INCEIPL $4
-
- 0x254795D8: 90E100B4 stw r7,180(r1)
- 3: GETL R7, t2
- 4: GETL R1, t4
- 5: ADDL $0xB4, t4
- 6: STL t2, (t4)
- 7: INCEIPL $4
-
- 0x254795DC: 80030180 lwz r0,384(r3)
- 8: GETL R3, t6
- 9: ADDL $0x180, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R0
- 12: INCEIPL $4
-
- 0x254795E0: 92210074 stw r17,116(r1)
- 13: GETL R17, t10
- 14: GETL R1, t12
- 15: ADDL $0x74, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x254795E4: 3A200000 li r17,0
- 18: MOVL $0x0, t14
- 19: PUTL t14, R17
- 20: INCEIPL $4
-
- 0x254795E8: 74082000 andis. r8,r0,0x2000
- 21: GETL R0, t16
- 22: ANDL $0x20000000, t16
- 23: PUTL t16, R8
- 24: CMP0L t16, t18 (-rSo)
- 25: ICRFL t18, $0x0, CR
- 26: INCEIPL $4
-
- 0x254795EC: 9361009C stw r27,156(r1)
- 27: GETL R27, t20
- 28: GETL R1, t22
- 29: ADDL $0x9C, t22
- 30: STL t20, (t22)
- 31: INCEIPL $4
-
- 0x254795F0: 938100A0 stw r28,160(r1)
- 32: GETL R28, t24
- 33: GETL R1, t26
- 34: ADDL $0xA0, t26
- 35: STL t24, (t26)
- 36: INCEIPL $4
-
- 0x254795F4: 7CDB3378 or r27,r6,r6
- 37: GETL R6, t28
- 38: PUTL t28, R27
- 39: INCEIPL $4
-
- 0x254795F8: 93C100A8 stw r30,168(r1)
- 40: GETL R30, t30
- 41: GETL R1, t32
- 42: ADDL $0xA8, t32
- 43: STL t30, (t32)
- 44: INCEIPL $4
-
- 0x254795FC: 7CBC2B78 or r28,r5,r5
- 45: GETL R5, t34
- 46: PUTL t34, R28
- 47: INCEIPL $4
-
- 0x25479600: 92010070 stw r16,112(r1)
- 48: GETL R16, t36
- 49: GETL R1, t38
- 50: ADDL $0x70, t38
- 51: STL t36, (t38)
- 52: INCEIPL $4
-
- 0x25479604: 7FC802A6 mflr r30
- 53: GETL LR, t40
- 54: PUTL t40, R30
- 55: INCEIPL $4
-
- 0x25479608: 92410078 stw r18,120(r1)
- 56: GETL R18, t42
- 57: GETL R1, t44
- 58: ADDL $0x78, t44
- 59: STL t42, (t44)
- 60: INCEIPL $4
-
- 0x2547960C: 9261007C stw r19,124(r1)
- 61: GETL R19, t46
- 62: GETL R1, t48
- 63: ADDL $0x7C, t48
- 64: STL t46, (t48)
- 65: INCEIPL $4
-
- 0x25479610: 92810080 stw r20,128(r1)
- 66: GETL R20, t50
- 67: GETL R1, t52
- 68: ADDL $0x80, t52
- 69: STL t50, (t52)
- 70: INCEIPL $4
-
- 0x25479614: 92A10084 stw r21,132(r1)
- 71: GETL R21, t54
- 72: GETL R1, t56
- 73: ADDL $0x84, t56
- 74: STL t54, (t56)
- 75: INCEIPL $4
-
- 0x25479618: 92C10088 stw r22,136(r1)
- 76: GETL R22, t58
- 77: GETL R1, t60
- 78: ADDL $0x88, t60
- 79: STL t58, (t60)
- 80: INCEIPL $4
-
- 0x2547961C: 92E1008C stw r23,140(r1)
- 81: GETL R23, t62
- 82: GETL R1, t64
- 83: ADDL $0x8C, t64
- 84: STL t62, (t64)
- 85: INCEIPL $4
-
- 0x25479620: 93010090 stw r24,144(r1)
- 86: GETL R24, t66
- 87: GETL R1, t68
- 88: ADDL $0x90, t68
- 89: STL t66, (t68)
- 90: INCEIPL $4
-
- 0x25479624: 93210094 stw r25,148(r1)
- 91: GETL R25, t70
- 92: GETL R1, t72
- 93: ADDL $0x94, t72
- 94: STL t70, (t72)
- 95: INCEIPL $4
-
- 0x25479628: 93410098 stw r26,152(r1)
- 96: GETL R26, t74
- 97: GETL R1, t76
- 98: ADDL $0x98, t76
- 99: STL t74, (t76)
- 100: INCEIPL $4
-
- 0x2547962C: 93A100A4 stw r29,164(r1)
- 101: GETL R29, t78
- 102: GETL R1, t80
- 103: ADDL $0xA4, t80
- 104: STL t78, (t80)
- 105: INCEIPL $4
-
- 0x25479630: 9181006C stw r12,108(r1)
- 106: GETL R12, t82
- 107: GETL R1, t84
- 108: ADDL $0x6C, t84
- 109: STL t82, (t84)
- 110: INCEIPL $4
-
- 0x25479634: 909F0010 stw r4,16(r31)
- 111: GETL R4, t86
- 112: GETL R31, t88
- 113: ADDL $0x10, t88
- 114: STL t86, (t88)
- 115: INCEIPL $4
-
- 0x25479638: 907F000C stw r3,12(r31)
- 116: GETL R3, t90
- 117: GETL R31, t92
- 118: ADDL $0xC, t92
- 119: STL t90, (t92)
- 120: INCEIPL $4
-
- 0x2547963C: 40820118 bc 4,2,0x25479754
- 121: Jc02o $0x25479754
-
-
-. 0 254795D4 108
-. 7C 3F 0B 78 90 E1 00 B4 80 03 01 80 92 21 00 74 3A 20 00 00 74 08 20 00 93 61 00 9C 93 81 00 A0 7C DB 33 78 93 C1 00 A8 7C BC 2B 78 92 01 00 70 7F C8 02 A6 92 41 00 78 92 61 00 7C 92 81 00 80 92 A1 00 84 92 C1 00 88 92 E1 00 8C 93 01 00 90 93 21 00 94 93 41 00 98 93 A1 00 A4 91 81 00 6C 90 9F 00 10 90 7F 00 0C 40 82 01 18
-
-==== BB 1027 (0x25479640) approx BBs exec'd 0 ====
-
- 0x25479640: 2D860000 cmpi cr3,r6,0
- 0: GETL R6, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x3, CR
- 3: INCEIPL $4
-
- 0x25479644: 418E016C bc 12,14,0x254797B0
- 4: Js14o $0x254797B0
-
-
-. 0 25479640 8
-. 2D 86 00 00 41 8E 01 6C
-
-==== BB 1028 (0x254797B0) approx BBs exec'd 0 ====
-
- 0x254797B0: 80A30080 lwz r5,128(r3)
- 0: GETL R3, t0
- 1: ADDL $0x80, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x254797B4: 3085FFFF addic r4,r5,-1
- 5: GETL R5, t4
- 6: ADCL $0xFFFFFFFF, t4 (-wCa)
- 7: PUTL t4, R4
- 8: INCEIPL $4
-
- 0x254797B8: 7C842110 subfe r4,r4,r4
- 9: GETL R4, t6
- 10: GETL R4, t8
- 11: SBBL t6, t8 (-rCa-wCa)
- 12: PUTL t8, R4
- 13: INCEIPL $4
-
- 0x254797BC: 7F9C2038 and r28,r28,r4
- 14: GETL R28, t10
- 15: GETL R4, t12
- 16: ANDL t10, t12
- 17: PUTL t12, R28
- 18: INCEIPL $4
-
- 0x254797C0: 4BFFFE88 b 0x25479648
- 19: JMPo $0x25479648 ($4)
-
-
-. 0 254797B0 20
-. 80 A3 00 80 30 85 FF FF 7C 84 21 10 7F 9C 20 38 4B FF FE 88
-
-==== BB 1029 (0x25479648) approx BBs exec'd 0 ====
-
- 0x25479648: 835E04F4 lwz r26,1268(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4F4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0x2547964C: 80DA0000 lwz r6,0(r26)
- 5: GETL R26, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R6
- 8: INCEIPL $4
-
- 0x25479650: 70C90020 andi. r9,r6,0x20
- 9: GETL R6, t8
- 10: ANDL $0x20, t8
- 11: PUTL t8, R9
- 12: CMP0L t8, t10 (-rSo)
- 13: ICRFL t10, $0x0, CR
- 14: INCEIPL $4
-
- 0x25479654: 408207B4 bc 4,2,0x25479E08
- 15: Jc02o $0x25479E08
-
-
-. 0 25479648 16
-. 83 5E 04 F4 80 DA 00 00 70 C9 00 20 40 82 07 B4
-
-==== BB 1030 (0x25479658) approx BBs exec'd 0 ====
-
- 0x25479658: 807F000C lwz r3,12(r31)
- 0: GETL R31, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x2547965C: 81430078 lwz r10,120(r3)
- 5: GETL R3, t4
- 6: ADDL $0x78, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R10
- 9: INCEIPL $4
-
- 0x25479660: 2E0A0000 cmpi cr4,r10,0
- 10: GETL R10, t8
- 11: CMP0L t8, t10 (-rSo)
- 12: ICRFL t10, $0x4, CR
- 13: INCEIPL $4
-
- 0x25479664: 409206C0 bc 4,18,0x25479D24
- 14: Jc18o $0x25479D24
-
-
-. 0 25479658 16
-. 80 7F 00 0C 81 43 00 78 2E 0A 00 00 40 92 06 C0
-
-==== BB 1031 (0x25479668) approx BBs exec'd 0 ====
-
- 0x25479668: 80C30034 lwz r6,52(r3)
- 0: GETL R3, t0
- 1: ADDL $0x34, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x2547966C: 7F84E378 or r4,r28,r28
- 5: GETL R28, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0x25479670: 7F65DB78 or r5,r27,r27
- 8: GETL R27, t6
- 9: PUTL t6, R5
- 10: INCEIPL $4
-
- 0x25479674: 3B800001 li r28,1
- 11: MOVL $0x1, t8
- 12: PUTL t8, R28
- 13: INCEIPL $4
-
- 0x25479678: 83A60004 lwz r29,4(r6)
- 14: GETL R6, t10
- 15: ADDL $0x4, t10
- 16: LDL (t10), t12
- 17: PUTL t12, R29
- 18: INCEIPL $4
-
- 0x2547967C: 3B600000 li r27,0
- 19: MOVL $0x0, t14
- 20: PUTL t14, R27
- 21: INCEIPL $4
-
- 0x25479680: 93BF0008 stw r29,8(r31)
- 22: GETL R29, t16
- 23: GETL R31, t18
- 24: ADDL $0x8, t18
- 25: STL t16, (t18)
- 26: INCEIPL $4
-
- 0x25479684: 480071AD bl 0x25480830
- 27: MOVL $0x25479688, t20
- 28: PUTL t20, LR
- 29: JMPo-c $0x25480830 ($4)
-
-
-. 0 25479668 32
-. 80 C3 00 34 7F 84 E3 78 7F 65 DB 78 3B 80 00 01 83 A6 00 04 3B 60 00 00 93 BF 00 08 48 00 71 AD
-
-==== BB 1032 (0x25479688) approx BBs exec'd 0 ====
-
- 0x25479688: 83BF000C lwz r29,12(r31)
- 0: GETL R31, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x2547968C: 38C00000 li r6,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R6
- 7: INCEIPL $4
-
- 0x25479690: 939F0034 stw r28,52(r31)
- 8: GETL R28, t6
- 9: GETL R31, t8
- 10: ADDL $0x34, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x25479694: 817D003C lwz r11,60(r29)
- 13: GETL R29, t10
- 14: ADDL $0x3C, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R11
- 17: INCEIPL $4
-
- 0x25479698: 937F0030 stw r27,48(r31)
- 18: GETL R27, t14
- 19: GETL R31, t16
- 20: ADDL $0x30, t16
- 21: STL t14, (t16)
- 22: INCEIPL $4
-
- 0x2547969C: 2C8B0000 cmpi cr1,r11,0
- 23: GETL R11, t18
- 24: CMP0L t18, t20 (-rSo)
- 25: ICRFL t20, $0x1, CR
- 26: INCEIPL $4
-
- 0x254796A0: 937F0040 stw r27,64(r31)
- 27: GETL R27, t22
- 28: GETL R31, t24
- 29: ADDL $0x40, t24
- 30: STL t22, (t24)
- 31: INCEIPL $4
-
- 0x254796A4: 937F0028 stw r27,40(r31)
- 32: GETL R27, t26
- 33: GETL R31, t28
- 34: ADDL $0x28, t28
- 35: STL t26, (t28)
- 36: INCEIPL $4
-
- 0x254796A8: 937F003C stw r27,60(r31)
- 37: GETL R27, t30
- 38: GETL R31, t32
- 39: ADDL $0x3C, t32
- 40: STL t30, (t32)
- 41: INCEIPL $4
-
- 0x254796AC: 90DF0024 stw r6,36(r31)
- 42: GETL R6, t34
- 43: GETL R31, t36
- 44: ADDL $0x24, t36
- 45: STL t34, (t36)
- 46: INCEIPL $4
-
- 0x254796B0: 41860018 bc 12,6,0x254796C8
- 47: Js06o $0x254796C8
-
-
-. 0 25479688 44
-. 83 BF 00 0C 38 C0 00 00 93 9F 00 34 81 7D 00 3C 93 7F 00 30 2C 8B 00 00 93 7F 00 40 93 7F 00 28 93 7F 00 3C 90 DF 00 24 41 86 00 18
-
-==== BB 1033 (0x254796B4) approx BBs exec'd 0 ====
-
- 0x254796B4: 810B0004 lwz r8,4(r11)
- 0: GETL R11, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x254796B8: 809D0040 lwz r4,64(r29)
- 5: GETL R29, t4
- 6: ADDL $0x40, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R4
- 9: INCEIPL $4
-
- 0x254796BC: 911F0020 stw r8,32(r31)
- 10: GETL R8, t8
- 11: GETL R31, t10
- 12: ADDL $0x20, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0x254796C0: 80C40004 lwz r6,4(r4)
- 15: GETL R4, t12
- 16: ADDL $0x4, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R6
- 19: INCEIPL $4
-
- 0x254796C4: 90DF0024 stw r6,36(r31)
- 20: GETL R6, t16
- 21: GETL R31, t18
- 22: ADDL $0x24, t18
- 23: STL t16, (t18)
- 24: INCEIPL $4
-
- 0x254796C8: 2E030000 cmpi cr4,r3,0
- 25: GETL R3, t20
- 26: CMP0L t20, t22 (-rSo)
- 27: ICRFL t22, $0x4, CR
- 28: INCEIPL $4
-
- 0x254796CC: 41920010 bc 12,18,0x254796DC
- 29: Js18o $0x254796DC
-
-
-. 0 254796B4 28
-. 81 0B 00 04 80 9D 00 40 91 1F 00 20 80 C4 00 04 90 DF 00 24 2E 03 00 00 41 92 00 10
-
-==== BB 1034 (0x254796DC) approx BBs exec'd 0 ====
-
- 0x254796DC: 821E04C8 lwz r16,1224(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4C8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R16
- 4: INCEIPL $4
-
- 0x254796E0: 3ABF0008 addi r21,r31,8
- 5: GETL R31, t4
- 6: ADDL $0x8, t4
- 7: PUTL t4, R21
- 8: INCEIPL $4
-
- 0x254796E4: 3A400002 li r18,2
- 9: MOVL $0x2, t6
- 10: PUTL t6, R18
- 11: INCEIPL $4
-
- 0x254796E8: 80B50020 lwz r5,32(r21)
- 12: GETL R21, t8
- 13: ADDL $0x20, t8
- 14: LDL (t8), t10
- 15: PUTL t10, R5
- 16: INCEIPL $4
-
- 0x254796EC: 7FB6EB78 or r22,r29,r29
- 17: GETL R29, t12
- 18: PUTL t12, R22
- 19: INCEIPL $4
-
- 0x254796F0: 81750018 lwz r11,24(r21)
- 20: GETL R21, t14
- 21: ADDL $0x18, t14
- 22: LDL (t14), t16
- 23: PUTL t16, R11
- 24: INCEIPL $4
-
- 0x254796F4: 2C050000 cmpi cr0,r5,0
- 25: GETL R5, t18
- 26: CMP0L t18, t20 (-rSo)
- 27: ICRFL t20, $0x0, CR
- 28: INCEIPL $4
-
- 0x254796F8: 8115001C lwz r8,28(r21)
- 29: GETL R21, t22
- 30: ADDL $0x1C, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R8
- 33: INCEIPL $4
-
- 0x254796FC: 7D695B78 or r9,r11,r11
- 34: GETL R11, t26
- 35: PUTL t26, R9
- 36: INCEIPL $4
-
- 0x25479700: 833D0000 lwz r25,0(r29)
- 37: GETL R29, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R25
- 40: INCEIPL $4
-
- 0x25479704: 7F0B4214 add r24,r11,r8
- 41: GETL R11, t32
- 42: GETL R8, t34
- 43: ADDL t32, t34
- 44: PUTL t34, R24
- 45: INCEIPL $4
-
- 0x25479708: 418200BC bc 12,2,0x254797C4
- 46: Js02o $0x254797C4
-
-
-. 0 254796DC 48
-. 82 1E 04 C8 3A BF 00 08 3A 40 00 02 80 B5 00 20 7F B6 EB 78 81 75 00 18 2C 05 00 00 81 15 00 1C 7D 69 5B 78 83 3D 00 00 7F 0B 42 14 41 82 00 BC
-
-==== BB 1035 (0x254797C4) approx BBs exec'd 0 ====
-
- 0x254797C4: 815D00C0 lwz r10,192(r29)
- 0: GETL R29, t0
- 1: ADDL $0xC0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x254797C8: 38E00000 li r7,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R7
- 7: INCEIPL $4
-
- 0x254797CC: 807D0038 lwz r3,56(r29)
- 8: GETL R29, t6
- 9: ADDL $0x38, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R3
- 12: INCEIPL $4
-
- 0x254797D0: 2F8A0000 cmpi cr7,r10,0
- 13: GETL R10, t10
- 14: CMP0L t10, t12 (-rSo)
- 15: ICRFL t12, $0x7, CR
- 16: INCEIPL $4
-
- 0x254797D4: 82630004 lwz r19,4(r3)
- 17: GETL R3, t14
- 18: ADDL $0x4, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R19
- 21: INCEIPL $4
-
- 0x254797D8: 419E0008 bc 12,30,0x254797E0
- 22: Js30o $0x254797E0
-
-
-. 0 254797C4 24
-. 81 5D 00 C0 38 E0 00 00 80 7D 00 38 2F 8A 00 00 82 63 00 04 41 9E 00 08
-
-==== BB 1036 (0x254797DC) approx BBs exec'd 0 ====
-
- 0x254797DC: 80EA0004 lwz r7,4(r10)
- 0: GETL R10, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x254797E0: 3C00AAAA lis r0,-21846
- 5: MOVL $0xAAAA0000, t4
- 6: PUTL t4, R0
- 7: INCEIPL $4
-
- 0x254797E4: 600CAAAB ori r12,r0,0xAAAB
- 8: MOVL $0xAAAAAAAB, t6
- 9: PUTL t6, R12
- 10: INCEIPL $4
-
- 0x254797E8: 7EE86016 mulhwu r23,r8,r12
- 11: GETL R8, t8
- 12: GETL R12, t10
- 13: UMULHL t8, t10
- 14: PUTL t10, R23
- 15: INCEIPL $4
-
- 0x254797EC: 56E9E8FE rlwinm r9,r23,29,3,31
- 16: GETL R23, t12
- 17: SHRL $0x3, t12
- 18: PUTL t12, R9
- 19: INCEIPL $4
-
- 0x254797F0: 7C893840 cmpl cr1,r9,r7
- 20: GETL R9, t14
- 21: GETL R7, t16
- 22: CMPUL t14, t16, t18 (-rSo)
- 23: ICRFL t18, $0x1, CR
- 24: INCEIPL $4
-
- 0x254797F4: 40850008 bc 4,5,0x254797FC
- 25: Jc05o $0x254797FC
-
-
-. 0 254797DC 28
-. 80 EA 00 04 3C 00 AA AA 60 0C AA AB 7E E8 60 16 56 E9 E8 FE 7C 89 38 40 40 85 00 08
-
-==== BB 1037 (0x254797F8) approx BBs exec'd 0 ====
-
- 0x254797F8: 7CE93B78 or r9,r7,r7
- 0: GETL R7, t0
- 1: PUTL t0, R9
- 2: INCEIPL $4
-
- 0x254797FC: 3B7001B8 addi r27,r16,440
- 3: GETL R16, t2
- 4: ADDL $0x1B8, t2
- 5: PUTL t2, R27
- 6: INCEIPL $4
-
- 0x25479800: 1CE9000C mulli r7,r9,12
- 7: GETL R9, t4
- 8: MULL $0xC, t4
- 9: PUTL t4, R7
- 10: INCEIPL $4
-
- 0x25479804: 7E1DD800 cmp cr4,r29,r27
- 11: GETL R29, t6
- 12: GETL R27, t8
- 13: CMPL t6, t8, t10 (-rSo)
- 14: ICRFL t10, $0x4, CR
- 15: INCEIPL $4
-
- 0x25479808: 7F8B3A14 add r28,r11,r7
- 16: GETL R11, t12
- 17: GETL R7, t14
- 18: ADDL t12, t14
- 19: PUTL t14, R28
- 20: INCEIPL $4
-
- 0x2547980C: 41920018 bc 12,18,0x25479824
- 21: Js18o $0x25479824
-
-
-. 0 254797F8 24
-. 7C E9 3B 78 3B 70 01 B8 1C E9 00 0C 7E 1D D8 00 7F 8B 3A 14 41 92 00 18
-
-==== BB 1038 (0x25479810) approx BBs exec'd 0 ====
-
- 0x25479810: 2F190000 cmpi cr6,r25,0
- 0: GETL R25, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x25479814: 409A01CC bc 4,26,0x254799E0
- 4: Jc26o $0x254799E0
-
-
-. 0 25479810 8
-. 2F 19 00 00 40 9A 01 CC
-
-==== BB 1039 (0x25479818) approx BBs exec'd 0 ====
-
- 0x25479818: 80DD011C lwz r6,284(r29)
- 0: GETL R29, t0
- 1: ADDL $0x11C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x2547981C: 2C060000 cmpi cr0,r6,0
- 5: GETL R6, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x25479820: 418201C0 bc 12,2,0x254799E0
- 9: Js02o $0x254799E0
-
-
-. 0 25479818 12
-. 80 DD 01 1C 2C 06 00 00 41 82 01 C0
-
-==== BB 1040 (0x25479824) approx BBs exec'd 0 ====
-
- 0x25479824: 813D00E4 lwz r9,228(r29)
- 0: GETL R29, t0
- 1: ADDL $0xE4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25479828: 2F890000 cmpi cr7,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x2547982C: 419E0280 bc 12,30,0x25479AAC
- 9: Js30o $0x25479AAC
-
-
-. 0 25479824 12
-. 81 3D 00 E4 2F 89 00 00 41 9E 02 80
-
-==== BB 1041 (0x25479830) approx BBs exec'd 0 ====
-
- 0x25479830: 7C9CC040 cmpl cr1,r28,r24
- 0: GETL R28, t0
- 1: GETL R24, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x1, CR
- 4: INCEIPL $4
-
- 0x25479834: 82890004 lwz r20,4(r9)
- 5: GETL R9, t6
- 6: ADDL $0x4, t6
- 7: LDL (t6), t8
- 8: PUTL t8, R20
- 9: INCEIPL $4
-
- 0x25479838: 40A4FEE8 bc 5,4,0x25479720
- 10: Jc04o $0x25479720
-
-
-. 0 25479830 12
-. 7C 9C C0 40 82 89 00 04 40 A4 FE E8
-
-==== BB 1042 (0x2547983C) approx BBs exec'd 0 ====
-
- 0x2547983C: 819C0004 lwz r12,4(r28)
- 0: GETL R28, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R12
- 4: INCEIPL $4
-
- 0x25479840: 81560188 lwz r10,392(r22)
- 5: GETL R22, t4
- 6: ADDL $0x188, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R10
- 9: INCEIPL $4
-
- 0x25479844: 5597C23E rlwinm r23,r12,24,8,31
- 10: GETL R12, t8
- 11: SHRL $0x8, t8
- 12: PUTL t8, R23
- 13: INCEIPL $4
-
- 0x25479848: 559D063E rlwinm r29,r12,0,24,31
- 14: GETL R12, t10
- 15: ANDL $0xFF, t10
- 16: PUTL t10, R29
- 17: INCEIPL $4
-
- 0x2547984C: 56EB083C rlwinm r11,r23,1,0,30
- 18: GETL R23, t12
- 19: SHLL $0x1, t12
- 20: PUTL t12, R11
- 21: INCEIPL $4
-
- 0x25479850: 2E1D0016 cmpi cr4,r29,22
- 22: GETL R29, t14
- 23: MOVL $0x16, t18
- 24: CMPL t14, t18, t16 (-rSo)
- 25: ICRFL t16, $0x4, CR
- 26: INCEIPL $4
-
- 0x25479854: 7CABA22E lhzx r5,r11,r20
- 27: GETL R20, t20
- 28: GETL R11, t22
- 29: ADDL t22, t20
- 30: LDW (t20), t24
- 31: PUTL t24, R5
- 32: INCEIPL $4
-
- 0x25479858: 56E32036 rlwinm r3,r23,4,0,27
- 33: GETL R23, t26
- 34: SHLL $0x4, t26
- 35: PUTL t26, R3
- 36: INCEIPL $4
-
- 0x2547985C: 817C0000 lwz r11,0(r28)
- 37: GETL R28, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R11
- 40: INCEIPL $4
-
- 0x25479860: 7F639A14 add r27,r3,r19
- 41: GETL R3, t32
- 42: GETL R19, t34
- 43: ADDL t32, t34
- 44: PUTL t34, R27
- 45: INCEIPL $4
-
- 0x25479864: 54BA2376 rlwinm r26,r5,4,13,27
- 46: GETL R5, t36
- 47: ROLL $0x4, t36
- 48: ANDL $0x7FFF0, t36
- 49: PUTL t36, R26
- 50: INCEIPL $4
-
- 0x25479868: 937F0050 stw r27,80(r31)
- 51: GETL R27, t38
- 52: GETL R31, t40
- 53: ADDL $0x50, t40
- 54: STL t38, (t40)
- 55: INCEIPL $4
-
- 0x2547986C: 7D4AD214 add r10,r10,r26
- 56: GETL R10, t42
- 57: GETL R26, t44
- 58: ADDL t42, t44
- 59: PUTL t44, R10
- 60: INCEIPL $4
-
- 0x25479870: 7EEBCA14 add r23,r11,r25
- 61: GETL R11, t46
- 62: GETL R25, t48
- 63: ADDL t46, t48
- 64: PUTL t48, R23
- 65: INCEIPL $4
-
- 0x25479874: 7F66DB78 or r6,r27,r27
- 66: GETL R27, t50
- 67: PUTL t50, R6
- 68: INCEIPL $4
-
- 0x25479878: 3B400000 li r26,0
- 69: MOVL $0x0, t52
- 70: PUTL t52, R26
- 71: INCEIPL $4
-
- 0x2547987C: 419201DC bc 12,18,0x25479A58
- 72: Js18o $0x25479A58
-
-
-. 0 2547983C 68
-. 81 9C 00 04 81 56 01 88 55 97 C2 3E 55 9D 06 3E 56 EB 08 3C 2E 1D 00 16 7C AB A2 2E 56 E3 20 36 81 7C 00 00 7F 63 9A 14 54 BA 23 76 93 7F 00 50 7D 4A D2 14 7E EB CA 14 7F 66 DB 78 3B 40 00 00 41 92 01 DC
-
-==== BB 1043 (0x25479880) approx BBs exec'd 0 ====
-
- 0x25479880: 2F1D0000 cmpi cr6,r29,0
- 0: GETL R29, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x25479884: 419A0148 bc 12,26,0x254799CC
- 4: Js26o $0x254799CC
-
-
-. 0 25479880 8
-. 2F 1D 00 00 41 9A 01 48
-
-==== BB 1044 (0x25479888) approx BBs exec'd 0 ====
-
- 0x25479888: 889B000C lbz r4,12(r27)
- 0: GETL R27, t0
- 1: ADDL $0xC, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547988C: 5488E13F rlwinm. r8,r4,28,4,31
- 5: GETL R4, t4
- 6: SHRL $0x4, t4
- 7: PUTL t4, R8
- 8: CMP0L t4, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x25479890: 4182062C bc 12,2,0x25479EBC
- 11: Js02o $0x25479EBC
-
-
-. 0 25479888 12
-. 88 9B 00 0C 54 88 E1 3F 41 82 06 2C
-
-==== BB 1045 (0x25479894) approx BBs exec'd 0 ====
-
- 0x25479894: 8B5B000C lbz r26,12(r27)
- 0: GETL R27, t0
- 1: ADDL $0xC, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0x25479898: 5749E13F rlwinm. r9,r26,28,4,31
- 5: GETL R26, t4
- 6: SHRL $0x4, t4
- 7: PUTL t4, R9
- 8: CMP0L t4, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x2547989C: 418201B4 bc 12,2,0x25479A50
- 11: Js02o $0x25479A50
-
-
-. 0 25479894 12
-. 8B 5B 00 0C 57 49 E1 3F 41 82 01 B4
-
-==== BB 1046 (0x254798A0) approx BBs exec'd 0 ====
-
- 0x254798A0: 809F000C lwz r4,12(r31)
- 0: GETL R31, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x254798A4: 2E1D0015 cmpi cr4,r29,21
- 5: GETL R29, t4
- 6: MOVL $0x15, t8
- 7: CMPL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x4, CR
- 9: INCEIPL $4
-
- 0x254798A8: 2C9D000A cmpi cr1,r29,10
- 10: GETL R29, t10
- 11: MOVL $0xA, t14
- 12: CMPL t10, t14, t12 (-rSo)
- 13: ICRFL t12, $0x1, CR
- 14: INCEIPL $4
-
- 0x254798AC: 2F1D0013 cmpi cr6,r29,19
- 15: GETL R29, t16
- 16: MOVL $0x13, t20
- 17: CMPL t16, t20, t18 (-rSo)
- 18: ICRFL t18, $0x6, CR
- 19: INCEIPL $4
-
- 0x254798B0: 80C40208 lwz r6,520(r4)
- 20: GETL R4, t22
- 21: ADDL $0x208, t22
- 22: LDL (t22), t24
- 23: PUTL t24, R6
- 24: INCEIPL $4
-
- 0x254798B4: 7F86D800 cmp cr7,r6,r27
- 25: GETL R6, t26
- 26: GETL R27, t28
- 27: CMPL t26, t28, t30 (-rSo)
- 28: ICRFL t30, $0x7, CR
- 29: INCEIPL $4
-
- 0x254798B8: 419E062C bc 12,30,0x25479EE4
- 30: Js30o $0x25479EE4
-
-
-. 0 254798A0 28
-. 80 9F 00 0C 2E 1D 00 15 2C 9D 00 0A 2F 1D 00 13 80 C4 02 08 7F 86 D8 00 41 9E 06 2C
-
-==== BB 1047 (0x254798BC) approx BBs exec'd 0 ====
-
- 0x254798BC: 7CC00026 mfcr r6
- 0: GETL CR, t0
- 1: PUTL t0, R6
- 2: INCEIPL $4
-
- 0x254798C0: 54C69FFE rlwinm r6,r6,19,31,31
- 3: GETL R6, t2
- 4: ROLL $0x13, t2
- 5: ANDL $0x1, t2
- 6: PUTL t2, R6
- 7: INCEIPL $4
-
- 0x254798C4: 39000000 li r8,0
- 8: MOVL $0x0, t4
- 9: PUTL t4, R8
- 10: INCEIPL $4
-
- 0x254798C8: 7F400026 mfcr r26
- 11: GETL CR, t6
- 12: PUTL t6, R26
- 13: INCEIPL $4
-
- 0x254798CC: 575A3FFE rlwinm r26,r26,7,31,31
- 14: GETL R26, t8
- 15: ROLL $0x7, t8
- 16: ANDL $0x1, t8
- 17: PUTL t8, R26
- 18: INCEIPL $4
-
- 0x254798D0: 7CCBD379 or. r11,r6,r26
- 19: GETL R6, t10
- 20: GETL R26, t12
- 21: ORL t12, t10
- 22: PUTL t10, R11
- 23: CMP0L t10, t14 (-rSo)
- 24: ICRFL t14, $0x0, CR
- 25: INCEIPL $4
-
- 0x254798D4: 40820130 bc 4,2,0x25479A04
- 26: Jc02o $0x25479A04
-
-
-. 0 254798BC 28
-. 7C C0 00 26 54 C6 9F FE 39 00 00 00 7F 40 00 26 57 5A 3F FE 7C CB D3 79 40 82 01 30
-
-==== BB 1048 (0x254798D8) approx BBs exec'd 0 ====
-
- 0x254798D8: 387DFFBC addi r3,r29,-68
- 0: GETL R29, t0
- 1: ADDL $0xFFFFFFBC, t0
- 2: PUTL t0, R3
- 3: INCEIPL $4
-
- 0x254798DC: 6BA50002 xori r5,r29,0x2
- 4: GETL R29, t2
- 5: XORL $0x2, t2
- 6: PUTL t2, R5
- 7: INCEIPL $4
-
- 0x254798E0: 21650000 subfic r11,r5,0
- 8: GETL R5, t4
- 9: MOVL $0x0, t6
- 10: SBBL t4, t6 (-wCa)
- 11: PUTL t6, R11
- 12: INCEIPL $4
-
- 0x254798E4: 7CAB2914 adde r5,r11,r5
- 13: GETL R11, t8
- 14: GETL R5, t10
- 15: ADCL t8, t10 (-rCa-wCa)
- 16: PUTL t10, R5
- 17: INCEIPL $4
-
- 0x254798E8: 2123000A subfic r9,r3,10
- 18: GETL R3, t12
- 19: MOVL $0xA, t14
- 20: SBBL t12, t14 (-wCa)
- 21: PUTL t14, R9
- 22: INCEIPL $4
-
- 0x254798EC: 39200000 li r9,0
- 23: MOVL $0x0, t16
- 24: PUTL t16, R9
- 25: INCEIPL $4
-
- 0x254798F0: 7D294914 adde r9,r9,r9
- 26: GETL R9, t18
- 27: GETL R9, t20
- 28: ADCL t18, t20 (-rCa-wCa)
- 29: PUTL t20, R9
- 30: INCEIPL $4
-
- 0x254798F4: 7D2B2B79 or. r11,r9,r5
- 31: GETL R9, t22
- 32: GETL R5, t24
- 33: ORL t24, t22
- 34: PUTL t22, R11
- 35: CMP0L t22, t26 (-rSo)
- 36: ICRFL t26, $0x0, CR
- 37: INCEIPL $4
-
- 0x254798F8: 4082010C bc 4,2,0x25479A04
- 38: Jc02o $0x25479A04
-
-
-. 0 254798D8 36
-. 38 7D FF BC 6B A5 00 02 21 65 00 00 7C AB 29 14 21 23 00 0A 39 20 00 00 7D 29 49 14 7D 2B 2B 79 40 82 01 0C
-
-==== BB 1049 (0x254798FC) approx BBs exec'd 0 ====
-
- 0x254798FC: 7C000026 mfcr r0
- 0: GETL CR, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x25479900: 5400DFFE rlwinm r0,r0,27,31,31
- 3: GETL R0, t2
- 4: ROLL $0x1B, t2
- 5: ANDL $0x1, t2
- 6: PUTL t2, R0
- 7: INCEIPL $4
-
- 0x25479904: 2C8A0000 cmpi cr1,r10,0
- 8: GETL R10, t4
- 9: CMP0L t4, t6 (-rSo)
- 10: ICRFL t6, $0x1, CR
- 11: INCEIPL $4
-
- 0x25479908: 93640208 stw r27,520(r4)
- 12: GETL R27, t8
- 13: GETL R4, t10
- 14: ADDL $0x208, t10
- 15: STL t8, (t10)
- 16: INCEIPL $4
-
- 0x2547990C: 38E00000 li r7,0
- 17: MOVL $0x0, t12
- 18: PUTL t12, R7
- 19: INCEIPL $4
-
- 0x25479910: 540C083C rlwinm r12,r0,1,0,30
- 20: GETL R0, t14
- 21: SHLL $0x1, t14
- 22: PUTL t14, R12
- 23: INCEIPL $4
-
- 0x25479914: 39600001 li r11,1
- 24: MOVL $0x1, t16
- 25: PUTL t16, R11
- 26: INCEIPL $4
-
- 0x25479918: 7D884378 or r8,r12,r8
- 27: GETL R12, t18
- 28: GETL R8, t20
- 29: ORL t20, t18
- 30: PUTL t18, R8
- 31: INCEIPL $4
-
- 0x2547991C: 9104020C stw r8,524(r4)
- 32: GETL R8, t22
- 33: GETL R4, t24
- 34: ADDL $0x20C, t24
- 35: STL t22, (t24)
- 36: INCEIPL $4
-
- 0x25479920: 41860018 bc 12,6,0x25479938
- 37: Js06o $0x25479938
-
-
-. 0 254798FC 40
-. 7C 00 00 26 54 00 DF FE 2C 8A 00 00 93 64 02 08 38 E0 00 00 54 0C 08 3C 39 60 00 01 7D 88 43 78 91 04 02 0C 41 86 00 18
-
-==== BB 1050 (0x25479924) approx BBs exec'd 0 ====
-
- 0x25479924: 834A0004 lwz r26,4(r10)
- 0: GETL R10, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0x25479928: 2E1A0000 cmpi cr4,r26,0
- 5: GETL R26, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x4, CR
- 8: INCEIPL $4
-
- 0x2547992C: 4192000C bc 12,18,0x25479938
- 9: Js18o $0x25479938
-
-
-. 0 25479924 12
-. 83 4A 00 04 2E 1A 00 00 41 92 00 0C
-
-==== BB 1051 (0x25479930) approx BBs exec'd 0 ====
-
- 0x25479930: 7D475378 or r7,r10,r10
- 0: GETL R10, t0
- 1: PUTL t0, R7
- 2: INCEIPL $4
-
- 0x25479934: 39600000 li r11,0
- 3: MOVL $0x0, t2
- 4: PUTL t2, R11
- 5: INCEIPL $4
-
- 0x25479938: 80DF0050 lwz r6,80(r31)
- 6: GETL R31, t4
- 7: ADDL $0x50, t4
- 8: LDL (t4), t6
- 9: PUTL t6, R6
- 10: INCEIPL $4
-
- 0x2547993C: 7D695B78 or r9,r11,r11
- 11: GETL R11, t8
- 12: PUTL t8, R9
- 13: INCEIPL $4
-
- 0x25479940: 815F0008 lwz r10,8(r31)
- 14: GETL R31, t10
- 15: ADDL $0x8, t10
- 16: LDL (t10), t12
- 17: PUTL t12, R10
- 18: INCEIPL $4
-
- 0x25479944: 80A60000 lwz r5,0(r6)
- 19: GETL R6, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R5
- 22: INCEIPL $4
-
- 0x25479948: 80DF0010 lwz r6,16(r31)
- 23: GETL R31, t18
- 24: ADDL $0x10, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R6
- 27: INCEIPL $4
-
- 0x2547994C: 7C655214 add r3,r5,r10
- 28: GETL R5, t22
- 29: GETL R10, t24
- 30: ADDL t22, t24
- 31: PUTL t24, R3
- 32: INCEIPL $4
-
- 0x25479950: 38BF0050 addi r5,r31,80
- 33: GETL R31, t26
- 34: ADDL $0x50, t26
- 35: PUTL t26, R5
- 36: INCEIPL $4
-
- 0x25479954: 39400000 li r10,0
- 37: MOVL $0x0, t28
- 38: PUTL t28, R10
- 39: INCEIPL $4
-
- 0x25479958: 4BFFEC4D bl 0x254785A4
- 40: MOVL $0x2547995C, t30
- 41: PUTL t30, LR
- 42: JMPo-c $0x254785A4 ($4)
-
-
-. 0 25479930 44
-. 7D 47 53 78 39 60 00 00 80 DF 00 50 7D 69 5B 78 81 5F 00 08 80 A6 00 00 80 DF 00 10 7C 65 52 14 38 BF 00 50 39 40 00 00 4B FF EC 4D
-
-==== BB 1052 _dl_lookup_symbol_x(0x254785A4) approx BBs exec'd 0 ====
-
- 0x254785A4: 7C0802A6 mflr r0
- 0: GETL LR, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x254785A8: 7D800026 mfcr r12
- 3: GETL CR, t2
- 4: PUTL t2, R12
- 5: INCEIPL $4
-
- 0x254785AC: 9421FF60 stwu r1,-160(r1)
- 6: GETL R1, t4
- 7: GETL R1, t6
- 8: ADDL $0xFFFFFF60, t6
- 9: PUTL t6, R1
- 10: STL t4, (t6)
- 11: INCEIPL $4
-
- 0x254785B0: 4801EA51 bl 0x25497000
- 12: MOVL $0x254785B4, t8
- 13: PUTL t8, LR
- 14: JMPo-c $0x25497000 ($4)
-
-
-. 0 254785A4 16
-. 7C 08 02 A6 7D 80 00 26 94 21 FF 60 48 01 EA 51
-
-==== BB 1053 (0x254785B4) approx BBs exec'd 0 ====
-
- 0x254785B4: 9261006C stw r19,108(r1)
- 0: GETL R19, t0
- 1: GETL R1, t2
- 2: ADDL $0x6C, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x254785B8: 7C932378 or r19,r4,r4
- 5: GETL R4, t4
- 6: PUTL t4, R19
- 7: INCEIPL $4
-
- 0x254785BC: 92810070 stw r20,112(r1)
- 8: GETL R20, t6
- 9: GETL R1, t8
- 10: ADDL $0x70, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x254785C0: 7D144378 or r20,r8,r8
- 13: GETL R8, t10
- 14: PUTL t10, R20
- 15: INCEIPL $4
-
- 0x254785C4: 92A10074 stw r21,116(r1)
- 16: GETL R21, t12
- 17: GETL R1, t14
- 18: ADDL $0x74, t14
- 19: STL t12, (t14)
- 20: INCEIPL $4
-
- 0x254785C8: 7CD53378 or r21,r6,r6
- 21: GETL R6, t16
- 22: PUTL t16, R21
- 23: INCEIPL $4
-
- 0x254785CC: 92C10078 stw r22,120(r1)
- 24: GETL R22, t18
- 25: GETL R1, t20
- 26: ADDL $0x78, t20
- 27: STL t18, (t20)
- 28: INCEIPL $4
-
- 0x254785D0: 7CB62B78 or r22,r5,r5
- 29: GETL R5, t22
- 30: PUTL t22, R22
- 31: INCEIPL $4
-
- 0x254785D4: 92E1007C stw r23,124(r1)
- 32: GETL R23, t24
- 33: GETL R1, t26
- 34: ADDL $0x7C, t26
- 35: STL t24, (t26)
- 36: INCEIPL $4
-
- 0x254785D8: 7D374B78 or r23,r9,r9
- 37: GETL R9, t28
- 38: PUTL t28, R23
- 39: INCEIPL $4
-
- 0x254785DC: 93010080 stw r24,128(r1)
- 40: GETL R24, t30
- 41: GETL R1, t32
- 42: ADDL $0x80, t32
- 43: STL t30, (t32)
- 44: INCEIPL $4
-
- 0x254785E0: 7CF83B78 or r24,r7,r7
- 45: GETL R7, t34
- 46: PUTL t34, R24
- 47: INCEIPL $4
-
- 0x254785E4: 93210084 stw r25,132(r1)
- 48: GETL R25, t36
- 49: GETL R1, t38
- 50: ADDL $0x84, t38
- 51: STL t36, (t38)
- 52: INCEIPL $4
-
- 0x254785E8: 7C791B78 or r25,r3,r3
- 53: GETL R3, t40
- 54: PUTL t40, R25
- 55: INCEIPL $4
-
- 0x254785EC: 93410088 stw r26,136(r1)
- 56: GETL R26, t42
- 57: GETL R1, t44
- 58: ADDL $0x88, t44
- 59: STL t42, (t44)
- 60: INCEIPL $4
-
- 0x254785F0: 7D5A5378 or r26,r10,r10
- 61: GETL R10, t46
- 62: PUTL t46, R26
- 63: INCEIPL $4
-
- 0x254785F4: 93810090 stw r28,144(r1)
- 64: GETL R28, t48
- 65: GETL R1, t50
- 66: ADDL $0x90, t50
- 67: STL t48, (t50)
- 68: INCEIPL $4
-
- 0x254785F8: 3B800000 li r28,0
- 69: MOVL $0x0, t52
- 70: PUTL t52, R28
- 71: INCEIPL $4
-
- 0x254785FC: 93C10098 stw r30,152(r1)
- 72: GETL R30, t54
- 73: GETL R1, t56
- 74: ADDL $0x98, t56
- 75: STL t54, (t56)
- 76: INCEIPL $4
-
- 0x25478600: 7FC802A6 mflr r30
- 77: GETL LR, t58
- 78: PUTL t58, R30
- 79: INCEIPL $4
-
- 0x25478604: 93E1009C stw r31,156(r1)
- 80: GETL R31, t60
- 81: GETL R1, t62
- 82: ADDL $0x9C, t62
- 83: STL t60, (t62)
- 84: INCEIPL $4
-
- 0x25478608: 7C3F0B78 or r31,r1,r1
- 85: GETL R1, t64
- 86: PUTL t64, R31
- 87: INCEIPL $4
-
- 0x2547860C: 92210064 stw r17,100(r1)
- 88: GETL R17, t66
- 89: GETL R1, t68
- 90: ADDL $0x64, t68
- 91: STL t66, (t68)
- 92: INCEIPL $4
-
- 0x25478610: 92410068 stw r18,104(r1)
- 93: GETL R18, t70
- 94: GETL R1, t72
- 95: ADDL $0x68, t72
- 96: STL t70, (t72)
- 97: INCEIPL $4
-
- 0x25478614: 9361008C stw r27,140(r1)
- 98: GETL R27, t74
- 99: GETL R1, t76
- 100: ADDL $0x8C, t76
- 101: STL t74, (t76)
- 102: INCEIPL $4
-
- 0x25478618: 93A10094 stw r29,148(r1)
- 103: GETL R29, t78
- 104: GETL R1, t80
- 105: ADDL $0x94, t80
- 106: STL t78, (t80)
- 107: INCEIPL $4
-
- 0x2547861C: 900100A4 stw r0,164(r1)
- 108: GETL R0, t82
- 109: GETL R1, t84
- 110: ADDL $0xA4, t84
- 111: STL t82, (t84)
- 112: INCEIPL $4
-
- 0x25478620: 91810060 stw r12,96(r1)
- 113: GETL R12, t86
- 114: GETL R1, t88
- 115: ADDL $0x60, t88
- 116: STL t86, (t88)
- 117: INCEIPL $4
-
- 0x25478624: 88030000 lbz r0,0(r3)
- 118: GETL R3, t90
- 119: LDB (t90), t92
- 120: PUTL t92, R0
- 121: INCEIPL $4
-
- 0x25478628: 2F800000 cmpi cr7,r0,0
- 122: GETL R0, t94
- 123: CMP0L t94, t96 (-rSo)
- 124: ICRFL t96, $0x7, CR
- 125: INCEIPL $4
-
- 0x2547862C: 419E0018 bc 12,30,0x25478644
- 126: Js30o $0x25478644
-
-
-. 0 254785B4 124
-. 92 61 00 6C 7C 93 23 78 92 81 00 70 7D 14 43 78 92 A1 00 74 7C D5 33 78 92 C1 00 78 7C B6 2B 78 92 E1 00 7C 7D 37 4B 78 93 01 00 80 7C F8 3B 78 93 21 00 84 7C 79 1B 78 93 41 00 88 7D 5A 53 78 93 81 00 90 3B 80 00 00 93 C1 00 98 7F C8 02 A6 93 E1 00 9C 7C 3F 0B 78 92 21 00 64 92 41 00 68 93 61 00 8C 93 A1 00 94 90 01 00 A4 91 81 00 60 88 03 00 00 2F 80 00 00 41 9E 00 18
-
-==== BB 1054 (0x25478630) approx BBs exec'd 0 ====
-
- 0x25478630: 89630001 lbz r11,1(r3)
- 0: GETL R3, t0
- 1: ADDL $0x1, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25478634: 7C1C0378 or r28,r0,r0
- 5: GETL R0, t4
- 6: PUTL t4, R28
- 7: INCEIPL $4
-
- 0x25478638: 39230001 addi r9,r3,1
- 8: GETL R3, t6
- 9: ADDL $0x1, t6
- 10: PUTL t6, R9
- 11: INCEIPL $4
-
- 0x2547863C: 2C0B0000 cmpi cr0,r11,0
- 12: GETL R11, t8
- 13: CMP0L t8, t10 (-rSo)
- 14: ICRFL t10, $0x0, CR
- 15: INCEIPL $4
-
- 0x25478640: 4082015C bc 4,2,0x2547879C
- 16: Jc02o $0x2547879C
-
-
-. 0 25478630 20
-. 89 63 00 01 7C 1C 03 78 39 23 00 01 2C 0B 00 00 40 82 01 5C
-
-==== BB 1055 (0x2547879C) approx BBs exec'd 0 ====
-
- 0x2547879C: 89490001 lbz r10,1(r9)
- 0: GETL R9, t0
- 1: ADDL $0x1, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x254787A0: 54032036 rlwinm r3,r0,4,0,27
- 5: GETL R0, t4
- 6: SHLL $0x4, t4
- 7: PUTL t4, R3
- 8: INCEIPL $4
-
- 0x254787A4: 7F835A14 add r28,r3,r11
- 9: GETL R3, t6
- 10: GETL R11, t8
- 11: ADDL t6, t8
- 12: PUTL t8, R28
- 13: INCEIPL $4
-
- 0x254787A8: 39290001 addi r9,r9,1
- 14: GETL R9, t10
- 15: ADDL $0x1, t10
- 16: PUTL t10, R9
- 17: INCEIPL $4
-
- 0x254787AC: 2C8A0000 cmpi cr1,r10,0
- 18: GETL R10, t12
- 19: CMP0L t12, t14 (-rSo)
- 20: ICRFL t14, $0x1, CR
- 21: INCEIPL $4
-
- 0x254787B0: 41A6FE94 bc 13,6,0x25478644
- 22: Js06o $0x25478644
-
-
-. 0 2547879C 24
-. 89 49 00 01 54 03 20 36 7F 83 5A 14 39 29 00 01 2C 8A 00 00 41 A6 FE 94
-
-==== BB 1056 (0x254787B4) approx BBs exec'd 0 ====
-
- 0x254787B4: 89690001 lbz r11,1(r9)
- 0: GETL R9, t0
- 1: ADDL $0x1, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x254787B8: 57842036 rlwinm r4,r28,4,0,27
- 5: GETL R28, t4
- 6: SHLL $0x4, t4
- 7: PUTL t4, R4
- 8: INCEIPL $4
-
- 0x254787BC: 7F845214 add r28,r4,r10
- 9: GETL R4, t6
- 10: GETL R10, t8
- 11: ADDL t6, t8
- 12: PUTL t8, R28
- 13: INCEIPL $4
-
- 0x254787C0: 39290001 addi r9,r9,1
- 14: GETL R9, t10
- 15: ADDL $0x1, t10
- 16: PUTL t10, R9
- 17: INCEIPL $4
-
- 0x254787C4: 2E0B0000 cmpi cr4,r11,0
- 18: GETL R11, t12
- 19: CMP0L t12, t14 (-rSo)
- 20: ICRFL t14, $0x4, CR
- 21: INCEIPL $4
-
- 0x254787C8: 41B2FE7C bc 13,18,0x25478644
- 22: Js18o $0x25478644
-
-
-. 0 254787B4 24
-. 89 69 00 01 57 84 20 36 7F 84 52 14 39 29 00 01 2E 0B 00 00 41 B2 FE 7C
-
-==== BB 1057 (0x254787CC) approx BBs exec'd 0 ====
-
- 0x254787CC: 89490001 lbz r10,1(r9)
- 0: GETL R9, t0
- 1: ADDL $0x1, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x254787D0: 57852036 rlwinm r5,r28,4,0,27
- 5: GETL R28, t4
- 6: SHLL $0x4, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x254787D4: 7F855A14 add r28,r5,r11
- 9: GETL R5, t6
- 10: GETL R11, t8
- 11: ADDL t6, t8
- 12: PUTL t8, R28
- 13: INCEIPL $4
-
- 0x254787D8: 39290001 addi r9,r9,1
- 14: GETL R9, t10
- 15: ADDL $0x1, t10
- 16: PUTL t10, R9
- 17: INCEIPL $4
-
- 0x254787DC: 2F0A0000 cmpi cr6,r10,0
- 18: GETL R10, t12
- 19: CMP0L t12, t14 (-rSo)
- 20: ICRFL t14, $0x6, CR
- 21: INCEIPL $4
-
- 0x254787E0: 41BAFE64 bc 13,26,0x25478644
- 22: Js26o $0x25478644
-
-
-. 0 254787CC 24
-. 89 49 00 01 57 85 20 36 7F 85 5A 14 39 29 00 01 2F 0A 00 00 41 BA FE 64
-
-==== BB 1058 (0x25478644) approx BBs exec'd 0 ====
-
- 0x25478644: 825E04C8 lwz r18,1224(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4C8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R18
- 4: INCEIPL $4
-
- 0x25478648: 2E1A0000 cmpi cr4,r26,0
- 5: GETL R26, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x4, CR
- 8: INCEIPL $4
-
- 0x2547864C: 3B600000 li r27,0
- 9: MOVL $0x0, t8
- 10: PUTL t8, R27
- 11: INCEIPL $4
-
- 0x25478650: 39400000 li r10,0
- 12: MOVL $0x0, t10
- 13: PUTL t10, R10
- 14: INCEIPL $4
-
- 0x25478654: 83B201A8 lwz r29,424(r18)
- 15: GETL R18, t12
- 16: ADDL $0x1A8, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R29
- 19: INCEIPL $4
-
- 0x25478658: 937F0048 stw r27,72(r31)
- 20: GETL R27, t16
- 21: GETL R31, t18
- 22: ADDL $0x48, t18
- 23: STL t16, (t18)
- 24: INCEIPL $4
-
- 0x2547865C: 3B600000 li r27,0
- 25: MOVL $0x0, t20
- 26: PUTL t20, R27
- 27: INCEIPL $4
-
- 0x25478660: 397D0001 addi r11,r29,1
- 28: GETL R29, t22
- 29: ADDL $0x1, t22
- 30: PUTL t22, R11
- 31: INCEIPL $4
-
- 0x25478664: 915F004C stw r10,76(r31)
- 32: GETL R10, t24
- 33: GETL R31, t26
- 34: ADDL $0x4C, t26
- 35: STL t24, (t26)
- 36: INCEIPL $4
-
- 0x25478668: 917201A8 stw r11,424(r18)
- 37: GETL R11, t28
- 38: GETL R18, t30
- 39: ADDL $0x1A8, t30
- 40: STL t28, (t30)
- 41: INCEIPL $4
-
- 0x2547866C: 7EBDAB78 or r29,r21,r21
- 42: GETL R21, t32
- 43: PUTL t32, R29
- 44: INCEIPL $4
-
- 0x25478670: 40920538 bc 4,18,0x25478BA8
- 45: Jc18o $0x25478BA8
-
-
-. 0 25478644 48
-. 82 5E 04 C8 2E 1A 00 00 3B 60 00 00 39 40 00 00 83 B2 01 A8 93 7F 00 48 3B 60 00 00 39 7D 00 01 91 5F 00 4C 91 72 01 A8 7E BD AB 78 40 92 05 38
-
-==== BB 1059 (0x25478674) approx BBs exec'd 0 ====
-
- 0x25478674: 81750000 lwz r11,0(r21)
- 0: GETL R21, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R11
- 3: INCEIPL $4
-
- 0x25478678: 2C8B0000 cmpi cr1,r11,0
- 4: GETL R11, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x1, CR
- 7: INCEIPL $4
-
- 0x2547867C: 7F68DB78 or r8,r27,r27
- 8: GETL R27, t8
- 9: PUTL t8, R8
- 10: INCEIPL $4
-
- 0x25478680: 4186004C bc 12,6,0x254786CC
- 11: Js06o $0x254786CC
-
-
-. 0 25478674 16
-. 81 75 00 00 2C 8B 00 00 7F 68 DB 78 41 86 00 4C
-
-==== BB 1060 (0x25478684) approx BBs exec'd 0 ====
-
- 0x25478684: 80F50000 lwz r7,0(r21)
- 0: GETL R21, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R7
- 3: INCEIPL $4
-
- 0x25478688: 3A3F0018 addi r17,r31,24
- 4: GETL R31, t4
- 5: ADDL $0x18, t4
- 6: PUTL t4, R17
- 7: INCEIPL $4
-
- 0x2547868C: 80B60000 lwz r5,0(r22)
- 8: GETL R22, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R5
- 11: INCEIPL $4
-
- 0x25478690: 7F23CB78 or r3,r25,r25
- 12: GETL R25, t10
- 13: PUTL t10, R3
- 14: INCEIPL $4
-
- 0x25478694: 7F84E378 or r4,r28,r28
- 15: GETL R28, t12
- 16: PUTL t12, R4
- 17: INCEIPL $4
-
- 0x25478698: 38DF0048 addi r6,r31,72
- 18: GETL R31, t14
- 19: ADDL $0x48, t14
- 20: PUTL t14, R6
- 21: INCEIPL $4
-
- 0x2547869C: 7F09C378 or r9,r24,r24
- 22: GETL R24, t16
- 23: PUTL t16, R9
- 24: INCEIPL $4
-
- 0x254786A0: 7EEABB78 or r10,r23,r23
- 25: GETL R23, t18
- 26: PUTL t18, R10
- 27: INCEIPL $4
-
- 0x254786A4: 93410008 stw r26,8(r1)
- 28: GETL R26, t20
- 29: GETL R1, t22
- 30: ADDL $0x8, t22
- 31: STL t20, (t22)
- 32: INCEIPL $4
-
- 0x254786A8: 9281000C stw r20,12(r1)
- 33: GETL R20, t24
- 34: GETL R1, t26
- 35: ADDL $0xC, t26
- 36: STL t24, (t26)
- 37: INCEIPL $4
-
- 0x254786AC: 4BFFFAFD bl 0x254781A8
- 38: MOVL $0x254786B0, t28
- 39: PUTL t28, LR
- 40: JMPo-c $0x254781A8 ($4)
-
-
-. 0 25478684 44
-. 80 F5 00 00 3A 3F 00 18 80 B6 00 00 7F 23 CB 78 7F 84 E3 78 38 DF 00 48 7F 09 C3 78 7E EA BB 78 93 41 00 08 92 81 00 0C 4B FF FA FD
-
-==== BB 1061 do_lookup_x(0x254781A8) approx BBs exec'd 0 ====
-
- 0x254781A8: 7D6802A6 mflr r11
- 0: GETL LR, t0
- 1: PUTL t0, R11
- 2: INCEIPL $4
-
- 0x254781AC: 9421FF90 stwu r1,-112(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFF90, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0x254781B0: 4801EE51 bl 0x25497000
- 9: MOVL $0x254781B4, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 254781A8 12
-. 7D 68 02 A6 94 21 FF 90 48 01 EE 51
-
-==== BB 1062 (0x254781B4) approx BBs exec'd 0 ====
-
- 0x254781B4: 93C10068 stw r30,104(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x68, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x254781B8: 80010078 lwz r0,120(r1)
- 5: GETL R1, t4
- 6: ADDL $0x78, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R0
- 9: INCEIPL $4
-
- 0x254781BC: 7FC802A6 mflr r30
- 10: GETL LR, t8
- 11: PUTL t8, R30
- 12: INCEIPL $4
-
- 0x254781C0: 91610074 stw r11,116(r1)
- 13: GETL R11, t10
- 14: GETL R1, t12
- 15: ADDL $0x74, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x254781C4: 7D800026 mfcr r12
- 18: GETL CR, t14
- 19: PUTL t14, R12
- 20: INCEIPL $4
-
- 0x254781C8: 91E1002C stw r15,44(r1)
- 21: GETL R15, t16
- 22: GETL R1, t18
- 23: ADDL $0x2C, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x254781CC: 92010030 stw r16,48(r1)
- 26: GETL R16, t20
- 27: GETL R1, t22
- 28: ADDL $0x30, t22
- 29: STL t20, (t22)
- 30: INCEIPL $4
-
- 0x254781D0: 81E70004 lwz r15,4(r7)
- 31: GETL R7, t24
- 32: ADDL $0x4, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R15
- 35: INCEIPL $4
-
- 0x254781D4: 82070000 lwz r16,0(r7)
- 36: GETL R7, t28
- 37: LDL (t28), t30
- 38: PUTL t30, R16
- 39: INCEIPL $4
-
- 0x254781D8: 91C10028 stw r14,40(r1)
- 40: GETL R14, t32
- 41: GETL R1, t34
- 42: ADDL $0x28, t34
- 43: STL t32, (t34)
- 44: INCEIPL $4
-
- 0x254781DC: 7C8E2378 or r14,r4,r4
- 45: GETL R4, t36
- 46: PUTL t36, R14
- 47: INCEIPL $4
-
- 0x254781E0: 92210034 stw r17,52(r1)
- 48: GETL R17, t38
- 49: GETL R1, t40
- 50: ADDL $0x34, t40
- 51: STL t38, (t40)
- 52: INCEIPL $4
-
- 0x254781E4: 92A10044 stw r21,68(r1)
- 53: GETL R21, t42
- 54: GETL R1, t44
- 55: ADDL $0x44, t44
- 56: STL t42, (t44)
- 57: INCEIPL $4
-
- 0x254781E8: 7D354B78 or r21,r9,r9
- 58: GETL R9, t46
- 59: PUTL t46, R21
- 60: INCEIPL $4
-
- 0x254781EC: 93410058 stw r26,88(r1)
- 61: GETL R26, t48
- 62: GETL R1, t50
- 63: ADDL $0x58, t50
- 64: STL t48, (t50)
- 65: INCEIPL $4
-
- 0x254781F0: 3120FFFF addic r9,r0,-1
- 66: GETL R0, t52
- 67: ADCL $0xFFFFFFFF, t52 (-wCa)
- 68: PUTL t52, R9
- 69: INCEIPL $4
-
- 0x254781F4: 7E290110 subfe r17,r9,r0
- 70: GETL R9, t54
- 71: GETL R0, t56
- 72: SBBL t54, t56 (-rCa-wCa)
- 73: PUTL t56, R17
- 74: INCEIPL $4
-
- 0x254781F8: 7D1A4378 or r26,r8,r8
- 75: GETL R8, t58
- 76: PUTL t58, R26
- 77: INCEIPL $4
-
- 0x254781FC: 92410038 stw r18,56(r1)
- 78: GETL R18, t60
- 79: GETL R1, t62
- 80: ADDL $0x38, t62
- 81: STL t60, (t62)
- 82: INCEIPL $4
-
- 0x25478200: 9261003C stw r19,60(r1)
- 83: GETL R19, t64
- 84: GETL R1, t66
- 85: ADDL $0x3C, t66
- 86: STL t64, (t66)
- 87: INCEIPL $4
-
- 0x25478204: 92810040 stw r20,64(r1)
- 88: GETL R20, t68
- 89: GETL R1, t70
- 90: ADDL $0x40, t70
- 91: STL t68, (t70)
- 92: INCEIPL $4
-
- 0x25478208: 92C10048 stw r22,72(r1)
- 93: GETL R22, t72
- 94: GETL R1, t74
- 95: ADDL $0x48, t74
- 96: STL t72, (t74)
- 97: INCEIPL $4
-
- 0x2547820C: 92E1004C stw r23,76(r1)
- 98: GETL R23, t76
- 99: GETL R1, t78
- 100: ADDL $0x4C, t78
- 101: STL t76, (t78)
- 102: INCEIPL $4
-
- 0x25478210: 93010050 stw r24,80(r1)
- 103: GETL R24, t80
- 104: GETL R1, t82
- 105: ADDL $0x50, t82
- 106: STL t80, (t82)
- 107: INCEIPL $4
-
- 0x25478214: 93210054 stw r25,84(r1)
- 108: GETL R25, t84
- 109: GETL R1, t86
- 110: ADDL $0x54, t86
- 111: STL t84, (t86)
- 112: INCEIPL $4
-
- 0x25478218: 9361005C stw r27,92(r1)
- 113: GETL R27, t88
- 114: GETL R1, t90
- 115: ADDL $0x5C, t90
- 116: STL t88, (t90)
- 117: INCEIPL $4
-
- 0x2547821C: 93810060 stw r28,96(r1)
- 118: GETL R28, t92
- 119: GETL R1, t94
- 120: ADDL $0x60, t94
- 121: STL t92, (t94)
- 122: INCEIPL $4
-
- 0x25478220: 93A10064 stw r29,100(r1)
- 123: GETL R29, t96
- 124: GETL R1, t98
- 125: ADDL $0x64, t98
- 126: STL t96, (t98)
- 127: INCEIPL $4
-
- 0x25478224: 93E1006C stw r31,108(r1)
- 128: GETL R31, t100
- 129: GETL R1, t102
- 130: ADDL $0x6C, t102
- 131: STL t100, (t102)
- 132: INCEIPL $4
-
- 0x25478228: 91810024 stw r12,36(r1)
- 133: GETL R12, t104
- 134: GETL R1, t106
- 135: ADDL $0x24, t106
- 136: STL t104, (t106)
- 137: INCEIPL $4
-
- 0x2547822C: 90610008 stw r3,8(r1)
- 138: GETL R3, t108
- 139: GETL R1, t110
- 140: ADDL $0x8, t110
- 141: STL t108, (t110)
- 142: INCEIPL $4
-
- 0x25478230: 90A1000C stw r5,12(r1)
- 143: GETL R5, t112
- 144: GETL R1, t114
- 145: ADDL $0xC, t114
- 146: STL t112, (t114)
- 147: INCEIPL $4
-
- 0x25478234: 90C10010 stw r6,16(r1)
- 148: GETL R6, t116
- 149: GETL R1, t118
- 150: ADDL $0x10, t118
- 151: STL t116, (t118)
- 152: INCEIPL $4
-
- 0x25478238: 91410014 stw r10,20(r1)
- 153: GETL R10, t120
- 154: GETL R1, t122
- 155: ADDL $0x14, t122
- 156: STL t120, (t122)
- 157: INCEIPL $4
-
- 0x2547823C: 48000010 b 0x2547824C
- 158: JMPo $0x2547824C ($4)
-
-
-. 0 254781B4 140
-. 93 C1 00 68 80 01 00 78 7F C8 02 A6 91 61 00 74 7D 80 00 26 91 E1 00 2C 92 01 00 30 81 E7 00 04 82 07 00 00 91 C1 00 28 7C 8E 23 78 92 21 00 34 92 A1 00 44 7D 35 4B 78 93 41 00 58 31 20 FF FF 7E 29 01 10 7D 1A 43 78 92 41 00 38 92 61 00 3C 92 81 00 40 92 C1 00 48 92 E1 00 4C 93 01 00 50 93 21 00 54 93 61 00 5C 93 81 00 60 93 A1 00 64 93 E1 00 6C 91 81 00 24 90 61 00 08 90 A1 00 0C 90 C1 00 10 91 41 00 14 48 00 00 10
-
-==== BB 1063 (0x2547824C) approx BBs exec'd 0 ====
-
- 0x2547824C: 5745103A rlwinm r5,r26,2,0,29
- 0: GETL R26, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R5
- 3: INCEIPL $4
-
- 0x25478250: 80810078 lwz r4,120(r1)
- 4: GETL R1, t2
- 5: ADDL $0x78, t2
- 6: LDL (t2), t4
- 7: PUTL t4, R4
- 8: INCEIPL $4
-
- 0x25478254: 7D25802E lwzx r9,r5,r16
- 9: GETL R16, t6
- 10: GETL R5, t8
- 11: ADDL t8, t6
- 12: LDL (t6), t10
- 13: PUTL t10, R9
- 14: INCEIPL $4
-
- 0x25478258: 3A800000 li r20,0
- 15: MOVL $0x0, t12
- 16: PUTL t12, R20
- 17: INCEIPL $4
-
- 0x2547825C: 3A600000 li r19,0
- 18: MOVL $0x0, t14
- 19: PUTL t14, R19
- 20: INCEIPL $4
-
- 0x25478260: 83890014 lwz r28,20(r9)
- 21: GETL R9, t16
- 22: ADDL $0x14, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R28
- 25: INCEIPL $4
-
- 0x25478264: 7F832278 xor r3,r28,r4
- 26: GETL R28, t20
- 27: GETL R4, t22
- 28: XORL t20, t22
- 29: PUTL t22, R3
- 30: INCEIPL $4
-
- 0x25478268: 21630000 subfic r11,r3,0
- 31: GETL R3, t24
- 32: MOVL $0x0, t26
- 33: SBBL t24, t26 (-wCa)
- 34: PUTL t26, R11
- 35: INCEIPL $4
-
- 0x2547826C: 7C6B1914 adde r3,r11,r3
- 36: GETL R11, t28
- 37: GETL R3, t30
- 38: ADCL t28, t30 (-rCa-wCa)
- 39: PUTL t30, R3
- 40: INCEIPL $4
-
- 0x25478270: 7E291839 and. r9,r17,r3
- 41: GETL R17, t32
- 42: GETL R3, t34
- 43: ANDL t32, t34
- 44: PUTL t34, R9
- 45: CMP0L t34, t36 (-rSo)
- 46: ICRFL t36, $0x0, CR
- 47: INCEIPL $4
-
- 0x25478274: 4082FFCC bc 4,2,0x25478240
- 48: Jc02o $0x25478240
-
-
-. 0 2547824C 44
-. 57 45 10 3A 80 81 00 78 7D 25 80 2E 3A 80 00 00 3A 60 00 00 83 89 00 14 7F 83 22 78 21 63 00 00 7C 6B 19 14 7E 29 18 39 40 82 FF CC
-
-==== BB 1064 (0x25478278) approx BBs exec'd 0 ====
-
- 0x25478278: 80C1007C lwz r6,124(r1)
- 0: GETL R1, t0
- 1: ADDL $0x7C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x2547827C: 54CBFFFF rlwinm. r11,r6,31,31,31
- 5: GETL R6, t4
- 6: ROLL $0x1F, t4
- 7: ANDL $0x1, t4
- 8: PUTL t4, R11
- 9: CMP0L t4, t6 (-rSo)
- 10: ICRFL t6, $0x0, CR
- 11: INCEIPL $4
-
- 0x25478280: 41820010 bc 12,2,0x25478290
- 12: Js02o $0x25478290
-
-
-. 0 25478278 12
-. 80 C1 00 7C 54 CB FF FF 41 82 00 10
-
-==== BB 1065 (0x25478290) approx BBs exec'd 0 ====
-
- 0x25478290: 815E04F4 lwz r10,1268(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4F4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x25478294: 810A0000 lwz r8,0(r10)
- 5: GETL R10, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R8
- 8: INCEIPL $4
-
- 0x25478298: 71090008 andi. r9,r8,0x8
- 9: GETL R8, t8
- 10: ANDL $0x8, t8
- 11: PUTL t8, R9
- 12: CMP0L t8, t10 (-rSo)
- 13: ICRFL t10, $0x0, CR
- 14: INCEIPL $4
-
- 0x2547829C: 40820248 bc 4,2,0x254784E4
- 15: Jc02o $0x254784E4
-
-
-. 0 25478290 16
-. 81 5E 04 F4 81 0A 00 00 71 09 00 08 40 82 02 48
-
-==== BB 1066 (0x254782A0) approx BBs exec'd 0 ====
-
- 0x254782A0: 801C016C lwz r0,364(r28)
- 0: GETL R28, t0
- 1: ADDL $0x16C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x254782A4: 833C0170 lwz r25,368(r28)
- 5: GETL R28, t4
- 6: ADDL $0x170, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R25
- 9: INCEIPL $4
-
- 0x254782A8: 7D8E0396 divwu r12, r14, r0
- 10: GETL R14, t10
- 11: GETL R0, t8
- 12: UDIVL t8, t10
- 13: PUTL t10, R12
- 14: INCEIPL $4
-
- 0x254782AC: 817C0038 lwz r11,56(r28)
- 15: GETL R28, t12
- 16: ADDL $0x38, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R11
- 19: INCEIPL $4
-
- 0x254782B0: 807C0034 lwz r3,52(r28)
- 20: GETL R28, t16
- 21: ADDL $0x34, t16
- 22: LDL (t16), t18
- 23: PUTL t18, R3
- 24: INCEIPL $4
-
- 0x254782B4: 830B0004 lwz r24,4(r11)
- 25: GETL R11, t20
- 26: ADDL $0x4, t20
- 27: LDL (t20), t22
- 28: PUTL t22, R24
- 29: INCEIPL $4
-
- 0x254782B8: 82430004 lwz r18,4(r3)
- 30: GETL R3, t24
- 31: ADDL $0x4, t24
- 32: LDL (t24), t26
- 33: PUTL t26, R18
- 34: INCEIPL $4
-
- 0x254782BC: 82DC0198 lwz r22,408(r28)
- 35: GETL R28, t28
- 36: ADDL $0x198, t28
- 37: LDL (t28), t30
- 38: PUTL t30, R22
- 39: INCEIPL $4
-
- 0x254782C0: 7FEC01D6 mullw r31,r12,r0
- 40: GETL R12, t32
- 41: GETL R0, t34
- 42: MULL t32, t34
- 43: PUTL t34, R31
- 44: INCEIPL $4
-
- 0x254782C4: 7FBF7050 subf r29,r31,r14
- 45: GETL R31, t36
- 46: GETL R14, t38
- 47: SUBL t36, t38
- 48: PUTL t38, R29
- 49: INCEIPL $4
-
- 0x254782C8: 57BB103A rlwinm r27,r29,2,0,29
- 50: GETL R29, t40
- 51: SHLL $0x2, t40
- 52: PUTL t40, R27
- 53: INCEIPL $4
-
- 0x254782CC: 7FFBC82E lwzx r31,r27,r25
- 54: GETL R25, t42
- 55: GETL R27, t44
- 56: ADDL t44, t42
- 57: LDL (t42), t46
- 58: PUTL t46, R31
- 59: INCEIPL $4
-
- 0x254782D0: 2E1F0000 cmpi cr4,r31,0
- 60: GETL R31, t48
- 61: CMP0L t48, t50 (-rSo)
- 62: ICRFL t50, $0x4, CR
- 63: INCEIPL $4
-
- 0x254782D4: 419200F8 bc 12,18,0x254783CC
- 64: Js18o $0x254783CC
-
-
-. 0 254782A0 56
-. 80 1C 01 6C 83 3C 01 70 7D 8E 03 96 81 7C 00 38 80 7C 00 34 83 0B 00 04 82 43 00 04 82 DC 01 98 7F EC 01 D6 7F BF 70 50 57 BB 10 3A 7F FB C8 2E 2E 1F 00 00 41 92 00 F8
-
-==== BB 1067 (0x254782D8) approx BBs exec'd 0 ====
-
- 0x254782D8: 2D960000 cmpi cr3,r22,0
- 0: GETL R22, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x3, CR
- 3: INCEIPL $4
-
- 0x254782DC: 48000028 b 0x25478304
- 4: JMPo $0x25478304 ($4)
-
-
-. 0 254782D8 8
-. 2D 96 00 00 48 00 00 28
-
-==== BB 1068 (0x25478304) approx BBs exec'd 0 ====
-
- 0x25478304: 57E92036 rlwinm r9,r31,4,0,27
- 0: GETL R31, t0
- 1: SHLL $0x4, t0
- 2: PUTL t0, R9
- 3: INCEIPL $4
-
- 0x25478308: 7FA9C214 add r29,r9,r24
- 4: GETL R9, t2
- 5: GETL R24, t4
- 6: ADDL t2, t4
- 7: PUTL t4, R29
- 8: INCEIPL $4
-
- 0x2547830C: 809D0004 lwz r4,4(r29)
- 9: GETL R29, t6
- 10: ADDL $0x4, t6
- 11: LDL (t6), t8
- 12: PUTL t8, R4
- 13: INCEIPL $4
-
- 0x25478310: 2C840000 cmpi cr1,r4,0
- 14: GETL R4, t10
- 15: CMP0L t10, t12 (-rSo)
- 16: ICRFL t12, $0x1, CR
- 17: INCEIPL $4
-
- 0x25478314: 41A6FFCC bc 13,6,0x254782E0
- 18: Js06o $0x254782E0
-
-
-. 0 25478304 20
-. 57 E9 20 36 7F A9 C2 14 80 9D 00 04 2C 84 00 00 41 A6 FF CC
-
-==== BB 1069 (0x25478318) approx BBs exec'd 0 ====
-
- 0x25478318: A0FD000E lhz r7,14(r29)
- 0: GETL R29, t0
- 1: ADDL $0xE, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x2547831C: 2C070000 cmpi cr0,r7,0
- 5: GETL R7, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x25478320: 40820010 bc 4,2,0x25478330
- 9: Jc02o $0x25478330
-
-
-. 0 25478318 12
-. A0 FD 00 0E 2C 07 00 00 40 82 00 10
-
-==== BB 1070 (0x25478330) approx BBs exec'd 0 ====
-
- 0x25478330: 8B7D000C lbz r27,12(r29)
- 0: GETL R29, t0
- 1: ADDL $0xC, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R27
- 4: INCEIPL $4
-
- 0x25478334: 5760073E rlwinm r0,r27,0,28,31
- 5: GETL R27, t4
- 6: ANDL $0xF, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x25478338: 2F800002 cmpi cr7,r0,2
- 9: GETL R0, t6
- 10: MOVL $0x2, t10
- 11: CMPL t6, t10, t8 (-rSo)
- 12: ICRFL t8, $0x7, CR
- 13: INCEIPL $4
-
- 0x2547833C: 409D000C bc 4,29,0x25478348
- 14: Jc29o $0x25478348
-
-
-. 0 25478330 16
-. 8B 7D 00 0C 57 60 07 3E 2F 80 00 02 40 9D 00 0C
-
-==== BB 1071 (0x25478348) approx BBs exec'd 0 ====
-
- 0x25478348: 8141000C lwz r10,12(r1)
- 0: GETL R1, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x2547834C: 7F1D5000 cmp cr6,r29,r10
- 5: GETL R29, t4
- 6: GETL R10, t6
- 7: CMPL t4, t6, t8 (-rSo)
- 8: ICRFL t8, $0x6, CR
- 9: INCEIPL $4
-
- 0x25478350: 419A001C bc 12,26,0x2547836C
- 10: Js26o $0x2547836C
-
-
-. 0 25478348 12
-. 81 41 00 0C 7F 1D 50 00 41 9A 00 1C
-
-==== BB 1072 (0x25478354) approx BBs exec'd 0 ====
-
- 0x25478354: 7EE9C02E lwzx r23,r9,r24
- 0: GETL R24, t0
- 1: GETL R9, t2
- 2: ADDL t2, t0
- 3: LDL (t0), t4
- 4: PUTL t4, R23
- 5: INCEIPL $4
-
- 0x25478358: 80810008 lwz r4,8(r1)
- 6: GETL R1, t6
- 7: ADDL $0x8, t6
- 8: LDL (t6), t8
- 9: PUTL t8, R4
- 10: INCEIPL $4
-
- 0x2547835C: 7C779214 add r3,r23,r18
- 11: GETL R23, t10
- 12: GETL R18, t12
- 13: ADDL t10, t12
- 14: PUTL t12, R3
- 15: INCEIPL $4
-
- 0x25478360: 4800AB81 bl 0x25482EE0
- 16: MOVL $0x25478364, t14
- 17: PUTL t14, LR
- 18: JMPo-c $0x25482EE0 ($4)
-
-
-. 0 25478354 16
-. 7E E9 C0 2E 80 81 00 08 7C 77 92 14 48 00 AB 81
-
-==== BB 1073 (0x25478364) approx BBs exec'd 0 ====
-
- 0x25478364: 2C030000 cmpi cr0,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0x25478368: 4082FF88 bc 4,2,0x254782F0
- 4: Jc02o $0x254782F0
-
-
-. 0 25478364 8
-. 2C 03 00 00 40 82 FF 88
-
-==== BB 1074 (0x254782F0) approx BBs exec'd 0 ====
-
- 0x254782F0: 83BC0174 lwz r29,372(r28)
- 0: GETL R28, t0
- 1: ADDL $0x174, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x254782F4: 57E7103A rlwinm r7,r31,2,0,29
- 5: GETL R31, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R7
- 8: INCEIPL $4
-
- 0x254782F8: 7FE7E82E lwzx r31,r7,r29
- 9: GETL R29, t6
- 10: GETL R7, t8
- 11: ADDL t8, t6
- 12: LDL (t6), t10
- 13: PUTL t10, R31
- 14: INCEIPL $4
-
- 0x254782FC: 2E1F0000 cmpi cr4,r31,0
- 15: GETL R31, t12
- 16: CMP0L t12, t14 (-rSo)
- 17: ICRFL t14, $0x4, CR
- 18: INCEIPL $4
-
- 0x25478300: 41920108 bc 12,18,0x25478408
- 19: Js18o $0x25478408
-
-
-. 0 254782F0 20
-. 83 BC 01 74 57 E7 10 3A 7F E7 E8 2E 2E 1F 00 00 41 92 01 08
-
-==== BB 1075 (0x25478408) approx BBs exec'd 0 ====
-
- 0x25478408: 2D940001 cmpi cr3,r20,1
- 0: GETL R20, t0
- 1: MOVL $0x1, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x3, CR
- 4: INCEIPL $4
-
- 0x2547840C: 408EFFC0 bc 4,14,0x254783CC
- 5: Jc14o $0x254783CC
-
-
-. 0 25478408 8
-. 2D 94 00 01 40 8E FF C0
-
-==== BB 1076 (0x254783CC) approx BBs exec'd 0 ====
-
- 0x254783CC: 7F000026 mfcr r24
- 0: GETL CR, t0
- 1: PUTL t0, R24
- 2: INCEIPL $4
-
- 0x254783D0: 57189FFE rlwinm r24,r24,19,31,31
- 3: GETL R24, t2
- 4: ROLL $0x13, t2
- 5: ANDL $0x1, t2
- 6: PUTL t2, R24
- 7: INCEIPL $4
-
- 0x254783D4: 3175FFFF addic r11,r21,-1
- 8: GETL R21, t4
- 9: ADCL $0xFFFFFFFF, t4 (-wCa)
- 10: PUTL t4, R11
- 11: INCEIPL $4
-
- 0x254783D8: 7ECBA910 subfe r22,r11,r21
- 12: GETL R11, t6
- 13: GETL R21, t8
- 14: SBBL t6, t8 (-rCa-wCa)
- 15: PUTL t8, R22
- 16: INCEIPL $4
-
- 0x254783DC: 7F0BB039 and. r11,r24,r22
- 17: GETL R24, t10
- 18: GETL R22, t12
- 19: ANDL t10, t12
- 20: PUTL t12, R11
- 21: CMP0L t12, t14 (-rSo)
- 22: ICRFL t14, $0x0, CR
- 23: INCEIPL $4
-
- 0x254783E0: 41A2FE60 bc 13,2,0x25478240
- 24: Js02o $0x25478240
-
-
-. 0 254783CC 24
-. 7F 00 00 26 57 18 9F FE 31 75 FF FF 7E CB A9 10 7F 0B B0 39 41 A2 FE 60
-
-==== BB 1077 (0x254783E4) approx BBs exec'd 0 ====
-
- 0x254783E4: 8075000C lwz r3,12(r21)
- 0: GETL R21, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x254783E8: 2E030000 cmpi cr4,r3,0
- 5: GETL R3, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x4, CR
- 8: INCEIPL $4
-
- 0x254783EC: 4192FE54 bc 12,18,0x25478240
- 9: Js18o $0x25478240
-
-
-. 0 254783E4 12
-. 80 75 00 0C 2E 03 00 00 41 92 FE 54
-
-==== BB 1078 (0x25478240) approx BBs exec'd 0 ====
-
- 0x25478240: 3B5A0001 addi r26,r26,1
- 0: GETL R26, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R26
- 3: INCEIPL $4
-
- 0x25478244: 7F9A7840 cmpl cr7,r26,r15
- 4: GETL R26, t2
- 5: GETL R15, t4
- 6: CMPUL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x25478248: 409C01DC bc 4,28,0x25478424
- 9: Jc28o $0x25478424
-
-
-. 0 25478240 12
-. 3B 5A 00 01 7F 9A 78 40 40 9C 01 DC
-
-==== BB 1079 (0x2547836C) approx BBs exec'd 0 ====
-
- 0x2547836C: 2F950000 cmpi cr7,r21,0
- 0: GETL R21, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x25478370: 419E0130 bc 12,30,0x254784A0
- 4: Js30o $0x254784A0
-
-
-. 0 2547836C 8
-. 2F 95 00 00 41 9E 01 30
-
-==== BB 1080 (0x25478374) approx BBs exec'd 0 ====
-
- 0x25478374: 418E0044 bc 12,14,0x254783B8
- 0: Js14o $0x254783B8
-
-
-. 0 25478374 4
-. 41 8E 00 44
-
-==== BB 1081 (0x25478378) approx BBs exec'd 0 ====
-
- 0x25478378: 57F9083C rlwinm r25,r31,1,0,30
- 0: GETL R31, t0
- 1: SHLL $0x1, t0
- 2: PUTL t0, R25
- 3: INCEIPL $4
-
- 0x2547837C: 815C0188 lwz r10,392(r28)
- 4: GETL R28, t2
- 5: ADDL $0x188, t2
- 6: LDL (t2), t4
- 7: PUTL t4, R10
- 8: INCEIPL $4
-
- 0x25478380: 7EF9B22E lhzx r23,r25,r22
- 9: GETL R22, t6
- 10: GETL R25, t8
- 11: ADDL t8, t6
- 12: LDW (t6), t10
- 13: PUTL t10, R23
- 14: INCEIPL $4
-
- 0x25478384: 81350004 lwz r9,4(r21)
- 15: GETL R21, t12
- 16: ADDL $0x4, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R9
- 19: INCEIPL $4
-
- 0x25478388: 56EB2376 rlwinm r11,r23,4,13,27
- 20: GETL R23, t16
- 21: ROLL $0x4, t16
- 22: ANDL $0x7FFF0, t16
- 23: PUTL t16, R11
- 24: INCEIPL $4
-
- 0x2547838C: 7D8B5214 add r12,r11,r10
- 25: GETL R11, t18
- 26: GETL R10, t20
- 27: ADDL t18, t20
- 28: PUTL t20, R12
- 29: INCEIPL $4
-
- 0x25478390: 832C0004 lwz r25,4(r12)
- 30: GETL R12, t22
- 31: ADDL $0x4, t22
- 32: LDL (t22), t24
- 33: PUTL t24, R25
- 34: INCEIPL $4
-
- 0x25478394: 7C994800 cmp cr1,r25,r9
- 35: GETL R25, t26
- 36: GETL R9, t28
- 37: CMPL t26, t28, t30 (-rSo)
- 38: ICRFL t30, $0x1, CR
- 39: INCEIPL $4
-
- 0x25478398: 418600F0 bc 12,6,0x25478488
- 40: Js06o $0x25478488
-
-
-. 0 25478378 36
-. 57 F9 08 3C 81 5C 01 88 7E F9 B2 2E 81 35 00 04 56 EB 23 76 7D 8B 52 14 83 2C 00 04 7C 99 48 00 41 86 00 F0
-
-==== BB 1082 (0x25478488) approx BBs exec'd 0 ====
-
- 0x25478488: 7C6B502E lwzx r3,r11,r10
- 0: GETL R10, t0
- 1: GETL R11, t2
- 2: ADDL t2, t0
- 3: LDL (t0), t4
- 4: PUTL t4, R3
- 5: INCEIPL $4
-
- 0x2547848C: 80950000 lwz r4,0(r21)
- 6: GETL R21, t6
- 7: LDL (t6), t8
- 8: PUTL t8, R4
- 9: INCEIPL $4
-
- 0x25478490: 4800AA51 bl 0x25482EE0
- 10: MOVL $0x25478494, t10
- 11: PUTL t10, LR
- 12: JMPo-c $0x25482EE0 ($4)
-
-
-. 0 25478488 12
-. 7C 6B 50 2E 80 95 00 00 48 00 AA 51
-
-==== BB 1083 (0x25478494) approx BBs exec'd 0 ====
-
- 0x25478494: 2F030000 cmpi cr6,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x25478498: 409AFF04 bc 4,26,0x2547839C
- 4: Jc26o $0x2547839C
-
-
-. 0 25478494 8
-. 2F 03 00 00 40 9A FF 04
-
-==== BB 1084 (0x2547849C) approx BBs exec'd 0 ====
-
- 0x2547849C: 4BFFFF1C b 0x254783B8
- 0: JMPo $0x254783B8 ($4)
-
-
-. 0 2547849C 4
-. 4B FF FF 1C
-
-==== BB 1085 (0x254783B8) approx BBs exec'd 0 ====
-
- 0x254783B8: 5760E13E rlwinm r0,r27,28,4,31
- 0: GETL R27, t0
- 1: SHRL $0x4, t0
- 2: PUTL t0, R0
- 3: INCEIPL $4
-
- 0x254783BC: 2F800001 cmpi cr7,r0,1
- 4: GETL R0, t2
- 5: MOVL $0x1, t6
- 6: CMPL t2, t6, t4 (-rSo)
- 7: ICRFL t4, $0x7, CR
- 8: INCEIPL $4
-
- 0x254783C0: 419E017C bc 12,30,0x2547853C
- 9: Js30o $0x2547853C
-
-
-. 0 254783B8 12
-. 57 60 E1 3E 2F 80 00 01 41 9E 01 7C
-
-==== BB 1086 (0x2547853C) approx BBs exec'd 0 ====
-
- 0x2547853C: 81C10010 lwz r14,16(r1)
- 0: GETL R1, t0
- 1: ADDL $0x10, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R14
- 4: INCEIPL $4
-
- 0x25478540: 38600001 li r3,1
- 5: MOVL $0x1, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25478544: 938E0004 stw r28,4(r14)
- 8: GETL R28, t6
- 9: GETL R14, t8
- 10: ADDL $0x4, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x25478548: 93AE0000 stw r29,0(r14)
- 13: GETL R29, t10
- 14: GETL R14, t12
- 15: STL t10, (t12)
- 16: INCEIPL $4
-
- 0x2547854C: 4BFFFEDC b 0x25478428
- 17: JMPo $0x25478428 ($4)
-
-
-. 0 2547853C 20
-. 81 C1 00 10 38 60 00 01 93 8E 00 04 93 AE 00 00 4B FF FE DC
-
-==== BB 1087 (0x25478428) approx BBs exec'd 0 ====
-
- 0x25478428: 81E10074 lwz r15,116(r1)
- 0: GETL R1, t0
- 1: ADDL $0x74, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R15
- 4: INCEIPL $4
-
- 0x2547842C: 81810024 lwz r12,36(r1)
- 5: GETL R1, t4
- 6: ADDL $0x24, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R12
- 9: INCEIPL $4
-
- 0x25478430: 7DE803A6 mtlr r15
- 10: GETL R15, t8
- 11: PUTL t8, LR
- 12: INCEIPL $4
-
- 0x25478434: 81C10028 lwz r14,40(r1)
- 13: GETL R1, t10
- 14: ADDL $0x28, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R14
- 17: INCEIPL $4
-
- 0x25478438: 81E1002C lwz r15,44(r1)
- 18: GETL R1, t14
- 19: ADDL $0x2C, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R15
- 22: INCEIPL $4
-
- 0x2547843C: 7D818120 mtcrf 0x18,r12
- 23: GETL R12, t18
- 24: ICRFL t18, $0x3, CR
- 25: ICRFL t18, $0x4, CR
- 26: INCEIPL $4
-
- 0x25478440: 82010030 lwz r16,48(r1)
- 27: GETL R1, t20
- 28: ADDL $0x30, t20
- 29: LDL (t20), t22
- 30: PUTL t22, R16
- 31: INCEIPL $4
-
- 0x25478444: 82210034 lwz r17,52(r1)
- 32: GETL R1, t24
- 33: ADDL $0x34, t24
- 34: LDL (t24), t26
- 35: PUTL t26, R17
- 36: INCEIPL $4
-
- 0x25478448: 82410038 lwz r18,56(r1)
- 37: GETL R1, t28
- 38: ADDL $0x38, t28
- 39: LDL (t28), t30
- 40: PUTL t30, R18
- 41: INCEIPL $4
-
- 0x2547844C: 8261003C lwz r19,60(r1)
- 42: GETL R1, t32
- 43: ADDL $0x3C, t32
- 44: LDL (t32), t34
- 45: PUTL t34, R19
- 46: INCEIPL $4
-
- 0x25478450: 82810040 lwz r20,64(r1)
- 47: GETL R1, t36
- 48: ADDL $0x40, t36
- 49: LDL (t36), t38
- 50: PUTL t38, R20
- 51: INCEIPL $4
-
- 0x25478454: 82A10044 lwz r21,68(r1)
- 52: GETL R1, t40
- 53: ADDL $0x44, t40
- 54: LDL (t40), t42
- 55: PUTL t42, R21
- 56: INCEIPL $4
-
- 0x25478458: 82C10048 lwz r22,72(r1)
- 57: GETL R1, t44
- 58: ADDL $0x48, t44
- 59: LDL (t44), t46
- 60: PUTL t46, R22
- 61: INCEIPL $4
-
- 0x2547845C: 82E1004C lwz r23,76(r1)
- 62: GETL R1, t48
- 63: ADDL $0x4C, t48
- 64: LDL (t48), t50
- 65: PUTL t50, R23
- 66: INCEIPL $4
-
- 0x25478460: 83010050 lwz r24,80(r1)
- 67: GETL R1, t52
- 68: ADDL $0x50, t52
- 69: LDL (t52), t54
- 70: PUTL t54, R24
- 71: INCEIPL $4
-
- 0x25478464: 83210054 lwz r25,84(r1)
- 72: GETL R1, t56
- 73: ADDL $0x54, t56
- 74: LDL (t56), t58
- 75: PUTL t58, R25
- 76: INCEIPL $4
-
- 0x25478468: 83410058 lwz r26,88(r1)
- 77: GETL R1, t60
- 78: ADDL $0x58, t60
- 79: LDL (t60), t62
- 80: PUTL t62, R26
- 81: INCEIPL $4
-
- 0x2547846C: 8361005C lwz r27,92(r1)
- 82: GETL R1, t64
- 83: ADDL $0x5C, t64
- 84: LDL (t64), t66
- 85: PUTL t66, R27
- 86: INCEIPL $4
-
- 0x25478470: 83810060 lwz r28,96(r1)
- 87: GETL R1, t68
- 88: ADDL $0x60, t68
- 89: LDL (t68), t70
- 90: PUTL t70, R28
- 91: INCEIPL $4
-
- 0x25478474: 83A10064 lwz r29,100(r1)
- 92: GETL R1, t72
- 93: ADDL $0x64, t72
- 94: LDL (t72), t74
- 95: PUTL t74, R29
- 96: INCEIPL $4
-
- 0x25478478: 83C10068 lwz r30,104(r1)
- 97: GETL R1, t76
- 98: ADDL $0x68, t76
- 99: LDL (t76), t78
- 100: PUTL t78, R30
- 101: INCEIPL $4
-
- 0x2547847C: 83E1006C lwz r31,108(r1)
- 102: GETL R1, t80
- 103: ADDL $0x6C, t80
- 104: LDL (t80), t82
- 105: PUTL t82, R31
- 106: INCEIPL $4
-
- 0x25478480: 38210070 addi r1,r1,112
- 107: GETL R1, t84
- 108: ADDL $0x70, t84
- 109: PUTL t84, R1
- 110: INCEIPL $4
-
- 0x25478484: 4E800020 blr
- 111: GETL LR, t86
- 112: JMPo-r t86 ($4)
-
-
-. 0 25478428 96
-. 81 E1 00 74 81 81 00 24 7D E8 03 A6 81 C1 00 28 81 E1 00 2C 7D 81 81 20 82 01 00 30 82 21 00 34 82 41 00 38 82 61 00 3C 82 81 00 40 82 A1 00 44 82 C1 00 48 82 E1 00 4C 83 01 00 50 83 21 00 54 83 41 00 58 83 61 00 5C 83 81 00 60 83 A1 00 64 83 C1 00 68 83 E1 00 6C 38 21 00 70 4E 80 00 20
-
-==== BB 1088 (0x254786B0) approx BBs exec'd 0 ====
-
- 0x254786B0: 2C030000 cmpi cr0,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0x254786B4: 39000000 li r8,0
- 4: MOVL $0x0, t4
- 5: PUTL t4, R8
- 6: INCEIPL $4
-
- 0x254786B8: 41810014 bc 12,1,0x254786CC
- 7: Js01o $0x254786CC
-
-
-. 0 254786B0 12
-. 2C 03 00 00 39 00 00 00 41 81 00 14
-
-==== BB 1089 (0x254786CC) approx BBs exec'd 0 ====
-
- 0x254786CC: 815F0048 lwz r10,72(r31)
- 0: GETL R31, t0
- 1: ADDL $0x48, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x254786D0: 2F8A0000 cmpi cr7,r10,0
- 5: GETL R10, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x254786D4: 419E0504 bc 12,30,0x25478BD8
- 9: Js30o $0x25478BD8
-
-
-. 0 254786CC 12
-. 81 5F 00 48 2F 8A 00 00 41 9E 05 04
-
-==== BB 1090 (0x254786D8) approx BBs exec'd 0 ====
-
- 0x254786D8: 80B60000 lwz r5,0(r22)
- 0: GETL R22, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R5
- 3: INCEIPL $4
-
- 0x254786DC: 2F850000 cmpi cr7,r5,0
- 4: GETL R5, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x7, CR
- 7: INCEIPL $4
-
- 0x254786E0: 419E0140 bc 12,30,0x25478820
- 8: Js30o $0x25478820
-
-
-. 0 254786D8 12
-. 80 B6 00 00 2F 85 00 00 41 9E 01 40
-
-==== BB 1091 (0x254786E4) approx BBs exec'd 0 ====
-
- 0x254786E4: 88E5000D lbz r7,13(r5)
- 0: GETL R5, t0
- 1: ADDL $0xD, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R7
- 4: INCEIPL $4
-
- 0x254786E8: 39200000 li r9,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R9
- 7: INCEIPL $4
-
- 0x254786EC: 2E090000 cmpi cr4,r9,0
- 8: GETL R9, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x4, CR
- 11: INCEIPL $4
-
- 0x254786F0: 54E607BE rlwinm r6,r7,0,30,31
- 12: GETL R7, t10
- 13: ANDL $0x3, t10
- 14: PUTL t10, R6
- 15: INCEIPL $4
-
- 0x254786F4: 2F060003 cmpi cr6,r6,3
- 16: GETL R6, t12
- 17: MOVL $0x3, t16
- 18: CMPL t12, t16, t14 (-rSo)
- 19: ICRFL t14, $0x6, CR
- 20: INCEIPL $4
-
- 0x254786F8: 419A0234 bc 12,26,0x2547892C
- 21: Js26o $0x2547892C
-
-
-. 0 254786E4 24
-. 88 E5 00 0D 39 20 00 00 2E 09 00 00 54 E6 07 BE 2F 06 00 03 41 9A 02 34
-
-==== BB 1092 (0x254786FC) approx BBs exec'd 0 ====
-
- 0x254786FC: 3B7F0048 addi r27,r31,72
- 0: GETL R31, t0
- 1: ADDL $0x48, t0
- 2: PUTL t0, R27
- 3: INCEIPL $4
-
- 0x25478700: 839B0004 lwz r28,4(r27)
- 4: GETL R27, t2
- 5: ADDL $0x4, t2
- 6: LDL (t2), t4
- 7: PUTL t4, R28
- 8: INCEIPL $4
-
- 0x25478704: 3D808000 lis r12,-32768
- 9: MOVL $0x80000000, t6
- 10: PUTL t6, R12
- 11: INCEIPL $4
-
- 0x25478708: 801C0180 lwz r0,384(r28)
- 12: GETL R28, t8
- 13: ADDL $0x180, t8
- 14: LDL (t8), t10
- 15: PUTL t10, R0
- 16: INCEIPL $4
-
- 0x2547870C: 541D0002 rlwinm r29,r0,0,0,1
- 17: GETL R0, t12
- 18: ANDL $0xC0000000, t12
- 19: PUTL t12, R29
- 20: INCEIPL $4
-
- 0x25478710: 7F1D6000 cmp cr6,r29,r12
- 21: GETL R29, t14
- 22: GETL R12, t16
- 23: CMPL t14, t16, t18 (-rSo)
- 24: ICRFL t18, $0x6, CR
- 25: INCEIPL $4
-
- 0x25478714: 419A05BC bc 12,26,0x25478CD0
- 26: Js26o $0x25478CD0
-
-
-. 0 254786FC 28
-. 3B 7F 00 48 83 9B 00 04 3D 80 80 00 80 1C 01 80 54 1D 00 02 7F 1D 60 00 41 9A 05 BC
-
-==== BB 1093 (0x25478718) approx BBs exec'd 0 ====
-
- 0x25478718: 82BB0004 lwz r21,4(r27)
- 0: GETL R27, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R21
- 4: INCEIPL $4
-
- 0x2547871C: 83BE04F4 lwz r29,1268(r30)
- 5: GETL R30, t4
- 6: ADDL $0x4F4, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R29
- 9: INCEIPL $4
-
- 0x25478720: 83550180 lwz r26,384(r21)
- 10: GETL R21, t8
- 11: ADDL $0x180, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R26
- 14: INCEIPL $4
-
- 0x25478724: 67570010 oris r23,r26,0x10
- 15: GETL R26, t12
- 16: ORL $0x100000, t12
- 17: PUTL t12, R23
- 18: INCEIPL $4
-
- 0x25478728: 92F50180 stw r23,384(r21)
- 19: GETL R23, t14
- 20: GETL R21, t16
- 21: ADDL $0x180, t16
- 22: STL t14, (t16)
- 23: INCEIPL $4
-
- 0x2547872C: 801D0000 lwz r0,0(r29)
- 24: GETL R29, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R0
- 27: INCEIPL $4
-
- 0x25478730: 70090404 andi. r9,r0,0x404
- 28: GETL R0, t22
- 29: ANDL $0x404, t22
- 30: PUTL t22, R9
- 31: CMP0L t22, t24 (-rSo)
- 32: ICRFL t24, $0x0, CR
- 33: INCEIPL $4
-
- 0x25478734: 408202A0 bc 4,2,0x254789D4
- 34: Jc02o $0x254789D4
-
-
-. 0 25478718 32
-. 82 BB 00 04 83 BE 04 F4 83 55 01 80 67 57 00 10 92 F5 01 80 80 1D 00 00 70 09 04 04 40 82 02 A0
-
-==== BB 1094 (0x25478738) approx BBs exec'd 0 ====
-
- 0x25478738: 807B0004 lwz r3,4(r27)
- 0: GETL R27, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x2547873C: 801F0048 lwz r0,72(r31)
- 5: GETL R31, t4
- 6: ADDL $0x48, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R0
- 9: INCEIPL $4
-
- 0x25478740: 90160000 stw r0,0(r22)
- 10: GETL R0, t8
- 11: GETL R22, t10
- 12: STL t8, (t10)
- 13: INCEIPL $4
-
- 0x25478744: 80E10000 lwz r7,0(r1)
- 14: GETL R1, t12
- 15: LDL (t12), t14
- 16: PUTL t14, R7
- 17: INCEIPL $4
-
- 0x25478748: 82C70004 lwz r22,4(r7)
- 18: GETL R7, t16
- 19: ADDL $0x4, t16
- 20: LDL (t16), t18
- 21: PUTL t18, R22
- 22: INCEIPL $4
-
- 0x2547874C: 8107FFC0 lwz r8,-64(r7)
- 23: GETL R7, t20
- 24: ADDL $0xFFFFFFC0, t20
- 25: LDL (t20), t22
- 26: PUTL t22, R8
- 27: INCEIPL $4
-
- 0x25478750: 7EC803A6 mtlr r22
- 28: GETL R22, t24
- 29: PUTL t24, LR
- 30: INCEIPL $4
-
- 0x25478754: 8227FFC4 lwz r17,-60(r7)
- 31: GETL R7, t26
- 32: ADDL $0xFFFFFFC4, t26
- 33: LDL (t26), t28
- 34: PUTL t28, R17
- 35: INCEIPL $4
-
- 0x25478758: 8247FFC8 lwz r18,-56(r7)
- 36: GETL R7, t30
- 37: ADDL $0xFFFFFFC8, t30
- 38: LDL (t30), t32
- 39: PUTL t32, R18
- 40: INCEIPL $4
-
- 0x2547875C: 7D008120 mtcrf 0x8,r8
- 41: GETL R8, t34
- 42: ICRFL t34, $0x4, CR
- 43: INCEIPL $4
-
- 0x25478760: 8267FFCC lwz r19,-52(r7)
- 44: GETL R7, t36
- 45: ADDL $0xFFFFFFCC, t36
- 46: LDL (t36), t38
- 47: PUTL t38, R19
- 48: INCEIPL $4
-
- 0x25478764: 8287FFD0 lwz r20,-48(r7)
- 49: GETL R7, t40
- 50: ADDL $0xFFFFFFD0, t40
- 51: LDL (t40), t42
- 52: PUTL t42, R20
- 53: INCEIPL $4
-
- 0x25478768: 82A7FFD4 lwz r21,-44(r7)
- 54: GETL R7, t44
- 55: ADDL $0xFFFFFFD4, t44
- 56: LDL (t44), t46
- 57: PUTL t46, R21
- 58: INCEIPL $4
-
- 0x2547876C: 82C7FFD8 lwz r22,-40(r7)
- 59: GETL R7, t48
- 60: ADDL $0xFFFFFFD8, t48
- 61: LDL (t48), t50
- 62: PUTL t50, R22
- 63: INCEIPL $4
-
- 0x25478770: 82E7FFDC lwz r23,-36(r7)
- 64: GETL R7, t52
- 65: ADDL $0xFFFFFFDC, t52
- 66: LDL (t52), t54
- 67: PUTL t54, R23
- 68: INCEIPL $4
-
- 0x25478774: 8307FFE0 lwz r24,-32(r7)
- 69: GETL R7, t56
- 70: ADDL $0xFFFFFFE0, t56
- 71: LDL (t56), t58
- 72: PUTL t58, R24
- 73: INCEIPL $4
-
- 0x25478778: 8327FFE4 lwz r25,-28(r7)
- 74: GETL R7, t60
- 75: ADDL $0xFFFFFFE4, t60
- 76: LDL (t60), t62
- 77: PUTL t62, R25
- 78: INCEIPL $4
-
- 0x2547877C: 8347FFE8 lwz r26,-24(r7)
- 79: GETL R7, t64
- 80: ADDL $0xFFFFFFE8, t64
- 81: LDL (t64), t66
- 82: PUTL t66, R26
- 83: INCEIPL $4
-
- 0x25478780: 8367FFEC lwz r27,-20(r7)
- 84: GETL R7, t68
- 85: ADDL $0xFFFFFFEC, t68
- 86: LDL (t68), t70
- 87: PUTL t70, R27
- 88: INCEIPL $4
-
- 0x25478784: 8387FFF0 lwz r28,-16(r7)
- 89: GETL R7, t72
- 90: ADDL $0xFFFFFFF0, t72
- 91: LDL (t72), t74
- 92: PUTL t74, R28
- 93: INCEIPL $4
-
- 0x25478788: 83A7FFF4 lwz r29,-12(r7)
- 94: GETL R7, t76
- 95: ADDL $0xFFFFFFF4, t76
- 96: LDL (t76), t78
- 97: PUTL t78, R29
- 98: INCEIPL $4
-
- 0x2547878C: 83C7FFF8 lwz r30,-8(r7)
- 99: GETL R7, t80
- 100: ADDL $0xFFFFFFF8, t80
- 101: LDL (t80), t82
- 102: PUTL t82, R30
- 103: INCEIPL $4
-
- 0x25478790: 83E7FFFC lwz r31,-4(r7)
- 104: GETL R7, t84
- 105: ADDL $0xFFFFFFFC, t84
- 106: LDL (t84), t86
- 107: PUTL t86, R31
- 108: INCEIPL $4
-
- 0x25478794: 7CE13B78 or r1,r7,r7
- 109: GETL R7, t88
- 110: PUTL t88, R1
- 111: INCEIPL $4
-
- 0x25478798: 4E800020 blr
- 112: GETL LR, t90
- 113: JMPo-r t90 ($4)
-
-
-. 0 25478738 100
-. 80 7B 00 04 80 1F 00 48 90 16 00 00 80 E1 00 00 82 C7 00 04 81 07 FF C0 7E C8 03 A6 82 27 FF C4 82 47 FF C8 7D 00 81 20 82 67 FF CC 82 87 FF D0 82 A7 FF D4 82 C7 FF D8 82 E7 FF DC 83 07 FF E0 83 27 FF E4 83 47 FF E8 83 67 FF EC 83 87 FF F0 83 A7 FF F4 83 C7 FF F8 83 E7 FF FC 7C E1 3B 78 4E 80 00 20
-
-==== BB 1095 (0x2547995C) approx BBs exec'd 0 ====
-
- 0x2547995C: 811F0050 lwz r8,80(r31)
- 0: GETL R31, t0
- 1: ADDL $0x50, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x25479960: 809F000C lwz r4,12(r31)
- 5: GETL R31, t4
- 6: ADDL $0xC, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R4
- 9: INCEIPL $4
-
- 0x25479964: 7C7A1B78 or r26,r3,r3
- 10: GETL R3, t8
- 11: PUTL t8, R26
- 12: INCEIPL $4
-
- 0x25479968: 7D064378 or r6,r8,r8
- 13: GETL R8, t10
- 14: PUTL t10, R6
- 15: INCEIPL $4
-
- 0x2547996C: 90640210 stw r3,528(r4)
- 16: GETL R3, t12
- 17: GETL R4, t14
- 18: ADDL $0x210, t14
- 19: STL t12, (t14)
- 20: INCEIPL $4
-
- 0x25479970: 91040214 stw r8,532(r4)
- 21: GETL R8, t16
- 22: GETL R4, t18
- 23: ADDL $0x214, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x25479974: 2F060000 cmpi cr6,r6,0
- 26: GETL R6, t20
- 27: CMP0L t20, t22 (-rSo)
- 28: ICRFL t22, $0x6, CR
- 29: INCEIPL $4
-
- 0x25479978: 39200000 li r9,0
- 30: MOVL $0x0, t24
- 31: PUTL t24, R9
- 32: INCEIPL $4
-
- 0x2547997C: 419A0010 bc 12,26,0x2547998C
- 33: Js26o $0x2547998C
-
-
-. 0 2547995C 36
-. 81 1F 00 50 80 9F 00 0C 7C 7A 1B 78 7D 06 43 78 90 64 02 10 91 04 02 14 2F 06 00 00 39 20 00 00 41 9A 00 10
-
-==== BB 1096 (0x25479980) approx BBs exec'd 0 ====
-
- 0x25479980: 80FA0000 lwz r7,0(r26)
- 0: GETL R26, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R7
- 3: INCEIPL $4
-
- 0x25479984: 81660004 lwz r11,4(r6)
- 4: GETL R6, t4
- 5: ADDL $0x4, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R11
- 8: INCEIPL $4
-
- 0x25479988: 7D275A14 add r9,r7,r11
- 9: GETL R7, t8
- 10: GETL R11, t10
- 11: ADDL t8, t10
- 12: PUTL t10, R9
- 13: INCEIPL $4
-
- 0x2547998C: 2F9D0044 cmpi cr7,r29,68
- 14: GETL R29, t12
- 15: MOVL $0x44, t16
- 16: CMPL t12, t16, t14 (-rSo)
- 17: ICRFL t14, $0x7, CR
- 18: INCEIPL $4
-
- 0x25479990: 801C0008 lwz r0,8(r28)
- 19: GETL R28, t18
- 20: ADDL $0x8, t18
- 21: LDL (t18), t20
- 22: PUTL t20, R0
- 23: INCEIPL $4
-
- 0x25479994: 7D290214 add r9,r9,r0
- 24: GETL R9, t22
- 25: GETL R0, t24
- 26: ADDL t22, t24
- 27: PUTL t24, R9
- 28: INCEIPL $4
-
- 0x25479998: 419E0100 bc 12,30,0x25479A98
- 29: Js30o $0x25479A98
-
-
-. 0 25479980 28
-. 80 FA 00 00 81 66 00 04 7D 27 5A 14 2F 9D 00 44 80 1C 00 08 7D 29 02 14 41 9E 01 00
-
-==== BB 1097 (0x2547999C) approx BBs exec'd 0 ====
-
- 0x2547999C: 419D00D0 bc 12,29,0x25479A6C
- 0: Js29o $0x25479A6C
-
-
-. 0 2547999C 4
-. 41 9D 00 D0
-
-==== BB 1098 (0x254799A0) approx BBs exec'd 0 ====
-
- 0x254799A0: 2F9D0001 cmpi cr7,r29,1
- 0: GETL R29, t0
- 1: MOVL $0x1, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0x254799A4: 419E00EC bc 12,30,0x25479A90
- 5: Js30o $0x25479A90
-
-
-. 0 254799A0 8
-. 2F 9D 00 01 41 9E 00 EC
-
-==== BB 1099 (0x25479A90) approx BBs exec'd 0 ====
-
- 0x25479A90: 91370000 stw r9,0(r23)
- 0: GETL R9, t0
- 1: GETL R23, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0x25479A94: 4BFFFF38 b 0x254799CC
- 4: JMPo $0x254799CC ($4)
-
-
-. 0 25479A90 8
-. 91 37 00 00 4B FF FF 38
-
-==== BB 1100 (0x254799CC) approx BBs exec'd 0 ====
-
- 0x254799CC: 3B9C000C addi r28,r28,12
- 0: GETL R28, t0
- 1: ADDL $0xC, t0
- 2: PUTL t0, R28
- 3: INCEIPL $4
-
- 0x254799D0: 7E1CC040 cmpl cr4,r28,r24
- 4: GETL R28, t2
- 5: GETL R24, t4
- 6: CMPUL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x4, CR
- 8: INCEIPL $4
-
- 0x254799D4: 4190FE68 bc 12,16,0x2547983C
- 9: Js16o $0x2547983C
-
-
-. 0 254799CC 12
-. 3B 9C 00 0C 7E 1C C0 40 41 90 FE 68
-
-==== BB 1101 (0x254787E4) approx BBs exec'd 0 ====
-
- 0x254787E4: 89690001 lbz r11,1(r9)
- 0: GETL R9, t0
- 1: ADDL $0x1, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x254787E8: 57862036 rlwinm r6,r28,4,0,27
- 5: GETL R28, t4
- 6: SHLL $0x4, t4
- 7: PUTL t4, R6
- 8: INCEIPL $4
-
- 0x254787EC: 7F865214 add r28,r6,r10
- 9: GETL R6, t6
- 10: GETL R10, t8
- 11: ADDL t6, t8
- 12: PUTL t8, R28
- 13: INCEIPL $4
-
- 0x254787F0: 39490001 addi r10,r9,1
- 14: GETL R9, t10
- 15: ADDL $0x1, t10
- 16: PUTL t10, R10
- 17: INCEIPL $4
-
- 0x254787F4: 2F8B0000 cmpi cr7,r11,0
- 18: GETL R11, t12
- 19: CMP0L t12, t14 (-rSo)
- 20: ICRFL t14, $0x7, CR
- 21: INCEIPL $4
-
- 0x254787F8: 41BEFE4C bc 13,30,0x25478644
- 22: Js30o $0x25478644
-
-
-. 0 254787E4 24
-. 89 69 00 01 57 86 20 36 7F 86 52 14 39 49 00 01 2F 8B 00 00 41 BE FE 4C
-
-==== BB 1102 (0x254787FC) approx BBs exec'd 0 ====
-
- 0x254787FC: 57922036 rlwinm r18,r28,4,0,27
- 0: GETL R28, t0
- 1: SHLL $0x4, t0
- 2: PUTL t0, R18
- 3: INCEIPL $4
-
- 0x25478800: 7E325A14 add r17,r18,r11
- 4: GETL R18, t2
- 5: GETL R11, t4
- 6: ADDL t2, t4
- 7: PUTL t4, R17
- 8: INCEIPL $4
-
- 0x25478804: 8D6A0001 lbzu r11,1(r10)
- 9: GETL R10, t6
- 10: ADDL $0x1, t6
- 11: PUTL t6, R10
- 12: LDB (t6), t8
- 13: PUTL t8, R11
- 14: INCEIPL $4
-
- 0x25478808: 56280006 rlwinm r8,r17,0,0,3
- 15: GETL R17, t10
- 16: ANDL $0xF0000000, t10
- 17: PUTL t10, R8
- 18: INCEIPL $4
-
- 0x2547880C: 2F8B0000 cmpi cr7,r11,0
- 19: GETL R11, t12
- 20: CMP0L t12, t14 (-rSo)
- 21: ICRFL t14, $0x7, CR
- 22: INCEIPL $4
-
- 0x25478810: 7E274278 xor r7,r17,r8
- 23: GETL R17, t16
- 24: GETL R8, t18
- 25: XORL t16, t18
- 26: PUTL t18, R7
- 27: INCEIPL $4
-
- 0x25478814: 5509463E rlwinm r9,r8,8,24,31
- 28: GETL R8, t20
- 29: SHRL $0x18, t20
- 30: PUTL t20, R9
- 31: INCEIPL $4
-
- 0x25478818: 7CFC4A78 xor r28,r7,r9
- 32: GETL R7, t22
- 33: GETL R9, t24
- 34: XORL t22, t24
- 35: PUTL t24, R28
- 36: INCEIPL $4
-
- 0x2547881C: 4BFFFFDC b 0x254787F8
- 37: JMPo $0x254787F8 ($4)
-
-
-. 0 254787FC 36
-. 57 92 20 36 7E 32 5A 14 8D 6A 00 01 56 28 00 06 2F 8B 00 00 7E 27 42 78 55 09 46 3E 7C FC 4A 78 4B FF FF DC
-
-==== BB 1103 (0x254787F8) approx BBs exec'd 0 ====
-
- 0x254787F8: 41BEFE4C bc 13,30,0x25478644
- 0: Js30o $0x25478644
-
-
-. 0 254787F8 4
-. 41 BE FE 4C
-
-==== BB 1104 (0x25478324) approx BBs exec'd 0 ====
-
- 0x25478324: 8101007C lwz r8,124(r1)
- 0: GETL R1, t0
- 1: ADDL $0x7C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x25478328: 71000001 andi. r0,r8,0x1
- 5: GETL R8, t4
- 6: ANDL $0x1, t4
- 7: PUTL t4, R0
- 8: CMP0L t4, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x2547832C: 40A2FFC4 bc 5,2,0x254782F0
- 11: Jc02o $0x254782F0
-
-
-. 0 25478324 12
-. 81 01 00 7C 71 00 00 01 40 A2 FF C4
-
-==== BB 1105 (0x254782E0) approx BBs exec'd 0 ====
-
- 0x254782E0: 88DD000C lbz r6,12(r29)
- 0: GETL R29, t0
- 1: ADDL $0xC, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x254782E4: 54C5073E rlwinm r5,r6,0,28,31
- 5: GETL R6, t4
- 6: ANDL $0xF, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x254782E8: 2F050006 cmpi cr6,r5,6
- 9: GETL R5, t6
- 10: MOVL $0x6, t10
- 11: CMPL t6, t10, t8 (-rSo)
- 12: ICRFL t8, $0x6, CR
- 13: INCEIPL $4
-
- 0x254782EC: 419A002C bc 12,26,0x25478318
- 14: Js26o $0x25478318
-
-
-. 0 254782E0 16
-. 88 DD 00 0C 54 C5 07 3E 2F 05 00 06 41 9A 00 2C
-
-==== BB 1106 (0x25479EE4) approx BBs exec'd 0 ====
-
- 0x25479EE4: 7D200026 mfcr r9
- 0: GETL CR, t0
- 1: PUTL t0, R9
- 2: INCEIPL $4
-
- 0x25479EE8: 55299FFE rlwinm r9,r9,19,31,31
- 3: GETL R9, t2
- 4: ROLL $0x13, t2
- 5: ANDL $0x1, t2
- 6: PUTL t2, R9
- 7: INCEIPL $4
-
- 0x25479EEC: 39600000 li r11,0
- 8: MOVL $0x0, t4
- 9: PUTL t4, R11
- 10: INCEIPL $4
-
- 0x25479EF0: 7CA00026 mfcr r5
- 11: GETL CR, t6
- 12: PUTL t6, R5
- 13: INCEIPL $4
-
- 0x25479EF4: 54A53FFE rlwinm r5,r5,7,31,31
- 14: GETL R5, t8
- 15: ROLL $0x7, t8
- 16: ANDL $0x1, t8
- 17: PUTL t8, R5
- 18: INCEIPL $4
-
- 0x25479EF8: 7D282B79 or. r8,r9,r5
- 19: GETL R9, t10
- 20: GETL R5, t12
- 21: ORL t12, t10
- 22: PUTL t10, R8
- 23: CMP0L t10, t14 (-rSo)
- 24: ICRFL t14, $0x0, CR
- 25: INCEIPL $4
-
- 0x25479EFC: 40820058 bc 4,2,0x25479F54
- 26: Jc02o $0x25479F54
-
-
-. 0 25479EE4 28
-. 7D 20 00 26 55 29 9F FE 39 60 00 00 7C A0 00 26 54 A5 3F FE 7D 28 2B 79 40 82 00 58
-
-==== BB 1107 (0x25479F00) approx BBs exec'd 0 ====
-
- 0x25479F00: 381DFFBC addi r0,r29,-68
- 0: GETL R29, t0
- 1: ADDL $0xFFFFFFBC, t0
- 2: PUTL t0, R0
- 3: INCEIPL $4
-
- 0x25479F04: 6BA30002 xori r3,r29,0x2
- 4: GETL R29, t2
- 5: XORL $0x2, t2
- 6: PUTL t2, R3
- 7: INCEIPL $4
-
- 0x25479F08: 21030000 subfic r8,r3,0
- 8: GETL R3, t4
- 9: MOVL $0x0, t6
- 10: SBBL t4, t6 (-wCa)
- 11: PUTL t6, R8
- 12: INCEIPL $4
-
- 0x25479F0C: 7C681914 adde r3,r8,r3
- 13: GETL R8, t8
- 14: GETL R3, t10
- 15: ADCL t8, t10 (-rCa-wCa)
- 16: PUTL t10, R3
- 17: INCEIPL $4
-
- 0x25479F10: 2180000A subfic r12,r0,10
- 18: GETL R0, t12
- 19: MOVL $0xA, t14
- 20: SBBL t12, t14 (-wCa)
- 21: PUTL t14, R12
- 22: INCEIPL $4
-
- 0x25479F14: 39800000 li r12,0
- 23: MOVL $0x0, t16
- 24: PUTL t16, R12
- 25: INCEIPL $4
-
- 0x25479F18: 7D8C6114 adde r12,r12,r12
- 26: GETL R12, t18
- 27: GETL R12, t20
- 28: ADCL t18, t20 (-rCa-wCa)
- 29: PUTL t20, R12
- 30: INCEIPL $4
-
- 0x25479F1C: 7D881B79 or. r8,r12,r3
- 31: GETL R12, t22
- 32: GETL R3, t24
- 33: ORL t24, t22
- 34: PUTL t22, R8
- 35: CMP0L t22, t26 (-rSo)
- 36: ICRFL t26, $0x0, CR
- 37: INCEIPL $4
-
- 0x25479F20: 40820034 bc 4,2,0x25479F54
- 38: Jc02o $0x25479F54
-
-
-. 0 25479F00 36
-. 38 1D FF BC 6B A3 00 02 21 03 00 00 7C 68 19 14 21 80 00 0A 39 80 00 00 7D 8C 61 14 7D 88 1B 79 40 82 00 34
-
-==== BB 1108 (0x25479F24) approx BBs exec'd 0 ====
-
- 0x25479F24: 2F1D0013 cmpi cr6,r29,19
- 0: GETL R29, t0
- 1: MOVL $0x13, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x6, CR
- 4: INCEIPL $4
-
- 0x25479F28: 8124020C lwz r9,524(r4)
- 5: GETL R4, t6
- 6: ADDL $0x20C, t6
- 7: LDL (t6), t8
- 8: PUTL t8, R9
- 9: INCEIPL $4
-
- 0x25479F2C: 419A00B4 bc 12,26,0x25479FE0
- 10: Js26o $0x25479FE0
-
-
-. 0 25479F24 12
-. 2F 1D 00 13 81 24 02 0C 41 9A 00 B4
-
-==== BB 1109 (0x25479F30) approx BBs exec'd 0 ====
-
- 0x25479F30: 7F8B4800 cmp cr7,r11,r9
- 0: GETL R11, t0
- 1: GETL R9, t2
- 2: CMPL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x7, CR
- 4: INCEIPL $4
-
- 0x25479F34: 409EF988 bc 4,30,0x254798BC
- 5: Jc30o $0x254798BC
-
-
-. 0 25479F30 8
-. 7F 8B 48 00 40 9E F9 88
-
-==== BB 1110 (0x25479F38) approx BBs exec'd 0 ====
-
- 0x25479F38: 817001AC lwz r11,428(r16)
- 0: GETL R16, t0
- 1: ADDL $0x1AC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25479F3C: 80C40214 lwz r6,532(r4)
- 5: GETL R4, t4
- 6: ADDL $0x214, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R6
- 9: INCEIPL $4
-
- 0x25479F40: 83440210 lwz r26,528(r4)
- 10: GETL R4, t8
- 11: ADDL $0x210, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R26
- 14: INCEIPL $4
-
- 0x25479F44: 394B0001 addi r10,r11,1
- 15: GETL R11, t12
- 16: ADDL $0x1, t12
- 17: PUTL t12, R10
- 18: INCEIPL $4
-
- 0x25479F48: 915001AC stw r10,428(r16)
- 19: GETL R10, t14
- 20: GETL R16, t16
- 21: ADDL $0x1AC, t16
- 22: STL t14, (t16)
- 23: INCEIPL $4
-
- 0x25479F4C: 90DF0050 stw r6,80(r31)
- 24: GETL R6, t18
- 25: GETL R31, t20
- 26: ADDL $0x50, t20
- 27: STL t18, (t20)
- 28: INCEIPL $4
-
- 0x25479F50: 4BFFFA24 b 0x25479974
- 29: JMPo $0x25479974 ($4)
-
-
-. 0 25479F38 28
-. 81 70 01 AC 80 C4 02 14 83 44 02 10 39 4B 00 01 91 50 01 AC 90 DF 00 50 4B FF FA 24
-
-==== BB 1111 (0x25479974) approx BBs exec'd 0 ====
-
- 0x25479974: 2F060000 cmpi cr6,r6,0
- 0: GETL R6, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x25479978: 39200000 li r9,0
- 4: MOVL $0x0, t4
- 5: PUTL t4, R9
- 6: INCEIPL $4
-
- 0x2547997C: 419A0010 bc 12,26,0x2547998C
- 7: Js26o $0x2547998C
-
-
-. 0 25479974 12
-. 2F 06 00 00 39 20 00 00 41 9A 00 10
-
-==== BB 1112 (0x254799A8) approx BBs exec'd 0 ====
-
- 0x254799A8: 2C1D0014 cmpi cr0,r29,20
- 0: GETL R29, t0
- 1: MOVL $0x14, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x254799AC: 418200E4 bc 12,2,0x25479A90
- 5: Js02o $0x25479A90
-
-
-. 0 254799A8 8
-. 2C 1D 00 14 41 82 00 E4
-
-==== BB 1113 (0x25479EBC) approx BBs exec'd 0 ====
-
- 0x25479EBC: A11B000E lhz r8,14(r27)
- 0: GETL R27, t0
- 1: ADDL $0xE, t0
- 2: LDW (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x25479EC0: 2F880000 cmpi cr7,r8,0
- 5: GETL R8, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x25479EC4: 41BEF9D0 bc 13,30,0x25479894
- 9: Js30o $0x25479894
-
-
-. 0 25479EBC 12
-. A1 1B 00 0E 2F 88 00 00 41 BE F9 D0
-
-==== BB 1114 (0x25479A50) approx BBs exec'd 0 ====
-
- 0x25479A50: 835F000C lwz r26,12(r31)
- 0: GETL R31, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0x25479A54: 4BFFFF20 b 0x25479974
- 5: JMPo $0x25479974 ($4)
-
-
-. 0 25479A50 8
-. 83 5F 00 0C 4B FF FF 20
-
-==== BB 1115 (0x25479A98) approx BBs exec'd 0 ====
-
- 0x25479A98: 2F1A0000 cmpi cr6,r26,0
- 0: GETL R26, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x25479A9C: 41BAFF30 bc 13,26,0x254799CC
- 4: Js26o $0x254799CC
-
-
-. 0 25479A98 8
-. 2F 1A 00 00 41 BA FF 30
-
-==== BB 1116 (0x25479AA0) approx BBs exec'd 0 ====
-
- 0x25479AA0: 837A0230 lwz r27,560(r26)
- 0: GETL R26, t0
- 1: ADDL $0x230, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R27
- 4: INCEIPL $4
-
- 0x25479AA4: 93770000 stw r27,0(r23)
- 5: GETL R27, t4
- 6: GETL R23, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0x25479AA8: 4BFFFF24 b 0x254799CC
- 9: JMPo $0x254799CC ($4)
-
-
-. 0 25479AA0 12
-. 83 7A 02 30 93 77 00 00 4B FF FF 24
-
-==== BB 1117 (0x25479A6C) approx BBs exec'd 0 ====
-
- 0x25479A6C: 2C9D0049 cmpi cr1,r29,73
- 0: GETL R29, t0
- 1: MOVL $0x49, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0x25479A70: 41860238 bc 12,6,0x25479CA8
- 5: Js06o $0x25479CA8
-
-
-. 0 25479A6C 8
-. 2C 9D 00 49 41 86 02 38
-
-==== BB 1118 (0x25479CA8) approx BBs exec'd 0 ====
-
- 0x25479CA8: 2C1A0000 cmpi cr0,r26,0
- 0: GETL R26, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0x25479CAC: 41A2FD20 bc 13,2,0x254799CC
- 4: Js02o $0x254799CC
-
-
-. 0 25479CA8 8
-. 2C 1A 00 00 41 A2 FD 20
-
-==== BB 1119 (0x25479CB0) approx BBs exec'd 0 ====
-
- 0x25479CB0: 817A022C lwz r11,556(r26)
- 0: GETL R26, t0
- 1: ADDL $0x22C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25479CB4: 2C8BFFFF cmpi cr1,r11,-1
- 5: GETL R11, t4
- 6: MOVL $0xFFFFFFFF, t8
- 7: CMPL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x1, CR
- 9: INCEIPL $4
-
- 0x25479CB8: 4186034C bc 12,6,0x2547A004
- 10: Js06o $0x2547A004
-
-
-. 0 25479CB0 12
-. 81 7A 02 2C 2C 8B FF FF 41 86 03 4C
-
-==== BB 1120 (0x25479CBC) approx BBs exec'd 0 ====
-
- 0x25479CBC: 83460004 lwz r26,4(r6)
- 0: GETL R6, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0x25479CC0: 7D8BD214 add r12,r11,r26
- 5: GETL R11, t4
- 6: GETL R26, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R12
- 9: INCEIPL $4
-
- 0x25479CC4: 7C6C0214 add r3,r12,r0
- 10: GETL R12, t8
- 11: GETL R0, t10
- 12: ADDL t8, t10
- 13: PUTL t10, R3
- 14: INCEIPL $4
-
- 0x25479CC8: 39239000 addi r9,r3,-28672
- 15: GETL R3, t12
- 16: ADDL $0xFFFF9000, t12
- 17: PUTL t12, R9
- 18: INCEIPL $4
-
- 0x25479CCC: 91370000 stw r9,0(r23)
- 19: GETL R9, t14
- 20: GETL R23, t16
- 21: STL t14, (t16)
- 22: INCEIPL $4
-
- 0x25479CD0: 4BFFFCFC b 0x254799CC
- 23: JMPo $0x254799CC ($4)
-
-
-. 0 25479CBC 24
-. 83 46 00 04 7D 8B D2 14 7C 6C 02 14 39 23 90 00 91 37 00 00 4B FF FC FC
-
-==== BB 1121 (0x254783C4) approx BBs exec'd 0 ====
-
- 0x254783C4: 2C000002 cmpi cr0,r0,2
- 0: GETL R0, t0
- 1: MOVL $0x2, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x254783C8: 41820164 bc 12,2,0x2547852C
- 5: Js02o $0x2547852C
-
-
-. 0 254783C4 8
-. 2C 00 00 02 41 82 01 64
-
-==== BB 1122 (0x2547852C) approx BBs exec'd 0 ====
-
- 0x2547852C: 829E04F4 lwz r20,1268(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4F4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R20
- 4: INCEIPL $4
-
- 0x25478530: 82740030 lwz r19,48(r20)
- 5: GETL R20, t4
- 6: ADDL $0x30, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R19
- 9: INCEIPL $4
-
- 0x25478534: 2C930000 cmpi cr1,r19,0
- 10: GETL R19, t8
- 11: CMP0L t8, t10 (-rSo)
- 12: ICRFL t10, $0x1, CR
- 13: INCEIPL $4
-
- 0x25478538: 40860018 bc 4,6,0x25478550
- 14: Jc06o $0x25478550
-
-
-. 0 2547852C 16
-. 82 9E 04 F4 82 74 00 30 2C 93 00 00 40 86 00 18
-
-==== BB 1123 (0x254783F0) approx BBs exec'd 0 ====
-
- 0x254783F0: 7F84E378 or r4,r28,r28
- 0: GETL R28, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x254783F4: 480042E1 bl 0x2547C6D4
- 3: MOVL $0x254783F8, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x2547C6D4 ($4)
-
-
-. 0 254783F0 8
-. 7F 84 E3 78 48 00 42 E1
-
-==== BB 1124 (0x254783F8) approx BBs exec'd 0 ====
-
- 0x254783F8: 2F030000 cmpi cr6,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x254783FC: 419AFE44 bc 12,26,0x25478240
- 4: Js26o $0x25478240
-
-
-. 0 254783F8 8
-. 2F 03 00 00 41 9A FE 44
-
-==== BB 1125 (0x25479938) approx BBs exec'd 0 ====
-
- 0x25479938: 80DF0050 lwz r6,80(r31)
- 0: GETL R31, t0
- 1: ADDL $0x50, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x2547993C: 7D695B78 or r9,r11,r11
- 5: GETL R11, t4
- 6: PUTL t4, R9
- 7: INCEIPL $4
-
- 0x25479940: 815F0008 lwz r10,8(r31)
- 8: GETL R31, t6
- 9: ADDL $0x8, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R10
- 12: INCEIPL $4
-
- 0x25479944: 80A60000 lwz r5,0(r6)
- 13: GETL R6, t10
- 14: LDL (t10), t12
- 15: PUTL t12, R5
- 16: INCEIPL $4
-
- 0x25479948: 80DF0010 lwz r6,16(r31)
- 17: GETL R31, t14
- 18: ADDL $0x10, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R6
- 21: INCEIPL $4
-
- 0x2547994C: 7C655214 add r3,r5,r10
- 22: GETL R5, t18
- 23: GETL R10, t20
- 24: ADDL t18, t20
- 25: PUTL t20, R3
- 26: INCEIPL $4
-
- 0x25479950: 38BF0050 addi r5,r31,80
- 27: GETL R31, t22
- 28: ADDL $0x50, t22
- 29: PUTL t22, R5
- 30: INCEIPL $4
-
- 0x25479954: 39400000 li r10,0
- 31: MOVL $0x0, t24
- 32: PUTL t24, R10
- 33: INCEIPL $4
-
- 0x25479958: 4BFFEC4D bl 0x254785A4
- 34: MOVL $0x2547995C, t26
- 35: PUTL t26, LR
- 36: JMPo-c $0x254785A4 ($4)
-
-
-. 0 25479938 36
-. 80 DF 00 50 7D 69 5B 78 81 5F 00 08 80 A6 00 00 80 DF 00 10 7C 65 52 14 38 BF 00 50 39 40 00 00 4B FF EC 4D
-
-==== BB 1126 (0x25478424) approx BBs exec'd 0 ====
-
- 0x25478424: 38600000 li r3,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25478428: 81E10074 lwz r15,116(r1)
- 3: GETL R1, t2
- 4: ADDL $0x74, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R15
- 7: INCEIPL $4
-
- 0x2547842C: 81810024 lwz r12,36(r1)
- 8: GETL R1, t6
- 9: ADDL $0x24, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R12
- 12: INCEIPL $4
-
- 0x25478430: 7DE803A6 mtlr r15
- 13: GETL R15, t10
- 14: PUTL t10, LR
- 15: INCEIPL $4
-
- 0x25478434: 81C10028 lwz r14,40(r1)
- 16: GETL R1, t12
- 17: ADDL $0x28, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R14
- 20: INCEIPL $4
-
- 0x25478438: 81E1002C lwz r15,44(r1)
- 21: GETL R1, t16
- 22: ADDL $0x2C, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R15
- 25: INCEIPL $4
-
- 0x2547843C: 7D818120 mtcrf 0x18,r12
- 26: GETL R12, t20
- 27: ICRFL t20, $0x3, CR
- 28: ICRFL t20, $0x4, CR
- 29: INCEIPL $4
-
- 0x25478440: 82010030 lwz r16,48(r1)
- 30: GETL R1, t22
- 31: ADDL $0x30, t22
- 32: LDL (t22), t24
- 33: PUTL t24, R16
- 34: INCEIPL $4
-
- 0x25478444: 82210034 lwz r17,52(r1)
- 35: GETL R1, t26
- 36: ADDL $0x34, t26
- 37: LDL (t26), t28
- 38: PUTL t28, R17
- 39: INCEIPL $4
-
- 0x25478448: 82410038 lwz r18,56(r1)
- 40: GETL R1, t30
- 41: ADDL $0x38, t30
- 42: LDL (t30), t32
- 43: PUTL t32, R18
- 44: INCEIPL $4
-
- 0x2547844C: 8261003C lwz r19,60(r1)
- 45: GETL R1, t34
- 46: ADDL $0x3C, t34
- 47: LDL (t34), t36
- 48: PUTL t36, R19
- 49: INCEIPL $4
-
- 0x25478450: 82810040 lwz r20,64(r1)
- 50: GETL R1, t38
- 51: ADDL $0x40, t38
- 52: LDL (t38), t40
- 53: PUTL t40, R20
- 54: INCEIPL $4
-
- 0x25478454: 82A10044 lwz r21,68(r1)
- 55: GETL R1, t42
- 56: ADDL $0x44, t42
- 57: LDL (t42), t44
- 58: PUTL t44, R21
- 59: INCEIPL $4
-
- 0x25478458: 82C10048 lwz r22,72(r1)
- 60: GETL R1, t46
- 61: ADDL $0x48, t46
- 62: LDL (t46), t48
- 63: PUTL t48, R22
- 64: INCEIPL $4
-
- 0x2547845C: 82E1004C lwz r23,76(r1)
- 65: GETL R1, t50
- 66: ADDL $0x4C, t50
- 67: LDL (t50), t52
- 68: PUTL t52, R23
- 69: INCEIPL $4
-
- 0x25478460: 83010050 lwz r24,80(r1)
- 70: GETL R1, t54
- 71: ADDL $0x50, t54
- 72: LDL (t54), t56
- 73: PUTL t56, R24
- 74: INCEIPL $4
-
- 0x25478464: 83210054 lwz r25,84(r1)
- 75: GETL R1, t58
- 76: ADDL $0x54, t58
- 77: LDL (t58), t60
- 78: PUTL t60, R25
- 79: INCEIPL $4
-
- 0x25478468: 83410058 lwz r26,88(r1)
- 80: GETL R1, t62
- 81: ADDL $0x58, t62
- 82: LDL (t62), t64
- 83: PUTL t64, R26
- 84: INCEIPL $4
-
- 0x2547846C: 8361005C lwz r27,92(r1)
- 85: GETL R1, t66
- 86: ADDL $0x5C, t66
- 87: LDL (t66), t68
- 88: PUTL t68, R27
- 89: INCEIPL $4
-
- 0x25478470: 83810060 lwz r28,96(r1)
- 90: GETL R1, t70
- 91: ADDL $0x60, t70
- 92: LDL (t70), t72
- 93: PUTL t72, R28
- 94: INCEIPL $4
-
- 0x25478474: 83A10064 lwz r29,100(r1)
- 95: GETL R1, t74
- 96: ADDL $0x64, t74
- 97: LDL (t74), t76
- 98: PUTL t76, R29
- 99: INCEIPL $4
-
- 0x25478478: 83C10068 lwz r30,104(r1)
- 100: GETL R1, t78
- 101: ADDL $0x68, t78
- 102: LDL (t78), t80
- 103: PUTL t80, R30
- 104: INCEIPL $4
-
- 0x2547847C: 83E1006C lwz r31,108(r1)
- 105: GETL R1, t82
- 106: ADDL $0x6C, t82
- 107: LDL (t82), t84
- 108: PUTL t84, R31
- 109: INCEIPL $4
-
- 0x25478480: 38210070 addi r1,r1,112
- 110: GETL R1, t86
- 111: ADDL $0x70, t86
- 112: PUTL t86, R1
- 113: INCEIPL $4
-
- 0x25478484: 4E800020 blr
- 114: GETL LR, t88
- 115: JMPo-r t88 ($4)
-
-
-. 0 25478424 100
-. 38 60 00 00 81 E1 00 74 81 81 00 24 7D E8 03 A6 81 C1 00 28 81 E1 00 2C 7D 81 81 20 82 01 00 30 82 21 00 34 82 41 00 38 82 61 00 3C 82 81 00 40 82 A1 00 44 82 C1 00 48 82 E1 00 4C 83 01 00 50 83 21 00 54 83 41 00 58 83 61 00 5C 83 81 00 60 83 A1 00 64 83 C1 00 68 83 E1 00 6C 38 21 00 70 4E 80 00 20
-
-==== BB 1127 (0x254786BC) approx BBs exec'd 0 ====
-
- 0x254786BC: 4180016C bc 12,0,0x25478828
- 0: Js00o $0x25478828
-
-
-. 0 254786BC 4
-. 41 80 01 6C
-
-==== BB 1128 (0x254786C0) approx BBs exec'd 0 ====
-
- 0x254786C0: 84FD0004 lwzu r7,4(r29)
- 0: GETL R29, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R29
- 3: LDL (t0), t2
- 4: PUTL t2, R7
- 5: INCEIPL $4
-
- 0x254786C4: 2F070000 cmpi cr6,r7,0
- 6: GETL R7, t4
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x6, CR
- 9: INCEIPL $4
-
- 0x254786C8: 409AFFC4 bc 4,26,0x2547868C
- 10: Jc26o $0x2547868C
-
-
-. 0 254786C0 12
-. 84 FD 00 04 2F 07 00 00 40 9A FF C4
-
-==== BB 1129 (0x25478BD8) approx BBs exec'd 0 ====
-
- 0x25478BD8: 81360000 lwz r9,0(r22)
- 0: GETL R22, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0x25478BDC: 2C090000 cmpi cr0,r9,0
- 4: GETL R9, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x0, CR
- 7: INCEIPL $4
-
- 0x25478BE0: 408201B8 bc 4,2,0x25478D98
- 8: Jc02o $0x25478D98
-
-
-. 0 25478BD8 12
-. 81 36 00 00 2C 09 00 00 40 82 01 B8
-
-==== BB 1130 (0x25478D98) approx BBs exec'd 0 ====
-
- 0x25478D98: 8BA9000C lbz r29,12(r9)
- 0: GETL R9, t0
- 1: ADDL $0xC, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x25478D9C: 57BBE13E rlwinm r27,r29,28,4,31
- 5: GETL R29, t4
- 6: SHRL $0x4, t4
- 7: PUTL t4, R27
- 8: INCEIPL $4
-
- 0x25478DA0: 2C9B0002 cmpi cr1,r27,2
- 9: GETL R27, t6
- 10: MOVL $0x2, t10
- 11: CMPL t6, t10, t8 (-rSo)
- 12: ICRFL t8, $0x1, CR
- 13: INCEIPL $4
-
- 0x25478DA4: 4086FE40 bc 4,6,0x25478BE4
- 14: Jc06o $0x25478BE4
-
-
-. 0 25478D98 16
-. 8B A9 00 0C 57 BB E1 3E 2C 9B 00 02 40 86 FE 40
-
-==== BB 1131 (0x25478DA8) approx BBs exec'd 0 ====
-
- 0x25478DA8: 38600000 li r3,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25478DAC: 38000000 li r0,0
- 3: MOVL $0x0, t2
- 4: PUTL t2, R0
- 5: INCEIPL $4
-
- 0x25478DB0: 4BFFF990 b 0x25478740
- 6: JMPo $0x25478740 ($4)
-
-
-. 0 25478DA8 12
-. 38 60 00 00 38 00 00 00 4B FF F9 90
-
-==== BB 1132 (0x25478740) approx BBs exec'd 0 ====
-
- 0x25478740: 90160000 stw r0,0(r22)
- 0: GETL R0, t0
- 1: GETL R22, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0x25478744: 80E10000 lwz r7,0(r1)
- 4: GETL R1, t4
- 5: LDL (t4), t6
- 6: PUTL t6, R7
- 7: INCEIPL $4
-
- 0x25478748: 82C70004 lwz r22,4(r7)
- 8: GETL R7, t8
- 9: ADDL $0x4, t8
- 10: LDL (t8), t10
- 11: PUTL t10, R22
- 12: INCEIPL $4
-
- 0x2547874C: 8107FFC0 lwz r8,-64(r7)
- 13: GETL R7, t12
- 14: ADDL $0xFFFFFFC0, t12
- 15: LDL (t12), t14
- 16: PUTL t14, R8
- 17: INCEIPL $4
-
- 0x25478750: 7EC803A6 mtlr r22
- 18: GETL R22, t16
- 19: PUTL t16, LR
- 20: INCEIPL $4
-
- 0x25478754: 8227FFC4 lwz r17,-60(r7)
- 21: GETL R7, t18
- 22: ADDL $0xFFFFFFC4, t18
- 23: LDL (t18), t20
- 24: PUTL t20, R17
- 25: INCEIPL $4
-
- 0x25478758: 8247FFC8 lwz r18,-56(r7)
- 26: GETL R7, t22
- 27: ADDL $0xFFFFFFC8, t22
- 28: LDL (t22), t24
- 29: PUTL t24, R18
- 30: INCEIPL $4
-
- 0x2547875C: 7D008120 mtcrf 0x8,r8
- 31: GETL R8, t26
- 32: ICRFL t26, $0x4, CR
- 33: INCEIPL $4
-
- 0x25478760: 8267FFCC lwz r19,-52(r7)
- 34: GETL R7, t28
- 35: ADDL $0xFFFFFFCC, t28
- 36: LDL (t28), t30
- 37: PUTL t30, R19
- 38: INCEIPL $4
-
- 0x25478764: 8287FFD0 lwz r20,-48(r7)
- 39: GETL R7, t32
- 40: ADDL $0xFFFFFFD0, t32
- 41: LDL (t32), t34
- 42: PUTL t34, R20
- 43: INCEIPL $4
-
- 0x25478768: 82A7FFD4 lwz r21,-44(r7)
- 44: GETL R7, t36
- 45: ADDL $0xFFFFFFD4, t36
- 46: LDL (t36), t38
- 47: PUTL t38, R21
- 48: INCEIPL $4
-
- 0x2547876C: 82C7FFD8 lwz r22,-40(r7)
- 49: GETL R7, t40
- 50: ADDL $0xFFFFFFD8, t40
- 51: LDL (t40), t42
- 52: PUTL t42, R22
- 53: INCEIPL $4
-
- 0x25478770: 82E7FFDC lwz r23,-36(r7)
- 54: GETL R7, t44
- 55: ADDL $0xFFFFFFDC, t44
- 56: LDL (t44), t46
- 57: PUTL t46, R23
- 58: INCEIPL $4
-
- 0x25478774: 8307FFE0 lwz r24,-32(r7)
- 59: GETL R7, t48
- 60: ADDL $0xFFFFFFE0, t48
- 61: LDL (t48), t50
- 62: PUTL t50, R24
- 63: INCEIPL $4
-
- 0x25478778: 8327FFE4 lwz r25,-28(r7)
- 64: GETL R7, t52
- 65: ADDL $0xFFFFFFE4, t52
- 66: LDL (t52), t54
- 67: PUTL t54, R25
- 68: INCEIPL $4
-
- 0x2547877C: 8347FFE8 lwz r26,-24(r7)
- 69: GETL R7, t56
- 70: ADDL $0xFFFFFFE8, t56
- 71: LDL (t56), t58
- 72: PUTL t58, R26
- 73: INCEIPL $4
-
- 0x25478780: 8367FFEC lwz r27,-20(r7)
- 74: GETL R7, t60
- 75: ADDL $0xFFFFFFEC, t60
- 76: LDL (t60), t62
- 77: PUTL t62, R27
- 78: INCEIPL $4
-
- 0x25478784: 8387FFF0 lwz r28,-16(r7)
- 79: GETL R7, t64
- 80: ADDL $0xFFFFFFF0, t64
- 81: LDL (t64), t66
- 82: PUTL t66, R28
- 83: INCEIPL $4
-
- 0x25478788: 83A7FFF4 lwz r29,-12(r7)
- 84: GETL R7, t68
- 85: ADDL $0xFFFFFFF4, t68
- 86: LDL (t68), t70
- 87: PUTL t70, R29
- 88: INCEIPL $4
-
- 0x2547878C: 83C7FFF8 lwz r30,-8(r7)
- 89: GETL R7, t72
- 90: ADDL $0xFFFFFFF8, t72
- 91: LDL (t72), t74
- 92: PUTL t74, R30
- 93: INCEIPL $4
-
- 0x25478790: 83E7FFFC lwz r31,-4(r7)
- 94: GETL R7, t76
- 95: ADDL $0xFFFFFFFC, t76
- 96: LDL (t76), t78
- 97: PUTL t78, R31
- 98: INCEIPL $4
-
- 0x25478794: 7CE13B78 or r1,r7,r7
- 99: GETL R7, t80
- 100: PUTL t80, R1
- 101: INCEIPL $4
-
- 0x25478798: 4E800020 blr
- 102: GETL LR, t82
- 103: JMPo-r t82 ($4)
-
-
-. 0 25478740 92
-. 90 16 00 00 80 E1 00 00 82 C7 00 04 81 07 FF C0 7E C8 03 A6 82 27 FF C4 82 47 FF C8 7D 00 81 20 82 67 FF CC 82 87 FF D0 82 A7 FF D4 82 C7 FF D8 82 E7 FF DC 83 07 FF E0 83 27 FF E4 83 47 FF E8 83 67 FF EC 83 87 FF F0 83 A7 FF F4 83 C7 FF F8 83 E7 FF FC 7C E1 3B 78 4E 80 00 20
-
-==== BB 1133 (0x2547998C) approx BBs exec'd 0 ====
-
- 0x2547998C: 2F9D0044 cmpi cr7,r29,68
- 0: GETL R29, t0
- 1: MOVL $0x44, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0x25479990: 801C0008 lwz r0,8(r28)
- 5: GETL R28, t6
- 6: ADDL $0x8, t6
- 7: LDL (t6), t8
- 8: PUTL t8, R0
- 9: INCEIPL $4
-
- 0x25479994: 7D290214 add r9,r9,r0
- 10: GETL R9, t10
- 11: GETL R0, t12
- 12: ADDL t10, t12
- 13: PUTL t12, R9
- 14: INCEIPL $4
-
- 0x25479998: 419E0100 bc 12,30,0x25479A98
- 15: Js30o $0x25479A98
-
-
-. 0 2547998C 16
-. 2F 9D 00 44 80 1C 00 08 7D 29 02 14 41 9E 01 00
-
-==== BB 1134 (0x254784A0) approx BBs exec'd 0 ====
-
- 0x254784A0: 41AEFF18 bc 13,14,0x254783B8
- 0: Js14o $0x254783B8
-
-
-. 0 254784A0 4
-. 41 AE FF 18
-
-==== BB 1135 (0x254784A4) approx BBs exec'd 0 ====
-
- 0x254784A4: 80610014 lwz r3,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x254784A8: 5469FFFF rlwinm. r9,r3,31,31,31
- 5: GETL R3, t4
- 6: ROLL $0x1F, t4
- 7: ANDL $0x1, t4
- 8: PUTL t4, R9
- 9: CMP0L t4, t6 (-rSo)
- 10: ICRFL t6, $0x0, CR
- 11: INCEIPL $4
-
- 0x254784AC: 4182006C bc 12,2,0x25478518
- 12: Js02o $0x25478518
-
-
-. 0 254784A4 12
-. 80 61 00 14 54 69 FF FF 41 82 00 6C
-
-==== BB 1136 (0x25478518) approx BBs exec'd 0 ====
-
- 0x25478518: 57E9083C rlwinm r9,r31,1,0,30
- 0: GETL R31, t0
- 1: SHLL $0x1, t0
- 2: PUTL t0, R9
- 3: INCEIPL $4
-
- 0x2547851C: 7CC9B22E lhzx r6,r9,r22
- 4: GETL R22, t2
- 5: GETL R9, t4
- 6: ADDL t4, t2
- 7: LDW (t2), t6
- 8: PUTL t6, R6
- 9: INCEIPL $4
-
- 0x25478520: 54C5047E rlwinm r5,r6,0,17,31
- 10: GETL R6, t8
- 11: ANDL $0x7FFF, t8
- 12: PUTL t8, R5
- 13: INCEIPL $4
-
- 0x25478524: 2F850002 cmpi cr7,r5,2
- 14: GETL R5, t10
- 15: MOVL $0x2, t14
- 16: CMPL t10, t14, t12 (-rSo)
- 17: ICRFL t12, $0x7, CR
- 18: INCEIPL $4
-
- 0x25478528: 4BFFFF98 b 0x254784C0
- 19: JMPo $0x254784C0 ($4)
-
-
-. 0 25478518 20
-. 57 E9 08 3C 7C C9 B2 2E 54 C5 04 7E 2F 85 00 02 4B FF FF 98
-
-==== BB 1137 (0x254784C0) approx BBs exec'd 0 ====
-
- 0x254784C0: 40BDFEF8 bc 5,29,0x254783B8
- 0: Jc29o $0x254783B8
-
-
-. 0 254784C0 4
-. 40 BD FE F8
-
-==== BB 1138 (0x25479A04) approx BBs exec'd 0 ====
-
- 0x25479A04: 39000001 li r8,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R8
- 2: INCEIPL $4
-
- 0x25479A08: 4BFFFEF4 b 0x254798FC
- 3: JMPo $0x254798FC ($4)
-
-
-. 0 25479A04 8
-. 39 00 00 01 4B FF FE F4
-
-==== BB 1139 (0x254799B0) approx BBs exec'd 0 ====
-
- 0x254799B0: 7F45D378 or r5,r26,r26
- 0: GETL R26, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x254799B4: 7F67DB78 or r7,r27,r27
- 3: GETL R27, t2
- 4: PUTL t2, R7
- 5: INCEIPL $4
-
- 0x254799B8: 7EE8BB78 or r8,r23,r23
- 6: GETL R23, t4
- 7: PUTL t4, R8
- 8: INCEIPL $4
-
- 0x254799BC: 7FAAEB78 or r10,r29,r29
- 9: GETL R29, t6
- 10: PUTL t6, R10
- 11: INCEIPL $4
-
- 0x254799C0: 7EC3B378 or r3,r22,r22
- 12: GETL R22, t8
- 13: PUTL t8, R3
- 14: INCEIPL $4
-
- 0x254799C4: 7F84E378 or r4,r28,r28
- 15: GETL R28, t10
- 16: PUTL t10, R4
- 17: INCEIPL $4
-
- 0x254799C8: 480072E1 bl 0x25480CA8
- 18: MOVL $0x254799CC, t12
- 19: PUTL t12, LR
- 20: JMPo-c $0x25480CA8 ($4)
-
-
-. 0 254799B0 28
-. 7F 45 D3 78 7F 67 DB 78 7E E8 BB 78 7F AA EB 78 7E C3 B3 78 7F 84 E3 78 48 00 72 E1
-
-==== BB 1140 (0x25480FF0) approx BBs exec'd 0 ====
-
- 0x25480FF0: 3D3AFE00 addis r9,r26,-512
- 0: GETL R26, t0
- 1: ADDL $0xFE000000, t0
- 2: PUTL t0, R9
- 3: INCEIPL $4
-
- 0x25480FF4: 3D60FC00 lis r11,-1024
- 4: MOVL $0xFC000000, t2
- 5: PUTL t2, R11
- 6: INCEIPL $4
-
- 0x25480FF8: 38690003 addi r3,r9,3
- 7: GETL R9, t4
- 8: ADDL $0x3, t4
- 9: PUTL t4, R3
- 10: INCEIPL $4
-
- 0x25480FFC: 61600002 ori r0,r11,0x2
- 11: MOVL $0xFC000002, t6
- 12: PUTL t6, R0
- 13: INCEIPL $4
-
- 0x25481000: 7C030040 cmpl cr0,r3,r0
- 14: GETL R3, t8
- 15: GETL R0, t10
- 16: CMPUL t8, t10, t12 (-rSo)
- 17: ICRFL t12, $0x0, CR
- 18: INCEIPL $4
-
- 0x25481004: 40810194 bc 4,1,0x25481198
- 19: Jc01o $0x25481198
-
-
-. 0 25480FF0 24
-. 3D 3A FE 00 3D 60 FC 00 38 69 00 03 61 60 00 02 7C 03 00 40 40 81 01 94
-
-==== BB 1141 (0x25481198) approx BBs exec'd 0 ====
-
- 0x25481198: 81610008 lwz r11,8(r1)
- 0: GETL R1, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2548119C: 814B002C lwz r10,44(r11)
- 5: GETL R11, t4
- 6: ADDL $0x2C, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R10
- 9: INCEIPL $4
-
- 0x254811A0: 810A0004 lwz r8,4(r10)
- 10: GETL R10, t8
- 11: ADDL $0x4, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R8
- 14: INCEIPL $4
-
- 0x254811A4: 7CE82850 subf r7,r8,r5
- 15: GETL R8, t12
- 16: GETL R5, t14
- 17: SUBL t12, t14
- 18: PUTL t14, R7
- 19: INCEIPL $4
-
- 0x254811A8: 7CEA1670 srawi r10,r7,2
- 20: GETL R7, t16
- 21: SARL $0x2, t16 (-wCa)
- 22: PUTL t16, R10
- 23: INCEIPL $4
-
- 0x254811AC: 288A4011 cmpli cr1,r10,16401
- 24: GETL R10, t18
- 25: MOVL $0x4011, t22
- 26: CMPUL t18, t22, t20 (-rSo)
- 27: ICRFL t20, $0x1, CR
- 28: INCEIPL $4
-
- 0x254811B0: 418500A0 bc 12,5,0x25481250
- 29: Js05o $0x25481250
-
-
-. 0 25481198 28
-. 81 61 00 08 81 4B 00 2C 81 0A 00 04 7C E8 28 50 7C EA 16 70 28 8A 40 11 41 85 00 A0
-
-==== BB 1142 (0x254811B4) approx BBs exec'd 0 ====
-
- 0x254811B4: 816B0028 lwz r11,40(r11)
- 0: GETL R11, t0
- 1: ADDL $0x28, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x254811B8: 3C60AAAA lis r3,-21846
- 5: MOVL $0xAAAA0000, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x254811BC: 6060AAAB ori r0,r3,0xAAAB
- 8: MOVL $0xAAAAAAAB, t6
- 9: PUTL t6, R0
- 10: INCEIPL $4
-
- 0x254811C0: 3BAAFFEE addi r29,r10,-18
- 11: GETL R10, t8
- 12: ADDL $0xFFFFFFEE, t8
- 13: PUTL t8, R29
- 14: INCEIPL $4
-
- 0x254811C4: 83EB0004 lwz r31,4(r11)
- 15: GETL R11, t10
- 16: ADDL $0x4, t10
- 17: LDL (t10), t12
- 18: PUTL t12, R31
- 19: INCEIPL $4
-
- 0x254811C8: 57ABF87E rlwinm r11,r29,31,1,31
- 20: GETL R29, t14
- 21: SHRL $0x1, t14
- 22: PUTL t14, R11
- 23: INCEIPL $4
-
- 0x254811CC: 7F7F0016 mulhwu r27,r31,r0
- 24: GETL R31, t16
- 25: GETL R0, t18
- 26: UMULHL t16, t18
- 27: PUTL t18, R27
- 28: INCEIPL $4
-
- 0x254811D0: 577CE8FE rlwinm r28,r27,29,3,31
- 29: GETL R27, t20
- 30: SHRL $0x3, t20
- 31: PUTL t20, R28
- 32: INCEIPL $4
-
- 0x254811D4: 2B1C2000 cmpli cr6,r28,8192
- 33: GETL R28, t22
- 34: MOVL $0x2000, t26
- 35: CMPUL t22, t26, t24 (-rSo)
- 36: ICRFL t24, $0x6, CR
- 37: INCEIPL $4
-
- 0x254811D8: 5787083C rlwinm r7,r28,1,0,30
- 38: GETL R28, t28
- 39: SHLL $0x1, t28
- 40: PUTL t28, R7
- 41: INCEIPL $4
-
- 0x254811DC: 39270012 addi r9,r7,18
- 42: GETL R7, t30
- 43: ADDL $0x12, t30
- 44: PUTL t30, R9
- 45: INCEIPL $4
-
- 0x254811E0: 552C103A rlwinm r12,r9,2,0,29
- 46: GETL R9, t32
- 47: SHLL $0x2, t32
- 48: PUTL t32, R12
- 49: INCEIPL $4
-
- 0x254811E4: 7CCC4214 add r6,r12,r8
- 50: GETL R12, t34
- 51: GETL R8, t36
- 52: ADDL t34, t36
- 53: PUTL t36, R6
- 54: INCEIPL $4
-
- 0x254811E8: 40990014 bc 4,25,0x254811FC
- 55: Jc25o $0x254811FC
-
-
-. 0 254811B4 56
-. 81 6B 00 28 3C 60 AA AA 60 60 AA AB 3B AA FF EE 83 EB 00 04 57 AB F8 7E 7F 7F 00 16 57 7C E8 FE 2B 1C 20 00 57 87 08 3C 39 27 00 12 55 2C 10 3A 7C CC 42 14 40 99 00 14
-
-==== BB 1143 (0x254811FC) approx BBs exec'd 0 ====
-
- 0x254811FC: 1FEAFFFC mulli r31,r10,-4
- 0: GETL R10, t0
- 1: MULL $0xFFFFFFFC, t0
- 2: PUTL t0, R31
- 3: INCEIPL $4
-
- 0x25481200: 556C103A rlwinm r12,r11,2,0,29
- 4: GETL R11, t2
- 5: SHLL $0x2, t2
- 6: PUTL t2, R12
- 7: INCEIPL $4
-
- 0x25481204: 559B043E rlwinm r27,r12,0,16,31
- 8: GETL R12, t4
- 9: ANDL $0xFFFF, t4
- 10: PUTL t4, R27
- 11: INCEIPL $4
-
- 0x25481208: 7F4C312E stwx r26,r12,r6
- 12: GETL R6, t6
- 13: GETL R12, t8
- 14: ADDL t8, t6
- 15: GETL R26, t10
- 16: STL t10, (t6)
- 17: INCEIPL $4
-
- 0x2548120C: 3BBFFFFC addi r29,r31,-4
- 18: GETL R31, t12
- 19: ADDL $0xFFFFFFFC, t12
- 20: PUTL t12, R29
- 21: INCEIPL $4
-
- 0x25481210: 676A3960 oris r10,r27,0x3960
- 22: GETL R27, t14
- 23: ORL $0x39600000, t14
- 24: PUTL t14, R10
- 25: INCEIPL $4
-
- 0x25481214: 57BC01BA rlwinm r28,r29,0,6,29
- 26: GETL R29, t16
- 27: ANDL $0x3FFFFFC, t16
- 28: PUTL t16, R28
- 29: INCEIPL $4
-
- 0x25481218: 91450000 stw r10,0(r5)
- 30: GETL R10, t18
- 31: GETL R5, t20
- 32: STL t18, (t20)
- 33: INCEIPL $4
-
- 0x2548121C: 67874800 oris r7,r28,0x4800
- 34: GETL R28, t22
- 35: ORL $0x48000000, t22
- 36: PUTL t22, R7
- 37: INCEIPL $4
-
- 0x25481220: 94E50004 stwu r7,4(r5)
- 38: GETL R7, t24
- 39: GETL R5, t26
- 40: ADDL $0x4, t26
- 41: PUTL t26, R5
- 42: STL t24, (t26)
- 43: INCEIPL $4
-
- 0x25481224: 7C00286C dcbst r0,r5
- 44: INCEIPL $4
-
- 0x25481228: 7C0004AC sync
- 45: INCEIPL $4
-
- 0x2548122C: 80A1000C lwz r5,12(r1)
- 46: GETL R1, t28
- 47: ADDL $0xC, t28
- 48: LDL (t28), t30
- 49: PUTL t30, R5
- 50: INCEIPL $4
-
- 0x25481230: 39050004 addi r8,r5,4
- 51: GETL R5, t32
- 52: ADDL $0x4, t32
- 53: PUTL t32, R8
- 54: INCEIPL $4
-
- 0x25481234: 7C0047AC icbi r0,r8
- 55: GETL R8, t34
- 56: CALLM_So
- 57: PUSHL t34
- 58: CALLMo $0x68
- 59: CALLM_Eo
- 60: INCEIPL $4
-
- 0x25481238: 80A1000C lwz r5,12(r1)
- 61: GETL R1, t36
- 62: ADDL $0xC, t36
- 63: LDL (t36), t38
- 64: PUTL t38, R5
- 65: INCEIPL $4
-
- 0x2548123C: 4BFFFBC4 b 0x25480E00
- 66: JMPo $0x25480E00 ($4)
-
-
-. 0 254811FC 68
-. 1F EA FF FC 55 6C 10 3A 55 9B 04 3E 7F 4C 31 2E 3B BF FF FC 67 6A 39 60 57 BC 01 BA 91 45 00 00 67 87 48 00 94 E5 00 04 7C 00 28 6C 7C 00 04 AC 80 A1 00 0C 39 05 00 04 7C 00 47 AC 80 A1 00 0C 4B FF FB C4
-
-==== BB 1144 (0x254799D8) approx BBs exec'd 0 ====
-
- 0x254799D8: 83BF000C lwz r29,12(r31)
- 0: GETL R31, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x254799DC: 4BFFFD44 b 0x25479720
- 5: JMPo $0x25479720 ($4)
-
-
-. 0 254799D8 8
-. 83 BF 00 0C 4B FF FD 44
-
-==== BB 1145 (0x25479720) approx BBs exec'd 0 ====
-
- 0x25479720: 3652FFFF addic. r18,r18,-1
- 0: GETL R18, t0
- 1: ADCL $0xFFFFFFFF, t0 (-wCa)
- 2: PUTL t0, R18
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x25479724: 3AB5000C addi r21,r21,12
- 6: GETL R21, t4
- 7: ADDL $0xC, t4
- 8: PUTL t4, R21
- 9: INCEIPL $4
-
- 0x25479728: 4080FFC0 bc 4,0,0x254796E8
- 10: Jc00o $0x254796E8
-
-
-. 0 25479720 12
-. 36 52 FF FF 3A B5 00 0C 40 80 FF C0
-
-==== BB 1146 (0x254796E8) approx BBs exec'd 0 ====
-
- 0x254796E8: 80B50020 lwz r5,32(r21)
- 0: GETL R21, t0
- 1: ADDL $0x20, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x254796EC: 7FB6EB78 or r22,r29,r29
- 5: GETL R29, t4
- 6: PUTL t4, R22
- 7: INCEIPL $4
-
- 0x254796F0: 81750018 lwz r11,24(r21)
- 8: GETL R21, t6
- 9: ADDL $0x18, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R11
- 12: INCEIPL $4
-
- 0x254796F4: 2C050000 cmpi cr0,r5,0
- 13: GETL R5, t10
- 14: CMP0L t10, t12 (-rSo)
- 15: ICRFL t12, $0x0, CR
- 16: INCEIPL $4
-
- 0x254796F8: 8115001C lwz r8,28(r21)
- 17: GETL R21, t14
- 18: ADDL $0x1C, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R8
- 21: INCEIPL $4
-
- 0x254796FC: 7D695B78 or r9,r11,r11
- 22: GETL R11, t18
- 23: PUTL t18, R9
- 24: INCEIPL $4
-
- 0x25479700: 833D0000 lwz r25,0(r29)
- 25: GETL R29, t20
- 26: LDL (t20), t22
- 27: PUTL t22, R25
- 28: INCEIPL $4
-
- 0x25479704: 7F0B4214 add r24,r11,r8
- 29: GETL R11, t24
- 30: GETL R8, t26
- 31: ADDL t24, t26
- 32: PUTL t26, R24
- 33: INCEIPL $4
-
- 0x25479708: 418200BC bc 12,2,0x254797C4
- 34: Js02o $0x254797C4
-
-
-. 0 254796E8 36
-. 80 B5 00 20 7F B6 EB 78 81 75 00 18 2C 05 00 00 81 15 00 1C 7D 69 5B 78 83 3D 00 00 7F 0B 42 14 41 82 00 BC
-
-==== BB 1147 (0x2547970C) approx BBs exec'd 0 ====
-
- 0x2547970C: 7F8BC040 cmpl cr7,r11,r24
- 0: GETL R11, t0
- 1: GETL R24, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x7, CR
- 4: INCEIPL $4
-
- 0x25479710: 409C0010 bc 4,28,0x25479720
- 5: Jc28o $0x25479720
-
-
-. 0 2547970C 8
-. 7F 8B C0 40 40 9C 00 10
-
-==== BB 1148 (0x254797FC) approx BBs exec'd 0 ====
-
- 0x254797FC: 3B7001B8 addi r27,r16,440
- 0: GETL R16, t0
- 1: ADDL $0x1B8, t0
- 2: PUTL t0, R27
- 3: INCEIPL $4
-
- 0x25479800: 1CE9000C mulli r7,r9,12
- 4: GETL R9, t2
- 5: MULL $0xC, t2
- 6: PUTL t2, R7
- 7: INCEIPL $4
-
- 0x25479804: 7E1DD800 cmp cr4,r29,r27
- 8: GETL R29, t4
- 9: GETL R27, t6
- 10: CMPL t4, t6, t8 (-rSo)
- 11: ICRFL t8, $0x4, CR
- 12: INCEIPL $4
-
- 0x25479808: 7F8B3A14 add r28,r11,r7
- 13: GETL R11, t10
- 14: GETL R7, t12
- 15: ADDL t10, t12
- 16: PUTL t12, R28
- 17: INCEIPL $4
-
- 0x2547980C: 41920018 bc 12,18,0x25479824
- 18: Js18o $0x25479824
-
-
-. 0 254797FC 20
-. 3B 70 01 B8 1C E9 00 0C 7E 1D D8 00 7F 8B 3A 14 41 92 00 18
-
-==== BB 1149 (0x2547972C) approx BBs exec'd 0 ====
-
- 0x2547972C: 408E0710 bc 4,14,0x25479E3C
- 0: Jc14o $0x25479E3C
-
-
-. 0 2547972C 4
-. 40 8E 07 10
-
-==== BB 1150 (0x25479730) approx BBs exec'd 0 ====
-
- 0x25479730: 827D0180 lwz r19,384(r29)
- 0: GETL R29, t0
- 1: ADDL $0x180, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R19
- 4: INCEIPL $4
-
- 0x25479734: 2F910000 cmpi cr7,r17,0
- 5: GETL R17, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x25479738: 66722000 oris r18,r19,0x2000
- 9: GETL R19, t8
- 10: ORL $0x20000000, t8
- 11: PUTL t8, R18
- 12: INCEIPL $4
-
- 0x2547973C: 925D0180 stw r18,384(r29)
- 13: GETL R18, t10
- 14: GETL R29, t12
- 15: ADDL $0x180, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x25479740: 409E05C0 bc 4,30,0x25479D00
- 18: Jc30o $0x25479D00
-
-
-. 0 25479730 20
-. 82 7D 01 80 2F 91 00 00 66 72 20 00 92 5D 01 80 40 9E 05 C0
-
-==== BB 1151 (0x25479744) approx BBs exec'd 0 ====
-
- 0x25479744: 807F000C lwz r3,12(r31)
- 0: GETL R31, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0x25479748: 82A30238 lwz r21,568(r3)
- 5: GETL R3, t4
- 6: ADDL $0x238, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R21
- 9: INCEIPL $4
-
- 0x2547974C: 2F950000 cmpi cr7,r21,0
- 10: GETL R21, t8
- 11: CMP0L t8, t10 (-rSo)
- 12: ICRFL t10, $0x7, CR
- 13: INCEIPL $4
-
- 0x25479750: 409E02BC bc 4,30,0x25479A0C
- 14: Jc30o $0x25479A0C
-
-
-. 0 25479744 16
-. 80 7F 00 0C 82 A3 02 38 2F 95 00 00 40 9E 02 BC
-
-==== BB 1152 (0x25479A0C) approx BBs exec'd 0 ====
-
- 0x25479A0C: 4BFFFB1D bl 0x25479528
- 0: MOVL $0x25479A10, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x25479528 ($4)
-
-
-. 0 25479A0C 4
-. 4B FF FB 1D
-
-==== BB 1153 _dl_protect_relro(0x25479528) approx BBs exec'd 0 ====
-
- 0x25479528: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547952C: 7D8802A6 mflr r12
- 6: GETL LR, t4
- 7: PUTL t4, R12
- 8: INCEIPL $4
-
- 0x25479530: 4801DAD1 bl 0x25497000
- 9: MOVL $0x25479534, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 25479528 12
-. 94 21 FF F0 7D 88 02 A6 48 01 DA D1
-
-==== BB 1154 (0x25479534) approx BBs exec'd 0 ====
-
- 0x25479534: 93C10008 stw r30,8(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25479538: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x2547953C: 93E1000C stw r31,12(r1)
- 8: GETL R31, t6
- 9: GETL R1, t8
- 10: ADDL $0xC, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x25479540: 91810014 stw r12,20(r1)
- 13: GETL R12, t10
- 14: GETL R1, t12
- 15: ADDL $0x14, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x25479544: 7C7F1B78 or r31,r3,r3
- 18: GETL R3, t14
- 19: PUTL t14, R31
- 20: INCEIPL $4
-
- 0x25479548: 80A30000 lwz r5,0(r3)
- 21: GETL R3, t16
- 22: LDL (t16), t18
- 23: PUTL t18, R5
- 24: INCEIPL $4
-
- 0x2547954C: 813E04F4 lwz r9,1268(r30)
- 25: GETL R30, t20
- 26: ADDL $0x4F4, t20
- 27: LDL (t20), t22
- 28: PUTL t22, R9
- 29: INCEIPL $4
-
- 0x25479550: 81030234 lwz r8,564(r3)
- 30: GETL R3, t24
- 31: ADDL $0x234, t24
- 32: LDL (t24), t26
- 33: PUTL t26, R8
- 34: INCEIPL $4
-
- 0x25479554: 80E30238 lwz r7,568(r3)
- 35: GETL R3, t28
- 36: ADDL $0x238, t28
- 37: LDL (t28), t30
- 38: PUTL t30, R7
- 39: INCEIPL $4
-
- 0x25479558: 80C90004 lwz r6,4(r9)
- 40: GETL R9, t32
- 41: ADDL $0x4, t32
- 42: LDL (t32), t34
- 43: PUTL t34, R6
- 44: INCEIPL $4
-
- 0x2547955C: 7C654214 add r3,r5,r8
- 45: GETL R5, t36
- 46: GETL R8, t38
- 47: ADDL t36, t38
- 48: PUTL t38, R3
- 49: INCEIPL $4
-
- 0x25479560: 7C833A14 add r4,r3,r7
- 50: GETL R3, t40
- 51: GETL R7, t42
- 52: ADDL t40, t42
- 53: PUTL t42, R4
- 54: INCEIPL $4
-
- 0x25479564: 38A00001 li r5,1
- 55: MOVL $0x1, t44
- 56: PUTL t44, R5
- 57: INCEIPL $4
-
- 0x25479568: 7D4600D0 neg r10,r6
- 58: GETL R6, t46
- 59: NEGL t46
- 60: PUTL t46, R10
- 61: INCEIPL $4
-
- 0x2547956C: 7C605038 and r0,r3,r10
- 62: GETL R3, t48
- 63: GETL R10, t50
- 64: ANDL t48, t50
- 65: PUTL t50, R0
- 66: INCEIPL $4
-
- 0x25479570: 7C8B5038 and r11,r4,r10
- 67: GETL R4, t52
- 68: GETL R10, t54
- 69: ANDL t52, t54
- 70: PUTL t54, R11
- 71: INCEIPL $4
-
- 0x25479574: 7F805800 cmp cr7,r0,r11
- 72: GETL R0, t56
- 73: GETL R11, t58
- 74: CMPL t56, t58, t60 (-rSo)
- 75: ICRFL t60, $0x7, CR
- 76: INCEIPL $4
-
- 0x25479578: 7C030378 or r3,r0,r0
- 77: GETL R0, t62
- 78: PUTL t62, R3
- 79: INCEIPL $4
-
- 0x2547957C: 7C805850 subf r4,r0,r11
- 80: GETL R0, t64
- 81: GETL R11, t66
- 82: SUBL t64, t66
- 83: PUTL t66, R4
- 84: INCEIPL $4
-
- 0x25479580: 419E0010 bc 12,30,0x25479590
- 85: Js30o $0x25479590
-
-
-. 0 25479534 80
-. 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 91 81 00 14 7C 7F 1B 78 80 A3 00 00 81 3E 04 F4 81 03 02 34 80 E3 02 38 80 C9 00 04 7C 65 42 14 7C 83 3A 14 38 A0 00 01 7D 46 00 D0 7C 60 50 38 7C 8B 50 38 7F 80 58 00 7C 03 03 78 7C 80 58 50 41 9E 00 10
-
-==== BB 1155 (0x25479584) approx BBs exec'd 0 ====
-
- 0x25479584: 48009235 bl 0x254827B8
- 0: MOVL $0x25479588, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x254827B8 ($4)
-
-
-. 0 25479584 4
-. 48 00 92 35
-
-==== BB 1156 (0x25479588) approx BBs exec'd 0 ====
-
- 0x25479588: 2C030000 cmpi cr0,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0x2547958C: 4180001C bc 12,0,0x254795A8
- 4: Js00o $0x254795A8
-
-
-. 0 25479588 8
-. 2C 03 00 00 41 80 00 1C
-
-==== BB 1157 (0x25479590) approx BBs exec'd 0 ====
-
- 0x25479590: 81610014 lwz r11,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x25479594: 83C10008 lwz r30,8(r1)
- 5: GETL R1, t4
- 6: ADDL $0x8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R30
- 9: INCEIPL $4
-
- 0x25479598: 83E1000C lwz r31,12(r1)
- 10: GETL R1, t8
- 11: ADDL $0xC, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R31
- 14: INCEIPL $4
-
- 0x2547959C: 7D6803A6 mtlr r11
- 15: GETL R11, t12
- 16: PUTL t12, LR
- 17: INCEIPL $4
-
- 0x254795A0: 38210010 addi r1,r1,16
- 18: GETL R1, t14
- 19: ADDL $0x10, t14
- 20: PUTL t14, R1
- 21: INCEIPL $4
-
- 0x254795A4: 4E800020 blr
- 22: GETL LR, t16
- 23: JMPo-r t16 ($4)
-
-
-. 0 25479590 24
-. 81 61 00 14 83 C1 00 08 83 E1 00 0C 7D 68 03 A6 38 21 00 10 4E 80 00 20
-
-==== BB 1158 (0x25479A10) approx BBs exec'd 0 ====
-
- 0x25479A10: 4BFFFD44 b 0x25479754
- 0: JMPo $0x25479754 ($4)
-
-
-. 0 25479A10 4
-. 4B FF FD 44
-
-==== BB 1159 (0x25479754) approx BBs exec'd 0 ====
-
- 0x25479754: 80810000 lwz r4,0(r1)
- 0: GETL R1, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R4
- 3: INCEIPL $4
-
- 0x25479758: 83240004 lwz r25,4(r4)
- 4: GETL R4, t4
- 5: ADDL $0x4, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R25
- 8: INCEIPL $4
-
- 0x2547975C: 8184FFBC lwz r12,-68(r4)
- 9: GETL R4, t8
- 10: ADDL $0xFFFFFFBC, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R12
- 13: INCEIPL $4
-
- 0x25479760: 7F2803A6 mtlr r25
- 14: GETL R25, t12
- 15: PUTL t12, LR
- 16: INCEIPL $4
-
- 0x25479764: 8204FFC0 lwz r16,-64(r4)
- 17: GETL R4, t14
- 18: ADDL $0xFFFFFFC0, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R16
- 21: INCEIPL $4
-
- 0x25479768: 8224FFC4 lwz r17,-60(r4)
- 22: GETL R4, t18
- 23: ADDL $0xFFFFFFC4, t18
- 24: LDL (t18), t20
- 25: PUTL t20, R17
- 26: INCEIPL $4
-
- 0x2547976C: 7D818120 mtcrf 0x18,r12
- 27: GETL R12, t22
- 28: ICRFL t22, $0x3, CR
- 29: ICRFL t22, $0x4, CR
- 30: INCEIPL $4
-
- 0x25479770: 8244FFC8 lwz r18,-56(r4)
- 31: GETL R4, t24
- 32: ADDL $0xFFFFFFC8, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R18
- 35: INCEIPL $4
-
- 0x25479774: 8264FFCC lwz r19,-52(r4)
- 36: GETL R4, t28
- 37: ADDL $0xFFFFFFCC, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R19
- 40: INCEIPL $4
-
- 0x25479778: 8284FFD0 lwz r20,-48(r4)
- 41: GETL R4, t32
- 42: ADDL $0xFFFFFFD0, t32
- 43: LDL (t32), t34
- 44: PUTL t34, R20
- 45: INCEIPL $4
-
- 0x2547977C: 82A4FFD4 lwz r21,-44(r4)
- 46: GETL R4, t36
- 47: ADDL $0xFFFFFFD4, t36
- 48: LDL (t36), t38
- 49: PUTL t38, R21
- 50: INCEIPL $4
-
- 0x25479780: 82C4FFD8 lwz r22,-40(r4)
- 51: GETL R4, t40
- 52: ADDL $0xFFFFFFD8, t40
- 53: LDL (t40), t42
- 54: PUTL t42, R22
- 55: INCEIPL $4
-
- 0x25479784: 82E4FFDC lwz r23,-36(r4)
- 56: GETL R4, t44
- 57: ADDL $0xFFFFFFDC, t44
- 58: LDL (t44), t46
- 59: PUTL t46, R23
- 60: INCEIPL $4
-
- 0x25479788: 8304FFE0 lwz r24,-32(r4)
- 61: GETL R4, t48
- 62: ADDL $0xFFFFFFE0, t48
- 63: LDL (t48), t50
- 64: PUTL t50, R24
- 65: INCEIPL $4
-
- 0x2547978C: 8324FFE4 lwz r25,-28(r4)
- 66: GETL R4, t52
- 67: ADDL $0xFFFFFFE4, t52
- 68: LDL (t52), t54
- 69: PUTL t54, R25
- 70: INCEIPL $4
-
- 0x25479790: 8344FFE8 lwz r26,-24(r4)
- 71: GETL R4, t56
- 72: ADDL $0xFFFFFFE8, t56
- 73: LDL (t56), t58
- 74: PUTL t58, R26
- 75: INCEIPL $4
-
- 0x25479794: 8364FFEC lwz r27,-20(r4)
- 76: GETL R4, t60
- 77: ADDL $0xFFFFFFEC, t60
- 78: LDL (t60), t62
- 79: PUTL t62, R27
- 80: INCEIPL $4
-
- 0x25479798: 8384FFF0 lwz r28,-16(r4)
- 81: GETL R4, t64
- 82: ADDL $0xFFFFFFF0, t64
- 83: LDL (t64), t66
- 84: PUTL t66, R28
- 85: INCEIPL $4
-
- 0x2547979C: 83A4FFF4 lwz r29,-12(r4)
- 86: GETL R4, t68
- 87: ADDL $0xFFFFFFF4, t68
- 88: LDL (t68), t70
- 89: PUTL t70, R29
- 90: INCEIPL $4
-
- 0x254797A0: 83C4FFF8 lwz r30,-8(r4)
- 91: GETL R4, t72
- 92: ADDL $0xFFFFFFF8, t72
- 93: LDL (t72), t74
- 94: PUTL t74, R30
- 95: INCEIPL $4
-
- 0x254797A4: 83E4FFFC lwz r31,-4(r4)
- 96: GETL R4, t76
- 97: ADDL $0xFFFFFFFC, t76
- 98: LDL (t76), t78
- 99: PUTL t78, R31
- 100: INCEIPL $4
-
- 0x254797A8: 7C812378 or r1,r4,r4
- 101: GETL R4, t80
- 102: PUTL t80, R1
- 103: INCEIPL $4
-
- 0x254797AC: 4E800020 blr
- 104: GETL LR, t82
- 105: JMPo-r t82 ($4)
-
-
-. 0 25479754 92
-. 80 81 00 00 83 24 00 04 81 84 FF BC 7F 28 03 A6 82 04 FF C0 82 24 FF C4 7D 81 81 20 82 44 FF C8 82 64 FF CC 82 84 FF D0 82 A4 FF D4 82 C4 FF D8 82 E4 FF DC 83 04 FF E0 83 24 FF E4 83 44 FF E8 83 64 FF EC 83 84 FF F0 83 A4 FF F4 83 C4 FF F8 83 E4 FF FC 7C 81 23 78 4E 80 00 20
-
-==== BB 1160 (0x25480904) approx BBs exec'd 0 ====
-
- 0x25480904: 2F850000 cmpi cr7,r5,0
- 0: GETL R5, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x25480908: 3B9F0018 addi r28,r31,24
- 4: GETL R31, t4
- 5: ADDL $0x18, t4
- 6: PUTL t4, R28
- 7: INCEIPL $4
-
- 0x2548090C: 419E0264 bc 12,30,0x25480B70
- 8: Js30o $0x25480B70
-
-
-. 0 25480904 12
-. 2F 85 00 00 3B 9F 00 18 41 9E 02 64
-
-==== BB 1161 (0x25480B70) approx BBs exec'd 0 ====
-
- 0x25480B70: 831E04CC lwz r24,1228(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4CC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R24
- 4: INCEIPL $4
-
- 0x25480B74: 4BFFFDA0 b 0x25480914
- 5: JMPo $0x25480914 ($4)
-
-
-. 0 25480B70 8
-. 83 1E 04 CC 4B FF FD A0
-
-==== BB 1162 (0x25480914) approx BBs exec'd 0 ====
-
- 0x25480914: 409E02C0 bc 4,30,0x25480BD4
- 0: Jc30o $0x25480BD4
-
-
-. 0 25480914 4
-. 40 9E 02 C0
-
-==== BB 1163 (0x25480918) approx BBs exec'd 0 ====
-
- 0x25480918: 3C98FE00 addis r4,r24,-512
- 0: GETL R24, t0
- 1: ADDL $0xFE000000, t0
- 2: PUTL t0, R4
- 3: INCEIPL $4
-
- 0x2548091C: 3C00FC00 lis r0,-1024
- 4: MOVL $0xFC000000, t2
- 5: PUTL t2, R0
- 6: INCEIPL $4
-
- 0x25480920: 38640003 addi r3,r4,3
- 7: GETL R4, t4
- 8: ADDL $0x3, t4
- 9: PUTL t4, R3
- 10: INCEIPL $4
-
- 0x25480924: 60060002 ori r6,r0,0x2
- 11: MOVL $0xFC000002, t6
- 12: PUTL t6, R6
- 13: INCEIPL $4
-
- 0x25480928: 39800000 li r12,0
- 14: MOVL $0x0, t8
- 15: PUTL t8, R12
- 16: INCEIPL $4
-
- 0x2548092C: 7F033040 cmpl cr6,r3,r6
- 17: GETL R3, t10
- 18: GETL R6, t12
- 19: CMPUL t10, t12, t14 (-rSo)
- 20: ICRFL t14, $0x6, CR
- 21: INCEIPL $4
-
- 0x25480930: 618A8000 ori r10,r12,0x8000
- 22: MOVL $0x8000, t16
- 23: PUTL t16, R10
- 24: INCEIPL $4
-
- 0x25480934: 7CBA00D0 neg r5,r26
- 25: GETL R26, t18
- 26: NEGL t18
- 27: PUTL t18, R5
- 28: INCEIPL $4
-
- 0x25480938: 7D1A5050 subf r8,r26,r10
- 29: GETL R26, t20
- 30: GETL R10, t22
- 31: SUBL t20, t22
- 32: PUTL t22, R8
- 33: INCEIPL $4
-
- 0x2548093C: 54A9043E rlwinm r9,r5,0,16,31
- 34: GETL R5, t24
- 35: ANDL $0xFFFF, t24
- 36: PUTL t24, R9
- 37: INCEIPL $4
-
- 0x25480940: 5507843E rlwinm r7,r8,16,16,31
- 38: GETL R8, t26
- 39: SHRL $0x10, t26
- 40: PUTL t26, R7
- 41: INCEIPL $4
-
- 0x25480944: 3D60556C lis r11,21868
- 42: MOVL $0x556C0000, t28
- 43: PUTL t28, R11
- 44: INCEIPL $4
-
- 0x25480948: 3C807D6C lis r4,32108
- 45: MOVL $0x7D6C0000, t30
- 46: PUTL t30, R4
- 47: INCEIPL $4
-
- 0x2548094C: 64E03D6B oris r0,r7,0x3D6B
- 48: GETL R7, t32
- 49: ORL $0x3D6B0000, t32
- 50: PUTL t32, R0
- 51: INCEIPL $4
-
- 0x25480950: 6523396B oris r3,r9,0x396B
- 52: GETL R9, t34
- 53: ORL $0x396B0000, t34
- 54: PUTL t34, R3
- 55: INCEIPL $4
-
- 0x25480954: 6166083C ori r6,r11,0x83C
- 56: MOVL $0x556C083C, t36
- 57: PUTL t36, R6
- 58: INCEIPL $4
-
- 0x25480958: 608C5A14 ori r12,r4,0x5A14
- 59: MOVL $0x7D6C5A14, t38
- 60: PUTL t38, R12
- 61: INCEIPL $4
-
- 0x2548095C: 901C0000 stw r0,0(r28)
- 62: GETL R0, t40
- 63: GETL R28, t42
- 64: STL t40, (t42)
- 65: INCEIPL $4
-
- 0x25480960: 907C0004 stw r3,4(r28)
- 66: GETL R3, t44
- 67: GETL R28, t46
- 68: ADDL $0x4, t46
- 69: STL t44, (t46)
- 70: INCEIPL $4
-
- 0x25480964: 90DC0008 stw r6,8(r28)
- 71: GETL R6, t48
- 72: GETL R28, t50
- 73: ADDL $0x8, t50
- 74: STL t48, (t50)
- 75: INCEIPL $4
-
- 0x25480968: 919C000C stw r12,12(r28)
- 76: GETL R12, t52
- 77: GETL R28, t54
- 78: ADDL $0xC, t54
- 79: STL t52, (t54)
- 80: INCEIPL $4
-
- 0x2548096C: 4099020C bc 4,25,0x25480B78
- 81: Jc25o $0x25480B78
-
-
-. 0 25480918 88
-. 3C 98 FE 00 3C 00 FC 00 38 64 00 03 60 06 00 02 39 80 00 00 7F 03 30 40 61 8A 80 00 7C BA 00 D0 7D 1A 50 50 54 A9 04 3E 55 07 84 3E 3D 60 55 6C 3C 80 7D 6C 64 E0 3D 6B 65 23 39 6B 61 66 08 3C 60 8C 5A 14 90 1C 00 00 90 7C 00 04 90 DC 00 08 91 9C 00 0C 40 99 02 0C
-
-==== BB 1164 (0x25480B78) approx BBs exec'd 0 ====
-
- 0x25480B78: 3C980001 addis r4,r24,1
- 0: GETL R24, t0
- 1: ADDL $0x10000, t0
- 2: PUTL t0, R4
- 3: INCEIPL $4
-
- 0x25480B7C: 3C7D0001 addis r3,r29,1
- 4: GETL R29, t2
- 5: ADDL $0x10000, t2
- 6: PUTL t2, R3
- 7: INCEIPL $4
-
- 0x25480B80: 38C48000 addi r6,r4,-32768
- 8: GETL R4, t4
- 9: ADDL $0xFFFF8000, t4
- 10: PUTL t4, R6
- 11: INCEIPL $4
-
- 0x25480B84: 39838000 addi r12,r3,-32768
- 12: GETL R3, t6
- 13: ADDL $0xFFFF8000, t6
- 14: PUTL t6, R12
- 15: INCEIPL $4
-
- 0x25480B88: 54C9843E rlwinm r9,r6,16,16,31
- 16: GETL R6, t8
- 17: SHRL $0x10, t8
- 18: PUTL t8, R9
- 19: INCEIPL $4
-
- 0x25480B8C: 57A7043E rlwinm r7,r29,0,16,31
- 20: GETL R29, t10
- 21: ANDL $0xFFFF, t10
- 22: PUTL t10, R7
- 23: INCEIPL $4
-
- 0x25480B90: 5708043E rlwinm r8,r24,0,16,31
- 24: GETL R24, t12
- 25: ANDL $0xFFFF, t12
- 26: PUTL t12, R8
- 27: INCEIPL $4
-
- 0x25480B94: 558B843E rlwinm r11,r12,16,16,31
- 28: GETL R12, t14
- 29: SHRL $0x10, t14
- 30: PUTL t14, R11
- 31: INCEIPL $4
-
- 0x25480B98: 3D407D89 lis r10,32137
- 32: MOVL $0x7D890000, t16
- 33: PUTL t16, R10
- 34: INCEIPL $4
-
- 0x25480B9C: 3CA04E80 lis r5,20096
- 35: MOVL $0x4E800000, t18
- 36: PUTL t18, R5
- 37: INCEIPL $4
-
- 0x25480BA0: 65183980 oris r24,r8,0x3980
- 38: GETL R8, t20
- 39: ORL $0x39800000, t20
- 40: PUTL t20, R24
- 41: INCEIPL $4
-
- 0x25480BA4: 653D3D8C oris r29,r9,0x3D8C
- 42: GETL R9, t22
- 43: ORL $0x3D8C0000, t22
- 44: PUTL t22, R29
- 45: INCEIPL $4
-
- 0x25480BA8: 614403A6 ori r4,r10,0x3A6
- 46: MOVL $0x7D8903A6, t24
- 47: PUTL t24, R4
- 48: INCEIPL $4
-
- 0x25480BAC: 64E33980 oris r3,r7,0x3980
- 49: GETL R7, t26
- 50: ORL $0x39800000, t26
- 51: PUTL t26, R3
- 52: INCEIPL $4
-
- 0x25480BB0: 65663D8C oris r6,r11,0x3D8C
- 53: GETL R11, t28
- 54: ORL $0x3D8C0000, t28
- 55: PUTL t28, R6
- 56: INCEIPL $4
-
- 0x25480BB4: 60A00420 ori r0,r5,0x420
- 57: MOVL $0x4E800420, t30
- 58: PUTL t30, R0
- 59: INCEIPL $4
-
- 0x25480BB8: 901C0024 stw r0,36(r28)
- 60: GETL R0, t32
- 61: GETL R28, t34
- 62: ADDL $0x24, t34
- 63: STL t32, (t34)
- 64: INCEIPL $4
-
- 0x25480BBC: 931C0010 stw r24,16(r28)
- 65: GETL R24, t36
- 66: GETL R28, t38
- 67: ADDL $0x10, t38
- 68: STL t36, (t38)
- 69: INCEIPL $4
-
- 0x25480BC0: 93BC0014 stw r29,20(r28)
- 70: GETL R29, t40
- 71: GETL R28, t42
- 72: ADDL $0x14, t42
- 73: STL t40, (t42)
- 74: INCEIPL $4
-
- 0x25480BC4: 909C0018 stw r4,24(r28)
- 75: GETL R4, t44
- 76: GETL R28, t46
- 77: ADDL $0x18, t46
- 78: STL t44, (t46)
- 79: INCEIPL $4
-
- 0x25480BC8: 907C001C stw r3,28(r28)
- 80: GETL R3, t48
- 81: GETL R28, t50
- 82: ADDL $0x1C, t50
- 83: STL t48, (t50)
- 84: INCEIPL $4
-
- 0x25480BCC: 90DC0020 stw r6,32(r28)
- 85: GETL R6, t52
- 86: GETL R28, t54
- 87: ADDL $0x20, t54
- 88: STL t52, (t54)
- 89: INCEIPL $4
-
- 0x25480BD0: 4BFFFDD0 b 0x254809A0
- 90: JMPo $0x254809A0 ($4)
-
-
-. 0 25480B78 92
-. 3C 98 00 01 3C 7D 00 01 38 C4 80 00 39 83 80 00 54 C9 84 3E 57 A7 04 3E 57 08 04 3E 55 8B 84 3E 3D 40 7D 89 3C A0 4E 80 65 18 39 80 65 3D 3D 8C 61 44 03 A6 64 E3 39 80 65 66 3D 8C 60 A0 04 20 90 1C 00 24 93 1C 00 10 93 BC 00 14 90 9C 00 18 90 7C 00 1C 90 DC 00 20 4B FF FD D0
-
-==== BB 1165 (0x254809A0) approx BBs exec'd 0 ====
-
- 0x254809A0: 39000000 li r8,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R8
- 2: INCEIPL $4
-
- 0x254809A4: 38800012 li r4,18
- 3: MOVL $0x12, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x254809A8: 7F88D840 cmpl cr7,r8,r27
- 6: GETL R8, t4
- 7: GETL R27, t6
- 8: CMPUL t4, t6, t8 (-rSo)
- 9: ICRFL t8, $0x7, CR
- 10: INCEIPL $4
-
- 0x254809AC: 409C0054 bc 4,28,0x25480A00
- 11: Jc28o $0x25480A00
-
-
-. 0 254809A0 16
-. 39 00 00 00 38 80 00 12 7F 88 D8 40 40 9C 00 54
-
-==== BB 1166 (0x254809B0) approx BBs exec'd 0 ====
-
- 0x254809B0: 38E0FFD4 li r7,-44
- 0: MOVL $0xFFFFFFD4, t0
- 1: PUTL t0, R7
- 2: INCEIPL $4
-
- 0x254809B4: 550A143A rlwinm r10,r8,2,16,29
- 3: GETL R8, t2
- 4: ROLL $0x2, t2
- 5: ANDL $0xFFFC, t2
- 6: PUTL t2, R10
- 7: INCEIPL $4
-
- 0x254809B8: 39080001 addi r8,r8,1
- 8: GETL R8, t4
- 9: ADDL $0x1, t4
- 10: PUTL t4, R8
- 11: INCEIPL $4
-
- 0x254809BC: 7D7B4010 subfc r11,r27,r8
- 12: GETL R27, t6
- 13: GETL R8, t8
- 14: SBBL t6, t8 (-wCa)
- 15: PUTL t8, R11
- 16: INCEIPL $4
-
- 0x254809C0: 7D6B5910 subfe r11,r11,r11
- 17: GETL R11, t10
- 18: GETL R11, t12
- 19: SBBL t10, t12 (-rCa-wCa)
- 20: PUTL t12, R11
- 21: INCEIPL $4
-
- 0x254809C4: 7D6B00D0 neg r11,r11
- 22: GETL R11, t14
- 23: NEGL t14
- 24: PUTL t14, R11
- 25: INCEIPL $4
-
- 0x254809C8: 21881FFF subfic r12,r8,8191
- 26: GETL R8, t16
- 27: MOVL $0x1FFF, t18
- 28: SBBL t16, t18 (-wCa)
- 29: PUTL t18, R12
- 30: INCEIPL $4
-
- 0x254809CC: 39800000 li r12,0
- 31: MOVL $0x0, t20
- 32: PUTL t20, R12
- 33: INCEIPL $4
-
- 0x254809D0: 7D8C6114 adde r12,r12,r12
- 34: GETL R12, t22
- 35: GETL R12, t24
- 36: ADCL t22, t24 (-rCa-wCa)
- 37: PUTL t24, R12
- 38: INCEIPL $4
-
- 0x254809D4: 7D696039 and. r9,r11,r12
- 39: GETL R11, t26
- 40: GETL R12, t28
- 41: ANDL t26, t28
- 42: PUTL t28, R9
- 43: CMP0L t28, t30 (-rSo)
- 44: ICRFL t30, $0x0, CR
- 45: INCEIPL $4
-
- 0x254809D8: 5498103A rlwinm r24,r4,2,0,29
- 46: GETL R4, t32
- 47: SHLL $0x2, t32
- 48: PUTL t32, R24
- 49: INCEIPL $4
-
- 0x254809DC: 54E501BA rlwinm r5,r7,0,6,29
- 50: GETL R7, t34
- 51: ANDL $0x3FFFFFC, t34
- 52: PUTL t34, R5
- 53: INCEIPL $4
-
- 0x254809E0: 65403960 oris r0,r10,0x3960
- 54: GETL R10, t36
- 55: ORL $0x39600000, t36
- 56: PUTL t36, R0
- 57: INCEIPL $4
-
- 0x254809E4: 64BD4800 oris r29,r5,0x4800
- 58: GETL R5, t38
- 59: ORL $0x48000000, t38
- 60: PUTL t38, R29
- 61: INCEIPL $4
-
- 0x254809E8: 7F98FA14 add r28,r24,r31
- 62: GETL R24, t40
- 63: GETL R31, t42
- 64: ADDL t40, t42
- 65: PUTL t42, R28
- 66: INCEIPL $4
-
- 0x254809EC: 7C18F92E stwx r0,r24,r31
- 67: GETL R31, t44
- 68: GETL R24, t46
- 69: ADDL t46, t44
- 70: GETL R0, t48
- 71: STL t48, (t44)
- 72: INCEIPL $4
-
- 0x254809F0: 38840002 addi r4,r4,2
- 73: GETL R4, t50
- 74: ADDL $0x2, t50
- 75: PUTL t50, R4
- 76: INCEIPL $4
-
- 0x254809F4: 93BC0004 stw r29,4(r28)
- 77: GETL R29, t52
- 78: GETL R28, t54
- 79: ADDL $0x4, t54
- 80: STL t52, (t54)
- 81: INCEIPL $4
-
- 0x254809F8: 38E7FFF8 addi r7,r7,-8
- 82: MOVL $0xFFFFFFCC, t56
- 83: PUTL t56, R7
- 84: INCEIPL $4
-
- 0x254809FC: 4082FFB8 bc 4,2,0x254809B4
- 85: Jc02o $0x254809B4
-
-
-. 0 254809B0 80
-. 38 E0 FF D4 55 0A 14 3A 39 08 00 01 7D 7B 40 10 7D 6B 59 10 7D 6B 00 D0 21 88 1F FF 39 80 00 00 7D 8C 61 14 7D 69 60 39 54 98 10 3A 54 E5 01 BA 65 40 39 60 64 BD 48 00 7F 98 FA 14 7C 18 F9 2E 38 84 00 02 93 BC 00 04 38 E7 FF F8 40 82 FF B8
-
-==== BB 1167 (0x254809B4) approx BBs exec'd 0 ====
-
- 0x254809B4: 550A143A rlwinm r10,r8,2,16,29
- 0: GETL R8, t0
- 1: ROLL $0x2, t0
- 2: ANDL $0xFFFC, t0
- 3: PUTL t0, R10
- 4: INCEIPL $4
-
- 0x254809B8: 39080001 addi r8,r8,1
- 5: GETL R8, t2
- 6: ADDL $0x1, t2
- 7: PUTL t2, R8
- 8: INCEIPL $4
-
- 0x254809BC: 7D7B4010 subfc r11,r27,r8
- 9: GETL R27, t4
- 10: GETL R8, t6
- 11: SBBL t4, t6 (-wCa)
- 12: PUTL t6, R11
- 13: INCEIPL $4
-
- 0x254809C0: 7D6B5910 subfe r11,r11,r11
- 14: GETL R11, t8
- 15: GETL R11, t10
- 16: SBBL t8, t10 (-rCa-wCa)
- 17: PUTL t10, R11
- 18: INCEIPL $4
-
- 0x254809C4: 7D6B00D0 neg r11,r11
- 19: GETL R11, t12
- 20: NEGL t12
- 21: PUTL t12, R11
- 22: INCEIPL $4
-
- 0x254809C8: 21881FFF subfic r12,r8,8191
- 23: GETL R8, t14
- 24: MOVL $0x1FFF, t16
- 25: SBBL t14, t16 (-wCa)
- 26: PUTL t16, R12
- 27: INCEIPL $4
-
- 0x254809CC: 39800000 li r12,0
- 28: MOVL $0x0, t18
- 29: PUTL t18, R12
- 30: INCEIPL $4
-
- 0x254809D0: 7D8C6114 adde r12,r12,r12
- 31: GETL R12, t20
- 32: GETL R12, t22
- 33: ADCL t20, t22 (-rCa-wCa)
- 34: PUTL t22, R12
- 35: INCEIPL $4
-
- 0x254809D4: 7D696039 and. r9,r11,r12
- 36: GETL R11, t24
- 37: GETL R12, t26
- 38: ANDL t24, t26
- 39: PUTL t26, R9
- 40: CMP0L t26, t28 (-rSo)
- 41: ICRFL t28, $0x0, CR
- 42: INCEIPL $4
-
- 0x254809D8: 5498103A rlwinm r24,r4,2,0,29
- 43: GETL R4, t30
- 44: SHLL $0x2, t30
- 45: PUTL t30, R24
- 46: INCEIPL $4
-
- 0x254809DC: 54E501BA rlwinm r5,r7,0,6,29
- 47: GETL R7, t32
- 48: ANDL $0x3FFFFFC, t32
- 49: PUTL t32, R5
- 50: INCEIPL $4
-
- 0x254809E0: 65403960 oris r0,r10,0x3960
- 51: GETL R10, t34
- 52: ORL $0x39600000, t34
- 53: PUTL t34, R0
- 54: INCEIPL $4
-
- 0x254809E4: 64BD4800 oris r29,r5,0x4800
- 55: GETL R5, t36
- 56: ORL $0x48000000, t36
- 57: PUTL t36, R29
- 58: INCEIPL $4
-
- 0x254809E8: 7F98FA14 add r28,r24,r31
- 59: GETL R24, t38
- 60: GETL R31, t40
- 61: ADDL t38, t40
- 62: PUTL t40, R28
- 63: INCEIPL $4
-
- 0x254809EC: 7C18F92E stwx r0,r24,r31
- 64: GETL R31, t42
- 65: GETL R24, t44
- 66: ADDL t44, t42
- 67: GETL R0, t46
- 68: STL t46, (t42)
- 69: INCEIPL $4
-
- 0x254809F0: 38840002 addi r4,r4,2
- 70: GETL R4, t48
- 71: ADDL $0x2, t48
- 72: PUTL t48, R4
- 73: INCEIPL $4
-
- 0x254809F4: 93BC0004 stw r29,4(r28)
- 74: GETL R29, t50
- 75: GETL R28, t52
- 76: ADDL $0x4, t52
- 77: STL t50, (t52)
- 78: INCEIPL $4
-
- 0x254809F8: 38E7FFF8 addi r7,r7,-8
- 79: GETL R7, t54
- 80: ADDL $0xFFFFFFF8, t54
- 81: PUTL t54, R7
- 82: INCEIPL $4
-
- 0x254809FC: 4082FFB8 bc 4,2,0x254809B4
- 83: Jc02o $0x254809B4
-
-
-. 0 254809B4 76
-. 55 0A 14 3A 39 08 00 01 7D 7B 40 10 7D 6B 59 10 7D 6B 00 D0 21 88 1F FF 39 80 00 00 7D 8C 61 14 7D 69 60 39 54 98 10 3A 54 E5 01 BA 65 40 39 60 64 BD 48 00 7F 98 FA 14 7C 18 F9 2E 38 84 00 02 93 BC 00 04 38 E7 FF F8 40 82 FF B8
-
-==== BB 1168 (0x25480A00) approx BBs exec'd 0 ====
-
- 0x25480A00: 7C88D840 cmpl cr1,r8,r27
- 0: GETL R8, t0
- 1: GETL R27, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x1, CR
- 4: INCEIPL $4
-
- 0x25480A04: 40840074 bc 4,4,0x25480A78
- 5: Jc04o $0x25480A78
-
-
-. 0 25480A00 8
-. 7C 88 D8 40 40 84 00 74
-
-==== BB 1169 (0x25480A98) approx BBs exec'd 0 ====
-
- 0x25480A98: 800B0000 lwz r0,0(r11)
- 0: GETL R11, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0x25480A9C: 2F000000 cmpi cr6,r0,0
- 4: GETL R0, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x6, CR
- 7: INCEIPL $4
-
- 0x25480AA0: 409A00C4 bc 4,26,0x25480B64
- 8: Jc26o $0x25480B64
-
-
-. 0 25480A98 12
-. 80 0B 00 00 2F 00 00 00 40 9A 00 C4
-
-==== BB 1170 (0x25480B64) approx BBs exec'd 0 ====
-
- 0x25480B64: 7C0A1670 srawi r10,r0,2
- 0: GETL R0, t0
- 1: SARL $0x2, t0 (-wCa)
- 2: PUTL t0, R10
- 3: INCEIPL $4
-
- 0x25480B68: 7D4A0194 addze r10,r10
- 4: GETL R10, t2
- 5: ADCL $0x0, t2 (-rCa-wCa)
- 6: PUTL t2, R10
- 7: INCEIPL $4
-
- 0x25480B6C: 4BFFFF38 b 0x25480AA4
- 8: JMPo $0x25480AA4 ($4)
-
-
-. 0 25480B64 12
-. 7C 0A 16 70 7D 4A 01 94 4B FF FF 38
-
-==== BB 1171 (0x25480AA8) approx BBs exec'd 0 ====
-
- 0x25480AA8: 7EEBBB78 or r11,r23,r23
- 0: GETL R23, t0
- 1: PUTL t0, R11
- 2: INCEIPL $4
-
- 0x25480AAC: 39200000 li r9,0
- 3: MOVL $0x0, t2
- 4: PUTL t2, R9
- 5: INCEIPL $4
-
- 0x25480AB0: 48000014 b 0x25480AC4
- 6: JMPo $0x25480AC4 ($4)
-
-
-. 0 25480AA8 12
-. 7E EB BB 78 39 20 00 00 48 00 00 14
-
-==== BB 1172 (0x254796D0) approx BBs exec'd 0 ====
-
- 0x254796D0: 817D0070 lwz r11,112(r29)
- 0: GETL R29, t0
- 1: ADDL $0x70, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x254796D4: 2F0B0000 cmpi cr6,r11,0
- 5: GETL R11, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x254796D8: 409A033C bc 4,26,0x25479A14
- 9: Jc26o $0x25479A14
-
-
-. 0 254796D0 12
-. 81 7D 00 70 2F 0B 00 00 40 9A 03 3C
-
-==== BB 1173 (0x25479A14) approx BBs exec'd 0 ====
-
- 0x25479A14: 835D007C lwz r26,124(r29)
- 0: GETL R29, t0
- 1: ADDL $0x7C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0x25479A18: 833D0028 lwz r25,40(r29)
- 5: GETL R29, t4
- 6: ADDL $0x28, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R25
- 9: INCEIPL $4
-
- 0x25479A1C: 829A0004 lwz r20,4(r26)
- 10: GETL R26, t8
- 11: ADDL $0x4, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R20
- 14: INCEIPL $4
-
- 0x25479A20: 82BF0020 lwz r21,32(r31)
- 15: GETL R31, t12
- 16: ADDL $0x20, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R21
- 19: INCEIPL $4
-
- 0x25479A24: 929F002C stw r20,44(r31)
- 20: GETL R20, t16
- 21: GETL R31, t18
- 22: ADDL $0x2C, t18
- 23: STL t16, (t18)
- 24: INCEIPL $4
-
- 0x25479A28: 82590004 lwz r18,4(r25)
- 25: GETL R25, t20
- 26: ADDL $0x4, t20
- 27: LDL (t20), t22
- 28: PUTL t22, R18
- 29: INCEIPL $4
-
- 0x25479A2C: 7D553214 add r10,r21,r6
- 30: GETL R21, t24
- 31: GETL R6, t26
- 32: ADDL t24, t26
- 33: PUTL t26, R10
- 34: INCEIPL $4
-
- 0x25479A30: 7D35A050 subf r9,r21,r20
- 35: GETL R21, t28
- 36: GETL R20, t30
- 37: SUBL t28, t30
- 38: PUTL t30, R9
- 39: INCEIPL $4
-
- 0x25479A34: 7E149214 add r16,r20,r18
- 40: GETL R20, t32
- 41: GETL R18, t34
- 42: ADDL t32, t34
- 43: PUTL t34, R16
- 44: INCEIPL $4
-
- 0x25479A38: 913F0024 stw r9,36(r31)
- 45: GETL R9, t36
- 46: GETL R31, t38
- 47: ADDL $0x24, t38
- 48: STL t36, (t38)
- 49: INCEIPL $4
-
- 0x25479A3C: 7E705050 subf r19,r16,r10
- 50: GETL R16, t40
- 51: GETL R10, t42
- 52: SUBL t40, t42
- 53: PUTL t42, R19
- 54: INCEIPL $4
-
- 0x25479A40: 925F0030 stw r18,48(r31)
- 55: GETL R18, t44
- 56: GETL R31, t46
- 57: ADDL $0x30, t46
- 58: STL t44, (t46)
- 59: INCEIPL $4
-
- 0x25479A44: 927F003C stw r19,60(r31)
- 60: GETL R19, t48
- 61: GETL R31, t50
- 62: ADDL $0x3C, t50
- 63: STL t48, (t50)
- 64: INCEIPL $4
-
- 0x25479A48: 921F0038 stw r16,56(r31)
- 65: GETL R16, t52
- 66: GETL R31, t54
- 67: ADDL $0x38, t54
- 68: STL t52, (t54)
- 69: INCEIPL $4
-
- 0x25479A4C: 4BFFFC90 b 0x254796DC
- 70: JMPo $0x254796DC ($4)
-
-
-. 0 25479A14 60
-. 83 5D 00 7C 83 3D 00 28 82 9A 00 04 82 BF 00 20 92 9F 00 2C 82 59 00 04 7D 55 32 14 7D 35 A0 50 7E 14 92 14 91 3F 00 24 7E 70 50 50 92 5F 00 30 92 7F 00 3C 92 1F 00 38 4B FF FC 90
-
-==== BB 1174 (0x254799E0) approx BBs exec'd 0 ====
-
- 0x254799E0: 7F8BE040 cmpl cr7,r11,r28
- 0: GETL R11, t0
- 1: GETL R28, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x7, CR
- 4: INCEIPL $4
-
- 0x254799E4: 40BCFE40 bc 5,28,0x25479824
- 5: Jc28o $0x25479824
-
-
-. 0 254799E0 8
-. 7F 8B E0 40 40 BC FE 40
-
-==== BB 1175 (0x254799E8) approx BBs exec'd 0 ====
-
- 0x254799E8: 812B0008 lwz r9,8(r11)
- 0: GETL R11, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x254799EC: 808B0000 lwz r4,0(r11)
- 5: GETL R11, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R4
- 8: INCEIPL $4
-
- 0x254799F0: 396B000C addi r11,r11,12
- 9: GETL R11, t8
- 10: ADDL $0xC, t8
- 11: PUTL t8, R11
- 12: INCEIPL $4
-
- 0x254799F4: 7F8BE040 cmpl cr7,r11,r28
- 13: GETL R11, t10
- 14: GETL R28, t12
- 15: CMPUL t10, t12, t14 (-rSo)
- 16: ICRFL t14, $0x7, CR
- 17: INCEIPL $4
-
- 0x254799F8: 7D09CA14 add r8,r9,r25
- 18: GETL R9, t16
- 19: GETL R25, t18
- 20: ADDL t16, t18
- 21: PUTL t18, R8
- 22: INCEIPL $4
-
- 0x254799FC: 7D04C92E stwx r8,r4,r25
- 23: GETL R25, t20
- 24: GETL R4, t22
- 25: ADDL t22, t20
- 26: GETL R8, t24
- 27: STL t24, (t20)
- 28: INCEIPL $4
-
- 0x25479A00: 4BFFFFE4 b 0x254799E4
- 29: JMPo $0x254799E4 ($4)
-
-
-. 0 254799E8 28
-. 81 2B 00 08 80 8B 00 00 39 6B 00 0C 7F 8B E0 40 7D 09 CA 14 7D 04 C9 2E 4B FF FF E4
-
-==== BB 1176 (0x254799E4) approx BBs exec'd 0 ====
-
- 0x254799E4: 40BCFE40 bc 5,28,0x25479824
- 0: Jc28o $0x25479824
-
-
-. 0 254799E4 4
-. 40 BC FE 40
-
-==== BB 1177 (0x25479714) approx BBs exec'd 0 ====
-
- 0x25479714: 3929000C addi r9,r9,12
- 0: GETL R9, t0
- 1: ADDL $0xC, t0
- 2: PUTL t0, R9
- 3: INCEIPL $4
-
- 0x25479718: 7F89C040 cmpl cr7,r9,r24
- 4: GETL R9, t2
- 5: GETL R24, t4
- 6: CMPUL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x2547971C: 419CFFF8 bc 12,28,0x25479714
- 9: Js28o $0x25479714
-
-
-. 0 25479714 12
-. 39 29 00 0C 7F 89 C0 40 41 9C FF F8
-
-==== BB 1178 (0x254797E0) approx BBs exec'd 0 ====
-
- 0x254797E0: 3C00AAAA lis r0,-21846
- 0: MOVL $0xAAAA0000, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x254797E4: 600CAAAB ori r12,r0,0xAAAB
- 3: MOVL $0xAAAAAAAB, t2
- 4: PUTL t2, R12
- 5: INCEIPL $4
-
- 0x254797E8: 7EE86016 mulhwu r23,r8,r12
- 6: GETL R8, t4
- 7: GETL R12, t6
- 8: UMULHL t4, t6
- 9: PUTL t6, R23
- 10: INCEIPL $4
-
- 0x254797EC: 56E9E8FE rlwinm r9,r23,29,3,31
- 11: GETL R23, t8
- 12: SHRL $0x3, t8
- 13: PUTL t8, R9
- 14: INCEIPL $4
-
- 0x254797F0: 7C893840 cmpl cr1,r9,r7
- 15: GETL R9, t10
- 16: GETL R7, t12
- 17: CMPUL t10, t12, t14 (-rSo)
- 18: ICRFL t14, $0x1, CR
- 19: INCEIPL $4
-
- 0x254797F4: 40850008 bc 4,5,0x254797FC
- 20: Jc05o $0x254797FC
-
-
-. 0 254797E0 24
-. 3C 00 AA AA 60 0C AA AB 7E E8 60 16 56 E9 E8 FE 7C 89 38 40 40 85 00 08
-
-==== BB 1179 (0x254733C0) approx BBs exec'd 0 ====
-
- 0x254733C0: 4800C225 bl 0x2547F5E4
- 0: MOVL $0x254733C4, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x2547F5E4 ($4)
-
-
-. 0 254733C0 4
-. 48 00 C2 25
-
-==== BB 1180 _dl_sysdep_start_cleanup(0x2547F5E4) approx BBs exec'd 0 ====
-
- 0x2547F5E4: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547F5E8: 38210010 addi r1,r1,16
- 6: GETL R1, t4
- 7: ADDL $0x10, t4
- 8: PUTL t4, R1
- 9: INCEIPL $4
-
- 0x2547F5EC: 4E800020 blr
- 10: GETL LR, t6
- 11: JMPo-r t6 ($4)
-
-
-. 0 2547F5E4 12
-. 94 21 FF F0 38 21 00 10 4E 80 00 20
-
-==== BB 1181 (0x254733C4) approx BBs exec'd 0 ====
-
- 0x254733C4: 80CE01A4 lwz r6,420(r14)
- 0: GETL R14, t0
- 1: ADDL $0x1A4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x254733C8: 2C060000 cmpi cr0,r6,0
- 5: GETL R6, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x254733CC: 4082094C bc 4,2,0x25473D18
- 9: Jc02o $0x25473D18
-
-
-. 0 254733C4 12
-. 80 CE 01 A4 2C 06 00 00 40 82 09 4C
-
-==== BB 1182 (0x254733D0) approx BBs exec'd 0 ====
-
- 0x254733D0: 816E0330 lwz r11,816(r14)
- 0: GETL R14, t0
- 1: ADDL $0x330, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x254733D4: 2B0B0001 cmpli cr6,r11,1
- 5: GETL R11, t4
- 6: MOVL $0x1, t8
- 7: CMPUL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x6, CR
- 9: INCEIPL $4
-
- 0x254733D8: 4099F784 bc 4,25,0x25472B5C
- 10: Jc25o $0x25472B5C
-
-
-. 0 254733D0 12
-. 81 6E 03 30 2B 0B 00 01 40 99 F7 84
-
-==== BB 1183 (0x254733DC) approx BBs exec'd 0 ====
-
- 0x254733DC: 809401C0 lwz r4,448(r20)
- 0: GETL R20, t0
- 1: ADDL $0x1C0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x254733E0: 7F83E378 or r3,r28,r28
- 5: GETL R28, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x254733E4: 38A00000 li r5,0
- 8: MOVL $0x0, t6
- 9: PUTL t6, R5
- 10: INCEIPL $4
-
- 0x254733E8: 38C00000 li r6,0
- 11: MOVL $0x0, t8
- 12: PUTL t8, R6
- 13: INCEIPL $4
-
- 0x254733EC: 480061D5 bl 0x254795C0
- 14: MOVL $0x254733F0, t10
- 15: PUTL t10, LR
- 16: JMPo-c $0x254795C0 ($4)
-
-
-. 0 254733DC 20
-. 80 94 01 C0 7F 83 E3 78 38 A0 00 00 38 C0 00 00 48 00 61 D5
-
-==== BB 1184 (0x254733F0) approx BBs exec'd 0 ====
-
- 0x254733F0: 4BFFF76C b 0x25472B5C
- 0: JMPo $0x25472B5C ($4)
-
-
-. 0 254733F0 4
-. 4B FF F7 6C
-
-==== BB 1185 (0x25472B5C) approx BBs exec'd 0 ====
-
- 0x25472B5C: 7E238B78 or r3,r17,r17
- 0: GETL R17, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x25472B60: 4800B479 bl 0x2547DFD8
- 3: MOVL $0x25472B64, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0x2547DFD8 ($4)
-
-
-. 0 25472B5C 8
-. 7E 23 8B 78 48 00 B4 79
-
-==== BB 1186 __GI__dl_allocate_tls_init(0x2547DFD8) approx BBs exec'd 0 ====
-
- 0x2547DFD8: 9421FFD0 stwu r1,-48(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFD0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547DFDC: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x2547DFE0: 93210014 stw r25,20(r1)
- 9: GETL R25, t6
- 10: GETL R1, t8
- 11: ADDL $0x14, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547DFE4: 7C791B79 or. r25,r3,r3
- 14: GETL R3, t10
- 15: PUTL t10, R25
- 16: CMP0L t10, t12 (-rSo)
- 17: ICRFL t12, $0x0, CR
- 18: INCEIPL $4
-
- 0x2547DFE8: 48019019 bl 0x25497000
- 19: MOVL $0x2547DFEC, t14
- 20: PUTL t14, LR
- 21: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547DFD8 20
-. 94 21 FF D0 7C 08 02 A6 93 21 00 14 7C 79 1B 79 48 01 90 19
-
-==== BB 1187 (0x2547DFEC) approx BBs exec'd 0 ====
-
- 0x2547DFEC: 93C10028 stw r30,40(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x28, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547DFF0: 92E1000C stw r23,12(r1)
- 5: GETL R23, t4
- 6: GETL R1, t6
- 7: ADDL $0xC, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x2547DFF4: 7FC802A6 mflr r30
- 10: GETL LR, t8
- 11: PUTL t8, R30
- 12: INCEIPL $4
-
- 0x2547DFF8: 93010010 stw r24,16(r1)
- 13: GETL R24, t10
- 14: GETL R1, t12
- 15: ADDL $0x10, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x2547DFFC: 38600000 li r3,0
- 18: MOVL $0x0, t14
- 19: PUTL t14, R3
- 20: INCEIPL $4
-
- 0x2547E000: 93410018 stw r26,24(r1)
- 21: GETL R26, t16
- 22: GETL R1, t18
- 23: ADDL $0x18, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x2547E004: 9361001C stw r27,28(r1)
- 26: GETL R27, t20
- 27: GETL R1, t22
- 28: ADDL $0x1C, t22
- 29: STL t20, (t22)
- 30: INCEIPL $4
-
- 0x2547E008: 93810020 stw r28,32(r1)
- 31: GETL R28, t24
- 32: GETL R1, t26
- 33: ADDL $0x20, t26
- 34: STL t24, (t26)
- 35: INCEIPL $4
-
- 0x2547E00C: 93A10024 stw r29,36(r1)
- 36: GETL R29, t28
- 37: GETL R1, t30
- 38: ADDL $0x24, t30
- 39: STL t28, (t30)
- 40: INCEIPL $4
-
- 0x2547E010: 93E1002C stw r31,44(r1)
- 41: GETL R31, t32
- 42: GETL R1, t34
- 43: ADDL $0x2C, t34
- 44: STL t32, (t34)
- 45: INCEIPL $4
-
- 0x2547E014: 90010034 stw r0,52(r1)
- 46: GETL R0, t36
- 47: GETL R1, t38
- 48: ADDL $0x34, t38
- 49: STL t36, (t38)
- 50: INCEIPL $4
-
- 0x2547E018: 418200D8 bc 12,2,0x2547E0F0
- 51: Js02o $0x2547E0F0
-
-
-. 0 2547DFEC 48
-. 93 C1 00 28 92 E1 00 0C 7F C8 02 A6 93 01 00 10 38 60 00 00 93 41 00 18 93 61 00 1C 93 81 00 20 93 A1 00 24 93 E1 00 2C 90 01 00 34 41 82 00 D8
-
-==== BB 1188 (0x2547E01C) approx BBs exec'd 0 ====
-
- 0x2547E01C: 831E04C8 lwz r24,1224(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4C8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R24
- 4: INCEIPL $4
-
- 0x2547E020: 3B400000 li r26,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R26
- 7: INCEIPL $4
-
- 0x2547E024: 82F9FFFC lwz r23,-4(r25)
- 8: GETL R25, t6
- 9: ADDL $0xFFFFFFFC, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R23
- 12: INCEIPL $4
-
- 0x2547E028: 83780410 lwz r27,1040(r24)
- 13: GETL R24, t10
- 14: ADDL $0x410, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R27
- 17: INCEIPL $4
-
- 0x2547E02C: 817B0000 lwz r11,0(r27)
- 18: GETL R27, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R11
- 21: INCEIPL $4
-
- 0x2547E030: 201A0000 subfic r0,r26,0
- 22: GETL R26, t18
- 23: MOVL $0x0, t20
- 24: SBBL t18, t20 (-wCa)
- 25: PUTL t20, R0
- 26: INCEIPL $4
-
- 0x2547E034: 7FE0D114 adde r31,r0,r26
- 27: GETL R0, t22
- 28: GETL R26, t24
- 29: ADCL t22, t24 (-rCa-wCa)
- 30: PUTL t24, R31
- 31: INCEIPL $4
-
- 0x2547E038: 7D3AFA14 add r9,r26,r31
- 32: GETL R26, t26
- 33: GETL R31, t28
- 34: ADDL t26, t28
- 35: PUTL t28, R9
- 36: INCEIPL $4
-
- 0x2547E03C: 7F8BF840 cmpl cr7,r11,r31
- 37: GETL R11, t30
- 38: GETL R31, t32
- 39: CMPUL t30, t32, t34 (-rSo)
- 40: ICRFL t34, $0x7, CR
- 41: INCEIPL $4
-
- 0x2547E040: 409D0064 bc 4,29,0x2547E0A4
- 42: Jc29o $0x2547E0A4
-
-
-. 0 2547E01C 40
-. 83 1E 04 C8 3B 40 00 00 82 F9 FF FC 83 78 04 10 81 7B 00 00 20 1A 00 00 7F E0 D1 14 7D 3A FA 14 7F 8B F8 40 40 9D 00 64
-
-==== BB 1189 (0x2547E044) approx BBs exec'd 0 ====
-
- 0x2547E044: 57E31838 rlwinm r3,r31,3,0,28
- 0: GETL R31, t0
- 1: SHLL $0x3, t0
- 2: PUTL t0, R3
- 3: INCEIPL $4
-
- 0x2547E048: 7D23DA14 add r9,r3,r27
- 4: GETL R3, t2
- 5: GETL R27, t4
- 6: ADDL t2, t4
- 7: PUTL t4, R9
- 8: INCEIPL $4
-
- 0x2547E04C: 3B89000C addi r28,r9,12
- 9: GETL R9, t6
- 10: ADDL $0xC, t6
- 11: PUTL t6, R28
- 12: INCEIPL $4
-
- 0x2547E050: 80980408 lwz r4,1032(r24)
- 13: GETL R24, t8
- 14: ADDL $0x408, t8
- 15: LDL (t8), t10
- 16: PUTL t10, R4
- 17: INCEIPL $4
-
- 0x2547E054: 7D3AFA14 add r9,r26,r31
- 18: GETL R26, t12
- 19: GETL R31, t14
- 20: ADDL t12, t14
- 21: PUTL t14, R9
- 22: INCEIPL $4
-
- 0x2547E058: 7C892040 cmpl cr1,r9,r4
- 23: GETL R9, t16
- 24: GETL R4, t18
- 25: CMPUL t16, t18, t20 (-rSo)
- 26: ICRFL t20, $0x1, CR
- 27: INCEIPL $4
-
- 0x2547E05C: 41850048 bc 12,5,0x2547E0A4
- 28: Js05o $0x2547E0A4
-
-
-. 0 2547E044 28
-. 57 E3 18 38 7D 23 DA 14 3B 89 00 0C 80 98 04 08 7D 3A FA 14 7C 89 20 40 41 85 00 48
-
-==== BB 1190 (0x2547E060) approx BBs exec'd 0 ====
-
- 0x2547E060: 813C0000 lwz r9,0(r28)
- 0: GETL R28, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0x2547E064: 2F090000 cmpi cr6,r9,0
- 4: GETL R9, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x6, CR
- 7: INCEIPL $4
-
- 0x2547E068: 419A0028 bc 12,26,0x2547E090
- 8: Js26o $0x2547E090
-
-
-. 0 2547E060 12
-. 81 3C 00 00 2F 09 00 00 41 9A 00 28
-
-==== BB 1191 (0x2547E06C) approx BBs exec'd 0 ====
-
- 0x2547E06C: 8169022C lwz r11,556(r9)
- 0: GETL R9, t0
- 1: ADDL $0x22C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547E070: 2C0BFFFF cmpi cr0,r11,-1
- 5: GETL R11, t4
- 6: MOVL $0xFFFFFFFF, t8
- 7: CMPL t4, t8, t6 (-rSo)
- 8: ICRFL t6, $0x0, CR
- 9: INCEIPL $4
-
- 0x2547E074: 7D4BCA14 add r10,r11,r25
- 10: GETL R11, t10
- 11: GETL R25, t12
- 12: ADDL t10, t12
- 13: PUTL t12, R10
- 14: INCEIPL $4
-
- 0x2547E078: 7D435378 or r3,r10,r10
- 15: GETL R10, t14
- 16: PUTL t14, R3
- 17: INCEIPL $4
-
- 0x2547E07C: 40820040 bc 4,2,0x2547E0BC
- 18: Jc02o $0x2547E0BC
-
-
-. 0 2547E06C 20
-. 81 69 02 2C 2C 0B FF FF 7D 4B CA 14 7D 43 53 78 40 82 00 40
-
-==== BB 1192 (0x2547E0BC) approx BBs exec'd 0 ====
-
- 0x2547E0BC: 81690230 lwz r11,560(r9)
- 0: GETL R9, t0
- 1: ADDL $0x230, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547E0C0: 5568103A rlwinm r8,r11,2,0,29
- 5: GETL R11, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R8
- 8: INCEIPL $4
-
- 0x2547E0C4: 7D48B92E stwx r10,r8,r23
- 9: GETL R23, t6
- 10: GETL R8, t8
- 11: ADDL t8, t6
- 12: GETL R10, t10
- 13: STL t10, (t6)
- 14: INCEIPL $4
-
- 0x2547E0C8: 80A9021C lwz r5,540(r9)
- 15: GETL R9, t12
- 16: ADDL $0x21C, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R5
- 19: INCEIPL $4
-
- 0x2547E0CC: 80E90220 lwz r7,544(r9)
- 20: GETL R9, t16
- 21: ADDL $0x220, t16
- 22: LDL (t16), t18
- 23: PUTL t18, R7
- 24: INCEIPL $4
-
- 0x2547E0D0: 80890218 lwz r4,536(r9)
- 25: GETL R9, t20
- 26: ADDL $0x218, t20
- 27: LDL (t20), t22
- 28: PUTL t22, R4
- 29: INCEIPL $4
-
- 0x2547E0D4: 7FA53850 subf r29,r5,r7
- 30: GETL R5, t24
- 31: GETL R7, t26
- 32: SUBL t24, t26
- 33: PUTL t26, R29
- 34: INCEIPL $4
-
- 0x2547E0D8: 48005949 bl 0x25483A20
- 35: MOVL $0x2547E0DC, t28
- 36: PUTL t28, LR
- 37: JMPo-c $0x25483A20 ($4)
-
-
-. 0 2547E0BC 32
-. 81 69 02 30 55 68 10 3A 7D 48 B9 2E 80 A9 02 1C 80 E9 02 20 80 89 02 18 7F A5 38 50 48 00 59 49
-
-==== BB 1193 (0x2547E0DC) approx BBs exec'd 0 ====
-
- 0x2547E0DC: 7FA5EB78 or r5,r29,r29
- 0: GETL R29, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0x2547E0E0: 38800000 li r4,0
- 3: MOVL $0x0, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x2547E0E4: 48005661 bl 0x25483744
- 6: MOVL $0x2547E0E8, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0x25483744 ($4)
-
-
-. 0 2547E0DC 12
-. 7F A5 EB 78 38 80 00 00 48 00 56 61
-
-==== BB 1194 (0x25483920) approx BBs exec'd 0 ====
-
- 0x25483920: 28850010 cmpli cr1,r5,16
- 0: GETL R5, t0
- 1: MOVL $0x10, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0x25483924: 7CC62A14 add r6,r6,r5
- 5: GETL R6, t6
- 6: GETL R5, t8
- 7: ADDL t6, t8
- 8: PUTL t8, R6
- 9: INCEIPL $4
-
- 0x25483928: 419F0020 bc 12,31,0x25483948
- 10: Js31o $0x25483948
-
-
-. 0 25483920 12
-. 28 85 00 10 7C C6 2A 14 41 9F 00 20
-
-==== BB 1195 (0x25483934) approx BBs exec'd 0 ====
-
- 0x25483934: 4084002C bc 4,4,0x25483960
- 0: Jc04o $0x25483960
-
-
-. 0 25483934 4
-. 40 84 00 2C
-
-==== BB 1196 (0x25483938) approx BBs exec'd 0 ====
-
- 0x25483938: 4C9C0020 bclr 4,28
- 0: GETL LR, t0
- 1: Jc28o-r t0
-
-
-. 0 25483938 4
-. 4C 9C 00 20
-
-==== BB 1197 (0x2548393C) approx BBs exec'd 0 ====
-
- 0x2548393C: 9086FFFC stw r4,-4(r6)
- 0: GETL R4, t0
- 1: GETL R6, t2
- 2: ADDL $0xFFFFFFFC, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25483940: 9086FFF8 stw r4,-8(r6)
- 5: GETL R4, t4
- 6: GETL R6, t6
- 7: ADDL $0xFFFFFFF8, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x25483944: 4E800020 blr
- 10: GETL LR, t8
- 11: JMPo-r t8 ($4)
-
-
-. 0 2548393C 12
-. 90 86 FF FC 90 86 FF F8 4E 80 00 20
-
-==== BB 1198 (0x2547E0E8) approx BBs exec'd 0 ====
-
- 0x2547E0E8: 4BFFFFA4 b 0x2547E08C
- 0: JMPo $0x2547E08C ($4)
-
-
-. 0 2547E0E8 4
-. 4B FF FF A4
-
-==== BB 1199 (0x2547E08C) approx BBs exec'd 0 ====
-
- 0x2547E08C: 817B0000 lwz r11,0(r27)
- 0: GETL R27, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R11
- 3: INCEIPL $4
-
- 0x2547E090: 3BFF0001 addi r31,r31,1
- 4: GETL R31, t4
- 5: ADDL $0x1, t4
- 6: PUTL t4, R31
- 7: INCEIPL $4
-
- 0x2547E094: 3B9C0008 addi r28,r28,8
- 8: GETL R28, t6
- 9: ADDL $0x8, t6
- 10: PUTL t6, R28
- 11: INCEIPL $4
-
- 0x2547E098: 7F8BF840 cmpl cr7,r11,r31
- 12: GETL R11, t8
- 13: GETL R31, t10
- 14: CMPUL t8, t10, t12 (-rSo)
- 15: ICRFL t12, $0x7, CR
- 16: INCEIPL $4
-
- 0x2547E09C: 419DFFB4 bc 12,29,0x2547E050
- 17: Js29o $0x2547E050
-
-
-. 0 2547E08C 20
-. 81 7B 00 00 3B FF 00 01 3B 9C 00 08 7F 8B F8 40 41 9D FF B4
-
-==== BB 1200 (0x2547E050) approx BBs exec'd 0 ====
-
- 0x2547E050: 80980408 lwz r4,1032(r24)
- 0: GETL R24, t0
- 1: ADDL $0x408, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547E054: 7D3AFA14 add r9,r26,r31
- 5: GETL R26, t4
- 6: GETL R31, t6
- 7: ADDL t4, t6
- 8: PUTL t6, R9
- 9: INCEIPL $4
-
- 0x2547E058: 7C892040 cmpl cr1,r9,r4
- 10: GETL R9, t8
- 11: GETL R4, t10
- 12: CMPUL t8, t10, t12 (-rSo)
- 13: ICRFL t12, $0x1, CR
- 14: INCEIPL $4
-
- 0x2547E05C: 41850048 bc 12,5,0x2547E0A4
- 15: Js05o $0x2547E0A4
-
-
-. 0 2547E050 16
-. 80 98 04 08 7D 3A FA 14 7C 89 20 40 41 85 00 48
-
-==== BB 1201 (0x2547E0A4) approx BBs exec'd 0 ====
-
- 0x2547E0A4: 81580408 lwz r10,1032(r24)
- 0: GETL R24, t0
- 1: ADDL $0x408, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x2547E0A8: 7D3A4B78 or r26,r9,r9
- 5: GETL R9, t4
- 6: PUTL t4, R26
- 7: INCEIPL $4
-
- 0x2547E0AC: 7C8A4840 cmpl cr1,r10,r9
- 8: GETL R10, t6
- 9: GETL R9, t8
- 10: CMPUL t6, t8, t10 (-rSo)
- 11: ICRFL t10, $0x1, CR
- 12: INCEIPL $4
-
- 0x2547E0B0: 4085003C bc 4,5,0x2547E0EC
- 13: Jc05o $0x2547E0EC
-
-
-. 0 2547E0A4 16
-. 81 58 04 08 7D 3A 4B 78 7C 8A 48 40 40 85 00 3C
-
-==== BB 1202 (0x2547E0EC) approx BBs exec'd 0 ====
-
- 0x2547E0EC: 7F23CB78 or r3,r25,r25
- 0: GETL R25, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547E0F0: 81810034 lwz r12,52(r1)
- 3: GETL R1, t2
- 4: ADDL $0x34, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R12
- 7: INCEIPL $4
-
- 0x2547E0F4: 82E1000C lwz r23,12(r1)
- 8: GETL R1, t6
- 9: ADDL $0xC, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R23
- 12: INCEIPL $4
-
- 0x2547E0F8: 83010010 lwz r24,16(r1)
- 13: GETL R1, t10
- 14: ADDL $0x10, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R24
- 17: INCEIPL $4
-
- 0x2547E0FC: 7D8803A6 mtlr r12
- 18: GETL R12, t14
- 19: PUTL t14, LR
- 20: INCEIPL $4
-
- 0x2547E100: 83210014 lwz r25,20(r1)
- 21: GETL R1, t16
- 22: ADDL $0x14, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R25
- 25: INCEIPL $4
-
- 0x2547E104: 83410018 lwz r26,24(r1)
- 26: GETL R1, t20
- 27: ADDL $0x18, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R26
- 30: INCEIPL $4
-
- 0x2547E108: 8361001C lwz r27,28(r1)
- 31: GETL R1, t24
- 32: ADDL $0x1C, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R27
- 35: INCEIPL $4
-
- 0x2547E10C: 83810020 lwz r28,32(r1)
- 36: GETL R1, t28
- 37: ADDL $0x20, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R28
- 40: INCEIPL $4
-
- 0x2547E110: 83A10024 lwz r29,36(r1)
- 41: GETL R1, t32
- 42: ADDL $0x24, t32
- 43: LDL (t32), t34
- 44: PUTL t34, R29
- 45: INCEIPL $4
-
- 0x2547E114: 83C10028 lwz r30,40(r1)
- 46: GETL R1, t36
- 47: ADDL $0x28, t36
- 48: LDL (t36), t38
- 49: PUTL t38, R30
- 50: INCEIPL $4
-
- 0x2547E118: 83E1002C lwz r31,44(r1)
- 51: GETL R1, t40
- 52: ADDL $0x2C, t40
- 53: LDL (t40), t42
- 54: PUTL t42, R31
- 55: INCEIPL $4
-
- 0x2547E11C: 38210030 addi r1,r1,48
- 56: GETL R1, t44
- 57: ADDL $0x30, t44
- 58: PUTL t44, R1
- 59: INCEIPL $4
-
- 0x2547E120: 4E800020 blr
- 60: GETL LR, t46
- 61: JMPo-r t46 ($4)
-
-
-. 0 2547E0EC 56
-. 7F 23 CB 78 81 81 00 34 82 E1 00 0C 83 01 00 10 7D 88 03 A6 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 83 C1 00 28 83 E1 00 2C 38 21 00 30 4E 80 00 20
-
-==== BB 1203 (0x25472B64) approx BBs exec'd 0 ====
-
- 0x25472B64: 38517000 addi r2,r17,28672
- 0: GETL R17, t0
- 1: ADDL $0x7000, t0
- 2: PUTL t0, R2
- 3: INCEIPL $4
-
- 0x25472B68: 3B000001 li r24,1
- 4: MOVL $0x1, t2
- 5: PUTL t2, R24
- 6: INCEIPL $4
-
- 0x25472B6C: 931A000C stw r24,12(r26)
- 7: GETL R24, t4
- 8: GETL R26, t6
- 9: ADDL $0xC, t6
- 10: STL t4, (t6)
- 11: INCEIPL $4
-
- 0x25472B70: 48009431 bl 0x2547BFA0
- 12: MOVL $0x25472B74, t8
- 13: PUTL t8, LR
- 14: JMPo-c $0x2547BFA0 ($4)
-
-
-. 0 25472B64 16
-. 38 51 70 00 3B 00 00 01 93 1A 00 0C 48 00 94 31
-
-==== BB 1204 __GI__dl_debug_state(0x2547BFA0) approx BBs exec'd 0 ====
-
- 0x2547BFA0: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547BFA4: 38210010 addi r1,r1,16
- 6: GETL R1, t4
- 7: ADDL $0x10, t4
- 8: PUTL t4, R1
- 9: INCEIPL $4
-
- 0x2547BFA8: 4E800020 blr
- 10: GETL LR, t6
- 11: JMPo-r t6 ($4)
-
-
-. 0 2547BFA0 12
-. 94 21 FF F0 38 21 00 10 4E 80 00 20
-
-==== BB 1205 (0x25472B74) approx BBs exec'd 0 ====
-
- 0x25472B74: 480055BD bl 0x25478130
- 0: MOVL $0x25472B78, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x25478130 ($4)
-
-
-. 0 25472B74 4
-. 48 00 55 BD
-
-==== BB 1206 _dl_unload_cache(0x25478130) approx BBs exec'd 0 ====
-
- 0x25478130: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x25478134: 7C6802A6 mflr r3
- 6: GETL LR, t4
- 7: PUTL t4, R3
- 8: INCEIPL $4
-
- 0x25478138: 4801EEC9 bl 0x25497000
- 9: MOVL $0x2547813C, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 25478130 12
-. 94 21 FF F0 7C 68 02 A6 48 01 EE C9
-
-==== BB 1207 (0x2547813C) approx BBs exec'd 0 ====
-
- 0x2547813C: 93C10008 stw r30,8(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x25478140: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x25478144: 93E1000C stw r31,12(r1)
- 8: GETL R31, t6
- 9: GETL R1, t8
- 10: ADDL $0xC, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x25478148: 90610014 stw r3,20(r1)
- 13: GETL R3, t10
- 14: GETL R1, t12
- 15: ADDL $0x14, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x2547814C: 3800FFFD li r0,-3
- 18: MOVL $0xFFFFFFFD, t14
- 19: PUTL t14, R0
- 20: INCEIPL $4
-
- 0x25478150: 83FE0254 lwz r31,596(r30)
- 21: GETL R30, t16
- 22: ADDL $0x254, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R31
- 25: INCEIPL $4
-
- 0x25478154: 807F0000 lwz r3,0(r31)
- 26: GETL R31, t20
- 27: LDL (t20), t22
- 28: PUTL t22, R3
- 29: INCEIPL $4
-
- 0x25478158: 3923FFFF addi r9,r3,-1
- 30: GETL R3, t24
- 31: ADDL $0xFFFFFFFF, t24
- 32: PUTL t24, R9
- 33: INCEIPL $4
-
- 0x2547815C: 7F890040 cmpl cr7,r9,r0
- 34: GETL R9, t26
- 35: GETL R0, t28
- 36: CMPUL t26, t28, t30 (-rSo)
- 37: ICRFL t30, $0x7, CR
- 38: INCEIPL $4
-
- 0x25478160: 409D001C bc 4,29,0x2547817C
- 39: Jc29o $0x2547817C
-
-
-. 0 2547813C 40
-. 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 61 00 14 38 00 FF FD 83 FE 02 54 80 7F 00 00 39 23 FF FF 7F 89 00 40 40 9D 00 1C
-
-==== BB 1208 (0x2547817C) approx BBs exec'd 0 ====
-
- 0x2547817C: 80BE025C lwz r5,604(r30)
- 0: GETL R30, t0
- 1: ADDL $0x25C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x25478180: 80850000 lwz r4,0(r5)
- 5: GETL R5, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R4
- 8: INCEIPL $4
-
- 0x25478184: 4800A625 bl 0x254827A8
- 9: MOVL $0x25478188, t8
- 10: PUTL t8, LR
- 11: JMPo-c $0x254827A8 ($4)
-
-
-. 0 2547817C 12
-. 80 BE 02 5C 80 85 00 00 48 00 A6 25
-
-==== BB 1209 munmap(0x254827A8) approx BBs exec'd 0 ====
-
- 0x254827A8: 3800005B li r0,91
- 0: MOVL $0x5B, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x254827AC: 44000002 sc
- 3: JMPo-sys $0x254827B0 ($4)
-
-
-. 0 254827A8 8
-. 38 00 00 5B 44 00 00 02
-
-==== BB 1210 (0x254827B0) approx BBs exec'd 0 ====
-
- 0x254827B0: 4CA30020 bclr 5,3
- 0: GETL LR, t0
- 1: Jc03o-r t0
-
-
-. 0 254827B0 4
-. 4C A3 00 20
-
-==== BB 1211 (0x25478188) approx BBs exec'd 0 ====
-
- 0x25478188: 38800000 li r4,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0x2547818C: 80C10014 lwz r6,20(r1)
- 3: GETL R1, t2
- 4: ADDL $0x14, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R6
- 7: INCEIPL $4
-
- 0x25478190: 909F0000 stw r4,0(r31)
- 8: GETL R4, t6
- 9: GETL R31, t8
- 10: STL t6, (t8)
- 11: INCEIPL $4
-
- 0x25478194: 83C10008 lwz r30,8(r1)
- 12: GETL R1, t10
- 13: ADDL $0x8, t10
- 14: LDL (t10), t12
- 15: PUTL t12, R30
- 16: INCEIPL $4
-
- 0x25478198: 7CC803A6 mtlr r6
- 17: GETL R6, t14
- 18: PUTL t14, LR
- 19: INCEIPL $4
-
- 0x2547819C: 83E1000C lwz r31,12(r1)
- 20: GETL R1, t16
- 21: ADDL $0xC, t16
- 22: LDL (t16), t18
- 23: PUTL t18, R31
- 24: INCEIPL $4
-
- 0x254781A0: 38210010 addi r1,r1,16
- 25: GETL R1, t20
- 26: ADDL $0x10, t20
- 27: PUTL t20, R1
- 28: INCEIPL $4
-
- 0x254781A4: 4E800020 blr
- 29: GETL LR, t22
- 30: JMPo-r t22 ($4)
-
-
-. 0 25478188 32
-. 38 80 00 00 80 C1 00 14 90 9F 00 00 83 C1 00 08 7C C8 03 A6 83 E1 00 0C 38 21 00 10 4E 80 00 20
-
-==== BB 1212 (0x25472B78) approx BBs exec'd 0 ====
-
- 0x25472B78: 81010000 lwz r8,0(r1)
- 0: GETL R1, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R8
- 3: INCEIPL $4
-
- 0x25472B7C: 82280004 lwz r17,4(r8)
- 4: GETL R8, t4
- 5: ADDL $0x4, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R17
- 8: INCEIPL $4
-
- 0x25472B80: 8188FFB4 lwz r12,-76(r8)
- 9: GETL R8, t8
- 10: ADDL $0xFFFFFFB4, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R12
- 13: INCEIPL $4
-
- 0x25472B84: 7E2803A6 mtlr r17
- 14: GETL R17, t12
- 15: PUTL t12, LR
- 16: INCEIPL $4
-
- 0x25472B88: 81C8FFB8 lwz r14,-72(r8)
- 17: GETL R8, t14
- 18: ADDL $0xFFFFFFB8, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R14
- 21: INCEIPL $4
-
- 0x25472B8C: 81E8FFBC lwz r15,-68(r8)
- 22: GETL R8, t18
- 23: ADDL $0xFFFFFFBC, t18
- 24: LDL (t18), t20
- 25: PUTL t20, R15
- 26: INCEIPL $4
-
- 0x25472B90: 7D818120 mtcrf 0x18,r12
- 27: GETL R12, t22
- 28: ICRFL t22, $0x3, CR
- 29: ICRFL t22, $0x4, CR
- 30: INCEIPL $4
-
- 0x25472B94: 8208FFC0 lwz r16,-64(r8)
- 31: GETL R8, t24
- 32: ADDL $0xFFFFFFC0, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R16
- 35: INCEIPL $4
-
- 0x25472B98: 8228FFC4 lwz r17,-60(r8)
- 36: GETL R8, t28
- 37: ADDL $0xFFFFFFC4, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R17
- 40: INCEIPL $4
-
- 0x25472B9C: 8248FFC8 lwz r18,-56(r8)
- 41: GETL R8, t32
- 42: ADDL $0xFFFFFFC8, t32
- 43: LDL (t32), t34
- 44: PUTL t34, R18
- 45: INCEIPL $4
-
- 0x25472BA0: 8268FFCC lwz r19,-52(r8)
- 46: GETL R8, t36
- 47: ADDL $0xFFFFFFCC, t36
- 48: LDL (t36), t38
- 49: PUTL t38, R19
- 50: INCEIPL $4
-
- 0x25472BA4: 8288FFD0 lwz r20,-48(r8)
- 51: GETL R8, t40
- 52: ADDL $0xFFFFFFD0, t40
- 53: LDL (t40), t42
- 54: PUTL t42, R20
- 55: INCEIPL $4
-
- 0x25472BA8: 82A8FFD4 lwz r21,-44(r8)
- 56: GETL R8, t44
- 57: ADDL $0xFFFFFFD4, t44
- 58: LDL (t44), t46
- 59: PUTL t46, R21
- 60: INCEIPL $4
-
- 0x25472BAC: 82C8FFD8 lwz r22,-40(r8)
- 61: GETL R8, t48
- 62: ADDL $0xFFFFFFD8, t48
- 63: LDL (t48), t50
- 64: PUTL t50, R22
- 65: INCEIPL $4
-
- 0x25472BB0: 82E8FFDC lwz r23,-36(r8)
- 66: GETL R8, t52
- 67: ADDL $0xFFFFFFDC, t52
- 68: LDL (t52), t54
- 69: PUTL t54, R23
- 70: INCEIPL $4
-
- 0x25472BB4: 8308FFE0 lwz r24,-32(r8)
- 71: GETL R8, t56
- 72: ADDL $0xFFFFFFE0, t56
- 73: LDL (t56), t58
- 74: PUTL t58, R24
- 75: INCEIPL $4
-
- 0x25472BB8: 8328FFE4 lwz r25,-28(r8)
- 76: GETL R8, t60
- 77: ADDL $0xFFFFFFE4, t60
- 78: LDL (t60), t62
- 79: PUTL t62, R25
- 80: INCEIPL $4
-
- 0x25472BBC: 8348FFE8 lwz r26,-24(r8)
- 81: GETL R8, t64
- 82: ADDL $0xFFFFFFE8, t64
- 83: LDL (t64), t66
- 84: PUTL t66, R26
- 85: INCEIPL $4
-
- 0x25472BC0: 8368FFEC lwz r27,-20(r8)
- 86: GETL R8, t68
- 87: ADDL $0xFFFFFFEC, t68
- 88: LDL (t68), t70
- 89: PUTL t70, R27
- 90: INCEIPL $4
-
- 0x25472BC4: 8388FFF0 lwz r28,-16(r8)
- 91: GETL R8, t72
- 92: ADDL $0xFFFFFFF0, t72
- 93: LDL (t72), t74
- 94: PUTL t74, R28
- 95: INCEIPL $4
-
- 0x25472BC8: 83A8FFF4 lwz r29,-12(r8)
- 96: GETL R8, t76
- 97: ADDL $0xFFFFFFF4, t76
- 98: LDL (t76), t78
- 99: PUTL t78, R29
- 100: INCEIPL $4
-
- 0x25472BCC: 83C8FFF8 lwz r30,-8(r8)
- 101: GETL R8, t80
- 102: ADDL $0xFFFFFFF8, t80
- 103: LDL (t80), t82
- 104: PUTL t82, R30
- 105: INCEIPL $4
-
- 0x25472BD0: 83E8FFFC lwz r31,-4(r8)
- 106: GETL R8, t84
- 107: ADDL $0xFFFFFFFC, t84
- 108: LDL (t84), t86
- 109: PUTL t86, R31
- 110: INCEIPL $4
-
- 0x25472BD4: 7D014378 or r1,r8,r8
- 111: GETL R8, t88
- 112: PUTL t88, R1
- 113: INCEIPL $4
-
- 0x25472BD8: 4E800020 blr
- 114: GETL LR, t90
- 115: JMPo-r t90 ($4)
-
-
-. 0 25472B78 100
-. 81 01 00 00 82 28 00 04 81 88 FF B4 7E 28 03 A6 81 C8 FF B8 81 E8 FF BC 7D 81 81 20 82 08 FF C0 82 28 FF C4 82 48 FF C8 82 68 FF CC 82 88 FF D0 82 A8 FF D4 82 C8 FF D8 82 E8 FF DC 83 08 FF E0 83 28 FF E4 83 48 FF E8 83 68 FF EC 83 88 FF F0 83 A8 FF F4 83 C8 FF F8 83 E8 FF FC 7D 01 43 78 4E 80 00 20
-
-==== BB 1213 (0x2547F324) approx BBs exec'd 0 ====
-
- 0x2547F324: 82A10224 lwz r21,548(r1)
- 0: GETL R1, t0
- 1: ADDL $0x224, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R21
- 4: INCEIPL $4
-
- 0x2547F328: 806101E0 lwz r3,480(r1)
- 5: GETL R1, t4
- 6: ADDL $0x1E0, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x2547F32C: 7EA803A6 mtlr r21
- 10: GETL R21, t8
- 11: PUTL t8, LR
- 12: INCEIPL $4
-
- 0x2547F330: 82C101F8 lwz r22,504(r1)
- 13: GETL R1, t10
- 14: ADDL $0x1F8, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R22
- 17: INCEIPL $4
-
- 0x2547F334: 82A101F4 lwz r21,500(r1)
- 18: GETL R1, t14
- 19: ADDL $0x1F4, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R21
- 22: INCEIPL $4
-
- 0x2547F338: 82E101FC lwz r23,508(r1)
- 23: GETL R1, t18
- 24: ADDL $0x1FC, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R23
- 27: INCEIPL $4
-
- 0x2547F33C: 83010200 lwz r24,512(r1)
- 28: GETL R1, t22
- 29: ADDL $0x200, t22
- 30: LDL (t22), t24
- 31: PUTL t24, R24
- 32: INCEIPL $4
-
- 0x2547F340: 83210204 lwz r25,516(r1)
- 33: GETL R1, t26
- 34: ADDL $0x204, t26
- 35: LDL (t26), t28
- 36: PUTL t28, R25
- 37: INCEIPL $4
-
- 0x2547F344: 83410208 lwz r26,520(r1)
- 38: GETL R1, t30
- 39: ADDL $0x208, t30
- 40: LDL (t30), t32
- 41: PUTL t32, R26
- 42: INCEIPL $4
-
- 0x2547F348: 8361020C lwz r27,524(r1)
- 43: GETL R1, t34
- 44: ADDL $0x20C, t34
- 45: LDL (t34), t36
- 46: PUTL t36, R27
- 47: INCEIPL $4
-
- 0x2547F34C: 83810210 lwz r28,528(r1)
- 48: GETL R1, t38
- 49: ADDL $0x210, t38
- 50: LDL (t38), t40
- 51: PUTL t40, R28
- 52: INCEIPL $4
-
- 0x2547F350: 83A10214 lwz r29,532(r1)
- 53: GETL R1, t42
- 54: ADDL $0x214, t42
- 55: LDL (t42), t44
- 56: PUTL t44, R29
- 57: INCEIPL $4
-
- 0x2547F354: 83C10218 lwz r30,536(r1)
- 58: GETL R1, t46
- 59: ADDL $0x218, t46
- 60: LDL (t46), t48
- 61: PUTL t48, R30
- 62: INCEIPL $4
-
- 0x2547F358: 83E1021C lwz r31,540(r1)
- 63: GETL R1, t50
- 64: ADDL $0x21C, t50
- 65: LDL (t50), t52
- 66: PUTL t52, R31
- 67: INCEIPL $4
-
- 0x2547F35C: 38210220 addi r1,r1,544
- 68: GETL R1, t54
- 69: ADDL $0x220, t54
- 70: PUTL t54, R1
- 71: INCEIPL $4
-
- 0x2547F360: 4E800020 blr
- 72: GETL LR, t56
- 73: JMPo-r t56 ($4)
-
-
-. 0 2547F324 64
-. 82 A1 02 24 80 61 01 E0 7E A8 03 A6 82 C1 01 F8 82 A1 01 F4 82 E1 01 FC 83 01 02 00 83 21 02 04 83 41 02 08 83 61 02 0C 83 81 02 10 83 A1 02 14 83 C1 02 18 83 E1 02 1C 38 21 02 20 4E 80 00 20
-
-==== BB 1214 (0x25471A20) approx BBs exec'd 0 ====
-
- 0x25471A20: 813E04F4 lwz r9,1268(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4F4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x25471A24: 7C7D1B78 or r29,r3,r3
- 5: GETL R3, t4
- 6: PUTL t4, R29
- 7: INCEIPL $4
-
- 0x25471A28: 38600000 li r3,0
- 8: MOVL $0x0, t6
- 9: PUTL t6, R3
- 10: INCEIPL $4
-
- 0x25471A2C: 80090000 lwz r0,0(r9)
- 11: GETL R9, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R0
- 14: INCEIPL $4
-
- 0x25471A30: 70090080 andi. r9,r0,0x80
- 15: GETL R0, t12
- 16: ANDL $0x80, t12
- 17: PUTL t12, R9
- 18: CMP0L t12, t14 (-rSo)
- 19: ICRFL t14, $0x0, CR
- 20: INCEIPL $4
-
- 0x25471A34: 40820028 bc 4,2,0x25471A5C
- 21: Jc02o $0x25471A5C
-
-
-. 0 25471A20 24
-. 81 3E 04 F4 7C 7D 1B 78 38 60 00 00 80 09 00 00 70 09 00 80 40 82 00 28
-
-==== BB 1215 (0x25471A38) approx BBs exec'd 0 ====
-
- 0x25471A38: 80810024 lwz r4,36(r1)
- 0: GETL R1, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x25471A3C: 7FA3EB78 or r3,r29,r29
- 5: GETL R29, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x25471A40: 8361000C lwz r27,12(r1)
- 8: GETL R1, t6
- 9: ADDL $0xC, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R27
- 12: INCEIPL $4
-
- 0x25471A44: 83810010 lwz r28,16(r1)
- 13: GETL R1, t10
- 14: ADDL $0x10, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R28
- 17: INCEIPL $4
-
- 0x25471A48: 7C8803A6 mtlr r4
- 18: GETL R4, t14
- 19: PUTL t14, LR
- 20: INCEIPL $4
-
- 0x25471A4C: 83A10014 lwz r29,20(r1)
- 21: GETL R1, t16
- 22: ADDL $0x14, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R29
- 25: INCEIPL $4
-
- 0x25471A50: 83C10018 lwz r30,24(r1)
- 26: GETL R1, t20
- 27: ADDL $0x18, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R30
- 30: INCEIPL $4
-
- 0x25471A54: 38210020 addi r1,r1,32
- 31: GETL R1, t24
- 32: ADDL $0x20, t24
- 33: PUTL t24, R1
- 34: INCEIPL $4
-
- 0x25471A58: 4E800020 blr
- 35: GETL LR, t26
- 36: JMPo-r t26 ($4)
-
-
-. 0 25471A38 36
-. 80 81 00 24 7F A3 EB 78 83 61 00 0C 83 81 00 10 7C 88 03 A6 83 A1 00 14 83 C1 00 18 38 21 00 20 4E 80 00 20
-
-==== BB 1216 (0x25471DD0) approx BBs exec'd 0 ====
-
- 0x25471DD0: 82E102B4 lwz r23,692(r1)
- 0: GETL R1, t0
- 1: ADDL $0x2B4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R23
- 4: INCEIPL $4
-
- 0x25471DD4: 83010290 lwz r24,656(r1)
- 5: GETL R1, t4
- 6: ADDL $0x290, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R24
- 9: INCEIPL $4
-
- 0x25471DD8: 7EE803A6 mtlr r23
- 10: GETL R23, t8
- 11: PUTL t8, LR
- 12: INCEIPL $4
-
- 0x25471DDC: 83210294 lwz r25,660(r1)
- 13: GETL R1, t10
- 14: ADDL $0x294, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R25
- 17: INCEIPL $4
-
- 0x25471DE0: 82E1028C lwz r23,652(r1)
- 18: GETL R1, t14
- 19: ADDL $0x28C, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R23
- 22: INCEIPL $4
-
- 0x25471DE4: 83410298 lwz r26,664(r1)
- 23: GETL R1, t18
- 24: ADDL $0x298, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R26
- 27: INCEIPL $4
-
- 0x25471DE8: 8361029C lwz r27,668(r1)
- 28: GETL R1, t22
- 29: ADDL $0x29C, t22
- 30: LDL (t22), t24
- 31: PUTL t24, R27
- 32: INCEIPL $4
-
- 0x25471DEC: 838102A0 lwz r28,672(r1)
- 33: GETL R1, t26
- 34: ADDL $0x2A0, t26
- 35: LDL (t26), t28
- 36: PUTL t28, R28
- 37: INCEIPL $4
-
- 0x25471DF0: 83A102A4 lwz r29,676(r1)
- 38: GETL R1, t30
- 39: ADDL $0x2A4, t30
- 40: LDL (t30), t32
- 41: PUTL t32, R29
- 42: INCEIPL $4
-
- 0x25471DF4: 83C102A8 lwz r30,680(r1)
- 43: GETL R1, t34
- 44: ADDL $0x2A8, t34
- 45: LDL (t34), t36
- 46: PUTL t36, R30
- 47: INCEIPL $4
-
- 0x25471DF8: 83E102AC lwz r31,684(r1)
- 48: GETL R1, t38
- 49: ADDL $0x2AC, t38
- 50: LDL (t38), t40
- 51: PUTL t40, R31
- 52: INCEIPL $4
-
- 0x25471DFC: 382102B0 addi r1,r1,688
- 53: GETL R1, t42
- 54: ADDL $0x2B0, t42
- 55: PUTL t42, R1
- 56: INCEIPL $4
-
- 0x25471E00: 4E800020 blr
- 57: GETL LR, t44
- 58: JMPo-r t44 ($4)
-
-
-. 0 25471DD0 52
-. 82 E1 02 B4 83 01 02 90 7E E8 03 A6 83 21 02 94 82 E1 02 8C 83 41 02 98 83 61 02 9C 83 81 02 A0 83 A1 02 A4 83 C1 02 A8 83 E1 02 AC 38 21 02 B0 4E 80 00 20
-
-==== BB 1217 (0x254804E8) approx BBs exec'd 0 ====
-
- 0x254804E8: 48016B19 bl 0x25497000
- 0: MOVL $0x254804EC, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x25497000 ($4)
-
-
-. 0 254804E8 4
-. 48 01 6B 19
-
-==== BB 1218 (0x254804EC) approx BBs exec'd 0 ====
-
- 0x254804EC: 7FE802A6 mflr r31
- 0: GETL LR, t0
- 1: PUTL t0, R31
- 2: INCEIPL $4
-
- 0x254804F0: 7C7E1B78 or r30,r3,r3
- 3: GETL R3, t2
- 4: PUTL t2, R30
- 5: INCEIPL $4
-
- 0x254804F4: 839F0498 lwz r28,1176(r31)
- 6: GETL R31, t4
- 7: ADDL $0x498, t4
- 8: LDL (t4), t6
- 9: PUTL t6, R28
- 10: INCEIPL $4
-
- 0x254804F8: 83BF04D0 lwz r29,1232(r31)
- 11: GETL R31, t8
- 12: ADDL $0x4D0, t8
- 13: LDL (t8), t10
- 14: PUTL t10, R29
- 15: INCEIPL $4
-
- 0x254804FC: 837F04DC lwz r27,1244(r31)
- 16: GETL R31, t12
- 17: ADDL $0x4DC, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R27
- 20: INCEIPL $4
-
- 0x25480500: 807C0000 lwz r3,0(r28)
- 21: GETL R28, t16
- 22: LDL (t16), t18
- 23: PUTL t18, R3
- 24: INCEIPL $4
-
- 0x25480504: 809D0000 lwz r4,0(r29)
- 25: GETL R29, t20
- 26: LDL (t20), t22
- 27: PUTL t22, R4
- 28: INCEIPL $4
-
- 0x25480508: 80BB0000 lwz r5,0(r27)
- 29: GETL R27, t24
- 30: LDL (t24), t26
- 31: PUTL t26, R5
- 32: INCEIPL $4
-
- 0x2548050C: 5486103A rlwinm r6,r4,2,0,29
- 33: GETL R4, t28
- 34: SHLL $0x2, t28
- 35: PUTL t28, R6
- 36: INCEIPL $4
-
- 0x25480510: 7CC53214 add r6,r5,r6
- 37: GETL R5, t30
- 38: GETL R6, t32
- 39: ADDL t30, t32
- 40: PUTL t32, R6
- 41: INCEIPL $4
-
- 0x25480514: 38C60004 addi r6,r6,4
- 42: GETL R6, t34
- 43: ADDL $0x4, t34
- 44: PUTL t34, R6
- 45: INCEIPL $4
-
- 0x25480518: 4BFFB229 bl 0x2547B740
- 46: MOVL $0x2548051C, t36
- 47: PUTL t36, LR
- 48: JMPo-c $0x2547B740 ($4)
-
-
-. 0 254804EC 48
-. 7F E8 02 A6 7C 7E 1B 78 83 9F 04 98 83 BF 04 D0 83 7F 04 DC 80 7C 00 00 80 9D 00 00 80 BB 00 00 54 86 10 3A 7C C5 32 14 38 C6 00 04 4B FF B2 29
-
-==== BB 1219 _dl_init_internal(0x2547B740) approx BBs exec'd 0 ====
-
- 0x2547B740: 9421FFC0 stwu r1,-64(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFC0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547B744: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x2547B748: 4801B8B9 bl 0x25497000
- 9: MOVL $0x2547B74C, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547B740 12
-. 94 21 FF C0 7C 08 02 A6 48 01 B8 B9
-
-==== BB 1220 (0x2547B74C) approx BBs exec'd 0 ====
-
- 0x2547B74C: 93C10038 stw r30,56(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x38, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547B750: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x2547B754: 92C10018 stw r22,24(r1)
- 8: GETL R22, t6
- 9: GETL R1, t8
- 10: ADDL $0x18, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0x2547B758: 90010044 stw r0,68(r1)
- 13: GETL R0, t10
- 14: GETL R1, t12
- 15: ADDL $0x44, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0x2547B75C: 93E1003C stw r31,60(r1)
- 18: GETL R31, t14
- 19: GETL R1, t16
- 20: ADDL $0x3C, t16
- 21: STL t14, (t16)
- 22: INCEIPL $4
-
- 0x2547B760: 82DE04C8 lwz r22,1224(r30)
- 23: GETL R30, t18
- 24: ADDL $0x4C8, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R22
- 27: INCEIPL $4
-
- 0x2547B764: 92E1001C stw r23,28(r1)
- 28: GETL R23, t22
- 29: GETL R1, t24
- 30: ADDL $0x1C, t24
- 31: STL t22, (t24)
- 32: INCEIPL $4
-
- 0x2547B768: 7C972378 or r23,r4,r4
- 33: GETL R4, t26
- 34: PUTL t26, R23
- 35: INCEIPL $4
-
- 0x2547B76C: 83F601A0 lwz r31,416(r22)
- 36: GETL R22, t28
- 37: ADDL $0x1A0, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R31
- 40: INCEIPL $4
-
- 0x2547B770: 93010020 stw r24,32(r1)
- 41: GETL R24, t32
- 42: GETL R1, t34
- 43: ADDL $0x20, t34
- 44: STL t32, (t34)
- 45: INCEIPL $4
-
- 0x2547B774: 7CB82B78 or r24,r5,r5
- 46: GETL R5, t36
- 47: PUTL t36, R24
- 48: INCEIPL $4
-
- 0x2547B778: 2F9F0000 cmpi cr7,r31,0
- 49: GETL R31, t38
- 50: CMP0L t38, t40 (-rSo)
- 51: ICRFL t40, $0x7, CR
- 52: INCEIPL $4
-
- 0x2547B77C: 93210024 stw r25,36(r1)
- 53: GETL R25, t42
- 54: GETL R1, t44
- 55: ADDL $0x24, t44
- 56: STL t42, (t44)
- 57: INCEIPL $4
-
- 0x2547B780: 93410028 stw r26,40(r1)
- 58: GETL R26, t46
- 59: GETL R1, t48
- 60: ADDL $0x28, t48
- 61: STL t46, (t48)
- 62: INCEIPL $4
-
- 0x2547B784: 7CD93378 or r25,r6,r6
- 63: GETL R6, t50
- 64: PUTL t50, R25
- 65: INCEIPL $4
-
- 0x2547B788: 9361002C stw r27,44(r1)
- 66: GETL R27, t52
- 67: GETL R1, t54
- 68: ADDL $0x2C, t54
- 69: STL t52, (t54)
- 70: INCEIPL $4
-
- 0x2547B78C: 7C7A1B78 or r26,r3,r3
- 71: GETL R3, t56
- 72: PUTL t56, R26
- 73: INCEIPL $4
-
- 0x2547B790: 93A10034 stw r29,52(r1)
- 74: GETL R29, t58
- 75: GETL R1, t60
- 76: ADDL $0x34, t60
- 77: STL t58, (t60)
- 78: INCEIPL $4
-
- 0x2547B794: 92810010 stw r20,16(r1)
- 79: GETL R20, t62
- 80: GETL R1, t64
- 81: ADDL $0x10, t64
- 82: STL t62, (t64)
- 83: INCEIPL $4
-
- 0x2547B798: 92A10014 stw r21,20(r1)
- 84: GETL R21, t66
- 85: GETL R1, t68
- 86: ADDL $0x14, t68
- 87: STL t66, (t68)
- 88: INCEIPL $4
-
- 0x2547B79C: 93810030 stw r28,48(r1)
- 89: GETL R28, t70
- 90: GETL R1, t72
- 91: ADDL $0x30, t72
- 92: STL t70, (t72)
- 93: INCEIPL $4
-
- 0x2547B7A0: 83A300A0 lwz r29,160(r3)
- 94: GETL R3, t74
- 95: ADDL $0xA0, t74
- 96: LDL (t74), t76
- 97: PUTL t76, R29
- 98: INCEIPL $4
-
- 0x2547B7A4: 836300A4 lwz r27,164(r3)
- 99: GETL R3, t78
- 100: ADDL $0xA4, t78
- 101: LDL (t78), t80
- 102: PUTL t80, R27
- 103: INCEIPL $4
-
- 0x2547B7A8: 409E019C bc 4,30,0x2547B944
- 104: Jc30o $0x2547B944
-
-
-. 0 2547B74C 96
-. 93 C1 00 38 7F C8 02 A6 92 C1 00 18 90 01 00 44 93 E1 00 3C 82 DE 04 C8 92 E1 00 1C 7C 97 23 78 83 F6 01 A0 93 01 00 20 7C B8 2B 78 2F 9F 00 00 93 21 00 24 93 41 00 28 7C D9 33 78 93 61 00 2C 7C 7A 1B 78 93 A1 00 34 92 81 00 10 92 A1 00 14 93 81 00 30 83 A3 00 A0 83 63 00 A4 40 9E 01 9C
-
-==== BB 1221 (0x2547B944) approx BBs exec'd 0 ====
-
- 0x2547B944: 801F0180 lwz r0,384(r31)
- 0: GETL R31, t0
- 1: ADDL $0x180, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x2547B948: 74091000 andis. r9,r0,0x1000
- 5: GETL R0, t4
- 6: ANDL $0x10000000, t4
- 7: PUTL t4, R9
- 8: CMP0L t4, t6 (-rSo)
- 9: ICRFL t6, $0x0, CR
- 10: INCEIPL $4
-
- 0x2547B94C: 40820110 bc 4,2,0x2547BA5C
- 11: Jc02o $0x2547BA5C
-
-
-. 0 2547B944 12
-. 80 1F 01 80 74 09 10 00 40 82 01 10
-
-==== BB 1222 (0x2547B950) approx BBs exec'd 0 ====
-
- 0x2547B950: 64091000 oris r9,r0,0x1000
- 0: GETL R0, t0
- 1: ORL $0x10000000, t0
- 2: PUTL t0, R9
- 3: INCEIPL $4
-
- 0x2547B954: 809F0004 lwz r4,4(r31)
- 4: GETL R31, t2
- 5: ADDL $0x4, t2
- 6: LDL (t2), t4
- 7: PUTL t4, R4
- 8: INCEIPL $4
-
- 0x2547B958: 913F0180 stw r9,384(r31)
- 9: GETL R9, t6
- 10: GETL R31, t8
- 11: ADDL $0x180, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547B95C: 88640000 lbz r3,0(r4)
- 14: GETL R4, t10
- 15: LDB (t10), t12
- 16: PUTL t12, R3
- 17: INCEIPL $4
-
- 0x2547B960: 2F030000 cmpi cr6,r3,0
- 18: GETL R3, t14
- 19: CMP0L t14, t16 (-rSo)
- 20: ICRFL t16, $0x6, CR
- 21: INCEIPL $4
-
- 0x2547B964: 419A00F0 bc 12,26,0x2547BA54
- 22: Js26o $0x2547BA54
-
-
-. 0 2547B950 24
-. 64 09 10 00 80 9F 00 04 91 3F 01 80 88 64 00 00 2F 03 00 00 41 9A 00 F0
-
-==== BB 1223 (0x2547B968) approx BBs exec'd 0 ====
-
- 0x2547B968: 815F0050 lwz r10,80(r31)
- 0: GETL R31, t0
- 1: ADDL $0x50, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x2547B96C: 2C8A0000 cmpi cr1,r10,0
- 5: GETL R10, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x2547B970: 40860010 bc 4,6,0x2547B980
- 9: Jc06o $0x2547B980
-
-
-. 0 2547B968 12
-. 81 5F 00 50 2C 8A 00 00 40 86 00 10
-
-==== BB 1224 (0x2547B980) approx BBs exec'd 0 ====
-
- 0x2547B980: 813E04F4 lwz r9,1268(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4F4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547B984: 80C90000 lwz r6,0(r9)
- 5: GETL R9, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R6
- 8: INCEIPL $4
-
- 0x2547B988: 70C90002 andi. r9,r6,0x2
- 9: GETL R6, t8
- 10: ANDL $0x2, t8
- 11: PUTL t8, R9
- 12: CMP0L t8, t10 (-rSo)
- 13: ICRFL t10, $0x0, CR
- 14: INCEIPL $4
-
- 0x2547B98C: 40820130 bc 4,2,0x2547BABC
- 15: Jc02o $0x2547BABC
-
-
-. 0 2547B980 16
-. 81 3E 04 F4 80 C9 00 00 70 C9 00 02 40 82 01 30
-
-==== BB 1225 (0x2547B990) approx BBs exec'd 0 ====
-
- 0x2547B990: 2F0A0000 cmpi cr6,r10,0
- 0: GETL R10, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x2547B994: 409A00D4 bc 4,26,0x2547BA68
- 4: Jc26o $0x2547BA68
-
-
-. 0 2547B990 8
-. 2F 0A 00 00 40 9A 00 D4
-
-==== BB 1226 (0x2547BA68) approx BBs exec'd 0 ====
-
- 0x2547BA68: 818A0004 lwz r12,4(r10)
- 0: GETL R10, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R12
- 4: INCEIPL $4
-
- 0x2547BA6C: 7EE3BB78 or r3,r23,r23
- 5: GETL R23, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x2547BA70: 811F0000 lwz r8,0(r31)
- 8: GETL R31, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R8
- 11: INCEIPL $4
-
- 0x2547BA74: 7F04C378 or r4,r24,r24
- 12: GETL R24, t10
- 13: PUTL t10, R4
- 14: INCEIPL $4
-
- 0x2547BA78: 7F25CB78 or r5,r25,r25
- 15: GETL R25, t12
- 16: PUTL t12, R5
- 17: INCEIPL $4
-
- 0x2547BA7C: 7CE86214 add r7,r8,r12
- 18: GETL R8, t14
- 19: GETL R12, t16
- 20: ADDL t14, t16
- 21: PUTL t16, R7
- 22: INCEIPL $4
-
- 0x2547BA80: 7CE903A6 mtctr r7
- 23: GETL R7, t18
- 24: PUTL t18, CTR
- 25: INCEIPL $4
-
- 0x2547BA84: 4E800421 bctrl
- 26: MOVL $0x2547BA88, t20
- 27: PUTL t20, LR
- 28: GETL CTR, t22
- 29: JMPo-c t22 ($4)
-
-
-. 0 2547BA68 32
-. 81 8A 00 04 7E E3 BB 78 81 1F 00 00 7F 04 C3 78 7F 25 CB 78 7C E8 62 14 7C E9 03 A6 4E 80 04 21
-
-==== BB 1227 (0xFFDE898) approx BBs exec'd 0 ====
-
- 0xFFDE898: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFFDE89C: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFFDE8A0: 90010014 stw r0,20(r1)
- 9: GETL R0, t6
- 10: GETL R1, t8
- 11: ADDL $0x14, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0xFFDE8A4: 4800001D bl 0xFFDE8C0
- 14: MOVL $0xFFDE8A8, t10
- 15: PUTL t10, LR
- 16: JMPo-c $0xFFDE8C0 ($4)
-
-
-. 0 FFDE898 16
-. 94 21 FF F0 7C 08 02 A6 90 01 00 14 48 00 00 1D
-
-==== BB 1228 (0xFFDE8C0) approx BBs exec'd 0 ====
-
- 0xFFDE8C0: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFFDE8C4: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFFDE8C8: 93C10008 stw r30,8(r1)
- 9: GETL R30, t6
- 10: GETL R1, t8
- 11: ADDL $0x8, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0xFFDE8CC: 90010014 stw r0,20(r1)
- 14: GETL R0, t10
- 15: GETL R1, t12
- 16: ADDL $0x14, t12
- 17: STL t10, (t12)
- 18: INCEIPL $4
-
- 0xFFDE8D0: 48010839 bl 0xFFEF108
- 19: MOVL $0xFFDE8D4, t14
- 20: PUTL t14, LR
- 21: JMPo-c $0xFFEF108 ($4)
-
-
-. 0 FFDE8C0 20
-. 94 21 FF F0 7C 08 02 A6 93 C1 00 08 90 01 00 14 48 01 08 39
-
-==== BB 1229 (0xFFEF108) approx BBs exec'd 0 ====
-
- 0xFFEF108: 4E800021 blrl
- 0: GETL LR, t0
- 1: MOVL $0xFFEF10C, t2
- 2: PUTL t2, LR
- 3: JMPo-r t0 ($4)
-
-
-. 0 FFEF108 4
-. 4E 80 00 21
-
-==== BB 1230 (0xFFDE8D4) approx BBs exec'd 0 ====
-
- 0xFFDE8D4: 7FC802A6 mflr r30
- 0: GETL LR, t0
- 1: PUTL t0, R30
- 2: INCEIPL $4
-
- 0xFFDE8D8: 801E000C lwz r0,12(r30)
- 3: GETL R30, t2
- 4: ADDL $0xC, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R0
- 7: INCEIPL $4
-
- 0xFFDE8DC: 2F800000 cmpi cr7,r0,0
- 8: GETL R0, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x7, CR
- 11: INCEIPL $4
-
- 0xFFDE8E0: 419E000C bc 12,30,0xFFDE8EC
- 12: Js30o $0xFFDE8EC
-
-
-. 0 FFDE8D4 16
-. 7F C8 02 A6 80 1E 00 0C 2F 80 00 00 41 9E 00 0C
-
-==== BB 1231 (0xFFDE8EC) approx BBs exec'd 0 ====
-
- 0xFFDE8EC: 80010014 lwz r0,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0xFFDE8F0: 7C0803A6 mtlr r0
- 5: GETL R0, t4
- 6: PUTL t4, LR
- 7: INCEIPL $4
-
- 0xFFDE8F4: 83C10008 lwz r30,8(r1)
- 8: GETL R1, t6
- 9: ADDL $0x8, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R30
- 12: INCEIPL $4
-
- 0xFFDE8F8: 38210010 addi r1,r1,16
- 13: GETL R1, t10
- 14: ADDL $0x10, t10
- 15: PUTL t10, R1
- 16: INCEIPL $4
-
- 0xFFDE8FC: 4E800020 blr
- 17: GETL LR, t12
- 18: JMPo-r t12 ($4)
-
-
-. 0 FFDE8EC 20
-. 80 01 00 14 7C 08 03 A6 83 C1 00 08 38 21 00 10 4E 80 00 20
-
-==== BB 1232 (0xFFDE8A8) approx BBs exec'd 0 ====
-
- 0xFFDE8A8: 48000115 bl 0xFFDE9BC
- 0: MOVL $0xFFDE8AC, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0xFFDE9BC ($4)
-
-
-. 0 FFDE8A8 4
-. 48 00 01 15
-
-==== BB 1233 (0xFFDE9BC) approx BBs exec'd 0 ====
-
- 0xFFDE9BC: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFFDE9C0: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFFDE9C4: 429F0005 bcl 20,31,0xFFDE9C8
- 9: MOVL $0xFFDE9C8, t6
- 10: PUTL t6, LR
- 11: INCEIPL $4
-
- 0xFFDE9C8: 93C10008 stw r30,8(r1)
- 12: GETL R30, t8
- 13: GETL R1, t10
- 14: ADDL $0x8, t10
- 15: STL t8, (t10)
- 16: INCEIPL $4
-
- 0xFFDE9CC: 7FC802A6 mflr r30
- 17: GETL LR, t12
- 18: PUTL t12, R30
- 19: INCEIPL $4
-
- 0xFFDE9D0: 90010014 stw r0,20(r1)
- 20: GETL R0, t14
- 21: GETL R1, t16
- 22: ADDL $0x14, t16
- 23: STL t14, (t16)
- 24: INCEIPL $4
-
- 0xFFDE9D4: 801EFFF0 lwz r0,-16(r30)
- 25: GETL R30, t18
- 26: ADDL $0xFFFFFFF0, t18
- 27: LDL (t18), t20
- 28: PUTL t20, R0
- 29: INCEIPL $4
-
- 0xFFDE9D8: 7FC0F214 add r30,r0,r30
- 30: GETL R0, t22
- 31: GETL R30, t24
- 32: ADDL t22, t24
- 33: PUTL t24, R30
- 34: INCEIPL $4
-
- 0xFFDE9DC: 807E8010 lwz r3,-32752(r30)
- 35: GETL R30, t26
- 36: ADDL $0xFFFF8010, t26
- 37: LDL (t26), t28
- 38: PUTL t28, R3
- 39: INCEIPL $4
-
- 0xFFDE9E0: 80030000 lwz r0,0(r3)
- 40: GETL R3, t30
- 41: LDL (t30), t32
- 42: PUTL t32, R0
- 43: INCEIPL $4
-
- 0xFFDE9E4: 2F800000 cmpi cr7,r0,0
- 44: GETL R0, t34
- 45: CMP0L t34, t36 (-rSo)
- 46: ICRFL t36, $0x7, CR
- 47: INCEIPL $4
-
- 0xFFDE9E8: 419E0018 bc 12,30,0xFFDEA00
- 48: Js30o $0xFFDEA00
-
-
-. 0 FFDE9BC 48
-. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 90 01 00 14 80 1E FF F0 7F C0 F2 14 80 7E 80 10 80 03 00 00 2F 80 00 00 41 9E 00 18
-
-==== BB 1234 (0xFFDEA00) approx BBs exec'd 0 ====
-
- 0xFFDEA00: 80010014 lwz r0,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0xFFDEA04: 83C10008 lwz r30,8(r1)
- 5: GETL R1, t4
- 6: ADDL $0x8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R30
- 9: INCEIPL $4
-
- 0xFFDEA08: 38210010 addi r1,r1,16
- 10: GETL R1, t8
- 11: ADDL $0x10, t8
- 12: PUTL t8, R1
- 13: INCEIPL $4
-
- 0xFFDEA0C: 7C0803A6 mtlr r0
- 14: GETL R0, t10
- 15: PUTL t10, LR
- 16: INCEIPL $4
-
- 0xFFDEA10: 4E800020 blr
- 17: GETL LR, t12
- 18: JMPo-r t12 ($4)
-
-
-. 0 FFDEA00 20
-. 80 01 00 14 83 C1 00 08 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-==== BB 1235 (0xFFDE8AC) approx BBs exec'd 0 ====
-
- 0xFFDE8AC: 48000659 bl 0xFFDEF04
- 0: MOVL $0xFFDE8B0, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0xFFDEF04 ($4)
-
-
-. 0 FFDE8AC 4
-. 48 00 06 59
-
-==== BB 1236 (0xFFDEF04) approx BBs exec'd 0 ====
-
- 0xFFDEF04: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFFDEF08: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFFDEF0C: 429F0005 bcl 20,31,0xFFDEF10
- 9: MOVL $0xFFDEF10, t6
- 10: PUTL t6, LR
- 11: INCEIPL $4
-
- 0xFFDEF10: 93C10008 stw r30,8(r1)
- 12: GETL R30, t8
- 13: GETL R1, t10
- 14: ADDL $0x8, t10
- 15: STL t8, (t10)
- 16: INCEIPL $4
-
- 0xFFDEF14: 7FC802A6 mflr r30
- 17: GETL LR, t12
- 18: PUTL t12, R30
- 19: INCEIPL $4
-
- 0xFFDEF18: 93E1000C stw r31,12(r1)
- 20: GETL R31, t14
- 21: GETL R1, t16
- 22: ADDL $0xC, t16
- 23: STL t14, (t16)
- 24: INCEIPL $4
-
- 0xFFDEF1C: 90010014 stw r0,20(r1)
- 25: GETL R0, t18
- 26: GETL R1, t20
- 27: ADDL $0x14, t20
- 28: STL t18, (t20)
- 29: INCEIPL $4
-
- 0xFFDEF20: 801EFFF0 lwz r0,-16(r30)
- 30: GETL R30, t22
- 31: ADDL $0xFFFFFFF0, t22
- 32: LDL (t22), t24
- 33: PUTL t24, R0
- 34: INCEIPL $4
-
- 0xFFDEF24: 7FC0F214 add r30,r0,r30
- 35: GETL R0, t26
- 36: GETL R30, t28
- 37: ADDL t26, t28
- 38: PUTL t28, R30
- 39: INCEIPL $4
-
- 0xFFDEF28: 813E8000 lwz r9,-32768(r30)
- 40: GETL R30, t30
- 41: ADDL $0xFFFF8000, t30
- 42: LDL (t30), t32
- 43: PUTL t32, R9
- 44: INCEIPL $4
-
- 0xFFDEF2C: 8009FFFC lwz r0,-4(r9)
- 45: GETL R9, t34
- 46: ADDL $0xFFFFFFFC, t34
- 47: LDL (t34), t36
- 48: PUTL t36, R0
- 49: INCEIPL $4
-
- 0xFFDEF30: 3BE9FFFC addi r31,r9,-4
- 50: GETL R9, t38
- 51: ADDL $0xFFFFFFFC, t38
- 52: PUTL t38, R31
- 53: INCEIPL $4
-
- 0xFFDEF34: 48000010 b 0xFFDEF44
- 54: JMPo $0xFFDEF44 ($4)
-
-
-. 0 FFDEF04 52
-. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 80 1E FF F0 7F C0 F2 14 81 3E 80 00 80 09 FF FC 3B E9 FF FC 48 00 00 10
-
-==== BB 1237 (0xFFDEF44) approx BBs exec'd 0 ====
-
- 0xFFDEF44: 2F80FFFF cmpi cr7,r0,-1
- 0: GETL R0, t0
- 1: MOVL $0xFFFFFFFF, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0xFFDEF48: 409EFFF0 bc 4,30,0xFFDEF38
- 5: Jc30o $0xFFDEF38
-
-
-. 0 FFDEF44 8
-. 2F 80 FF FF 40 9E FF F0
-
-==== BB 1238 (0xFFDEF4C) approx BBs exec'd 0 ====
-
- 0xFFDEF4C: 80010014 lwz r0,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0xFFDEF50: 83C10008 lwz r30,8(r1)
- 5: GETL R1, t4
- 6: ADDL $0x8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R30
- 9: INCEIPL $4
-
- 0xFFDEF54: 83E1000C lwz r31,12(r1)
- 10: GETL R1, t8
- 11: ADDL $0xC, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R31
- 14: INCEIPL $4
-
- 0xFFDEF58: 7C0803A6 mtlr r0
- 15: GETL R0, t12
- 16: PUTL t12, LR
- 17: INCEIPL $4
-
- 0xFFDEF5C: 38210010 addi r1,r1,16
- 18: GETL R1, t14
- 19: ADDL $0x10, t14
- 20: PUTL t14, R1
- 21: INCEIPL $4
-
- 0xFFDEF60: 4E800020 blr
- 22: GETL LR, t16
- 23: JMPo-r t16 ($4)
-
-
-. 0 FFDEF4C 24
-. 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
-
-==== BB 1239 (0xFFDE8B0) approx BBs exec'd 0 ====
-
- 0xFFDE8B0: 80010014 lwz r0,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0xFFDE8B4: 7C0803A6 mtlr r0
- 5: GETL R0, t4
- 6: PUTL t4, LR
- 7: INCEIPL $4
-
- 0xFFDE8B8: 38210010 addi r1,r1,16
- 8: GETL R1, t6
- 9: ADDL $0x10, t6
- 10: PUTL t6, R1
- 11: INCEIPL $4
-
- 0xFFDE8BC: 4E800020 blr
- 12: GETL LR, t8
- 13: JMPo-r t8 ($4)
-
-
-. 0 FFDE8B0 16
-. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
-
-==== BB 1240 (0x2547BA88) approx BBs exec'd 0 ====
-
- 0x2547BA88: 4BFFFF10 b 0x2547B998
- 0: JMPo $0x2547B998 ($4)
-
-
-. 0 2547BA88 4
-. 4B FF FF 10
-
-==== BB 1241 (0x2547B998) approx BBs exec'd 0 ====
-
- 0x2547B998: 817F0084 lwz r11,132(r31)
- 0: GETL R31, t0
- 1: ADDL $0x84, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547B99C: 2C8B0000 cmpi cr1,r11,0
- 5: GETL R11, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x2547B9A0: 418600BC bc 12,6,0x2547BA5C
- 9: Js06o $0x2547BA5C
-
-
-. 0 2547B998 12
-. 81 7F 00 84 2C 8B 00 00 41 86 00 BC
-
-==== BB 1242 (0x2547BA5C) approx BBs exec'd 0 ====
-
- 0x2547BA5C: 3B800000 li r28,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R28
- 2: INCEIPL $4
-
- 0x2547BA60: 939601A0 stw r28,416(r22)
- 3: GETL R28, t2
- 4: GETL R22, t4
- 5: ADDL $0x1A0, t4
- 6: STL t2, (t4)
- 7: INCEIPL $4
-
- 0x2547BA64: 4BFFFD48 b 0x2547B7AC
- 8: JMPo $0x2547B7AC ($4)
-
-
-. 0 2547BA5C 12
-. 3B 80 00 00 93 96 01 A0 4B FF FD 48
-
-==== BB 1243 (0x2547B7AC) approx BBs exec'd 0 ====
-
- 0x2547B7AC: 2F9D0000 cmpi cr7,r29,0
- 0: GETL R29, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x2547B7B0: 409E0240 bc 4,30,0x2547B9F0
- 4: Jc30o $0x2547B9F0
-
-
-. 0 2547B7AC 8
-. 2F 9D 00 00 40 9E 02 40
-
-==== BB 1244 (0x2547B7B4) approx BBs exec'd 0 ====
-
- 0x2547B7B4: 38600000 li r3,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547B7B8: 3A800001 li r20,1
- 3: MOVL $0x1, t2
- 4: PUTL t2, R20
- 5: INCEIPL $4
-
- 0x2547B7BC: 48000789 bl 0x2547BF44
- 6: MOVL $0x2547B7C0, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0x2547BF44 ($4)
-
-
-. 0 2547B7B4 12
-. 38 60 00 00 3A 80 00 01 48 00 07 89
-
-==== BB 1245 (0x2547BF94) approx BBs exec'd 0 ====
-
- 0x2547BF94: 83C10008 lwz r30,8(r1)
- 0: GETL R1, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R30
- 4: INCEIPL $4
-
- 0x2547BF98: 38210010 addi r1,r1,16
- 5: GETL R1, t4
- 6: ADDL $0x10, t4
- 7: PUTL t4, R1
- 8: INCEIPL $4
-
- 0x2547BF9C: 4E800020 blr
- 9: GETL LR, t6
- 10: JMPo-r t6 ($4)
-
-
-. 0 2547BF94 12
-. 83 C1 00 08 38 21 00 10 4E 80 00 20
-
-==== BB 1246 (0x2547B7C0) approx BBs exec'd 0 ====
-
- 0x2547B7C0: 9283000C stw r20,12(r3)
- 0: GETL R20, t0
- 1: GETL R3, t2
- 2: ADDL $0xC, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547B7C4: 7C761B78 or r22,r3,r3
- 5: GETL R3, t4
- 6: PUTL t4, R22
- 7: INCEIPL $4
-
- 0x2547B7C8: 480007D9 bl 0x2547BFA0
- 8: MOVL $0x2547B7CC, t6
- 9: PUTL t6, LR
- 10: JMPo-c $0x2547BFA0 ($4)
-
-
-. 0 2547B7C0 12
-. 92 83 00 0C 7C 76 1B 78 48 00 07 D9
-
-==== BB 1247 (0x2547B7CC) approx BBs exec'd 0 ====
-
- 0x2547B7CC: 83BA015C lwz r29,348(r26)
- 0: GETL R26, t0
- 1: ADDL $0x15C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0x2547B7D0: 2F9D0000 cmpi cr7,r29,0
- 5: GETL R29, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x2547B7D4: 3B9DFFFF addi r28,r29,-1
- 9: GETL R29, t8
- 10: ADDL $0xFFFFFFFF, t8
- 11: PUTL t8, R28
- 12: INCEIPL $4
-
- 0x2547B7D8: 419E0058 bc 12,30,0x2547B830
- 13: Js30o $0x2547B830
-
-
-. 0 2547B7CC 16
-. 83 BA 01 5C 2F 9D 00 00 3B 9D FF FF 41 9E 00 58
-
-==== BB 1248 (0x2547B7DC) approx BBs exec'd 0 ====
-
- 0x2547B7DC: 82BA01E8 lwz r21,488(r26)
- 0: GETL R26, t0
- 1: ADDL $0x1E8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R21
- 4: INCEIPL $4
-
- 0x2547B7E0: 5780103A rlwinm r0,r28,2,0,29
- 5: GETL R28, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x2547B7E4: 7FF5002E lwzx r31,r21,r0
- 9: GETL R0, t6
- 10: GETL R21, t8
- 11: ADDL t8, t6
- 12: LDL (t6), t10
- 13: PUTL t10, R31
- 14: INCEIPL $4
-
- 0x2547B7E8: 801F0180 lwz r0,384(r31)
- 15: GETL R31, t12
- 16: ADDL $0x180, t12
- 17: LDL (t12), t14
- 18: PUTL t14, R0
- 19: INCEIPL $4
-
- 0x2547B7EC: 74091000 andis. r9,r0,0x1000
- 20: GETL R0, t16
- 21: ANDL $0x10000000, t16
- 22: PUTL t16, R9
- 23: CMP0L t16, t18 (-rSo)
- 24: ICRFL t18, $0x0, CR
- 25: INCEIPL $4
-
- 0x2547B7F0: 40820034 bc 4,2,0x2547B824
- 26: Jc02o $0x2547B824
-
-
-. 0 2547B7DC 24
-. 82 BA 01 E8 57 80 10 3A 7F F5 00 2E 80 1F 01 80 74 09 10 00 40 82 00 34
-
-==== BB 1249 (0x2547B7F4) approx BBs exec'd 0 ====
-
- 0x2547B7F4: 64091000 oris r9,r0,0x1000
- 0: GETL R0, t0
- 1: ORL $0x10000000, t0
- 2: PUTL t0, R9
- 3: INCEIPL $4
-
- 0x2547B7F8: 809F0004 lwz r4,4(r31)
- 4: GETL R31, t2
- 5: ADDL $0x4, t2
- 6: LDL (t2), t4
- 7: PUTL t4, R4
- 8: INCEIPL $4
-
- 0x2547B7FC: 913F0180 stw r9,384(r31)
- 9: GETL R9, t6
- 10: GETL R31, t8
- 11: ADDL $0x180, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547B800: 88640000 lbz r3,0(r4)
- 14: GETL R4, t10
- 15: LDB (t10), t12
- 16: PUTL t12, R3
- 17: INCEIPL $4
-
- 0x2547B804: 2F030000 cmpi cr6,r3,0
- 18: GETL R3, t14
- 19: CMP0L t14, t16 (-rSo)
- 20: ICRFL t16, $0x6, CR
- 21: INCEIPL $4
-
- 0x2547B808: 419A0104 bc 12,26,0x2547B90C
- 22: Js26o $0x2547B90C
-
-
-. 0 2547B7F4 24
-. 64 09 10 00 80 9F 00 04 91 3F 01 80 88 64 00 00 2F 03 00 00 41 9A 01 04
-
-==== BB 1250 (0x2547B80C) approx BBs exec'd 0 ====
-
- 0x2547B80C: 815F0050 lwz r10,80(r31)
- 0: GETL R31, t0
- 1: ADDL $0x50, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x2547B810: 2C8A0000 cmpi cr1,r10,0
- 5: GETL R10, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x2547B814: 40860064 bc 4,6,0x2547B878
- 9: Jc06o $0x2547B878
-
-
-. 0 2547B80C 12
-. 81 5F 00 50 2C 8A 00 00 40 86 00 64
-
-==== BB 1251 (0x2547B818) approx BBs exec'd 0 ====
-
- 0x2547B818: 80BF0084 lwz r5,132(r31)
- 0: GETL R31, t0
- 1: ADDL $0x84, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x2547B81C: 2F850000 cmpi cr7,r5,0
- 5: GETL R5, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x2547B820: 409E0058 bc 4,30,0x2547B878
- 9: Jc30o $0x2547B878
-
-
-. 0 2547B818 12
-. 80 BF 00 84 2F 85 00 00 40 9E 00 58
-
-==== BB 1252 (0x2547B824) approx BBs exec'd 0 ====
-
- 0x2547B824: 2F9C0000 cmpi cr7,r28,0
- 0: GETL R28, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x2547B828: 3B9CFFFF addi r28,r28,-1
- 4: GETL R28, t4
- 5: ADDL $0xFFFFFFFF, t4
- 6: PUTL t4, R28
- 7: INCEIPL $4
-
- 0x2547B82C: 409EFFB0 bc 4,30,0x2547B7DC
- 8: Jc30o $0x2547B7DC
-
-
-. 0 2547B824 12
-. 2F 9C 00 00 3B 9C FF FF 40 9E FF B0
-
-==== BB 1253 (0x2547B878) approx BBs exec'd 0 ====
-
- 0x2547B878: 80DE04F4 lwz r6,1268(r30)
- 0: GETL R30, t0
- 1: ADDL $0x4F4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0x2547B87C: 83660000 lwz r27,0(r6)
- 5: GETL R6, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R27
- 8: INCEIPL $4
-
- 0x2547B880: 73690002 andi. r9,r27,0x2
- 9: GETL R27, t8
- 10: ANDL $0x2, t8
- 11: PUTL t8, R9
- 12: CMP0L t8, t10 (-rSo)
- 13: ICRFL t10, $0x0, CR
- 14: INCEIPL $4
-
- 0x2547B884: 4082009C bc 4,2,0x2547B920
- 15: Jc02o $0x2547B920
-
-
-. 0 2547B878 16
-. 80 DE 04 F4 83 66 00 00 73 69 00 02 40 82 00 9C
-
-==== BB 1254 (0x2547B888) approx BBs exec'd 0 ====
-
- 0x2547B888: 2F0A0000 cmpi cr6,r10,0
- 0: GETL R10, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x2547B88C: 409A005C bc 4,26,0x2547B8E8
- 4: Jc26o $0x2547B8E8
-
-
-. 0 2547B888 8
-. 2F 0A 00 00 40 9A 00 5C
-
-==== BB 1255 (0x2547B8E8) approx BBs exec'd 0 ====
-
- 0x2547B8E8: 810A0004 lwz r8,4(r10)
- 0: GETL R10, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x2547B8EC: 7EE3BB78 or r3,r23,r23
- 5: GETL R23, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0x2547B8F0: 80FF0000 lwz r7,0(r31)
- 8: GETL R31, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R7
- 11: INCEIPL $4
-
- 0x2547B8F4: 7F25CB78 or r5,r25,r25
- 12: GETL R25, t10
- 13: PUTL t10, R5
- 14: INCEIPL $4
-
- 0x2547B8F8: 7C874214 add r4,r7,r8
- 15: GETL R7, t12
- 16: GETL R8, t14
- 17: ADDL t12, t14
- 18: PUTL t14, R4
- 19: INCEIPL $4
-
- 0x2547B8FC: 7C8903A6 mtctr r4
- 20: GETL R4, t16
- 21: PUTL t16, CTR
- 22: INCEIPL $4
-
- 0x2547B900: 7F04C378 or r4,r24,r24
- 23: GETL R24, t18
- 24: PUTL t18, R4
- 25: INCEIPL $4
-
- 0x2547B904: 4E800421 bctrl
- 26: MOVL $0x2547B908, t20
- 27: PUTL t20, LR
- 28: GETL CTR, t22
- 29: JMPo-c t22 ($4)
-
-
-. 0 2547B8E8 32
-. 81 0A 00 04 7E E3 BB 78 80 FF 00 00 7F 25 CB 78 7C 87 42 14 7C 89 03 A6 7F 04 C3 78 4E 80 04 21
-
-==== BB 1256 _init(0xFE9B620) approx BBs exec'd 0 ====
-
- 0xFE9B620: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFE9B624: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFE9B628: 4812C829 bl 0xFFC7E50
- 9: MOVL $0xFE9B62C, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FE9B620 12
-. 94 21 FF E0 7C 08 02 A6 48 12 C8 29
-
-==== BB 1257 (0xFFC7E50) approx BBs exec'd 0 ====
-
- 0xFFC7E50: 4E800021 blrl
- 0: GETL LR, t0
- 1: MOVL $0xFFC7E54, t2
- 2: PUTL t2, LR
- 3: JMPo-r t0 ($4)
-
-
-. 0 FFC7E50 4
-. 4E 80 00 21
-
-==== BB 1258 (0xFE9B62C) approx BBs exec'd 0 ====
-
- 0xFE9B62C: 93C10018 stw r30,24(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x18, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFE9B630: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0xFE9B634: 93810010 stw r28,16(r1)
- 8: GETL R28, t6
- 9: GETL R1, t8
- 10: ADDL $0x10, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0xFE9B638: 93A10014 stw r29,20(r1)
- 13: GETL R29, t10
- 14: GETL R1, t12
- 15: ADDL $0x14, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0xFE9B63C: 7CBC2B78 or r28,r5,r5
- 18: GETL R5, t14
- 19: PUTL t14, R28
- 20: INCEIPL $4
-
- 0xFE9B640: 93E1001C stw r31,28(r1)
- 21: GETL R31, t16
- 22: GETL R1, t18
- 23: ADDL $0x1C, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0xFE9B644: 7C9D2378 or r29,r4,r4
- 26: GETL R4, t20
- 27: PUTL t20, R29
- 28: INCEIPL $4
-
- 0xFE9B648: 817E1CE4 lwz r11,7396(r30)
- 29: GETL R30, t22
- 30: ADDL $0x1CE4, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R11
- 33: INCEIPL $4
-
- 0xFE9B64C: 7C7F1B78 or r31,r3,r3
- 34: GETL R3, t26
- 35: PUTL t26, R31
- 36: INCEIPL $4
-
- 0xFE9B650: 811E1AA4 lwz r8,6820(r30)
- 37: GETL R30, t28
- 38: ADDL $0x1AA4, t28
- 39: LDL (t28), t30
- 40: PUTL t30, R8
- 41: INCEIPL $4
-
- 0xFE9B654: 39200000 li r9,0
- 42: MOVL $0x0, t32
- 43: PUTL t32, R9
- 44: INCEIPL $4
-
- 0xFE9B658: 2F8B0000 cmpi cr7,r11,0
- 45: GETL R11, t34
- 46: CMP0L t34, t36 (-rSo)
- 47: ICRFL t36, $0x7, CR
- 48: INCEIPL $4
-
- 0xFE9B65C: 90010024 stw r0,36(r1)
- 49: GETL R0, t38
- 50: GETL R1, t40
- 51: ADDL $0x24, t40
- 52: STL t38, (t40)
- 53: INCEIPL $4
-
- 0xFE9B660: 7D0A4378 or r10,r8,r8
- 54: GETL R8, t42
- 55: PUTL t42, R10
- 56: INCEIPL $4
-
- 0xFE9B664: 419E0010 bc 12,30,0xFE9B674
- 57: Js30o $0xFE9B674
-
-
-. 0 FE9B62C 60
-. 93 C1 00 18 7F C8 02 A6 93 81 00 10 93 A1 00 14 7C BC 2B 78 93 E1 00 1C 7C 9D 23 78 81 7E 1C E4 7C 7F 1B 78 81 1E 1A A4 39 20 00 00 2F 8B 00 00 90 01 00 24 7D 0A 43 78 41 9E 00 10
-
-==== BB 1259 (0xFE9B674) approx BBs exec'd 0 ====
-
- 0xFE9B674: 912A0000 stw r9,0(r10)
- 0: GETL R9, t0
- 1: GETL R10, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0xFE9B678: 80880000 lwz r4,0(r8)
- 4: GETL R8, t4
- 5: LDL (t4), t6
- 6: PUTL t6, R4
- 7: INCEIPL $4
-
- 0xFE9B67C: 2C840000 cmpi cr1,r4,0
- 8: GETL R4, t8
- 9: CMP0L t8, t10 (-rSo)
- 10: ICRFL t10, $0x1, CR
- 11: INCEIPL $4
-
- 0xFE9B680: 40860024 bc 4,6,0xFE9B6A4
- 12: Jc06o $0xFE9B6A4
-
-
-. 0 FE9B674 16
-. 91 2A 00 00 80 88 00 00 2C 84 00 00 40 86 00 24
-
-==== BB 1260 (0xFE9B684) approx BBs exec'd 0 ====
-
- 0xFE9B684: 813E1BF4 lwz r9,7156(r30)
- 0: GETL R30, t0
- 1: ADDL $0x1BF4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0xFE9B688: 817E1BC8 lwz r11,7112(r30)
- 5: GETL R30, t4
- 6: ADDL $0x1BC8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R11
- 9: INCEIPL $4
-
- 0xFE9B68C: 81490000 lwz r10,0(r9)
- 10: GETL R9, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R10
- 13: INCEIPL $4
-
- 0xFE9B690: 80AB0034 lwz r5,52(r11)
- 14: GETL R11, t12
- 15: ADDL $0x34, t12
- 16: LDL (t12), t14
- 17: PUTL t14, R5
- 18: INCEIPL $4
-
- 0xFE9B694: 7D435378 or r3,r10,r10
- 19: GETL R10, t16
- 20: PUTL t16, R3
- 21: INCEIPL $4
-
- 0xFE9B698: 7F055000 cmp cr6,r5,r10
- 22: GETL R5, t18
- 23: GETL R10, t20
- 24: CMPL t18, t20, t22 (-rSo)
- 25: ICRFL t22, $0x6, CR
- 26: INCEIPL $4
-
- 0xFE9B69C: 419A0008 bc 12,26,0xFE9B6A4
- 27: Js26o $0xFE9B6A4
-
-
-. 0 FE9B684 28
-. 81 3E 1B F4 81 7E 1B C8 81 49 00 00 80 AB 00 34 7D 43 53 78 7F 05 50 00 41 9A 00 08
-
-==== BB 1261 (0xFE9B6A4) approx BBs exec'd 0 ====
-
- 0xFE9B6A4: 819E1A8C lwz r12,6796(r30)
- 0: GETL R30, t0
- 1: ADDL $0x1A8C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R12
- 4: INCEIPL $4
-
- 0xFE9B6A8: 7FE3FB78 or r3,r31,r31
- 5: GETL R31, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0xFE9B6AC: 811E1DD4 lwz r8,7636(r30)
- 8: GETL R30, t6
- 9: ADDL $0x1DD4, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R8
- 12: INCEIPL $4
-
- 0xFE9B6B0: 7FA4EB78 or r4,r29,r29
- 13: GETL R29, t10
- 14: PUTL t10, R4
- 15: INCEIPL $4
-
- 0xFE9B6B4: 80FE1B84 lwz r7,7044(r30)
- 16: GETL R30, t12
- 17: ADDL $0x1B84, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R7
- 20: INCEIPL $4
-
- 0xFE9B6B8: 7F85E378 or r5,r28,r28
- 21: GETL R28, t16
- 22: PUTL t16, R5
- 23: INCEIPL $4
-
- 0xFE9B6BC: 93EC0000 stw r31,0(r12)
- 24: GETL R31, t18
- 25: GETL R12, t20
- 26: STL t18, (t20)
- 27: INCEIPL $4
-
- 0xFE9B6C0: 93A80000 stw r29,0(r8)
- 28: GETL R29, t22
- 29: GETL R8, t24
- 30: STL t22, (t24)
- 31: INCEIPL $4
-
- 0xFE9B6C4: 93870000 stw r28,0(r7)
- 32: GETL R28, t26
- 33: GETL R7, t28
- 34: STL t26, (t28)
- 35: INCEIPL $4
-
- 0xFE9B6C8: 480B6421 bl 0xFF51AE8
- 36: MOVL $0xFE9B6CC, t30
- 37: PUTL t30, LR
- 38: JMPo-c $0xFF51AE8 ($4)
-
-
-. 0 FE9B6A4 40
-. 81 9E 1A 8C 7F E3 FB 78 81 1E 1D D4 7F A4 EB 78 80 FE 1B 84 7F 85 E3 78 93 EC 00 00 93 A8 00 00 93 87 00 00 48 0B 64 21
-
-==== BB 1262 __init_misc(0xFF51AE8) approx BBs exec'd 0 ====
-
- 0xFF51AE8: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFF51AEC: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFF51AF0: 93A10014 stw r29,20(r1)
- 9: GETL R29, t6
- 10: GETL R1, t8
- 11: ADDL $0x14, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0xFF51AF4: 7C9D2379 or. r29,r4,r4
- 14: GETL R4, t10
- 15: PUTL t10, R29
- 16: CMP0L t10, t12 (-rSo)
- 17: ICRFL t12, $0x0, CR
- 18: INCEIPL $4
-
- 0xFF51AF8: 48076359 bl 0xFFC7E50
- 19: MOVL $0xFF51AFC, t14
- 20: PUTL t14, LR
- 21: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FF51AE8 20
-. 94 21 FF E0 7C 08 02 A6 93 A1 00 14 7C 9D 23 79 48 07 63 59
-
-==== BB 1263 (0xFF51AFC) approx BBs exec'd 0 ====
-
- 0xFF51AFC: 93C10018 stw r30,24(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x18, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFF51B00: 93E1001C stw r31,28(r1)
- 5: GETL R31, t4
- 6: GETL R1, t6
- 7: ADDL $0x1C, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0xFF51B04: 7FC802A6 mflr r30
- 10: GETL LR, t8
- 11: PUTL t8, R30
- 12: INCEIPL $4
-
- 0xFF51B08: 90010024 stw r0,36(r1)
- 13: GETL R0, t10
- 14: GETL R1, t12
- 15: ADDL $0x24, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0xFF51B0C: 4182003C bc 12,2,0xFF51B48
- 18: Js02o $0xFF51B48
-
-
-. 0 FF51AFC 20
-. 93 C1 00 18 93 E1 00 1C 7F C8 02 A6 90 01 00 24 41 82 00 3C
-
-==== BB 1264 (0xFF51B10) approx BBs exec'd 0 ====
-
- 0xFF51B10: 83FD0000 lwz r31,0(r29)
- 0: GETL R29, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R31
- 3: INCEIPL $4
-
- 0xFF51B14: 3880002F li r4,47
- 4: MOVL $0x2F, t4
- 5: PUTL t4, R4
- 6: INCEIPL $4
-
- 0xFF51B18: 2F9F0000 cmpi cr7,r31,0
- 7: GETL R31, t6
- 8: CMP0L t6, t8 (-rSo)
- 9: ICRFL t8, $0x7, CR
- 10: INCEIPL $4
-
- 0xFF51B1C: 7FE3FB78 or r3,r31,r31
- 11: GETL R31, t10
- 12: PUTL t10, R3
- 13: INCEIPL $4
-
- 0xFF51B20: 419E0028 bc 12,30,0xFF51B48
- 14: Js30o $0xFF51B48
-
-
-. 0 FF51B10 20
-. 83 FD 00 00 38 80 00 2F 2F 9F 00 00 7F E3 FB 78 41 9E 00 28
-
-==== BB 1265 (0xFF51B24) approx BBs exec'd 0 ====
-
- 0xFF51B24: 4BFA5459 bl 0xFEF6F7C
- 0: MOVL $0xFF51B28, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0xFEF6F7C ($4)
-
-
-. 0 FF51B24 4
-. 4B FA 54 59
-
-==== BB 1266 strrchr(0xFEF6F7C) approx BBs exec'd 0 ====
-
- 0xFEF6F7C: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFEF6F80: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFEF6F84: 93A10014 stw r29,20(r1)
- 9: GETL R29, t6
- 10: GETL R1, t8
- 11: ADDL $0x14, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0xFEF6F88: 549D063E rlwinm r29,r4,0,24,31
- 14: GETL R4, t10
- 15: ANDL $0xFF, t10
- 16: PUTL t10, R29
- 17: INCEIPL $4
-
- 0xFEF6F8C: 2F9D0000 cmpi cr7,r29,0
- 18: GETL R29, t12
- 19: CMP0L t12, t14 (-rSo)
- 20: ICRFL t14, $0x7, CR
- 21: INCEIPL $4
-
- 0xFEF6F90: 93C10018 stw r30,24(r1)
- 22: GETL R30, t16
- 23: GETL R1, t18
- 24: ADDL $0x18, t18
- 25: STL t16, (t18)
- 26: INCEIPL $4
-
- 0xFEF6F94: 90010024 stw r0,36(r1)
- 27: GETL R0, t20
- 28: GETL R1, t22
- 29: ADDL $0x24, t22
- 30: STL t20, (t22)
- 31: INCEIPL $4
-
- 0xFEF6F98: 7C601B78 or r0,r3,r3
- 32: GETL R3, t24
- 33: PUTL t24, R0
- 34: INCEIPL $4
-
- 0xFEF6F9C: 93E1001C stw r31,28(r1)
- 35: GETL R31, t26
- 36: GETL R1, t28
- 37: ADDL $0x1C, t28
- 38: STL t26, (t28)
- 39: INCEIPL $4
-
- 0xFEF6FA0: 409E0024 bc 4,30,0xFEF6FC4
- 40: Jc30o $0xFEF6FC4
-
-
-. 0 FEF6F7C 40
-. 94 21 FF E0 7C 08 02 A6 93 A1 00 14 54 9D 06 3E 2F 9D 00 00 93 C1 00 18 90 01 00 24 7C 60 1B 78 93 E1 00 1C 40 9E 00 24
-
-==== BB 1267 (0xFEF6FC4) approx BBs exec'd 0 ====
-
- 0xFEF6FC4: 3BE00000 li r31,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R31
- 2: INCEIPL $4
-
- 0xFEF6FC8: 4800000C b 0xFEF6FD4
- 3: JMPo $0xFEF6FD4 ($4)
-
-
-. 0 FEF6FC4 8
-. 3B E0 00 00 48 00 00 0C
-
-==== BB 1268 (0xFEF6FD4) approx BBs exec'd 0 ====
-
- 0xFEF6FD4: 7C030378 or r3,r0,r0
- 0: GETL R0, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0xFEF6FD8: 7FA4EB78 or r4,r29,r29
- 3: GETL R29, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0xFEF6FDC: 4BFFF2F1 bl 0xFEF62CC
- 6: MOVL $0xFEF6FE0, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0xFEF62CC ($4)
-
-
-. 0 FEF6FD4 12
-. 7C 03 03 78 7F A4 EB 78 4B FF F2 F1
-
-==== BB 1269 strchr(0xFEF62CC) approx BBs exec'd 0 ====
-
- 0xFEF62CC: 5084442E rlwimi r4,r4,8,16,23
- 0: GETL R4, t0
- 1: GETL R4, t2
- 2: ROLL $0x8, t2
- 3: ANDL $0xFF00, t2
- 4: ANDL $0xFFFF00FF, t0
- 5: ORL t0, t2
- 6: PUTL t2, R4
- 7: INCEIPL $4
-
- 0xFEF62D0: 3960FFFF li r11,-1
- 8: MOVL $0xFFFFFFFF, t4
- 9: PUTL t4, R11
- 10: INCEIPL $4
-
- 0xFEF62D4: 5084801E rlwimi r4,r4,16,0,15
- 11: GETL R4, t6
- 12: GETL R4, t8
- 13: ROLL $0x10, t8
- 14: ANDL $0xFFFF0000, t8
- 15: ANDL $0xFFFF, t6
- 16: ORL t6, t8
- 17: PUTL t8, R4
- 18: INCEIPL $4
-
- 0xFEF62D8: 546A1EF8 rlwinm r10,r3,3,27,28
- 19: GETL R3, t10
- 20: ROLL $0x3, t10
- 21: ANDL $0x18, t10
- 22: PUTL t10, R10
- 23: INCEIPL $4
-
- 0xFEF62DC: 3CC0FEFF lis r6,-257
- 24: MOVL $0xFEFF0000, t12
- 25: PUTL t12, R6
- 26: INCEIPL $4
-
- 0xFEF62E0: 3CE07F7F lis r7,32639
- 27: MOVL $0x7F7F0000, t14
- 28: PUTL t14, R7
- 29: INCEIPL $4
-
- 0xFEF62E4: 5468003A rlwinm r8,r3,0,0,29
- 30: GETL R3, t16
- 31: ANDL $0xFFFFFFFC, t16
- 32: PUTL t16, R8
- 33: INCEIPL $4
-
- 0xFEF62E8: 38C6FEFF addi r6,r6,-257
- 34: MOVL $0xFEFEFEFF, t18
- 35: PUTL t18, R6
- 36: INCEIPL $4
-
- 0xFEF62EC: 38E77F7F addi r7,r7,32639
- 37: MOVL $0x7F7F7F7F, t20
- 38: PUTL t20, R7
- 39: INCEIPL $4
-
- 0xFEF62F0: 80A80000 lwz r5,0(r8)
- 40: GETL R8, t22
- 41: LDL (t22), t24
- 42: PUTL t24, R5
- 43: INCEIPL $4
-
- 0xFEF62F4: 7D6B5430 srw r11,r11,r10
- 44: GETL R11, t28
- 45: GETL R10, t26
- 46: SHRL t26, t28
- 47: PUTL t28, R11
- 48: INCEIPL $4
-
- 0xFEF62F8: 7CA55B38 orc r5,r5,r11
- 49: GETL R5, t30
- 50: GETL R11, t32
- 51: NOTL t32
- 52: ORL t30, t32
- 53: PUTL t32, R5
- 54: INCEIPL $4
-
- 0xFEF62FC: 7C062A14 add r0,r6,r5
- 55: GETL R6, t34
- 56: GETL R5, t36
- 57: ADDL t34, t36
- 58: PUTL t36, R0
- 59: INCEIPL $4
-
- 0xFEF6300: 7CE928F8 nor r9,r7,r5
- 60: GETL R7, t38
- 61: GETL R5, t40
- 62: ORL t40, t38
- 63: NOTL t38
- 64: PUTL t38, R9
- 65: INCEIPL $4
-
- 0xFEF6304: 7C004839 and. r0,r0,r9
- 66: GETL R0, t42
- 67: GETL R9, t44
- 68: ANDL t42, t44
- 69: PUTL t44, R0
- 70: CMP0L t44, t46 (-rSo)
- 71: ICRFL t46, $0x0, CR
- 72: INCEIPL $4
-
- 0xFEF6308: 7C8C2A78 xor r12,r4,r5
- 73: GETL R4, t48
- 74: GETL R5, t50
- 75: XORL t48, t50
- 76: PUTL t50, R12
- 77: INCEIPL $4
-
- 0xFEF630C: 7D8C5B38 orc r12,r12,r11
- 78: GETL R12, t52
- 79: GETL R11, t54
- 80: NOTL t54
- 81: ORL t52, t54
- 82: PUTL t54, R12
- 83: INCEIPL $4
-
- 0xFEF6310: 48000020 b 0xFEF6330
- 84: JMPo $0xFEF6330 ($4)
-
-
-. 0 FEF62CC 72
-. 50 84 44 2E 39 60 FF FF 50 84 80 1E 54 6A 1E F8 3C C0 FE FF 3C E0 7F 7F 54 68 00 3A 38 C6 FE FF 38 E7 7F 7F 80 A8 00 00 7D 6B 54 30 7C A5 5B 38 7C 06 2A 14 7C E9 28 F8 7C 00 48 39 7C 8C 2A 78 7D 8C 5B 38 48 00 00 20
-
-==== BB 1270 (0xFEF6330) approx BBs exec'd 0 ====
-
- 0xFEF6330: 7C066214 add r0,r6,r12
- 0: GETL R6, t0
- 1: GETL R12, t2
- 2: ADDL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0xFEF6334: 7CE960F8 nor r9,r7,r12
- 5: GETL R7, t4
- 6: GETL R12, t6
- 7: ORL t6, t4
- 8: NOTL t4
- 9: PUTL t4, R9
- 10: INCEIPL $4
-
- 0xFEF6338: 4182FFDC bc 12,2,0xFEF6314
- 11: Js02o $0xFEF6314
-
-
-. 0 FEF6330 12
-. 7C 06 62 14 7C E9 60 F8 41 82 FF DC
-
-==== BB 1271 (0xFEF6314) approx BBs exec'd 0 ====
-
- 0xFEF6314: 84A80004 lwzu r5,4(r8)
- 0: GETL R8, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R8
- 3: LDL (t0), t2
- 4: PUTL t2, R5
- 5: INCEIPL $4
-
- 0xFEF6318: 7C004839 and. r0,r0,r9
- 6: GETL R0, t4
- 7: GETL R9, t6
- 8: ANDL t4, t6
- 9: PUTL t6, R0
- 10: CMP0L t6, t8 (-rSo)
- 11: ICRFL t8, $0x0, CR
- 12: INCEIPL $4
-
- 0xFEF631C: 7C062A14 add r0,r6,r5
- 13: GETL R6, t10
- 14: GETL R5, t12
- 15: ADDL t10, t12
- 16: PUTL t12, R0
- 17: INCEIPL $4
-
- 0xFEF6320: 7CE928F8 nor r9,r7,r5
- 18: GETL R7, t14
- 19: GETL R5, t16
- 20: ORL t16, t14
- 21: NOTL t14
- 22: PUTL t14, R9
- 23: INCEIPL $4
-
- 0xFEF6324: 4082005C bc 4,2,0xFEF6380
- 24: Jc02o $0xFEF6380
-
-
-. 0 FEF6314 20
-. 84 A8 00 04 7C 00 48 39 7C 06 2A 14 7C E9 28 F8 40 82 00 5C
-
-==== BB 1272 (0xFEF6380) approx BBs exec'd 0 ====
-
- 0xFEF6380: 7CE06038 and r0,r7,r12
- 0: GETL R7, t0
- 1: GETL R12, t2
- 2: ANDL t0, t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0xFEF6384: 7CEA6378 or r10,r7,r12
- 5: GETL R7, t4
- 6: GETL R12, t6
- 7: ORL t6, t4
- 8: PUTL t4, R10
- 9: INCEIPL $4
-
- 0xFEF6388: 7C003A14 add r0,r0,r7
- 10: GETL R0, t8
- 11: GETL R7, t10
- 12: ADDL t8, t10
- 13: PUTL t10, R0
- 14: INCEIPL $4
-
- 0xFEF638C: 7D4900F8 nor r9,r10,r0
- 15: GETL R10, t12
- 16: GETL R0, t14
- 17: ORL t14, t12
- 18: NOTL t12
- 19: PUTL t12, R9
- 20: INCEIPL $4
-
- 0xFEF6390: 7D240034 cntlzw r4,r9
- 21: GETL R9, t16
- 22: CNTLZL t16
- 23: PUTL t16, R4
- 24: INCEIPL $4
-
- 0xFEF6394: 3908FFFC addi r8,r8,-4
- 25: GETL R8, t18
- 26: ADDL $0xFFFFFFFC, t18
- 27: PUTL t18, R8
- 28: INCEIPL $4
-
- 0xFEF6398: 5484E8FE rlwinm r4,r4,29,3,31
- 29: GETL R4, t20
- 30: SHRL $0x3, t20
- 31: PUTL t20, R4
- 32: INCEIPL $4
-
- 0xFEF639C: 7C682214 add r3,r8,r4
- 33: GETL R8, t22
- 34: GETL R4, t24
- 35: ADDL t22, t24
- 36: PUTL t24, R3
- 37: INCEIPL $4
-
- 0xFEF63A0: 4E800020 blr
- 38: GETL LR, t26
- 39: JMPo-r t26 ($4)
-
-
-. 0 FEF6380 36
-. 7C E0 60 38 7C EA 63 78 7C 00 3A 14 7D 49 00 F8 7D 24 00 34 39 08 FF FC 54 84 E8 FE 7C 68 22 14 4E 80 00 20
-
-==== BB 1273 (0xFEF6FE0) approx BBs exec'd 0 ====
-
- 0xFEF6FE0: 2C030000 cmpi cr0,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0xFEF6FE4: 4082FFE8 bc 4,2,0xFEF6FCC
- 4: Jc02o $0xFEF6FCC
-
-
-. 0 FEF6FE0 8
-. 2C 03 00 00 40 82 FF E8
-
-==== BB 1274 (0xFEF6FCC) approx BBs exec'd 0 ====
-
- 0xFEF6FCC: 7C7F1B78 or r31,r3,r3
- 0: GETL R3, t0
- 1: PUTL t0, R31
- 2: INCEIPL $4
-
- 0xFEF6FD0: 38030001 addi r0,r3,1
- 3: GETL R3, t2
- 4: ADDL $0x1, t2
- 5: PUTL t2, R0
- 6: INCEIPL $4
-
- 0xFEF6FD4: 7C030378 or r3,r0,r0
- 7: GETL R0, t4
- 8: PUTL t4, R3
- 9: INCEIPL $4
-
- 0xFEF6FD8: 7FA4EB78 or r4,r29,r29
- 10: GETL R29, t6
- 11: PUTL t6, R4
- 12: INCEIPL $4
-
- 0xFEF6FDC: 4BFFF2F1 bl 0xFEF62CC
- 13: MOVL $0xFEF6FE0, t8
- 14: PUTL t8, LR
- 15: JMPo-c $0xFEF62CC ($4)
-
-
-. 0 FEF6FCC 20
-. 7C 7F 1B 78 38 03 00 01 7C 03 03 78 7F A4 EB 78 4B FF F2 F1
-
-==== BB 1275 (0xFEF6328) approx BBs exec'd 0 ====
-
- 0xFEF6328: 7C004839 and. r0,r0,r9
- 0: GETL R0, t0
- 1: GETL R9, t2
- 2: ANDL t0, t2
- 3: PUTL t2, R0
- 4: CMP0L t2, t4 (-rSo)
- 5: ICRFL t4, $0x0, CR
- 6: INCEIPL $4
-
- 0xFEF632C: 7C8C2A78 xor r12,r4,r5
- 7: GETL R4, t6
- 8: GETL R5, t8
- 9: XORL t6, t8
- 10: PUTL t8, R12
- 11: INCEIPL $4
-
- 0xFEF6330: 7C066214 add r0,r6,r12
- 12: GETL R6, t10
- 13: GETL R12, t12
- 14: ADDL t10, t12
- 15: PUTL t12, R0
- 16: INCEIPL $4
-
- 0xFEF6334: 7CE960F8 nor r9,r7,r12
- 17: GETL R7, t14
- 18: GETL R12, t16
- 19: ORL t16, t14
- 20: NOTL t14
- 21: PUTL t14, R9
- 22: INCEIPL $4
-
- 0xFEF6338: 4182FFDC bc 12,2,0xFEF6314
- 23: Js02o $0xFEF6314
-
-
-. 0 FEF6328 20
-. 7C 00 48 39 7C 8C 2A 78 7C 06 62 14 7C E9 60 F8 41 82 FF DC
-
-==== BB 1276 (0xFEF633C) approx BBs exec'd 0 ====
-
- 0xFEF633C: 7C004839 and. r0,r0,r9
- 0: GETL R0, t0
- 1: GETL R9, t2
- 2: ANDL t0, t2
- 3: PUTL t2, R0
- 4: CMP0L t2, t4 (-rSo)
- 5: ICRFL t4, $0x0, CR
- 6: INCEIPL $4
-
- 0xFEF6340: 38600000 li r3,0
- 7: MOVL $0x0, t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0xFEF6344: 4D820020 bclr 12,2
- 10: GETL LR, t8
- 11: Js02o-r t8
-
-
-. 0 FEF633C 12
-. 7C 00 48 39 38 60 00 00 4D 82 00 20
-
-==== BB 1277 (0xFEF6FE8) approx BBs exec'd 0 ====
-
- 0xFEF6FE8: 80810024 lwz r4,36(r1)
- 0: GETL R1, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0xFEF6FEC: 7FE3FB78 or r3,r31,r31
- 5: GETL R31, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0xFEF6FF0: 83A10014 lwz r29,20(r1)
- 8: GETL R1, t6
- 9: ADDL $0x14, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R29
- 12: INCEIPL $4
-
- 0xFEF6FF4: 83C10018 lwz r30,24(r1)
- 13: GETL R1, t10
- 14: ADDL $0x18, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R30
- 17: INCEIPL $4
-
- 0xFEF6FF8: 7C8803A6 mtlr r4
- 18: GETL R4, t14
- 19: PUTL t14, LR
- 20: INCEIPL $4
-
- 0xFEF6FFC: 83E1001C lwz r31,28(r1)
- 21: GETL R1, t16
- 22: ADDL $0x1C, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R31
- 25: INCEIPL $4
-
- 0xFEF7000: 38210020 addi r1,r1,32
- 26: GETL R1, t20
- 27: ADDL $0x20, t20
- 28: PUTL t20, R1
- 29: INCEIPL $4
-
- 0xFEF7004: 4E800020 blr
- 30: GETL LR, t22
- 31: JMPo-r t22 ($4)
-
-
-. 0 FEF6FE8 32
-. 80 81 00 24 7F E3 FB 78 83 A1 00 14 83 C1 00 18 7C 88 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 1278 (0xFF51B28) approx BBs exec'd 0 ====
-
- 0xFF51B28: 2C830000 cmpi cr1,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0xFF51B2C: 38630001 addi r3,r3,1
- 4: GETL R3, t4
- 5: ADDL $0x1, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0xFF51B30: 41860034 bc 12,6,0xFF51B64
- 8: Js06o $0xFF51B64
-
-
-. 0 FF51B28 12
-. 2C 83 00 00 38 63 00 01 41 86 00 34
-
-==== BB 1279 (0xFF51B34) approx BBs exec'd 0 ====
-
- 0xFF51B34: 809E1C34 lwz r4,7220(r30)
- 0: GETL R30, t0
- 1: ADDL $0x1C34, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0xFF51B38: 90640000 stw r3,0(r4)
- 5: GETL R3, t4
- 6: GETL R4, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0xFF51B3C: 80BD0000 lwz r5,0(r29)
- 9: GETL R29, t8
- 10: LDL (t8), t10
- 11: PUTL t10, R5
- 12: INCEIPL $4
-
- 0xFF51B40: 807E1E24 lwz r3,7716(r30)
- 13: GETL R30, t12
- 14: ADDL $0x1E24, t12
- 15: LDL (t12), t14
- 16: PUTL t14, R3
- 17: INCEIPL $4
-
- 0xFF51B44: 90A30000 stw r5,0(r3)
- 18: GETL R5, t16
- 19: GETL R3, t18
- 20: STL t16, (t18)
- 21: INCEIPL $4
-
- 0xFF51B48: 80C10024 lwz r6,36(r1)
- 22: GETL R1, t20
- 23: ADDL $0x24, t20
- 24: LDL (t20), t22
- 25: PUTL t22, R6
- 26: INCEIPL $4
-
- 0xFF51B4C: 83A10014 lwz r29,20(r1)
- 27: GETL R1, t24
- 28: ADDL $0x14, t24
- 29: LDL (t24), t26
- 30: PUTL t26, R29
- 31: INCEIPL $4
-
- 0xFF51B50: 83C10018 lwz r30,24(r1)
- 32: GETL R1, t28
- 33: ADDL $0x18, t28
- 34: LDL (t28), t30
- 35: PUTL t30, R30
- 36: INCEIPL $4
-
- 0xFF51B54: 7CC803A6 mtlr r6
- 37: GETL R6, t32
- 38: PUTL t32, LR
- 39: INCEIPL $4
-
- 0xFF51B58: 83E1001C lwz r31,28(r1)
- 40: GETL R1, t34
- 41: ADDL $0x1C, t34
- 42: LDL (t34), t36
- 43: PUTL t36, R31
- 44: INCEIPL $4
-
- 0xFF51B5C: 38210020 addi r1,r1,32
- 45: GETL R1, t38
- 46: ADDL $0x20, t38
- 47: PUTL t38, R1
- 48: INCEIPL $4
-
- 0xFF51B60: 4E800020 blr
- 49: GETL LR, t40
- 50: JMPo-r t40 ($4)
-
-
-. 0 FF51B34 48
-. 80 9E 1C 34 90 64 00 00 80 BD 00 00 80 7E 1E 24 90 A3 00 00 80 C1 00 24 83 A1 00 14 83 C1 00 18 7C C8 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 1280 (0xFE9B6CC) approx BBs exec'd 0 ====
-
- 0xFE9B6CC: 4BFFFE95 bl 0xFE9B560
- 0: MOVL $0xFE9B6D0, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0xFE9B560 ($4)
-
-
-. 0 FE9B6CC 4
-. 4B FF FE 95
-
-==== BB 1281 __libc_global_ctors(0xFE9B560) approx BBs exec'd 0 ====
-
- 0xFE9B560: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFE9B564: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFE9B568: 4812C8E9 bl 0xFFC7E50
- 9: MOVL $0xFE9B56C, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FE9B560 12
-. 94 21 FF F0 7C 08 02 A6 48 12 C8 E9
-
-==== BB 1282 (0xFE9B56C) approx BBs exec'd 0 ====
-
- 0xFE9B56C: 93C10008 stw r30,8(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFE9B570: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0xFE9B574: 93E1000C stw r31,12(r1)
- 8: GETL R31, t6
- 9: GETL R1, t8
- 10: ADDL $0xC, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0xFE9B578: 90010014 stw r0,20(r1)
- 13: GETL R0, t10
- 14: GETL R1, t12
- 15: ADDL $0x14, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0xFE9B57C: 813E0018 lwz r9,24(r30)
- 18: GETL R30, t14
- 19: ADDL $0x18, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R9
- 22: INCEIPL $4
-
- 0xFE9B580: 80090004 lwz r0,4(r9)
- 23: GETL R9, t18
- 24: ADDL $0x4, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R0
- 27: INCEIPL $4
-
- 0xFE9B584: 3BE90004 addi r31,r9,4
- 28: GETL R9, t22
- 29: ADDL $0x4, t22
- 30: PUTL t22, R31
- 31: INCEIPL $4
-
- 0xFE9B588: 2F800000 cmpi cr7,r0,0
- 32: GETL R0, t24
- 33: CMP0L t24, t26 (-rSo)
- 34: ICRFL t26, $0x7, CR
- 35: INCEIPL $4
-
- 0xFE9B58C: 419E0018 bc 12,30,0xFE9B5A4
- 36: Js30o $0xFE9B5A4
-
-
-. 0 FE9B56C 36
-. 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 81 3E 00 18 80 09 00 04 3B E9 00 04 2F 80 00 00 41 9E 00 18
-
-==== BB 1283 (0xFE9B590) approx BBs exec'd 0 ====
-
- 0xFE9B590: 7C0903A6 mtctr r0
- 0: GETL R0, t0
- 1: PUTL t0, CTR
- 2: INCEIPL $4
-
- 0xFE9B594: 4E800421 bctrl
- 3: MOVL $0xFE9B598, t2
- 4: PUTL t2, LR
- 5: GETL CTR, t4
- 6: JMPo-c t4 ($4)
-
-
-. 0 FE9B590 8
-. 7C 09 03 A6 4E 80 04 21
-
-==== BB 1284 _IO_check_libio(0xFEED850) approx BBs exec'd 0 ====
-
- 0xFEED850: 7D8802A6 mflr r12
- 0: GETL LR, t0
- 1: PUTL t0, R12
- 2: INCEIPL $4
-
- 0xFEED854: 9421FFF0 stwu r1,-16(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFFF0, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0xFEED858: 480DA5F9 bl 0xFFC7E50
- 9: MOVL $0xFEED85C, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FEED850 12
-. 7D 88 02 A6 94 21 FF F0 48 0D A5 F9
-
-==== BB 1285 (0xFEED85C) approx BBs exec'd 0 ====
-
- 0xFEED85C: 93C10008 stw r30,8(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFEED860: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0xFEED864: 7D8803A6 mtlr r12
- 8: GETL R12, t6
- 9: PUTL t6, LR
- 10: INCEIPL $4
-
- 0xFEED868: 801E1DC8 lwz r0,7624(r30)
- 11: GETL R30, t8
- 12: ADDL $0x1DC8, t8
- 13: LDL (t8), t10
- 14: PUTL t10, R0
- 15: INCEIPL $4
-
- 0xFEED86C: 811E1B00 lwz r8,6912(r30)
- 16: GETL R30, t12
- 17: ADDL $0x1B00, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R8
- 20: INCEIPL $4
-
- 0xFEED870: 2F800000 cmpi cr7,r0,0
- 21: GETL R0, t16
- 22: CMP0L t16, t18 (-rSo)
- 23: ICRFL t18, $0x7, CR
- 24: INCEIPL $4
-
- 0xFEED874: 815E1BCC lwz r10,7116(r30)
- 25: GETL R30, t20
- 26: ADDL $0x1BCC, t20
- 27: LDL (t20), t22
- 28: PUTL t22, R10
- 29: INCEIPL $4
-
- 0xFEED878: 80FE1AE8 lwz r7,6888(r30)
- 30: GETL R30, t24
- 31: ADDL $0x1AE8, t24
- 32: LDL (t24), t26
- 33: PUTL t26, R7
- 34: INCEIPL $4
-
- 0xFEED87C: 3800FFB4 li r0,-76
- 35: MOVL $0xFFFFFFB4, t28
- 36: PUTL t28, R0
- 37: INCEIPL $4
-
- 0xFEED880: 419E0010 bc 12,30,0xFEED890
- 38: Js30o $0xFEED890
-
-
-. 0 FEED85C 40
-. 93 C1 00 08 7F C8 02 A6 7D 88 03 A6 80 1E 1D C8 81 1E 1B 00 2F 80 00 00 81 5E 1B CC 80 FE 1A E8 38 00 FF B4 41 9E 00 10
-
-==== BB 1286 (0xFEED884) approx BBs exec'd 0 ====
-
- 0xFEED884: 83C10008 lwz r30,8(r1)
- 0: GETL R1, t0
- 1: ADDL $0x8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R30
- 4: INCEIPL $4
-
- 0xFEED888: 38210010 addi r1,r1,16
- 5: GETL R1, t4
- 6: ADDL $0x10, t4
- 7: PUTL t4, R1
- 8: INCEIPL $4
-
- 0xFEED88C: 4E800020 blr
- 9: GETL LR, t6
- 10: JMPo-r t6 ($4)
-
-
-. 0 FEED884 12
-. 83 C1 00 08 38 21 00 10 4E 80 00 20
-
-==== BB 1287 (0xFE9B598) approx BBs exec'd 0 ====
-
- 0xFE9B598: 841F0004 lwzu r0,4(r31)
- 0: GETL R31, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R31
- 3: LDL (t0), t2
- 4: PUTL t2, R0
- 5: INCEIPL $4
-
- 0xFE9B59C: 2F800000 cmpi cr7,r0,0
- 6: GETL R0, t4
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x7, CR
- 9: INCEIPL $4
-
- 0xFE9B5A0: 409EFFF0 bc 4,30,0xFE9B590
- 10: Jc30o $0xFE9B590
-
-
-. 0 FE9B598 12
-. 84 1F 00 04 2F 80 00 00 40 9E FF F0
-
-==== BB 1288 (0xFE9B5A4) approx BBs exec'd 0 ====
-
- 0xFE9B5A4: 80610014 lwz r3,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0xFE9B5A8: 83C10008 lwz r30,8(r1)
- 5: GETL R1, t4
- 6: ADDL $0x8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R30
- 9: INCEIPL $4
-
- 0xFE9B5AC: 83E1000C lwz r31,12(r1)
- 10: GETL R1, t8
- 11: ADDL $0xC, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R31
- 14: INCEIPL $4
-
- 0xFE9B5B0: 7C6803A6 mtlr r3
- 15: GETL R3, t12
- 16: PUTL t12, LR
- 17: INCEIPL $4
-
- 0xFE9B5B4: 38210010 addi r1,r1,16
- 18: GETL R1, t14
- 19: ADDL $0x10, t14
- 20: PUTL t14, R1
- 21: INCEIPL $4
-
- 0xFE9B5B8: 4E800020 blr
- 22: GETL LR, t16
- 23: JMPo-r t16 ($4)
-
-
-. 0 FE9B5A4 24
-. 80 61 00 14 83 C1 00 08 83 E1 00 0C 7C 68 03 A6 38 21 00 10 4E 80 00 20
-
-==== BB 1289 (0xFE9B6D0) approx BBs exec'd 0 ====
-
- 0xFE9B6D0: 80C10024 lwz r6,36(r1)
- 0: GETL R1, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0xFE9B6D4: 83810010 lwz r28,16(r1)
- 5: GETL R1, t4
- 6: ADDL $0x10, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R28
- 9: INCEIPL $4
-
- 0xFE9B6D8: 83A10014 lwz r29,20(r1)
- 10: GETL R1, t8
- 11: ADDL $0x14, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R29
- 14: INCEIPL $4
-
- 0xFE9B6DC: 7CC803A6 mtlr r6
- 15: GETL R6, t12
- 16: PUTL t12, LR
- 17: INCEIPL $4
-
- 0xFE9B6E0: 83C10018 lwz r30,24(r1)
- 18: GETL R1, t14
- 19: ADDL $0x18, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R30
- 22: INCEIPL $4
-
- 0xFE9B6E4: 83E1001C lwz r31,28(r1)
- 23: GETL R1, t18
- 24: ADDL $0x1C, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R31
- 27: INCEIPL $4
-
- 0xFE9B6E8: 38210020 addi r1,r1,32
- 28: GETL R1, t22
- 29: ADDL $0x20, t22
- 30: PUTL t22, R1
- 31: INCEIPL $4
-
- 0xFE9B6EC: 4E800020 blr
- 32: GETL LR, t24
- 33: JMPo-r t24 ($4)
-
-
-. 0 FE9B6D0 32
-. 80 C1 00 24 83 81 00 10 83 A1 00 14 7C C8 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 1290 (0x2547B908) approx BBs exec'd 0 ====
-
- 0x2547B908: 4BFFFF88 b 0x2547B890
- 0: JMPo $0x2547B890 ($4)
-
-
-. 0 2547B908 4
-. 4B FF FF 88
-
-==== BB 1291 (0x2547B890) approx BBs exec'd 0 ====
-
- 0x2547B890: 817F0084 lwz r11,132(r31)
- 0: GETL R31, t0
- 1: ADDL $0x84, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547B894: 2C8B0000 cmpi cr1,r11,0
- 5: GETL R11, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x2547B898: 41A6FF8C bc 13,6,0x2547B824
- 9: Js06o $0x2547B824
-
-
-. 0 2547B890 12
-. 81 7F 00 84 2C 8B 00 00 41 A6 FF 8C
-
-==== BB 1292 (0x2547B90C) approx BBs exec'd 0 ====
-
- 0x2547B90C: 7520C000 andis. r0,r9,0xC000
- 0: GETL R9, t0
- 1: ANDL $0xC0000000, t0
- 2: PUTL t0, R0
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x2547B910: 40A2FEFC bc 5,2,0x2547B80C
- 6: Jc02o $0x2547B80C
-
-
-. 0 2547B90C 8
-. 75 20 C0 00 40 A2 FE FC
-
-==== BB 1293 (0x2547B914) approx BBs exec'd 0 ====
-
- 0x2547B914: 2F9C0000 cmpi cr7,r28,0
- 0: GETL R28, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x2547B918: 3B9CFFFF addi r28,r28,-1
- 4: GETL R28, t4
- 5: ADDL $0xFFFFFFFF, t4
- 6: PUTL t4, R28
- 7: INCEIPL $4
-
- 0x2547B91C: 4BFFFF10 b 0x2547B82C
- 8: JMPo $0x2547B82C ($4)
-
-
-. 0 2547B914 12
-. 2F 9C 00 00 3B 9C FF FF 4B FF FF 10
-
-==== BB 1294 (0x2547B82C) approx BBs exec'd 0 ====
-
- 0x2547B82C: 409EFFB0 bc 4,30,0x2547B7DC
- 0: Jc30o $0x2547B7DC
-
-
-. 0 2547B82C 4
-. 40 9E FF B0
-
-==== BB 1295 (0x2547B830) approx BBs exec'd 0 ====
-
- 0x2547B830: 82E10044 lwz r23,68(r1)
- 0: GETL R1, t0
- 1: ADDL $0x44, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R23
- 4: INCEIPL $4
-
- 0x2547B834: 3B000000 li r24,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R24
- 7: INCEIPL $4
-
- 0x2547B838: 83C10038 lwz r30,56(r1)
- 8: GETL R1, t6
- 9: ADDL $0x38, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R30
- 12: INCEIPL $4
-
- 0x2547B83C: 7EE803A6 mtlr r23
- 13: GETL R23, t10
- 14: PUTL t10, LR
- 15: INCEIPL $4
-
- 0x2547B840: 83E1003C lwz r31,60(r1)
- 16: GETL R1, t12
- 17: ADDL $0x3C, t12
- 18: LDL (t12), t14
- 19: PUTL t14, R31
- 20: INCEIPL $4
-
- 0x2547B844: 9316000C stw r24,12(r22)
- 21: GETL R24, t16
- 22: GETL R22, t18
- 23: ADDL $0xC, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0x2547B848: 82810010 lwz r20,16(r1)
- 26: GETL R1, t20
- 27: ADDL $0x10, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R20
- 30: INCEIPL $4
-
- 0x2547B84C: 82A10014 lwz r21,20(r1)
- 31: GETL R1, t24
- 32: ADDL $0x14, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R21
- 35: INCEIPL $4
-
- 0x2547B850: 82C10018 lwz r22,24(r1)
- 36: GETL R1, t28
- 37: ADDL $0x18, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R22
- 40: INCEIPL $4
-
- 0x2547B854: 82E1001C lwz r23,28(r1)
- 41: GETL R1, t32
- 42: ADDL $0x1C, t32
- 43: LDL (t32), t34
- 44: PUTL t34, R23
- 45: INCEIPL $4
-
- 0x2547B858: 83010020 lwz r24,32(r1)
- 46: GETL R1, t36
- 47: ADDL $0x20, t36
- 48: LDL (t36), t38
- 49: PUTL t38, R24
- 50: INCEIPL $4
-
- 0x2547B85C: 83210024 lwz r25,36(r1)
- 51: GETL R1, t40
- 52: ADDL $0x24, t40
- 53: LDL (t40), t42
- 54: PUTL t42, R25
- 55: INCEIPL $4
-
- 0x2547B860: 83410028 lwz r26,40(r1)
- 56: GETL R1, t44
- 57: ADDL $0x28, t44
- 58: LDL (t44), t46
- 59: PUTL t46, R26
- 60: INCEIPL $4
-
- 0x2547B864: 8361002C lwz r27,44(r1)
- 61: GETL R1, t48
- 62: ADDL $0x2C, t48
- 63: LDL (t48), t50
- 64: PUTL t50, R27
- 65: INCEIPL $4
-
- 0x2547B868: 83810030 lwz r28,48(r1)
- 66: GETL R1, t52
- 67: ADDL $0x30, t52
- 68: LDL (t52), t54
- 69: PUTL t54, R28
- 70: INCEIPL $4
-
- 0x2547B86C: 83A10034 lwz r29,52(r1)
- 71: GETL R1, t56
- 72: ADDL $0x34, t56
- 73: LDL (t56), t58
- 74: PUTL t58, R29
- 75: INCEIPL $4
-
- 0x2547B870: 38210040 addi r1,r1,64
- 76: GETL R1, t60
- 77: ADDL $0x40, t60
- 78: PUTL t60, R1
- 79: INCEIPL $4
-
- 0x2547B874: 4800072C b 0x2547BFA0
- 80: JMPo $0x2547BFA0 ($4)
-
-
-. 0 2547B830 72
-. 82 E1 00 44 3B 00 00 00 83 C1 00 38 7E E8 03 A6 83 E1 00 3C 93 16 00 0C 82 81 00 10 82 A1 00 14 82 C1 00 18 82 E1 00 1C 83 01 00 20 83 21 00 24 83 41 00 28 83 61 00 2C 83 81 00 30 83 A1 00 34 38 21 00 40 48 00 07 2C
-
-==== BB 1296 (0x2548051C) approx BBs exec'd 0 ====
-
- 0x2548051C: 807D0000 lwz r3,0(r29)
- 0: GETL R29, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R3
- 3: INCEIPL $4
-
- 0x25480520: 809B0000 lwz r4,0(r27)
- 4: GETL R27, t4
- 5: LDL (t4), t6
- 6: PUTL t6, R4
- 7: INCEIPL $4
-
- 0x25480524: 5465103A rlwinm r5,r3,2,0,29
- 8: GETL R3, t8
- 9: SHLL $0x2, t8
- 10: PUTL t8, R5
- 11: INCEIPL $4
-
- 0x25480528: 7CC42A14 add r6,r4,r5
- 12: GETL R4, t10
- 13: GETL R5, t12
- 14: ADDL t10, t12
- 15: PUTL t12, R6
- 16: INCEIPL $4
-
- 0x2548052C: 38A60004 addi r5,r6,4
- 17: GETL R6, t14
- 18: ADDL $0x4, t14
- 19: PUTL t14, R5
- 20: INCEIPL $4
-
- 0x25480530: 84060004 lwzu r0,4(r6)
- 21: GETL R6, t16
- 22: ADDL $0x4, t16
- 23: PUTL t16, R6
- 24: LDL (t16), t18
- 25: PUTL t18, R0
- 26: INCEIPL $4
-
- 0x25480534: 2C000000 cmpi cr0,r0,0
- 27: GETL R0, t20
- 28: CMP0L t20, t22 (-rSo)
- 29: ICRFL t22, $0x0, CR
- 30: INCEIPL $4
-
- 0x25480538: 4082FFF8 bc 4,2,0x25480530
- 31: Jc02o $0x25480530
-
-
-. 0 2548051C 32
-. 80 7D 00 00 80 9B 00 00 54 65 10 3A 7C C4 2A 14 38 A6 00 04 84 06 00 04 2C 00 00 00 40 82 FF F8
-
-==== BB 1297 (0x25480530) approx BBs exec'd 0 ====
-
- 0x25480530: 84060004 lwzu r0,4(r6)
- 0: GETL R6, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R6
- 3: LDL (t0), t2
- 4: PUTL t2, R0
- 5: INCEIPL $4
-
- 0x25480534: 2C000000 cmpi cr0,r0,0
- 6: GETL R0, t4
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x0, CR
- 9: INCEIPL $4
-
- 0x25480538: 4082FFF8 bc 4,2,0x25480530
- 10: Jc02o $0x25480530
-
-
-. 0 25480530 12
-. 84 06 00 04 2C 00 00 00 40 82 FF F8
-
-==== BB 1298 (0x2548053C) approx BBs exec'd 0 ====
-
- 0x2548053C: 38C60004 addi r6,r6,4
- 0: GETL R6, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R6
- 3: INCEIPL $4
-
- 0x25480540: 80FF04AC lwz r7,1196(r31)
- 4: GETL R31, t2
- 5: ADDL $0x4AC, t2
- 6: LDL (t2), t4
- 7: PUTL t4, R7
- 8: INCEIPL $4
-
- 0x25480544: 7FC903A6 mtctr r30
- 9: GETL R30, t6
- 10: PUTL t6, CTR
- 11: INCEIPL $4
-
- 0x25480548: 3BE00000 li r31,0
- 12: MOVL $0x0, t8
- 13: PUTL t8, R31
- 14: INCEIPL $4
-
- 0x2548054C: 93E10000 stw r31,0(r1)
- 15: GETL R31, t10
- 16: GETL R1, t12
- 17: STL t10, (t12)
- 18: INCEIPL $4
-
- 0x25480550: 7FE803A6 mtlr r31
- 19: GETL R31, t14
- 20: PUTL t14, LR
- 21: INCEIPL $4
-
- 0x25480554: 93E10004 stw r31,4(r1)
- 22: GETL R31, t16
- 23: GETL R1, t18
- 24: ADDL $0x4, t18
- 25: STL t16, (t18)
- 26: INCEIPL $4
-
- 0x25480558: 93E10008 stw r31,8(r1)
- 27: GETL R31, t20
- 28: GETL R1, t22
- 29: ADDL $0x8, t22
- 30: STL t20, (t22)
- 31: INCEIPL $4
-
- 0x2548055C: 93E1000C stw r31,12(r1)
- 32: GETL R31, t24
- 33: GETL R1, t26
- 34: ADDL $0xC, t26
- 35: STL t24, (t26)
- 36: INCEIPL $4
-
- 0x25480560: 4E800420 bctr
- 37: GETL CTR, t28
- 38: JMPo t28 ($4)
-
-
-. 0 2548053C 40
-. 38 C6 00 04 80 FF 04 AC 7F C9 03 A6 3B E0 00 00 93 E1 00 00 7F E8 03 A6 93 E1 00 04 93 E1 00 08 93 E1 00 0C 4E 80 04 20
-
-==== BB 1299 _start(0x100002A0) approx BBs exec'd 0 ====
-
- 0x100002A0: 7C290B78 or r9,r1,r1
- 0: GETL R1, t0
- 1: PUTL t0, R9
- 2: INCEIPL $4
-
- 0x100002A4: 54210036 rlwinm r1,r1,0,0,27
- 3: GETL R1, t2
- 4: ANDL $0xFFFFFFF0, t2
- 5: PUTL t2, R1
- 6: INCEIPL $4
-
- 0x100002A8: 38000000 li r0,0
- 7: MOVL $0x0, t4
- 8: PUTL t4, R0
- 9: INCEIPL $4
-
- 0x100002AC: 9421FFF0 stwu r1,-16(r1)
- 10: GETL R1, t6
- 11: GETL R1, t8
- 12: ADDL $0xFFFFFFF0, t8
- 13: PUTL t8, R1
- 14: STL t6, (t8)
- 15: INCEIPL $4
-
- 0x100002B0: 7C0803A6 mtlr r0
- 16: GETL R0, t10
- 17: PUTL t10, LR
- 18: INCEIPL $4
-
- 0x100002B4: 90010000 stw r0,0(r1)
- 19: GETL R0, t12
- 20: GETL R1, t14
- 21: STL t12, (t14)
- 22: INCEIPL $4
-
- 0x100002B8: 3D001000 lis r8,4096
- 23: MOVL $0x10000000, t16
- 24: PUTL t16, R8
- 25: INCEIPL $4
-
- 0x100002BC: 85A8077C lwzu r13,1916(r8)
- 26: MOVL $0x1000077C, t18
- 27: PUTL t18, R8
- 28: LDL (t18), t20
- 29: PUTL t20, R13
- 30: INCEIPL $4
-
- 0x100002C0: 48010624 b 0x100108E4
- 31: JMPo $0x100108E4 ($4)
-
-
-. 0 100002A0 36
-. 7C 29 0B 78 54 21 00 36 38 00 00 00 94 21 FF F0 7C 08 03 A6 90 01 00 00 3D 00 10 00 85 A8 07 7C 48 01 06 24
-
-==== BB 1300 (0x100108E4) approx BBs exec'd 0 ====
-
- 0x100108E4: 39600000 li r11,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R11
- 2: INCEIPL $4
-
- 0x100108E8: 4BFFFFD4 b 0x100108BC
- 3: JMPo $0x100108BC ($4)
-
-
-. 0 100108E4 8
-. 39 60 00 00 4B FF FF D4
-
-==== BB 1301 (0x100108BC) approx BBs exec'd 0 ====
-
- 0x100108BC: 556C083C rlwinm r12,r11,1,0,30
- 0: GETL R11, t0
- 1: SHLL $0x1, t0
- 2: PUTL t0, R12
- 3: INCEIPL $4
-
- 0x100108C0: 7D6C5A14 add r11,r12,r11
- 4: GETL R12, t2
- 5: GETL R11, t4
- 6: ADDL t2, t4
- 7: PUTL t4, R11
- 8: INCEIPL $4
-
- 0x100108C4: 3980AF5C li r12,-20644
- 9: MOVL $0xFFFFAF5C, t6
- 10: PUTL t6, R12
- 11: INCEIPL $4
-
- 0x100108C8: 3D8C2548 addis r12,r12,9544
- 12: MOVL $0x2547AF5C, t8
- 13: PUTL t8, R12
- 14: INCEIPL $4
-
- 0x100108CC: 7D8903A6 mtctr r12
- 15: GETL R12, t10
- 16: PUTL t10, CTR
- 17: INCEIPL $4
-
- 0x100108D0: 39807A88 li r12,31368
- 18: MOVL $0x7A88, t12
- 19: PUTL t12, R12
- 20: INCEIPL $4
-
- 0x100108D4: 3D8C2549 addis r12,r12,9545
- 21: MOVL $0x25497A88, t14
- 22: PUTL t14, R12
- 23: INCEIPL $4
-
- 0x100108D8: 4E800420 bctr
- 24: GETL CTR, t16
- 25: JMPo t16 ($4)
-
-
-. 0 100108BC 32
-. 55 6C 08 3C 7D 6C 5A 14 39 80 AF 5C 3D 8C 25 48 7D 89 03 A6 39 80 7A 88 3D 8C 25 49 4E 80 04 20
-
-==== BB 1302 _dl_runtime_resolve(0x2547AF5C) approx BBs exec'd 0 ====
-
- 0x2547AF5C: 9421FFC0 stwu r1,-64(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFC0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547AF60: 9001000C stw r0,12(r1)
- 6: GETL R0, t4
- 7: GETL R1, t6
- 8: ADDL $0xC, t6
- 9: STL t4, (t6)
- 10: INCEIPL $4
-
- 0x2547AF64: 90610010 stw r3,16(r1)
- 11: GETL R3, t8
- 12: GETL R1, t10
- 13: ADDL $0x10, t10
- 14: STL t8, (t10)
- 15: INCEIPL $4
-
- 0x2547AF68: 90810014 stw r4,20(r1)
- 16: GETL R4, t12
- 17: GETL R1, t14
- 18: ADDL $0x14, t14
- 19: STL t12, (t14)
- 20: INCEIPL $4
-
- 0x2547AF6C: 7D836378 or r3,r12,r12
- 21: GETL R12, t16
- 22: PUTL t16, R3
- 23: INCEIPL $4
-
- 0x2547AF70: 90A10018 stw r5,24(r1)
- 24: GETL R5, t18
- 25: GETL R1, t20
- 26: ADDL $0x18, t20
- 27: STL t18, (t20)
- 28: INCEIPL $4
-
- 0x2547AF74: 7D645B78 or r4,r11,r11
- 29: GETL R11, t22
- 30: PUTL t22, R4
- 31: INCEIPL $4
-
- 0x2547AF78: 90C1001C stw r6,28(r1)
- 32: GETL R6, t24
- 33: GETL R1, t26
- 34: ADDL $0x1C, t26
- 35: STL t24, (t26)
- 36: INCEIPL $4
-
- 0x2547AF7C: 7C0802A6 mflr r0
- 37: GETL LR, t28
- 38: PUTL t28, R0
- 39: INCEIPL $4
-
- 0x2547AF80: 90E10020 stw r7,32(r1)
- 40: GETL R7, t30
- 41: GETL R1, t32
- 42: ADDL $0x20, t32
- 43: STL t30, (t32)
- 44: INCEIPL $4
-
- 0x2547AF84: 90010030 stw r0,48(r1)
- 45: GETL R0, t34
- 46: GETL R1, t36
- 47: ADDL $0x30, t36
- 48: STL t34, (t36)
- 49: INCEIPL $4
-
- 0x2547AF88: 91010024 stw r8,36(r1)
- 50: GETL R8, t38
- 51: GETL R1, t40
- 52: ADDL $0x24, t40
- 53: STL t38, (t40)
- 54: INCEIPL $4
-
- 0x2547AF8C: 7C000026 mfcr r0
- 55: GETL CR, t42
- 56: PUTL t42, R0
- 57: INCEIPL $4
-
- 0x2547AF90: 91210028 stw r9,40(r1)
- 58: GETL R9, t44
- 59: GETL R1, t46
- 60: ADDL $0x28, t46
- 61: STL t44, (t46)
- 62: INCEIPL $4
-
- 0x2547AF94: 9141002C stw r10,44(r1)
- 63: GETL R10, t48
- 64: GETL R1, t50
- 65: ADDL $0x2C, t50
- 66: STL t48, (t50)
- 67: INCEIPL $4
-
- 0x2547AF98: 90010008 stw r0,8(r1)
- 68: GETL R0, t52
- 69: GETL R1, t54
- 70: ADDL $0x8, t54
- 71: STL t52, (t54)
- 72: INCEIPL $4
-
- 0x2547AF9C: 480000C9 bl 0x2547B064
- 73: MOVL $0x2547AFA0, t56
- 74: PUTL t56, LR
- 75: JMPo-c $0x2547B064 ($4)
-
-
-. 0 2547AF5C 68
-. 94 21 FF C0 90 01 00 0C 90 61 00 10 90 81 00 14 7D 83 63 78 90 A1 00 18 7D 64 5B 78 90 C1 00 1C 7C 08 02 A6 90 E1 00 20 90 01 00 30 91 01 00 24 7C 00 00 26 91 21 00 28 91 41 00 2C 90 01 00 08 48 00 00 C9
-
-==== BB 1303 fixup(0x2547B064) approx BBs exec'd 0 ====
-
- 0x2547B064: 7CE802A6 mflr r7
- 0: GETL LR, t0
- 1: PUTL t0, R7
- 2: INCEIPL $4
-
- 0x2547B068: 9421FFE0 stwu r1,-32(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFFE0, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0x2547B06C: 93810010 stw r28,16(r1)
- 9: GETL R28, t6
- 10: GETL R1, t8
- 11: ADDL $0x10, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547B070: 4801BF91 bl 0x25497000
- 14: MOVL $0x2547B074, t10
- 15: PUTL t10, LR
- 16: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547B064 16
-. 7C E8 02 A6 94 21 FF E0 93 81 00 10 48 01 BF 91
-
-==== BB 1304 (0x2547B074) approx BBs exec'd 0 ====
-
- 0x2547B074: 93A10014 stw r29,20(r1)
- 0: GETL R29, t0
- 1: GETL R1, t2
- 2: ADDL $0x14, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547B078: 90E10024 stw r7,36(r1)
- 5: GETL R7, t4
- 6: GETL R1, t6
- 7: ADDL $0x24, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0x2547B07C: 80C3007C lwz r6,124(r3)
- 10: GETL R3, t8
- 11: ADDL $0x7C, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R6
- 14: INCEIPL $4
-
- 0x2547B080: 93C10018 stw r30,24(r1)
- 15: GETL R30, t12
- 16: GETL R1, t14
- 17: ADDL $0x18, t14
- 18: STL t12, (t14)
- 19: INCEIPL $4
-
- 0x2547B084: 7FC802A6 mflr r30
- 20: GETL LR, t16
- 21: PUTL t16, R30
- 22: INCEIPL $4
-
- 0x2547B088: 93E1001C stw r31,28(r1)
- 23: GETL R31, t18
- 24: GETL R1, t20
- 25: ADDL $0x1C, t20
- 26: STL t18, (t20)
- 27: INCEIPL $4
-
- 0x2547B08C: 7C7F1B78 or r31,r3,r3
- 28: GETL R3, t22
- 29: PUTL t22, R31
- 30: INCEIPL $4
-
- 0x2547B090: 81460004 lwz r10,4(r6)
- 31: GETL R6, t24
- 32: ADDL $0x4, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R10
- 35: INCEIPL $4
-
- 0x2547B094: 80A30038 lwz r5,56(r3)
- 36: GETL R3, t28
- 37: ADDL $0x38, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R5
- 40: INCEIPL $4
-
- 0x2547B098: 7FAA2214 add r29,r10,r4
- 41: GETL R10, t32
- 42: GETL R4, t34
- 43: ADDL t32, t34
- 44: PUTL t34, R29
- 45: INCEIPL $4
-
- 0x2547B09C: 7D6A202E lwzx r11,r10,r4
- 46: GETL R4, t36
- 47: GETL R10, t38
- 48: ADDL t38, t36
- 49: LDL (t36), t40
- 50: PUTL t40, R11
- 51: INCEIPL $4
-
- 0x2547B0A0: 807D0004 lwz r3,4(r29)
- 52: GETL R29, t42
- 53: ADDL $0x4, t42
- 54: LDL (t42), t44
- 55: PUTL t44, R3
- 56: INCEIPL $4
-
- 0x2547B0A4: 81850004 lwz r12,4(r5)
- 57: GETL R5, t46
- 58: ADDL $0x4, t46
- 59: LDL (t46), t48
- 60: PUTL t48, R12
- 61: INCEIPL $4
-
- 0x2547B0A8: 5466C23E rlwinm r6,r3,24,8,31
- 62: GETL R3, t50
- 63: SHRL $0x8, t50
- 64: PUTL t50, R6
- 65: INCEIPL $4
-
- 0x2547B0AC: 807F0000 lwz r3,0(r31)
- 66: GETL R31, t52
- 67: LDL (t52), t54
- 68: PUTL t54, R3
- 69: INCEIPL $4
-
- 0x2547B0B0: 54C52036 rlwinm r5,r6,4,0,27
- 70: GETL R6, t56
- 71: SHLL $0x4, t56
- 72: PUTL t56, R5
- 73: INCEIPL $4
-
- 0x2547B0B4: 7D056214 add r8,r5,r12
- 74: GETL R5, t58
- 75: GETL R12, t60
- 76: ADDL t58, t60
- 77: PUTL t60, R8
- 78: INCEIPL $4
-
- 0x2547B0B8: 7F835A14 add r28,r3,r11
- 79: GETL R3, t62
- 80: GETL R11, t64
- 81: ADDL t62, t64
- 82: PUTL t64, R28
- 83: INCEIPL $4
-
- 0x2547B0BC: 8808000D lbz r0,13(r8)
- 84: GETL R8, t66
- 85: ADDL $0xD, t66
- 86: LDB (t66), t68
- 87: PUTL t68, R0
- 88: INCEIPL $4
-
- 0x2547B0C0: 70090003 andi. r9,r0,0x3
- 89: GETL R0, t70
- 90: ANDL $0x3, t70
- 91: PUTL t70, R9
- 92: CMP0L t70, t72 (-rSo)
- 93: ICRFL t72, $0x0, CR
- 94: INCEIPL $4
-
- 0x2547B0C4: 813F0034 lwz r9,52(r31)
- 95: GETL R31, t74
- 96: ADDL $0x34, t74
- 97: LDL (t74), t76
- 98: PUTL t76, R9
- 99: INCEIPL $4
-
- 0x2547B0C8: 80890004 lwz r4,4(r9)
- 100: GETL R9, t78
- 101: ADDL $0x4, t78
- 102: LDL (t78), t80
- 103: PUTL t80, R4
- 104: INCEIPL $4
-
- 0x2547B0CC: 91010008 stw r8,8(r1)
- 105: GETL R8, t82
- 106: GETL R1, t84
- 107: ADDL $0x8, t84
- 108: STL t82, (t84)
- 109: INCEIPL $4
-
- 0x2547B0D0: 408200E0 bc 4,2,0x2547B1B0
- 110: Jc02o $0x2547B1B0
-
-
-. 0 2547B074 96
-. 93 A1 00 14 90 E1 00 24 80 C3 00 7C 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 7C 7F 1B 78 81 46 00 04 80 A3 00 38 7F AA 22 14 7D 6A 20 2E 80 7D 00 04 81 85 00 04 54 66 C2 3E 80 7F 00 00 54 C5 20 36 7D 05 62 14 7F 83 5A 14 88 08 00 0D 70 09 00 03 81 3F 00 34 80 89 00 04 91 01 00 08 40 82 00 E0
-
-==== BB 1305 (0x2547B0D4) approx BBs exec'd 0 ====
-
- 0x2547B0D4: 815F00E4 lwz r10,228(r31)
- 0: GETL R31, t0
- 1: ADDL $0xE4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x2547B0D8: 38E00000 li r7,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R7
- 7: INCEIPL $4
-
- 0x2547B0DC: 2F8A0000 cmpi cr7,r10,0
- 8: GETL R10, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x7, CR
- 11: INCEIPL $4
-
- 0x2547B0E0: 409E009C bc 4,30,0x2547B17C
- 12: Jc30o $0x2547B17C
-
-
-. 0 2547B0D4 16
-. 81 5F 00 E4 38 E0 00 00 2F 8A 00 00 40 9E 00 9C
-
-==== BB 1306 (0x2547B17C) approx BBs exec'd 0 ====
-
- 0x2547B17C: 816A0004 lwz r11,4(r10)
- 0: GETL R10, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547B180: 54C9083C rlwinm r9,r6,1,0,30
- 5: GETL R6, t4
- 6: SHLL $0x1, t4
- 7: PUTL t4, R9
- 8: INCEIPL $4
-
- 0x2547B184: 80DF0188 lwz r6,392(r31)
- 9: GETL R31, t6
- 10: ADDL $0x188, t6
- 11: LDL (t6), t8
- 12: PUTL t8, R6
- 13: INCEIPL $4
-
- 0x2547B188: 7D095A2E lhzx r8,r9,r11
- 14: GETL R11, t10
- 15: GETL R9, t12
- 16: ADDL t12, t10
- 17: LDW (t10), t14
- 18: PUTL t14, R8
- 19: INCEIPL $4
-
- 0x2547B18C: 55072376 rlwinm r7,r8,4,13,27
- 20: GETL R8, t16
- 21: ROLL $0x4, t16
- 22: ANDL $0x7FFF0, t16
- 23: PUTL t16, R7
- 24: INCEIPL $4
-
- 0x2547B190: 7D663A14 add r11,r6,r7
- 25: GETL R6, t18
- 26: GETL R7, t20
- 27: ADDL t18, t20
- 28: PUTL t20, R11
- 29: INCEIPL $4
-
- 0x2547B194: 806B0004 lwz r3,4(r11)
- 30: GETL R11, t22
- 31: ADDL $0x4, t22
- 32: LDL (t22), t24
- 33: PUTL t24, R3
- 34: INCEIPL $4
-
- 0x2547B198: 7C6AFE70 srawi r10,r3,31
- 35: GETL R3, t26
- 36: SARL $0x1F, t26 (-wCa)
- 37: PUTL t26, R10
- 38: INCEIPL $4
-
- 0x2547B19C: 7D401A78 xor r0,r10,r3
- 39: GETL R10, t28
- 40: GETL R3, t30
- 41: XORL t28, t30
- 42: PUTL t30, R0
- 43: INCEIPL $4
-
- 0x2547B1A0: 7D205050 subf r9,r0,r10
- 44: GETL R0, t32
- 45: GETL R10, t34
- 46: SUBL t32, t34
- 47: PUTL t34, R9
- 48: INCEIPL $4
-
- 0x2547B1A4: 7D28FE70 srawi r8,r9,31
- 49: GETL R9, t36
- 50: SARL $0x1F, t36 (-wCa)
- 51: PUTL t36, R8
- 52: INCEIPL $4
-
- 0x2547B1A8: 7D674038 and r7,r11,r8
- 53: GETL R11, t38
- 54: GETL R8, t40
- 55: ANDL t38, t40
- 56: PUTL t40, R7
- 57: INCEIPL $4
-
- 0x2547B1AC: 4BFFFF38 b 0x2547B0E4
- 58: JMPo $0x2547B0E4 ($4)
-
-
-. 0 2547B17C 52
-. 81 6A 00 04 54 C9 08 3C 80 DF 01 88 7D 09 5A 2E 55 07 23 76 7D 66 3A 14 80 6B 00 04 7C 6A FE 70 7D 40 1A 78 7D 20 50 50 7D 28 FE 70 7D 67 40 38 4B FF FF 38
-
-==== BB 1307 (0x2547B0E4) approx BBs exec'd 0 ====
-
- 0x2547B0E4: 7C05602E lwzx r0,r5,r12
- 0: GETL R12, t0
- 1: GETL R5, t2
- 2: ADDL t2, t0
- 3: LDL (t0), t4
- 4: PUTL t4, R0
- 5: INCEIPL $4
-
- 0x2547B0E8: 39400000 li r10,0
- 6: MOVL $0x0, t6
- 7: PUTL t6, R10
- 8: INCEIPL $4
-
- 0x2547B0EC: 80DF01C0 lwz r6,448(r31)
- 9: GETL R31, t8
- 10: ADDL $0x1C0, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R6
- 13: INCEIPL $4
-
- 0x2547B0F0: 38A10008 addi r5,r1,8
- 14: GETL R1, t12
- 15: ADDL $0x8, t12
- 16: PUTL t12, R5
- 17: INCEIPL $4
-
- 0x2547B0F4: 7C602214 add r3,r0,r4
- 18: GETL R0, t14
- 19: GETL R4, t16
- 20: ADDL t14, t16
- 21: PUTL t16, R3
- 22: INCEIPL $4
-
- 0x2547B0F8: 39000001 li r8,1
- 23: MOVL $0x1, t18
- 24: PUTL t18, R8
- 25: INCEIPL $4
-
- 0x2547B0FC: 7FE4FB78 or r4,r31,r31
- 26: GETL R31, t20
- 27: PUTL t20, R4
- 28: INCEIPL $4
-
- 0x2547B100: 39200001 li r9,1
- 29: MOVL $0x1, t22
- 30: PUTL t22, R9
- 31: INCEIPL $4
-
- 0x2547B104: 4BFFD4A1 bl 0x254785A4
- 32: MOVL $0x2547B108, t24
- 33: PUTL t24, LR
- 34: JMPo-c $0x254785A4 ($4)
-
-
-. 0 2547B0E4 36
-. 7C 05 60 2E 39 40 00 00 80 DF 01 C0 38 A1 00 08 7C 60 22 14 39 00 00 01 7F E4 FB 78 39 20 00 01 4B FF D4 A1
-
-==== BB 1308 (0x2547B108) approx BBs exec'd 0 ====
-
- 0x2547B108: 39400000 li r10,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R10
- 2: INCEIPL $4
-
- 0x2547B10C: 81610008 lwz r11,8(r1)
- 3: GETL R1, t2
- 4: ADDL $0x8, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R11
- 7: INCEIPL $4
-
- 0x2547B110: 2C8B0000 cmpi cr1,r11,0
- 8: GETL R11, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x1, CR
- 11: INCEIPL $4
-
- 0x2547B114: 41860018 bc 12,6,0x2547B12C
- 12: Js06o $0x2547B12C
-
-
-. 0 2547B108 16
-. 39 40 00 00 81 61 00 08 2C 8B 00 00 41 86 00 18
-
-==== BB 1309 (0x2547B118) approx BBs exec'd 0 ====
-
- 0x2547B118: 2F030000 cmpi cr6,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x2547B11C: 419A00A0 bc 12,26,0x2547B1BC
- 4: Js26o $0x2547B1BC
-
-
-. 0 2547B118 8
-. 2F 03 00 00 41 9A 00 A0
-
-==== BB 1310 (0x2547B120) approx BBs exec'd 0 ====
-
- 0x2547B120: 81830000 lwz r12,0(r3)
- 0: GETL R3, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R12
- 3: INCEIPL $4
-
- 0x2547B124: 808B0004 lwz r4,4(r11)
- 4: GETL R11, t4
- 5: ADDL $0x4, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R4
- 8: INCEIPL $4
-
- 0x2547B128: 7D4C2214 add r10,r12,r4
- 9: GETL R12, t8
- 10: GETL R4, t10
- 11: ADDL t8, t10
- 12: PUTL t10, R10
- 13: INCEIPL $4
-
- 0x2547B12C: 80FE04F4 lwz r7,1268(r30)
- 14: GETL R30, t12
- 15: ADDL $0x4F4, t12
- 16: LDL (t12), t14
- 17: PUTL t14, R7
- 18: INCEIPL $4
-
- 0x2547B130: 80DD0008 lwz r6,8(r29)
- 19: GETL R29, t16
- 20: ADDL $0x8, t16
- 21: LDL (t16), t18
- 22: PUTL t18, R6
- 23: INCEIPL $4
-
- 0x2547B134: 8067002C lwz r3,44(r7)
- 24: GETL R7, t20
- 25: ADDL $0x2C, t20
- 26: LDL (t20), t22
- 27: PUTL t22, R3
- 28: INCEIPL $4
-
- 0x2547B138: 7D665214 add r11,r6,r10
- 29: GETL R6, t24
- 30: GETL R10, t26
- 31: ADDL t24, t26
- 32: PUTL t26, R11
- 33: INCEIPL $4
-
- 0x2547B13C: 2C030000 cmpi cr0,r3,0
- 34: GETL R3, t28
- 35: CMP0L t28, t30 (-rSo)
- 36: ICRFL t30, $0x0, CR
- 37: INCEIPL $4
-
- 0x2547B140: 7D635B78 or r3,r11,r11
- 38: GETL R11, t32
- 39: PUTL t32, R3
- 40: INCEIPL $4
-
- 0x2547B144: 40820018 bc 4,2,0x2547B15C
- 41: Jc02o $0x2547B15C
-
-
-. 0 2547B120 40
-. 81 83 00 00 80 8B 00 04 7D 4C 22 14 80 FE 04 F4 80 DD 00 08 80 67 00 2C 7D 66 52 14 2C 03 00 00 7D 63 5B 78 40 82 00 18
-
-==== BB 1311 (0x2547B148) approx BBs exec'd 0 ====
-
- 0x2547B148: 7FE3FB78 or r3,r31,r31
- 0: GETL R31, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x2547B14C: 7FA4EB78 or r4,r29,r29
- 3: GETL R29, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0x2547B150: 7F85E378 or r5,r28,r28
- 6: GETL R28, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x2547B154: 7D665B78 or r6,r11,r11
- 9: GETL R11, t6
- 10: PUTL t6, R6
- 11: INCEIPL $4
-
- 0x2547B158: 4800540D bl 0x25480564
- 12: MOVL $0x2547B15C, t8
- 13: PUTL t8, LR
- 14: JMPo-c $0x25480564 ($4)
-
-
-. 0 2547B148 20
-. 7F E3 FB 78 7F A4 EB 78 7F 85 E3 78 7D 66 5B 78 48 00 54 0D
-
-==== BB 1312 __elf_machine_fixup_plt(0x25480564) approx BBs exec'd 0 ====
-
- 0x25480564: 7D453050 subf r10,r5,r6
- 0: GETL R5, t0
- 1: GETL R6, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0x25480568: 3D06FE00 addis r8,r6,-512
- 5: GETL R6, t4
- 6: ADDL $0xFE000000, t4
- 7: PUTL t4, R8
- 8: INCEIPL $4
-
- 0x2548056C: 554C3032 rlwinm r12,r10,6,0,25
- 9: GETL R10, t6
- 10: SHLL $0x6, t6
- 11: PUTL t6, R12
- 12: INCEIPL $4
-
- 0x25480570: 3CE0FC00 lis r7,-1024
- 13: MOVL $0xFC000000, t8
- 14: PUTL t8, R7
- 15: INCEIPL $4
-
- 0x25480574: 7D843670 srawi r4,r12,6
- 16: GETL R12, t10
- 17: SARL $0x6, t10 (-wCa)
- 18: PUTL t10, R4
- 19: INCEIPL $4
-
- 0x25480578: 39280003 addi r9,r8,3
- 20: GETL R8, t12
- 21: ADDL $0x3, t12
- 22: PUTL t12, R9
- 23: INCEIPL $4
-
- 0x2548057C: 7F845000 cmp cr7,r4,r10
- 24: GETL R4, t14
- 25: GETL R10, t16
- 26: CMPL t14, t16, t18 (-rSo)
- 27: ICRFL t18, $0x7, CR
- 28: INCEIPL $4
-
- 0x25480580: 60E00002 ori r0,r7,0x2
- 29: MOVL $0xFC000002, t20
- 30: PUTL t20, R0
- 31: INCEIPL $4
-
- 0x25480584: 548B01BA rlwinm r11,r4,0,6,29
- 32: GETL R4, t22
- 33: ANDL $0x3FFFFFC, t22
- 34: PUTL t22, R11
- 35: INCEIPL $4
-
- 0x25480588: 9421FFF0 stwu r1,-16(r1)
- 36: GETL R1, t24
- 37: GETL R1, t26
- 38: ADDL $0xFFFFFFF0, t26
- 39: PUTL t26, R1
- 40: STL t24, (t26)
- 41: INCEIPL $4
-
- 0x2548058C: 7F090040 cmpl cr6,r9,r0
- 42: GETL R9, t28
- 43: GETL R0, t30
- 44: CMPUL t28, t30, t32 (-rSo)
- 45: ICRFL t32, $0x6, CR
- 46: INCEIPL $4
-
- 0x25480590: 656B4800 oris r11,r11,0x4800
- 47: GETL R11, t34
- 48: ORL $0x48000000, t34
- 49: PUTL t34, R11
- 50: INCEIPL $4
-
- 0x25480594: 419E00EC bc 12,30,0x25480680
- 51: Js30o $0x25480680
-
-
-. 0 25480564 52
-. 7D 45 30 50 3D 06 FE 00 55 4C 30 32 3C E0 FC 00 7D 84 36 70 39 28 00 03 7F 84 50 00 60 E0 00 02 54 8B 01 BA 94 21 FF F0 7F 09 00 40 65 6B 48 00 41 9E 00 EC
-
-==== BB 1313 (0x25480680) approx BBs exec'd 0 ====
-
- 0x25480680: 91650000 stw r11,0(r5)
- 0: GETL R11, t0
- 1: GETL R5, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0x25480684: 7C00286C dcbst r0,r5
- 4: INCEIPL $4
-
- 0x25480688: 7C0004AC sync
- 5: INCEIPL $4
-
- 0x2548068C: 7C002FAC icbi r0,r5
- 6: GETL R5, t4
- 7: CALLM_So
- 8: PUSHL t4
- 9: CALLMo $0x68
- 10: CALLM_Eo
- 11: INCEIPL $4
-
- 0x25480690: 7C0004AC sync
- 12: INCEIPL $4
-
- 0x25480694: 4C00012C 13: INCEIPL $4
-
- 0x25480698: 7CC33378 or r3,r6,r6
- 14: GETL R6, t6
- 15: PUTL t6, R3
- 16: INCEIPL $4
-
- 0x2548069C: 38210010 addi r1,r1,16
- 17: GETL R1, t8
- 18: ADDL $0x10, t8
- 19: PUTL t8, R1
- 20: INCEIPL $4
-
- 0x254806A0: 4E800020 blr
- 21: GETL LR, t10
- 22: JMPo-r t10 ($4)
-
-
-. 0 25480680 36
-. 91 65 00 00 7C 00 28 6C 7C 00 04 AC 7C 00 2F AC 7C 00 04 AC 4C 00 01 2C 7C C3 33 78 38 21 00 10 4E 80 00 20
-
-==== BB 1314 (0x2547B15C) approx BBs exec'd 0 ====
-
- 0x2547B15C: 83810024 lwz r28,36(r1)
- 0: GETL R1, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R28
- 4: INCEIPL $4
-
- 0x2547B160: 83A10014 lwz r29,20(r1)
- 5: GETL R1, t4
- 6: ADDL $0x14, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R29
- 9: INCEIPL $4
-
- 0x2547B164: 7F8803A6 mtlr r28
- 10: GETL R28, t8
- 11: PUTL t8, LR
- 12: INCEIPL $4
-
- 0x2547B168: 83C10018 lwz r30,24(r1)
- 13: GETL R1, t10
- 14: ADDL $0x18, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R30
- 17: INCEIPL $4
-
- 0x2547B16C: 83810010 lwz r28,16(r1)
- 18: GETL R1, t14
- 19: ADDL $0x10, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R28
- 22: INCEIPL $4
-
- 0x2547B170: 83E1001C lwz r31,28(r1)
- 23: GETL R1, t18
- 24: ADDL $0x1C, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R31
- 27: INCEIPL $4
-
- 0x2547B174: 38210020 addi r1,r1,32
- 28: GETL R1, t22
- 29: ADDL $0x20, t22
- 30: PUTL t22, R1
- 31: INCEIPL $4
-
- 0x2547B178: 4E800020 blr
- 32: GETL LR, t24
- 33: JMPo-r t24 ($4)
-
-
-. 0 2547B15C 32
-. 83 81 00 24 83 A1 00 14 7F 88 03 A6 83 C1 00 18 83 81 00 10 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 1315 (0x2547AFA0) approx BBs exec'd 0 ====
-
- 0x2547AFA0: 7C6903A6 mtctr r3
- 0: GETL R3, t0
- 1: PUTL t0, CTR
- 2: INCEIPL $4
-
- 0x2547AFA4: 80010030 lwz r0,48(r1)
- 3: GETL R1, t2
- 4: ADDL $0x30, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R0
- 7: INCEIPL $4
-
- 0x2547AFA8: 8141002C lwz r10,44(r1)
- 8: GETL R1, t6
- 9: ADDL $0x2C, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R10
- 12: INCEIPL $4
-
- 0x2547AFAC: 81210028 lwz r9,40(r1)
- 13: GETL R1, t10
- 14: ADDL $0x28, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R9
- 17: INCEIPL $4
-
- 0x2547AFB0: 7C0803A6 mtlr r0
- 18: GETL R0, t14
- 19: PUTL t14, LR
- 20: INCEIPL $4
-
- 0x2547AFB4: 81010024 lwz r8,36(r1)
- 21: GETL R1, t16
- 22: ADDL $0x24, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R8
- 25: INCEIPL $4
-
- 0x2547AFB8: 80010008 lwz r0,8(r1)
- 26: GETL R1, t20
- 27: ADDL $0x8, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R0
- 30: INCEIPL $4
-
- 0x2547AFBC: 80E10020 lwz r7,32(r1)
- 31: GETL R1, t24
- 32: ADDL $0x20, t24
- 33: LDL (t24), t26
- 34: PUTL t26, R7
- 35: INCEIPL $4
-
- 0x2547AFC0: 80C1001C lwz r6,28(r1)
- 36: GETL R1, t28
- 37: ADDL $0x1C, t28
- 38: LDL (t28), t30
- 39: PUTL t30, R6
- 40: INCEIPL $4
-
- 0x2547AFC4: 7C0FF120 mtcr r0
- 41: GETL R0, t32
- 42: PUTL t32, CR
- 43: INCEIPL $4
-
- 0x2547AFC8: 80A10018 lwz r5,24(r1)
- 44: GETL R1, t34
- 45: ADDL $0x18, t34
- 46: LDL (t34), t36
- 47: PUTL t36, R5
- 48: INCEIPL $4
-
- 0x2547AFCC: 80810014 lwz r4,20(r1)
- 49: GETL R1, t38
- 50: ADDL $0x14, t38
- 51: LDL (t38), t40
- 52: PUTL t40, R4
- 53: INCEIPL $4
-
- 0x2547AFD0: 80610010 lwz r3,16(r1)
- 54: GETL R1, t42
- 55: ADDL $0x10, t42
- 56: LDL (t42), t44
- 57: PUTL t44, R3
- 58: INCEIPL $4
-
- 0x2547AFD4: 8001000C lwz r0,12(r1)
- 59: GETL R1, t46
- 60: ADDL $0xC, t46
- 61: LDL (t46), t48
- 62: PUTL t48, R0
- 63: INCEIPL $4
-
- 0x2547AFD8: 38210040 addi r1,r1,64
- 64: GETL R1, t50
- 65: ADDL $0x40, t50
- 66: PUTL t50, R1
- 67: INCEIPL $4
-
- 0x2547AFDC: 4E800420 bctr
- 68: GETL CTR, t52
- 69: JMPo t52 ($4)
-
-
-. 0 2547AFA0 64
-. 7C 69 03 A6 80 01 00 30 81 41 00 2C 81 21 00 28 7C 08 03 A6 81 01 00 24 80 01 00 08 80 E1 00 20 80 C1 00 1C 7C 0F F1 20 80 A1 00 18 80 81 00 14 80 61 00 10 80 01 00 0C 38 21 00 40 4E 80 04 20
-
-==== BB 1316 __libc_start_main(0xFE9B8C4) approx BBs exec'd 0 ====
-
- 0xFE9B8C4: 7C0802A6 mflr r0
- 0: GETL LR, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0xFE9B8C8: 9421FFF0 stwu r1,-16(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFFF0, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0xFE9B8CC: 4812C585 bl 0xFFC7E50
- 9: MOVL $0xFE9B8D0, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FE9B8C4 12
-. 7C 08 02 A6 94 21 FF F0 48 12 C5 85
-
-==== BB 1317 (0xFE9B8D0) approx BBs exec'd 0 ====
-
- 0xFE9B8D0: 93C10008 stw r30,8(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFE9B8D4: 7D2A4B78 or r10,r9,r9
- 5: GETL R9, t4
- 6: PUTL t4, R10
- 7: INCEIPL $4
-
- 0xFE9B8D8: 7FC802A6 mflr r30
- 8: GETL LR, t6
- 9: PUTL t6, R30
- 10: INCEIPL $4
-
- 0xFE9B8DC: 90010014 stw r0,20(r1)
- 11: GETL R0, t8
- 12: GETL R1, t10
- 13: ADDL $0x14, t10
- 14: STL t8, (t10)
- 15: INCEIPL $4
-
- 0xFE9B8E0: 7C6C1B78 or r12,r3,r3
- 16: GETL R3, t12
- 17: PUTL t12, R12
- 18: INCEIPL $4
-
- 0xFE9B8E4: 80090000 lwz r0,0(r9)
- 19: GETL R9, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R0
- 22: INCEIPL $4
-
- 0xFE9B8E8: 7C852378 or r5,r4,r4
- 23: GETL R4, t18
- 24: PUTL t18, R5
- 25: INCEIPL $4
-
- 0xFE9B8EC: 7CE93B78 or r9,r7,r7
- 26: GETL R7, t20
- 27: PUTL t20, R9
- 28: INCEIPL $4
-
- 0xFE9B8F0: 7D074378 or r7,r8,r8
- 29: GETL R8, t22
- 30: PUTL t22, R7
- 31: INCEIPL $4
-
- 0xFE9B8F4: 2F800000 cmpi cr7,r0,0
- 32: GETL R0, t24
- 33: CMP0L t24, t26 (-rSo)
- 34: ICRFL t26, $0x7, CR
- 35: INCEIPL $4
-
- 0xFE9B8F8: 419E0034 bc 12,30,0xFE9B92C
- 36: Js30o $0xFE9B92C
-
-
-. 0 FE9B8D0 44
-. 93 C1 00 08 7D 2A 4B 78 7F C8 02 A6 90 01 00 14 7C 6C 1B 78 80 09 00 00 7C 85 23 78 7C E9 3B 78 7D 07 43 78 2F 80 00 00 41 9E 00 34
-
-==== BB 1318 (0xFE9B92C) approx BBs exec'd 0 ====
-
- 0xFE9B92C: 80060000 lwz r0,0(r6)
- 0: GETL R6, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0xFE9B930: 7CCB3378 or r11,r6,r6
- 4: GETL R6, t4
- 5: PUTL t4, R11
- 6: INCEIPL $4
-
- 0xFE9B934: 2C800000 cmpi cr1,r0,0
- 7: GETL R0, t6
- 8: CMP0L t6, t8 (-rSo)
- 9: ICRFL t8, $0x1, CR
- 10: INCEIPL $4
-
- 0xFE9B938: 4186003C bc 12,6,0xFE9B974
- 11: Js06o $0xFE9B974
-
-
-. 0 FE9B92C 16
-. 80 06 00 00 7C CB 33 78 2C 80 00 00 41 86 00 3C
-
-==== BB 1319 (0xFE9B93C) approx BBs exec'd 0 ====
-
- 0xFE9B93C: 811E1CB0 lwz r8,7344(r30)
- 0: GETL R30, t0
- 1: ADDL $0x1CB0, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0xFE9B940: 48000010 b 0xFE9B950
- 5: JMPo $0xFE9B950 ($4)
-
-
-. 0 FE9B93C 8
-. 81 1E 1C B0 48 00 00 10
-
-==== BB 1320 (0xFE9B950) approx BBs exec'd 0 ====
-
- 0xFE9B950: 2F800013 cmpi cr7,r0,19
- 0: GETL R0, t0
- 1: MOVL $0x13, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0xFE9B954: 2F080000 cmpi cr6,r8,0
- 5: GETL R8, t6
- 6: CMP0L t6, t8 (-rSo)
- 7: ICRFL t8, $0x6, CR
- 8: INCEIPL $4
-
- 0xFE9B958: 409EFFEC bc 4,30,0xFE9B944
- 9: Jc30o $0xFE9B944
-
-
-. 0 FE9B950 12
-. 2F 80 00 13 2F 08 00 00 40 9E FF EC
-
-==== BB 1321 (0xFE9B944) approx BBs exec'd 0 ====
-
- 0xFE9B944: 840B0008 lwzu r0,8(r11)
- 0: GETL R11, t0
- 1: ADDL $0x8, t0
- 2: PUTL t0, R11
- 3: LDL (t0), t2
- 4: PUTL t2, R0
- 5: INCEIPL $4
-
- 0xFE9B948: 2F000000 cmpi cr6,r0,0
- 6: GETL R0, t4
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x6, CR
- 9: INCEIPL $4
-
- 0xFE9B94C: 419A0028 bc 12,26,0xFE9B974
- 10: Js26o $0xFE9B974
-
-
-. 0 FE9B944 12
-. 84 0B 00 08 2F 00 00 00 41 9A 00 28
-
-==== BB 1322 (0xFE9B95C) approx BBs exec'd 0 ====
-
- 0xFE9B95C: 41BAFFE8 bc 13,26,0xFE9B944
- 0: Js26o $0xFE9B944
-
-
-. 0 FE9B95C 4
-. 41 BA FF E8
-
-==== BB 1323 (0xFE9B960) approx BBs exec'd 0 ====
-
- 0xFE9B960: 808B0004 lwz r4,4(r11)
- 0: GETL R11, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0xFE9B964: 90880000 stw r4,0(r8)
- 5: GETL R4, t4
- 6: GETL R8, t6
- 7: STL t4, (t6)
- 8: INCEIPL $4
-
- 0xFE9B968: 840B0008 lwzu r0,8(r11)
- 9: GETL R11, t8
- 10: ADDL $0x8, t8
- 11: PUTL t8, R11
- 12: LDL (t8), t10
- 13: PUTL t10, R0
- 14: INCEIPL $4
-
- 0xFE9B96C: 2F000000 cmpi cr6,r0,0
- 15: GETL R0, t12
- 16: CMP0L t12, t14 (-rSo)
- 17: ICRFL t14, $0x6, CR
- 18: INCEIPL $4
-
- 0xFE9B970: 409AFFE0 bc 4,26,0xFE9B950
- 19: Jc26o $0xFE9B950
-
-
-. 0 FE9B960 20
-. 80 8B 00 04 90 88 00 00 84 0B 00 08 2F 00 00 00 40 9A FF E0
-
-==== BB 1324 (0xFE9B974) approx BBs exec'd 0 ====
-
- 0xFE9B974: 8107000C lwz r8,12(r7)
- 0: GETL R7, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0xFE9B978: 7D846378 or r4,r12,r12
- 5: GETL R12, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0xFE9B97C: 80670004 lwz r3,4(r7)
- 8: GETL R7, t6
- 9: ADDL $0x4, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R3
- 12: INCEIPL $4
-
- 0xFE9B980: 80E70008 lwz r7,8(r7)
- 13: GETL R7, t10
- 14: ADDL $0x8, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R7
- 17: INCEIPL $4
-
- 0xFE9B984: 4BFFFD91 bl 0xFE9B714
- 18: MOVL $0xFE9B988, t14
- 19: PUTL t14, LR
- 20: JMPo-c $0xFE9B714 ($4)
-
-
-. 0 FE9B974 20
-. 81 07 00 0C 7D 84 63 78 80 67 00 04 80 E7 00 08 4B FF FD 91
-
-==== BB 1325 generic_start_main(0xFE9B714) approx BBs exec'd 0 ====
-
- 0xFE9B714: 9421FDE0 stwu r1,-544(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFDE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFE9B718: 7D4802A6 mflr r10
- 6: GETL LR, t4
- 7: PUTL t4, R10
- 8: INCEIPL $4
-
- 0xFE9B71C: 4812C735 bl 0xFFC7E50
- 9: MOVL $0xFE9B720, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FE9B714 12
-. 94 21 FD E0 7D 48 02 A6 48 12 C7 35
-
-==== BB 1326 (0xFE9B720) approx BBs exec'd 0 ====
-
- 0xFE9B720: 93C10218 stw r30,536(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x218, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFE9B724: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0xFE9B728: 93A10214 stw r29,532(r1)
- 8: GETL R29, t6
- 9: GETL R1, t8
- 10: ADDL $0x214, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0xFE9B72C: 5480103A rlwinm r0,r4,2,0,29
- 13: GETL R4, t10
- 14: SHLL $0x2, t10
- 15: PUTL t10, R0
- 16: INCEIPL $4
-
- 0xFE9B730: 93810210 stw r28,528(r1)
- 17: GETL R28, t12
- 18: GETL R1, t14
- 19: ADDL $0x210, t14
- 20: STL t12, (t14)
- 21: INCEIPL $4
-
- 0xFE9B734: 7D602A14 add r11,r0,r5
- 22: GETL R0, t16
- 23: GETL R5, t18
- 24: ADDL t16, t18
- 25: PUTL t18, R11
- 26: INCEIPL $4
-
- 0xFE9B738: 93E1021C stw r31,540(r1)
- 27: GETL R31, t20
- 28: GETL R1, t22
- 29: ADDL $0x21C, t22
- 30: STL t20, (t22)
- 31: INCEIPL $4
-
- 0xFE9B73C: 83BE1CE4 lwz r29,7396(r30)
- 32: GETL R30, t24
- 33: ADDL $0x1CE4, t24
- 34: LDL (t24), t26
- 35: PUTL t26, R29
- 36: INCEIPL $4
-
- 0xFE9B740: 7CFC3B78 or r28,r7,r7
- 37: GETL R7, t28
- 38: PUTL t28, R28
- 39: INCEIPL $4
-
- 0xFE9B744: 91410224 stw r10,548(r1)
- 40: GETL R10, t30
- 41: GETL R1, t32
- 42: ADDL $0x224, t32
- 43: STL t30, (t32)
- 44: INCEIPL $4
-
- 0xFE9B748: 7D1F4378 or r31,r8,r8
- 45: GETL R8, t34
- 46: PUTL t34, R31
- 47: INCEIPL $4
-
- 0xFE9B74C: 2F9D0000 cmpi cr7,r29,0
- 48: GETL R29, t36
- 49: CMP0L t36, t38 (-rSo)
- 50: ICRFL t38, $0x7, CR
- 51: INCEIPL $4
-
- 0xFE9B750: 906101F0 stw r3,496(r1)
- 52: GETL R3, t40
- 53: GETL R1, t42
- 54: ADDL $0x1F0, t42
- 55: STL t40, (t42)
- 56: INCEIPL $4
-
- 0xFE9B754: 9361020C stw r27,524(r1)
- 57: GETL R27, t44
- 58: GETL R1, t46
- 59: ADDL $0x20C, t46
- 60: STL t44, (t46)
- 61: INCEIPL $4
-
- 0xFE9B758: 7D234B78 or r3,r9,r9
- 62: GETL R9, t48
- 63: PUTL t48, R3
- 64: INCEIPL $4
-
- 0xFE9B75C: 908101F4 stw r4,500(r1)
- 65: GETL R4, t50
- 66: GETL R1, t52
- 67: ADDL $0x1F4, t52
- 68: STL t50, (t52)
- 69: INCEIPL $4
-
- 0xFE9B760: 396B0004 addi r11,r11,4
- 70: GETL R11, t54
- 71: ADDL $0x4, t54
- 72: PUTL t54, R11
- 73: INCEIPL $4
-
- 0xFE9B764: 90A101F8 stw r5,504(r1)
- 74: GETL R5, t56
- 75: GETL R1, t58
- 76: ADDL $0x1F8, t58
- 77: STL t56, (t58)
- 78: INCEIPL $4
-
- 0xFE9B768: 39400000 li r10,0
- 79: MOVL $0x0, t60
- 80: PUTL t60, R10
- 81: INCEIPL $4
-
- 0xFE9B76C: 90C101FC stw r6,508(r1)
- 82: GETL R6, t62
- 83: GETL R1, t64
- 84: ADDL $0x1FC, t64
- 85: STL t62, (t64)
- 86: INCEIPL $4
-
- 0xFE9B770: 419E0010 bc 12,30,0xFE9B780
- 87: Js30o $0xFE9B780
-
-
-. 0 FE9B720 84
-. 93 C1 02 18 7F C8 02 A6 93 A1 02 14 54 80 10 3A 93 81 02 10 7D 60 2A 14 93 E1 02 1C 83 BE 1C E4 7C FC 3B 78 91 41 02 24 7D 1F 43 78 2F 9D 00 00 90 61 01 F0 93 61 02 0C 7D 23 4B 78 90 81 01 F4 39 6B 00 04 90 A1 01 F8 39 40 00 00 90 C1 01 FC 41 9E 00 10
-
-==== BB 1327 (0xFE9B780) approx BBs exec'd 0 ====
-
- 0xFE9B780: 2C830000 cmpi cr1,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0xFE9B784: 837E1B84 lwz r27,7044(r30)
- 4: GETL R30, t4
- 5: ADDL $0x1B84, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R27
- 8: INCEIPL $4
-
- 0xFE9B788: 813E1AA4 lwz r9,6820(r30)
- 9: GETL R30, t8
- 10: ADDL $0x1AA4, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R9
- 13: INCEIPL $4
-
- 0xFE9B78C: 917B0000 stw r11,0(r27)
- 14: GETL R11, t12
- 15: GETL R27, t14
- 16: STL t12, (t14)
- 17: INCEIPL $4
-
- 0xFE9B790: 91490000 stw r10,0(r9)
- 18: GETL R10, t16
- 19: GETL R9, t18
- 20: STL t16, (t18)
- 21: INCEIPL $4
-
- 0xFE9B794: 41860010 bc 12,6,0xFE9B7A4
- 22: Js06o $0xFE9B7A4
-
-
-. 0 FE9B780 24
-. 2C 83 00 00 83 7E 1B 84 81 3E 1A A4 91 7B 00 00 91 49 00 00 41 86 00 10
-
-==== BB 1328 (0xFE9B798) approx BBs exec'd 0 ====
-
- 0xFE9B798: 38800000 li r4,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0xFE9B79C: 38A00000 li r5,0
- 3: MOVL $0x0, t2
- 4: PUTL t2, R5
- 5: INCEIPL $4
-
- 0xFE9B7A0: 48018731 bl 0xFEB3ED0
- 6: MOVL $0xFE9B7A4, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0xFEB3ED0 ($4)
-
-
-. 0 FE9B798 12
-. 38 80 00 00 38 A0 00 00 48 01 87 31
-
-==== BB 1329 __cxa_atexit_internal(0xFEB3ED0) approx BBs exec'd 0 ====
-
- 0xFEB3ED0: 7C0802A6 mflr r0
- 0: GETL LR, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0xFEB3ED4: 9421FFE0 stwu r1,-32(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFFE0, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0xFEB3ED8: 93E1001C stw r31,28(r1)
- 9: GETL R31, t6
- 10: GETL R1, t8
- 11: ADDL $0x1C, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0xFEB3EDC: 7CBF2B78 or r31,r5,r5
- 14: GETL R5, t10
- 15: PUTL t10, R31
- 16: INCEIPL $4
-
- 0xFEB3EE0: 93810010 stw r28,16(r1)
- 17: GETL R28, t12
- 18: GETL R1, t14
- 19: ADDL $0x10, t14
- 20: STL t12, (t14)
- 21: INCEIPL $4
-
- 0xFEB3EE4: 7C9C2378 or r28,r4,r4
- 22: GETL R4, t16
- 23: PUTL t16, R28
- 24: INCEIPL $4
-
- 0xFEB3EE8: 93A10014 stw r29,20(r1)
- 25: GETL R29, t18
- 26: GETL R1, t20
- 27: ADDL $0x14, t20
- 28: STL t18, (t20)
- 29: INCEIPL $4
-
- 0xFEB3EEC: 7C7D1B78 or r29,r3,r3
- 30: GETL R3, t22
- 31: PUTL t22, R29
- 32: INCEIPL $4
-
- 0xFEB3EF0: 90010024 stw r0,36(r1)
- 33: GETL R0, t24
- 34: GETL R1, t26
- 35: ADDL $0x24, t26
- 36: STL t24, (t26)
- 37: INCEIPL $4
-
- 0xFEB3EF4: 93C10018 stw r30,24(r1)
- 38: GETL R30, t28
- 39: GETL R1, t30
- 40: ADDL $0x18, t30
- 41: STL t28, (t30)
- 42: INCEIPL $4
-
- 0xFEB3EF8: 4BFFFE35 bl 0xFEB3D2C
- 43: MOVL $0xFEB3EFC, t32
- 44: PUTL t32, LR
- 45: JMPo-c $0xFEB3D2C ($4)
-
-
-. 0 FEB3ED0 44
-. 7C 08 02 A6 94 21 FF E0 93 E1 00 1C 7C BF 2B 78 93 81 00 10 7C 9C 23 78 93 A1 00 14 7C 7D 1B 78 90 01 00 24 93 C1 00 18 4B FF FE 35
-
-==== BB 1330 __new_exitfn(0xFEB3D2C) approx BBs exec'd 0 ====
-
- 0xFEB3D2C: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFEB3D30: 7C6802A6 mflr r3
- 6: GETL LR, t4
- 7: PUTL t4, R3
- 8: INCEIPL $4
-
- 0xFEB3D34: 4811411D bl 0xFFC7E50
- 9: MOVL $0xFEB3D38, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FEB3D2C 12
-. 94 21 FF E0 7C 68 02 A6 48 11 41 1D
-
-==== BB 1331 (0xFEB3D38) approx BBs exec'd 0 ====
-
- 0xFEB3D38: 93C10018 stw r30,24(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x18, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFEB3D3C: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0xFEB3D40: 93810010 stw r28,16(r1)
- 8: GETL R28, t6
- 9: GETL R1, t8
- 10: ADDL $0x10, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0xFEB3D44: 93A10014 stw r29,20(r1)
- 13: GETL R29, t10
- 14: GETL R1, t12
- 15: ADDL $0x14, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0xFEB3D48: 38000001 li r0,1
- 18: MOVL $0x1, t14
- 19: PUTL t14, R0
- 20: INCEIPL $4
-
- 0xFEB3D4C: 9361000C stw r27,12(r1)
- 21: GETL R27, t16
- 22: GETL R1, t18
- 23: ADDL $0xC, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0xFEB3D50: 3BA00000 li r29,0
- 26: MOVL $0x0, t20
- 27: PUTL t20, R29
- 28: INCEIPL $4
-
- 0xFEB3D54: 93E1001C stw r31,28(r1)
- 29: GETL R31, t22
- 30: GETL R1, t24
- 31: ADDL $0x1C, t24
- 32: STL t22, (t24)
- 33: INCEIPL $4
-
- 0xFEB3D58: 90610024 stw r3,36(r1)
- 34: GETL R3, t26
- 35: GETL R1, t28
- 36: ADDL $0x24, t28
- 37: STL t26, (t28)
- 38: INCEIPL $4
-
- 0xFEB3D5C: 839E02B4 lwz r28,692(r30)
- 39: GETL R30, t30
- 40: ADDL $0x2B4, t30
- 41: LDL (t30), t32
- 42: PUTL t32, R28
- 43: INCEIPL $4
-
- 0xFEB3D60: 7D20E028 lwarx r9,r0,r28
- 44: GETL R28, t34
- 45: LOCKo
- 46: LDL (t34), t36
- 47: PUTL t36, R9
- 48: INCEIPL $4
-
- 0xFEB3D64: 7C09E800 cmp cr0,r9,r29
- 49: GETL R9, t38
- 50: GETL R29, t40
- 51: CMPL t38, t40, t42 (-rSo)
- 52: ICRFL t42, $0x0, CR
- 53: INCEIPL $4
-
- 0xFEB3D68: 4082000C bc 4,2,0xFEB3D74
- 54: Jc02o $0xFEB3D74
-
-
-. 0 FEB3D38 52
-. 93 C1 00 18 7F C8 02 A6 93 81 00 10 93 A1 00 14 38 00 00 01 93 61 00 0C 3B A0 00 00 93 E1 00 1C 90 61 00 24 83 9E 02 B4 7D 20 E0 28 7C 09 E8 00 40 82 00 0C
-
-==== BB 1332 (0xFEB3D6C) approx BBs exec'd 0 ====
-
- 0xFEB3D6C: 7C00E12D stwcx. r0,r0,r28
- 0: GETL R28, t0
- 1: GETL R0, t2
- 2: LOCKo
- 3: STL t2, (t0) (-rSo)
- 4: ICRFL cr, $0x0, CR
- 5: INCEIPL $4
-
- 0xFEB3D70: 40A2FFF0 bc 5,2,0xFEB3D60
- 6: Jc02o $0xFEB3D60
-
-
-. 0 FEB3D6C 8
-. 7C 00 E1 2D 40 A2 FF F0
-
-==== BB 1333 (0xFEB3D60) approx BBs exec'd 0 ====
-
- 0xFEB3D60: 7D20E028 lwarx r9,r0,r28
- 0: GETL R28, t0
- 1: LOCKo
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0xFEB3D64: 7C09E800 cmp cr0,r9,r29
- 5: GETL R9, t4
- 6: GETL R29, t6
- 7: CMPL t4, t6, t8 (-rSo)
- 8: ICRFL t8, $0x0, CR
- 9: INCEIPL $4
-
- 0xFEB3D68: 4082000C bc 4,2,0xFEB3D74
- 10: Jc02o $0xFEB3D74
-
-
-. 0 FEB3D60 12
-. 7D 20 E0 28 7C 09 E8 00 40 82 00 0C
-
-==== BB 1334 (0xFEB3D74) approx BBs exec'd 0 ====
-
- 0xFEB3D74: 4C00012C 0: INCEIPL $4
-
- 0xFEB3D78: 2F890000 cmpi cr7,r9,0
- 1: GETL R9, t0
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0xFEB3D7C: 409E0134 bc 4,30,0xFEB3EB0
- 5: Jc30o $0xFEB3EB0
-
-
-. 0 FEB3D74 12
-. 4C 00 01 2C 2F 89 00 00 40 9E 01 34
-
-==== BB 1335 (0xFEB3D80) approx BBs exec'd 0 ====
-
- 0xFEB3D80: 837E1AFC lwz r27,6908(r30)
- 0: GETL R30, t0
- 1: ADDL $0x1AFC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R27
- 4: INCEIPL $4
-
- 0xFEB3D84: 83FB0000 lwz r31,0(r27)
- 5: GETL R27, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R31
- 8: INCEIPL $4
-
- 0xFEB3D88: 2F1F0000 cmpi cr6,r31,0
- 9: GETL R31, t8
- 10: CMP0L t8, t10 (-rSo)
- 11: ICRFL t10, $0x6, CR
- 12: INCEIPL $4
-
- 0xFEB3D8C: 419A0050 bc 12,26,0xFEB3DDC
- 13: Js26o $0xFEB3DDC
-
-
-. 0 FEB3D80 16
-. 83 7E 1A FC 83 FB 00 00 2F 1F 00 00 41 9A 00 50
-
-==== BB 1336 (0xFEB3D90) approx BBs exec'd 0 ====
-
- 0xFEB3D90: 817F0004 lwz r11,4(r31)
- 0: GETL R31, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0xFEB3D94: 3BA00000 li r29,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R29
- 7: INCEIPL $4
-
- 0xFEB3D98: 280B0000 cmpli cr0,r11,0
- 8: GETL R11, t6
- 9: MOVL $0x0, t10
- 10: CMPUL t6, t10, t8 (-rSo)
- 11: ICRFL t8, $0x0, CR
- 12: INCEIPL $4
-
- 0xFEB3D9C: 40810024 bc 4,1,0xFEB3DC0
- 13: Jc01o $0xFEB3DC0
-
-
-. 0 FEB3D90 16
-. 81 7F 00 04 3B A0 00 00 28 0B 00 00 40 81 00 24
-
-==== BB 1337 (0xFEB3DC0) approx BBs exec'd 0 ====
-
- 0xFEB3DC0: 7C0BE840 cmpl cr0,r11,r29
- 0: GETL R11, t0
- 1: GETL R29, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x0, CR
- 4: INCEIPL $4
-
- 0xFEB3DC4: 41810104 bc 12,1,0xFEB3EC8
- 5: Js01o $0xFEB3EC8
-
-
-. 0 FEB3DC0 8
-. 7C 0B E8 40 41 81 01 04
-
-==== BB 1338 (0xFEB3DC8) approx BBs exec'd 0 ====
-
- 0xFEB3DC8: 288B001F cmpli cr1,r11,31
- 0: GETL R11, t0
- 1: MOVL $0x1F, t4
- 2: CMPUL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0xFEB3DCC: 408500F0 bc 4,5,0xFEB3EBC
- 5: Jc05o $0xFEB3EBC
-
-
-. 0 FEB3DC8 8
-. 28 8B 00 1F 40 85 00 F0
-
-==== BB 1339 (0xFEB3EBC) approx BBs exec'd 0 ====
-
- 0xFEB3EBC: 392B0001 addi r9,r11,1
- 0: GETL R11, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R9
- 3: INCEIPL $4
-
- 0xFEB3EC0: 7D7D5B78 or r29,r11,r11
- 4: GETL R11, t2
- 5: PUTL t2, R29
- 6: INCEIPL $4
-
- 0xFEB3EC4: 913F0004 stw r9,4(r31)
- 7: GETL R9, t4
- 8: GETL R31, t6
- 9: ADDL $0x4, t6
- 10: STL t4, (t6)
- 11: INCEIPL $4
-
- 0xFEB3EC8: 40BAFF40 bc 5,26,0xFEB3E08
- 12: Jc26o $0xFEB3E08
-
-
-. 0 FEB3EBC 16
-. 39 2B 00 01 7D 7D 5B 78 91 3F 00 04 40 BA FF 40
-
-==== BB 1340 (0xFEB3E08) approx BBs exec'd 0 ====
-
- 0xFEB3E08: 57AA2036 rlwinm r10,r29,4,0,27
- 0: GETL R29, t0
- 1: SHLL $0x4, t0
- 2: PUTL t0, R10
- 3: INCEIPL $4
-
- 0xFEB3E0C: 39000001 li r8,1
- 4: MOVL $0x1, t2
- 5: PUTL t2, R8
- 6: INCEIPL $4
-
- 0xFEB3E10: 7CEAFA14 add r7,r10,r31
- 7: GETL R10, t4
- 8: GETL R31, t6
- 9: ADDL t4, t6
- 10: PUTL t6, R7
- 11: INCEIPL $4
-
- 0xFEB3E14: 91070008 stw r8,8(r7)
- 12: GETL R8, t8
- 13: GETL R7, t10
- 14: ADDL $0x8, t10
- 15: STL t8, (t10)
- 16: INCEIPL $4
-
- 0xFEB3E18: 39800000 li r12,0
- 17: MOVL $0x0, t12
- 18: PUTL t12, R12
- 19: INCEIPL $4
-
- 0xFEB3E1C: 7C0004AC sync
- 20: INCEIPL $4
-
- 0xFEB3E20: 7D60E028 lwarx r11,r0,r28
- 21: GETL R28, t14
- 22: LOCKo
- 23: LDL (t14), t16
- 24: PUTL t16, R11
- 25: INCEIPL $4
-
- 0xFEB3E24: 7D80E12D stwcx. r12,r0,r28
- 26: GETL R28, t18
- 27: GETL R12, t20
- 28: LOCKo
- 29: STL t20, (t18) (-rSo)
- 30: ICRFL cr, $0x0, CR
- 31: INCEIPL $4
-
- 0xFEB3E28: 40A2FFF8 bc 5,2,0xFEB3E20
- 32: Jc02o $0xFEB3E20
-
-
-. 0 FEB3E08 36
-. 57 AA 20 36 39 00 00 01 7C EA FA 14 91 07 00 08 39 80 00 00 7C 00 04 AC 7D 60 E0 28 7D 80 E1 2D 40 A2 FF F8
-
-==== BB 1341 (0xFEB3E2C) approx BBs exec'd 0 ====
-
- 0xFEB3E2C: 2F8B0001 cmpi cr7,r11,1
- 0: GETL R11, t0
- 1: MOVL $0x1, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0xFEB3E30: 419D0060 bc 12,29,0xFEB3E90
- 5: Js29o $0xFEB3E90
-
-
-. 0 FEB3E2C 8
-. 2F 8B 00 01 41 9D 00 60
-
-==== BB 1342 (0xFEB3E34) approx BBs exec'd 0 ====
-
- 0xFEB3E34: 419A0034 bc 12,26,0xFEB3E68
- 0: Js26o $0xFEB3E68
-
-
-. 0 FEB3E34 4
-. 41 9A 00 34
-
-==== BB 1343 (0xFEB3E38) approx BBs exec'd 0 ====
-
- 0xFEB3E38: 57BC2036 rlwinm r28,r29,4,0,27
- 0: GETL R29, t0
- 1: SHLL $0x4, t0
- 2: PUTL t0, R28
- 3: INCEIPL $4
-
- 0xFEB3E3C: 83A10024 lwz r29,36(r1)
- 4: GETL R1, t2
- 5: ADDL $0x24, t2
- 6: LDL (t2), t4
- 7: PUTL t4, R29
- 8: INCEIPL $4
-
- 0xFEB3E40: 7F7CFA14 add r27,r28,r31
- 9: GETL R28, t6
- 10: GETL R31, t8
- 11: ADDL t6, t8
- 12: PUTL t8, R27
- 13: INCEIPL $4
-
- 0xFEB3E44: 83C10018 lwz r30,24(r1)
- 14: GETL R1, t10
- 15: ADDL $0x18, t10
- 16: LDL (t10), t12
- 17: PUTL t12, R30
- 18: INCEIPL $4
-
- 0xFEB3E48: 387B0008 addi r3,r27,8
- 19: GETL R27, t14
- 20: ADDL $0x8, t14
- 21: PUTL t14, R3
- 22: INCEIPL $4
-
- 0xFEB3E4C: 7FA803A6 mtlr r29
- 23: GETL R29, t16
- 24: PUTL t16, LR
- 25: INCEIPL $4
-
- 0xFEB3E50: 8361000C lwz r27,12(r1)
- 26: GETL R1, t18
- 27: ADDL $0xC, t18
- 28: LDL (t18), t20
- 29: PUTL t20, R27
- 30: INCEIPL $4
-
- 0xFEB3E54: 83810010 lwz r28,16(r1)
- 31: GETL R1, t22
- 32: ADDL $0x10, t22
- 33: LDL (t22), t24
- 34: PUTL t24, R28
- 35: INCEIPL $4
-
- 0xFEB3E58: 83A10014 lwz r29,20(r1)
- 36: GETL R1, t26
- 37: ADDL $0x14, t26
- 38: LDL (t26), t28
- 39: PUTL t28, R29
- 40: INCEIPL $4
-
- 0xFEB3E5C: 83E1001C lwz r31,28(r1)
- 41: GETL R1, t30
- 42: ADDL $0x1C, t30
- 43: LDL (t30), t32
- 44: PUTL t32, R31
- 45: INCEIPL $4
-
- 0xFEB3E60: 38210020 addi r1,r1,32
- 46: GETL R1, t34
- 47: ADDL $0x20, t34
- 48: PUTL t34, R1
- 49: INCEIPL $4
-
- 0xFEB3E64: 4E800020 blr
- 50: GETL LR, t36
- 51: JMPo-r t36 ($4)
-
-
-. 0 FEB3E38 48
-. 57 BC 20 36 83 A1 00 24 7F 7C FA 14 83 C1 00 18 38 7B 00 08 7F A8 03 A6 83 61 00 0C 83 81 00 10 83 A1 00 14 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 1344 (0xFEB3EFC) approx BBs exec'd 0 ====
-
- 0xFEB3EFC: 2C030000 cmpi cr0,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0xFEB3F00: 3800FFFF li r0,-1
- 4: MOVL $0xFFFFFFFF, t4
- 5: PUTL t4, R0
- 6: INCEIPL $4
-
- 0xFEB3F04: 4182001C bc 12,2,0xFEB3F20
- 7: Js02o $0xFEB3F20
-
-
-. 0 FEB3EFC 12
-. 2C 03 00 00 38 00 FF FF 41 82 00 1C
-
-==== BB 1345 (0xFEB3F08) approx BBs exec'd 0 ====
-
- 0xFEB3F08: 38800004 li r4,4
- 0: MOVL $0x4, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0xFEB3F0C: 93E3000C stw r31,12(r3)
- 3: GETL R31, t2
- 4: GETL R3, t4
- 5: ADDL $0xC, t4
- 6: STL t2, (t4)
- 7: INCEIPL $4
-
- 0xFEB3F10: 90830000 stw r4,0(r3)
- 8: GETL R4, t6
- 9: GETL R3, t8
- 10: STL t6, (t8)
- 11: INCEIPL $4
-
- 0xFEB3F14: 38000000 li r0,0
- 12: MOVL $0x0, t10
- 13: PUTL t10, R0
- 14: INCEIPL $4
-
- 0xFEB3F18: 93A30004 stw r29,4(r3)
- 15: GETL R29, t12
- 16: GETL R3, t14
- 17: ADDL $0x4, t14
- 18: STL t12, (t14)
- 19: INCEIPL $4
-
- 0xFEB3F1C: 93830008 stw r28,8(r3)
- 20: GETL R28, t16
- 21: GETL R3, t18
- 22: ADDL $0x8, t18
- 23: STL t16, (t18)
- 24: INCEIPL $4
-
- 0xFEB3F20: 80A10024 lwz r5,36(r1)
- 25: GETL R1, t20
- 26: ADDL $0x24, t20
- 27: LDL (t20), t22
- 28: PUTL t22, R5
- 29: INCEIPL $4
-
- 0xFEB3F24: 7C030378 or r3,r0,r0
- 30: GETL R0, t24
- 31: PUTL t24, R3
- 32: INCEIPL $4
-
- 0xFEB3F28: 83810010 lwz r28,16(r1)
- 33: GETL R1, t26
- 34: ADDL $0x10, t26
- 35: LDL (t26), t28
- 36: PUTL t28, R28
- 37: INCEIPL $4
-
- 0xFEB3F2C: 83A10014 lwz r29,20(r1)
- 38: GETL R1, t30
- 39: ADDL $0x14, t30
- 40: LDL (t30), t32
- 41: PUTL t32, R29
- 42: INCEIPL $4
-
- 0xFEB3F30: 7CA803A6 mtlr r5
- 43: GETL R5, t34
- 44: PUTL t34, LR
- 45: INCEIPL $4
-
- 0xFEB3F34: 83C10018 lwz r30,24(r1)
- 46: GETL R1, t36
- 47: ADDL $0x18, t36
- 48: LDL (t36), t38
- 49: PUTL t38, R30
- 50: INCEIPL $4
-
- 0xFEB3F38: 83E1001C lwz r31,28(r1)
- 51: GETL R1, t40
- 52: ADDL $0x1C, t40
- 53: LDL (t40), t42
- 54: PUTL t42, R31
- 55: INCEIPL $4
-
- 0xFEB3F3C: 38210020 addi r1,r1,32
- 56: GETL R1, t44
- 57: ADDL $0x20, t44
- 58: PUTL t44, R1
- 59: INCEIPL $4
-
- 0xFEB3F40: 4E800020 blr
- 60: GETL LR, t46
- 61: JMPo-r t46 ($4)
-
-
-. 0 FEB3F08 60
-. 38 80 00 04 93 E3 00 0C 90 83 00 00 38 00 00 00 93 A3 00 04 93 83 00 08 80 A1 00 24 7C 03 03 78 83 81 00 10 83 A1 00 14 7C A8 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 1346 (0xFE9B7A4) approx BBs exec'd 0 ====
-
- 0xFE9B7A4: 2F1F0000 cmpi cr6,r31,0
- 0: GETL R31, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0xFE9B7A8: 419A0014 bc 12,26,0xFE9B7BC
- 4: Js26o $0xFE9B7BC
-
-
-. 0 FE9B7A4 8
-. 2F 1F 00 00 41 9A 00 14
-
-==== BB 1347 (0xFE9B7AC) approx BBs exec'd 0 ====
-
- 0xFE9B7AC: 7FE3FB78 or r3,r31,r31
- 0: GETL R31, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0xFE9B7B0: 38800000 li r4,0
- 3: MOVL $0x0, t2
- 4: PUTL t2, R4
- 5: INCEIPL $4
-
- 0xFE9B7B4: 38A00000 li r5,0
- 6: MOVL $0x0, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0xFE9B7B8: 48018719 bl 0xFEB3ED0
- 9: MOVL $0xFE9B7BC, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0xFEB3ED0 ($4)
-
-
-. 0 FE9B7AC 16
-. 7F E3 FB 78 38 80 00 00 38 A0 00 00 48 01 87 19
-
-==== BB 1348 (0xFEB3DA0) approx BBs exec'd 0 ====
-
- 0xFEB3DA0: 393F0008 addi r9,r31,8
- 0: GETL R31, t0
- 1: ADDL $0x8, t0
- 2: PUTL t0, R9
- 3: INCEIPL $4
-
- 0xFEB3DA4: 80890000 lwz r4,0(r9)
- 4: GETL R9, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0xFEB3DA8: 39290010 addi r9,r9,16
- 8: GETL R9, t6
- 9: ADDL $0x10, t6
- 10: PUTL t6, R9
- 11: INCEIPL $4
-
- 0xFEB3DAC: 2C840000 cmpi cr1,r4,0
- 12: GETL R4, t8
- 13: CMP0L t8, t10 (-rSo)
- 14: ICRFL t10, $0x1, CR
- 15: INCEIPL $4
-
- 0xFEB3DB0: 41860010 bc 12,6,0xFEB3DC0
- 16: Js06o $0xFEB3DC0
-
-
-. 0 FEB3DA0 20
-. 39 3F 00 08 80 89 00 00 39 29 00 10 2C 84 00 00 41 86 00 10
-
-==== BB 1349 (0xFEB3DB4) approx BBs exec'd 0 ====
-
- 0xFEB3DB4: 3BBD0001 addi r29,r29,1
- 0: GETL R29, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R29
- 3: INCEIPL $4
-
- 0xFEB3DB8: 7F8BE840 cmpl cr7,r11,r29
- 4: GETL R11, t2
- 5: GETL R29, t4
- 6: CMPUL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0xFEB3DBC: 419DFFE8 bc 12,29,0xFEB3DA4
- 9: Js29o $0xFEB3DA4
-
-
-. 0 FEB3DB4 12
-. 3B BD 00 01 7F 8B E8 40 41 9D FF E8
-
-==== BB 1350 (0xFE9B7BC) approx BBs exec'd 0 ====
-
- 0xFE9B7BC: 83FE1BC8 lwz r31,7112(r30)
- 0: GETL R30, t0
- 1: ADDL $0x1BC8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R31
- 4: INCEIPL $4
-
- 0xFE9B7C0: 807F0000 lwz r3,0(r31)
- 5: GETL R31, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R3
- 8: INCEIPL $4
-
- 0xFE9B7C4: 70690002 andi. r9,r3,0x2
- 9: GETL R3, t8
- 10: ANDL $0x2, t8
- 11: PUTL t8, R9
- 12: CMP0L t8, t10 (-rSo)
- 13: ICRFL t10, $0x0, CR
- 14: INCEIPL $4
-
- 0xFE9B7C8: 7FA00026 mfcr r29
- 15: GETL CR, t12
- 16: PUTL t12, R29
- 17: INCEIPL $4
-
- 0xFE9B7CC: 40820080 bc 4,2,0xFE9B84C
- 18: Jc02o $0xFE9B84C
-
-
-. 0 FE9B7BC 20
-. 83 FE 1B C8 80 7F 00 00 70 69 00 02 7F A0 00 26 40 82 00 80
-
-==== BB 1351 (0xFE9B7D0) approx BBs exec'd 0 ====
-
- 0xFE9B7D0: 2F9C0000 cmpi cr7,r28,0
- 0: GETL R28, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0xFE9B7D4: 419E001C bc 12,30,0xFE9B7F0
- 4: Js30o $0xFE9B7F0
-
-
-. 0 FE9B7D0 8
-. 2F 9C 00 00 41 9E 00 1C
-
-==== BB 1352 (0xFE9B7D8) approx BBs exec'd 0 ====
-
- 0xFE9B7D8: 80BB0000 lwz r5,0(r27)
- 0: GETL R27, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R5
- 3: INCEIPL $4
-
- 0xFE9B7DC: 7F8803A6 mtlr r28
- 4: GETL R28, t4
- 5: PUTL t4, LR
- 6: INCEIPL $4
-
- 0xFE9B7E0: 806101F4 lwz r3,500(r1)
- 7: GETL R1, t6
- 8: ADDL $0x1F4, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R3
- 11: INCEIPL $4
-
- 0xFE9B7E4: 808101F8 lwz r4,504(r1)
- 12: GETL R1, t10
- 13: ADDL $0x1F8, t10
- 14: LDL (t10), t12
- 15: PUTL t12, R4
- 16: INCEIPL $4
-
- 0xFE9B7E8: 80C101FC lwz r6,508(r1)
- 17: GETL R1, t14
- 18: ADDL $0x1FC, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R6
- 21: INCEIPL $4
-
- 0xFE9B7EC: 4E800021 blrl
- 22: GETL LR, t18
- 23: MOVL $0xFE9B7F0, t20
- 24: PUTL t20, LR
- 25: JMPo-r t18 ($4)
-
-
-. 0 FE9B7D8 24
-. 80 BB 00 00 7F 88 03 A6 80 61 01 F4 80 81 01 F8 80 C1 01 FC 4E 80 00 21
-
-==== BB 1353 __libc_csu_init(0x100003FC) approx BBs exec'd 0 ====
-
- 0x100003FC: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x10000400: 7CA802A6 mflr r5
- 6: GETL LR, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x10000404: 429F0005 bcl 20,31,0x10000408
- 9: MOVL $0x10000408, t6
- 10: PUTL t6, LR
- 11: INCEIPL $4
-
- 0x10000408: 93C10018 stw r30,24(r1)
- 12: GETL R30, t8
- 13: GETL R1, t10
- 14: ADDL $0x18, t10
- 15: STL t8, (t10)
- 16: INCEIPL $4
-
- 0x1000040C: 7FC802A6 mflr r30
- 17: GETL LR, t12
- 18: PUTL t12, R30
- 19: INCEIPL $4
-
- 0x10000410: 93810010 stw r28,16(r1)
- 20: GETL R28, t14
- 21: GETL R1, t16
- 22: ADDL $0x10, t16
- 23: STL t14, (t16)
- 24: INCEIPL $4
-
- 0x10000414: 93E1001C stw r31,28(r1)
- 25: GETL R31, t18
- 26: GETL R1, t20
- 27: ADDL $0x1C, t20
- 28: STL t18, (t20)
- 29: INCEIPL $4
-
- 0x10000418: 93A10014 stw r29,20(r1)
- 30: GETL R29, t22
- 31: GETL R1, t24
- 32: ADDL $0x14, t24
- 33: STL t22, (t24)
- 34: INCEIPL $4
-
- 0x1000041C: 809EFFF0 lwz r4,-16(r30)
- 35: GETL R30, t26
- 36: ADDL $0xFFFFFFF0, t26
- 37: LDL (t26), t28
- 38: PUTL t28, R4
- 39: INCEIPL $4
-
- 0x10000420: 90A10024 stw r5,36(r1)
- 40: GETL R5, t30
- 41: GETL R1, t32
- 42: ADDL $0x24, t32
- 43: STL t30, (t32)
- 44: INCEIPL $4
-
- 0x10000424: 7FC4F214 add r30,r4,r30
- 45: GETL R4, t34
- 46: GETL R30, t36
- 47: ADDL t34, t36
- 48: PUTL t36, R30
- 49: INCEIPL $4
-
- 0x10000428: 4BFFFE51 bl 0x10000278
- 50: MOVL $0x1000042C, t38
- 51: PUTL t38, LR
- 52: JMPo-c $0x10000278 ($4)
-
-
-. 0 100003FC 48
-. 94 21 FF E0 7C A8 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 81 00 10 93 E1 00 1C 93 A1 00 14 80 9E FF F0 90 A1 00 24 7F C4 F2 14 4B FF FE 51
-
-==== BB 1354 (0x10000278) approx BBs exec'd 0 ====
-
- 0x10000278: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x1000027C: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x10000280: 90010014 stw r0,20(r1)
- 9: GETL R0, t6
- 10: GETL R1, t8
- 11: ADDL $0x14, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x10000284: 48000041 bl 0x100002C4
- 14: MOVL $0x10000288, t10
- 15: PUTL t10, LR
- 16: JMPo-c $0x100002C4 ($4)
-
-
-. 0 10000278 16
-. 94 21 FF F0 7C 08 02 A6 90 01 00 14 48 00 00 41
-
-==== BB 1355 (0x100002C4) approx BBs exec'd 0 ====
-
- 0x100002C4: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x100002C8: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x100002CC: 93C10008 stw r30,8(r1)
- 9: GETL R30, t6
- 10: GETL R1, t8
- 11: ADDL $0x8, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x100002D0: 90010014 stw r0,20(r1)
- 14: GETL R0, t10
- 15: GETL R1, t12
- 16: ADDL $0x14, t12
- 17: STL t10, (t12)
- 18: INCEIPL $4
-
- 0x100002D4: 480105B5 bl 0x10010888
- 19: MOVL $0x100002D8, t14
- 20: PUTL t14, LR
- 21: JMPo-c $0x10010888 ($4)
-
-
-. 0 100002C4 20
-. 94 21 FF F0 7C 08 02 A6 93 C1 00 08 90 01 00 14 48 01 05 B5
-
-==== BB 1356 (0x10010888) approx BBs exec'd 0 ====
-
- 0x10010888: 4E800021 blrl
- 0: GETL LR, t0
- 1: MOVL $0x1001088C, t2
- 2: PUTL t2, LR
- 3: JMPo-r t0 ($4)
-
-
-. 0 10010888 4
-. 4E 80 00 21
-
-==== BB 1357 (0x100002D8) approx BBs exec'd 0 ====
-
- 0x100002D8: 7FC802A6 mflr r30
- 0: GETL LR, t0
- 1: PUTL t0, R30
- 2: INCEIPL $4
-
- 0x100002DC: 801E000C lwz r0,12(r30)
- 3: GETL R30, t2
- 4: ADDL $0xC, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R0
- 7: INCEIPL $4
-
- 0x100002E0: 2F800000 cmpi cr7,r0,0
- 8: GETL R0, t6
- 9: CMP0L t6, t8 (-rSo)
- 10: ICRFL t8, $0x7, CR
- 11: INCEIPL $4
-
- 0x100002E4: 419E000C bc 12,30,0x100002F0
- 12: Js30o $0x100002F0
-
-
-. 0 100002D8 16
-. 7F C8 02 A6 80 1E 00 0C 2F 80 00 00 41 9E 00 0C
-
-==== BB 1358 (0x100002F0) approx BBs exec'd 0 ====
-
- 0x100002F0: 80010014 lwz r0,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x100002F4: 7C0803A6 mtlr r0
- 5: GETL R0, t4
- 6: PUTL t4, LR
- 7: INCEIPL $4
-
- 0x100002F8: 83C10008 lwz r30,8(r1)
- 8: GETL R1, t6
- 9: ADDL $0x8, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R30
- 12: INCEIPL $4
-
- 0x100002FC: 38210010 addi r1,r1,16
- 13: GETL R1, t10
- 14: ADDL $0x10, t10
- 15: PUTL t10, R1
- 16: INCEIPL $4
-
- 0x10000300: 4E800020 blr
- 17: GETL LR, t12
- 18: JMPo-r t12 ($4)
-
-
-. 0 100002F0 20
-. 80 01 00 14 7C 08 03 A6 83 C1 00 08 38 21 00 10 4E 80 00 20
-
-==== BB 1359 (0x10000288) approx BBs exec'd 0 ====
-
- 0x10000288: 48000105 bl 0x1000038C
- 0: MOVL $0x1000028C, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x1000038C ($4)
-
-
-. 0 10000288 4
-. 48 00 01 05
-
-==== BB 1360 (0x1000038C) approx BBs exec'd 0 ====
-
- 0x1000038C: 7C0802A6 mflr r0
- 0: GETL LR, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x10000390: 3D601001 lis r11,4097
- 3: MOVL $0x10010000, t2
- 4: PUTL t2, R11
- 5: INCEIPL $4
-
- 0x10000394: 9421FFF0 stwu r1,-16(r1)
- 6: GETL R1, t4
- 7: GETL R1, t6
- 8: ADDL $0xFFFFFFF0, t6
- 9: PUTL t6, R1
- 10: STL t4, (t6)
- 11: INCEIPL $4
-
- 0x10000398: 3D200000 lis r9,0
- 12: MOVL $0x0, t8
- 13: PUTL t8, R9
- 14: INCEIPL $4
-
- 0x1000039C: 39290000 addi r9,r9,0
- 15: MOVL $0x0, t10
- 16: PUTL t10, R9
- 17: INCEIPL $4
-
- 0x100003A0: 386B07A4 addi r3,r11,1956
- 18: MOVL $0x100107A4, t12
- 19: PUTL t12, R3
- 20: INCEIPL $4
-
- 0x100003A4: 90010014 stw r0,20(r1)
- 21: GETL R0, t14
- 22: GETL R1, t16
- 23: ADDL $0x14, t16
- 24: STL t14, (t16)
- 25: INCEIPL $4
-
- 0x100003A8: 800B07A4 lwz r0,1956(r11)
- 26: MOVL $0x100107A4, t18
- 27: LDL (t18), t20
- 28: PUTL t20, R0
- 29: INCEIPL $4
-
- 0x100003AC: 2F800000 cmpi cr7,r0,0
- 30: GETL R0, t22
- 31: CMP0L t22, t24 (-rSo)
- 32: ICRFL t24, $0x7, CR
- 33: INCEIPL $4
-
- 0x100003B0: 419E0014 bc 12,30,0x100003C4
- 34: Js30o $0x100003C4
-
-
-. 0 1000038C 40
-. 7C 08 02 A6 3D 60 10 01 94 21 FF F0 3D 20 00 00 39 29 00 00 38 6B 07 A4 90 01 00 14 80 0B 07 A4 2F 80 00 00 41 9E 00 14
-
-==== BB 1361 (0x100003C4) approx BBs exec'd 0 ====
-
- 0x100003C4: 80010014 lwz r0,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x100003C8: 38210010 addi r1,r1,16
- 5: GETL R1, t4
- 6: ADDL $0x10, t4
- 7: PUTL t4, R1
- 8: INCEIPL $4
-
- 0x100003CC: 7C0803A6 mtlr r0
- 9: GETL R0, t6
- 10: PUTL t6, LR
- 11: INCEIPL $4
-
- 0x100003D0: 4E800020 blr
- 12: GETL LR, t8
- 13: JMPo-r t8 ($4)
-
-
-. 0 100003C4 16
-. 80 01 00 14 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-==== BB 1362 (0x1000028C) approx BBs exec'd 0 ====
-
- 0x1000028C: 48000469 bl 0x100006F4
- 0: MOVL $0x10000290, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x100006F4 ($4)
-
-
-. 0 1000028C 4
-. 48 00 04 69
-
-==== BB 1363 (0x100006F4) approx BBs exec'd 0 ====
-
- 0x100006F4: 7C0802A6 mflr r0
- 0: GETL LR, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x100006F8: 9421FFF0 stwu r1,-16(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFFF0, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0x100006FC: 3D201001 lis r9,4097
- 9: MOVL $0x10010000, t6
- 10: PUTL t6, R9
- 11: INCEIPL $4
-
- 0x10000700: 93E1000C stw r31,12(r1)
- 12: GETL R31, t8
- 13: GETL R1, t10
- 14: ADDL $0xC, t10
- 15: STL t8, (t10)
- 16: INCEIPL $4
-
- 0x10000704: 39290798 addi r9,r9,1944
- 17: MOVL $0x10010798, t12
- 18: PUTL t12, R9
- 19: INCEIPL $4
-
- 0x10000708: 90010014 stw r0,20(r1)
- 20: GETL R0, t14
- 21: GETL R1, t16
- 22: ADDL $0x14, t16
- 23: STL t14, (t16)
- 24: INCEIPL $4
-
- 0x1000070C: 3BE9FFFC addi r31,r9,-4
- 25: MOVL $0x10010794, t18
- 26: PUTL t18, R31
- 27: INCEIPL $4
-
- 0x10000710: 8009FFFC lwz r0,-4(r9)
- 28: MOVL $0x10010794, t20
- 29: LDL (t20), t22
- 30: PUTL t22, R0
- 31: INCEIPL $4
-
- 0x10000714: 48000010 b 0x10000724
- 32: JMPo $0x10000724 ($4)
-
-
-. 0 100006F4 36
-. 7C 08 02 A6 94 21 FF F0 3D 20 10 01 93 E1 00 0C 39 29 07 98 90 01 00 14 3B E9 FF FC 80 09 FF FC 48 00 00 10
-
-==== BB 1364 (0x10000724) approx BBs exec'd 0 ====
-
- 0x10000724: 2F80FFFF cmpi cr7,r0,-1
- 0: GETL R0, t0
- 1: MOVL $0xFFFFFFFF, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x7, CR
- 4: INCEIPL $4
-
- 0x10000728: 409EFFF0 bc 4,30,0x10000718
- 5: Jc30o $0x10000718
-
-
-. 0 10000724 8
-. 2F 80 FF FF 40 9E FF F0
-
-==== BB 1365 (0x1000072C) approx BBs exec'd 0 ====
-
- 0x1000072C: 80010014 lwz r0,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x10000730: 83E1000C lwz r31,12(r1)
- 5: GETL R1, t4
- 6: ADDL $0xC, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R31
- 9: INCEIPL $4
-
- 0x10000734: 38210010 addi r1,r1,16
- 10: GETL R1, t8
- 11: ADDL $0x10, t8
- 12: PUTL t8, R1
- 13: INCEIPL $4
-
- 0x10000738: 7C0803A6 mtlr r0
- 14: GETL R0, t10
- 15: PUTL t10, LR
- 16: INCEIPL $4
-
- 0x1000073C: 4E800020 blr
- 17: GETL LR, t12
- 18: JMPo-r t12 ($4)
-
-
-. 0 1000072C 20
-. 80 01 00 14 83 E1 00 0C 38 21 00 10 7C 08 03 A6 4E 80 00 20
-
-==== BB 1366 (0x10000290) approx BBs exec'd 0 ====
-
- 0x10000290: 80010014 lwz r0,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x10000294: 7C0803A6 mtlr r0
- 5: GETL R0, t4
- 6: PUTL t4, LR
- 7: INCEIPL $4
-
- 0x10000298: 38210010 addi r1,r1,16
- 8: GETL R1, t6
- 9: ADDL $0x10, t6
- 10: PUTL t6, R1
- 11: INCEIPL $4
-
- 0x1000029C: 4E800020 blr
- 12: GETL LR, t8
- 13: JMPo-r t8 ($4)
-
-
-. 0 10000290 16
-. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
-
-==== BB 1367 (0x1000042C) approx BBs exec'd 0 ====
-
- 0x1000042C: 839E8004 lwz r28,-32764(r30)
- 0: GETL R30, t0
- 1: ADDL $0xFFFF8004, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R28
- 4: INCEIPL $4
-
- 0x10000430: 807E8000 lwz r3,-32768(r30)
- 5: GETL R30, t4
- 6: ADDL $0xFFFF8000, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x10000434: 3BE00000 li r31,0
- 10: MOVL $0x0, t8
- 11: PUTL t8, R31
- 12: INCEIPL $4
-
- 0x10000438: 7C1C1850 subf r0,r28,r3
- 13: GETL R28, t10
- 14: GETL R3, t12
- 15: SUBL t10, t12
- 16: PUTL t12, R0
- 17: INCEIPL $4
-
- 0x1000043C: 7C001670 srawi r0,r0,2
- 18: GETL R0, t14
- 19: SARL $0x2, t14 (-wCa)
- 20: PUTL t14, R0
- 21: INCEIPL $4
-
- 0x10000440: 7F9F0040 cmpl cr7,r31,r0
- 22: GETL R31, t16
- 23: GETL R0, t18
- 24: CMPUL t16, t18, t20 (-rSo)
- 25: ICRFL t20, $0x7, CR
- 26: INCEIPL $4
-
- 0x10000444: 409C0024 bc 4,28,0x10000468
- 27: Jc28o $0x10000468
-
-
-. 0 1000042C 28
-. 83 9E 80 04 80 7E 80 00 3B E0 00 00 7C 1C 18 50 7C 00 16 70 7F 9F 00 40 40 9C 00 24
-
-==== BB 1368 (0x10000468) approx BBs exec'd 0 ====
-
- 0x10000468: 81010024 lwz r8,36(r1)
- 0: GETL R1, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x1000046C: 83810010 lwz r28,16(r1)
- 5: GETL R1, t4
- 6: ADDL $0x10, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R28
- 9: INCEIPL $4
-
- 0x10000470: 83A10014 lwz r29,20(r1)
- 10: GETL R1, t8
- 11: ADDL $0x14, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R29
- 14: INCEIPL $4
-
- 0x10000474: 7D0803A6 mtlr r8
- 15: GETL R8, t12
- 16: PUTL t12, LR
- 17: INCEIPL $4
-
- 0x10000478: 83C10018 lwz r30,24(r1)
- 18: GETL R1, t14
- 19: ADDL $0x18, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R30
- 22: INCEIPL $4
-
- 0x1000047C: 83E1001C lwz r31,28(r1)
- 23: GETL R1, t18
- 24: ADDL $0x1C, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R31
- 27: INCEIPL $4
-
- 0x10000480: 38210020 addi r1,r1,32
- 28: GETL R1, t22
- 29: ADDL $0x20, t22
- 30: PUTL t22, R1
- 31: INCEIPL $4
-
- 0x10000484: 4E800020 blr
- 32: GETL LR, t24
- 33: JMPo-r t24 ($4)
-
-
-. 0 10000468 32
-. 81 01 00 24 83 81 00 10 83 A1 00 14 7D 08 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 1369 (0xFE9B7F0) approx BBs exec'd 0 ====
-
- 0xFE9B7F0: 7FA80120 mtcrf 0x80,r29
- 0: GETL R29, t0
- 1: ICRFL t0, $0x0, CR
- 2: INCEIPL $4
-
- 0xFE9B7F4: 408200B0 bc 4,2,0xFE9B8A4
- 3: Jc02o $0xFE9B8A4
-
-
-. 0 FE9B7F0 8
-. 7F A8 01 20 40 82 00 B0
-
-==== BB 1370 (0xFE9B7F8) approx BBs exec'd 0 ====
-
- 0xFE9B7F8: 38610010 addi r3,r1,16
- 0: GETL R1, t0
- 1: ADDL $0x10, t0
- 2: PUTL t0, R3
- 3: INCEIPL $4
-
- 0xFE9B7FC: 48014F9D bl 0xFEB0798
- 4: MOVL $0xFE9B800, t2
- 5: PUTL t2, LR
- 6: JMPo-c $0xFEB0798 ($4)
-
-
-. 0 FE9B7F8 8
-. 38 61 00 10 48 01 4F 9D
-
-==== BB 1371 __GI__setjmp(0xFEB0798) approx BBs exec'd 0 ====
-
- 0xFEB0798: 38800000 li r4,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R4
- 2: INCEIPL $4
-
- 0xFEB079C: 4BFFFC94 b 0xFEB0430
- 3: JMPo $0xFEB0430 ($4)
-
-
-. 0 FEB0798 8
-. 38 80 00 00 4B FF FC 94
-
-==== BB 1372 __sigsetjmp@@GLIBC_2.3.4(0xFEB0430) approx BBs exec'd 0 ====
-
- 0xFEB0430: 90230000 stw r1,0(r3)
- 0: GETL R1, t0
- 1: GETL R3, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0xFEB0434: 7C0802A6 mflr r0
- 4: GETL LR, t4
- 5: PUTL t4, R0
- 6: INCEIPL $4
-
- 0xFEB0438: 91C3000C stw r14,12(r3)
- 7: GETL R14, t6
- 8: GETL R3, t8
- 9: ADDL $0xC, t8
- 10: STL t6, (t8)
- 11: INCEIPL $4
-
- 0xFEB043C: D9C30058 stfd f14,88(r3)
- 12: GETL R3, t10
- 13: ADDL $0x58, t10
- 14: FPU_WQ 0x0:0xE, (t10)
- 15: INCEIPL $4
-
- 0xFEB0440: 90030008 stw r0,8(r3)
- 16: GETL R0, t12
- 17: GETL R3, t14
- 18: ADDL $0x8, t14
- 19: STL t12, (t14)
- 20: INCEIPL $4
-
- 0xFEB0444: 91E30010 stw r15,16(r3)
- 21: GETL R15, t16
- 22: GETL R3, t18
- 23: ADDL $0x10, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0xFEB0448: D9E30060 stfd f15,96(r3)
- 26: GETL R3, t20
- 27: ADDL $0x60, t20
- 28: FPU_WQ 0x0:0xF, (t20)
- 29: INCEIPL $4
-
- 0xFEB044C: 7C000026 mfcr r0
- 30: GETL CR, t22
- 31: PUTL t22, R0
- 32: INCEIPL $4
-
- 0xFEB0450: 92030014 stw r16,20(r3)
- 33: GETL R16, t24
- 34: GETL R3, t26
- 35: ADDL $0x14, t26
- 36: STL t24, (t26)
- 37: INCEIPL $4
-
- 0xFEB0454: DA030068 stfd f16,104(r3)
- 38: GETL R3, t28
- 39: ADDL $0x68, t28
- 40: FPU_WQ 0x0:0x10, (t28)
- 41: INCEIPL $4
-
- 0xFEB0458: 90030054 stw r0,84(r3)
- 42: GETL R0, t30
- 43: GETL R3, t32
- 44: ADDL $0x54, t32
- 45: STL t30, (t32)
- 46: INCEIPL $4
-
- 0xFEB045C: 92230018 stw r17,24(r3)
- 47: GETL R17, t34
- 48: GETL R3, t36
- 49: ADDL $0x18, t36
- 50: STL t34, (t36)
- 51: INCEIPL $4
-
- 0xFEB0460: DA230070 stfd f17,112(r3)
- 52: GETL R3, t38
- 53: ADDL $0x70, t38
- 54: FPU_WQ 0x0:0x11, (t38)
- 55: INCEIPL $4
-
- 0xFEB0464: 9243001C stw r18,28(r3)
- 56: GETL R18, t40
- 57: GETL R3, t42
- 58: ADDL $0x1C, t42
- 59: STL t40, (t42)
- 60: INCEIPL $4
-
- 0xFEB0468: DA430078 stfd f18,120(r3)
- 61: GETL R3, t44
- 62: ADDL $0x78, t44
- 63: FPU_WQ 0x0:0x12, (t44)
- 64: INCEIPL $4
-
- 0xFEB046C: 92630020 stw r19,32(r3)
- 65: GETL R19, t46
- 66: GETL R3, t48
- 67: ADDL $0x20, t48
- 68: STL t46, (t48)
- 69: INCEIPL $4
-
- 0xFEB0470: DA630080 stfd f19,128(r3)
- 70: GETL R3, t50
- 71: ADDL $0x80, t50
- 72: FPU_WQ 0x0:0x13, (t50)
- 73: INCEIPL $4
-
- 0xFEB0474: 92830024 stw r20,36(r3)
- 74: GETL R20, t52
- 75: GETL R3, t54
- 76: ADDL $0x24, t54
- 77: STL t52, (t54)
- 78: INCEIPL $4
-
- 0xFEB0478: DA830088 stfd f20,136(r3)
- 79: GETL R3, t56
- 80: ADDL $0x88, t56
- 81: FPU_WQ 0x0:0x14, (t56)
- 82: INCEIPL $4
-
- 0xFEB047C: 92A30028 stw r21,40(r3)
- 83: GETL R21, t58
- 84: GETL R3, t60
- 85: ADDL $0x28, t60
- 86: STL t58, (t60)
- 87: INCEIPL $4
-
- 0xFEB0480: DAA30090 stfd f21,144(r3)
- 88: GETL R3, t62
- 89: ADDL $0x90, t62
- 90: FPU_WQ 0x0:0x15, (t62)
- 91: INCEIPL $4
-
- 0xFEB0484: 92C3002C stw r22,44(r3)
- 92: GETL R22, t64
- 93: GETL R3, t66
- 94: ADDL $0x2C, t66
- 95: STL t64, (t66)
- 96: INCEIPL $4
-
- 0xFEB0488: DAC30098 stfd f22,152(r3)
- 97: GETL R3, t68
- 98: ADDL $0x98, t68
- 99: FPU_WQ 0x0:0x16, (t68)
- 100: INCEIPL $4
-
- 0xFEB048C: 92E30030 stw r23,48(r3)
- 101: GETL R23, t70
- 102: GETL R3, t72
- 103: ADDL $0x30, t72
- 104: STL t70, (t72)
- 105: INCEIPL $4
-
- 0xFEB0490: DAE300A0 stfd f23,160(r3)
- 106: GETL R3, t74
- 107: ADDL $0xA0, t74
- 108: FPU_WQ 0x0:0x17, (t74)
- 109: INCEIPL $4
-
- 0xFEB0494: 93030034 stw r24,52(r3)
- 110: GETL R24, t76
- 111: GETL R3, t78
- 112: ADDL $0x34, t78
- 113: STL t76, (t78)
- 114: INCEIPL $4
-
- 0xFEB0498: DB0300A8 stfd f24,168(r3)
- 115: GETL R3, t80
- 116: ADDL $0xA8, t80
- 117: FPU_WQ 0x0:0x18, (t80)
- 118: INCEIPL $4
-
- 0xFEB049C: 93230038 stw r25,56(r3)
- 119: GETL R25, t82
- 120: GETL R3, t84
- 121: ADDL $0x38, t84
- 122: STL t82, (t84)
- 123: INCEIPL $4
-
- 0xFEB04A0: DB2300B0 stfd f25,176(r3)
- 124: GETL R3, t86
- 125: ADDL $0xB0, t86
- 126: FPU_WQ 0x0:0x19, (t86)
- 127: INCEIPL $4
-
- 0xFEB04A4: 9343003C stw r26,60(r3)
- 128: GETL R26, t88
- 129: GETL R3, t90
- 130: ADDL $0x3C, t90
- 131: STL t88, (t90)
- 132: INCEIPL $4
-
- 0xFEB04A8: DB4300B8 stfd f26,184(r3)
- 133: GETL R3, t92
- 134: ADDL $0xB8, t92
- 135: FPU_WQ 0x0:0x1A, (t92)
- 136: INCEIPL $4
-
- 0xFEB04AC: 93630040 stw r27,64(r3)
- 137: GETL R27, t94
- 138: GETL R3, t96
- 139: ADDL $0x40, t96
- 140: STL t94, (t96)
- 141: INCEIPL $4
-
- 0xFEB04B0: DB6300C0 stfd f27,192(r3)
- 142: GETL R3, t98
- 143: ADDL $0xC0, t98
- 144: FPU_WQ 0x0:0x1B, (t98)
- 145: INCEIPL $4
-
- 0xFEB04B4: 93830044 stw r28,68(r3)
- 146: GETL R28, t100
- 147: GETL R3, t102
- 148: ADDL $0x44, t102
- 149: STL t100, (t102)
- 150: INCEIPL $4
-
- 0xFEB04B8: DB8300C8 stfd f28,200(r3)
- 151: GETL R3, t104
- 152: ADDL $0xC8, t104
- 153: FPU_WQ 0x0:0x1C, (t104)
- 154: INCEIPL $4
-
- 0xFEB04BC: 93A30048 stw r29,72(r3)
- 155: GETL R29, t106
- 156: GETL R3, t108
- 157: ADDL $0x48, t108
- 158: STL t106, (t108)
- 159: INCEIPL $4
-
- 0xFEB04C0: DBA300D0 stfd f29,208(r3)
- 160: GETL R3, t110
- 161: ADDL $0xD0, t110
- 162: FPU_WQ 0x0:0x1D, (t110)
- 163: INCEIPL $4
-
- 0xFEB04C4: 93C3004C stw r30,76(r3)
- 164: GETL R30, t112
- 165: GETL R3, t114
- 166: ADDL $0x4C, t114
- 167: STL t112, (t114)
- 168: INCEIPL $4
-
- 0xFEB04C8: DBC300D8 stfd f30,216(r3)
- 169: GETL R3, t116
- 170: ADDL $0xD8, t116
- 171: FPU_WQ 0x0:0x1E, (t116)
- 172: INCEIPL $4
-
- 0xFEB04CC: 93E30050 stw r31,80(r3)
- 173: GETL R31, t118
- 174: GETL R3, t120
- 175: ADDL $0x50, t120
- 176: STL t118, (t120)
- 177: INCEIPL $4
-
- 0xFEB04D0: DBE300E0 stfd f31,224(r3)
- 178: GETL R3, t122
- 179: ADDL $0xE0, t122
- 180: FPU_WQ 0x0:0x1F, (t122)
- 181: INCEIPL $4
-
- 0xFEB04D4: 7CC802A6 mflr r6
- 182: GETL LR, t124
- 183: PUTL t124, R6
- 184: INCEIPL $4
-
- 0xFEB04D8: 48117979 bl 0xFFC7E50
- 185: MOVL $0xFEB04DC, t126
- 186: PUTL t126, LR
- 187: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FEB0430 172
-. 90 23 00 00 7C 08 02 A6 91 C3 00 0C D9 C3 00 58 90 03 00 08 91 E3 00 10 D9 E3 00 60 7C 00 00 26 92 03 00 14 DA 03 00 68 90 03 00 54 92 23 00 18 DA 23 00 70 92 43 00 1C DA 43 00 78 92 63 00 20 DA 63 00 80 92 83 00 24 DA 83 00 88 92 A3 00 28 DA A3 00 90 92 C3 00 2C DA C3 00 98 92 E3 00 30 DA E3 00 A0 93 03 00 34 DB 03 00 A8 93 23 00 38 DB 23 00 B0 93 43 00 3C DB 43 00 B8 93 63 00 40 DB 63 00 C0 93 83 00 44 DB 83 00 C8 93 A3 00 48 DB A3 00 D0 93 C3 00 4C DB C3 00 D8 93 E3 00 50 DB E3 00 E0 7C C8 02 A6 48 11 79 79
-
-==== BB 1373 (0xFEB04DC) approx BBs exec'd 0 ====
-
- 0xFEB04DC: 7CA802A6 mflr r5
- 0: GETL LR, t0
- 1: PUTL t0, R5
- 2: INCEIPL $4
-
- 0xFEB04E0: 80A51BC8 lwz r5,7112(r5)
- 3: GETL R5, t2
- 4: ADDL $0x1BC8, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R5
- 7: INCEIPL $4
-
- 0xFEB04E4: 7CC803A6 mtlr r6
- 8: GETL R6, t6
- 9: PUTL t6, LR
- 10: INCEIPL $4
-
- 0xFEB04E8: 80A5003C lwz r5,60(r5)
- 11: GETL R5, t8
- 12: ADDL $0x3C, t8
- 13: LDL (t8), t10
- 14: PUTL t10, R5
- 15: INCEIPL $4
-
- 0xFEB04EC: 74A51000 andis. r5,r5,0x1000
- 16: GETL R5, t12
- 17: ANDL $0x10000000, t12
- 18: PUTL t12, R5
- 19: CMP0L t12, t14 (-rSo)
- 20: ICRFL t14, $0x0, CR
- 21: INCEIPL $4
-
- 0xFEB04F0: 41820158 bc 12,2,0xFEB0648
- 22: Js02o $0xFEB0648
-
-
-. 0 FEB04DC 24
-. 7C A8 02 A6 80 A5 1B C8 7C C8 03 A6 80 A5 00 3C 74 A5 10 00 41 82 01 58
-
-==== BB 1374 (0xFEB0648) approx BBs exec'd 0 ====
-
- 0xFEB0648: 480000AC b 0xFEB06F4
- 0: JMPo $0xFEB06F4 ($4)
-
-
-. 0 FEB0648 4
-. 48 00 00 AC
-
-==== BB 1375 __vmx__sigjmp_save(0xFEB06F4) approx BBs exec'd 0 ====
-
- 0xFEB06F4: 2F840000 cmpi cr7,r4,0
- 0: GETL R4, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0xFEB06F8: 7C0802A6 mflr r0
- 4: GETL LR, t4
- 5: PUTL t4, R0
- 6: INCEIPL $4
-
- 0xFEB06FC: 9421FFE0 stwu r1,-32(r1)
- 7: GETL R1, t6
- 8: GETL R1, t8
- 9: ADDL $0xFFFFFFE0, t8
- 10: PUTL t8, R1
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0xFEB0700: 38A301C4 addi r5,r3,452
- 13: GETL R3, t10
- 14: ADDL $0x1C4, t10
- 15: PUTL t10, R5
- 16: INCEIPL $4
-
- 0xFEB0704: 93A10014 stw r29,20(r1)
- 17: GETL R29, t12
- 18: GETL R1, t14
- 19: ADDL $0x14, t14
- 20: STL t12, (t14)
- 21: INCEIPL $4
-
- 0xFEB0708: 38800000 li r4,0
- 22: MOVL $0x0, t16
- 23: PUTL t16, R4
- 24: INCEIPL $4
-
- 0xFEB070C: 93E1001C stw r31,28(r1)
- 25: GETL R31, t18
- 26: GETL R1, t20
- 27: ADDL $0x1C, t20
- 28: STL t18, (t20)
- 29: INCEIPL $4
-
- 0xFEB0710: 3BA00000 li r29,0
- 30: MOVL $0x0, t22
- 31: PUTL t22, R29
- 32: INCEIPL $4
-
- 0xFEB0714: 7C7F1B78 or r31,r3,r3
- 33: GETL R3, t24
- 34: PUTL t24, R31
- 35: INCEIPL $4
-
- 0xFEB0718: 93C10018 stw r30,24(r1)
- 36: GETL R30, t26
- 37: GETL R1, t28
- 38: ADDL $0x18, t28
- 39: STL t26, (t28)
- 40: INCEIPL $4
-
- 0xFEB071C: 90010024 stw r0,36(r1)
- 41: GETL R0, t30
- 42: GETL R1, t32
- 43: ADDL $0x24, t32
- 44: STL t30, (t32)
- 45: INCEIPL $4
-
- 0xFEB0720: 38600000 li r3,0
- 46: MOVL $0x0, t34
- 47: PUTL t34, R3
- 48: INCEIPL $4
-
- 0xFEB0724: 409E0028 bc 4,30,0xFEB074C
- 49: Jc30o $0xFEB074C
-
-
-. 0 FEB06F4 52
-. 2F 84 00 00 7C 08 02 A6 94 21 FF E0 38 A3 01 C4 93 A1 00 14 38 80 00 00 93 E1 00 1C 3B A0 00 00 7C 7F 1B 78 93 C1 00 18 90 01 00 24 38 60 00 00 40 9E 00 28
-
-==== BB 1376 (0xFEB0728) approx BBs exec'd 0 ====
-
- 0xFEB0728: 80810024 lwz r4,36(r1)
- 0: GETL R1, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0xFEB072C: 38600000 li r3,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0xFEB0730: 93BF01C0 stw r29,448(r31)
- 8: GETL R29, t6
- 9: GETL R31, t8
- 10: ADDL $0x1C0, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0xFEB0734: 83A10014 lwz r29,20(r1)
- 13: GETL R1, t10
- 14: ADDL $0x14, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R29
- 17: INCEIPL $4
-
- 0xFEB0738: 7C8803A6 mtlr r4
- 18: GETL R4, t14
- 19: PUTL t14, LR
- 20: INCEIPL $4
-
- 0xFEB073C: 83C10018 lwz r30,24(r1)
- 21: GETL R1, t16
- 22: ADDL $0x18, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R30
- 25: INCEIPL $4
-
- 0xFEB0740: 83E1001C lwz r31,28(r1)
- 26: GETL R1, t20
- 27: ADDL $0x1C, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R31
- 30: INCEIPL $4
-
- 0xFEB0744: 38210020 addi r1,r1,32
- 31: GETL R1, t24
- 32: ADDL $0x20, t24
- 33: PUTL t24, R1
- 34: INCEIPL $4
-
- 0xFEB0748: 4E800020 blr
- 35: GETL LR, t26
- 36: JMPo-r t26 ($4)
-
-
-. 0 FEB0728 36
-. 80 81 00 24 38 60 00 00 93 BF 01 C0 83 A1 00 14 7C 88 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 1377 (0xFE9B800) approx BBs exec'd 0 ====
-
- 0xFE9B800: 2C830000 cmpi cr1,r3,0
- 0: GETL R3, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x1, CR
- 3: INCEIPL $4
-
- 0xFE9B804: 40860068 bc 4,6,0xFE9B86C
- 4: Jc06o $0xFE9B86C
-
-
-. 0 FE9B800 8
-. 2C 83 00 00 40 86 00 68
-
-==== BB 1378 (0xFE9B808) approx BBs exec'd 0 ====
-
- 0xFE9B808: 83A28BF4 lwz r29,-29708(r2)
- 0: GETL R2, t0
- 1: ADDL $0xFFFF8BF4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R29
- 4: INCEIPL $4
-
- 0xFE9B80C: 3B610010 addi r27,r1,16
- 5: GETL R1, t4
- 6: ADDL $0x10, t4
- 7: PUTL t4, R27
- 8: INCEIPL $4
-
- 0xFE9B810: 819E1B84 lwz r12,7044(r30)
- 9: GETL R30, t6
- 10: ADDL $0x1B84, t6
- 11: LDL (t6), t8
- 12: PUTL t8, R12
- 13: INCEIPL $4
-
- 0xFE9B814: 93A101E0 stw r29,480(r1)
- 14: GETL R29, t10
- 15: GETL R1, t12
- 16: ADDL $0x1E0, t12
- 17: STL t10, (t12)
- 18: INCEIPL $4
-
- 0xFE9B818: 83828BF0 lwz r28,-29712(r2)
- 19: GETL R2, t14
- 20: ADDL $0xFFFF8BF0, t14
- 21: LDL (t14), t16
- 22: PUTL t16, R28
- 23: INCEIPL $4
-
- 0xFE9B81C: 810101F0 lwz r8,496(r1)
- 24: GETL R1, t18
- 25: ADDL $0x1F0, t18
- 26: LDL (t18), t20
- 27: PUTL t20, R8
- 28: INCEIPL $4
-
- 0xFE9B820: 938101E4 stw r28,484(r1)
- 29: GETL R28, t22
- 30: GETL R1, t24
- 31: ADDL $0x1E4, t24
- 32: STL t22, (t24)
- 33: INCEIPL $4
-
- 0xFE9B824: 806101F4 lwz r3,500(r1)
- 34: GETL R1, t26
- 35: ADDL $0x1F4, t26
- 36: LDL (t26), t28
- 37: PUTL t28, R3
- 38: INCEIPL $4
-
- 0xFE9B828: 7D0803A6 mtlr r8
- 39: GETL R8, t30
- 40: PUTL t30, LR
- 41: INCEIPL $4
-
- 0xFE9B82C: 93628BF4 stw r27,-29708(r2)
- 42: GETL R27, t32
- 43: GETL R2, t34
- 44: ADDL $0xFFFF8BF4, t34
- 45: STL t32, (t34)
- 46: INCEIPL $4
-
- 0xFE9B830: 808101F8 lwz r4,504(r1)
- 47: GETL R1, t36
- 48: ADDL $0x1F8, t36
- 49: LDL (t36), t38
- 50: PUTL t38, R4
- 51: INCEIPL $4
-
- 0xFE9B834: 80AC0000 lwz r5,0(r12)
- 52: GETL R12, t40
- 53: LDL (t40), t42
- 54: PUTL t42, R5
- 55: INCEIPL $4
-
- 0xFE9B838: 80C101FC lwz r6,508(r1)
- 56: GETL R1, t44
- 57: ADDL $0x1FC, t44
- 58: LDL (t44), t46
- 59: PUTL t46, R6
- 60: INCEIPL $4
-
- 0xFE9B83C: 4E800021 blrl
- 61: GETL LR, t48
- 62: MOVL $0xFE9B840, t50
- 63: PUTL t50, LR
- 64: JMPo-r t48 ($4)
-
-
-. 0 FE9B808 56
-. 83 A2 8B F4 3B 61 00 10 81 9E 1B 84 93 A1 01 E0 83 82 8B F0 81 01 01 F0 93 81 01 E4 80 61 01 F4 7D 08 03 A6 93 62 8B F4 80 81 01 F8 80 AC 00 00 80 C1 01 FC 4E 80 00 21
-
-==== BB 1379 main(0x100003F0) approx BBs exec'd 0 ====
-
- 0x100003F0: 38600000 li r3,0
- 0: MOVL $0x0, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0x100003F4: 4E800020 blr
- 3: GETL LR, t2
- 4: JMPo-r t2 ($4)
-
-
-. 0 100003F0 8
-. 38 60 00 00 4E 80 00 20
-
-==== BB 1380 (0xFE9B840) approx BBs exec'd 0 ====
-
- 0xFE9B840: 48018359 bl 0xFEB3B98
- 0: MOVL $0xFE9B844, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0xFEB3B98 ($4)
-
-
-. 0 FE9B840 4
-. 48 01 83 59
-
-==== BB 1381 exit(0xFEB3B98) approx BBs exec'd 0 ====
-
- 0xFEB3B98: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFEB3B9C: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFEB3BA0: 481142B1 bl 0xFFC7E50
- 9: MOVL $0xFEB3BA4, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FEB3B98 12
-. 94 21 FF E0 7C 08 02 A6 48 11 42 B1
-
-==== BB 1382 (0xFEB3BA4) approx BBs exec'd 0 ====
-
- 0xFEB3BA4: 93C10018 stw r30,24(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x18, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFEB3BA8: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0xFEB3BAC: 93E1001C stw r31,28(r1)
- 8: GETL R31, t6
- 9: GETL R1, t8
- 10: ADDL $0x1C, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0xFEB3BB0: 93810010 stw r28,16(r1)
- 13: GETL R28, t10
- 14: GETL R1, t12
- 15: ADDL $0x10, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0xFEB3BB4: 7C7C1B78 or r28,r3,r3
- 18: GETL R3, t14
- 19: PUTL t14, R28
- 20: INCEIPL $4
-
- 0xFEB3BB8: 93A10014 stw r29,20(r1)
- 21: GETL R29, t16
- 22: GETL R1, t18
- 23: ADDL $0x14, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0xFEB3BBC: 83FE1AFC lwz r31,6908(r30)
- 26: GETL R30, t20
- 27: ADDL $0x1AFC, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R31
- 30: INCEIPL $4
-
- 0xFEB3BC0: 90010024 stw r0,36(r1)
- 31: GETL R0, t24
- 32: GETL R1, t26
- 33: ADDL $0x24, t26
- 34: STL t24, (t26)
- 35: INCEIPL $4
-
- 0xFEB3BC4: 801F0000 lwz r0,0(r31)
- 36: GETL R31, t28
- 37: LDL (t28), t30
- 38: PUTL t30, R0
- 39: INCEIPL $4
-
- 0xFEB3BC8: 2F800000 cmpi cr7,r0,0
- 40: GETL R0, t32
- 41: CMP0L t32, t34 (-rSo)
- 42: ICRFL t34, $0x7, CR
- 43: INCEIPL $4
-
- 0xFEB3BCC: 419E00CC bc 12,30,0xFEB3C98
- 44: Js30o $0xFEB3C98
-
-
-. 0 FEB3BA4 44
-. 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 93 81 00 10 7C 7C 1B 78 93 A1 00 14 83 FE 1A FC 90 01 00 24 80 1F 00 00 2F 80 00 00 41 9E 00 CC
-
-==== BB 1383 (0xFEB3BD0) approx BBs exec'd 0 ====
-
- 0xFEB3BD0: 813F0000 lwz r9,0(r31)
- 0: GETL R31, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0xFEB3BD4: 80690004 lwz r3,4(r9)
- 4: GETL R9, t4
- 5: ADDL $0x4, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R3
- 8: INCEIPL $4
-
- 0xFEB3BD8: 2C030000 cmpi cr0,r3,0
- 9: GETL R3, t8
- 10: CMP0L t8, t10 (-rSo)
- 11: ICRFL t10, $0x0, CR
- 12: INCEIPL $4
-
- 0xFEB3BDC: 41820078 bc 12,2,0xFEB3C54
- 13: Js02o $0xFEB3C54
-
-
-. 0 FEB3BD0 16
-. 81 3F 00 00 80 69 00 04 2C 03 00 00 41 82 00 78
-
-==== BB 1384 (0xFEB3BE0) approx BBs exec'd 0 ====
-
- 0xFEB3BE0: 7D2A4B78 or r10,r9,r9
- 0: GETL R9, t0
- 1: PUTL t0, R10
- 2: INCEIPL $4
-
- 0xFEB3BE4: 48000018 b 0xFEB3BFC
- 3: JMPo $0xFEB3BFC ($4)
-
-
-. 0 FEB3BE0 8
-. 7D 2A 4B 78 48 00 00 18
-
-==== BB 1385 (0xFEB3BFC) approx BBs exec'd 0 ====
-
- 0xFEB3BFC: 80AA0004 lwz r5,4(r10)
- 0: GETL R10, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0xFEB3C00: 3925FFFF addi r9,r5,-1
- 5: GETL R5, t4
- 6: ADDL $0xFFFFFFFF, t4
- 7: PUTL t4, R9
- 8: INCEIPL $4
-
- 0xFEB3C04: 55242036 rlwinm r4,r9,4,0,27
- 9: GETL R9, t6
- 10: SHLL $0x4, t6
- 11: PUTL t6, R4
- 12: INCEIPL $4
-
- 0xFEB3C08: 912A0004 stw r9,4(r10)
- 13: GETL R9, t8
- 14: GETL R10, t10
- 15: ADDL $0x4, t10
- 16: STL t8, (t10)
- 17: INCEIPL $4
-
- 0xFEB3C0C: 7D645214 add r11,r4,r10
- 18: GETL R4, t12
- 19: GETL R10, t14
- 20: ADDL t12, t14
- 21: PUTL t14, R11
- 22: INCEIPL $4
-
- 0xFEB3C10: 800B0008 lwz r0,8(r11)
- 23: GETL R11, t16
- 24: ADDL $0x8, t16
- 25: LDL (t16), t18
- 26: PUTL t18, R0
- 27: INCEIPL $4
-
- 0xFEB3C14: 396B0008 addi r11,r11,8
- 28: GETL R11, t20
- 29: ADDL $0x8, t20
- 30: PUTL t20, R11
- 31: INCEIPL $4
-
- 0xFEB3C18: 2F800003 cmpi cr7,r0,3
- 32: GETL R0, t22
- 33: MOVL $0x3, t26
- 34: CMPL t22, t26, t24 (-rSo)
- 35: ICRFL t24, $0x7, CR
- 36: INCEIPL $4
-
- 0xFEB3C1C: 419E0054 bc 12,30,0xFEB3C70
- 37: Js30o $0xFEB3C70
-
-
-. 0 FEB3BFC 36
-. 80 AA 00 04 39 25 FF FF 55 24 20 36 91 2A 00 04 7D 64 52 14 80 0B 00 08 39 6B 00 08 2F 80 00 03 41 9E 00 54
-
-==== BB 1386 (0xFEB3C20) approx BBs exec'd 0 ====
-
- 0xFEB3C20: 2C800002 cmpi cr1,r0,2
- 0: GETL R0, t0
- 1: MOVL $0x2, t4
- 2: CMPL t0, t4, t2 (-rSo)
- 3: ICRFL t2, $0x1, CR
- 4: INCEIPL $4
-
- 0xFEB3C24: 2F000004 cmpi cr6,r0,4
- 5: GETL R0, t6
- 6: MOVL $0x4, t10
- 7: CMPL t6, t10, t8 (-rSo)
- 8: ICRFL t8, $0x6, CR
- 9: INCEIPL $4
-
- 0xFEB3C28: 40BDFFC0 bc 5,29,0xFEB3BE8
- 10: Jc29o $0xFEB3BE8
-
-
-. 0 FEB3C20 12
-. 2C 80 00 02 2F 00 00 04 40 BD FF C0
-
-==== BB 1387 (0xFEB3C2C) approx BBs exec'd 0 ====
-
- 0xFEB3C2C: 409AFFC0 bc 4,26,0xFEB3BEC
- 0: Jc26o $0xFEB3BEC
-
-
-. 0 FEB3C2C 4
-. 40 9A FF C0
-
-==== BB 1388 (0xFEB3C30) approx BBs exec'd 0 ====
-
- 0xFEB3C30: 810B0004 lwz r8,4(r11)
- 0: GETL R11, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0xFEB3C34: 7F84E378 or r4,r28,r28
- 5: GETL R28, t4
- 6: PUTL t4, R4
- 7: INCEIPL $4
-
- 0xFEB3C38: 806B0008 lwz r3,8(r11)
- 8: GETL R11, t6
- 9: ADDL $0x8, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R3
- 12: INCEIPL $4
-
- 0xFEB3C3C: 7D0903A6 mtctr r8
- 13: GETL R8, t10
- 14: PUTL t10, CTR
- 15: INCEIPL $4
-
- 0xFEB3C40: 4E800421 bctrl
- 16: MOVL $0xFEB3C44, t12
- 17: PUTL t12, LR
- 18: GETL CTR, t14
- 19: JMPo-c t14 ($4)
-
-
-. 0 FEB3C30 20
-. 81 0B 00 04 7F 84 E3 78 80 6B 00 08 7D 09 03 A6 4E 80 04 21
-
-==== BB 1389 __libc_csu_fini(0x1000048C) approx BBs exec'd 0 ====
-
- 0x1000048C: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x10000490: 7CA802A6 mflr r5
- 6: GETL LR, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x10000494: 429F0005 bcl 20,31,0x10000498
- 9: MOVL $0x10000498, t6
- 10: PUTL t6, LR
- 11: INCEIPL $4
-
- 0x10000498: 93C10018 stw r30,24(r1)
- 12: GETL R30, t8
- 13: GETL R1, t10
- 14: ADDL $0x18, t10
- 15: STL t8, (t10)
- 16: INCEIPL $4
-
- 0x1000049C: 7FC802A6 mflr r30
- 17: GETL LR, t12
- 18: PUTL t12, R30
- 19: INCEIPL $4
-
- 0x100004A0: 93E1001C stw r31,28(r1)
- 20: GETL R31, t14
- 21: GETL R1, t16
- 22: ADDL $0x1C, t16
- 23: STL t14, (t16)
- 24: INCEIPL $4
-
- 0x100004A4: 93A10014 stw r29,20(r1)
- 25: GETL R29, t18
- 26: GETL R1, t20
- 27: ADDL $0x14, t20
- 28: STL t18, (t20)
- 29: INCEIPL $4
-
- 0x100004A8: 90A10024 stw r5,36(r1)
- 30: GETL R5, t22
- 31: GETL R1, t24
- 32: ADDL $0x24, t24
- 33: STL t22, (t24)
- 34: INCEIPL $4
-
- 0x100004AC: 809EFFF0 lwz r4,-16(r30)
- 35: GETL R30, t26
- 36: ADDL $0xFFFFFFF0, t26
- 37: LDL (t26), t28
- 38: PUTL t28, R4
- 39: INCEIPL $4
-
- 0x100004B0: 7FC4F214 add r30,r4,r30
- 40: GETL R4, t30
- 41: GETL R30, t32
- 42: ADDL t30, t32
- 43: PUTL t32, R30
- 44: INCEIPL $4
-
- 0x100004B4: 817E800C lwz r11,-32756(r30)
- 45: GETL R30, t34
- 46: ADDL $0xFFFF800C, t34
- 47: LDL (t34), t36
- 48: PUTL t36, R11
- 49: INCEIPL $4
-
- 0x100004B8: 807E8008 lwz r3,-32760(r30)
- 50: GETL R30, t38
- 51: ADDL $0xFFFF8008, t38
- 52: LDL (t38), t40
- 53: PUTL t40, R3
- 54: INCEIPL $4
-
- 0x100004BC: 7C0B1850 subf r0,r11,r3
- 55: GETL R11, t42
- 56: GETL R3, t44
- 57: SUBL t42, t44
- 58: PUTL t44, R0
- 59: INCEIPL $4
-
- 0x100004C0: 7C091670 srawi r9,r0,2
- 60: GETL R0, t46
- 61: SARL $0x2, t46 (-wCa)
- 62: PUTL t46, R9
- 63: INCEIPL $4
-
- 0x100004C4: 2F890000 cmpi cr7,r9,0
- 64: GETL R9, t48
- 65: CMP0L t48, t50 (-rSo)
- 66: ICRFL t50, $0x7, CR
- 67: INCEIPL $4
-
- 0x100004C8: 3BE9FFFF addi r31,r9,-1
- 68: GETL R9, t52
- 69: ADDL $0xFFFFFFFF, t52
- 70: PUTL t52, R31
- 71: INCEIPL $4
-
- 0x100004CC: 419E0028 bc 12,30,0x100004F4
- 72: Js30o $0x100004F4
-
-
-. 0 1000048C 68
-. 94 21 FF E0 7C A8 02 A6 42 9F 00 05 93 C1 00 18 7F C8 02 A6 93 E1 00 1C 93 A1 00 14 90 A1 00 24 80 9E FF F0 7F C4 F2 14 81 7E 80 0C 80 7E 80 08 7C 0B 18 50 7C 09 16 70 2F 89 00 00 3B E9 FF FF 41 9E 00 28
-
-==== BB 1390 (0x100004F4) approx BBs exec'd 0 ====
-
- 0x100004F4: 48000269 bl 0x1000075C
- 0: MOVL $0x100004F8, t0
- 1: PUTL t0, LR
- 2: JMPo-c $0x1000075C ($4)
-
-
-. 0 100004F4 4
-. 48 00 02 69
-
-==== BB 1391 (0x1000075C) approx BBs exec'd 0 ====
-
- 0x1000075C: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x10000760: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x10000764: 90010014 stw r0,20(r1)
- 9: GETL R0, t6
- 10: GETL R1, t8
- 11: ADDL $0x14, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x10000768: 4BFFFB9D bl 0x10000304
- 14: MOVL $0x1000076C, t10
- 15: PUTL t10, LR
- 16: JMPo-c $0x10000304 ($4)
-
-
-. 0 1000075C 16
-. 94 21 FF F0 7C 08 02 A6 90 01 00 14 4B FF FB 9D
-
-==== BB 1392 (0x10000304) approx BBs exec'd 0 ====
-
- 0x10000304: 7C0802A6 mflr r0
- 0: GETL LR, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x10000308: 9421FFF0 stwu r1,-16(r1)
- 3: GETL R1, t2
- 4: GETL R1, t4
- 5: ADDL $0xFFFFFFF0, t4
- 6: PUTL t4, R1
- 7: STL t2, (t4)
- 8: INCEIPL $4
-
- 0x1000030C: 93C10008 stw r30,8(r1)
- 9: GETL R30, t6
- 10: GETL R1, t8
- 11: ADDL $0x8, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x10000310: 3FC01001 lis r30,4097
- 14: MOVL $0x10010000, t10
- 15: PUTL t10, R30
- 16: INCEIPL $4
-
- 0x10000314: 93E1000C stw r31,12(r1)
- 17: GETL R31, t12
- 18: GETL R1, t14
- 19: ADDL $0xC, t14
- 20: STL t12, (t14)
- 21: INCEIPL $4
-
- 0x10000318: 90010014 stw r0,20(r1)
- 22: GETL R0, t16
- 23: GETL R1, t18
- 24: ADDL $0x14, t18
- 25: STL t16, (t18)
- 26: INCEIPL $4
-
- 0x1000031C: 881E08F0 lbz r0,2288(r30)
- 27: MOVL $0x100108F0, t20
- 28: LDB (t20), t22
- 29: PUTL t22, R0
- 30: INCEIPL $4
-
- 0x10000320: 2F800000 cmpi cr7,r0,0
- 31: GETL R0, t24
- 32: CMP0L t24, t26 (-rSo)
- 33: ICRFL t26, $0x7, CR
- 34: INCEIPL $4
-
- 0x10000324: 409E0034 bc 4,30,0x10000358
- 35: Jc30o $0x10000358
-
-
-. 0 10000304 36
-. 7C 08 02 A6 94 21 FF F0 93 C1 00 08 3F C0 10 01 93 E1 00 0C 90 01 00 14 88 1E 08 F0 2F 80 00 00 40 9E 00 34
-
-==== BB 1393 (0x10000328) approx BBs exec'd 0 ====
-
- 0x10000328: 3FE01001 lis r31,4097
- 0: MOVL $0x10010000, t0
- 1: PUTL t0, R31
- 2: INCEIPL $4
-
- 0x1000032C: 48000014 b 0x10000340
- 3: JMPo $0x10000340 ($4)
-
-
-. 0 10000328 8
-. 3F E0 10 01 48 00 00 14
-
-==== BB 1394 (0x10000340) approx BBs exec'd 0 ====
-
- 0x10000340: 817F0884 lwz r11,2180(r31)
- 0: GETL R31, t0
- 1: ADDL $0x884, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x10000344: 812B0000 lwz r9,0(r11)
- 5: GETL R11, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R9
- 8: INCEIPL $4
-
- 0x10000348: 2F890000 cmpi cr7,r9,0
- 9: GETL R9, t8
- 10: CMP0L t8, t10 (-rSo)
- 11: ICRFL t10, $0x7, CR
- 12: INCEIPL $4
-
- 0x1000034C: 409EFFE4 bc 4,30,0x10000330
- 13: Jc30o $0x10000330
-
-
-. 0 10000340 16
-. 81 7F 08 84 81 2B 00 00 2F 89 00 00 40 9E FF E4
-
-==== BB 1395 (0x10000350) approx BBs exec'd 0 ====
-
- 0x10000350: 38000001 li r0,1
- 0: MOVL $0x1, t0
- 1: PUTL t0, R0
- 2: INCEIPL $4
-
- 0x10000354: 981E08F0 stb r0,2288(r30)
- 3: GETL R0, t2
- 4: GETL R30, t4
- 5: ADDL $0x8F0, t4
- 6: STB t2, (t4)
- 7: INCEIPL $4
-
- 0x10000358: 80010014 lwz r0,20(r1)
- 8: GETL R1, t6
- 9: ADDL $0x14, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R0
- 12: INCEIPL $4
-
- 0x1000035C: 83C10008 lwz r30,8(r1)
- 13: GETL R1, t10
- 14: ADDL $0x8, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R30
- 17: INCEIPL $4
-
- 0x10000360: 83E1000C lwz r31,12(r1)
- 18: GETL R1, t14
- 19: ADDL $0xC, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R31
- 22: INCEIPL $4
-
- 0x10000364: 7C0803A6 mtlr r0
- 23: GETL R0, t18
- 24: PUTL t18, LR
- 25: INCEIPL $4
-
- 0x10000368: 38210010 addi r1,r1,16
- 26: GETL R1, t20
- 27: ADDL $0x10, t20
- 28: PUTL t20, R1
- 29: INCEIPL $4
-
- 0x1000036C: 4E800020 blr
- 30: GETL LR, t22
- 31: JMPo-r t22 ($4)
-
-
-. 0 10000350 32
-. 38 00 00 01 98 1E 08 F0 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
-
-==== BB 1396 (0x1000076C) approx BBs exec'd 0 ====
-
- 0x1000076C: 80010014 lwz r0,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0x10000770: 7C0803A6 mtlr r0
- 5: GETL R0, t4
- 6: PUTL t4, LR
- 7: INCEIPL $4
-
- 0x10000774: 38210010 addi r1,r1,16
- 8: GETL R1, t6
- 9: ADDL $0x10, t6
- 10: PUTL t6, R1
- 11: INCEIPL $4
-
- 0x10000778: 4E800020 blr
- 12: GETL LR, t8
- 13: JMPo-r t8 ($4)
-
-
-. 0 1000076C 16
-. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
-
-==== BB 1397 (0x100004F8) approx BBs exec'd 0 ====
-
- 0x100004F8: 81010024 lwz r8,36(r1)
- 0: GETL R1, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x100004FC: 83A10014 lwz r29,20(r1)
- 5: GETL R1, t4
- 6: ADDL $0x14, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R29
- 9: INCEIPL $4
-
- 0x10000500: 83C10018 lwz r30,24(r1)
- 10: GETL R1, t8
- 11: ADDL $0x18, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R30
- 14: INCEIPL $4
-
- 0x10000504: 7D0803A6 mtlr r8
- 15: GETL R8, t12
- 16: PUTL t12, LR
- 17: INCEIPL $4
-
- 0x10000508: 83E1001C lwz r31,28(r1)
- 18: GETL R1, t14
- 19: ADDL $0x1C, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R31
- 22: INCEIPL $4
-
- 0x1000050C: 38210020 addi r1,r1,32
- 23: GETL R1, t18
- 24: ADDL $0x20, t18
- 25: PUTL t18, R1
- 26: INCEIPL $4
-
- 0x10000510: 4E800020 blr
- 27: GETL LR, t20
- 28: JMPo-r t20 ($4)
-
-
-. 0 100004F8 28
-. 81 01 00 24 83 A1 00 14 83 C1 00 18 7D 08 03 A6 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 1398 (0xFEB3C44) approx BBs exec'd 0 ====
-
- 0xFEB3C44: 815F0000 lwz r10,0(r31)
- 0: GETL R31, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R10
- 3: INCEIPL $4
-
- 0xFEB3C48: 818A0004 lwz r12,4(r10)
- 4: GETL R10, t4
- 5: ADDL $0x4, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R12
- 8: INCEIPL $4
-
- 0xFEB3C4C: 2C8C0000 cmpi cr1,r12,0
- 9: GETL R12, t8
- 10: CMP0L t8, t10 (-rSo)
- 11: ICRFL t10, $0x1, CR
- 12: INCEIPL $4
-
- 0xFEB3C50: 4086FFAC bc 4,6,0xFEB3BFC
- 13: Jc06o $0xFEB3BFC
-
-
-. 0 FEB3C44 16
-. 81 5F 00 00 81 8A 00 04 2C 8C 00 00 40 86 FF AC
-
-==== BB 1399 _dl_fini(0x2547BAE0) approx BBs exec'd 0 ====
-
- 0x2547BAE0: 9421FFA0 stwu r1,-96(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFA0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0x2547BAE4: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0x2547BAE8: 4801B519 bl 0x25497000
- 9: MOVL $0x2547BAEC, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0x25497000 ($4)
-
-
-. 0 2547BAE0 12
-. 94 21 FF A0 7C 08 02 A6 48 01 B5 19
-
-==== BB 1400 (0x2547BAEC) approx BBs exec'd 0 ====
-
- 0x2547BAEC: 93C10058 stw r30,88(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x58, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0x2547BAF0: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0x2547BAF4: 7D800026 mfcr r12
- 8: GETL CR, t6
- 9: PUTL t6, R12
- 10: INCEIPL $4
-
- 0x2547BAF8: 91C10018 stw r14,24(r1)
- 11: GETL R14, t8
- 12: GETL R1, t10
- 13: ADDL $0x18, t10
- 14: STL t8, (t10)
- 15: INCEIPL $4
-
- 0x2547BAFC: 92410028 stw r18,40(r1)
- 16: GETL R18, t12
- 17: GETL R1, t14
- 18: ADDL $0x28, t14
- 19: STL t12, (t14)
- 20: INCEIPL $4
-
- 0x2547BB00: 81DE04F4 lwz r14,1268(r30)
- 21: GETL R30, t16
- 22: ADDL $0x4F4, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R14
- 25: INCEIPL $4
-
- 0x2547BB04: 825E04C8 lwz r18,1224(r30)
- 26: GETL R30, t20
- 27: ADDL $0x4C8, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R18
- 30: INCEIPL $4
-
- 0x2547BB08: 91E1001C stw r15,28(r1)
- 31: GETL R15, t24
- 32: GETL R1, t26
- 33: ADDL $0x1C, t26
- 34: STL t24, (t26)
- 35: INCEIPL $4
-
- 0x2547BB0C: 39E0000F li r15,15
- 36: MOVL $0xF, t28
- 37: PUTL t28, R15
- 38: INCEIPL $4
-
- 0x2547BB10: 92010020 stw r16,32(r1)
- 39: GETL R16, t30
- 40: GETL R1, t32
- 41: ADDL $0x20, t32
- 42: STL t30, (t32)
- 43: INCEIPL $4
-
- 0x2547BB14: 3A000000 li r16,0
- 44: MOVL $0x0, t34
- 45: PUTL t34, R16
- 46: INCEIPL $4
-
- 0x2547BB18: 92210024 stw r17,36(r1)
- 47: GETL R17, t36
- 48: GETL R1, t38
- 49: ADDL $0x24, t38
- 50: STL t36, (t38)
- 51: INCEIPL $4
-
- 0x2547BB1C: 3A200168 li r17,360
- 52: MOVL $0x168, t40
- 53: PUTL t40, R17
- 54: INCEIPL $4
-
- 0x2547BB20: 92C10038 stw r22,56(r1)
- 55: GETL R22, t42
- 56: GETL R1, t44
- 57: ADDL $0x38, t44
- 58: STL t42, (t44)
- 59: INCEIPL $4
-
- 0x2547BB24: 3AC00000 li r22,0
- 60: MOVL $0x0, t46
- 61: PUTL t46, R22
- 62: INCEIPL $4
-
- 0x2547BB28: 93E1005C stw r31,92(r1)
- 63: GETL R31, t48
- 64: GETL R1, t50
- 65: ADDL $0x5C, t50
- 66: STL t48, (t50)
- 67: INCEIPL $4
-
- 0x2547BB2C: 7C3F0B78 or r31,r1,r1
- 68: GETL R1, t52
- 69: PUTL t52, R31
- 70: INCEIPL $4
-
- 0x2547BB30: 9261002C stw r19,44(r1)
- 71: GETL R19, t54
- 72: GETL R1, t56
- 73: ADDL $0x2C, t56
- 74: STL t54, (t56)
- 75: INCEIPL $4
-
- 0x2547BB34: 92810030 stw r20,48(r1)
- 76: GETL R20, t58
- 77: GETL R1, t60
- 78: ADDL $0x30, t60
- 79: STL t58, (t60)
- 80: INCEIPL $4
-
- 0x2547BB38: 92A10034 stw r21,52(r1)
- 81: GETL R21, t62
- 82: GETL R1, t64
- 83: ADDL $0x34, t64
- 84: STL t62, (t64)
- 85: INCEIPL $4
-
- 0x2547BB3C: 92E1003C stw r23,60(r1)
- 86: GETL R23, t66
- 87: GETL R1, t68
- 88: ADDL $0x3C, t68
- 89: STL t66, (t68)
- 90: INCEIPL $4
-
- 0x2547BB40: 93010040 stw r24,64(r1)
- 91: GETL R24, t70
- 92: GETL R1, t72
- 93: ADDL $0x40, t72
- 94: STL t70, (t72)
- 95: INCEIPL $4
-
- 0x2547BB44: 93210044 stw r25,68(r1)
- 96: GETL R25, t74
- 97: GETL R1, t76
- 98: ADDL $0x44, t76
- 99: STL t74, (t76)
- 100: INCEIPL $4
-
- 0x2547BB48: 93410048 stw r26,72(r1)
- 101: GETL R26, t78
- 102: GETL R1, t80
- 103: ADDL $0x48, t80
- 104: STL t78, (t80)
- 105: INCEIPL $4
-
- 0x2547BB4C: 9361004C stw r27,76(r1)
- 106: GETL R27, t82
- 107: GETL R1, t84
- 108: ADDL $0x4C, t84
- 109: STL t82, (t84)
- 110: INCEIPL $4
-
- 0x2547BB50: 93810050 stw r28,80(r1)
- 111: GETL R28, t86
- 112: GETL R1, t88
- 113: ADDL $0x50, t88
- 114: STL t86, (t88)
- 115: INCEIPL $4
-
- 0x2547BB54: 93A10054 stw r29,84(r1)
- 116: GETL R29, t90
- 117: GETL R1, t92
- 118: ADDL $0x54, t92
- 119: STL t90, (t92)
- 120: INCEIPL $4
-
- 0x2547BB58: 90010064 stw r0,100(r1)
- 121: GETL R0, t94
- 122: GETL R1, t96
- 123: ADDL $0x64, t96
- 124: STL t94, (t96)
- 125: INCEIPL $4
-
- 0x2547BB5C: 91810014 stw r12,20(r1)
- 126: GETL R12, t98
- 127: GETL R1, t100
- 128: ADDL $0x14, t100
- 129: STL t98, (t100)
- 130: INCEIPL $4
-
- 0x2547BB60: 809203F8 lwz r4,1016(r18)
- 131: GETL R18, t102
- 132: ADDL $0x3F8, t102
- 133: LDL (t102), t104
- 134: PUTL t104, R4
- 135: INCEIPL $4
-
- 0x2547BB64: 38720180 addi r3,r18,384
- 136: GETL R18, t106
- 137: ADDL $0x180, t106
- 138: PUTL t106, R3
- 139: INCEIPL $4
-
- 0x2547BB68: 7C8903A6 mtctr r4
- 140: GETL R4, t108
- 141: PUTL t108, CTR
- 142: INCEIPL $4
-
- 0x2547BB6C: 4E800421 bctrl
- 143: MOVL $0x2547BB70, t110
- 144: PUTL t110, LR
- 145: GETL CTR, t112
- 146: JMPo-c t112 ($4)
-
-
-. 0 2547BAEC 132
-. 93 C1 00 58 7F C8 02 A6 7D 80 00 26 91 C1 00 18 92 41 00 28 81 DE 04 F4 82 5E 04 C8 91 E1 00 1C 39 E0 00 0F 92 01 00 20 3A 00 00 00 92 21 00 24 3A 20 01 68 92 C1 00 38 3A C0 00 00 93 E1 00 5C 7C 3F 0B 78 92 61 00 2C 92 81 00 30 92 A1 00 34 92 E1 00 3C 93 01 00 40 93 21 00 44 93 41 00 48 93 61 00 4C 93 81 00 50 93 A1 00 54 90 01 00 64 91 81 00 14 80 92 03 F8 38 72 01 80 7C 89 03 A6 4E 80 04 21
-
-==== BB 1401 rtld_lock_default_lock_recursive(0x25471884) approx BBs exec'd 0 ====
-
- 0x25471884: 80830004 lwz r4,4(r3)
- 0: GETL R3, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x25471888: 9421FFF0 stwu r1,-16(r1)
- 5: GETL R1, t4
- 6: GETL R1, t6
- 7: ADDL $0xFFFFFFF0, t6
- 8: PUTL t6, R1
- 9: STL t4, (t6)
- 10: INCEIPL $4
-
- 0x2547188C: 39240001 addi r9,r4,1
- 11: GETL R4, t8
- 12: ADDL $0x1, t8
- 13: PUTL t8, R9
- 14: INCEIPL $4
-
- 0x25471890: 38210010 addi r1,r1,16
- 15: GETL R1, t10
- 16: ADDL $0x10, t10
- 17: PUTL t10, R1
- 18: INCEIPL $4
-
- 0x25471894: 91230004 stw r9,4(r3)
- 19: GETL R9, t12
- 20: GETL R3, t14
- 21: ADDL $0x4, t14
- 22: STL t12, (t14)
- 23: INCEIPL $4
-
- 0x25471898: 4E800020 blr
- 24: GETL LR, t16
- 25: JMPo-r t16 ($4)
-
-
-. 0 25471884 24
-. 80 83 00 04 94 21 FF F0 39 24 00 01 38 21 00 10 91 23 00 04 4E 80 00 20
-
-==== BB 1402 (0x2547BB70) approx BBs exec'd 0 ====
-
- 0x2547BB70: 7D319214 add r9,r17,r18
- 0: GETL R17, t0
- 1: GETL R18, t2
- 2: ADDL t0, t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547BB74: 80690004 lwz r3,4(r9)
- 5: GETL R9, t4
- 6: ADDL $0x4, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x2547BB78: 546A103A rlwinm r10,r3,2,0,29
- 10: GETL R3, t8
- 11: SHLL $0x2, t8
- 12: PUTL t8, R10
- 13: INCEIPL $4
-
- 0x2547BB7C: 7F8A8040 cmpl cr7,r10,r16
- 14: GETL R10, t10
- 15: GETL R16, t12
- 16: CMPUL t10, t12, t14 (-rSo)
- 17: ICRFL t14, $0x7, CR
- 18: INCEIPL $4
-
- 0x2547BB80: 409D002C bc 4,29,0x2547BBAC
- 19: Jc29o $0x2547BBAC
-
-
-. 0 2547BB70 20
-. 7D 31 92 14 80 69 00 04 54 6A 10 3A 7F 8A 80 40 40 9D 00 2C
-
-==== BB 1403 (0x2547BBAC) approx BBs exec'd 0 ====
-
- 0x2547BBAC: 7D71902E lwzx r11,r17,r18
- 0: GETL R18, t0
- 1: GETL R17, t2
- 2: ADDL t2, t0
- 3: LDL (t0), t4
- 4: PUTL t4, R11
- 5: INCEIPL $4
-
- 0x2547BBB0: 3AE00000 li r23,0
- 6: MOVL $0x0, t6
- 7: PUTL t6, R23
- 8: INCEIPL $4
-
- 0x2547BBB4: 2E0B0000 cmpi cr4,r11,0
- 9: GETL R11, t8
- 10: CMP0L t8, t10 (-rSo)
- 11: ICRFL t10, $0x4, CR
- 12: INCEIPL $4
-
- 0x2547BBB8: 41920020 bc 12,18,0x2547BBD8
- 13: Js18o $0x2547BBD8
-
-
-. 0 2547BBAC 16
-. 7D 71 90 2E 3A E0 00 00 2E 0B 00 00 41 92 00 20
-
-==== BB 1404 (0x2547BBD8) approx BBs exec'd 0 ====
-
- 0x2547BBD8: 7EF3BB79 or. r19,r23,r23
- 0: GETL R23, t0
- 1: PUTL t0, R19
- 2: CMP0L t0, t2 (-rSo)
- 3: ICRFL t2, $0x0, CR
- 4: INCEIPL $4
-
- 0x2547BBDC: 41820110 bc 12,2,0x2547BCEC
- 5: Js02o $0x2547BCEC
-
-
-. 0 2547BBD8 8
-. 7E F3 BB 79 41 82 01 10
-
-==== BB 1405 (0x2547BCEC) approx BBs exec'd 0 ====
-
- 0x2547BCEC: 80B203FC lwz r5,1020(r18)
- 0: GETL R18, t0
- 1: ADDL $0x3FC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x2547BCF0: 3B400000 li r26,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R26
- 7: INCEIPL $4
-
- 0x2547BCF4: 38720180 addi r3,r18,384
- 8: GETL R18, t6
- 9: ADDL $0x180, t6
- 10: PUTL t6, R3
- 11: INCEIPL $4
-
- 0x2547BCF8: 7E1A9840 cmpl cr4,r26,r19
- 12: GETL R26, t8
- 13: GETL R19, t10
- 14: CMPUL t8, t10, t12 (-rSo)
- 15: ICRFL t12, $0x4, CR
- 16: INCEIPL $4
-
- 0x2547BCFC: 7CA903A6 mtctr r5
- 17: GETL R5, t14
- 18: PUTL t14, CTR
- 19: INCEIPL $4
-
- 0x2547BD00: 4E800421 bctrl
- 20: MOVL $0x2547BD04, t16
- 21: PUTL t16, LR
- 22: GETL CTR, t18
- 23: JMPo-c t18 ($4)
-
-
-. 0 2547BCEC 24
-. 80 B2 03 FC 3B 40 00 00 38 72 01 80 7E 1A 98 40 7C A9 03 A6 4E 80 04 21
-
-==== BB 1406 rtld_lock_default_unlock_recursive(0x2547189C) approx BBs exec'd 0 ====
-
- 0x2547189C: 80830004 lwz r4,4(r3)
- 0: GETL R3, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x254718A0: 9421FFF0 stwu r1,-16(r1)
- 5: GETL R1, t4
- 6: GETL R1, t6
- 7: ADDL $0xFFFFFFF0, t6
- 8: PUTL t6, R1
- 9: STL t4, (t6)
- 10: INCEIPL $4
-
- 0x254718A4: 3924FFFF addi r9,r4,-1
- 11: GETL R4, t8
- 12: ADDL $0xFFFFFFFF, t8
- 13: PUTL t8, R9
- 14: INCEIPL $4
-
- 0x254718A8: 38210010 addi r1,r1,16
- 15: GETL R1, t10
- 16: ADDL $0x10, t10
- 17: PUTL t10, R1
- 18: INCEIPL $4
-
- 0x254718AC: 91230004 stw r9,4(r3)
- 19: GETL R9, t12
- 20: GETL R3, t14
- 21: ADDL $0x4, t14
- 22: STL t12, (t14)
- 23: INCEIPL $4
-
- 0x254718B0: 4E800020 blr
- 24: GETL LR, t16
- 25: JMPo-r t16 ($4)
-
-
-. 0 2547189C 24
-. 80 83 00 04 94 21 FF F0 39 24 FF FF 38 21 00 10 91 23 00 04 4E 80 00 20
-
-==== BB 1407 (0x2547BD04) approx BBs exec'd 0 ====
-
- 0x2547BD04: 40900068 bc 4,16,0x2547BD6C
- 0: Jc16o $0x2547BD6C
-
-
-. 0 2547BD04 4
-. 40 90 00 68
-
-==== BB 1408 (0x2547BD6C) approx BBs exec'd 0 ====
-
- 0x2547BD6C: 35EFFFFF addic. r15,r15,-1
- 0: GETL R15, t0
- 1: ADCL $0xFFFFFFFF, t0 (-wCa)
- 2: PUTL t0, R15
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x2547BD70: 3A31FFE8 addi r17,r17,-24
- 6: GETL R17, t4
- 7: ADDL $0xFFFFFFE8, t4
- 8: PUTL t4, R17
- 9: INCEIPL $4
-
- 0x2547BD74: 4080FDEC bc 4,0,0x2547BB60
- 10: Jc00o $0x2547BB60
-
-
-. 0 2547BD6C 12
-. 35 EF FF FF 3A 31 FF E8 40 80 FD EC
-
-==== BB 1409 (0x2547BB60) approx BBs exec'd 0 ====
-
- 0x2547BB60: 809203F8 lwz r4,1016(r18)
- 0: GETL R18, t0
- 1: ADDL $0x3F8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547BB64: 38720180 addi r3,r18,384
- 5: GETL R18, t4
- 6: ADDL $0x180, t4
- 7: PUTL t4, R3
- 8: INCEIPL $4
-
- 0x2547BB68: 7C8903A6 mtctr r4
- 9: GETL R4, t6
- 10: PUTL t6, CTR
- 11: INCEIPL $4
-
- 0x2547BB6C: 4E800421 bctrl
- 12: MOVL $0x2547BB70, t8
- 13: PUTL t8, LR
- 14: GETL CTR, t10
- 15: JMPo-c t10 ($4)
-
-
-. 0 2547BB60 16
-. 80 92 03 F8 38 72 01 80 7C 89 03 A6 4E 80 04 21
-
-==== BB 1410 (0x2547BB84) approx BBs exec'd 0 ====
-
- 0x2547BB84: 2C100000 cmpi cr0,r16,0
- 0: GETL R16, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0x2547BB88: 40820110 bc 4,2,0x2547BC98
- 4: Jc02o $0x2547BC98
-
-
-. 0 2547BB84 8
-. 2C 10 00 00 40 82 01 10
-
-==== BB 1411 (0x2547BB8C) approx BBs exec'd 0 ====
-
- 0x2547BB8C: 390A001E addi r8,r10,30
- 0: GETL R10, t0
- 1: ADDL $0x1E, t0
- 2: PUTL t0, R8
- 3: INCEIPL $4
-
- 0x2547BB90: 81610000 lwz r11,0(r1)
- 4: GETL R1, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R11
- 7: INCEIPL $4
-
- 0x2547BB94: 55070036 rlwinm r7,r8,0,0,27
- 8: GETL R8, t6
- 9: ANDL $0xFFFFFFF0, t6
- 10: PUTL t6, R7
- 11: INCEIPL $4
-
- 0x2547BB98: 7D505378 or r16,r10,r10
- 12: GETL R10, t8
- 13: PUTL t8, R16
- 14: INCEIPL $4
-
- 0x2547BB9C: 7CC700D0 neg r6,r7
- 15: GETL R7, t10
- 16: NEGL t10
- 17: PUTL t10, R6
- 18: INCEIPL $4
-
- 0x2547BBA0: 7D61316E stwux r11,r1,r6
- 19: GETL R6, t12
- 20: GETL R1, t14
- 21: ADDL t14, t12
- 22: PUTL t12, R1
- 23: GETL R11, t16
- 24: STL t16, (t12)
- 25: INCEIPL $4
-
- 0x2547BBA4: 38A10017 addi r5,r1,23
- 26: GETL R1, t18
- 27: ADDL $0x17, t18
- 28: PUTL t18, R5
- 29: INCEIPL $4
-
- 0x2547BBA8: 54B60036 rlwinm r22,r5,0,0,27
- 30: GETL R5, t20
- 31: ANDL $0xFFFFFFF0, t20
- 32: PUTL t20, R22
- 33: INCEIPL $4
-
- 0x2547BBAC: 7D71902E lwzx r11,r17,r18
- 34: GETL R18, t22
- 35: GETL R17, t24
- 36: ADDL t24, t22
- 37: LDL (t22), t26
- 38: PUTL t26, R11
- 39: INCEIPL $4
-
- 0x2547BBB0: 3AE00000 li r23,0
- 40: MOVL $0x0, t28
- 41: PUTL t28, R23
- 42: INCEIPL $4
-
- 0x2547BBB4: 2E0B0000 cmpi cr4,r11,0
- 43: GETL R11, t30
- 44: CMP0L t30, t32 (-rSo)
- 45: ICRFL t32, $0x4, CR
- 46: INCEIPL $4
-
- 0x2547BBB8: 41920020 bc 12,18,0x2547BBD8
- 47: Js18o $0x2547BBD8
-
-
-. 0 2547BB8C 48
-. 39 0A 00 1E 81 61 00 00 55 07 00 36 7D 50 53 78 7C C7 00 D0 7D 61 31 6E 38 A1 00 17 54 B6 00 36 7D 71 90 2E 3A E0 00 00 2E 0B 00 00 41 92 00 20
-
-==== BB 1412 (0x2547BBBC) approx BBs exec'd 0 ====
-
- 0x2547BBBC: 834B0014 lwz r26,20(r11)
- 0: GETL R11, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0x2547BBC0: 56EA103A rlwinm r10,r23,2,0,29
- 5: GETL R23, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R10
- 8: INCEIPL $4
-
- 0x2547BBC4: 7F1A5800 cmp cr6,r26,r11
- 9: GETL R26, t6
- 10: GETL R11, t8
- 11: CMPL t6, t8, t10 (-rSo)
- 12: ICRFL t10, $0x6, CR
- 13: INCEIPL $4
-
- 0x2547BBC8: 419A0108 bc 12,26,0x2547BCD0
- 14: Js26o $0x2547BCD0
-
-
-. 0 2547BBBC 16
-. 83 4B 00 14 56 EA 10 3A 7F 1A 58 00 41 9A 01 08
-
-==== BB 1413 (0x2547BCD0) approx BBs exec'd 0 ====
-
- 0x2547BCD0: 836B0178 lwz r27,376(r11)
- 0: GETL R11, t0
- 1: ADDL $0x178, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R27
- 4: INCEIPL $4
-
- 0x2547BCD4: 3AF70001 addi r23,r23,1
- 5: GETL R23, t4
- 6: ADDL $0x1, t4
- 7: PUTL t4, R23
- 8: INCEIPL $4
-
- 0x2547BCD8: 7D6AB12E stwx r11,r10,r22
- 9: GETL R22, t6
- 10: GETL R10, t8
- 11: ADDL t8, t6
- 12: GETL R11, t10
- 13: STL t10, (t6)
- 14: INCEIPL $4
-
- 0x2547BCDC: 395B0001 addi r10,r27,1
- 15: GETL R27, t12
- 16: ADDL $0x1, t12
- 17: PUTL t12, R10
- 18: INCEIPL $4
-
- 0x2547BCE0: 914B0178 stw r10,376(r11)
- 19: GETL R10, t14
- 20: GETL R11, t16
- 21: ADDL $0x178, t16
- 22: STL t14, (t16)
- 23: INCEIPL $4
-
- 0x2547BCE4: 816B000C lwz r11,12(r11)
- 24: GETL R11, t18
- 25: ADDL $0xC, t18
- 26: LDL (t18), t20
- 27: PUTL t20, R11
- 28: INCEIPL $4
-
- 0x2547BCE8: 4BFFFEE8 b 0x2547BBD0
- 29: JMPo $0x2547BBD0 ($4)
-
-
-. 0 2547BCD0 28
-. 83 6B 01 78 3A F7 00 01 7D 6A B1 2E 39 5B 00 01 91 4B 01 78 81 6B 00 0C 4B FF FE E8
-
-==== BB 1414 (0x2547BBD0) approx BBs exec'd 0 ====
-
- 0x2547BBD0: 2E0B0000 cmpi cr4,r11,0
- 0: GETL R11, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x4, CR
- 3: INCEIPL $4
-
- 0x2547BBD4: 4092FFE8 bc 4,18,0x2547BBBC
- 4: Jc18o $0x2547BBBC
-
-
-. 0 2547BBD0 8
-. 2E 0B 00 00 40 92 FF E8
-
-==== BB 1415 (0x2547BBE0) approx BBs exec'd 0 ====
-
- 0x2547BBE0: 2E0F0000 cmpi cr4,r15,0
- 0: GETL R15, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x4, CR
- 3: INCEIPL $4
-
- 0x2547BBE4: 7F71902E lwzx r27,r17,r18
- 4: GETL R18, t4
- 5: GETL R17, t6
- 6: ADDL t6, t4
- 7: LDL (t4), t8
- 8: PUTL t8, R27
- 9: INCEIPL $4
-
- 0x2547BBE8: 40920008 bc 4,18,0x2547BBF0
- 10: Jc18o $0x2547BBF0
-
-
-. 0 2547BBE0 12
-. 2E 0F 00 00 7F 71 90 2E 40 92 00 08
-
-==== BB 1416 (0x2547BBEC) approx BBs exec'd 0 ====
-
- 0x2547BBEC: 837B000C lwz r27,12(r27)
- 0: GETL R27, t0
- 1: ADDL $0xC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R27
- 4: INCEIPL $4
-
- 0x2547BBF0: 2F9B0000 cmpi cr7,r27,0
- 5: GETL R27, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x2547BBF4: 419E00F8 bc 12,30,0x2547BCEC
- 9: Js30o $0x2547BCEC
-
-
-. 0 2547BBEC 12
-. 83 7B 00 0C 2F 9B 00 00 41 9E 00 F8
-
-==== BB 1417 (0x2547BBF8) approx BBs exec'd 0 ====
-
- 0x2547BBF8: 839B0014 lwz r28,20(r27)
- 0: GETL R27, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R28
- 4: INCEIPL $4
-
- 0x2547BBFC: 7C9CD800 cmp cr1,r28,r27
- 5: GETL R28, t4
- 6: GETL R27, t6
- 7: CMPL t4, t6, t8 (-rSo)
- 8: ICRFL t8, $0x1, CR
- 9: INCEIPL $4
-
- 0x2547BC00: 4086FFEC bc 4,6,0x2547BBEC
- 10: Jc06o $0x2547BBEC
-
-
-. 0 2547BBF8 12
-. 83 9B 00 14 7C 9C D8 00 40 86 FF EC
-
-==== BB 1418 (0x2547BC04) approx BBs exec'd 0 ====
-
- 0x2547BC04: 7F200026 mfcr r25
- 0: GETL CR, t0
- 1: PUTL t0, R25
- 2: INCEIPL $4
-
- 0x2547BC08: 57399FFE rlwinm r25,r25,19,31,31
- 3: GETL R25, t2
- 4: ROLL $0x13, t2
- 5: ANDL $0x1, t2
- 6: PUTL t2, R25
- 7: INCEIPL $4
-
- 0x2547BC0C: 48000008 b 0x2547BC14
- 8: JMPo $0x2547BC14 ($4)
-
-
-. 0 2547BC04 12
-. 7F 20 00 26 57 39 9F FE 48 00 00 08
-
-==== BB 1419 (0x2547BC14) approx BBs exec'd 0 ====
-
- 0x2547BC14: 572C103A rlwinm r12,r25,2,0,29
- 0: GETL R25, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R12
- 3: INCEIPL $4
-
- 0x2547BC18: 7FACB02E lwzx r29,r12,r22
- 4: GETL R22, t2
- 5: GETL R12, t4
- 6: ADDL t4, t2
- 7: LDL (t2), t6
- 8: PUTL t6, R29
- 9: INCEIPL $4
-
- 0x2547BC1C: 7F1DD800 cmp cr6,r29,r27
- 10: GETL R29, t8
- 11: GETL R27, t10
- 12: CMPL t8, t10, t12 (-rSo)
- 13: ICRFL t12, $0x6, CR
- 14: INCEIPL $4
-
- 0x2547BC20: 409AFFF0 bc 4,26,0x2547BC10
- 15: Jc26o $0x2547BC10
-
-
-. 0 2547BC14 16
-. 57 2C 10 3A 7F AC B0 2E 7F 1D D8 00 40 9A FF F0
-
-==== BB 1420 (0x2547BC24) approx BBs exec'd 0 ====
-
- 0x2547BC24: 3B590001 addi r26,r25,1
- 0: GETL R25, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R26
- 3: INCEIPL $4
-
- 0x2547BC28: 7C1AB840 cmpl cr0,r26,r23
- 4: GETL R26, t2
- 5: GETL R23, t4
- 6: CMPUL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0x2547BC2C: 40A0FFC0 bc 5,0,0x2547BBEC
- 9: Jc00o $0x2547BBEC
-
-
-. 0 2547BC24 12
-. 3B 59 00 01 7C 1A B8 40 40 A0 FF C0
-
-==== BB 1421 (0x2547BC30) approx BBs exec'd 0 ====
-
- 0x2547BC30: 5720103A rlwinm r0,r25,2,0,29
- 0: GETL R25, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R0
- 3: INCEIPL $4
-
- 0x2547BC34: 7C140378 or r20,r0,r0
- 4: GETL R0, t2
- 5: PUTL t2, R20
- 6: INCEIPL $4
-
- 0x2547BC38: 7EA0B214 add r21,r0,r22
- 7: GETL R0, t4
- 8: GETL R22, t6
- 9: ADDL t4, t6
- 10: PUTL t6, R21
- 11: INCEIPL $4
-
- 0x2547BC3C: 5758103A rlwinm r24,r26,2,0,29
- 12: GETL R26, t8
- 13: SHLL $0x2, t8
- 14: PUTL t8, R24
- 15: INCEIPL $4
-
- 0x2547BC40: 7C78B02E lwzx r3,r24,r22
- 16: GETL R22, t10
- 17: GETL R24, t12
- 18: ADDL t12, t10
- 19: LDL (t10), t14
- 20: PUTL t14, R3
- 21: INCEIPL $4
-
- 0x2547BC44: 816301E8 lwz r11,488(r3)
- 22: GETL R3, t16
- 23: ADDL $0x1E8, t16
- 24: LDL (t16), t18
- 25: PUTL t18, R11
- 26: INCEIPL $4
-
- 0x2547BC48: 2F8B0000 cmpi cr7,r11,0
- 27: GETL R11, t20
- 28: CMP0L t20, t22 (-rSo)
- 29: ICRFL t22, $0x7, CR
- 30: INCEIPL $4
-
- 0x2547BC4C: 419E002C bc 12,30,0x2547BC78
- 31: Js30o $0x2547BC78
-
-
-. 0 2547BC30 32
-. 57 20 10 3A 7C 14 03 78 7E A0 B2 14 57 58 10 3A 7C 78 B0 2E 81 63 01 E8 2F 8B 00 00 41 9E 00 2C
-
-==== BB 1422 (0x2547BC50) approx BBs exec'd 0 ====
-
- 0x2547BC50: 812B0000 lwz r9,0(r11)
- 0: GETL R11, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0x2547BC54: 2C890000 cmpi cr1,r9,0
- 4: GETL R9, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x1, CR
- 7: INCEIPL $4
-
- 0x2547BC58: 41860020 bc 12,6,0x2547BC78
- 8: Js06o $0x2547BC78
-
-
-. 0 2547BC50 12
-. 81 2B 00 00 2C 89 00 00 41 86 00 20
-
-==== BB 1423 (0x2547BC5C) approx BBs exec'd 0 ====
-
- 0x2547BC5C: 7C99D050 subf r4,r25,r26
- 0: GETL R25, t0
- 1: GETL R26, t2
- 2: SUBL t0, t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547BC60: 5485103A rlwinm r5,r4,2,0,29
- 5: GETL R4, t4
- 6: SHLL $0x2, t4
- 7: PUTL t4, R5
- 8: INCEIPL $4
-
- 0x2547BC64: 7F09D800 cmp cr6,r9,r27
- 9: GETL R9, t6
- 10: GETL R27, t8
- 11: CMPL t6, t8, t10 (-rSo)
- 12: ICRFL t10, $0x6, CR
- 13: INCEIPL $4
-
- 0x2547BC68: 419A0240 bc 12,26,0x2547BEA8
- 14: Js26o $0x2547BEA8
-
-
-. 0 2547BC5C 16
-. 7C 99 D0 50 54 85 10 3A 7F 09 D8 00 41 9A 02 40
-
-==== BB 1424 (0x2547BC6C) approx BBs exec'd 0 ====
-
- 0x2547BC6C: 852B0004 lwzu r9,4(r11)
- 0: GETL R11, t0
- 1: ADDL $0x4, t0
- 2: PUTL t0, R11
- 3: LDL (t0), t2
- 4: PUTL t2, R9
- 5: INCEIPL $4
-
- 0x2547BC70: 2C090000 cmpi cr0,r9,0
- 6: GETL R9, t4
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x0, CR
- 9: INCEIPL $4
-
- 0x2547BC74: 4082FFF0 bc 4,2,0x2547BC64
- 10: Jc02o $0x2547BC64
-
-
-. 0 2547BC6C 12
-. 85 2B 00 04 2C 09 00 00 40 82 FF F0
-
-==== BB 1425 (0x2547BC64) approx BBs exec'd 0 ====
-
- 0x2547BC64: 7F09D800 cmp cr6,r9,r27
- 0: GETL R9, t0
- 1: GETL R27, t2
- 2: CMPL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x6, CR
- 4: INCEIPL $4
-
- 0x2547BC68: 419A0240 bc 12,26,0x2547BEA8
- 5: Js26o $0x2547BEA8
-
-
-. 0 2547BC64 8
-. 7F 09 D8 00 41 9A 02 40
-
-==== BB 1426 (0x2547BC78) approx BBs exec'd 0 ====
-
- 0x2547BC78: 7D38B02E lwzx r9,r24,r22
- 0: GETL R22, t0
- 1: GETL R24, t2
- 2: ADDL t2, t0
- 3: LDL (t0), t4
- 4: PUTL t4, R9
- 5: INCEIPL $4
-
- 0x2547BC7C: 814901F4 lwz r10,500(r9)
- 6: GETL R9, t6
- 7: ADDL $0x1F4, t6
- 8: LDL (t6), t8
- 9: PUTL t8, R10
- 10: INCEIPL $4
-
- 0x2547BC80: 2F8A0000 cmpi cr7,r10,0
- 11: GETL R10, t10
- 12: CMP0L t10, t12 (-rSo)
- 13: ICRFL t12, $0x7, CR
- 14: INCEIPL $4
-
- 0x2547BC84: 409E0258 bc 4,30,0x2547BEDC
- 15: Jc30o $0x2547BEDC
-
-
-. 0 2547BC78 16
-. 7D 38 B0 2E 81 49 01 F4 2F 8A 00 00 40 9E 02 58
-
-==== BB 1427 (0x2547BC88) approx BBs exec'd 0 ====
-
- 0x2547BC88: 3B5A0001 addi r26,r26,1
- 0: GETL R26, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R26
- 3: INCEIPL $4
-
- 0x2547BC8C: 7F1AB840 cmpl cr6,r26,r23
- 4: GETL R26, t2
- 5: GETL R23, t4
- 6: CMPUL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0x2547BC90: 4198FFAC bc 12,24,0x2547BC3C
- 9: Js24o $0x2547BC3C
-
-
-. 0 2547BC88 12
-. 3B 5A 00 01 7F 1A B8 40 41 98 FF AC
-
-==== BB 1428 (0x2547BC3C) approx BBs exec'd 0 ====
-
- 0x2547BC3C: 5758103A rlwinm r24,r26,2,0,29
- 0: GETL R26, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R24
- 3: INCEIPL $4
-
- 0x2547BC40: 7C78B02E lwzx r3,r24,r22
- 4: GETL R22, t2
- 5: GETL R24, t4
- 6: ADDL t4, t2
- 7: LDL (t2), t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x2547BC44: 816301E8 lwz r11,488(r3)
- 10: GETL R3, t8
- 11: ADDL $0x1E8, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R11
- 14: INCEIPL $4
-
- 0x2547BC48: 2F8B0000 cmpi cr7,r11,0
- 15: GETL R11, t12
- 16: CMP0L t12, t14 (-rSo)
- 17: ICRFL t14, $0x7, CR
- 18: INCEIPL $4
-
- 0x2547BC4C: 419E002C bc 12,30,0x2547BC78
- 19: Js30o $0x2547BC78
-
-
-. 0 2547BC3C 20
-. 57 58 10 3A 7C 78 B0 2E 81 63 01 E8 2F 8B 00 00 41 9E 00 2C
-
-==== BB 1429 (0x2547BC94) approx BBs exec'd 0 ====
-
- 0x2547BC94: 4BFFFF58 b 0x2547BBEC
- 0: JMPo $0x2547BBEC ($4)
-
-
-. 0 2547BC94 4
-. 4B FF FF 58
-
-==== BB 1430 (0x2547BC10) approx BBs exec'd 0 ====
-
- 0x2547BC10: 3B390001 addi r25,r25,1
- 0: GETL R25, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R25
- 3: INCEIPL $4
-
- 0x2547BC14: 572C103A rlwinm r12,r25,2,0,29
- 4: GETL R25, t2
- 5: SHLL $0x2, t2
- 6: PUTL t2, R12
- 7: INCEIPL $4
-
- 0x2547BC18: 7FACB02E lwzx r29,r12,r22
- 8: GETL R22, t4
- 9: GETL R12, t6
- 10: ADDL t6, t4
- 11: LDL (t4), t8
- 12: PUTL t8, R29
- 13: INCEIPL $4
-
- 0x2547BC1C: 7F1DD800 cmp cr6,r29,r27
- 14: GETL R29, t10
- 15: GETL R27, t12
- 16: CMPL t10, t12, t14 (-rSo)
- 17: ICRFL t14, $0x6, CR
- 18: INCEIPL $4
-
- 0x2547BC20: 409AFFF0 bc 4,26,0x2547BC10
- 19: Jc26o $0x2547BC10
-
-
-. 0 2547BC10 20
-. 3B 39 00 01 57 2C 10 3A 7F AC B0 2E 7F 1D D8 00 40 9A FF F0
-
-==== BB 1431 (0x2547BD08) approx BBs exec'd 0 ====
-
- 0x2547BD08: 817E034C lwz r11,844(r30)
- 0: GETL R30, t0
- 1: ADDL $0x34C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0x2547BD0C: 832B0000 lwz r25,0(r11)
- 5: GETL R11, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R25
- 8: INCEIPL $4
-
- 0x2547BD10: 48000030 b 0x2547BD40
- 9: JMPo $0x2547BD40 ($4)
-
-
-. 0 2547BD08 12
-. 81 7E 03 4C 83 2B 00 00 48 00 00 30
-
-==== BB 1432 (0x2547BD40) approx BBs exec'd 0 ====
-
- 0x2547BD40: 5748103A rlwinm r8,r26,2,0,29
- 0: GETL R26, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R8
- 3: INCEIPL $4
-
- 0x2547BD44: 7F88B02E lwzx r28,r8,r22
- 4: GETL R22, t2
- 5: GETL R8, t4
- 6: ADDL t4, t2
- 7: LDL (t2), t6
- 8: PUTL t6, R28
- 9: INCEIPL $4
-
- 0x2547BD48: 817C0180 lwz r11,384(r28)
- 10: GETL R28, t8
- 11: ADDL $0x180, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R11
- 14: INCEIPL $4
-
- 0x2547BD4C: 75601000 andis. r0,r11,0x1000
- 15: GETL R11, t12
- 16: ANDL $0x10000000, t12
- 17: PUTL t12, R0
- 18: CMP0L t12, t14 (-rSo)
- 19: ICRFL t14, $0x0, CR
- 20: INCEIPL $4
-
- 0x2547BD50: 40A2FFC4 bc 5,2,0x2547BD14
- 21: Jc02o $0x2547BD14
-
-
-. 0 2547BD40 20
-. 57 48 10 3A 7F 88 B0 2E 81 7C 01 80 75 60 10 00 40 A2 FF C4
-
-==== BB 1433 (0x2547BD14) approx BBs exec'd 0 ====
-
- 0x2547BD14: 55750104 rlwinm r21,r11,0,4,2
- 0: GETL R11, t0
- 1: ANDL $0xEFFFFFFF, t0
- 2: PUTL t0, R21
- 3: INCEIPL $4
-
- 0x2547BD18: 809C0004 lwz r4,4(r28)
- 4: GETL R28, t2
- 5: ADDL $0x4, t2
- 6: LDL (t2), t4
- 7: PUTL t4, R4
- 8: INCEIPL $4
-
- 0x2547BD1C: 92BC0180 stw r21,384(r28)
- 9: GETL R21, t6
- 10: GETL R28, t8
- 11: ADDL $0x180, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547BD20: 8A840000 lbz r20,0(r4)
- 14: GETL R4, t10
- 15: LDB (t10), t12
- 16: PUTL t12, R20
- 17: INCEIPL $4
-
- 0x2547BD24: 2F140000 cmpi cr6,r20,0
- 18: GETL R20, t14
- 19: CMP0L t14, t16 (-rSo)
- 20: ICRFL t16, $0x6, CR
- 21: INCEIPL $4
-
- 0x2547BD28: 409A00C0 bc 4,26,0x2547BDE8
- 22: Jc26o $0x2547BDE8
-
-
-. 0 2547BD14 24
-. 55 75 01 04 80 9C 00 04 92 BC 01 80 8A 84 00 00 2F 14 00 00 40 9A 00 C0
-
-==== BB 1434 (0x2547BD2C) approx BBs exec'd 0 ====
-
- 0x2547BD2C: 7569C000 andis. r9,r11,0xC000
- 0: GETL R11, t0
- 1: ANDL $0xC0000000, t0
- 2: PUTL t0, R9
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0x2547BD30: 408200B8 bc 4,2,0x2547BDE8
- 6: Jc02o $0x2547BDE8
-
-
-. 0 2547BD2C 8
-. 75 69 C0 00 40 82 00 B8
-
-==== BB 1435 (0x2547BD34) approx BBs exec'd 0 ====
-
- 0x2547BD34: 3B5A0001 addi r26,r26,1
- 0: GETL R26, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R26
- 3: INCEIPL $4
-
- 0x2547BD38: 7F9A9840 cmpl cr7,r26,r19
- 4: GETL R26, t2
- 5: GETL R19, t4
- 6: CMPUL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x2547BD3C: 409C0030 bc 4,28,0x2547BD6C
- 9: Jc28o $0x2547BD6C
-
-
-. 0 2547BD34 12
-. 3B 5A 00 01 7F 9A 98 40 40 9C 00 30
-
-==== BB 1436 (0x2547BDE8) approx BBs exec'd 0 ====
-
- 0x2547BDE8: 813C0088 lwz r9,136(r28)
- 0: GETL R28, t0
- 1: ADDL $0x88, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547BDEC: 2F890000 cmpi cr7,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x2547BDF0: 409E0010 bc 4,30,0x2547BE00
- 9: Jc30o $0x2547BE00
-
-
-. 0 2547BDE8 12
-. 81 3C 00 88 2F 89 00 00 40 9E 00 10
-
-==== BB 1437 (0x2547BDF4) approx BBs exec'd 0 ====
-
- 0x2547BDF4: 82FC0054 lwz r23,84(r28)
- 0: GETL R28, t0
- 1: ADDL $0x54, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R23
- 4: INCEIPL $4
-
- 0x2547BDF8: 2C970000 cmpi cr1,r23,0
- 5: GETL R23, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x1, CR
- 8: INCEIPL $4
-
- 0x2547BDFC: 4186FF38 bc 12,6,0x2547BD34
- 9: Js06o $0x2547BD34
-
-
-. 0 2547BDF4 12
-. 82 FC 00 54 2C 97 00 00 41 86 FF 38
-
-==== BB 1438 (0x2547BE00) approx BBs exec'd 0 ====
-
- 0x2547BE00: 830E0000 lwz r24,0(r14)
- 0: GETL R14, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R24
- 3: INCEIPL $4
-
- 0x2547BE04: 730B0002 andi. r11,r24,0x2
- 4: GETL R24, t4
- 5: ANDL $0x2, t4
- 6: PUTL t4, R11
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x0, CR
- 9: INCEIPL $4
-
- 0x2547BE08: 4082007C bc 4,2,0x2547BE84
- 10: Jc02o $0x2547BE84
-
-
-. 0 2547BE00 12
-. 83 0E 00 00 73 0B 00 02 40 82 00 7C
-
-==== BB 1439 (0x2547BE0C) approx BBs exec'd 0 ====
-
- 0x2547BE0C: 2F090000 cmpi cr6,r9,0
- 0: GETL R9, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0x2547BE10: 419A0044 bc 12,26,0x2547BE54
- 4: Js26o $0x2547BE54
-
-
-. 0 2547BE0C 8
-. 2F 09 00 00 41 9A 00 44
-
-==== BB 1440 (0x2547BE54) approx BBs exec'd 0 ====
-
- 0x2547BE54: 813C0054 lwz r9,84(r28)
- 0: GETL R28, t0
- 1: ADDL $0x54, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0x2547BE58: 2E090000 cmpi cr4,r9,0
- 5: GETL R9, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x4, CR
- 8: INCEIPL $4
-
- 0x2547BE5C: 4192FEF8 bc 12,18,0x2547BD54
- 9: Js18o $0x2547BD54
-
-
-. 0 2547BE54 12
-. 81 3C 00 54 2E 09 00 00 41 92 FE F8
-
-==== BB 1441 (0x2547BE60) approx BBs exec'd 0 ====
-
- 0x2547BE60: 80A90004 lwz r5,4(r9)
- 0: GETL R9, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0x2547BE64: 83BC0000 lwz r29,0(r28)
- 5: GETL R28, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R29
- 8: INCEIPL $4
-
- 0x2547BE68: 7CFD2A14 add r7,r29,r5
- 9: GETL R29, t8
- 10: GETL R5, t10
- 11: ADDL t8, t10
- 12: PUTL t10, R7
- 13: INCEIPL $4
-
- 0x2547BE6C: 7CE903A6 mtctr r7
- 14: GETL R7, t12
- 15: PUTL t12, CTR
- 16: INCEIPL $4
-
- 0x2547BE70: 4E800421 bctrl
- 17: MOVL $0x2547BE74, t14
- 18: PUTL t14, LR
- 19: GETL CTR, t16
- 20: JMPo-c t16 ($4)
-
-
-. 0 2547BE60 20
-. 80 A9 00 04 83 BC 00 00 7C FD 2A 14 7C E9 03 A6 4E 80 04 21
-
-==== BB 1442 (0xFFDEF80) approx BBs exec'd 0 ====
-
- 0xFFDEF80: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFFDEF84: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFFDEF88: 90010014 stw r0,20(r1)
- 9: GETL R0, t6
- 10: GETL R1, t8
- 11: ADDL $0x14, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0xFFDEF8C: 4BFFF979 bl 0xFFDE904
- 14: MOVL $0xFFDEF90, t10
- 15: PUTL t10, LR
- 16: JMPo-c $0xFFDE904 ($4)
-
-
-. 0 FFDEF80 16
-. 94 21 FF F0 7C 08 02 A6 90 01 00 14 4B FF F9 79
-
-==== BB 1443 (0xFFDE904) approx BBs exec'd 0 ====
-
- 0xFFDE904: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFFDE908: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFFDE90C: 429F0005 bcl 20,31,0xFFDE910
- 9: MOVL $0xFFDE910, t6
- 10: PUTL t6, LR
- 11: INCEIPL $4
-
- 0xFFDE910: 93C10008 stw r30,8(r1)
- 12: GETL R30, t8
- 13: GETL R1, t10
- 14: ADDL $0x8, t10
- 15: STL t8, (t10)
- 16: INCEIPL $4
-
- 0xFFDE914: 7FC802A6 mflr r30
- 17: GETL LR, t12
- 18: PUTL t12, R30
- 19: INCEIPL $4
-
- 0xFFDE918: 93E1000C stw r31,12(r1)
- 20: GETL R31, t14
- 21: GETL R1, t16
- 22: ADDL $0xC, t16
- 23: STL t14, (t16)
- 24: INCEIPL $4
-
- 0xFFDE91C: 90010014 stw r0,20(r1)
- 25: GETL R0, t18
- 26: GETL R1, t20
- 27: ADDL $0x14, t20
- 28: STL t18, (t20)
- 29: INCEIPL $4
-
- 0xFFDE920: 801EFFF0 lwz r0,-16(r30)
- 30: GETL R30, t22
- 31: ADDL $0xFFFFFFF0, t22
- 32: LDL (t22), t24
- 33: PUTL t24, R0
- 34: INCEIPL $4
-
- 0xFFDE924: 7FC0F214 add r30,r0,r30
- 35: GETL R0, t26
- 36: GETL R30, t28
- 37: ADDL t26, t28
- 38: PUTL t28, R30
- 39: INCEIPL $4
-
- 0xFFDE928: 813E8000 lwz r9,-32768(r30)
- 40: GETL R30, t30
- 41: ADDL $0xFFFF8000, t30
- 42: LDL (t30), t32
- 43: PUTL t32, R9
- 44: INCEIPL $4
-
- 0xFFDE92C: 88090000 lbz r0,0(r9)
- 45: GETL R9, t34
- 46: LDB (t34), t36
- 47: PUTL t36, R0
- 48: INCEIPL $4
-
- 0xFFDE930: 2F800000 cmpi cr7,r0,0
- 49: GETL R0, t38
- 50: CMP0L t38, t40 (-rSo)
- 51: ICRFL t40, $0x7, CR
- 52: INCEIPL $4
-
- 0xFFDE934: 409E0050 bc 4,30,0xFFDE984
- 53: Jc30o $0xFFDE984
-
-
-. 0 FFDE904 52
-. 94 21 FF F0 7C 08 02 A6 42 9F 00 05 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 80 1E FF F0 7F C0 F2 14 81 3E 80 00 88 09 00 00 2F 80 00 00 40 9E 00 50
-
-==== BB 1444 (0xFFDE938) approx BBs exec'd 0 ====
-
- 0xFFDE938: 801E8004 lwz r0,-32764(r30)
- 0: GETL R30, t0
- 1: ADDL $0xFFFF8004, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0xFFDE93C: 2F800000 cmpi cr7,r0,0
- 5: GETL R0, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0xFFDE940: 419E0010 bc 12,30,0xFFDE950
- 9: Js30o $0xFFDE950
-
-
-. 0 FFDE938 12
-. 80 1E 80 04 2F 80 00 00 41 9E 00 10
-
-==== BB 1445 (0xFFDE944) approx BBs exec'd 0 ====
-
- 0xFFDE944: 813E8008 lwz r9,-32760(r30)
- 0: GETL R30, t0
- 1: ADDL $0xFFFF8008, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0xFFDE948: 80690000 lwz r3,0(r9)
- 5: GETL R9, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R3
- 8: INCEIPL $4
-
- 0xFFDE94C: 48010831 bl 0xFFEF17C
- 9: MOVL $0xFFDE950, t8
- 10: PUTL t8, LR
- 11: JMPo-c $0xFFEF17C ($4)
-
-
-. 0 FFDE944 12
-. 81 3E 80 08 80 69 00 00 48 01 08 31
-
-==== BB 1446 (0xFFEF17C) approx BBs exec'd 0 ====
-
- 0xFFEF17C: 3960000C li r11,12
- 0: MOVL $0xC, t0
- 1: PUTL t0, R11
- 2: INCEIPL $4
-
- 0xFFEF180: 4BFFFFBC b 0xFFEF13C
- 3: JMPo $0xFFEF13C ($4)
-
-
-. 0 FFEF17C 8
-. 39 60 00 0C 4B FF FF BC
-
-==== BB 1447 (0xFFEF13C) approx BBs exec'd 0 ====
-
- 0xFFEF13C: 556C083C rlwinm r12,r11,1,0,30
- 0: GETL R11, t0
- 1: SHLL $0x1, t0
- 2: PUTL t0, R12
- 3: INCEIPL $4
-
- 0xFFEF140: 7D6C5A14 add r11,r12,r11
- 4: GETL R12, t2
- 5: GETL R11, t4
- 6: ADDL t2, t4
- 7: PUTL t4, R11
- 8: INCEIPL $4
-
- 0xFFEF144: 3980AF5C li r12,-20644
- 9: MOVL $0xFFFFAF5C, t6
- 10: PUTL t6, R12
- 11: INCEIPL $4
-
- 0xFFEF148: 3D8C2548 addis r12,r12,9544
- 12: MOVL $0x2547AF5C, t8
- 13: PUTL t8, R12
- 14: INCEIPL $4
-
- 0xFFEF14C: 7D8903A6 mtctr r12
- 15: GETL R12, t10
- 16: PUTL t10, CTR
- 17: INCEIPL $4
-
- 0xFFEF150: 398080D0 li r12,-32560
- 18: MOVL $0xFFFF80D0, t12
- 19: PUTL t12, R12
- 20: INCEIPL $4
-
- 0xFFEF154: 3D8C2547 addis r12,r12,9543
- 21: MOVL $0x254680D0, t14
- 22: PUTL t14, R12
- 23: INCEIPL $4
-
- 0xFFEF158: 4E800420 bctr
- 24: GETL CTR, t16
- 25: JMPo t16 ($4)
-
-
-. 0 FFEF13C 32
-. 55 6C 08 3C 7D 6C 5A 14 39 80 AF 5C 3D 8C 25 48 7D 89 03 A6 39 80 80 D0 3D 8C 25 47 4E 80 04 20
-
-==== BB 1448 __cxa_finalize(0xFEB3F44) approx BBs exec'd 0 ====
-
- 0xFEB3F44: 9421FFD0 stwu r1,-48(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFD0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFEB3F48: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFEB3F4C: 48113F05 bl 0xFFC7E50
- 9: MOVL $0xFEB3F50, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FEB3F44 12
-. 94 21 FF D0 7C 08 02 A6 48 11 3F 05
-
-==== BB 1449 (0xFEB3F50) approx BBs exec'd 0 ====
-
- 0xFEB3F50: 93C10028 stw r30,40(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x28, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFEB3F54: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0xFEB3F58: 93810020 stw r28,32(r1)
- 8: GETL R28, t6
- 9: GETL R1, t8
- 10: ADDL $0x20, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0xFEB3F5C: 90010034 stw r0,52(r1)
- 13: GETL R0, t10
- 14: GETL R1, t12
- 15: ADDL $0x34, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0xFEB3F60: 7D800026 mfcr r12
- 18: GETL CR, t14
- 19: PUTL t14, R12
- 20: INCEIPL $4
-
- 0xFEB3F64: 93210014 stw r25,20(r1)
- 21: GETL R25, t16
- 22: GETL R1, t18
- 23: ADDL $0x14, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0xFEB3F68: 2E030000 cmpi cr4,r3,0
- 26: GETL R3, t20
- 27: CMP0L t20, t22 (-rSo)
- 28: ICRFL t22, $0x4, CR
- 29: INCEIPL $4
-
- 0xFEB3F6C: 813E1AFC lwz r9,6908(r30)
- 30: GETL R30, t24
- 31: ADDL $0x1AFC, t24
- 32: LDL (t24), t26
- 33: PUTL t26, R9
- 34: INCEIPL $4
-
- 0xFEB3F70: 7C791B78 or r25,r3,r3
- 35: GETL R3, t28
- 36: PUTL t28, R25
- 37: INCEIPL $4
-
- 0xFEB3F74: 93010010 stw r24,16(r1)
- 38: GETL R24, t30
- 39: GETL R1, t32
- 40: ADDL $0x10, t32
- 41: STL t30, (t32)
- 42: INCEIPL $4
-
- 0xFEB3F78: 83890000 lwz r28,0(r9)
- 43: GETL R9, t34
- 44: LDL (t34), t36
- 45: PUTL t36, R28
- 46: INCEIPL $4
-
- 0xFEB3F7C: 93410018 stw r26,24(r1)
- 47: GETL R26, t38
- 48: GETL R1, t40
- 49: ADDL $0x18, t40
- 50: STL t38, (t40)
- 51: INCEIPL $4
-
- 0xFEB3F80: 2F9C0000 cmpi cr7,r28,0
- 52: GETL R28, t42
- 53: CMP0L t42, t44 (-rSo)
- 54: ICRFL t44, $0x7, CR
- 55: INCEIPL $4
-
- 0xFEB3F84: 9361001C stw r27,28(r1)
- 56: GETL R27, t46
- 57: GETL R1, t48
- 58: ADDL $0x1C, t48
- 59: STL t46, (t48)
- 60: INCEIPL $4
-
- 0xFEB3F88: 93A10024 stw r29,36(r1)
- 61: GETL R29, t50
- 62: GETL R1, t52
- 63: ADDL $0x24, t52
- 64: STL t50, (t52)
- 65: INCEIPL $4
-
- 0xFEB3F8C: 93E1002C stw r31,44(r1)
- 66: GETL R31, t54
- 67: GETL R1, t56
- 68: ADDL $0x2C, t56
- 69: STL t54, (t56)
- 70: INCEIPL $4
-
- 0xFEB3F90: 9181000C stw r12,12(r1)
- 71: GETL R12, t58
- 72: GETL R1, t60
- 73: ADDL $0xC, t60
- 74: STL t58, (t60)
- 75: INCEIPL $4
-
- 0xFEB3F94: 419E0088 bc 12,30,0xFEB401C
- 76: Js30o $0xFEB401C
-
-
-. 0 FEB3F50 72
-. 93 C1 00 28 7F C8 02 A6 93 81 00 20 90 01 00 34 7D 80 00 26 93 21 00 14 2E 03 00 00 81 3E 1A FC 7C 79 1B 78 93 01 00 10 83 89 00 00 93 41 00 18 2F 9C 00 00 93 61 00 1C 93 A1 00 24 93 E1 00 2C 91 81 00 0C 41 9E 00 88
-
-==== BB 1450 (0xFEB3F98) approx BBs exec'd 0 ====
-
- 0xFEB3F98: 80BC0004 lwz r5,4(r28)
- 0: GETL R28, t0
- 1: ADDL $0x4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R5
- 4: INCEIPL $4
-
- 0xFEB3F9C: 3BBC0008 addi r29,r28,8
- 5: GETL R28, t4
- 6: ADDL $0x8, t4
- 7: PUTL t4, R29
- 8: INCEIPL $4
-
- 0xFEB3FA0: 54A42036 rlwinm r4,r5,4,0,27
- 9: GETL R5, t6
- 10: SHLL $0x4, t6
- 11: PUTL t6, R4
- 12: INCEIPL $4
-
- 0xFEB3FA4: 7C64E214 add r3,r4,r28
- 13: GETL R4, t8
- 14: GETL R28, t10
- 15: ADDL t8, t10
- 16: PUTL t10, R3
- 17: INCEIPL $4
-
- 0xFEB3FA8: 3BE3FFF8 addi r31,r3,-8
- 18: GETL R3, t12
- 19: ADDL $0xFFFFFFF8, t12
- 20: PUTL t12, R31
- 21: INCEIPL $4
-
- 0xFEB3FAC: 7C1DF840 cmpl cr0,r29,r31
- 22: GETL R29, t14
- 23: GETL R31, t16
- 24: CMPUL t14, t16, t18 (-rSo)
- 25: ICRFL t18, $0x0, CR
- 26: INCEIPL $4
-
- 0xFEB3FB0: 41810060 bc 12,1,0xFEB4010
- 27: Js01o $0xFEB4010
-
-
-. 0 FEB3F98 28
-. 80 BC 00 04 3B BC 00 08 54 A4 20 36 7C 64 E2 14 3B E3 FF F8 7C 1D F8 40 41 81 00 60
-
-==== BB 1451 (0xFEB4010) approx BBs exec'd 0 ====
-
- 0xFEB4010: 839C0000 lwz r28,0(r28)
- 0: GETL R28, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R28
- 3: INCEIPL $4
-
- 0xFEB4014: 2F9C0000 cmpi cr7,r28,0
- 4: GETL R28, t4
- 5: CMP0L t4, t6 (-rSo)
- 6: ICRFL t6, $0x7, CR
- 7: INCEIPL $4
-
- 0xFEB4018: 409EFF80 bc 4,30,0xFEB3F98
- 8: Jc30o $0xFEB3F98
-
-
-. 0 FEB4010 12
-. 83 9C 00 00 2F 9C 00 00 40 9E FF 80
-
-==== BB 1452 (0xFEB401C) approx BBs exec'd 0 ====
-
- 0xFEB401C: 40920098 bc 4,18,0xFEB40B4
- 0: Jc18o $0xFEB40B4
-
-
-. 0 FEB401C 4
-. 40 92 00 98
-
-==== BB 1453 (0xFEB40B4) approx BBs exec'd 0 ====
-
- 0xFEB40B4: 81410034 lwz r10,52(r1)
- 0: GETL R1, t0
- 1: ADDL $0x34, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0xFEB40B8: 7F23CB78 or r3,r25,r25
- 5: GETL R25, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0xFEB40BC: 8101000C lwz r8,12(r1)
- 8: GETL R1, t6
- 9: ADDL $0xC, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R8
- 12: INCEIPL $4
-
- 0xFEB40C0: 83C10028 lwz r30,40(r1)
- 13: GETL R1, t10
- 14: ADDL $0x28, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R30
- 17: INCEIPL $4
-
- 0xFEB40C4: 7D4803A6 mtlr r10
- 18: GETL R10, t14
- 19: PUTL t14, LR
- 20: INCEIPL $4
-
- 0xFEB40C8: 83E1002C lwz r31,44(r1)
- 21: GETL R1, t16
- 22: ADDL $0x2C, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R31
- 25: INCEIPL $4
-
- 0xFEB40CC: 7D008120 mtcrf 0x8,r8
- 26: GETL R8, t20
- 27: ICRFL t20, $0x4, CR
- 28: INCEIPL $4
-
- 0xFEB40D0: 83010010 lwz r24,16(r1)
- 29: GETL R1, t22
- 30: ADDL $0x10, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R24
- 33: INCEIPL $4
-
- 0xFEB40D4: 83210014 lwz r25,20(r1)
- 34: GETL R1, t26
- 35: ADDL $0x14, t26
- 36: LDL (t26), t28
- 37: PUTL t28, R25
- 38: INCEIPL $4
-
- 0xFEB40D8: 83410018 lwz r26,24(r1)
- 39: GETL R1, t30
- 40: ADDL $0x18, t30
- 41: LDL (t30), t32
- 42: PUTL t32, R26
- 43: INCEIPL $4
-
- 0xFEB40DC: 8361001C lwz r27,28(r1)
- 44: GETL R1, t34
- 45: ADDL $0x1C, t34
- 46: LDL (t34), t36
- 47: PUTL t36, R27
- 48: INCEIPL $4
-
- 0xFEB40E0: 83810020 lwz r28,32(r1)
- 49: GETL R1, t38
- 50: ADDL $0x20, t38
- 51: LDL (t38), t40
- 52: PUTL t40, R28
- 53: INCEIPL $4
-
- 0xFEB40E4: 83A10024 lwz r29,36(r1)
- 54: GETL R1, t42
- 55: ADDL $0x24, t42
- 56: LDL (t42), t44
- 57: PUTL t44, R29
- 58: INCEIPL $4
-
- 0xFEB40E8: 38210030 addi r1,r1,48
- 59: GETL R1, t46
- 60: ADDL $0x30, t46
- 61: PUTL t46, R1
- 62: INCEIPL $4
-
- 0xFEB40EC: 480ABD24 b 0xFF5FE10
- 63: JMPo $0xFF5FE10 ($4)
-
-
-. 0 FEB40B4 60
-. 81 41 00 34 7F 23 CB 78 81 01 00 0C 83 C1 00 28 7D 48 03 A6 83 E1 00 2C 7D 00 81 20 83 01 00 10 83 21 00 14 83 41 00 18 83 61 00 1C 83 81 00 20 83 A1 00 24 38 21 00 30 48 0A BD 24
-
-==== BB 1454 __unregister_atfork(0xFF5FE10) approx BBs exec'd 0 ====
-
- 0xFF5FE10: 9421FFD0 stwu r1,-48(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFD0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFF5FE14: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFF5FE18: 48068039 bl 0xFFC7E50
- 9: MOVL $0xFF5FE1C, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FF5FE10 12
-. 94 21 FF D0 7C 08 02 A6 48 06 80 39
-
-==== BB 1455 (0xFF5FE1C) approx BBs exec'd 0 ====
-
- 0xFF5FE1C: 93C10028 stw r30,40(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x28, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFF5FE20: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0xFF5FE24: 93010010 stw r24,16(r1)
- 8: GETL R24, t6
- 9: GETL R1, t8
- 10: ADDL $0x10, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0xFF5FE28: 90010034 stw r0,52(r1)
- 13: GETL R0, t10
- 14: GETL R1, t12
- 15: ADDL $0x34, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0xFF5FE2C: 93A10024 stw r29,36(r1)
- 18: GETL R29, t14
- 19: GETL R1, t16
- 20: ADDL $0x24, t16
- 21: STL t14, (t16)
- 22: INCEIPL $4
-
- 0xFF5FE30: 831E1CD4 lwz r24,7380(r30)
- 23: GETL R30, t18
- 24: ADDL $0x1CD4, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R24
- 27: INCEIPL $4
-
- 0xFF5FE34: 93410018 stw r26,24(r1)
- 28: GETL R26, t22
- 29: GETL R1, t24
- 30: ADDL $0x18, t24
- 31: STL t22, (t24)
- 32: INCEIPL $4
-
- 0xFF5FE38: 7C7A1B78 or r26,r3,r3
- 33: GETL R3, t26
- 34: PUTL t26, R26
- 35: INCEIPL $4
-
- 0xFF5FE3C: 83B80000 lwz r29,0(r24)
- 36: GETL R24, t28
- 37: LDL (t28), t30
- 38: PUTL t30, R29
- 39: INCEIPL $4
-
- 0xFF5FE40: 9361001C stw r27,28(r1)
- 40: GETL R27, t32
- 41: GETL R1, t34
- 42: ADDL $0x1C, t34
- 43: STL t32, (t34)
- 44: INCEIPL $4
-
- 0xFF5FE44: 3B600000 li r27,0
- 45: MOVL $0x0, t36
- 46: PUTL t36, R27
- 47: INCEIPL $4
-
- 0xFF5FE48: 93E1002C stw r31,44(r1)
- 48: GETL R31, t38
- 49: GETL R1, t40
- 50: ADDL $0x2C, t40
- 51: STL t38, (t40)
- 52: INCEIPL $4
-
- 0xFF5FE4C: 7C3F0B78 or r31,r1,r1
- 53: GETL R1, t42
- 54: PUTL t42, R31
- 55: INCEIPL $4
-
- 0xFF5FE50: 93210014 stw r25,20(r1)
- 56: GETL R25, t44
- 57: GETL R1, t46
- 58: ADDL $0x14, t46
- 59: STL t44, (t46)
- 60: INCEIPL $4
-
- 0xFF5FE54: 93810020 stw r28,32(r1)
- 61: GETL R28, t48
- 62: GETL R1, t50
- 63: ADDL $0x20, t50
- 64: STL t48, (t50)
- 65: INCEIPL $4
-
- 0xFF5FE58: 48000018 b 0xFF5FE70
- 66: JMPo $0xFF5FE70 ($4)
-
-
-. 0 FF5FE1C 64
-. 93 C1 00 28 7F C8 02 A6 93 01 00 10 90 01 00 34 93 A1 00 24 83 1E 1C D4 93 41 00 18 7C 7A 1B 78 83 B8 00 00 93 61 00 1C 3B 60 00 00 93 E1 00 2C 7C 3F 0B 78 93 21 00 14 93 81 00 20 48 00 00 18
-
-==== BB 1456 (0xFF5FE70) approx BBs exec'd 0 ====
-
- 0xFF5FE70: 2F1D0000 cmpi cr6,r29,0
- 0: GETL R29, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x6, CR
- 3: INCEIPL $4
-
- 0xFF5FE74: 409AFFE8 bc 4,26,0xFF5FE5C
- 4: Jc26o $0xFF5FE5C
-
-
-. 0 FF5FE70 8
-. 2F 1D 00 00 40 9A FF E8
-
-==== BB 1457 (0xFF5FE78) approx BBs exec'd 0 ====
-
- 0xFF5FE78: 80610000 lwz r3,0(r1)
- 0: GETL R1, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R3
- 3: INCEIPL $4
-
- 0xFF5FE7C: 83830004 lwz r28,4(r3)
- 4: GETL R3, t4
- 5: ADDL $0x4, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R28
- 8: INCEIPL $4
-
- 0xFF5FE80: 8303FFE0 lwz r24,-32(r3)
- 9: GETL R3, t8
- 10: ADDL $0xFFFFFFE0, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R24
- 13: INCEIPL $4
-
- 0xFF5FE84: 7F8803A6 mtlr r28
- 14: GETL R28, t12
- 15: PUTL t12, LR
- 16: INCEIPL $4
-
- 0xFF5FE88: 8323FFE4 lwz r25,-28(r3)
- 17: GETL R3, t14
- 18: ADDL $0xFFFFFFE4, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R25
- 21: INCEIPL $4
-
- 0xFF5FE8C: 8343FFE8 lwz r26,-24(r3)
- 22: GETL R3, t18
- 23: ADDL $0xFFFFFFE8, t18
- 24: LDL (t18), t20
- 25: PUTL t20, R26
- 26: INCEIPL $4
-
- 0xFF5FE90: 8363FFEC lwz r27,-20(r3)
- 27: GETL R3, t22
- 28: ADDL $0xFFFFFFEC, t22
- 29: LDL (t22), t24
- 30: PUTL t24, R27
- 31: INCEIPL $4
-
- 0xFF5FE94: 8383FFF0 lwz r28,-16(r3)
- 32: GETL R3, t26
- 33: ADDL $0xFFFFFFF0, t26
- 34: LDL (t26), t28
- 35: PUTL t28, R28
- 36: INCEIPL $4
-
- 0xFF5FE98: 83A3FFF4 lwz r29,-12(r3)
- 37: GETL R3, t30
- 38: ADDL $0xFFFFFFF4, t30
- 39: LDL (t30), t32
- 40: PUTL t32, R29
- 41: INCEIPL $4
-
- 0xFF5FE9C: 83C3FFF8 lwz r30,-8(r3)
- 42: GETL R3, t34
- 43: ADDL $0xFFFFFFF8, t34
- 44: LDL (t34), t36
- 45: PUTL t36, R30
- 46: INCEIPL $4
-
- 0xFF5FEA0: 83E3FFFC lwz r31,-4(r3)
- 47: GETL R3, t38
- 48: ADDL $0xFFFFFFFC, t38
- 49: LDL (t38), t40
- 50: PUTL t40, R31
- 51: INCEIPL $4
-
- 0xFF5FEA4: 7C611B78 or r1,r3,r3
- 52: GETL R3, t42
- 53: PUTL t42, R1
- 54: INCEIPL $4
-
- 0xFF5FEA8: 4E800020 blr
- 55: GETL LR, t44
- 56: JMPo-r t44 ($4)
-
-
-. 0 FF5FE78 52
-. 80 61 00 00 83 83 00 04 83 03 FF E0 7F 88 03 A6 83 23 FF E4 83 43 FF E8 83 63 FF EC 83 83 FF F0 83 A3 FF F4 83 C3 FF F8 83 E3 FF FC 7C 61 1B 78 4E 80 00 20
-
-==== BB 1458 (0xFFDE950) approx BBs exec'd 0 ====
-
- 0xFFDE950: 83FE800C lwz r31,-32756(r30)
- 0: GETL R30, t0
- 1: ADDL $0xFFFF800C, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R31
- 4: INCEIPL $4
-
- 0xFFDE954: 48000014 b 0xFFDE968
- 5: JMPo $0xFFDE968 ($4)
-
-
-. 0 FFDE950 8
-. 83 FE 80 0C 48 00 00 14
-
-==== BB 1459 (0xFFDE968) approx BBs exec'd 0 ====
-
- 0xFFDE968: 813F0000 lwz r9,0(r31)
- 0: GETL R31, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R9
- 3: INCEIPL $4
-
- 0xFFDE96C: 81690000 lwz r11,0(r9)
- 4: GETL R9, t4
- 5: LDL (t4), t6
- 6: PUTL t6, R11
- 7: INCEIPL $4
-
- 0xFFDE970: 2F8B0000 cmpi cr7,r11,0
- 8: GETL R11, t8
- 9: CMP0L t8, t10 (-rSo)
- 10: ICRFL t10, $0x7, CR
- 11: INCEIPL $4
-
- 0xFFDE974: 409EFFE4 bc 4,30,0xFFDE958
- 12: Jc30o $0xFFDE958
-
-
-. 0 FFDE968 16
-. 81 3F 00 00 81 69 00 00 2F 8B 00 00 40 9E FF E4
-
-==== BB 1460 (0xFFDE978) approx BBs exec'd 0 ====
-
- 0xFFDE978: 813E8000 lwz r9,-32768(r30)
- 0: GETL R30, t0
- 1: ADDL $0xFFFF8000, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0xFFDE97C: 38000001 li r0,1
- 5: MOVL $0x1, t4
- 6: PUTL t4, R0
- 7: INCEIPL $4
-
- 0xFFDE980: 98090000 stb r0,0(r9)
- 8: GETL R0, t6
- 9: GETL R9, t8
- 10: STB t6, (t8)
- 11: INCEIPL $4
-
- 0xFFDE984: 80010014 lwz r0,20(r1)
- 12: GETL R1, t10
- 13: ADDL $0x14, t10
- 14: LDL (t10), t12
- 15: PUTL t12, R0
- 16: INCEIPL $4
-
- 0xFFDE988: 83C10008 lwz r30,8(r1)
- 17: GETL R1, t14
- 18: ADDL $0x8, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R30
- 21: INCEIPL $4
-
- 0xFFDE98C: 83E1000C lwz r31,12(r1)
- 22: GETL R1, t18
- 23: ADDL $0xC, t18
- 24: LDL (t18), t20
- 25: PUTL t20, R31
- 26: INCEIPL $4
-
- 0xFFDE990: 7C0803A6 mtlr r0
- 27: GETL R0, t22
- 28: PUTL t22, LR
- 29: INCEIPL $4
-
- 0xFFDE994: 38210010 addi r1,r1,16
- 30: GETL R1, t24
- 31: ADDL $0x10, t24
- 32: PUTL t24, R1
- 33: INCEIPL $4
-
- 0xFFDE998: 4E800020 blr
- 34: GETL LR, t26
- 35: JMPo-r t26 ($4)
-
-
-. 0 FFDE978 36
-. 81 3E 80 00 38 00 00 01 98 09 00 00 80 01 00 14 83 C1 00 08 83 E1 00 0C 7C 08 03 A6 38 21 00 10 4E 80 00 20
-
-==== BB 1461 (0xFFDEF90) approx BBs exec'd 0 ====
-
- 0xFFDEF90: 80010014 lwz r0,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R0
- 4: INCEIPL $4
-
- 0xFFDEF94: 7C0803A6 mtlr r0
- 5: GETL R0, t4
- 6: PUTL t4, LR
- 7: INCEIPL $4
-
- 0xFFDEF98: 38210010 addi r1,r1,16
- 8: GETL R1, t6
- 9: ADDL $0x10, t6
- 10: PUTL t6, R1
- 11: INCEIPL $4
-
- 0xFFDEF9C: 4E800020 blr
- 12: GETL LR, t8
- 13: JMPo-r t8 ($4)
-
-
-. 0 FFDEF90 16
-. 80 01 00 14 7C 08 03 A6 38 21 00 10 4E 80 00 20
-
-==== BB 1462 (0x2547BE74) approx BBs exec'd 0 ====
-
- 0x2547BE74: 811C0178 lwz r8,376(r28)
- 0: GETL R28, t0
- 1: ADDL $0x178, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x2547BE78: 3968FFFF addi r11,r8,-1
- 5: GETL R8, t4
- 6: ADDL $0xFFFFFFFF, t4
- 7: PUTL t4, R11
- 8: INCEIPL $4
-
- 0x2547BE7C: 917C0178 stw r11,376(r28)
- 9: GETL R11, t6
- 10: GETL R28, t8
- 11: ADDL $0x178, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547BE80: 4BFFFEE0 b 0x2547BD60
- 14: JMPo $0x2547BD60 ($4)
-
-
-. 0 2547BE74 16
-. 81 1C 01 78 39 68 FF FF 91 7C 01 78 4B FF FE E0
-
-==== BB 1463 (0x2547BD60) approx BBs exec'd 0 ====
-
- 0x2547BD60: 3B5A0001 addi r26,r26,1
- 0: GETL R26, t0
- 1: ADDL $0x1, t0
- 2: PUTL t0, R26
- 3: INCEIPL $4
-
- 0x2547BD64: 7F9A9840 cmpl cr7,r26,r19
- 4: GETL R26, t2
- 5: GETL R19, t4
- 6: CMPUL t2, t4, t6 (-rSo)
- 7: ICRFL t6, $0x7, CR
- 8: INCEIPL $4
-
- 0x2547BD68: 419CFFD8 bc 12,28,0x2547BD40
- 9: Js28o $0x2547BD40
-
-
-. 0 2547BD60 12
-. 3B 5A 00 01 7F 9A 98 40 41 9C FF D8
-
-==== BB 1464 (0x2547BE14) approx BBs exec'd 0 ====
-
- 0x2547BE14: 809C0090 lwz r4,144(r28)
- 0: GETL R28, t0
- 1: ADDL $0x90, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0x2547BE18: 80690004 lwz r3,4(r9)
- 5: GETL R9, t4
- 6: ADDL $0x4, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R3
- 9: INCEIPL $4
-
- 0x2547BE1C: 83640004 lwz r27,4(r4)
- 10: GETL R4, t8
- 11: ADDL $0x4, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R27
- 14: INCEIPL $4
-
- 0x2547BE20: 801C0000 lwz r0,0(r28)
- 15: GETL R28, t12
- 16: LDL (t12), t14
- 17: PUTL t14, R0
- 18: INCEIPL $4
-
- 0x2547BE24: 576CF0BE rlwinm r12,r27,30,2,31
- 19: GETL R27, t16
- 20: SHRL $0x2, t16
- 21: PUTL t16, R12
- 22: INCEIPL $4
-
- 0x2547BE28: 2F8C0000 cmpi cr7,r12,0
- 23: GETL R12, t18
- 24: CMP0L t18, t20 (-rSo)
- 25: ICRFL t20, $0x7, CR
- 26: INCEIPL $4
-
- 0x2547BE2C: 7F601A14 add r27,r0,r3
- 27: GETL R0, t22
- 28: GETL R3, t24
- 29: ADDL t22, t24
- 30: PUTL t24, R27
- 31: INCEIPL $4
-
- 0x2547BE30: 3BACFFFF addi r29,r12,-1
- 32: GETL R12, t26
- 33: ADDL $0xFFFFFFFF, t26
- 34: PUTL t26, R29
- 35: INCEIPL $4
-
- 0x2547BE34: 419E0020 bc 12,30,0x2547BE54
- 36: Js30o $0x2547BE54
-
-
-. 0 2547BE14 36
-. 80 9C 00 90 80 69 00 04 83 64 00 04 80 1C 00 00 57 6C F0 BE 2F 8C 00 00 7F 60 1A 14 3B AC FF FF 41 9E 00 20
-
-==== BB 1465 (0x2547BE38) approx BBs exec'd 0 ====
-
- 0x2547BE38: 57A6103A rlwinm r6,r29,2,0,29
- 0: GETL R29, t0
- 1: SHLL $0x2, t0
- 2: PUTL t0, R6
- 3: INCEIPL $4
-
- 0x2547BE3C: 7D26D82E lwzx r9,r6,r27
- 4: GETL R27, t2
- 5: GETL R6, t4
- 6: ADDL t4, t2
- 7: LDL (t2), t6
- 8: PUTL t6, R9
- 9: INCEIPL $4
-
- 0x2547BE40: 7D2903A6 mtctr r9
- 10: GETL R9, t8
- 11: PUTL t8, CTR
- 12: INCEIPL $4
-
- 0x2547BE44: 4E800421 bctrl
- 13: MOVL $0x2547BE48, t10
- 14: PUTL t10, LR
- 15: GETL CTR, t12
- 16: JMPo-c t12 ($4)
-
-
-. 0 2547BE38 16
-. 57 A6 10 3A 7D 26 D8 2E 7D 29 03 A6 4E 80 04 21
-
-==== BB 1466 __libc_fini(0xFE9B5BC) approx BBs exec'd 0 ====
-
- 0xFE9B5BC: 9421FFF0 stwu r1,-16(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFF0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFE9B5C0: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFE9B5C4: 4812C88D bl 0xFFC7E50
- 9: MOVL $0xFE9B5C8, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FE9B5BC 12
-. 94 21 FF F0 7C 08 02 A6 48 12 C8 8D
-
-==== BB 1467 (0xFE9B5C8) approx BBs exec'd 0 ====
-
- 0xFE9B5C8: 93C10008 stw r30,8(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x8, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFE9B5CC: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0xFE9B5D0: 93E1000C stw r31,12(r1)
- 8: GETL R31, t6
- 9: GETL R1, t8
- 10: ADDL $0xC, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0xFE9B5D4: 90010014 stw r0,20(r1)
- 13: GETL R0, t10
- 14: GETL R1, t12
- 15: ADDL $0x14, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0xFE9B5D8: 813E0014 lwz r9,20(r30)
- 18: GETL R30, t14
- 19: ADDL $0x14, t14
- 20: LDL (t14), t16
- 21: PUTL t16, R9
- 22: INCEIPL $4
-
- 0xFE9B5DC: 80090004 lwz r0,4(r9)
- 23: GETL R9, t18
- 24: ADDL $0x4, t18
- 25: LDL (t18), t20
- 26: PUTL t20, R0
- 27: INCEIPL $4
-
- 0xFE9B5E0: 3BE90004 addi r31,r9,4
- 28: GETL R9, t22
- 29: ADDL $0x4, t22
- 30: PUTL t22, R31
- 31: INCEIPL $4
-
- 0xFE9B5E4: 2F800000 cmpi cr7,r0,0
- 32: GETL R0, t24
- 33: CMP0L t24, t26 (-rSo)
- 34: ICRFL t26, $0x7, CR
- 35: INCEIPL $4
-
- 0xFE9B5E8: 419E0018 bc 12,30,0xFE9B600
- 36: Js30o $0xFE9B600
-
-
-. 0 FE9B5C8 36
-. 93 C1 00 08 7F C8 02 A6 93 E1 00 0C 90 01 00 14 81 3E 00 14 80 09 00 04 3B E9 00 04 2F 80 00 00 41 9E 00 18
-
-==== BB 1468 (0xFE9B600) approx BBs exec'd 0 ====
-
- 0xFE9B600: 80610014 lwz r3,20(r1)
- 0: GETL R1, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0xFE9B604: 83C10008 lwz r30,8(r1)
- 5: GETL R1, t4
- 6: ADDL $0x8, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R30
- 9: INCEIPL $4
-
- 0xFE9B608: 83E1000C lwz r31,12(r1)
- 10: GETL R1, t8
- 11: ADDL $0xC, t8
- 12: LDL (t8), t10
- 13: PUTL t10, R31
- 14: INCEIPL $4
-
- 0xFE9B60C: 7C6803A6 mtlr r3
- 15: GETL R3, t12
- 16: PUTL t12, LR
- 17: INCEIPL $4
-
- 0xFE9B610: 38210010 addi r1,r1,16
- 18: GETL R1, t14
- 19: ADDL $0x10, t14
- 20: PUTL t14, R1
- 21: INCEIPL $4
-
- 0xFE9B614: 4E800020 blr
- 22: GETL LR, t16
- 23: JMPo-r t16 ($4)
-
-
-. 0 FE9B600 24
-. 80 61 00 14 83 C1 00 08 83 E1 00 0C 7C 68 03 A6 38 21 00 10 4E 80 00 20
-
-==== BB 1469 (0x2547BE48) approx BBs exec'd 0 ====
-
- 0x2547BE48: 2F9D0000 cmpi cr7,r29,0
- 0: GETL R29, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0x2547BE4C: 3BBDFFFF addi r29,r29,-1
- 4: GETL R29, t4
- 5: ADDL $0xFFFFFFFF, t4
- 6: PUTL t4, R29
- 7: INCEIPL $4
-
- 0x2547BE50: 409EFFE8 bc 4,30,0x2547BE38
- 8: Jc30o $0x2547BE38
-
-
-. 0 2547BE48 12
-. 2F 9D 00 00 3B BD FF FF 40 9E FF E8
-
-==== BB 1470 (0x2547BD54) approx BBs exec'd 0 ====
-
- 0x2547BD54: 811C0178 lwz r8,376(r28)
- 0: GETL R28, t0
- 1: ADDL $0x178, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R8
- 4: INCEIPL $4
-
- 0x2547BD58: 3968FFFF addi r11,r8,-1
- 5: GETL R8, t4
- 6: ADDL $0xFFFFFFFF, t4
- 7: PUTL t4, R11
- 8: INCEIPL $4
-
- 0x2547BD5C: 917C0178 stw r11,376(r28)
- 9: GETL R11, t6
- 10: GETL R28, t8
- 11: ADDL $0x178, t8
- 12: STL t6, (t8)
- 13: INCEIPL $4
-
- 0x2547BD60: 3B5A0001 addi r26,r26,1
- 14: GETL R26, t10
- 15: ADDL $0x1, t10
- 16: PUTL t10, R26
- 17: INCEIPL $4
-
- 0x2547BD64: 7F9A9840 cmpl cr7,r26,r19
- 18: GETL R26, t12
- 19: GETL R19, t14
- 20: CMPUL t12, t14, t16 (-rSo)
- 21: ICRFL t16, $0x7, CR
- 22: INCEIPL $4
-
- 0x2547BD68: 419CFFD8 bc 12,28,0x2547BD40
- 23: Js28o $0x2547BD40
-
-
-. 0 2547BD54 24
-. 81 1C 01 78 39 68 FF FF 91 7C 01 78 3B 5A 00 01 7F 9A 98 40 41 9C FF D8
-
-==== BB 1471 (0x2547BD78) approx BBs exec'd 0 ====
-
- 0x2547BD78: 81EE0000 lwz r15,0(r14)
- 0: GETL R14, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R15
- 3: INCEIPL $4
-
- 0x2547BD7C: 71E90080 andi. r9,r15,0x80
- 4: GETL R15, t4
- 5: ANDL $0x80, t4
- 6: PUTL t4, R9
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x0, CR
- 9: INCEIPL $4
-
- 0x2547BD80: 408201AC bc 4,2,0x2547BF2C
- 10: Jc02o $0x2547BF2C
-
-
-. 0 2547BD78 12
-. 81 EE 00 00 71 E9 00 80 40 82 01 AC
-
-==== BB 1472 (0x2547BD84) approx BBs exec'd 0 ====
-
- 0x2547BD84: 81410000 lwz r10,0(r1)
- 0: GETL R1, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R10
- 3: INCEIPL $4
-
- 0x2547BD88: 81CA0004 lwz r14,4(r10)
- 4: GETL R10, t4
- 5: ADDL $0x4, t4
- 6: LDL (t4), t6
- 7: PUTL t6, R14
- 8: INCEIPL $4
-
- 0x2547BD8C: 818AFFB4 lwz r12,-76(r10)
- 9: GETL R10, t8
- 10: ADDL $0xFFFFFFB4, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R12
- 13: INCEIPL $4
-
- 0x2547BD90: 7DC803A6 mtlr r14
- 14: GETL R14, t12
- 15: PUTL t12, LR
- 16: INCEIPL $4
-
- 0x2547BD94: 81EAFFBC lwz r15,-68(r10)
- 17: GETL R10, t14
- 18: ADDL $0xFFFFFFBC, t14
- 19: LDL (t14), t16
- 20: PUTL t16, R15
- 21: INCEIPL $4
-
- 0x2547BD98: 81CAFFB8 lwz r14,-72(r10)
- 22: GETL R10, t18
- 23: ADDL $0xFFFFFFB8, t18
- 24: LDL (t18), t20
- 25: PUTL t20, R14
- 26: INCEIPL $4
-
- 0x2547BD9C: 7D808120 mtcrf 0x8,r12
- 27: GETL R12, t22
- 28: ICRFL t22, $0x4, CR
- 29: INCEIPL $4
-
- 0x2547BDA0: 820AFFC0 lwz r16,-64(r10)
- 30: GETL R10, t24
- 31: ADDL $0xFFFFFFC0, t24
- 32: LDL (t24), t26
- 33: PUTL t26, R16
- 34: INCEIPL $4
-
- 0x2547BDA4: 822AFFC4 lwz r17,-60(r10)
- 35: GETL R10, t28
- 36: ADDL $0xFFFFFFC4, t28
- 37: LDL (t28), t30
- 38: PUTL t30, R17
- 39: INCEIPL $4
-
- 0x2547BDA8: 824AFFC8 lwz r18,-56(r10)
- 40: GETL R10, t32
- 41: ADDL $0xFFFFFFC8, t32
- 42: LDL (t32), t34
- 43: PUTL t34, R18
- 44: INCEIPL $4
-
- 0x2547BDAC: 826AFFCC lwz r19,-52(r10)
- 45: GETL R10, t36
- 46: ADDL $0xFFFFFFCC, t36
- 47: LDL (t36), t38
- 48: PUTL t38, R19
- 49: INCEIPL $4
-
- 0x2547BDB0: 828AFFD0 lwz r20,-48(r10)
- 50: GETL R10, t40
- 51: ADDL $0xFFFFFFD0, t40
- 52: LDL (t40), t42
- 53: PUTL t42, R20
- 54: INCEIPL $4
-
- 0x2547BDB4: 82AAFFD4 lwz r21,-44(r10)
- 55: GETL R10, t44
- 56: ADDL $0xFFFFFFD4, t44
- 57: LDL (t44), t46
- 58: PUTL t46, R21
- 59: INCEIPL $4
-
- 0x2547BDB8: 82CAFFD8 lwz r22,-40(r10)
- 60: GETL R10, t48
- 61: ADDL $0xFFFFFFD8, t48
- 62: LDL (t48), t50
- 63: PUTL t50, R22
- 64: INCEIPL $4
-
- 0x2547BDBC: 82EAFFDC lwz r23,-36(r10)
- 65: GETL R10, t52
- 66: ADDL $0xFFFFFFDC, t52
- 67: LDL (t52), t54
- 68: PUTL t54, R23
- 69: INCEIPL $4
-
- 0x2547BDC0: 830AFFE0 lwz r24,-32(r10)
- 70: GETL R10, t56
- 71: ADDL $0xFFFFFFE0, t56
- 72: LDL (t56), t58
- 73: PUTL t58, R24
- 74: INCEIPL $4
-
- 0x2547BDC4: 832AFFE4 lwz r25,-28(r10)
- 75: GETL R10, t60
- 76: ADDL $0xFFFFFFE4, t60
- 77: LDL (t60), t62
- 78: PUTL t62, R25
- 79: INCEIPL $4
-
- 0x2547BDC8: 834AFFE8 lwz r26,-24(r10)
- 80: GETL R10, t64
- 81: ADDL $0xFFFFFFE8, t64
- 82: LDL (t64), t66
- 83: PUTL t66, R26
- 84: INCEIPL $4
-
- 0x2547BDCC: 836AFFEC lwz r27,-20(r10)
- 85: GETL R10, t68
- 86: ADDL $0xFFFFFFEC, t68
- 87: LDL (t68), t70
- 88: PUTL t70, R27
- 89: INCEIPL $4
-
- 0x2547BDD0: 838AFFF0 lwz r28,-16(r10)
- 90: GETL R10, t72
- 91: ADDL $0xFFFFFFF0, t72
- 92: LDL (t72), t74
- 93: PUTL t74, R28
- 94: INCEIPL $4
-
- 0x2547BDD4: 83AAFFF4 lwz r29,-12(r10)
- 95: GETL R10, t76
- 96: ADDL $0xFFFFFFF4, t76
- 97: LDL (t76), t78
- 98: PUTL t78, R29
- 99: INCEIPL $4
-
- 0x2547BDD8: 83CAFFF8 lwz r30,-8(r10)
- 100: GETL R10, t80
- 101: ADDL $0xFFFFFFF8, t80
- 102: LDL (t80), t82
- 103: PUTL t82, R30
- 104: INCEIPL $4
-
- 0x2547BDDC: 83EAFFFC lwz r31,-4(r10)
- 105: GETL R10, t84
- 106: ADDL $0xFFFFFFFC, t84
- 107: LDL (t84), t86
- 108: PUTL t86, R31
- 109: INCEIPL $4
-
- 0x2547BDE0: 7D415378 or r1,r10,r10
- 110: GETL R10, t88
- 111: PUTL t88, R1
- 112: INCEIPL $4
-
- 0x2547BDE4: 4E800020 blr
- 113: GETL LR, t90
- 114: JMPo-r t90 ($4)
-
-
-. 0 2547BD84 100
-. 81 41 00 00 81 CA 00 04 81 8A FF B4 7D C8 03 A6 81 EA FF BC 81 CA FF B8 7D 80 81 20 82 0A FF C0 82 2A FF C4 82 4A FF C8 82 6A FF CC 82 8A FF D0 82 AA FF D4 82 CA FF D8 82 EA FF DC 83 0A FF E0 83 2A FF E4 83 4A FF E8 83 6A FF EC 83 8A FF F0 83 AA FF F4 83 CA FF F8 83 EA FF FC 7D 41 53 78 4E 80 00 20
-
-==== BB 1473 (0xFEB3C54) approx BBs exec'd 0 ====
-
- 0xFEB3C54: 807F0000 lwz r3,0(r31)
- 0: GETL R31, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R3
- 3: INCEIPL $4
-
- 0xFEB3C58: 80030000 lwz r0,0(r3)
- 4: GETL R3, t4
- 5: LDL (t4), t6
- 6: PUTL t6, R0
- 7: INCEIPL $4
-
- 0xFEB3C5C: 2F000000 cmpi cr6,r0,0
- 8: GETL R0, t8
- 9: CMP0L t8, t10 (-rSo)
- 10: ICRFL t10, $0x6, CR
- 11: INCEIPL $4
-
- 0xFEB3C60: 901F0000 stw r0,0(r31)
- 12: GETL R0, t12
- 13: GETL R31, t14
- 14: STL t12, (t14)
- 15: INCEIPL $4
-
- 0xFEB3C64: 419AFF64 bc 12,26,0xFEB3BC8
- 16: Js26o $0xFEB3BC8
-
-
-. 0 FEB3C54 20
-. 80 7F 00 00 80 03 00 00 2F 00 00 00 90 1F 00 00 41 9A FF 64
-
-==== BB 1474 (0xFEB3BC8) approx BBs exec'd 0 ====
-
- 0xFEB3BC8: 2F800000 cmpi cr7,r0,0
- 0: GETL R0, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x7, CR
- 3: INCEIPL $4
-
- 0xFEB3BCC: 419E00CC bc 12,30,0xFEB3C98
- 4: Js30o $0xFEB3C98
-
-
-. 0 FEB3BC8 8
-. 2F 80 00 00 41 9E 00 CC
-
-==== BB 1475 (0xFEB3C98) approx BBs exec'd 0 ====
-
- 0xFEB3C98: 83FE1BBC lwz r31,7100(r30)
- 0: GETL R30, t0
- 1: ADDL $0x1BBC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R31
- 4: INCEIPL $4
-
- 0xFEB3C9C: 83BE1C38 lwz r29,7224(r30)
- 5: GETL R30, t4
- 6: ADDL $0x1C38, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R29
- 9: INCEIPL $4
-
- 0xFEB3CA0: 7F9FE840 cmpl cr7,r31,r29
- 10: GETL R31, t8
- 11: GETL R29, t10
- 12: CMPUL t8, t10, t12 (-rSo)
- 13: ICRFL t12, $0x7, CR
- 14: INCEIPL $4
-
- 0xFEB3CA4: 409C001C bc 4,28,0xFEB3CC0
- 15: Jc28o $0xFEB3CC0
-
-
-. 0 FEB3C98 16
-. 83 FE 1B BC 83 BE 1C 38 7F 9F E8 40 40 9C 00 1C
-
-==== BB 1476 (0xFEB3CA8) approx BBs exec'd 0 ====
-
- 0xFEB3CA8: 815F0000 lwz r10,0(r31)
- 0: GETL R31, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R10
- 3: INCEIPL $4
-
- 0xFEB3CAC: 3BFF0004 addi r31,r31,4
- 4: GETL R31, t4
- 5: ADDL $0x4, t4
- 6: PUTL t4, R31
- 7: INCEIPL $4
-
- 0xFEB3CB0: 7D4903A6 mtctr r10
- 8: GETL R10, t6
- 9: PUTL t6, CTR
- 10: INCEIPL $4
-
- 0xFEB3CB4: 4E800421 bctrl
- 11: MOVL $0xFEB3CB8, t8
- 12: PUTL t8, LR
- 13: GETL CTR, t10
- 14: JMPo-c t10 ($4)
-
-
-. 0 FEB3CA8 16
-. 81 5F 00 00 3B FF 00 04 7D 49 03 A6 4E 80 04 21
-
-==== BB 1477 _IO_cleanup(0xFEECB0C) approx BBs exec'd 0 ====
-
- 0xFEECB0C: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFEECB10: 7C0802A6 mflr r0
- 6: GETL LR, t4
- 7: PUTL t4, R0
- 8: INCEIPL $4
-
- 0xFEECB14: 480DB33D bl 0xFFC7E50
- 9: MOVL $0xFEECB18, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FEECB0C 12
-. 94 21 FF E0 7C 08 02 A6 48 0D B3 3D
-
-==== BB 1478 (0xFEECB18) approx BBs exec'd 0 ====
-
- 0xFEECB18: 93C10018 stw r30,24(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x18, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFEECB1C: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0xFEECB20: 38600000 li r3,0
- 8: MOVL $0x0, t6
- 9: PUTL t6, R3
- 10: INCEIPL $4
-
- 0xFEECB24: 93810010 stw r28,16(r1)
- 11: GETL R28, t8
- 12: GETL R1, t10
- 13: ADDL $0x10, t10
- 14: STL t8, (t10)
- 15: INCEIPL $4
-
- 0xFEECB28: 93E1001C stw r31,28(r1)
- 16: GETL R31, t12
- 17: GETL R1, t14
- 18: ADDL $0x1C, t14
- 19: STL t12, (t14)
- 20: INCEIPL $4
-
- 0xFEECB2C: 93A10014 stw r29,20(r1)
- 21: GETL R29, t16
- 22: GETL R1, t18
- 23: ADDL $0x14, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0xFEECB30: 90010024 stw r0,36(r1)
- 26: GETL R0, t20
- 27: GETL R1, t22
- 28: ADDL $0x24, t22
- 29: STL t20, (t22)
- 30: INCEIPL $4
-
- 0xFEECB34: 4BFFF98D bl 0xFEEC4C0
- 31: MOVL $0xFEECB38, t24
- 32: PUTL t24, LR
- 33: JMPo-c $0xFEEC4C0 ($4)
-
-
-. 0 FEECB18 32
-. 93 C1 00 18 7F C8 02 A6 38 60 00 00 93 81 00 10 93 E1 00 1C 93 A1 00 14 90 01 00 24 4B FF F9 8D
-
-==== BB 1479 _IO_flush_all_lockp(0xFEEC4C0) approx BBs exec'd 0 ====
-
- 0xFEEC4C0: 9421FFB0 stwu r1,-80(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFB0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFEEC4C4: 7C8802A6 mflr r4
- 6: GETL LR, t4
- 7: PUTL t4, R4
- 8: INCEIPL $4
-
- 0xFEEC4C8: 480DB989 bl 0xFFC7E50
- 9: MOVL $0xFEEC4CC, t6
- 10: PUTL t6, LR
- 11: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FEEC4C0 12
-. 94 21 FF B0 7C 88 02 A6 48 0D B9 89
-
-==== BB 1480 (0xFEEC4CC) approx BBs exec'd 0 ====
-
- 0xFEEC4CC: 93C10048 stw r30,72(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x48, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFEEC4D0: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0xFEEC4D4: 92C10028 stw r22,40(r1)
- 8: GETL R22, t6
- 9: GETL R1, t8
- 10: ADDL $0x28, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0xFEEC4D8: 90810054 stw r4,84(r1)
- 13: GETL R4, t10
- 14: GETL R1, t12
- 15: ADDL $0x54, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0xFEEC4DC: 7D800026 mfcr r12
- 18: GETL CR, t14
- 19: PUTL t14, R12
- 20: INCEIPL $4
-
- 0xFEEC4E0: 92E1002C stw r23,44(r1)
- 21: GETL R23, t16
- 22: GETL R1, t18
- 23: ADDL $0x2C, t18
- 24: STL t16, (t18)
- 25: INCEIPL $4
-
- 0xFEEC4E4: 3AE00000 li r23,0
- 26: MOVL $0x0, t20
- 27: PUTL t20, R23
- 28: INCEIPL $4
-
- 0xFEEC4E8: 82DE1B48 lwz r22,6984(r30)
- 29: GETL R30, t22
- 30: ADDL $0x1B48, t22
- 31: LDL (t22), t24
- 32: PUTL t24, R22
- 33: INCEIPL $4
-
- 0xFEEC4EC: 93E1004C stw r31,76(r1)
- 34: GETL R31, t26
- 35: GETL R1, t28
- 36: ADDL $0x4C, t28
- 37: STL t26, (t28)
- 38: INCEIPL $4
-
- 0xFEEC4F0: 7C7F1B78 or r31,r3,r3
- 39: GETL R3, t30
- 40: PUTL t30, R31
- 41: INCEIPL $4
-
- 0xFEEC4F4: 813600B8 lwz r9,184(r22)
- 42: GETL R22, t32
- 43: ADDL $0xB8, t32
- 44: LDL (t32), t34
- 45: PUTL t34, R9
- 46: INCEIPL $4
-
- 0xFEEC4F8: 93010030 stw r24,48(r1)
- 47: GETL R24, t36
- 48: GETL R1, t38
- 49: ADDL $0x30, t38
- 50: STL t36, (t38)
- 51: INCEIPL $4
-
- 0xFEEC4FC: 3169FFFF addic r11,r9,-1
- 52: GETL R9, t40
- 53: ADCL $0xFFFFFFFF, t40 (-wCa)
- 54: PUTL t40, R11
- 55: INCEIPL $4
-
- 0xFEEC500: 7C0B4910 subfe r0,r11,r9
- 56: GETL R11, t42
- 57: GETL R9, t44
- 58: SBBL t42, t44 (-rCa-wCa)
- 59: PUTL t44, R0
- 60: INCEIPL $4
-
- 0xFEEC504: 93210034 stw r25,52(r1)
- 61: GETL R25, t46
- 62: GETL R1, t48
- 63: ADDL $0x34, t48
- 64: STL t46, (t48)
- 65: INCEIPL $4
-
- 0xFEEC508: 2D800000 cmpi cr3,r0,0
- 66: GETL R0, t50
- 67: CMP0L t50, t52 (-rSo)
- 68: ICRFL t52, $0x3, CR
- 69: INCEIPL $4
-
- 0xFEEC50C: 93410038 stw r26,56(r1)
- 70: GETL R26, t54
- 71: GETL R1, t56
- 72: ADDL $0x38, t56
- 73: STL t54, (t56)
- 74: INCEIPL $4
-
- 0xFEEC510: 9361003C stw r27,60(r1)
- 75: GETL R27, t58
- 76: GETL R1, t60
- 77: ADDL $0x3C, t60
- 78: STL t58, (t60)
- 79: INCEIPL $4
-
- 0xFEEC514: 93810040 stw r28,64(r1)
- 80: GETL R28, t62
- 81: GETL R1, t64
- 82: ADDL $0x40, t64
- 83: STL t62, (t64)
- 84: INCEIPL $4
-
- 0xFEEC518: 93A10044 stw r29,68(r1)
- 85: GETL R29, t66
- 86: GETL R1, t68
- 87: ADDL $0x44, t68
- 88: STL t66, (t68)
- 89: INCEIPL $4
-
- 0xFEEC51C: 91810024 stw r12,36(r1)
- 90: GETL R12, t70
- 91: GETL R1, t72
- 92: ADDL $0x24, t72
- 93: STL t70, (t72)
- 94: INCEIPL $4
-
- 0xFEEC520: 408E0248 bc 4,14,0xFEEC768
- 95: Jc14o $0xFEEC768
-
-
-. 0 FEEC4CC 88
-. 93 C1 00 48 7F C8 02 A6 92 C1 00 28 90 81 00 54 7D 80 00 26 92 E1 00 2C 3A E0 00 00 82 DE 1B 48 93 E1 00 4C 7C 7F 1B 78 81 36 00 B8 93 01 00 30 31 69 FF FF 7C 0B 49 10 93 21 00 34 2D 80 00 00 93 41 00 38 93 61 00 3C 93 81 00 40 93 A1 00 44 91 81 00 24 40 8E 02 48
-
-==== BB 1481 (0xFEEC524) approx BBs exec'd 0 ====
-
- 0xFEEC524: 807E05E4 lwz r3,1508(r30)
- 0: GETL R30, t0
- 1: ADDL $0x5E4, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0xFEEC528: 92E10014 stw r23,20(r1)
- 5: GETL R23, t4
- 6: GETL R1, t6
- 7: ADDL $0x14, t6
- 8: STL t4, (t6)
- 9: INCEIPL $4
-
- 0xFEEC52C: 90610010 stw r3,16(r1)
- 10: GETL R3, t8
- 11: GETL R1, t10
- 12: ADDL $0x10, t10
- 13: STL t8, (t10)
- 14: INCEIPL $4
-
- 0xFEEC530: 2E1F0000 cmpi cr4,r31,0
- 15: GETL R31, t12
- 16: CMP0L t12, t14 (-rSo)
- 17: ICRFL t14, $0x4, CR
- 18: INCEIPL $4
-
- 0xFEEC534: 41920050 bc 12,18,0xFEEC584
- 19: Js18o $0xFEEC584
-
-
-. 0 FEEC524 20
-. 80 7E 05 E4 92 E1 00 14 90 61 00 10 2E 1F 00 00 41 92 00 50
-
-==== BB 1482 (0xFEEC584) approx BBs exec'd 0 ====
-
- 0xFEEC584: 831E1BEC lwz r24,7148(r30)
- 0: GETL R30, t0
- 1: ADDL $0x1BEC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R24
- 4: INCEIPL $4
-
- 0xFEEC588: 833E05EC lwz r25,1516(r30)
- 5: GETL R30, t4
- 6: ADDL $0x5EC, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R25
- 9: INCEIPL $4
-
- 0xFEEC58C: 83F80000 lwz r31,0(r24)
- 10: GETL R24, t8
- 11: LDL (t8), t10
- 12: PUTL t10, R31
- 13: INCEIPL $4
-
- 0xFEEC590: 83990000 lwz r28,0(r25)
- 14: GETL R25, t12
- 15: LDL (t12), t14
- 16: PUTL t14, R28
- 17: INCEIPL $4
-
- 0xFEEC594: 2C9F0000 cmpi cr1,r31,0
- 18: GETL R31, t16
- 19: CMP0L t16, t18 (-rSo)
- 20: ICRFL t18, $0x1, CR
- 21: INCEIPL $4
-
- 0xFEEC598: 41860128 bc 12,6,0xFEEC6C0
- 22: Js06o $0xFEEC6C0
-
-
-. 0 FEEC584 24
-. 83 1E 1B EC 83 3E 05 EC 83 F8 00 00 83 99 00 00 2C 9F 00 00 41 86 01 28
-
-==== BB 1483 (0xFEEC59C) approx BBs exec'd 0 ====
-
- 0xFEEC59C: 835E05E8 lwz r26,1512(r30)
- 0: GETL R30, t0
- 1: ADDL $0x5E8, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R26
- 4: INCEIPL $4
-
- 0xFEEC5A0: 3B600000 li r27,0
- 5: MOVL $0x0, t4
- 6: PUTL t4, R27
- 7: INCEIPL $4
-
- 0xFEEC5A4: 93FA0000 stw r31,0(r26)
- 8: GETL R31, t6
- 9: GETL R26, t8
- 10: STL t6, (t8)
- 11: INCEIPL $4
-
- 0xFEEC5A8: 4192005C bc 12,18,0xFEEC604
- 12: Js18o $0xFEEC604
-
-
-. 0 FEEC59C 16
-. 83 5E 05 E8 3B 60 00 00 93 FA 00 00 41 92 00 5C
-
-==== BB 1484 (0xFEEC604) approx BBs exec'd 0 ====
-
- 0xFEEC604: 807F0060 lwz r3,96(r31)
- 0: GETL R31, t0
- 1: ADDL $0x60, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R3
- 4: INCEIPL $4
-
- 0xFEEC608: 2F030000 cmpi cr6,r3,0
- 5: GETL R3, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x6, CR
- 8: INCEIPL $4
-
- 0xFEEC60C: 40990144 bc 4,25,0xFEEC750
- 9: Jc25o $0xFEEC750
-
-
-. 0 FEEC604 12
-. 80 7F 00 60 2F 03 00 00 40 99 01 44
-
-==== BB 1485 (0xFEEC750) approx BBs exec'd 0 ====
-
- 0xFEEC750: 817F0014 lwz r11,20(r31)
- 0: GETL R31, t0
- 1: ADDL $0x14, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R11
- 4: INCEIPL $4
-
- 0xFEEC754: 813F0010 lwz r9,16(r31)
- 5: GETL R31, t4
- 6: ADDL $0x10, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R9
- 9: INCEIPL $4
-
- 0xFEEC758: 7C8B4840 cmpl cr1,r11,r9
- 10: GETL R11, t8
- 11: GETL R9, t10
- 12: CMPUL t8, t10, t12 (-rSo)
- 13: ICRFL t12, $0x1, CR
- 14: INCEIPL $4
-
- 0xFEEC75C: 40A5FEB4 bc 5,5,0xFEEC610
- 15: Jc05o $0xFEEC610
-
-
-. 0 FEEC750 16
-. 81 7F 00 14 81 3F 00 10 7C 8B 48 40 40 A5 FE B4
-
-==== BB 1486 (0xFEEC610) approx BBs exec'd 0 ====
-
- 0xFEEC610: 895F0046 lbz r10,70(r31)
- 0: GETL R31, t0
- 1: ADDL $0x46, t0
- 2: LDB (t0), t2
- 3: PUTL t2, R10
- 4: INCEIPL $4
-
- 0xFEEC614: 2C0A0000 cmpi cr0,r10,0
- 5: GETL R10, t4
- 6: CMP0L t4, t6 (-rSo)
- 7: ICRFL t6, $0x0, CR
- 8: INCEIPL $4
-
- 0xFEEC618: 40820044 bc 4,2,0xFEEC65C
- 9: Jc02o $0xFEEC65C
-
-
-. 0 FEEC610 12
-. 89 5F 00 46 2C 0A 00 00 40 82 00 44
-
-==== BB 1487 (0xFEEC61C) approx BBs exec'd 0 ====
-
- 0xFEEC61C: 40990040 bc 4,25,0xFEEC65C
- 0: Jc25o $0xFEEC65C
-
-
-. 0 FEEC61C 4
-. 40 99 00 40
-
-==== BB 1488 (0xFEEC65C) approx BBs exec'd 0 ====
-
- 0xFEEC65C: 41920044 bc 12,18,0xFEEC6A0
- 0: Js18o $0xFEEC6A0
-
-
-. 0 FEEC65C 4
-. 41 92 00 44
-
-==== BB 1489 (0xFEEC6A0) approx BBs exec'd 0 ====
-
- 0xFEEC6A0: 80190000 lwz r0,0(r25)
- 0: GETL R25, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0xFEEC6A4: 937A0000 stw r27,0(r26)
- 4: GETL R27, t4
- 5: GETL R26, t6
- 6: STL t4, (t6)
- 7: INCEIPL $4
-
- 0xFEEC6A8: 7F9C0000 cmp cr7,r28,r0
- 8: GETL R28, t8
- 9: GETL R0, t10
- 10: CMPL t8, t10, t12 (-rSo)
- 11: ICRFL t12, $0x7, CR
- 12: INCEIPL $4
-
- 0xFEEC6AC: 419E009C bc 12,30,0xFEEC748
- 13: Js30o $0xFEEC748
-
-
-. 0 FEEC6A0 16
-. 80 19 00 00 93 7A 00 00 7F 9C 00 00 41 9E 00 9C
-
-==== BB 1490 (0xFEEC748) approx BBs exec'd 0 ====
-
- 0xFEEC748: 83FF0034 lwz r31,52(r31)
- 0: GETL R31, t0
- 1: ADDL $0x34, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R31
- 4: INCEIPL $4
-
- 0xFEEC74C: 4BFFFF6C b 0xFEEC6B8
- 5: JMPo $0xFEEC6B8 ($4)
-
-
-. 0 FEEC748 8
-. 83 FF 00 34 4B FF FF 6C
-
-==== BB 1491 (0xFEEC6B8) approx BBs exec'd 0 ====
-
- 0xFEEC6B8: 2C1F0000 cmpi cr0,r31,0
- 0: GETL R31, t0
- 1: CMP0L t0, t2 (-rSo)
- 2: ICRFL t2, $0x0, CR
- 3: INCEIPL $4
-
- 0xFEEC6BC: 4082FEE8 bc 4,2,0xFEEC5A4
- 4: Jc02o $0xFEEC5A4
-
-
-. 0 FEEC6B8 8
-. 2C 1F 00 00 40 82 FE E8
-
-==== BB 1492 (0xFEEC5A4) approx BBs exec'd 0 ====
-
- 0xFEEC5A4: 93FA0000 stw r31,0(r26)
- 0: GETL R31, t0
- 1: GETL R26, t2
- 2: STL t0, (t2)
- 3: INCEIPL $4
-
- 0xFEEC5A8: 4192005C bc 12,18,0xFEEC604
- 4: Js18o $0xFEEC604
-
-
-. 0 FEEC5A4 8
-. 93 FA 00 00 41 92 00 5C
-
-==== BB 1493 (0xFEEC6C0) approx BBs exec'd 0 ====
-
- 0xFEEC6C0: 41920038 bc 12,18,0xFEEC6F8
- 0: Js18o $0xFEEC6F8
-
-
-. 0 FEEC6C0 4
-. 41 92 00 38
-
-==== BB 1494 (0xFEEC6F8) approx BBs exec'd 0 ====
-
- 0xFEEC6F8: 408E0088 bc 4,14,0xFEEC780
- 0: Jc14o $0xFEEC780
-
-
-. 0 FEEC6F8 4
-. 40 8E 00 88
-
-==== BB 1495 (0xFEEC6FC) approx BBs exec'd 0 ====
-
- 0xFEEC6FC: 7EE3BB78 or r3,r23,r23
- 0: GETL R23, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0xFEEC700: 81810024 lwz r12,36(r1)
- 3: GETL R1, t2
- 4: ADDL $0x24, t2
- 5: LDL (t2), t4
- 6: PUTL t4, R12
- 7: INCEIPL $4
-
- 0xFEEC704: 82E10054 lwz r23,84(r1)
- 8: GETL R1, t6
- 9: ADDL $0x54, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R23
- 12: INCEIPL $4
-
- 0xFEEC708: 82C10028 lwz r22,40(r1)
- 13: GETL R1, t10
- 14: ADDL $0x28, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R22
- 17: INCEIPL $4
-
- 0xFEEC70C: 7D818120 mtcrf 0x18,r12
- 18: GETL R12, t14
- 19: ICRFL t14, $0x3, CR
- 20: ICRFL t14, $0x4, CR
- 21: INCEIPL $4
-
- 0xFEEC710: 7EE803A6 mtlr r23
- 22: GETL R23, t16
- 23: PUTL t16, LR
- 24: INCEIPL $4
-
- 0xFEEC714: 83010030 lwz r24,48(r1)
- 25: GETL R1, t18
- 26: ADDL $0x30, t18
- 27: LDL (t18), t20
- 28: PUTL t20, R24
- 29: INCEIPL $4
-
- 0xFEEC718: 82E1002C lwz r23,44(r1)
- 30: GETL R1, t22
- 31: ADDL $0x2C, t22
- 32: LDL (t22), t24
- 33: PUTL t24, R23
- 34: INCEIPL $4
-
- 0xFEEC71C: 83210034 lwz r25,52(r1)
- 35: GETL R1, t26
- 36: ADDL $0x34, t26
- 37: LDL (t26), t28
- 38: PUTL t28, R25
- 39: INCEIPL $4
-
- 0xFEEC720: 83410038 lwz r26,56(r1)
- 40: GETL R1, t30
- 41: ADDL $0x38, t30
- 42: LDL (t30), t32
- 43: PUTL t32, R26
- 44: INCEIPL $4
-
- 0xFEEC724: 8361003C lwz r27,60(r1)
- 45: GETL R1, t34
- 46: ADDL $0x3C, t34
- 47: LDL (t34), t36
- 48: PUTL t36, R27
- 49: INCEIPL $4
-
- 0xFEEC728: 83810040 lwz r28,64(r1)
- 50: GETL R1, t38
- 51: ADDL $0x40, t38
- 52: LDL (t38), t40
- 53: PUTL t40, R28
- 54: INCEIPL $4
-
- 0xFEEC72C: 83A10044 lwz r29,68(r1)
- 55: GETL R1, t42
- 56: ADDL $0x44, t42
- 57: LDL (t42), t44
- 58: PUTL t44, R29
- 59: INCEIPL $4
-
- 0xFEEC730: 83C10048 lwz r30,72(r1)
- 60: GETL R1, t46
- 61: ADDL $0x48, t46
- 62: LDL (t46), t48
- 63: PUTL t48, R30
- 64: INCEIPL $4
-
- 0xFEEC734: 83E1004C lwz r31,76(r1)
- 65: GETL R1, t50
- 66: ADDL $0x4C, t50
- 67: LDL (t50), t52
- 68: PUTL t52, R31
- 69: INCEIPL $4
-
- 0xFEEC738: 38210050 addi r1,r1,80
- 70: GETL R1, t54
- 71: ADDL $0x50, t54
- 72: PUTL t54, R1
- 73: INCEIPL $4
-
- 0xFEEC73C: 4E800020 blr
- 74: GETL LR, t56
- 75: JMPo-r t56 ($4)
-
-
-. 0 FEEC6FC 68
-. 7E E3 BB 78 81 81 00 24 82 E1 00 54 82 C1 00 28 7D 81 81 20 7E E8 03 A6 83 01 00 30 82 E1 00 2C 83 21 00 34 83 41 00 38 83 61 00 3C 83 81 00 40 83 A1 00 44 83 C1 00 48 83 E1 00 4C 38 21 00 50 4E 80 00 20
-
-==== BB 1496 (0xFEECB38) approx BBs exec'd 0 ====
-
- 0xFEECB38: 813E1BEC lwz r9,7148(r30)
- 0: GETL R30, t0
- 1: ADDL $0x1BEC, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R9
- 4: INCEIPL $4
-
- 0xFEECB3C: 7C7C1B78 or r28,r3,r3
- 5: GETL R3, t4
- 6: PUTL t4, R28
- 7: INCEIPL $4
-
- 0xFEECB40: 83E90000 lwz r31,0(r9)
- 8: GETL R9, t6
- 9: LDL (t6), t8
- 10: PUTL t8, R31
- 11: INCEIPL $4
-
- 0xFEECB44: 2F9F0000 cmpi cr7,r31,0
- 12: GETL R31, t10
- 13: CMP0L t10, t12 (-rSo)
- 14: ICRFL t12, $0x7, CR
- 15: INCEIPL $4
-
- 0xFEECB48: 419E0080 bc 12,30,0xFEECBC8
- 16: Js30o $0xFEECBC8
-
-
-. 0 FEECB38 20
-. 81 3E 1B EC 7C 7C 1B 78 83 E9 00 00 2F 9F 00 00 41 9E 00 80
-
-==== BB 1497 (0xFEECB4C) approx BBs exec'd 0 ====
-
- 0xFEECB4C: 3BA0FFFF li r29,-1
- 0: MOVL $0xFFFFFFFF, t0
- 1: PUTL t0, R29
- 2: INCEIPL $4
-
- 0xFEECB50: 48000014 b 0xFEECB64
- 3: JMPo $0xFEECB64 ($4)
-
-
-. 0 FEECB4C 8
-. 3B A0 FF FF 48 00 00 14
-
-==== BB 1498 (0xFEECB64) approx BBs exec'd 0 ====
-
- 0xFEECB64: 801F0000 lwz r0,0(r31)
- 0: GETL R31, t0
- 1: LDL (t0), t2
- 2: PUTL t2, R0
- 3: INCEIPL $4
-
- 0xFEECB68: 70090002 andi. r9,r0,0x2
- 4: GETL R0, t4
- 5: ANDL $0x2, t4
- 6: PUTL t4, R9
- 7: CMP0L t4, t6 (-rSo)
- 8: ICRFL t6, $0x0, CR
- 9: INCEIPL $4
-
- 0xFEECB6C: 5403EFFE rlwinm r3,r0,29,31,31
- 10: GETL R0, t8
- 11: ROLL $0x1D, t8
- 12: ANDL $0x1, t8
- 13: PUTL t8, R3
- 14: INCEIPL $4
-
- 0xFEECB70: 2F830000 cmpi cr7,r3,0
- 15: GETL R3, t10
- 16: CMP0L t10, t12 (-rSo)
- 17: ICRFL t12, $0x7, CR
- 18: INCEIPL $4
-
- 0xFEECB74: 40A2FFE0 bc 5,2,0xFEECB54
- 19: Jc02o $0xFEECB54
-
-
-. 0 FEECB64 20
-. 80 1F 00 00 70 09 00 02 54 03 EF FE 2F 83 00 00 40 A2 FF E0
-
-==== BB 1499 (0xFEECB54) approx BBs exec'd 0 ====
-
- 0xFEECB54: 93BF0060 stw r29,96(r31)
- 0: GETL R29, t0
- 1: GETL R31, t2
- 2: ADDL $0x60, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFEECB58: 83FF0034 lwz r31,52(r31)
- 5: GETL R31, t4
- 6: ADDL $0x34, t4
- 7: LDL (t4), t6
- 8: PUTL t6, R31
- 9: INCEIPL $4
-
- 0xFEECB5C: 2F1F0000 cmpi cr6,r31,0
- 10: GETL R31, t8
- 11: CMP0L t8, t10 (-rSo)
- 12: ICRFL t10, $0x6, CR
- 13: INCEIPL $4
-
- 0xFEECB60: 419A0068 bc 12,26,0xFEECBC8
- 14: Js26o $0xFEECBC8
-
-
-. 0 FEECB54 16
-. 93 BF 00 60 83 FF 00 34 2F 1F 00 00 41 9A 00 68
-
-==== BB 1500 (0xFEECB78) approx BBs exec'd 0 ====
-
- 0xFEECB78: 70091000 andi. r9,r0,0x1000
- 0: GETL R0, t0
- 1: ANDL $0x1000, t0
- 2: PUTL t0, R9
- 3: CMP0L t0, t2 (-rSo)
- 4: ICRFL t2, $0x0, CR
- 5: INCEIPL $4
-
- 0xFEECB7C: 419E0008 bc 12,30,0xFEECB84
- 6: Js30o $0xFEECB84
-
-
-. 0 FEECB78 8
-. 70 09 10 00 41 9E 00 08
-
-==== BB 1501 (0xFEECB84) approx BBs exec'd 0 ====
-
- 0xFEECB84: 80DF0060 lwz r6,96(r31)
- 0: GETL R31, t0
- 1: ADDL $0x60, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R6
- 4: INCEIPL $4
-
- 0xFEECB88: 7FE3FB78 or r3,r31,r31
- 5: GETL R31, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0xFEECB8C: 38800000 li r4,0
- 8: MOVL $0x0, t6
- 9: PUTL t6, R4
- 10: INCEIPL $4
-
- 0xFEECB90: 38A00000 li r5,0
- 11: MOVL $0x0, t8
- 12: PUTL t8, R5
- 13: INCEIPL $4
-
- 0xFEECB94: 2C860000 cmpi cr1,r6,0
- 14: GETL R6, t10
- 15: CMP0L t10, t12 (-rSo)
- 16: ICRFL t12, $0x1, CR
- 17: INCEIPL $4
-
- 0xFEECB98: 4186FFBC bc 12,6,0xFEECB54
- 18: Js06o $0xFEECB54
-
-
-. 0 FEECB84 24
-. 80 DF 00 60 7F E3 FB 78 38 80 00 00 38 A0 00 00 2C 86 00 00 41 86 FF BC
-
-==== BB 1502 (0xFEECB80) approx BBs exec'd 0 ====
-
- 0xFEECB80: 41A2FFD4 bc 13,2,0xFEECB54
- 0: Js02o $0xFEECB54
-
-
-. 0 FEECB80 4
-. 41 A2 FF D4
-
-==== BB 1503 (0xFEECBC8) approx BBs exec'd 0 ====
-
- 0xFEECBC8: 80810024 lwz r4,36(r1)
- 0: GETL R1, t0
- 1: ADDL $0x24, t0
- 2: LDL (t0), t2
- 3: PUTL t2, R4
- 4: INCEIPL $4
-
- 0xFEECBCC: 7F83E378 or r3,r28,r28
- 5: GETL R28, t4
- 6: PUTL t4, R3
- 7: INCEIPL $4
-
- 0xFEECBD0: 83A10014 lwz r29,20(r1)
- 8: GETL R1, t6
- 9: ADDL $0x14, t6
- 10: LDL (t6), t8
- 11: PUTL t8, R29
- 12: INCEIPL $4
-
- 0xFEECBD4: 83810010 lwz r28,16(r1)
- 13: GETL R1, t10
- 14: ADDL $0x10, t10
- 15: LDL (t10), t12
- 16: PUTL t12, R28
- 17: INCEIPL $4
-
- 0xFEECBD8: 7C8803A6 mtlr r4
- 18: GETL R4, t14
- 19: PUTL t14, LR
- 20: INCEIPL $4
-
- 0xFEECBDC: 83C10018 lwz r30,24(r1)
- 21: GETL R1, t16
- 22: ADDL $0x18, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R30
- 25: INCEIPL $4
-
- 0xFEECBE0: 83E1001C lwz r31,28(r1)
- 26: GETL R1, t20
- 27: ADDL $0x1C, t20
- 28: LDL (t20), t22
- 29: PUTL t22, R31
- 30: INCEIPL $4
-
- 0xFEECBE4: 38210020 addi r1,r1,32
- 31: GETL R1, t24
- 32: ADDL $0x20, t24
- 33: PUTL t24, R1
- 34: INCEIPL $4
-
- 0xFEECBE8: 4E800020 blr
- 35: GETL LR, t26
- 36: JMPo-r t26 ($4)
-
-
-. 0 FEECBC8 36
-. 80 81 00 24 7F 83 E3 78 83 A1 00 14 83 81 00 10 7C 88 03 A6 83 C1 00 18 83 E1 00 1C 38 21 00 20 4E 80 00 20
-
-==== BB 1504 (0xFEB3CB8) approx BBs exec'd 0 ====
-
- 0xFEB3CB8: 7F9FE840 cmpl cr7,r31,r29
- 0: GETL R31, t0
- 1: GETL R29, t2
- 2: CMPUL t0, t2, t4 (-rSo)
- 3: ICRFL t4, $0x7, CR
- 4: INCEIPL $4
-
- 0xFEB3CBC: 419CFFEC bc 12,28,0xFEB3CA8
- 5: Js28o $0xFEB3CA8
-
-
-. 0 FEB3CB8 8
-. 7F 9F E8 40 41 9C FF EC
-
-==== BB 1505 (0xFEB3CC0) approx BBs exec'd 0 ====
-
- 0xFEB3CC0: 7F83E378 or r3,r28,r28
- 0: GETL R28, t0
- 1: PUTL t0, R3
- 2: INCEIPL $4
-
- 0xFEB3CC4: 48062141 bl 0xFF15E04
- 3: MOVL $0xFEB3CC8, t2
- 4: PUTL t2, LR
- 5: JMPo-c $0xFF15E04 ($4)
-
-
-. 0 FEB3CC0 8
-. 7F 83 E3 78 48 06 21 41
-
-==== BB 1506 __GI__exit(0xFF15E04) approx BBs exec'd 0 ====
-
- 0xFF15E04: 9421FFE0 stwu r1,-32(r1)
- 0: GETL R1, t0
- 1: GETL R1, t2
- 2: ADDL $0xFFFFFFE0, t2
- 3: PUTL t2, R1
- 4: STL t0, (t2)
- 5: INCEIPL $4
-
- 0xFF15E08: 480B2049 bl 0xFFC7E50
- 6: MOVL $0xFF15E0C, t4
- 7: PUTL t4, LR
- 8: JMPo-c $0xFFC7E50 ($4)
-
-
-. 0 FF15E04 8
-. 94 21 FF E0 48 0B 20 49
-
-==== BB 1507 (0xFF15E0C) approx BBs exec'd 0 ====
-
- 0xFF15E0C: 93C10018 stw r30,24(r1)
- 0: GETL R30, t0
- 1: GETL R1, t2
- 2: ADDL $0x18, t2
- 3: STL t0, (t2)
- 4: INCEIPL $4
-
- 0xFF15E10: 7FC802A6 mflr r30
- 5: GETL LR, t4
- 6: PUTL t4, R30
- 7: INCEIPL $4
-
- 0xFF15E14: 93A10014 stw r29,20(r1)
- 8: GETL R29, t6
- 9: GETL R1, t8
- 10: ADDL $0x14, t8
- 11: STL t6, (t8)
- 12: INCEIPL $4
-
- 0xFF15E18: 93E1001C stw r31,28(r1)
- 13: GETL R31, t10
- 14: GETL R1, t12
- 15: ADDL $0x1C, t12
- 16: STL t10, (t12)
- 17: INCEIPL $4
-
- 0xFF15E1C: 7C7F1B78 or r31,r3,r3
- 18: GETL R3, t14
- 19: PUTL t14, R31
- 20: INCEIPL $4
-
- 0xFF15E20: 813E1C4C lwz r9,7244(r30)
- 21: GETL R30, t16
- 22: ADDL $0x1C4C, t16
- 23: LDL (t16), t18
- 24: PUTL t18, R9
- 25: INCEIPL $4
-
- 0xFF15E24: 7FA91214 add r29,r9,r2
- 26: GETL R9, t20
- 27: GETL R2, t22
- 28: ADDL t20, t22
- 29: PUTL t22, R29
- 30: INCEIPL $4
-
- 0xFF15E28: 380000EA li r0,234
- 31: MOVL $0xEA, t24
- 32: PUTL t24, R0
- 33: INCEIPL $4
-
- 0xFF15E2C: 7FE3FB78 or r3,r31,r31
- 34: GETL R31, t26
- 35: PUTL t26, R3
- 36: INCEIPL $4
-
- 0xFF15E30: 44000002 sc
- 37: JMPo-sys $0xFF15E34 ($4)
-
-
-. 0 FF15E0C 40
-. 93 C1 00 18 7F C8 02 A6 93 A1 00 14 93 E1 00 1C 7C 7F 1B 78 81 3E 1C 4C 7F A9 12 14 38 00 00 EA 7F E3 FB 78 44 00 00 02
-
10
dir
-2062
+2064
svn://svn.valgrind.org/vex/trunk/orig_x86
svn://svn.valgrind.org/vex
-2010-10-07T07:09:18.083432Z
+2010-10-08T04:47:04.547060Z
6bd7394da213b03e0bc620b3732436ae
2004-12-05T23:53:22.211260Z
623
-2010-10-07T07:09:18.083432Z
+2010-10-08T04:47:04.607050Z
961d44da4508f62e92ea3fda4a0f4ff3
2004-12-06T00:00:04.806293Z
625
-2010-10-07T07:09:18.083432Z
+2010-10-08T04:47:04.619048Z
46e23ac9644199a8204d1aea16fa4303
2004-12-05T23:54:32.793817Z
624
+++ /dev/null
-==13306== valgrind-1.0.4, a memory error detector for x86 GNU/Linux.
-==13306== Copyright (C) 2000-2002, and GNU GPL'd, by Julian Seward.
-==13306== Startup, with flags:
-==13306== --suppressions=/home/sewardj/trunk/hacked104/Inst/lib/valgrind/default.supp
-==13306== -v
-==13306== Estimated CPU clock rate is 1000 MHz
-==13306==
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-vex iropt: 4 x unrolling (22 sts -> 88 sts)
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-***** EXPENSIVE 504 9
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-vex iropt: not unrolling (63 sts)
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-***** EXPENSIVE 517 15
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-***** EXPENSIVE 518 16
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-***** EXPENSIVE 530 22
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-***** EXPENSIVE 585 34
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-***** EXPENSIVE 618 40
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-vex iropt: 8 x unrolling (15 sts -> 120 sts)
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-***** EXPENSIVE 633 44
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-vex iropt: 2 x unrolling (59 sts -> 118 sts)
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-vex iropt: 8 x unrolling (15 sts -> 120 sts)
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-vex iropt: 2 x unrolling (34 sts -> 68 sts)
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-vex iropt: 2 x unrolling (34 sts -> 68 sts)
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-vex iropt: 2 x unrolling (49 sts -> 98 sts)
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-. 8D 04 3F 89 45 B8 8D 14 0F 8B 45 0C 0F AF C1 0F AF 55 0C C1 E2 04 C1 E0 04 DD 04 16 DD 04 06 01 F2 D8 E1 01 F0 DD 1A DD 42 08 DD 40 08 D8 E1 DD 5A 08 D9 C9 03 4D B8 DC 00 D9 C9 DC 40 08 D9 C9 3B 4D 10 DD 18 DD 58 08 72 BC
-
-. 735 804FF3C 16
-. C7 45 BC 01 00 00 00 39 7D BC 0F 83 D3 00 00 00
-***** EXPENSIVE 737 66
-
-. 736 805001F 4
-. DD D8 EB DB
-
-. 737 804FFFE 17
-. FF 45 E0 8B 45 E4 D1 E7 39 45 E0 0F 82 8D FE FF FF
-
-. 738 805000F 10
-. 31 C0 8D 65 F4 5B 5E 5F C9 C3
-vex iropt: 2 x unrolling (49 sts -> 98 sts)
-
-. 739 8049364 50
-. 8B 75 EC 8B 04 0E 8B 54 0E 04 8B 75 E0 89 04 0E 89 54 0E 04 8B 75 EC 8B 44 0E 08 8B 54 0E 0C 43 8B 75 E0 89 44 0E 08 89 54 0E 0C 03 4D DC 39 FB 72 CE
-***** EXPENSIVE 741 67
-
-. 740 804884F 10
-. DD DA 46 01 D3 3B 75 1C 72 C7
-***** EXPENSIVE 742 68
-vex iropt: 2 x unrolling (39 sts -> 78 sts)
-
-. 741 804FDFC 26
-. DD 04 06 D8 C9 DD 1C 06 DD 44 06 08 D8 C9 42 DD 5C 06 08 01 C8 3B 55 10 72 E6
-***** EXPENSIVE 743 69
-vex iropt: 2 x unrolling (40 sts -> 80 sts)
-
-. 742 804944C 28
-. 8B 4D E8 DD 04 01 D8 C9 DD 1C 01 DD 44 01 08 D8 C9 43 DD 5C 01 08 01 D0 39 FB 72 E4
-vex iropt: 4 x unrolling (26 sts -> 104 sts)
-
-. 743 804B9A8 38
-. 43 C7 04 01 00 00 00 00 C7 44 01 04 00 00 00 00 C7 44 01 08 00 00 00 00 C7 44 01 0C 00 00 00 00 01 D0 39 FB 72 DA
-***** EXPENSIVE 745 70
-
-. 744 804BA0C 38
-. 89 F0 31 D2 F7 F7 89 D0 31 D2 52 50 DF 2C 24 DC 0D E0 06 06 08 83 EC 08 DC 75 E0 DD 14 24 DD 5D C8 E8 EE CB FF FF
-***** EXPENSIVE 746 71
-vex iropt: 2 x unrolling (32 sts -> 64 sts)
-
-. 745 804BAD4 18
-. D9 C9 40 DD 14 0E D9 C9 DD 54 0E 08 01 D1 39 D8 72 EE
-vex iropt: 4 x unrolling (26 sts -> 104 sts)
-
-. 746 804BAF4 38
-. 40 C7 04 0F 00 00 00 00 C7 44 0F 04 00 00 00 00 C7 44 0F 08 00 00 00 00 C7 44 0F 0C 00 00 00 00 01 D1 39 D8 72 DA
-***** EXPENSIVE 748 72
-
-. 747 804BB8C 39
-. 89 F0 31 D2 F7 75 0C 89 D0 31 D2 52 50 DF 2C 24 DC 0D E8 06 06 08 83 EC 08 DC 75 E0 DD 14 24 DD 5D C8 E8 6D CA FF FF
-vex iropt: 4 x unrolling (30 sts -> 120 sts)
-
-. 748 804BC0C 42
-. 8B 4D 28 43 C7 04 01 00 00 00 00 C7 44 01 04 00 00 00 00 C7 44 01 08 00 00 00 00 C7 44 01 0C 00 00 00 00 01 D0 3B 5D 0C 72 D6
-***** EXPENSIVE 750 73
-
-. 749 804BC3D 62
-. 8B 45 08 31 D2 F7 75 0C 8B 4D 10 0F AF CA 31 D2 52 8B 45 0C 50 DF 2C 24 DD 45 14 8B 45 28 C1 E1 04 D8 C9 D9 C9 DC 4D 1C D9 C9 DD 1C 08 DD 5C 08 08 83 C4 08 31 C0 8D 65 F4 5B 5E 5F C9 C3
-
-. 750 80499CB 17
-. BA 01 00 00 00 47 89 D0 89 F9 D3 E0 39 45 EC 77 F4
-
-. 751 80499FE 18
-. 89 F6 89 D0 D1 E1 83 E0 01 43 09 C1 D1 EA 39 FB 72 F0
-
-. 752 80499F4 10
-. 31 C9 31 DB 39 F9 89 F2 73 12
-
-. 753 8048B2D 17
-. C7 45 E4 00 00 00 00 8B 7D 10 D1 EF 39 75 EC 73 18
-
-. 754 8048B56 4
-. 39 F7 77 0A
-
-. 755 8048B64 19
-. 8B 45 0C FF 45 EC 8B 55 E8 01 FE 01 45 E4 39 55 EC 72 BD
-***** EXPENSIVE 757 74
-
-. 756 8048974 31
-. 8B 45 0C 8B 55 14 DD 04 C8 DD 04 CA DE E1 D9 E1 D8 C9 DD E2 DF E0 F6 C4 45 0F 85 E1 00 00 00
-
-. 757 804BF74 5
-. E8 D3 F9 FF FF
-vex iropt: 2 x unrolling (37 sts -> 74 sts)
-
-. 758 8049BA0 34
-. 89 D8 C1 E0 04 8B 75 E4 8B 54 06 04 41 8B 04 06 8B 75 E8 89 04 DE 89 54 DE 04 03 5D F0 3B 4D EC 72 DE
-
-. 759 805A976 9
-. 83 EC 0C 56 E8 49 24 FF FF
-
-. 760 805A97F 13
-. 89 45 E4 83 C4 10 40 0F 84 81 02 00 00
-
-. 761 805A98C 15
-. FF 75 E4 56 FF 75 0C FF 75 08 E8 9D 20 FF FF
-
-. 762 804CA38 28
-. 55 89 E5 57 56 83 EC 0C 8B 45 10 48 31 F6 39 C6 C7 45 F4 00 00 00 00 89 45 F0 73 4F
-
-. 763 804CA54 18
-. C7 45 EC 00 00 00 00 90 8B 7D 10 D1 EF 39 75 F4 73 1B
-
-. 764 804CA81 4
-. 39 F7 77 0B
-
-. 765 804CA90 19
-. 8B 55 0C FF 45 F4 8B 4D F0 01 FE 01 55 EC 39 4D F4 72 B9
-
-. 766 804CAA3 9
-. 83 C4 0C 5E 31 C0 5F C9 C3
-
-. 767 805A99B 32
-. C7 45 D4 01 00 00 00 8B 45 E4 83 C4 10 39 45 D4 C7 45 E0 01 00 00 00 89 75 D8 0F 87 48 02 00 00
-
-. 768 805A9BB 39
-. 8B 55 E0 8B 75 D8 D1 EE 89 D1 C7 45 CC 00 00 00 00 D1 E1 39 75 CC 89 55 DC 89 4D C8 89 4D E0 89 75 C4 89 75 D8 73 39
-***** EXPENSIVE 770 75
-
-. 769 805A9E2 57
-. 31 C9 8B 75 DC 8B 55 0C 0F AF D1 8D 04 0E 8B 75 08 0F AF 45 0C DD 04 D6 DD 04 C6 D9 C1 D8 C1 D9 CA DE E1 D9 C9 DD 1C D6 FF 45 CC DD 1C C6 8B 45 C4 03 4D C8 39 45 CC 72 C9
-***** EXPENSIVE 771 76
-
-. 770 805AA1B 53
-. 31 D2 52 8B 45 C8 50 DD 83 44 F6 FF FF DD 5D B0 DF 2C 24 DC BB CC F5 FF FF 83 EC 08 DD 83 34 F6 FF FF D9 C9 DD 14 24 DD 9D 78 FF FF FF DD 5D B8 E8 E0 DC FE FF
-***** EXPENSIVE 772 77
-
-. 771 805AA50 23
-. DD 85 78 FF FF FF DC 8B BC F8 FF FF DD 1C 24 DD 5D A8 E8 C9 DC FE FF
-***** EXPENSIVE 773 78
-
-. 772 805AA67 33
-. D9 C0 8B 45 DC D8 C1 C7 45 D0 01 00 00 00 D1 E8 DE C9 83 C4 10 39 45 D0 DD 5D A0 0F 83 27 01 00 00
-
-. 773 805ABAF 6
-. 83 7D DC 01 76 3F
-
-. 774 805ABF4 15
-. FF 45 D4 8B 45 E4 39 45 D4 0F 86 B8 FD FF FF
-
-. 775 805AC03 10
-. 31 C0 8D 65 F4 5B 5E 5F C9 C3
-
-. 776 8055DC5 50
-. 8B 45 10 0F AF 45 F0 8B 75 08 89 C1 8B 54 C6 04 C1 E1 04 8B 04 C6 8B 75 0C 89 04 0E 89 54 0E 04 C7 44 0E 08 00 00 00 00 C7 44 0E 0C 00 00 00 00 EB C4
-
-. 777 8055904 11
-. 83 EC 0C FF 75 10 E8 B9 74 FF FF
-
-. 778 805590F 13
-. 89 45 E4 83 C4 10 40 0F 84 93 02 00 00
-
-. 779 805591C 39
-. 8B 45 10 89 C2 C7 45 D4 01 00 00 00 8B 75 E4 D1 EA 39 75 D4 89 45 E0 C7 45 D8 01 00 00 00 89 55 DC 0F 87 48 02 00 00
-
-. 780 8055943 15
-. C7 45 CC 00 00 00 00 8B 7D D8 39 7D CC 73 3C
-***** EXPENSIVE 782 79
-
-. 781 8055952 60
-. 31 C9 8B 55 0C 0F AF D1 8B 45 08 8B 75 DC DD 04 D0 8D 04 0E 0F AF 45 0C 8B 7D 08 DD 04 C7 D9 C1 D8 C1 D9 CA DE E1 D9 C9 DD 1C D7 FF 45 CC DD 1C C7 8B 45 D8 03 4D E0 39 45 CC 72 C6
-***** EXPENSIVE 783 80
-
-. 782 805598E 50
-. 31 D2 52 8B 45 E0 50 DD 83 44 F6 FF FF DD 5D B8 DF 2C 24 DC BB D4 F5 FF FF 83 EC 08 DD 83 34 F6 FF FF D9 C9 DD 14 24 DD 5D 88 DD 5D C0 E8 70 2D FF FF
-***** EXPENSIVE 784 81
-
-. 783 80559C0 20
-. DD 45 88 DC 8B BC F8 FF FF DD 1C 24 DD 5D B0 E8 5C 2D FF FF
-***** EXPENSIVE 785 82
-
-. 784 80559D4 33
-. D9 C0 8B 45 DC D8 C1 C7 45 D0 01 00 00 00 D1 E8 DE C9 83 C4 10 39 45 D0 DD 5D A8 0F 83 24 01 00 00
-
-. 785 8055B19 6
-. 83 7D DC 01 76 54
-
-. 786 8055B73 24
-. FF 45 D4 8B 55 E4 D1 6D DC D1 6D E0 D1 65 D8 39 55 D4 0F 86 B8 FD FF FF
-
-. 787 8055B8B 17
-. FF 75 E4 FF 75 10 FF 75 0C FF 75 08 E8 9C 6E FF FF
-
-. 788 8055B9C 10
-. 31 C0 8D 65 F4 5B 5E 5F C9 C3
-***** EXPENSIVE 790 83
-vex iropt: 2 x unrolling (36 sts -> 72 sts)
-
-. 789 8049C48 20
-. 8B 55 E8 DD 04 C2 D8 F1 41 DD 1C C2 03 45 F0 3B 4D EC 72 EC
-***** EXPENSIVE 791 84
-vex iropt: 2 x unrolling (41 sts -> 82 sts)
-
-. 790 805AC54 42
-. 89 F1 8B 45 08 47 DD 04 F0 C1 E1 04 8B 45 0C 03 75 10 3B 7D 14 DD 1C 08 C7 44 08 08 00 00 00 00 C7 44 08 0C 00 00 00 00 72 D6
-
-. 791 8048BA0 13
-. BB 01 00 00 00 83 C1 02 3B 5D 0C 73 4F
-vex iropt: 4 x unrolling (18 sts -> 72 sts)
-
-. 792 8049164 12
-. 46 89 D0 89 F1 D3 E0 39 45 EC 77 F4
-vex iropt: 4 x unrolling (19 sts -> 76 sts)
-
-. 793 8049194 16
-. 89 D0 D1 E1 83 E0 01 43 09 C1 D1 EA 39 F3 72 F0
-
-. 794 8048AAC 10
-. 8B 7D 10 D1 EF 39 75 F0 73 2E
-***** EXPENSIVE 796 85
-
-. 795 8048AB6 50
-. 8B 4D 0C 0F AF CE 8B 45 08 C1 E1 04 DD 04 08 8B 5D E8 DD 04 18 D9 C9 01 C1 DD 1C 18 DD 44 18 08 DD 41 08 DD 5C 18 08 D9 C9 DD 19 DD 59 08 39 F7 77 08
-vex iropt: 8 x unrolling (12 sts -> 96 sts)
-
-. 796 8048AE8 8
-. 29 FE D1 EF 39 F7 76 F8
-vex iropt: 8 x unrolling (13 sts -> 104 sts)
-
-. 797 804CDDC 7
-. D1 E0 41 39 D0 72 F9
-
-. 798 804C9D8 10
-. 8B 7D 10 D1 EF 39 75 F4 73 2E
-***** EXPENSIVE 800 86
-
-. 799 804C9E2 50
-. 8B 4D 0C 0F AF CE 8B 55 08 C1 E1 04 DD 04 0A 8B 45 EC DD 04 02 D9 C9 01 D1 DD 1C 02 DD 44 02 08 DD 41 08 DD 5C 02 08 D9 C9 DD 19 DD 59 08 39 F7 77 08
-vex iropt: 8 x unrolling (12 sts -> 96 sts)
-
-. 800 804CA14 8
-. 29 FE D1 EF 39 F7 76 F8
-***** EXPENSIVE 802 87
-vex iropt: not unrolling (62 sts)
-
-. 801 804FEF8 68
-. 8D 14 0F 8B 45 0C 0F AF C1 0F AF 55 0C C1 E2 04 C1 E0 04 DD 04 16 DD 04 06 01 F2 D8 E1 01 F0 DD 1A DD 42 08 DD 40 08 D8 E1 DD 5A 08 D9 C9 03 4D B8 DC 00 D9 C9 DC 40 08 D9 C9 3B 4D 10 DD 18 DD 58 08 72 BC
-***** EXPENSIVE 803 88
-
-. 802 804FE9C 50
-. 31 D2 52 57 DF 2C 24 DD 83 34 F6 FF FF D9 C9 D8 C0 83 EC 08 DC 7D C8 D9 C9 DD 5D D8 DD 83 44 F6 FF FF D9 C9 DD 14 24 DD 5D A8 DD 5D D0 E8 62 88 FF FF
-***** EXPENSIVE 804 89
-
-. 803 804FF4C 63
-. DD 45 C0 DC 4D D0 DD 45 D8 DE E1 DD 45 D8 D8 CA DD 45 C0 D9 CA DE E1 D9 C9 DC 4D D8 DD 45 D0 D9 C9 DC 45 D0 D9 C9 D8 CB 31 C9 DE E9 D9 C9 3B 4D 10 DD 55 D8 D9 C9 DD 55 D0 0F 83 8E 00 00 00
-***** EXPENSIVE 805 90
-
-. 804 804FF8B 97
-. 90 8B 55 BC 8D 04 0A 8D 14 07 0F AF 55 0C C1 E2 04 DD 04 16 01 F2 DD 42 08 0F AF 45 0C D9 C3 D9 C3 D8 CA D9 C9 C1 E0 04 D8 CB DE E1 DD 04 06 D8 E1 01 F0 DD 1A D9 C9 D8 CC D9 CA D8 CB DD 40 08 D9 CB DE C1 DC EA D9 CA DD 5A 08 8D 0C 79 DC 00 D9 C9 DC 40 08 D9 C9 3B 4D 10 DD 18 DD 58 08 72 A0
-***** EXPENSIVE 806 91
-
-. 805 804FFEC 16
-. DD D8 DD D8 FF 45 BC 39 7D BC 0F 82 50 FF FF FF
-***** EXPENSIVE 807 92
-
-. 806 804FFFC 19
-. DD D8 FF 45 E0 8B 45 E4 D1 E7 39 45 E0 0F 82 8D FE FF FF
-vex iropt: 4 x unrolling (18 sts -> 72 sts)
-
-. 807 80499D0 12
-. 47 89 D0 89 F9 D3 E0 39 45 EC 77 F4
-vex iropt: 4 x unrolling (19 sts -> 76 sts)
-
-. 808 8049A00 16
-. 89 D0 D1 E1 83 E0 01 43 09 C1 D1 EA 39 FB 72 F0
-
-. 809 8048B34 10
-. 8B 7D 10 D1 EF 39 75 EC 73 18
-***** EXPENSIVE 811 93
-
-. 810 8048B3E 28
-. 8B 5D 0C 8B 4D 08 8B 55 E4 0F AF DE DD 04 D1 DD 04 D9 DD 1C D1 DD 1C D9 39 F7 77 0A
-
-. 811 8048B5A 10
-. 89 F6 29 FE D1 EF 39 F7 76 F8
-
-. 812 804CA5C 10
-. 8B 7D 10 D1 EF 39 75 F4 73 1B
-***** EXPENSIVE 814 94
-
-. 813 804CA66 31
-. 8B 55 EC 8B 4D 08 DD 04 D1 8B 4D 0C 8B 45 08 0F AF CE DD 04 C8 DD 1C D0 DD 1C C8 39 F7 77 0B
-
-. 814 804CA85 11
-. 8D 76 00 29 FE D1 EF 39 F7 76 F8
-***** EXPENSIVE 816 95
-vex iropt: 2 x unrolling (58 sts -> 116 sts)
-
-. 815 805A9E4 55
-. 8B 75 DC 8B 55 0C 0F AF D1 8D 04 0E 8B 75 08 0F AF 45 0C DD 04 D6 DD 04 C6 D9 C1 D8 C1 D9 CA DE E1 D9 C9 DD 1C D6 FF 45 CC DD 1C C6 8B 45 C4 03 4D C8 39 45 CC 72 C9
-
-. 816 805ABB5 15
-. C7 45 CC 00 00 00 00 8B 45 C4 39 45 CC 73 30
-***** EXPENSIVE 818 96
-
-. 817 805ABC4 46
-. D1 6D DC 8B 55 C8 DD 83 E4 F8 FF FF 2B 55 DC 8B 45 0C 0F AF C2 8B 4D 08 DD 04 C1 FF 45 CC 8B 75 C4 D8 C9 03 55 C8 39 75 CC DD 1C C1 72 E1
-***** EXPENSIVE 819 97
-
-. 818 805ABF2 17
-. DD D8 FF 45 D4 8B 45 E4 39 45 D4 0F 86 B8 FD FF FF
-***** EXPENSIVE 820 98
-
-. 819 8055D52 94
-. 8B 7D 10 8D 76 00 8B 4D 14 2B 4D F0 8B 45 08 0F AF 4D 10 89 FE DD 04 F8 8B 14 C8 C1 E6 04 89 4D E8 8B 4C C8 04 8B 45 0C 89 4C 30 0C DD 14 30 89 54 30 08 8B 45 E8 C1 E0 04 8B 75 0C 81 F1 00 00 00 80 FF 45 F0 DD 1C 06 89 54 06 08 89 4C 06 0C 8B 45 14 2B 45 F0 03 7D 10 39 45 F0 72 A8
-
-. 820 8055B1F 15
-. C7 45 CC 00 00 00 00 8B 7D D8 39 7D CC 73 45
-***** EXPENSIVE 822 99
-
-. 821 8055B2E 67
-. 8B 75 DC D1 EE 8B 55 DC DD 83 D4 F8 FF FF 01 F2 31 C9 8D 04 0E 0F AF 45 0C 8B 7D 08 DD 04 C7 D8 C0 DD 1C C7 8B 45 0C 0F AF C2 DD 04 C7 D8 C9 DD 1C C7 FF 45 CC 8B 45 D8 03 55 E0 03 4D E0 39 45 CC 72 CF
-***** EXPENSIVE 823 100
-
-. 822 8055B71 26
-. DD D8 FF 45 D4 8B 55 E4 D1 6D DC D1 6D E0 D1 65 D8 39 55 D4 0F 86 B8 FD FF FF
-***** EXPENSIVE 824 101
-vex iropt: not unrolling (61 sts)
-
-. 823 8055954 58
-. 8B 55 0C 0F AF D1 8B 45 08 8B 75 DC DD 04 D0 8D 04 0E 0F AF 45 0C 8B 7D 08 DD 04 C7 D9 C1 D8 C1 D9 CA DE E1 D9 C9 DD 1C D7 FF 45 CC DD 1C C7 8B 45 D8 03 4D E0 39 45 CC 72 C6
-***** EXPENSIVE 825 102
-vex iropt: not unrolling (86 sts)
-
-. 824 804FF8C 96
-. 8B 55 BC 8D 04 0A 8D 14 07 0F AF 55 0C C1 E2 04 DD 04 16 01 F2 DD 42 08 0F AF 45 0C D9 C3 D9 C3 D8 CA D9 C9 C1 E0 04 D8 CB DE E1 DD 04 06 D8 E1 01 F0 DD 1A D9 C9 D8 CC D9 CA D8 CB DD 40 08 D9 CB DE C1 DC EA D9 CA DD 5A 08 8D 0C 79 DC 00 D9 C9 DC 40 08 D9 C9 3B 4D 10 DD 18 DD 58 08 72 A0
-vex iropt: 8 x unrolling (12 sts -> 96 sts)
-
-. 825 8048B5C 8
-. 29 FE D1 EF 39 F7 76 F8
-vex iropt: 8 x unrolling (12 sts -> 96 sts)
-
-. 826 804CA88 8
-. 29 FE D1 EF 39 F7 76 F8
-***** EXPENSIVE 828 103
-vex iropt: 2 x unrolling (43 sts -> 86 sts)
-
-. 827 805ABD3 31
-. 8B 45 0C 0F AF C2 8B 4D 08 DD 04 C1 FF 45 CC 8B 75 C4 D8 C9 03 55 C8 39 75 CC DD 1C C1 72 E1
-***** EXPENSIVE 829 104
-
-. 828 805AA88 87
-. C7 45 88 FF FF FF FF 90 DD 45 A8 DC 4D B0 DC 6D B8 DD 5D 98 DD 45 A0 DC 4D B8 DC 6D 98 DD 5D 98 DD 45 A8 DC 4D B8 DD 45 B0 DE C1 DD 45 A0 DC 4D B0 DE E9 DD 5D 90 C7 45 CC 00 00 00 00 8B 45 C4 DD 45 98 DD 45 90 D9 C9 39 45 CC DD 5D B8 DD 5D B0 0F 83 BC 00 00 00
-***** EXPENSIVE 830 105
-
-. 829 805AADF 137
-. 8B 7D 88 03 7D C8 C7 45 8C 00 00 00 00 8B 4D 8C 03 4D D0 8B 45 8C 0F AF 4D 0C 03 45 DC 8B 55 08 DD 04 CA 89 C2 2B 55 D0 03 45 D0 0F AF 55 0C 0F AF 45 0C 8B 75 08 DD 04 D6 DD 04 C6 8B 75 0C 0F AF F7 89 85 74 FF FF FF 8B 45 08 DD 04 F0 DD 45 98 DD 45 90 DD 45 98 D9 CA D8 CC D9 C9 D8 CB D9 CA DE CB D9 C5 D9 C5 D9 CD DC 4D 90 D9 C9 D8 C2 D9 CD D8 C4 D9 CD D8 E3 D9 CD D8 C1 D9 CF DE E2 D9 CD DE E3 D9 CB DD 1C C8
-***** EXPENSIVE 831 106
-
-. 830 805AB68 51
-. DE C2 D9 CB DD 1C F0 D9 CA DE E1 D9 C9 8B 4D C8 FF 45 CC 8B 75 C4 DD 1C D0 D9 E0 8B 95 74 FF FF FF 03 7D C8 01 4D 8C 39 75 CC DD 1C D0 0F 82 51 FF FF FF
-
-. 831 805AB9B 20
-. 8B 45 DC FF 45 D0 D1 E8 FF 4D 88 39 45 D0 0F 82 E1 FE FF FF
-***** EXPENSIVE 833 107
-vex iropt: not unrolling (69 sts)
-
-. 832 8055D58 88
-. 8B 4D 14 2B 4D F0 8B 45 08 0F AF 4D 10 89 FE DD 04 F8 8B 14 C8 C1 E6 04 89 4D E8 8B 4C C8 04 8B 45 0C 89 4C 30 0C DD 14 30 89 54 30 08 8B 45 E8 C1 E0 04 8B 75 0C 81 F1 00 00 00 80 FF 45 F0 DD 1C 06 89 54 06 08 89 4C 06 0C 8B 45 14 2B 45 F0 03 7D 10 39 45 F0 72 A8
-***** EXPENSIVE 834 108
-
-. 833 80559F5 80
-. C7 45 A0 FF FF FF FF DD 45 B0 DC 4D B8 DD 45 C0 DE E1 DD 45 A8 DC 4D C0 DD 45 B0 D9 CA DE E1 D9 C9 DC 4D C0 DD 45 A8 D9 C9 DC 45 B8 D9 C9 DC 4D B8 C7 45 CC 00 00 00 00 8B 45 D8 DE E9 D9 C9 39 45 CC DD 55 C0 D9 C9 DD 55 B8 0F 83 61 01 00 00
-***** EXPENSIVE 835 109
-
-. 834 8055A45 140
-. 8B 7D A0 03 7D E0 C7 45 A4 00 00 00 00 89 F6 8B 4D A4 03 4D D0 8B 45 A4 8B 75 0C 0F AF F7 03 45 DC 0F AF 4D 0C 8B 55 08 DD 04 F2 DD 04 CA 89 C2 2B 55 D0 89 45 84 0F AF 55 0C 8B 45 08 DD 04 D0 8B 45 84 03 45 D0 0F AF 45 0C 89 95 74 FF FF FF 8B 55 08 DD 04 C2 D9 C2 D9 C9 D9 E0 D9 C9 D8 C2 D9 C4 D9 C9 DD 1C CA D9 CC D8 E1 D9 CC DE C1 D9 CA DE E1 D9 C4 D9 C4 D9 C9 89 45 84 D8 CA D9 C9 8B 85 74 FF FF FF D8 CC D9 CA D8 CD
-***** EXPENSIVE 836 110
-
-. 835 8055AD1 48
-. D9 CC D8 CE D9 CB DD 1C C2 DE E1 D9 C9 8B 45 84 DE C2 DD 1C C2 FF 45 CC DD 1C F2 8B 55 E0 8B 75 D8 03 7D E0 01 55 A4 39 75 CC 0F 82 53 FF FF FF
-***** EXPENSIVE 837 111
-
-. 836 8055B01 24
-. DD D8 DD D8 8B 45 DC FF 45 D0 D1 E8 FF 4D A0 39 45 D0 0F 82 E3 FE FF FF
-***** EXPENSIVE 838 112
-vex iropt: 2 x unrolling (55 sts -> 110 sts)
-
-. 837 8055B40 49
-. 8D 04 0E 0F AF 45 0C 8B 7D 08 DD 04 C7 D8 C0 DD 1C C7 8B 45 0C 0F AF C2 DD 04 C7 D8 C9 DD 1C C7 FF 45 CC 8B 45 D8 03 55 E0 03 4D E0 39 45 CC 72 CF
-***** EXPENSIVE 839 113
-
-. 838 805AAEC 131
-. 8B 4D 8C 03 4D D0 8B 45 8C 0F AF 4D 0C 03 45 DC 8B 55 08 DD 04 CA 89 C2 2B 55 D0 03 45 D0 0F AF 55 0C 0F AF 45 0C 8B 75 08 DD 04 D6 DD 04 C6 8B 75 0C 0F AF F7 89 85 74 FF FF FF 8B 45 08 DD 04 F0 DD 45 98 DD 45 90 DD 45 98 D9 CA D8 CC D9 C9 D8 CB D9 CA DE CB D9 C5 D9 C5 D9 CD DC 4D 90 D9 C9 D8 C2 D9 CD D8 C4 D9 CD D8 E3 D9 CD D8 C1 D9 CF DE E2 D9 CD DE E3 D9 CB DD 1C C8 DE C2 D9 CB DD 1C F0
-***** EXPENSIVE 840 114
-
-. 839 805AB6F 44
-. D9 CA DE E1 D9 C9 8B 4D C8 FF 45 CC 8B 75 C4 DD 1C D0 D9 E0 8B 95 74 FF FF FF 03 7D C8 01 4D 8C 39 75 CC DD 1C D0 0F 82 51 FF FF FF
-***** EXPENSIVE 841 115
-
-. 840 805AA90 79
-. DD 45 A8 DC 4D B0 DC 6D B8 DD 5D 98 DD 45 A0 DC 4D B8 DC 6D 98 DD 5D 98 DD 45 A8 DC 4D B8 DD 45 B0 DE C1 DD 45 A0 DC 4D B0 DE E9 DD 5D 90 C7 45 CC 00 00 00 00 8B 45 C4 DD 45 98 DD 45 90 D9 C9 39 45 CC DD 5D B8 DD 5D B0 0F 83 BC 00 00 00
-***** EXPENSIVE 842 116
-
-. 841 80559FC 73
-. DD 45 B0 DC 4D B8 DD 45 C0 DE E1 DD 45 A8 DC 4D C0 DD 45 B0 D9 CA DE E1 D9 C9 DC 4D C0 DD 45 A8 D9 C9 DC 45 B8 D9 C9 DC 4D B8 C7 45 CC 00 00 00 00 8B 45 D8 DE E9 D9 C9 39 45 CC DD 55 C0 D9 C9 DD 55 B8 0F 83 61 01 00 00
-***** EXPENSIVE 843 117
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-. 842 8055A54 134
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-***** EXPENSIVE 1192 171
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-vex iropt: not unrolling (61 sts)
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-***** EXPENSIVE 1203 174
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-***** EXPENSIVE 1223 175
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-vex iropt: 8 x unrolling (15 sts -> 120 sts)
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-***** EXPENSIVE 1261 177
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-vex iropt: 2 x unrolling (34 sts -> 68 sts)
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-vex iropt: 2 x unrolling (35 sts -> 70 sts)
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-. 1313 804AEC8 21
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-***** EXPENSIVE 1315 183
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-vex iropt: 4 x unrolling (20 sts -> 80 sts)
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-vex iropt: 2 x unrolling (49 sts -> 98 sts)
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-***** EXPENSIVE 1345 187
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-. 8B 4D EC 8B 7D 0C 8B 45 14 0F AF 4D 14 8B 55 D0 C1 E7 04 C1 E0 04 C1 E1 04 C1 E2 04 89 7D D8 89 45 DC 8B 45 F0 03 45 E4 8B 7D 08 0F AF 45 0C DD 04 17 DD 44 17 08 C1 E0 04 DD 04 07 DD 44 07 08 D9 C3 D9 C3 D9 C9 8B 45 10 D8 C3 D9 C9 D8 C2 D9 C9 DD 1C 08 DD 5C 08 08 D9 CB 8B 45 EC DE E1 D9 C9 DE E2 03 45 CC D9 C3 D9 C3 D9 C9 0F AF 45 14 D8 CA D9 C9 D8 CB D9 CA D8 CC D9 CB D8 CD D9 C9 C1 E0 04 8B 7D 10
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-. DE E2 DE C2 DD 1C 07 DD 5C 07 08 46 8B 45 0C 03 55 D8 01 45 D0 FF 45 F0 03 4D DC FF 45 EC 3B 75 CC 0F 82 75 FF FF FF
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-***** EXPENSIVE 1354 191
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-vex iropt: 2 x unrolling (43 sts -> 86 sts)
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-. 1356 804D498 7
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-vex iropt: 2 x unrolling (49 sts -> 98 sts)
-
-. 1357 8048D88 50
-. 8B 75 E4 8B 04 0E 8B 54 0E 04 8B 75 D8 89 04 0E 89 54 0E 04 8B 75 E4 8B 44 0E 08 8B 54 0E 0C 43 8B 75 D8 89 44 0E 08 89 54 0E 0C 03 4D D4 39 FB 72 CE
-***** EXPENSIVE 1359 193
-vex iropt: 2 x unrolling (39 sts -> 78 sts)
-
-. 1358 804D310 26
-. DD 04 06 D8 C9 DD 1C 06 DD 44 06 08 D8 C9 42 DD 5C 06 08 01 C8 3B 55 10 72 E6
-***** EXPENSIVE 1360 194
-vex iropt: 2 x unrolling (40 sts -> 80 sts)
-
-. 1359 8048E80 28
-. 8B 4D E0 DD 04 01 D8 C9 DD 1C 01 DD 44 01 08 D8 C9 43 DD 5C 01 08 01 D0 39 FB 72 E4
-
-. 1360 8050401 20
-. 89 75 B0 C7 45 B4 01 00 00 00 8B 45 B8 31 FF 39 45 B4 76 5F
-***** EXPENSIVE 1362 195
-
-. 1361 8050474 45
-. 03 7D B0 89 F8 31 D2 F7 75 08 89 D7 31 D2 52 57 DF 2C 24 DC 4D C8 83 EC 08 8B 45 C4 8B B0 08 02 00 00 DD 55 98 DD 1C 24 E8 7F 81 FF FF
-***** EXPENSIVE 1363 196
-
-. 1362 80504A1 26
-. 8B 55 D8 D9 1C D6 8B 45 C4 DD 45 98 8B B0 08 02 00 00 DD 1C 24 E8 75 82 FF FF
-***** EXPENSIVE 1364 197
-
-. 1363 80504BB 25
-. 8B 55 D8 D9 5C D6 04 FF 45 B4 8B 75 B8 42 83 C4 10 39 75 B4 89 55 D8 76 A0
-
-. 1364 80504D4 5
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-. 8B 45 D0 FF 45 C0 8B 55 BC 01 45 B0 39 55 C0 72 DE
-
-. 1366 8050426 11
-. 8B 4D E0 FF 45 DC 39 4D DC 72 81
-
-. 1367 804C4E8 5
-. E8 5F F4 FF FF
-***** EXPENSIVE 1369 198
-
-. 1368 804C8E0 31
-. 31 D2 52 8B 45 DC 50 DF 2C 24 D8 C9 83 EC 08 DD 14 24 D9 C9 DD 5D 98 DD 5D B8 E8 21 BD FF FF
-***** EXPENSIVE 1370 199
-
-. 1369 804C8C0 30
-. 31 FF D9 83 50 F6 FF FF 3B 7D 10 D9 55 D4 D9 5D D8 C7 45 DC 00 00 00 00 0F 83 93 00 00 00
-vex iropt: 2 x unrolling (36 sts -> 72 sts)
-
-. 1370 804A58C 26
-. 8B 04 D7 8B 4D E4 89 04 D1 8B 44 D7 04 43 89 44 D1 04 03 55 08 3B 5D 0C 72 E6
-
-. 1371 8050827 7
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-
-. 1372 8050854 4
-. 3B 32 74 14
-
-. 1373 805086C 19
-. C7 45 EC 00 00 00 00 8B 45 F0 39 45 EC 0F 83 B7 00 00 00
-
-. 1374 805087F 38
-. 90 8B 55 EC 8B 7D 14 8B 4C 97 08 8B 45 E8 0F AF C1 89 45 E8 31 D2 89 F0 8B 7D DC F7 75 E8 85 FF 0F 85 5B 02 00 00
-
-. 1375 80508A5 41
-. 8B 55 08 89 55 D4 8B 7D 0C 8B 55 D8 89 7D D0 89 55 CC C7 45 C8 01 00 00 00 C7 45 DC 01 00 00 00 83 F9 02 0F 84 02 02 00 00
-
-. 1376 8050AD0 37
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-
-. 1377 8050B4C 77
-. 55 89 E5 57 56 53 83 EC 1C 8B 45 20 D1 E8 8B 4D 1C 31 D2 89 45 E4 8B 45 20 F7 F1 C7 45 E8 00 00 00 00 D1 E9 E8 00 00 00 00 5B 81 C3 9F 05 01 00 39 45 E8 C7 45 F0 00 00 00 00 C7 45 EC 00 00 00 00 89 45 E0 89 4D D8 0F 83 CF 00 00 00
-
-. 1378 8050B99 18
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-***** EXPENSIVE 1380 200
-
-. 1379 8050BAB 23
-. D9 83 4C F6 FF FF D9 83 50 F6 FF FF 31 F6 3B 75 D8 0F 83 B0 00 00 00
-***** EXPENSIVE 1381 201
-
-. 1380 8050BC2 131
-. 8B 4D EC 8B 55 F0 0F AF 4D 14 0F AF 55 0C 8B 45 F0 8B 7D 08 03 45 E4 D9 04 D7 D9 44 D7 04 0F AF 45 0C D9 04 C7 D9 44 C7 04 D9 C3 D9 C3 D9 C9 8B 45 10 D8 C3 D9 C9 D8 C2 D9 C9 D9 1C C8 D9 5C C8 04 D9 CB DE E1 D9 C9 DE E2 8B 45 EC D9 C3 D9 C3 D9 C9 03 45 D8 D8 CA D9 C9 D8 CB D9 CA D8 CC D9 CB D8 CD D9 C9 46 0F AF 45 14 8B 7D 10 DE E2 DE C2 03 55 0C FF 45 F0 03 4D 14 FF 45 EC 3B 75 D8 D9 1C C7
-***** EXPENSIVE 1382 202
-
-. 1381 8050C45 6
-. D9 5C C7 04 72 85
-***** EXPENSIVE 1383 203
-
-. 1382 8050C4B 29
-. DD D8 DD D8 8B 45 D8 FF 45 E8 8B 55 E0 01 45 EC 83 45 DC 08 39 55 E8 0F 82 38 FF FF FF
-
-. 1383 8050C68 10
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-. 83 7D DC 01 74 07
-
-. 1387 8050943 12
-. C7 45 EC 00 00 00 00 39 75 EC 73 ED
-
-. 1388 805094F 45
-. 31 D2 8D 76 00 8B 7D EC 8B 4D D8 8B 04 F9 8B 7D 08 89 04 D7 8B 7D EC 8B 44 F9 04 47 8B 4D 08 89 44 D1 04 03 55 0C 39 F7 89 7D EC 72 D8
-vex iropt: 2 x unrolling (43 sts -> 86 sts)
-
-. 1389 8050954 40
-. 8B 7D EC 8B 4D D8 8B 04 F9 8B 7D 08 89 04 D7 8B 7D EC 8B 44 F9 04 47 8B 4D 08 89 44 D1 04 03 55 0C 39 F7 89 7D EC 72 D8
-
-. 1390 805097C 2
-. EB BE
-
-. 1391 805093C 7
-. 31 C0 E9 07 FF FF FF
-vex iropt: 2 x unrolling (36 sts -> 72 sts)
-
-. 1392 804A5C8 26
-. 8B 04 D7 8B 4D DC 89 04 D1 8B 44 D7 04 43 89 44 D1 04 03 55 08 3B 5D 0C 72 E6
-***** EXPENSIVE 1394 204
-
-. 1393 804A0A8 49
-. 8B 45 0C D9 04 C8 8B 55 14 D9 44 C8 04 D9 C9 D8 2C CA D9 C9 D8 6C CA 04 D9 C9 D9 E1 D9 C9 D9 E1 DE C1 D8 C9 DD E2 DF E0 F6 C4 45 0F 85 FB 00 00 00
-***** EXPENSIVE 1395 205
-
-. 1394 804A0D9 11
-. DD DA 43 03 4D 18 3B 5D 1C 72 C4
-***** EXPENSIVE 1396 206
-vex iropt: 2 x unrolling (44 sts -> 88 sts)
-
-. 1395 80507B4 26
-. D9 04 C6 D8 C9 D9 1C C6 D9 44 C6 04 D8 C9 42 D9 5C C6 04 03 45 0C 39 FA 72 E6
-***** EXPENSIVE 1397 207
-vex iropt: 2 x unrolling (47 sts -> 94 sts)
-
-. 1396 804A6AC 30
-. 8B 55 E4 D9 04 C2 D8 C9 D9 1C C2 D9 44 C2 04 D8 C9 43 D9 5C C2 04 03 45 08 3B 5D 0C 72 E2
-vex iropt: 4 x unrolling (24 sts -> 96 sts)
-
-. 1397 804BFFC 23
-. 43 C7 04 C1 00 00 00 00 C7 44 C1 04 00 00 00 00 03 45 10 39 F3 72 E9
-***** EXPENSIVE 1399 208
-
-. 1398 804C04C 38
-. 89 F8 31 D2 F7 F6 89 D0 31 D2 52 50 DF 2C 24 DC 0D E0 06 06 08 83 EC 08 DC 75 D8 DD 14 24 DD 5D B8 E8 AE C5 FF FF
-***** EXPENSIVE 1400 209
-vex iropt: 2 x unrolling (35 sts -> 70 sts)
-
-. 1399 804C120 18
-. D9 C9 40 D9 14 CB D9 C9 D9 54 CB 04 01 F9 39 D0 72 EE
-vex iropt: 4 x unrolling (22 sts -> 88 sts)
-
-. 1400 804C13C 22
-. 40 C7 04 CE 00 00 00 00 C7 44 CE 04 00 00 00 00 01 F9 39 D0 72 EA
-***** EXPENSIVE 1402 210
-
-. 1401 804C1C8 39
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-vex iropt: 4 x unrolling (27 sts -> 108 sts)
-
-. 1402 804C24C 27
-. 8B 55 20 43 C7 04 C2 00 00 00 00 C7 44 C2 04 00 00 00 00 03 45 10 3B 5D 0C 72 E5
-***** EXPENSIVE 1404 211
-
-. 1403 804C26E 59
-. 8B 45 08 31 D2 F7 75 0C 8B 4D 10 0F AF CA 31 D2 52 8B 45 0C 50 DF 2C 24 D9 45 14 8B 45 20 D8 C9 D9 C9 D8 4D 18 D9 C9 D9 1C C8 D9 5C C8 04 83 C4 08 31 C0 8D 65 F4 5B 5E 5F C9 C3
-
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-
-. 1405 80586A7 20
-. 8B 55 CC 83 C4 10 85 C0 89 82 08 02 00 00 0F 84 E9 01 00 00
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-. 1406 805876F 41
-. 41 89 4D B4 8B 4D DC C1 E1 04 89 45 B0 89 4D A8 90 8B 45 B4 C7 45 BC 01 00 00 00 D1 E8 39 45 BC C7 45 B8 00 00 00 00 73 72
-
-. 1407 805880A 21
-. 8B 55 C0 FF 45 C8 8B 4D C4 01 55 B0 39 4D C8 0F 82 61 FF FF FF
-vex iropt: 2 x unrolling (37 sts -> 74 sts)
-
-. 1408 80497D0 34
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-. 1409 8058A50 10
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-
-. 1410 8058A80 7
-. 8B 4D 10 3B 0A 74 15
-
-. 1411 8058A9C 11
-. 31 FF 3B 7D F0 0F 83 91 00 00 00
-
-. 1412 8058AA7 34
-. 90 8B 45 EC 8B 75 14 89 C1 8B 54 BE 08 0F AF CA 40 D1 E8 89 4D EC 8B 4D E4 48 85 C9 0F 85 6F 01 00 00
-
-. 1413 8058AC9 41
-. 8B 75 08 89 75 E0 8B 4D 0C 8B 75 E8 89 4D DC 89 75 D8 C7 45 D4 01 00 00 00 C7 45 E4 01 00 00 00 83 FA 02 0F 84 1E 01 00 00
-
-. 1414 8058C10 34
-. 50 8B 75 14 FF B4 BE 08 01 00 00 FF 75 10 FF 75 EC FF 75 D4 FF 75 D8 FF 75 DC FF 75 E0 E8 52 00 00 00
-
-. 1415 8058C84 46
-. 55 89 E5 57 56 83 EC 30 8B 45 1C 89 C2 D1 EA 89 55 EC 31 D2 F7 75 18 8B 4D 18 C7 45 F0 00 00 00 00 D1 E9 39 45 F0 89 45 E8 89 4D E4 73 5A
-***** EXPENSIVE 1417 212
-
-. 1416 8058CB2 90
-. 8B 4D 18 49 31 FF 31 F6 89 F6 8B 45 EC 01 F0 8B 55 0C 0F AF D6 89 45 D0 8B 45 08 DD 04 D0 8B 45 D0 0F AF 45 0C 8B 55 08 DD 04 C2 D9 C1 8B 45 14 0F AF C7 8B 55 10 D8 C1 DD 1C C2 8B 45 14 0F AF C1 DE E9 DD 1C C2 FF 45 F0 8B 45 E8 03 4D 18 03 7D 18 03 75 E4 39 45 F0 72 B0
-
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-
-. 1418 8058EC9 7
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-
-. 1422 8058B45 7
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-
-. 1423 8058B4C 36
-. 8B 75 0C C1 E6 03 8B 4D 08 89 75 D0 8B 75 E8 8B 04 FE 8B 54 FE 04 47 89 01 89 51 04 03 4D D0 3B 7D 10 72 E8
-vex iropt: 2 x unrolling (32 sts -> 64 sts)
-
-. 1424 8058B58 24
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-. 1425 8058B70 2
-. EB CC
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-. 1426 8058B3E 7
-. 31 C0 E9 31 FF FF FF
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-. 8B 55 14 8D 04 D5 F8 FF FF FF 8B 75 10 8B 4D 08 0F AF 45 10 0F AF 75 EC 8B 54 08 04 C1 E6 04 8B 04 08 8B 4D 0C 89 04 31 89 54 31 04 C7 44 31 08 00 00 00 00 C7 44 31 0C 00 00 00 00 EB B8
-
-. 1428 8053726 46
-. 40 8B 55 DC 89 45 B0 C1 E2 04 8B 45 D4 89 45 AC 89 55 A4 8D 76 00 8B 45 B0 C7 45 B8 01 00 00 00 D1 E8 39 45 B8 C7 45 B4 00 00 00 00 73 72
-
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-
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-
-. 1433 80539DC 39
-. 8B 45 14 8B 40 04 C7 45 D8 00 00 00 00 39 45 D8 89 45 D4 C7 45 DC 01 00 00 00 C7 45 D0 00 00 00 00 0F 83 9F 00 00 00
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-. 1434 8053A03 42
-. 90 8B 55 D8 8B 75 14 8B 4C 96 08 8B 45 DC 0F AF C1 89 45 DC 31 D2 89 F8 F7 75 DC 40 D1 E8 8B 75 D0 48 85 F6 0F 85 7B 01 00 00
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-. 1435 8053A2D 41
-. 8B 55 08 89 55 EC 8B 75 0C 8B 55 F0 89 75 E4 89 55 E8 C7 45 E0 01 00 00 00 C7 45 D0 01 00 00 00 83 F9 02 0F 84 2A 01 00 00
-
-. 1436 8053B80 35
-. 52 8B 45 D8 8B 55 14 FF B4 82 08 01 00 00 57 FF 75 DC FF 75 E0 FF 75 E8 FF 75 E4 FF 75 EC E8 51 00 00 00
-
-. 1437 8053BF4 69
-. 55 89 E5 57 56 53 83 EC 44 BE 02 00 00 00 31 D2 8B 45 1C F7 F6 89 45 E8 31 D2 8B 45 1C F7 75 18 89 45 E0 31 D2 8B 45 18 F7 F6 C7 45 EC 00 00 00 00 E8 00 00 00 00 5B 81 C3 EA D4 00 00 39 45 EC 89 45 D8 73 59
-***** EXPENSIVE 1439 213
-
-. 1438 8053C39 89
-. 8B 45 E0 C1 E0 04 8D 50 F8 31 C9 89 C6 89 F6 8B 45 0C 0F AF C1 C1 E0 04 8B 7D 08 DD 04 07 8B 45 0C 0F AF C2 DD 04 38 D9 C1 8B 45 14 0F AF C1 8B 7D 10 D8 C1 DD 1C C7 8B 7D E8 8D 04 0F 0F AF 45 14 DE E9 8B 7D 10 DD 1C C7 FF 45 EC 8B 45 D8 01 F2 03 4D E0 39 45 EC 72 B6
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-. 1439 8053C92 10
-. 83 7D E0 01 0F 84 D1 01 00 00
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-. 1440 8053E6D 8
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-. 1441 8053BA3 5
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-
-. 1442 8053A90 18
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-
-. 1443 8053AA2 6
-. 83 7D D0 01 74 07
-
-. 1444 8053AAF 12
-. C7 45 D8 00 00 00 00 39 7D D8 73 ED
-***** EXPENSIVE 1446 214
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-. 1445 8053ABB 35
-. 8B 75 0C C1 E6 03 8B 4D 08 89 75 CC 90 8B 45 D8 8B 55 F0 DD 04 C2 40 DD 19 03 4D CC 39 F8 89 45 D8 72 EA
-***** EXPENSIVE 1447 215
-vex iropt: 2 x unrolling (33 sts -> 66 sts)
-
-. 1446 8053AC8 22
-. 8B 45 D8 8B 55 F0 DD 04 C2 40 DD 19 03 4D CC 39 F8 89 45 D8 72 EA
-
-. 1447 8053ADE 2
-. EB C8
-
-. 1448 8053AA8 7
-. 31 C0 E9 0C FF FF FF
-***** EXPENSIVE 1450 216
-vex iropt: 2 x unrolling (36 sts -> 72 sts)
-
-. 1449 80498A4 20
-. 8B 55 E0 DD 04 C2 D8 F1 41 DD 1C C2 03 45 F0 3B 4D EC 72 EC
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-. 1450 805AD0A 17
-. 8B 45 08 D1 E8 83 EC 0C C1 E0 03 50 E8 75 D9 FE FF
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-. 1451 805AD1B 20
-. 8B 55 C4 83 C4 10 85 C0 89 82 08 02 00 00 0F 84 CC 01 00 00
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-. 1452 805ADDE 29
-. 41 89 4D B0 89 45 AC 8D 76 00 8B 45 B0 C7 45 B4 01 00 00 00 D1 E8 31 FF 39 45 B4 72 69
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-. 1453 805ADFB 17
-. 8B 45 B8 FF 45 C0 8B 55 BC 01 45 AC 39 55 C0 72 DC
-
-. 1454 804C554 5
-. E8 F3 F3 FF FF
-vex iropt: 4 x unrolling (29 sts -> 116 sts)
-
-. 1455 804AFBC 21
-. 8B 5D E0 8B 04 D3 41 8B 5D E4 89 04 93 03 55 08 3B 4D 0C 72 EB
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-. 1456 805B0A8 10
-. 8B 45 10 8B 75 14 3B 06 74 26
-
-. 1457 805B0D8 7
-. 8B 4D 10 3B 0A 74 15
-
-. 1458 805B0F4 11
-. 31 FF 3B 7D F0 0F 83 91 00 00 00
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-. 1459 805B0FF 34
-. 90 8B 45 EC 8B 75 14 89 C1 8B 54 BE 08 0F AF CA 40 D1 E8 89 4D EC 8B 4D E4 48 85 C9 0F 85 63 01 00 00
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-. 1460 805B121 41
-. 8B 75 08 89 75 E0 8B 4D 0C 8B 75 E8 89 4D DC 89 75 D8 C7 45 D4 01 00 00 00 C7 45 E4 01 00 00 00 83 FA 02 0F 84 12 01 00 00
-
-. 1461 805B25C 34
-. 50 8B 75 14 FF B4 BE 08 01 00 00 FF 75 10 FF 75 EC FF 75 D4 FF 75 D8 FF 75 DC FF 75 E0 E8 52 00 00 00
-
-. 1462 805B2D0 46
-. 55 89 E5 57 56 83 EC 28 8B 45 1C 89 C2 D1 EA 89 55 EC 31 D2 F7 75 18 8B 4D 18 C7 45 F0 00 00 00 00 D1 E9 39 45 F0 89 45 E8 89 4D E4 73 5A
-***** EXPENSIVE 1464 217
-
-. 1463 805B2FE 90
-. 8B 4D 18 49 31 FF 31 F6 89 F6 8B 45 EC 01 F0 8B 55 0C 0F AF D6 89 45 D4 8B 45 08 D9 04 90 8B 45 D4 0F AF 45 0C 8B 55 08 D9 04 82 D9 C1 8B 45 14 0F AF C7 8B 55 10 D8 C1 D9 1C 82 8B 45 14 0F AF C1 DE E9 D9 1C 82 FF 45 F0 8B 45 E8 03 4D 18 03 7D 18 03 75 E4 39 45 F0 72 B0
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-. 1464 805B358 10
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-. 1465 805B507 7
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-. 1466 805B27E 5
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-. 1468 805B190 6
-. 83 7D E4 01 74 07
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-. 1469 805B19D 7
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-. 1470 805B1A4 28
-. 8B 4D 0C 8B 55 08 C1 E1 02 8D 76 00 8B 75 E8 8B 04 BE 47 89 02 01 CA 3B 7D 10 72 F0
-vex iropt: 4 x unrolling (24 sts -> 96 sts)
-
-. 1471 805B1B0 16
-. 8B 75 E8 8B 04 BE 47 89 02 01 CA 3B 7D 10 72 F0
-
-. 1472 805B1C0 2
-. EB D4
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-. 1473 805B196 7
-. 31 C0 E9 31 FF FF FF
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-. 1474 8058521 43
-. 8B 4D 14 8D 14 8D FC FF FF FF 8B 45 10 8B 4D 08 0F AF 55 10 8B 14 0A 0F AF 45 F0 8B 4D 0C 89 14 C1 C7 44 C1 04 00 00 00 00 EB CB
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-. 1475 8055F42 29
-. 40 89 45 B4 89 75 B0 8D 76 00 8B 45 B4 C7 45 B8 01 00 00 00 D1 E8 31 FF 39 45 B8 72 65
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-. 1477 8055F70 15
-. 8B 4D E0 FF 45 DC 39 4D DC 0F 82 77 FF FF FF
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-. 1478 8056194 7
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-
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-. 3B 32 74 14
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-. 1480 80561D8 39
-. 8B 7D 14 8B 7F 04 C7 45 D8 00 00 00 00 39 7D D8 89 7D D4 C7 45 DC 01 00 00 00 C7 45 D0 00 00 00 00 0F 83 9E 00 00 00
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-. 1481 80561FF 41
-. 90 8B 45 D8 8B 55 14 8B 4C 82 08 8B 7D DC 0F AF F9 31 D2 89 F0 F7 F7 40 D1 E8 8B 55 D0 48 85 D2 89 7D DC 0F 85 78 01 00 00
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-. 1482 8056228 41
-. 8B 55 08 89 55 EC 8B 7D 0C 8B 55 F0 89 7D E4 89 55 E8 C7 45 E0 01 00 00 00 C7 45 D0 01 00 00 00 83 F9 02 0F 84 27 01 00 00
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-. 1483 8056378 35
-. 50 8B 55 14 8B 45 D8 FF B4 82 08 01 00 00 56 FF 75 DC FF 75 E0 FF 75 E8 FF 75 E4 FF 75 EC E8 51 00 00 00
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-. 1484 80563EC 69
-. 55 89 E5 57 56 53 83 EC 44 BE 02 00 00 00 31 D2 8B 45 1C F7 F6 89 45 E8 31 D2 8B 45 1C F7 75 18 89 45 E0 31 D2 8B 45 18 F7 F6 C7 45 EC 00 00 00 00 E8 00 00 00 00 5B 81 C3 F2 AC 00 00 39 45 EC 89 45 D8 73 56
-***** EXPENSIVE 1486 218
-
-. 1485 8056431 86
-. 8B 45 E0 C1 E0 03 8D 50 FC 31 C9 89 C6 89 F6 8B 45 0C 0F AF C1 8B 7D 08 D9 04 C7 8B 45 0C 0F AF C2 D9 04 38 D9 C1 8B 45 14 0F AF C1 8B 7D 10 D8 C1 D9 1C 87 8B 7D E8 8D 04 0F 0F AF 45 14 DE E9 8B 7D 10 D9 1C 87 FF 45 EC 8B 45 D8 01 F2 03 4D E0 39 45 EC 72 B9
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-. 1486 8056487 10
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-. 1487 8056661 8
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-. 1491 80562AA 12
-. C7 45 D8 00 00 00 00 39 75 D8 73 ED
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-. 1492 80562B6 36
-. 8B 7D 0C C1 E7 02 8B 55 08 89 7D CC 89 F6 8B 4D D8 8B 7D F0 8B 04 8F 41 89 02 03 55 CC 39 F1 89 4D D8 72 EA
-vex iropt: 4 x unrolling (27 sts -> 108 sts)
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-. 1493 80562C4 22
-. 8B 4D D8 8B 7D F0 8B 04 8F 41 89 02 03 55 CC 39 F1 89 4D D8 72 EA
-
-. 1494 80562DA 2
-. EB C7
-
-. 1495 80562A3 7
-. 31 C0 E9 0D FF FF FF
-***** EXPENSIVE 1497 219
-vex iropt: 2 x unrolling (38 sts -> 76 sts)
-
-. 1496 804B084 20
-. 8B 55 E4 D9 04 82 D8 F1 41 D9 1C 82 03 45 08 3B 4D 0C 72 EC
-vex iropt: 2 x unrolling (32 sts -> 64 sts)
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-. 1497 805D41C 26
-. 8B 75 08 8B 04 96 41 89 04 D7 C7 44 D7 04 00 00 00 00 03 55 10 3B 4D 14 72 E6
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-. 1498 804A408 13
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-. 1499 804CF40 22
-. C7 45 B4 01 00 00 00 8B 55 B8 39 55 B4 C7 45 B0 00 00 00 00 77 72
-
-. 1500 804D42A 9
-. 83 F9 03 0F 84 C6 01 00 00
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-. 1565 804DB67 59
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-
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-
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-. 1580 80510EA 136
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-
-. 1588 80592F4 171
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-. 1589 805939F 46
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-
-. 1597 8054280 76
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-. 1598 80542CC 151
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-***** EXPENSIVE 1600 258
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-
-. 1600 805437E 10
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-
-. 1607 805B8D4 68
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-***** EXPENSIVE 1609 259
-
-. 1608 805B918 172
-. D1 E1 89 CF 89 4D D0 4F C7 85 50 FF FF FF 00 00 00 00 C7 85 4C FF FF FF 00 00 00 00 8B 95 4C FF FF FF 03 55 E4 8B 75 E4 8D 0C 16 01 CE 8B 45 0C 0F AF 85 4C FF FF FF 89 B5 44 FF FF FF 8B 75 08 D9 04 86 0F AF 55 0C 0F AF 4D 0C D9 04 96 D9 04 8E D9 CA D9 5D D8 8B B5 44 FF FF FF 0F AF 75 0C 8B 45 08 D9 45 D8 D9 04 B0 D9 C9 D8 C3 8B 45 D0 D9 C2 D8 C2 D9 CB 8D 14 38 DE E2 8B 45 14 D9 C0 8B 4D 10 0F AF 85 50 FF FF FF D8 C3 D9 1C 81 D9 CB 8B 45 14 0F AF C7 D8 6D D8 D9 14 81 D9 C9 8D 04 BD 04 00 00 00 0F AF 45 14 D9 E0
-***** EXPENSIVE 1610 260
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-. 1609 805B9C4 60
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-. 1616 8056319 49
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-
-. 1617 8056A68 76
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-***** EXPENSIVE 1619 261
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-. 1618 8056AB4 153
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-***** EXPENSIVE 1620 262
-
-. 1619 8056B4D 31
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-. 1620 8056B6C 10
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-. 1622 805634A 2
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-
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-
-. 1627 804DE60 115
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-
-. 1628 804DED3 20
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-***** EXPENSIVE 1630 264
-
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-
-. 1630 804DF00 31
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-***** EXPENSIVE 1632 265
-
-. 1631 804DF1F 71
-. DD 83 34 F6 FF FF DD 83 44 F6 FF FF D9 C1 D9 C1 D9 CB DD 55 B8 D9 CA DD 55 B0 D9 CA DD 55 A8 D9 CA DD 55 A0 D9 CA DD 5D 98 D9 C9 DD 5D 90 DD 5D 88 DD 5D 80 C7 45 E0 00 00 00 00 8B 45 D4 39 45 E0 0F 83 13 04 00 00
-***** EXPENSIVE 1633 266
-
-. 1632 804DF66 198
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-***** EXPENSIVE 1634 267
-
-. 1633 804E02C 186
-. DD 9D 38 FF FF FF D9 CC 89 85 D0 FE FF FF 0F AF 45 0C DD 9D 58 FF FF FF C1 E0 04 DD 85 38 FF FF FF D9 CB DD 95 50 FF FF FF D9 CD DD 9D 60 FF FF FF D9 CA D8 C1 DD 04 06 DC C5 D9 C9 DD 9D 30 FF FF FF DD 85 50 FF FF FF DD 44 06 08 D9 CE DD 9D C0 FE FF FF DE E1 DD 85 48 FF FF FF D9 C3 D9 CA DD 9D 28 FF FF FF D8 C5 D9 C9 D8 C4 DD 85 C0 FE FF FF DD 85 30 FF FF FF D9 C9 D8 C2 D9 CF DC AD 48 FF FF FF D9 C9 D8 C3 D9 CF DD 9D 18 FF FF FF DD 9D 20 FF FF FF D9 CB DE E4 D9 C9 DC A5 38 FF FF FF D9 CC DD 9D 10 FF FF FF DD 85 E0 FE FF FF D9 FA DC 8D F0 FE FF FF D9 CA
-***** EXPENSIVE 1635 268
-
-. 1634 804E0E6 175
-. DC AD C0 FE FF FF DE CA DD 85 E0 FE FF FF D9 FA D9 C9 DC A5 30 FF FF FF D9 C9 DC 8D F0 FE FF FF DE C9 DD 85 18 FF FF FF DC 8D F0 FE FF FF DC AD 60 FF FF FF DD 85 10 FF FF FF DC 8D F0 FE FF FF D9 C1 D9 C9 DC AD 58 FF FF FF D9 C9 D8 C4 DD 9D 08 FF FF FF D9 C0 D8 C3 D9 C9 DE E3 DD 45 C8 DD 45 C0 D8 CE D9 C9 DC 8D 28 FF FF FF D9 CA DD 9D 00 FF FF FF DE C1 DD 45 C8 DD 45 C0 D8 CF D9 C9 DC 8D 20 FF FF FF D9 CB DE E5 DE C2 DD 45 C0 D9 CC DD 9D B8 FE FF FF D9 CD DC 4D C8 DD 85 60 FF FF FF DD 45 C0 D9 CD DC 8D 20 FF FF FF D9 CE
-***** EXPENSIVE 1636 269
-
-. 1635 804E195 180
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-***** EXPENSIVE 1637 270
-
-. 1636 804E249 157
-. 0F AF 45 14 D8 CA D9 C9 D8 CC D9 CA DC 4D B8 D9 CC DC 4D B0 D9 CA C1 E0 04 DE E1 D9 CB DE C1 D9 CA DD 1C 07 D9 C9 DD 5C 07 08 8B 45 E8 03 85 FC FE FF FF DD 45 A8 DD 45 A0 0F AF 45 14 DC 8D 70 FF FF FF D9 C9 DC 8D 78 FF FF FF C1 E0 04 DE E1 DD 1C 07 DD 45 A8 DD 45 A0 DC 8D 78 FF FF FF D9 C9 DC 8D 70 FF FF FF DE C1 DD 5C 07 08 8B 45 E8 03 85 F8 FE FF FF DD 45 98 DD 45 90 0F AF 45 14 D8 CD D9 C9 D8 CC D9 CB C1 E0 04 DC 85 08 FF FF FF D9 CB DE E1 D9 CA DD 9D 68 FF FF FF
-***** EXPENSIVE 1638 271
-
-. 1637 804E2E6 147
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-
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-
-. 1639 804E395 10
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-. 1640 804D5B6 5
-. E9 C5 FE FF FF
-
-. 1641 80508E0 9
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-
-. 1642 8050A16 64
-. 8B 4D 14 8B 55 EC 8B 94 91 08 01 00 00 C1 E0 03 89 55 E4 01 C2 89 D7 01 C7 51 89 55 E0 8D 14 38 52 57 FF 75 E0 FF 75 E4 56 FF 75 E8 FF 75 1C FF 75 C8 FF 75 CC FF 75 D0 FF 75 D4 E8 DA 07 00 00
-
-. 1643 8051230 115
-. 55 89 E5 57 56 53 81 EC F4 00 00 00 B9 CD CC CC CC 8B 45 20 F7 E1 C1 EA 02 89 55 D8 8B 45 20 31 D2 F7 75 1C 89 45 D4 8B 45 1C F7 E1 68 2F 1B F4 3F 89 95 14 FF FF FF C1 EA 02 E8 00 00 00 00 5B 81 C3 A5 FE 00 00 89 55 D0 68 E0 F0 9C 76 C1 E2 02 89 85 10 FF FF FF 89 55 CC 8B 75 08 8B 7D 10 C7 45 E8 00 00 00 00 C7 45 E4 00 00 00 00 E8 8D 74 FF FF
-***** EXPENSIVE 1645 272
-
-. 1644 80512A3 20
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-***** EXPENSIVE 1646 273
-
-. 1645 80512B7 25
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-
-. 1646 80512D0 23
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-***** EXPENSIVE 1648 274
-
-. 1647 80512E7 69
-. D9 83 4C F6 FF FF D9 83 50 F6 FF FF D9 C9 D9 55 C0 D9 C9 D9 55 BC D9 C9 D9 55 B8 D9 C9 D9 55 B4 D9 C9 D9 55 B0 D9 C9 D9 55 AC D9 C9 D9 5D A8 D9 5D A4 C7 45 DC 00 00 00 00 8B 45 D0 39 45 DC 0F 83 26 04 00 00
-***** EXPENSIVE 1649 275
-
-. 1648 805132C 190
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-***** EXPENSIVE 1650 276
-
-. 1649 80513EA 177
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-***** EXPENSIVE 1651 277
-
-. 1650 805149B 186
-. D9 CC DE E3 D9 CB DE CA D9 C9 D9 5D EC D9 45 EC DD 85 28 FF FF FF D9 FA D9 CB D8 AD 6C FF FF FF D9 CB DC 8D 20 FF FF FF D8 CB D9 5D EC DD 85 20 FF FF FF D8 8D 58 FF FF FF D8 6D 8C D9 9D 50 FF FF FF DD 85 20 FF FF FF D8 8D 54 FF FF FF D8 6D 88 D9 9D 4C FF FF FF D9 45 C8 D8 8D 68 FF FF FF D9 9D 38 FF FF FF D9 85 50 FF FF FF D9 45 C4 D9 45 EC D9 CA D8 C3 D9 85 4C FF FF FF D9 CC D8 AD 50 FF FF FF D9 CA D8 CD D8 85 38 FF FF FF D9 CC D8 C3 D9 CA D9 9D 40 FF FF FF D9 85 1C FF FF FF D9 CB D8 AD 4C FF FF FF D9 CB DE CC D9 C9 D9 9D 44 FF FF FF D9 45 C4 D9 45 C8
-***** EXPENSIVE 1652 278
-
-. 1651 8051555 181
-. D9 C9 D8 8D 5C FF FF FF D9 CA D9 9D 48 FF FF FF D9 CA D9 9D 3C FF FF FF D9 C9 D8 8D 64 FF FF FF D9 45 C4 D9 45 C8 D9 CC D9 9D 38 FF FF FF D9 C9 DE C2 D8 8D 68 FF FF FF D9 CA DE CB D9 45 C4 D9 45 C8 D8 8D 5C FF FF FF D9 CB DE E4 D8 8D 64 FF FF FF D9 45 8C D9 C9 DE E3 D8 85 58 FF FF FF D9 C9 D8 8D 1C FF FF FF D9 CB D8 8D 1C FF FF FF D9 CA D8 8D 1C FF FF FF D9 CC D9 9D 6C FF FF FF D9 5D 8C D9 85 48 FF FF FF D8 E2 D9 5D A0 D9 45 88 D9 85 40 FF FF FF D9 C9 D8 85 54 FF FF FF D9 C9 D8 E4 D9 85 3C FF FF FF D9 CD D8 85 40 FF FF FF D9 CA D9 5D 88
-***** EXPENSIVE 1653 279
-
-. 1652 805160A 152
-. D9 CC D8 C2 D9 85 44 FF FF FF D9 CB D8 AD 3C FF FF FF D9 CA D9 5D 98 D9 45 8C D9 1C CF D9 CA D8 85 38 FF FF FF D9 C9 D9 5D 94 8B 45 E4 D9 45 C0 D9 45 BC 03 45 D0 D8 CA D9 C9 D8 4D A0 D9 CD 0F AF 45 14 D9 5D 9C DE EC D9 45 88 D9 5C CF 04 D9 CB D9 1C C7 D9 45 BC D8 4D A0 D9 CB D8 4D C0 DE C3 D9 CA D9 5C C7 04 D9 45 B8 8B 45 E4 D9 45 B4 D9 CA D8 85 48 FF FF FF D9 CA 03 85 34 FF FF FF D8 CB D9 C9 D8 4D 9C 0F AF 45 14 DE E1 D9 C9 D9 5D 90 D9 85 44 FF FF FF
-***** EXPENSIVE 1654 280
-
-. 1653 80516A2 146
-. D8 A5 38 FF FF FF D9 C9 D9 1C C7 D9 45 B4 D9 CA D8 4D B8 D9 CA D8 4D 9C DE C2 D9 C9 D9 5C C7 04 D9 45 B0 8B 45 E4 D9 45 AC 03 85 30 FF FF FF D8 4D 94 D9 C9 D8 4D 98 0F AF 45 14 DE E1 D9 1C C7 D9 45 B0 D9 45 AC D8 4D 98 D9 C9 D8 4D 94 DE C1 D9 5C C7 04 8B 55 E4 8B 45 D0 D9 45 A8 D9 45 A4 D9 C9 8D 04 82 D8 4D 90 D9 C9 D8 CA 89 85 10 FF FF FF DE E9 0F AF 45 14 D9 1C C7 D9 45 A4 D9 C9 D8 4D A8 D9 C9 D8 4D 90 DE C1 42 D9 5C C7 04 8B 45 0C
-
-. 1654 8051734 30
-. 01 85 0C FF FF FF FF 45 E8 03 4D 14 89 55 E4 FF 45 DC 8B 55 D0 39 55 DC 0F 82 3A FC FF FF
-
-. 1655 8051752 28
-. 8B 45 CC FF 45 E0 8B 55 D4 01 45 E4 83 85 18 FF FF FF 08 39 55 E0 0F 82 6E FB FF FF
-
-. 1656 805176E 10
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-. 1657 8050A56 5
-. E9 C9 FE FF FF
-
-. 1658 8058B04 5
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-
-. 1659 8058B74 52
-. 8B 55 14 8B 8C BA 08 01 00 00 C1 E0 04 8D 14 08 8D 34 10 83 EC 08 8D 04 30 50 56 52 51 FF 75 10 FF 75 EC FF 75 D4 FF 75 D8 FF 75 DC FF 75 E0 E8 5C 0C 00 00
-
-. 1660 8059804 77
-. 55 89 E5 57 56 53 81 EC 64 01 00 00 B9 CD CC CC CC 8B 45 1C F7 E1 C1 EA 02 89 55 E4 8B 45 1C 31 D2 F7 75 18 89 45 E0 8B 45 18 F7 E1 68 2F 1B F4 3F C1 EA 02 E8 00 00 00 00 5B 81 C3 D7 78 00 00 68 E0 F0 9C 76 89 55 DC E8 DF EE FE FF
-***** EXPENSIVE 1662 281
-
-. 1661 8059851 20
-. 5F 58 68 2F 1B E4 3F 68 E0 F0 9C 76 DD 5D D0 E8 CB EE FE FF
-***** EXPENSIVE 1663 282
-
-. 1662 8059865 25
-. C7 45 E8 00 00 00 00 8B 55 E0 83 C4 10 39 55 E8 DD 5D C8 0F 83 72 01 00 00
-***** EXPENSIVE 1664 283
-
-. 1663 805987E 178
-. 8B 45 DC D1 E0 DD 83 C4 F8 FF FF DD 83 CC F8 FF FF D9 C9 89 45 C4 48 DD 9D E8 FE FF FF DD 9D E0 FE FF FF 89 85 C4 FE FF FF C7 85 C0 FE FF FF 00 00 00 00 C7 85 BC FE FF FF 00 00 00 00 90 8B 95 BC FE FF FF 03 55 E4 8B 75 E4 8D 0C 16 8D 34 0E 8B 7D E4 01 F7 8B 45 0C 89 BD 9C FE FF FF 0F AF 85 BC FE FF FF 8B 7D 08 0F AF 55 0C 0F AF 4D 0C 0F AF 75 0C DD 04 D7 DD 04 CF DD 04 F7 DD 04 C7 8B BD 9C FE FF FF 0F AF 7D 0C 8B 45 08 DD 04 F8 D9 C4 D8 C1 D9 C4 D8 C4 D9 C1 D9 CF DE E3 D9 CD DE E4 D9 CD D8 C4 DD 85 E8 FE FF FF D9 FA D9 CE DE E5
-***** EXPENSIVE 1665 284
-
-. 1664 8059930 157
-. D9 CD DC 8D E0 FE FF FF DE CC DD 85 E0 FE FF FF D8 CD 8B 45 14 8B 4D 10 0F AF 85 C0 FE FF FF D8 EA D9 CA DE C5 D9 CC DD 1C C1 D9 C0 DD 45 D0 D9 C9 8B 45 14 0F AF 85 C4 FE FF FF 8B B5 C4 FE FF FF D8 C4 D9 CA DE E4 D9 E0 DD 45 C8 D9 CA DD 1C C1 D9 C9 D8 CA D9 C9 8D 04 F5 08 00 00 00 D8 CC 0F AF 45 14 DE E1 8B 95 C4 FE FF FF DD 45 C8 D9 C9 03 55 C4 DD 1C 08 D9 E0 8B 45 14 0F AF C2 DE CB DC 4D D0 8D 14 D5 08 00 00 00 0F AF 55 14 DE C2 DD 1C C1 8B 7D 18 DD 1C 0A 8B 45 DC
-
-. 1665 80599CD 35
-. FF 45 E8 8B 55 E0 01 FE 01 BD C0 FE FF FF 01 85 BC FE FF FF 39 55 E8 89 B5 C4 FE FF FF 0F 82 CC FE FF FF
-
-. 1666 80599F0 10
-. 83 7D DC 01 0F 84 CA 06 00 00
-
-. 1667 805A0C4 8
-. 8D 65 F4 5B 5E 5F C9 C3
-***** EXPENSIVE 1669 285
-vex iropt: not unrolling (76 sts)
-
-. 1668 8055C38 88
-. 8B 55 D8 8B 45 08 DD 04 08 8B 32 8B 7A 04 8B 45 0C DD 54 08 08 89 34 08 89 7C 08 04 8B 45 14 2B 45 EC DD 5D E0 0F AF 45 10 80 75 E7 80 C1 E0 04 8B 55 0C DD 45 E0 89 34 02 89 7C 02 04 DD 5C 02 08 8B 45 D4 01 45 D8 FF 45 EC 8B 45 14 2B 45 EC 03 4D DC 39 45 EC 72 A8
-
-. 1669 8053A68 5
-. 83 F9 05 74 73
-
-. 1670 8053AE0 53
-. 8B 75 D8 8B 55 14 8B 8C B2 08 01 00 00 C1 E0 04 8D 14 08 8D 34 10 83 EC 08 8D 04 30 50 56 52 51 57 FF 75 DC FF 75 E0 FF 75 E8 FF 75 E4 FF 75 EC E8 87 0C 00 00
-
-. 1671 805479C 39
-. 55 89 E5 57 56 53 81 EC 64 01 00 00 68 2F 1B F4 3F E8 00 00 00 00 5B 81 C3 62 C9 00 00 68 E0 F0 9C 76 E8 6D 3F FF FF
-***** EXPENSIVE 1673 286
-
-. 1672 80547C3 20
-. 5F 58 68 2F 1B E4 3F 68 E0 F0 9C 76 DD 5D E0 E8 59 3F FF FF
-***** EXPENSIVE 1674 287
-
-. 1673 80547D7 58
-. B9 05 00 00 00 31 D2 8B 45 1C F7 F1 89 45 D4 31 D2 8B 45 1C F7 75 18 89 45 D0 31 D2 8B 45 18 F7 F1 C7 45 E8 00 00 00 00 83 C4 10 39 45 E8 DD 5D D8 89 45 CC 0F 83 67 01 00 00
-***** EXPENSIVE 1675 288
-
-. 1674 8054811 184
-. 8B 45 D0 DD 83 C4 F8 FF FF DD 83 CC F8 FF FF D9 C9 D1 E0 DD 9D F0 FE FF FF DD 9D E8 FE FF FF 89 45 C8 C7 85 D8 FE FF FF 00 00 00 00 C7 85 C8 FE FF FF 00 00 00 00 90 8B 95 C8 FE FF FF 8B 4D C8 8D 44 11 FF 8B 55 0C 8B 75 08 0F AF 95 C8 FE FF FF DD 04 D6 8B 55 0C 8D 0C 01 0F AF D0 8D 04 C5 08 00 00 00 0F AF 45 0C DD 04 30 8B 45 0C 0F AF C1 DD 04 D6 DD 04 C6 D9 C1 8D 0C CD 08 00 00 00 0F AF 4D 0C D8 C1 DD 04 31 D9 C9 D8 C0 DD 85 F0 FE FF FF D9 FA DC 8D E8 FE FF FF D9 CC DE E3 D9 CB D8 C0 DD 85 E8 FE FF FF D9 C9 DE CB D8 CB D8 ED D9 C2 D8 C1 DD 45 E0
-***** EXPENSIVE 1676 289
-
-. 1675 80548C9 140
-. D9 CA DE E4 DD 45 D8 D8 CB D9 CA 8B 95 D8 FE FF FF D8 CE 03 55 D4 8B 7D D4 DE C2 DD 45 D8 D9 CB 8D 0C 17 DC 4D E0 D9 CB DE CE D9 CD 8D 34 0F DE E2 01 F7 D8 C0 D9 C9 D8 C0 D9 CD DE C3 D9 C1 D9 C4 8B 45 14 0F AF 85 D8 FE FF FF 0F AF 55 14 0F AF 4D 14 89 BD A4 FE FF FF 0F AF 75 14 8B 7D 10 D8 E2 D9 C9 D8 E6 D9 CB DE C6 D9 CB DD 1C C7 D9 CA DD 1C D7 DD 1C CF D9 CA DD 1C F7 8B BD A4 FE FF FF 0F AF 7D 14 8B 45 10 8B 55 D0
-***** EXPENSIVE 1677 290
-
-. 1676 8054955 35
-. DE C1 DD 1C F8 FF 45 E8 8D 04 92 8B 4D CC 01 85 C8 FE FF FF 01 95 D8 FE FF FF 39 4D E8 0F 82 D0 FE FF FF
-
-. 1677 8054978 10
-. 83 7D D0 01 0F 84 9C 06 00 00
-
-. 1678 805501E 8
-. 8D 65 F4 5B 5E 5F C9 C3
-
-. 1679 805B15C 5
-. 83 FA 05 74 63
-
-. 1680 805B1C4 52
-. 8B 4D 14 8B 94 B9 08 01 00 00 C1 E0 03 8D 0C 10 8D 34 08 83 EC 08 8D 04 30 50 56 51 52 FF 75 10 FF 75 EC FF 75 D4 FF 75 D8 FF 75 DC FF 75 E0 E8 7C 0C 00 00
-
-. 1681 805BE74 77
-. 55 89 E5 57 56 53 81 EC 84 01 00 00 B9 CD CC CC CC 8B 45 1C F7 E1 C1 EA 02 89 55 E0 8B 45 1C 31 D2 F7 75 18 89 45 DC 8B 45 18 F7 E1 68 2F 1B F4 3F C1 EA 02 E8 00 00 00 00 5B 81 C3 67 52 00 00 68 E0 F0 9C 76 89 55 D8 E8 6F C8 FE FF
-***** EXPENSIVE 1683 291
-
-. 1682 805BEC1 20
-. 5F 58 68 2F 1B E4 3F 68 E0 F0 9C 76 D9 5D D4 E8 5B C8 FE FF
-***** EXPENSIVE 1684 292
-
-. 1683 805BED5 25
-. C7 45 E4 00 00 00 00 8B 55 DC 83 C4 10 39 55 E4 D9 5D D0 0F 83 BD 01 00 00
-***** EXPENSIVE 1685 293
-
-. 1684 805BEEE 182
-. 8B 45 D8 D1 E0 DD 83 C4 F8 FF FF DD 83 CC F8 FF FF D9 C9 89 45 9C 48 DD 9D B8 FE FF FF DD 9D B0 FE FF FF 89 85 94 FE FF FF C7 85 90 FE FF FF 00 00 00 00 C7 85 8C FE FF FF 00 00 00 00 90 8B 95 8C FE FF FF 03 55 E0 8B 75 E0 8D 0C 16 8D 34 0E 8B 7D E0 01 F7 8B 45 0C 89 BD 7C FE FF FF 0F AF 85 8C FE FF FF 8B 7D 08 D9 04 87 0F AF 55 0C 0F AF 4D 0C 0F AF 75 0C D9 04 97 D9 04 B7 D9 CA D9 5D CC D9 04 8F 8B BD 7C FE FF FF 0F AF 7D 0C 8B 45 08 D9 5D C4 D9 04 B8 D9 C9 D9 55 C8 D8 C1 D9 5D C0 D8 6D C8 D9 45 C4 D8 C2 D9 C9 D9 5D B8 D9 45 C0 D8 C1 D9 CA
-***** EXPENSIVE 1686 294
-
-. 1685 805BFA4 148
-. D8 6D C4 D9 CA D9 5D B0 D9 5D BC D9 55 B4 DD 85 B8 FE FF FF D9 FA D9 45 C0 D8 65 BC D9 C9 DC 8D B0 FE FF FF DE C9 D9 5D AC DD 85 B0 FE FF FF D8 4D B0 D8 6D CC D9 5D A8 D9 45 A8 D8 45 AC D9 5D A4 D9 45 D4 D9 E0 D8 4D B8 D9 5D A0 D9 45 D0 D8 C9 D9 45 A8 D9 C9 D8 6D A0 D9 C9 D8 65 AC D9 C9 D9 5D A0 D9 45 D0 D9 C9 D9 5D A8 D9 E0 D9 45 D4 D9 C9 D8 4D B8 D9 C9 DE CA DE C1 8B 45 14 D9 45 CC 0F AF 85 90 FE FF FF D8 45 B0 8B 4D 10 D9 1C 81 8B 45 14
-***** EXPENSIVE 1687 295
-
-. 1686 805C038 115
-. 0F AF 85 94 FE FF FF 8B 95 94 FE FF FF D9 45 A4 03 55 9C D9 1C 81 8B 8D 94 FE FF FF 8D 04 8D 04 00 00 00 0F AF 45 14 8B 75 10 D9 45 A0 D9 1C 30 8B 45 14 0F AF C2 D9 45 A8 D9 1C 86 8D 14 95 04 00 00 00 8B 45 18 0F AF 55 14 01 C1 D9 1C 32 89 8D 94 FE FF FF 8B 55 D8 FF 45 E4 8B 4D DC 01 85 90 FE FF FF 01 95 8C FE FF FF 39 4D E4 0F 82 81 FE FF FF
-
-. 1687 805C0AB 10
-. 83 7D D8 01 0F 84 4F 08 00 00
-
-. 1688 805C904 8
-. 8D 65 F4 5B 5E 5F C9 C3
-***** EXPENSIVE 1690 296
-vex iropt: not unrolling (64 sts)
-
-. 1689 80584CC 64
-. 8B 4D 08 8B 14 F1 D9 07 8B 45 0C 89 54 F0 04 D9 14 F0 8B 45 14 2B 45 F0 0F AF 45 10 8B 4D 0C 81 F2 00 00 00 80 FF 45 F0 D9 1C C1 89 54 C1 04 8B 45 14 2B 45 F0 03 75 10 03 7D EC 39 45 F0 72 C0
-
-. 1690 8056263 5
-. 83 F9 05 74 74
-
-. 1691 80562DC 53
-. 8B 4D D8 8B 7D 14 8B 94 8F 08 01 00 00 C1 E0 03 8D 0C 10 8D 3C 08 83 EC 08 8D 04 38 50 57 51 52 56 FF 75 DC FF 75 E0 FF 75 E8 FF 75 E4 FF 75 EC E8 D7 0C 00 00
-
-. 1692 8056FE8 39
-. 55 89 E5 57 56 53 81 EC 44 01 00 00 68 2F 1B F4 3F E8 00 00 00 00 5B 81 C3 16 A1 00 00 68 E0 F0 9C 76 E8 21 17 FF FF
-***** EXPENSIVE 1694 297
-
-. 1693 805700F 20
-. 59 5E 68 2F 1B E4 3F 68 E0 F0 9C 76 D9 5D E0 E8 0D 17 FF FF
-***** EXPENSIVE 1695 298
-
-. 1694 8057023 58
-. B9 05 00 00 00 31 D2 8B 45 1C F7 F1 89 45 D8 31 D2 8B 45 1C F7 75 18 89 45 D4 31 D2 8B 45 18 F7 F1 C7 45 E4 00 00 00 00 83 C4 10 39 45 E4 D9 5D DC 89 45 D0 0F 83 8F 01 00 00
-***** EXPENSIVE 1696 299
-
-. 1695 805705D 187
-. 8B 45 D4 DD 83 C4 F8 FF FF DD 83 CC F8 FF FF D9 C9 D1 E0 DD 9D F0 FE FF FF DD 9D E8 FE FF FF 89 45 CC C7 85 D8 FE FF FF 00 00 00 00 C7 85 CC FE FF FF 00 00 00 00 90 8B 95 CC FE FF FF 8B 4D CC 8D 44 11 FF 8B 55 0C 8B 75 08 0F AF 95 CC FE FF FF D9 04 96 8B 55 0C 8D 0C 01 0F AF D0 8D 04 85 04 00 00 00 0F AF 45 0C D9 04 30 8B 45 0C 0F AF C1 D9 04 96 D9 04 86 D9 C1 8D 0C 8D 04 00 00 00 0F AF 4D 0C D8 C1 D9 CC D9 5D C8 D9 04 31 D9 CC D8 C0 DD 85 F0 FE FF FF D9 FA DC 8D E8 FE FF FF D9 CB DE E2 D9 CA D8 C0 DE C9 D9 5D EC DD 85 E8 FE FF FF D8 C9 D8 6D C8 D9 5D BC
-***** EXPENSIVE 1697 300
-
-. 1696 8057118 139
-. D9 45 EC D9 45 BC D8 C1 D9 C9 D8 6D BC D9 C9 D9 5D B8 D9 5D B4 D9 45 DC D9 45 E0 D8 CB D9 C9 D8 CC DE C1 D9 45 DC DE CB 8B 95 D8 FE FF FF D9 45 E0 03 55 D8 8B 45 D8 DE CC D9 CA 8D 0C 10 DE E3 D8 45 C8 D9 45 B4 D9 CB 8D 34 08 D8 C0 D9 C9 01 F0 D9 5D C8 D9 C9 D8 C0 D9 45 B8 D9 CB D8 E2 D9 CA 8B 7D 14 D8 45 B4 D9 CB 0F AF BD D8 FE FF FF 0F AF 55 14 0F AF 4D 14 D8 E1 D9 CB D9 5D B4 D8 45 B8 89 85 BC FE FF FF D9 45 C8
-***** EXPENSIVE 1698 301
-
-. 1697 80571A3 73
-. 8B 45 10 D9 1C B8 D9 55 B8 D9 CA D9 1C 90 D9 1C 88 8B BD BC FE FF FF 0F AF 75 14 0F AF 7D 14 8B 55 D4 D9 45 B4 D9 1C B0 FF 45 E4 D9 1C B8 8B 4D D0 8D 04 92 01 85 CC FE FF FF 01 95 D8 FE FF FF 39 4D E4 0F 82 A8 FE FF FF
-
-. 1698 80571EC 10
-. 83 7D D4 01 0F 84 39 07 00 00
-
-. 1699 805792F 8
-. 8D 65 F4 5B 5E 5F C9 C3
-
-. 1700 804D445 9
-. 83 F9 06 0F 84 E0 00 00 00
-
-. 1701 804D52E 67
-. 8B 55 14 8B 4D EC 8B 8C 8A 08 01 00 00 C1 E0 04 89 4D E4 01 C1 89 CF 01 C7 8D 14 38 89 4D E0 8D 0C 10 51 52 57 FF 75 E0 FF 75 E4 56 FF 75 E8 FF 75 1C FF 75 C8 FF 75 CC FF 75 D0 FF 75 D4 E8 F3 0E 00 00
-***** EXPENSIVE 1703 302
-
-. 1702 804E464 136
-. 55 89 E5 57 56 53 81 EC 5C 01 00 00 B9 AB AA AA AA 8B 45 20 F7 E1 C1 EA 02 89 55 DC 8B 45 20 31 D2 F7 75 1C 89 45 D8 8B 45 1C F7 E1 89 95 A4 FE FF FF C1 EA 02 E8 00 00 00 00 5B 81 C3 76 2C 01 00 89 55 D4 8D 14 92 8B 75 08 8B 7D 10 C7 45 EC 00 00 00 00 C7 45 E8 00 00 00 00 89 85 A0 FE FF FF 89 55 D0 DD 83 B4 F8 FF FF D9 FA C7 45 E4 00 00 00 00 8B 45 D8 DC 8B BC F8 FF FF 39 45 E4 DD 5D C8 0F 83 BD 04 00 00
-
-. 1703 804E4EC 31
-. C7 85 AC FE FF FF 00 00 00 00 C7 85 A8 FE FF FF 00 00 00 00 8B 4D E4 85 C9 0F 85 AB 04 00 00
-***** EXPENSIVE 1705 303
-
-. 1704 804E50B 82
-. DD 83 34 F6 FF FF DD 83 44 F6 FF FF D9 C9 DD 55 C0 D9 C9 DD 55 B8 D9 C9 DD 55 B0 D9 C9 DD 55 A8 D9 C9 DD 55 A0 D9 C9 DD 55 98 D9 C9 DD 55 90 D9 C9 DD 55 88 D9 C9 DD 5D 80 DD 9D 78 FF FF FF C7 45 E0 00 00 00 00 8B 45 D4 39 45 E0 0F 83 30 04 00 00
-***** EXPENSIVE 1706 304
-
-. 1705 804E55D 193
-. 8B 55 DC D1 E2 8B 45 DC C1 E0 02 89 95 64 FF FF FF 03 55 DC 89 95 54 FF FF FF 89 85 3C FF FF FF 8B 55 D4 03 45 DC C1 E2 02 89 85 2C FF FF FF 8B 45 D4 D1 E0 DD 45 C8 89 95 B4 FE FF FF 8B 4D E8 03 55 D4 DA 4D 18 89 85 BC FE FF FF 89 95 B0 FE FF FF 03 45 D4 0F AF 4D 14 8B 95 A8 FE FF FF DD 9D 20 FF FF FF 89 85 B8 FE FF FF C1 E1 04 C1 E2 04 89 F6 8B 45 EC 03 45 DC 0F AF 45 0C C1 E0 04 DD 04 06 DD 44 06 08 8B 45 EC 03 85 64 FF FF FF 0F AF 45 0C C1 E0 04 DD 04 06 D9 CA DD 9D 70 FF FF FF DD 44 06 08 D9 C9 8B 45 EC 03 85 54 FF FF FF 0F AF 45 0C C1 E0 04 DD 9D 68 FF FF FF DD 04 06
-***** EXPENSIVE 1707 305
-
-. 1706 804E61E 186
-. DD 9D 58 FF FF FF DD 44 06 08 8B 45 EC 03 85 3C FF FF FF 0F AF 45 0C C1 E0 04 DD 9D 48 FF FF FF DD 04 06 DD 9D 40 FF FF FF DD 44 06 08 DD 9D 30 FF FF FF 8B 45 EC 03 85 2C FF FF FF DD 85 40 FF FF FF DD 85 30 FF FF FF D9 C9 0F AF 45 0C D8 C3 D9 C9 D8 C2 DD 83 BC F8 FF FF DD 83 BC F8 FF FF D9 C9 C1 E0 04 D8 CB D9 C9 D8 CA D9 CB DC 04 16 D9 CD DC A5 40 FF FF FF D9 CC DC A5 30 FF FF FF DD 04 06 DD 44 06 08 D9 CB DC 2C 16 D9 CD DC 6C 16 08 D9 CE DC 8D 20 FF FF FF D9 CA DC 8D 20 FF FF FF D9 CF DD 9D 18 FF FF FF D9 CB DC 44 16 08 DD 9D 10 FF FF FF D9 C3 D8 E6
-***** EXPENSIVE 1708 306
-
-. 1707 804E6D8 209
-. D9 CC DE C6 DD 85 70 FF FF FF D8 C3 DD 9D 08 FF FF FF DD 85 68 FF FF FF D8 C2 DD 95 00 FF FF FF DC 8B BC F8 FF FF DC AD 48 FF FF FF DD 9D 98 FE FF FF D9 C4 DD 85 58 FF FF FF D9 C9 D8 C2 D9 CE DE E2 DC 85 08 FF FF FF DD 85 08 FF FF FF D9 C9 DD 9D F8 FE FF FF DC 8B BC F8 FF FF DD 85 48 FF FF FF D9 C9 DC AD 58 FF FF FF D9 C9 DC 85 00 FF FF FF D9 CB DC A5 68 FF FF FF DC 8D 20 FF FF FF D9 CB DD 9D F0 FE FF FF D9 C0 D8 E3 D9 CC DC A5 70 FF FF FF D9 C9 DE C3 DC 8D 20 FF FF FF D9 CB DD 9D E8 FE FF FF DD 85 18 FF FF FF DD 85 98 FE FF FF D8 C4 D9 C9 DC 85 F8 FE FF FF DD 1C 0F DD 9D E0 FE FF FF DD 85 E8 FE FF FF DD 85 10 FF FF FF
-***** EXPENSIVE 1709 307
-
-. 1708 804E7A9 168
-. D9 CC DC AD 98 FE FF FF D9 CC DC 85 F0 FE FF FF D9 C9 D8 C5 D9 C9 DD 5C 0F 08 D9 CB DD 9D 98 FE FF FF D9 CA DD 9D D8 FE FF FF DD 85 E0 FE FF FF D8 C4 DD 9D D0 FE FF FF DD 85 18 FF FF FF DC A5 F8 FE FF FF DD 9D C8 FE FF FF DD 85 10 FF FF FF DC A5 F0 FE FF FF D9 C5 8B 45 E8 D8 C2 D9 C9 DD 9D C0 FE FF FF D9 CB DC A5 E8 FE FF FF D9 CC DC A5 E0 FE FF FF D9 CD DE E1 03 45 D4 DD 45 C0 DD 45 B8 0F AF 45 14 D8 CE D9 C9 D8 CD D9 CE DC 4D C0 D9 CD DC 4D B8 D9 CE C1 E0 04 DE E1 D9 CC DE C5 D9 CB DD 1C 07 D9 CB
-***** EXPENSIVE 1710 308
-
-. 1709 804E851 169
-. DD 5C 07 08 DD 85 98 FE FF FF 8B 45 E8 D8 C3 03 85 BC FE FF FF DD 45 B0 DD 45 A8 0F AF 45 14 D8 CA D9 C9 D8 CB D9 CA DC 4D B0 D9 CB DC 4D A8 D9 CA C1 E0 04 DE E1 D9 CA DE C1 D9 C9 DD 1C 07 DD 5C 07 08 8B 45 E8 03 85 B8 FE FF FF DD 45 A0 DD 45 98 0F AF 45 14 DC 8D C0 FE FF FF D9 C9 DC 8D C8 FE FF FF C1 E0 04 DE E1 D9 CA DC A5 98 FE FF FF D9 CA DD 1C 07 DD 45 A0 DD 45 98 DC 8D C8 FE FF FF D9 C9 DC 8D C0 FE FF FF DE C1 DD 5C 07 08 8B 45 E8 03 85 B4 FE FF FF DD 45 90 DD 45 88 0F AF 45 14 DC 8D D0 FE FF FF
-***** EXPENSIVE 1711 309
-
-. 1710 804E8FA 147
-. D9 C9 DC 8D D8 FE FF FF C1 E0 04 DE E1 DD 1C 07 DD 45 90 DD 45 88 DC 8D D8 FE FF FF D9 C9 DC 8D D0 FE FF FF DE C1 DD 5C 07 08 8B 45 E8 03 85 B0 FE FF FF DD 45 80 DD 85 78 FF FF FF D9 C9 0F AF 45 14 D8 CA D9 C9 D8 CB D9 CA DC 8D 78 FF FF FF D9 CB DC 4D 80 D9 C9 C1 E0 04 DE E2 DE C2 DD 1C 07 DD 5C 07 08 8B 45 0C C1 E0 04 01 C2 8B 45 0C 01 85 A8 FE FF FF 8B 45 14 C1 E0 04 FF 45 EC 01 C1 FF 45 E8 FF 45 E0 8B 45 D4 39 45 E0 0F 82 43 FC FF FF
-
-. 1711 804E98D 28
-. 8B 55 D0 FF 45 E4 8B 45 D8 01 55 E8 83 85 AC FE FF FF 10 39 45 E4 0F 82 57 FB FF FF
-
-. 1712 804E9A9 13
-. 81 C4 5C 01 00 00 5B 5E 31 C0 5F C9 C3
-
-. 1713 804D571 5
-. E9 0A FF FF FF
-
-. 1714 80508E9 9
-. 83 F9 06 0F 84 DC 00 00 00
-
-. 1715 80509CE 67
-. 8B 7D 14 8B 4D EC 8B 8C 8F 08 01 00 00 C1 E0 03 89 4D E4 01 C1 89 CF 01 C7 8D 14 38 89 4D E0 8D 0C 10 51 52 57 FF 75 E0 FF 75 E4 56 FF 75 E8 FF 75 1C FF 75 C8 FF 75 CC FF 75 D0 FF 75 D4 E8 27 0E 00 00
-***** EXPENSIVE 1717 310
-
-. 1716 8051838 136
-. 55 89 E5 57 56 53 81 EC 0C 01 00 00 B9 AB AA AA AA 8B 45 20 F7 E1 C1 EA 02 89 55 D8 8B 45 20 31 D2 F7 75 1C 89 45 D4 8B 45 1C F7 E1 89 95 EC FE FF FF C1 EA 02 E8 00 00 00 00 5B 81 C3 A2 F8 00 00 89 55 D0 8D 14 92 8B 75 08 8B 7D 10 C7 45 E8 00 00 00 00 C7 45 E4 00 00 00 00 89 85 E8 FE FF FF 89 55 CC DD 83 B4 F8 FF FF D9 FA C7 45 E0 00 00 00 00 8B 45 D4 DC 8B BC F8 FF FF 39 45 E0 D9 5D C8 0F 83 D0 04 00 00
-
-. 1717 80518C0 23
-. C7 85 F4 FE FF FF 00 00 00 00 89 F6 8B 4D E0 85 C9 0F 85 C6 04 00 00
-***** EXPENSIVE 1719 311
-
-. 1718 80518D7 79
-. D9 83 4C F6 FF FF D9 83 50 F6 FF FF D9 C9 D9 55 C4 D9 C9 D9 55 C0 D9 C9 D9 55 BC D9 C9 D9 55 B8 D9 C9 D9 55 B4 D9 C9 D9 55 B0 D9 C9 D9 55 AC D9 C9 D9 55 A8 D9 C9 D9 5D A4 D9 5D A0 C7 45 DC 00 00 00 00 8B 45 D0 39 45 DC 0F 83 4E 04 00 00
-***** EXPENSIVE 1720 312
-
-. 1719 8051926 177
-. 8B 55 D8 C1 E2 02 8B 45 D8 D1 E0 89 55 84 03 55 D8 89 45 94 89 95 78 FF FF FF 03 45 D8 8B 55 D0 D9 83 EC F8 FF FF C1 E2 02 89 45 8C 8B 45 D0 D1 E0 D9 9D F8 FE FF FF 89 95 00 FF FF FF D9 45 C8 03 55 D0 DA 4D 18 89 85 08 FF FF FF 89 95 FC FE FF FF 03 45 D0 8B 55 E4 8B 4D E8 D9 9D 5C FF FF FF 89 85 04 FF FF FF 0F AF 55 14 0F AF 4D 0C 8D 76 00 8B 45 E8 03 45 D8 0F AF 45 0C D9 04 C6 D9 44 C6 04 8B 45 E8 03 45 94 0F AF 45 0C D9 04 C6 D9 CA D9 5D 9C D9 44 C6 04 8B 45 E8 03 45 8C 0F AF 45 0C D9 04 C6 D9 CA D9 5D 98 D9 44 C6 04 D9 CA
-***** EXPENSIVE 1721 313
-
-. 1720 80519D7 192
-. 8B 45 E8 03 45 84 0F AF 45 0C D9 5D 90 D9 C9 D9 5D 88 D9 04 C6 D9 44 C6 04 8B 45 E8 03 85 78 FF FF FF 0F AF 45 0C D9 5D 80 D9 04 C6 D9 9D 7C FF FF FF D9 44 C6 04 D9 9D 74 FF FF FF D9 C2 D8 C1 D9 9D 70 FF FF FF D9 45 80 D8 C2 D9 9D 6C FF FF FF D9 85 70 FF FF FF D8 8D F8 FE FF FF D9 04 CE DE E1 D9 85 6C FF FF FF D8 8D F8 FE FF FF D9 9D 60 FF FF FF D9 44 CE 04 D8 A5 60 FF FF FF D9 CC DE E2 D9 04 CE D9 CC D9 9D 64 FF FF FF D9 CB D8 85 70 FF FF FF D9 44 CE 04 D9 CB D8 65 80 D8 8D 5C FF FF FF D9 CB D8 85 6C FF FF FF D9 C9 D9 9D 58 FF FF FF D9 C3 D9 CA D8 8D 5C FF FF FF D9 CA
-***** EXPENSIVE 1722 314
-
-. 1721 8051A97 187
-. D8 E3 D9 C9 D9 9D 54 FF FF FF D9 85 64 FF FF FF D8 C2 D9 C9 D9 9D 50 FF FF FF D9 C9 D8 AD 64 FF FF FF D9 85 7C FF FF FF D9 85 74 FF FF FF D9 85 7C FF FF FF D9 CE DE C5 D9 C9 D8 45 9C D9 C9 D8 45 98 D9 CD D8 65 9C D9 CB D9 9D 4C FF FF FF D9 C9 D9 9D 44 FF FF FF D9 85 F8 FE FF FF D9 85 F8 FE FF FF D9 85 5C FF FF FF DE CC D8 CA D9 C9 D8 CD D9 C9 D8 6D 90 D9 C9 D8 6D 88 D9 CC D9 95 48 FF FF FF D9 CB D9 9D 40 FF FF FF D9 85 74 FF FF FF D8 65 98 D9 85 5C FF FF FF DE C9 D9 9D 3C FF FF FF D9 85 3C FF FF FF D8 E9 D9 9D 38 FF FF FF D9 85 40 FF FF FF D8 C4 D9 45 90
-***** EXPENSIVE 1723 315
-
-. 1722 8051B52 208
-. D9 C9 D9 9D 34 FF FF FF DE C2 D9 85 58 FF FF FF D8 C2 D9 45 88 D9 C9 D9 1C D7 DE C5 D9 85 54 FF FF FF D8 C5 D9 5C D7 04 D9 85 50 FF FF FF D8 85 38 FF FF FF D9 9D 30 FF FF FF D9 85 4C FF FF FF D8 85 34 FF FF FF D9 C9 D8 85 3C FF FF FF D9 C9 D9 9D 2C FF FF FF DC C2 D9 CB D8 A5 40 FF FF FF D9 CA D9 9D 28 FF FF FF D9 85 44 FF FF FF D8 C2 D9 CC D8 AD 54 FF FF FF D9 C9 D8 AD 58 FF FF FF D9 CC D9 9D 24 FF FF FF D9 9D 1C FF FF FF D9 85 4C FF FF FF D9 85 50 FF FF FF D9 CB D8 AD 48 FF FF FF D9 CB D8 A5 38 FF FF FF D9 C9 D8 A5 34 FF FF FF D9 CC D9 95 20 FF FF FF D9 CB D9 9D 10 FF FF FF D9 C9 D8 AD 44 FF FF FF D9 9D 0C FF FF FF
-***** EXPENSIVE 1724 316
-
-. 1723 8051C22 157
-. 8B 45 E4 D9 45 C4 D9 45 C0 03 45 D0 D8 CC D9 C9 D8 CA 0F AF 45 14 DE E1 D9 1C C7 D9 45 C4 DE CB D9 45 C0 DE C9 DE C2 D9 C9 D9 5C C7 04 D9 45 B8 8B 45 E4 D9 45 BC D9 C9 03 85 08 FF FF FF D8 8D 24 FF FF FF D9 C9 D8 8D 28 FF FF FF 0F AF 45 14 DE E1 D9 1C C7 D9 45 B8 D9 45 BC D9 C9 D8 8D 28 FF FF FF D9 C9 D8 8D 24 FF FF FF DE C1 D9 5C C7 04 D9 45 B0 8B 45 E4 D9 45 B4 D9 C9 03 85 04 FF FF FF D8 8D 1C FF FF FF D9 C9 D8 CA 0F AF 45 14 DE E1 D9 1C C7 D9 45 B4 D9 45 B0 D9 C9
-***** EXPENSIVE 1725 317
-
-. 1724 8051CBF 172
-. D8 8D 1C FF FF FF D9 C9 DE CA DE C1 D9 5C C7 04 8B 45 E4 D9 45 AC D9 45 A8 D9 45 AC D9 45 A8 D9 CA 03 85 00 FF FF FF D8 8D 2C FF FF FF D9 CB D8 8D 30 FF FF FF D9 C9 D8 8D 2C FF FF FF D9 CA D8 8D 30 FF FF FF D9 C9 0F AF 45 14 DE E3 DE C1 D9 C9 D9 1C C7 D9 5C C7 04 D9 45 A4 8B 45 E4 D9 45 A0 D9 C9 03 85 FC FE FF FF D8 8D 10 FF FF FF D9 C9 D8 8D 0C FF FF FF 0F AF 45 14 DE E9 D9 1C C7 D9 45 A0 D9 45 A4 D8 8D 0C FF FF FF D9 C9 D8 8D 10 FF FF FF DE C1 D9 5C C7 04 FF 45 DC 8B 45 D0 03 4D 0C FF 45 E8 03 55 14 FF 45 E4
-
-. 1725 8051D6B 9
-. 39 45 DC 0F 82 24 FC FF FF
-
-. 1726 8051D74 28
-. 8B 55 CC FF 45 E0 8B 45 D4 01 55 E4 83 85 F4 FE FF FF 08 39 45 E0 0F 82 3C FB FF FF
-
-. 1727 8051D90 13
-. 81 C4 0C 01 00 00 5B 5E 31 C0 5F C9 C3
-
-. 1728 8050A11 5
-. E9 0E FF FF FF
-
-. 1729 8058725 74
-. 8B 55 CC 8B 45 E0 8B 44 82 08 89 45 C4 8B 45 AC 03 82 08 02 00 00 8B 4D E0 89 84 8A 08 01 00 00 8B 4D D8 89 C8 0F AF 45 C4 89 45 D8 31 D2 8B 45 08 F7 75 D8 C7 45 C8 01 00 00 00 8B 55 C4 39 55 C8 89 45 C0 0F 83 B0 00 00 00
-***** EXPENSIVE 1731 318
-
-. 1730 8058798 57
-. 8B 7D A8 90 8B 45 B0 01 45 B8 8B 45 B8 31 D2 F7 75 08 89 55 B8 31 D2 52 8B 45 B8 50 DF 2C 24 DC 4D D0 83 EC 08 8B 4D CC 8B B1 08 02 00 00 DD 55 98 DD 1C 24 E8 4F FE FE FF
-***** EXPENSIVE 1732 319
-
-. 1731 80587D1 23
-. DD 1C 3E 8B 45 CC DD 45 98 8B B0 08 02 00 00 DD 1C 24 E8 48 FF FE FF
-***** EXPENSIVE 1733 320
-
-. 1732 80587E8 34
-. 8B 45 B4 FF 45 BC D1 E8 DD 5C 3E 08 83 45 AC 10 83 C7 10 83 45 A8 10 FF 45 DC 83 C4 10 39 45 BC 72 92
-***** EXPENSIVE 1734 321
-vex iropt: not unrolling (113 sts)
-
-. 1733 8058F48 127
-. 8B 55 E4 8D 04 3A 01 C2 8B 4D 0C 0F AF CF 89 95 7C FF FF FF 8B 55 08 DD 04 CA 0F AF 45 0C 8B 8D 7C FF FF FF DD 04 C2 0F AF 4D 0C DD 04 CA D9 C1 D8 C1 D9 C3 8B 45 14 0F AF 45 88 8B 4D 10 D8 C1 DD 1C C1 DC 8B BC F8 FF FF 8B 45 14 0F AF C6 DE EB D9 CA DD 1C C1 DE E1 8D 04 F5 08 00 00 00 0F AF 45 14 D8 C9 DD 1C 08 FF 45 E8 8B 45 18 8B 55 E0 03 75 18 01 45 88 03 7D DC 39 55 E8 72 81
-
-. 1734 8058AA8 33
-. 8B 45 EC 8B 75 14 89 C1 8B 54 BE 08 0F AF CA 40 D1 E8 89 4D EC 8B 4D E4 48 85 C9 0F 85 6F 01 00 00
-
-. 1735 8058C38 37
-. 8B 4D E8 89 4D E0 8B 75 08 8B 4D 0C C7 45 DC 01 00 00 00 89 75 D8 89 4D D4 C7 45 E4 00 00 00 00 E9 8C FE FF FF
-
-. 1736 8058AE9 9
-. 83 FA 02 0F 84 1E 01 00 00
-
-. 1737 8058D16 27
-. 8B 55 E4 42 89 D0 C7 45 F4 01 00 00 00 D1 E8 39 45 F4 89 55 E0 0F 83 12 01 00 00
-***** EXPENSIVE 1739 322
-
-. 1738 8058D31 51
-. 8B 4D 20 8B 75 18 83 C1 10 83 EE 02 89 4D D8 89 75 D4 90 8B 45 D8 C7 45 F0 00 00 00 00 8B 55 E8 DD 40 F8 39 55 F0 DD 40 F0 D9 C9 D9 E0 0F 83 6C 01 00 00
-***** EXPENSIVE 1740 323
-
-. 1739 8058D64 147
-. 8B 4D F4 8B 7D D4 8D 74 09 FF 4F 89 F1 8D 76 00 8B 45 EC 01 C8 8B 55 0C 0F AF D1 89 45 C8 8B 45 08 DD 04 D0 8D 04 CD 08 00 00 00 0F AF 45 0C 8B 55 08 DD 04 10 8B 45 0C 0F AF 45 C8 DD 04 C2 8B 45 C8 8D 14 C5 08 00 00 00 0F AF 55 0C 8B 45 08 DD 04 02 D9 C5 D9 C5 D8 CA D9 C9 D8 CB DE E1 D9 C6 DE CA D9 CA D8 CD DE C1 8B 45 14 D9 C3 0F AF C6 8B 55 10 D8 C2 DD 1C C2 D9 C2 8D 04 F5 08 00 00 00 0F AF 45 14 D8 C1 DD 1C 10 D9 CB 8B 45 14 0F AF C7
-***** EXPENSIVE 1741 324
-
-. 1740 8058DF7 47
-. DE E1 DD 1C C2 DE E1 8D 04 FD 08 00 00 00 0F AF 45 14 D9 E0 DD 1C 10 FF 45 F0 8B 45 E8 03 7D 18 03 75 18 03 4D E4 39 45 F0 0F 82 4E FF FF FF
-***** EXPENSIVE 1742 325
-
-. 1741 8058E26 29
-. DD D8 DD D8 8B 45 E0 FF 45 F4 D1 E8 83 45 D8 10 83 6D D4 02 39 45 F4 0F 82 01 FF FF FF
-
-. 1742 8058E43 9
-. F7 45 E4 01 00 00 00 75 7D
-
-. 1743 80536D9 77
-. 8B 45 C4 8B 75 E0 8B 74 B0 08 8B 55 C4 8B 45 A8 03 82 08 02 00 00 89 75 BC 8B 75 E0 89 84 B2 08 01 00 00 8B 45 D8 89 C2 0F AF 55 BC 89 55 D8 89 45 D4 31 D2 8B 45 08 C7 45 C0 01 00 00 00 8B 75 BC F7 75 D8 39 75 C0 0F 83 B8 00 00 00
-
-. 1744 8053F8B 27
-. 8B 55 D8 42 89 D0 C7 45 EC 01 00 00 00 D1 E8 39 45 EC 89 55 94 0F 83 06 02 00 00
-
-. 1745 80541AC 13
-. F7 45 D8 01 00 00 00 0F 85 B5 00 00 00
-
-. 1746 80541B9 19
-. C7 45 E8 00 00 00 00 8B 75 D4 39 75 E8 0F 83 A2 00 00 00
-***** EXPENSIVE 1748 326
-
-. 1747 80541CC 142
-. 8B 45 D8 48 DD 45 E0 D8 C0 89 45 90 89 C7 89 F6 8B 45 0C 0F AF C7 8B 4D 08 8B 75 D8 DD 04 C1 D1 E6 8D 04 FD 08 00 00 00 8D 14 3E 0F AF 45 0C D9 C1 DC 0C 08 0F AF 55 0C 8B 45 90 DD 04 D1 03 45 DC 8B 55 DC 01 C2 D9 C2 8B 4D 14 D8 C0 D9 CB 0F AF 4D 90 D8 E1 D9 CB DE C1 89 95 74 FF FF FF 8B 55 10 DD 1C CA D9 C1 8B 8D 74 FF FF FF D9 E0 D9 CA 0F AF 4D 14 0F AF 45 14 D8 E1 D9 CA DE E1 D9 C9 DD 1C C2 DD 1C CA 8B 4D D8 01 CE 01 F7
-
-. 1748 805425A 18
-. FF 45 E8 8B 75 D4 01 4D 90 39 75 E8 0F 82 70 FF FF FF
-***** EXPENSIVE 1750 327
-
-. 1749 805426C 13
-. DD D8 81 C4 84 00 00 00 5B 5E 5F C9 C3
-
-. 1750 8053A04 41
-. 8B 55 D8 8B 75 14 8B 4C 96 08 8B 45 DC 0F AF C1 89 45 DC 31 D2 89 F8 F7 75 DC 40 D1 E8 8B 75 D0 48 85 F6 0F 85 7B 01 00 00
-
-. 1751 8053BA8 37
-. 8B 75 F0 89 75 EC 8B 55 08 8B 75 0C C7 45 E4 01 00 00 00 89 55 E8 89 75 E0 C7 45 D0 00 00 00 00 E9 80 FE FF FF
-
-. 1752 8053A4D 9
-. 83 F9 02 0F 84 2A 01 00 00
-***** EXPENSIVE 1754 328
-vex iropt: not unrolling (72 sts)
-
-. 1753 8053C48 74
-. 8B 45 0C 0F AF C1 C1 E0 04 8B 7D 08 DD 04 07 8B 45 0C 0F AF C2 DD 04 38 D9 C1 8B 45 14 0F AF C1 8B 7D 10 D8 C1 DD 1C C7 8B 7D E8 8D 04 0F 0F AF 45 14 DE E9 8B 7D 10 DD 1C C7 FF 45 EC 8B 45 D8 01 F2 03 4D E0 39 45 EC 72 B6
-***** EXPENSIVE 1755 329
-
-. 1754 805AE64 45
-. 03 7D AC 89 F8 31 D2 F7 75 08 89 D7 31 D2 52 57 DF 2C 24 DC 4D C8 83 EC 08 8B 4D C4 8B B1 08 02 00 00 DD 55 98 DD 1C 24 E8 8F D7 FE FF
-***** EXPENSIVE 1756 330
-
-. 1755 805AE91 26
-. 8B 45 D8 D9 1C C6 8B 55 C4 DD 45 98 8B B2 08 02 00 00 DD 1C 24 E8 85 D8 FE FF
-***** EXPENSIVE 1757 331
-
-. 1756 805AEAB 27
-. 8B 45 B0 8B 4D D8 FF 45 B4 D1 E8 D9 5C CE 04 83 C4 10 41 39 45 B4 89 4D D8 72 9E
-
-. 1757 805AEC6 5
-. E9 30 FF FF FF
-***** EXPENSIVE 1759 332
-vex iropt: not unrolling (118 sts)
-
-. 1758 805B580 134
-. 8B 4D E4 8D 04 31 01 C1 8B 55 0C 0F AF D6 0F AF 45 0C 89 4D A0 8B 4D 08 D9 04 91 D9 04 81 8B 4D A0 0F AF 4D 0C 8B 45 08 D9 04 88 D9 C1 8B 55 DC 8D 44 57 FF D8 C1 D9 C3 8B 55 14 0F AF D7 8B 4D 10 D8 C1 D9 1C 91 DD 83 BC F8 FF FF 8B 55 14 0F AF D0 DE C9 D9 CA DE E1 D9 C9 8D 04 85 04 00 00 00 0F AF 45 14 DE EA D8 CA D9 C9 D9 1C 91 FF 45 E8 D9 1C 08 8B 45 E0 03 7D 18 03 75 DC 39 45 E8 0F 82 7A FF FF FF
-
-. 1759 805B100 33
-. 8B 45 EC 8B 75 14 89 C1 8B 54 BE 08 0F AF CA 40 D1 E8 89 4D EC 8B 4D E4 48 85 C9 0F 85 63 01 00 00
-
-. 1760 805B284 37
-. 8B 4D E8 89 4D E0 8B 75 08 8B 4D 0C C7 45 DC 01 00 00 00 89 75 D8 89 4D D4 C7 45 E4 00 00 00 00 E9 98 FE FF FF
-
-. 1761 805B141 9
-. 83 FA 02 0F 84 12 01 00 00
-
-. 1762 805B362 27
-. 8B 55 E4 42 89 D0 C7 45 F4 01 00 00 00 D1 E8 39 45 F4 89 55 E0 0F 83 0F 01 00 00
-***** EXPENSIVE 1764 333
-
-. 1763 805B37D 51
-. 8B 4D 20 8B 45 18 83 C1 08 83 E8 02 89 4D DC 89 45 D8 90 8B 55 DC C7 45 F0 00 00 00 00 8B 4D E8 D9 42 FC 39 4D F0 D9 42 F8 D9 C9 D9 E0 0F 83 5E 01 00 00
-***** EXPENSIVE 1765 334
-
-. 1764 805B3B0 146
-. 8B 45 F4 8B 7D D8 8D 74 00 FF 4F 89 F1 8D 76 00 8B 55 EC 01 CA 8B 45 0C 0F AF C1 89 55 D0 8B 55 08 D9 04 82 8D 04 8D 04 00 00 00 0F AF 45 0C D9 04 10 8B 45 0C 0F AF 45 D0 D9 04 82 8B 45 D0 8D 14 85 04 00 00 00 0F AF 55 0C 8B 45 08 D9 04 02 D9 C5 D9 C5 D8 CA D9 C9 D8 CB DE E1 D9 C6 DE CA D9 CA D8 CD DE C1 8B 45 14 D9 C3 0F AF C6 8B 55 10 D8 C2 D9 1C 82 D9 C2 8D 04 B5 04 00 00 00 0F AF 45 14 D8 C1 D9 1C 10 D9 CB 8B 45 14 0F AF C7 DE E1
-***** EXPENSIVE 1766 335
-
-. 1765 805B442 45
-. D9 1C 82 DE E1 8D 04 BD 04 00 00 00 0F AF 45 14 D9 E0 D9 1C 10 FF 45 F0 8B 45 E8 03 7D 18 03 75 18 03 4D E4 39 45 F0 0F 82 51 FF FF FF
-***** EXPENSIVE 1767 336
-
-. 1766 805B46F 29
-. DD D8 DD D8 8B 45 E0 FF 45 F4 D1 E8 83 45 DC 08 83 6D D8 02 39 45 F4 0F 82 04 FF FF FF
-
-. 1767 805B48C 9
-. F7 45 E4 01 00 00 00 75 72
-
-. 1768 8056775 27
-. 8B 55 DC 42 89 D0 C7 45 EC 01 00 00 00 D1 E8 39 45 EC 89 55 AC 0F 83 13 02 00 00
-
-. 1769 80569A3 13
-. F7 45 DC 01 00 00 00 0F 85 B0 00 00 00
-
-. 1770 80569B0 19
-. C7 45 E8 00 00 00 00 8B 75 D8 39 75 E8 0F 83 9D 00 00 00
-***** EXPENSIVE 1772 337
-
-. 1771 80569C3 137
-. 8B 45 DC 48 D9 45 E4 D8 C0 89 45 A8 89 C7 8D 76 00 8B 45 0C 0F AF C7 8B 4D 08 8B 75 DC D9 04 81 D1 E6 8D 04 BD 04 00 00 00 8D 14 3E 0F AF 45 0C D9 C1 D8 0C 08 0F AF 55 0C 8B 45 A8 D9 04 91 03 45 E0 8B 55 E0 01 C2 D9 C2 8B 4D 14 D8 C0 D9 CB 0F AF 4D A8 D8 E1 D9 CB DE C1 89 55 94 8B 55 10 D9 1C 8A D9 C1 8B 4D 94 D9 E0 D9 CA 0F AF 4D 14 0F AF 45 14 D8 E1 D9 CA DE E1 D9 C9 D9 1C 82 D9 1C 8A 8B 4D DC 01 CE 01 F7
-
-. 1772 8056A4C 18
-. FF 45 E8 8B 75 D8 01 4D A8 39 75 E8 0F 82 76 FF FF FF
-***** EXPENSIVE 1774 338
-
-. 1773 8056A5E 10
-. DD D8 83 C4 60 5B 5E 5F C9 C3
-
-. 1774 8056200 40
-. 8B 45 D8 8B 55 14 8B 4C 82 08 8B 7D DC 0F AF F9 31 D2 89 F0 F7 F7 40 D1 E8 8B 55 D0 48 85 D2 89 7D DC 0F 85 78 01 00 00
-
-. 1775 80563A0 37
-. 8B 7D F0 89 7D EC 8B 55 08 8B 7D 0C C7 45 E4 01 00 00 00 89 55 E8 89 7D E0 C7 45 D0 00 00 00 00 E9 83 FE FF FF
-
-. 1776 8056248 9
-. 83 F9 02 0F 84 27 01 00 00
-***** EXPENSIVE 1778 339
-vex iropt: not unrolling (76 sts)
-
-. 1777 8056440 71
-. 8B 45 0C 0F AF C1 8B 7D 08 D9 04 C7 8B 45 0C 0F AF C2 D9 04 38 D9 C1 8B 45 14 0F AF C1 8B 7D 10 D8 C1 D9 1C 87 8B 7D E8 8D 04 0F 0F AF 45 14 DE E9 8B 7D 10 D9 1C 87 FF 45 EC 8B 45 D8 01 F2 03 4D E0 39 45 EC 72 B9
-
-. 1778 804D44E 9
-. 83 F9 07 0F 84 85 00 00 00
-
-. 1779 804D4DC 74
-. 8B 4D 14 8B 55 EC 8B 94 91 08 01 00 00 C1 E0 04 89 55 E4 01 C2 89 D7 01 C7 89 55 E0 8D 14 38 8D 0C 10 83 EC 0C 8D 04 08 50 51 52 57 FF 75 E0 FF 75 E4 56 FF 75 E8 FF 75 1C FF 75 C8 FF 75 CC FF 75 D0 FF 75 D4 E8 82 15 00 00
-
-. 1780 804EAA8 160
-. 55 89 E5 57 56 53 81 EC 84 02 00 00 B8 25 49 92 24 F7 65 20 89 85 98 FD FF FF 8B 45 20 29 D0 89 95 9C FD FF FF D1 E8 03 85 9C FD FF FF C1 E8 02 89 45 DC 31 D2 8B 45 20 F7 75 1C 89 45 D8 B8 25 49 92 24 F7 65 1C 8B 4D 1C 29 D1 89 95 94 FD FF FF D1 E9 03 8D 94 FD FF FF 89 4D D4 C1 6D D4 02 8B 55 D4 68 1F B9 EC 3F 89 85 90 FD FF FF 8D 04 52 E8 00 00 00 00 5B 81 C3 F6 25 01 00 D1 E0 68 40 A1 BB 3B 89 45 D0 8B 75 08 8B 7D 10 C7 45 EC 00 00 00 00 C7 45 E8 00 00 00 00 E8 D8 9A FF FF
-***** EXPENSIVE 1782 340
-
-. 1781 804EB48 20
-. 58 5A 68 1F B9 FC 3F 68 40 A1 BB 3B DD 5D C8 E8 C4 9A FF FF
-***** EXPENSIVE 1783 341
-
-. 1782 804EB5C 20
-. 59 58 68 D7 8A 05 40 68 F0 B8 CC 6C DD 5D C0 E8 B0 9A FF FF
-***** EXPENSIVE 1784 342
-
-. 1783 804EB70 20
-. 58 5A 68 1F B9 EC 3F 68 40 A1 BB 3B DD 5D B8 E8 AC 9B FF FF
-***** EXPENSIVE 1785 343
-
-. 1784 804EB84 20
-. 59 58 68 1F B9 FC 3F 68 40 A1 BB 3B DD 5D B0 E8 98 9B FF FF
-***** EXPENSIVE 1786 344
-
-. 1785 804EB98 20
-. 58 5A 68 D7 8A 05 40 68 F0 B8 CC 6C DD 5D A8 E8 84 9B FF FF
-***** EXPENSIVE 1787 345
-
-. 1786 804EBAC 25
-. C7 45 E4 00 00 00 00 8B 45 D8 83 C4 10 39 45 E4 DD 5D A0 0F 83 21 09 00 00
-
-. 1787 804EBC5 54
-. 8B 55 D4 C1 E2 02 89 95 FC FD FF FF 03 55 D4 89 95 F8 FD FF FF C7 85 A4 FD FF FF 00 00 00 00 C7 85 A0 FD FF FF 00 00 00 00 89 F6 8B 45 E4 85 C0 0F 85 F5 08 00 00
-***** EXPENSIVE 1789 346
-
-. 1788 804EBFB 103
-. DD 83 34 F6 FF FF DD 83 44 F6 FF FF D9 C1 DD 55 98 DD 5D 88 D9 C0 DD 55 90 DD 5D 80 D9 C9 DD 95 78 FF FF FF D9 C1 DD 9D 70 FF FF FF DD 95 68 FF FF FF D9 C1 DD 9D 60 FF FF FF DD 95 58 FF FF FF D9 C1 DD 9D 50 FF FF FF DD 9D 48 FF FF FF DD 9D 40 FF FF FF C7 45 E0 00 00 00 00 8B 45 D4 39 45 E0 0F 83 68 08 00 00
-***** EXPENSIVE 1790 347
-
-. 1789 804EC62 171
-. DD 45 C8 DC 45 C0 8B 45 DC DD 9D E0 FD FF FF D1 E0 DD 45 C0 D8 C0 89 85 2C FF FF FF 03 45 DC DD 83 B4 F8 FF FF D9 C9 DD 9D D8 FD FF FF 89 85 1C FF FF FF DD 45 B0 D9 C9 D1 E0 DD 9D A8 FD FF FF D8 C0 DD 45 B0 89 85 04 FF FF FF 8B 45 18 DD 83 34 F6 FF FF D9 C9 DC 45 A8 D9 CA DD 9D D0 FD FF FF 8B 55 DC DD 45 A0 D9 C9 F7 D8 50 DD 9D B0 FD FF FF D9 C9 DD 9D C8 FD FF FF DD 45 C8 DD 45 A8 D9 CA D8 C0 D9 C9 C1 E2 02 D8 C0 D9 C9 DD 9D B8 FD FF FF 89 95 0C FF FF FF DB 04 24 D9 CA 03 55 DC D8 C0 D9 C9 DD 9D E8 FD FF FF
-***** EXPENSIVE 1791 348
-
-. 1790 804ED0D 196
-. 89 95 08 FF FF FF DD 45 B8 D9 C9 DD 9D C0 FD FF FF D9 C9 DD 9D 80 FE FF FF 8B 45 D4 D1 E0 D8 C0 8B 55 E8 89 85 04 FE FF FF 0F AF 55 14 03 45 D4 DC AD E0 FD FF FF 89 85 00 FE FF FF C1 E2 04 D1 E0 8B 8D A0 FD FF FF DC B5 A8 FD FF FF 83 C4 04 89 85 F4 FD FF FF 89 95 98 FD FF FF C1 E1 04 DD 9D 98 FE FF FF 89 F6 8B 45 EC 03 45 DC 0F AF 45 0C C1 E0 04 DD 04 06 DD 44 06 08 8B 45 EC 03 85 2C FF FF FF 0F AF 45 0C C1 E0 04 DD 04 06 DD 44 06 08 8B 45 EC 03 85 1C FF FF FF 0F AF 45 0C C1 E0 04 DD 04 06 D9 CC DD 9D 38 FF FF FF DD 44 06 08 8B 45 EC 03 85 0C FF FF FF 0F AF 45 0C C1 E0 04 DD 04 06
-***** EXPENSIVE 1792 349
-
-. 1791 804EDD1 200
-. D9 CD DD 9D 20 FF FF FF DD 44 06 08 8B 45 EC 03 85 08 FF FF FF 0F AF 45 0C C1 E0 04 DD 04 06 DD 44 06 08 D9 CE 8B 45 EC 03 85 04 FF FF FF 0F AF 45 0C C1 E0 04 DD 9D 30 FF FF FF DD 04 06 D9 CB DD 9D 10 FF FF FF D9 CA DD 9D 88 FD FF FF DD 85 38 FF FF FF DC 85 88 FD FF FF DD 44 06 08 D9 C9 DD 9D F8 FE FF FF DD 85 30 FF FF FF D8 C1 DD 9D F0 FE FF FF DC AD 30 FF FF FF DD 85 38 FF FF FF DC A5 88 FD FF FF D9 C9 DD 9D E0 FE FF FF D9 C4 D8 C3 D9 CD DE E3 DD 9D E8 FE FF FF DD 85 10 FF FF FF D9 C3 D9 C9 D8 C2 D9 C9 D8 C6 D9 CA DC A5 10 FF FF FF DD 9D 80 FD FF FF D9 C9 DD 95 D0 FE FF FF DC 85 F0 FE FF FF
-***** EXPENSIVE 1793 350
-
-. 1792 804EE99 164
-. D9 CB DE E5 D9 CA DD 9D C8 FE FF FF DD 85 20 FF FF FF DD 85 80 FD FF FF D9 C9 D8 C6 D9 C9 D8 C5 D9 CE DC A5 20 FF FF FF D9 C0 D9 CF DD 9D 78 FE FF FF DD 85 C8 FE FF FF D9 CF D8 C3 D9 CF DC 44 0E 08 D8 C4 D9 CD DD 95 D8 FE FF FF D9 CF DD 9D 88 FE FF FF D9 CE DC 85 F8 FE FF FF DD 04 0E D8 C1 D9 CD DD 9D B8 FE FF FF DD 85 E0 FD FF FF D9 CD D8 C2 D9 CD DC 45 B8 D9 CD DD 9D C0 FE FF FF D9 CC DC B5 A8 FD FF FF DD 85 C8 FE FF FF D9 C9 DC A5 B0 FD FF FF D9 C9 D8 C4 D9 CD D8 C2 D8 C9 D9 C9 DE CD
-***** EXPENSIVE 1794 351
-
-. 1793 804EF3D 205
-. D9 CC DD 9D 60 FE FF FF DD 85 E8 FD FF FF DC 65 C0 DC 65 B8 DD 85 F8 FE FF FF D9 C9 DC B5 A8 FD FF FF D9 C9 D8 E2 D8 C9 DD 9D B0 FE FF FF DD 85 F0 FE FF FF D8 E4 DE C9 DD 9D A8 FE FF FF DD 45 C8 DC A5 D8 FD FF FF DC 45 B8 DC B5 A8 FD FF FF D9 C9 DC A5 D8 FE FF FF D9 CB DC A5 D0 FE FF FF D9 CB D8 C9 D9 CB DE C9 DD 85 D8 FE FF FF DC A5 F8 FE FF FF DD 85 98 FE FF FF DE C9 DD 85 D0 FE FF FF DC A5 F0 FE FF FF D9 C9 DD 9D A0 FE FF FF DD 85 98 FE FF FF DE C9 DD 85 C8 FD FF FF DC 65 A0 D9 C9 DD 9D 90 FE FF FF DC B5 A8 FD FF FF DD 85 88 FE FF FF D9 C9 DC 8D 80 FE FF FF D9 C9 DC 85 E8 FE FF FF D8 C9 DD 9D 88 FE FF FF
-***** EXPENSIVE 1795 352
-
-. 1794 804F00A 204
-. DD 85 78 FE FF FF DC 85 E0 FE FF FF DE C9 DD 9D 78 FE FF FF DD 85 D0 FD FF FF DC 65 A8 DC 45 A0 DC B5 A8 FD FF FF DD 85 E8 FE FF FF D9 C9 DC 8D 80 FE FF FF D9 C9 D8 E7 D8 C9 DD 9D 70 FE FF FF DD 85 E0 FE FF FF DC A5 80 FD FF FF DE C9 DD 9D 68 FE FF FF DD 45 B0 DC A5 C0 FD FF FF DC 65 A0 DC B5 A8 FD FF FF DD 85 80 FD FF FF D9 C9 DC 8D 80 FE FF FF D9 CF D8 E3 D9 C9 D8 E6 D9 C9 D8 CF D9 C9 DE CF DD 85 C8 FD FF FF DC 85 B8 FD FF FF DC B5 A8 FD FF FF DC 8D 80 FE FF FF D9 CB DC A5 E8 FE FF FF D9 CE DC A5 E0 FE FF FF D9 CE D8 CB D9 CE DE CB DD 85 B8 FE FF FF DC 85 60 FE FF FF DD 9D 60 FE FF FF DD 85 B0 FE FF FF
-***** EXPENSIVE 1796 353
-
-. 1795 804F0D6 236
-. D8 C4 8B 95 B4 FE FF FF 8B 85 B0 FE FF FF 81 F2 00 00 00 80 DD 9D 58 FE FF FF DD 85 A8 FE FF FF 89 85 48 FE FF FF 89 95 4C FE FF FF D8 C2 DD 9D 50 FE FF FF 8B 95 AC FE FF FF DD 85 48 FE FF FF DC A5 A0 FE FF FF D9 CD 81 F2 00 00 00 80 8B 85 A8 FE FF FF DC 85 C0 FE FF FF D9 CC DC AD A0 FE FF FF D9 CA DC AD 90 FE FF FF D9 CD DD 9D 48 FE FF FF 89 85 40 FE FF FF 89 95 44 FE FF FF DD 85 40 FE FF FF DC A5 90 FE FF FF DD 9D 40 FE FF FF DD 85 70 FE FF FF D8 C1 DD 9D 38 FE FF FF DD 85 68 FE FF FF D8 C7 DD 9D 88 FD FF FF DD 85 58 FE FF FF D8 C4 DD 9D 58 FE FF FF D9 C9 D8 C3 DD 85 60 FE FF FF D9 CC DC 85 48 FE FF FF D9 CC DC 85 50 FE FF FF D9 CC DD 9D 48 FE FF FF DD 85 60 FE FF FF D9 CC DD 9D 50 FE FF FF D9 CB
-***** EXPENSIVE 1797 354
-
-. 1796 804F1C2 192
-. DC 85 40 FE FF FF DD 85 38 FE FF FF DC 85 88 FE FF FF D9 C9 DD 9D 40 FE FF FF DD 85 88 FD FF FF DC 85 78 FE FF FF D9 C9 DD 9D 38 FE FF FF DD 85 58 FE FF FF D8 C1 D9 CA D8 EE D9 CF D8 EB D9 C9 DD 9D 88 FD FF FF D9 CD D9 E0 DD 85 50 FE FF FF D9 CB D9 E0 D9 C9 DC A5 70 FE FF FF D9 C9 DC A5 68 FE FF FF D9 CB DC A5 38 FE FF FF D9 CF DC 85 88 FE FF FF D9 CE DC 85 78 FE FF FF D9 C9 DC 85 88 FE FF FF D9 CD DC 85 60 FE FF FF D9 CB DC 85 78 FE FF FF D9 CA DD 9D 30 FE FF FF D9 CE DD 9D 28 FE FF FF DD 85 48 FE FF FF DD 85 40 FE FF FF D9 C9 D8 C2 D9 C9 D8 E5 D9 C9 DD 9D 20 FE FF FF
-***** EXPENSIVE 1798 355
-
-. 1797 804F282 177
-. DD 9D 18 FE FF FF D9 C2 D9 C2 D9 C9 D8 E7 D9 C9 D8 C6 D9 C9 8B 85 98 FD FF FF DD 9D 10 FE FF FF DD 9D 08 FE FF FF DD 85 C0 FE FF FF DD 85 B8 FE FF FF D9 C9 DD 1C 07 DD 5C 07 08 8B 45 E8 03 45 D4 DD 45 98 DD 45 90 0F AF 45 14 DC 8D 28 FE FF FF D9 C9 DC 8D 30 FE FF FF C1 E0 04 DE E1 DD 1C 07 DD 45 90 DD 45 98 D9 C9 DC 8D 30 FE FF FF D9 C9 DC 8D 28 FE FF FF DE C1 DD 5C 07 08 8B 45 E8 03 85 04 FE FF FF DD 45 88 DD 45 80 D9 CC DE C7 D9 CB 0F AF 45 14 DC 8D 18 FE FF FF DD 85 40 FE FF FF D9 CC DC 8D 20 FE FF FF D9 CB C1 E0 04 DE E6
-***** EXPENSIVE 1799 356
-
-. 1798 804F333 195
-. D9 CB DE C4 D9 C9 DE E2 DD 85 58 FE FF FF DD 85 50 FE FF FF D9 CA DC AD 48 FE FF FF D9 C9 DC A5 88 FD FF FF D9 CA DC 85 38 FE FF FF D9 CB DD 1C 07 DD 45 88 DD 45 80 DC 8D 20 FE FF FF D9 C9 DC 8D 18 FE FF FF DE C1 DD 5C 07 08 8B 45 E8 03 85 00 FE FF FF DD 85 78 FF FF FF DD 85 70 FF FF FF 0F AF 45 14 DC 8D 08 FE FF FF D9 C9 DC 8D 10 FE FF FF C1 E0 04 DE E1 DD 1C 07 DD 85 70 FF FF FF DD 85 78 FF FF FF D9 C9 DC 8D 10 FE FF FF D9 C9 DC 8D 08 FE FF FF DE C1 DD 5C 07 08 8B 45 E8 03 85 FC FD FF FF DD 85 68 FF FF FF DD 85 60 FF FF FF 0F AF 45 14 D8 CE D9 C9 D8 CF D9 CE DC 8D 68 FF FF FF
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-
-. 1799 804F3F6 162
-. D9 CF DC 8D 60 FF FF FF D9 CE C1 E0 04 DE E1 D9 CE DE C5 D9 CD DD 1C 07 D9 CB DD 5C 07 08 8B 45 E8 03 85 F8 FD FF FF DD 85 58 FF FF FF DD 85 50 FF FF FF 0F AF 45 14 D8 CB D9 C9 D8 CD D9 CB DC 8D 58 FF FF FF D9 CD DC 8D 50 FF FF FF D9 CB C1 E0 04 DE E1 D9 CC DE C2 D9 CB DD 1C 07 DD 5C 07 08 8B 45 E8 03 85 F4 FD FF FF DD 85 48 FF FF FF DD 85 40 FF FF FF D9 C9 0F AF 45 14 D8 CA D9 C9 D8 CB D9 CA DC 8D 40 FF FF FF D9 CB DC 8D 48 FF FF FF D9 C9 C1 E0 04 DE E2 DE C2 DD 1C 07 DD 5C 07 08
-
-. 1800 804F498 50
-. 8B 45 0C C1 E0 04 01 C1 8B 45 0C 01 85 A0 FD FF FF 8B 45 14 C1 E0 04 FF 45 E0 8B 55 D4 FF 45 EC 01 85 98 FD FF FF FF 45 E8 39 55 E0 0F 82 AA F8 FF FF
-
-. 1801 804F4CA 28
-. 8B 45 D0 FF 45 E4 8B 55 D8 01 45 E8 83 85 A4 FD FF FF 10 39 55 E4 0F 82 0A F7 FF FF
-
-. 1802 804F4E6 10
-. 8D 65 F4 5B 5E 31 C0 5F C9 C3
-
-. 1803 804D526 8
-. 83 C4 40 E9 55 FF FF FF
-
-. 1804 80508F2 9
-. 83 F9 07 0F 84 83 00 00 00
-
-. 1805 805097E 72
-. 8B 55 14 8B 7D EC 8B BC BA 08 01 00 00 C1 E0 03 89 7D E4 01 C7 89 7D E0 01 C7 8D 14 38 8D 0C 10 83 EC 0C 8D 04 08 50 51 52 57 FF 75 E0 FF 75 E4 56 FF 75 E8 FF 75 1C FF 75 C8 FF 75 CC FF 75 D0 FF 75 D4 E8 BE 14 00 00
-
-. 1806 8051E84 160
-. 55 89 E5 57 56 53 81 EC D4 01 00 00 B8 25 49 92 24 F7 65 20 89 85 30 FE FF FF 8B 45 20 29 D0 89 95 34 FE FF FF D1 E8 03 85 34 FE FF FF C1 E8 02 89 45 D8 31 D2 8B 45 20 F7 75 1C 89 45 D4 B8 25 49 92 24 F7 65 1C 8B 4D 1C 29 D1 89 95 2C FE FF FF D1 E9 03 8D 2C FE FF FF 89 4D D0 C1 6D D0 02 8B 55 D0 68 1F B9 EC 3F 89 85 28 FE FF FF 8D 04 52 E8 00 00 00 00 5B 81 C3 1A F2 00 00 D1 E0 68 40 A1 BB 3B 89 45 CC 8B 75 08 8B 7D 10 C7 45 E8 00 00 00 00 C7 45 E4 00 00 00 00 E8 FC 66 FF FF
-***** EXPENSIVE 1808 358
-
-. 1807 8051F24 20
-. 58 5A 68 1F B9 FC 3F 68 40 A1 BB 3B D9 5D C8 E8 E8 66 FF FF
-***** EXPENSIVE 1809 359
-
-. 1808 8051F38 20
-. 59 58 68 D7 8A 05 40 68 F0 B8 CC 6C D9 5D C4 E8 D4 66 FF FF
-***** EXPENSIVE 1810 360
-
-. 1809 8051F4C 20
-. 58 5A 68 1F B9 EC 3F 68 40 A1 BB 3B D9 5D C0 E8 D0 67 FF FF
-***** EXPENSIVE 1811 361
-
-. 1810 8051F60 20
-. 59 58 68 1F B9 FC 3F 68 40 A1 BB 3B D9 5D BC E8 BC 67 FF FF
-***** EXPENSIVE 1812 362
-
-. 1811 8051F74 20
-. 58 5A 68 D7 8A 05 40 68 F0 B8 CC 6C D9 5D B8 E8 A8 67 FF FF
-***** EXPENSIVE 1813 363
-
-. 1812 8051F88 25
-. C7 45 E0 00 00 00 00 8B 45 D4 83 C4 10 39 45 E0 D9 5D B4 0F 83 6D 09 00 00
-
-. 1813 8051FA1 42
-. 8B 55 D0 C1 E2 02 89 95 94 FE FF FF 03 55 D0 89 95 90 FE FF FF C7 85 3C FE FF FF 00 00 00 00 8B 45 E0 85 C0 0F 85 4D 09 00 00
-***** EXPENSIVE 1815 364
-
-. 1814 8051FCB 89
-. D9 83 4C F6 FF FF D9 83 50 F6 FF FF D9 C9 D9 55 B0 D9 C9 D9 55 AC D9 C9 D9 55 A8 D9 C9 D9 55 A4 D9 C9 D9 55 A0 D9 C9 D9 55 9C D9 C9 D9 55 98 D9 C9 D9 55 94 D9 C9 D9 55 90 D9 C9 D9 55 8C D9 C9 D9 5D 88 D9 5D 84 C7 45 DC 00 00 00 00 8B 45 D0 39 45 DC 0F 83 CE 08 00 00
-***** EXPENSIVE 1816 365
-
-. 1815 8052024 188
-. 8B 45 D8 D1 E0 89 85 7C FF FF FF 03 45 D8 D9 45 C8 89 85 70 FF FF FF D1 E0 D8 45 C4 89 85 58 FF FF FF 8B 45 18 DD 83 B4 F8 FF FF DD 83 34 F6 FF FF D9 CA D9 9D 88 FE FF FF 8B 55 D8 D9 45 C4 F7 D8 50 D9 45 C8 D9 CA DD 9D 78 FE FF FF D9 CA DD 9D 70 FE FF FF D9 45 C0 D9 CA DD 9D 60 FE FF FF D9 45 BC D9 45 B8 D9 CA C1 E2 02 DD 9D 68 FE FF FF D9 CA DD 9D 58 FE FF FF D9 C9 D8 45 B8 D9 45 BC D9 CA DD 9D 48 FE FF FF D9 45 B4 89 95 68 FF FF FF DB 04 24 D9 CA 03 55 D8 89 95 5C FF FF FF D9 9D 84 FE FF FF D9 CA DD 9D 50 FE FF FF D9 C9 DD 9D 40 FE FF FF DD 9D F0 FE FF FF
-***** EXPENSIVE 1817 366
-
-. 1816 80520E0 193
-. 8B 45 D0 D1 E0 89 85 9C FE FF FF 03 45 D0 89 85 98 FE FF FF 8B 4D E4 D1 E0 8B 55 E8 83 C4 04 89 85 8C FE FF FF 0F AF 4D 14 0F AF 55 0C 8D 76 00 8B 45 E8 03 45 D8 0F AF 45 0C D9 04 C6 D9 44 C6 04 8B 45 E8 03 85 7C FF FF FF 0F AF 45 0C D9 04 C6 D9 44 C6 04 8B 45 E8 03 85 70 FF FF FF 0F AF 45 0C D9 04 C6 D9 44 C6 04 D9 CB 8B 45 E8 03 85 68 FF FF FF 0F AF 45 0C D9 5D 80 D9 9D 74 FF FF FF D9 44 C6 04 D9 04 C6 8B 45 E8 03 85 5C FF FF FF 0F AF 45 0C D9 44 C6 04 D9 CB D9 9D 78 FF FF FF D9 04 C6 D9 CC 8B 45 E8 03 85 58 FF FF FF 0F AF 45 0C D9 9D 6C FF FF FF D9 C9 D9 9D 64 FF FF FF
-***** EXPENSIVE 1818 367
-
-. 1817 80521A1 192
-. D9 C4 D9 04 C6 DC C1 D9 CC D9 9D 60 FF FF FF D9 44 C6 04 D9 C9 D9 9D 54 FF FF FF D9 C4 D8 C1 D9 CD DE E1 D9 85 78 FF FF FF D9 CE DE E4 D9 CD D8 C2 D9 45 80 D8 85 60 FF FF FF D9 C9 D9 9D 40 FF FF FF D9 CA D8 AD 78 FF FF FF D9 CB D9 9D 4C FF FF FF D9 85 64 FF FF FF D9 85 74 FF FF FF D8 C2 D9 CB D9 9D 44 FF FF FF D9 CB D9 9D 38 FF FF FF D8 A5 74 FF FF FF D9 CA D8 A5 6C FF FF FF D9 CB D9 9D 50 FF FF FF D9 C9 D9 9D 30 FF FF FF D9 85 64 FF FF FF D9 CA D9 95 2C FF FF FF D9 85 44 FF FF FF D9 C9 D8 85 38 FF FF FF D9 85 40 FF FF FF D9 CC D8 85 6C FF FF FF D9 CA D8 85 54 FF FF FF
-***** EXPENSIVE 1819 368
-
-. 1818 8052261 185
-. D9 CC D8 85 50 FF FF FF D9 45 80 D9 CA D9 9D 20 FF FF FF D9 44 D6 04 D9 CA D8 A5 60 FF FF FF D9 CB D9 9D 34 FF FF FF D9 CC D9 95 28 FF FF FF D9 85 30 FF FF FF D9 C9 D8 04 D6 D9 CA D8 C5 D9 C9 D8 C3 D9 CA D8 C4 D9 C9 D8 85 34 FF FF FF D9 CE D9 95 48 FF FF FF D9 CB D9 9D 3C FF FF FF D9 C9 D9 9D 24 FF FF FF D9 9D 1C FF FF FF D9 CB D9 9D 18 FF FF FF D9 85 88 FE FF FF D8 45 C0 DD 85 78 FE FF FF DE F9 DC A5 70 FE FF FF D9 85 28 FF FF FF D8 C2 D9 C1 DE C9 D9 9D E0 FE FF FF DD 85 68 FE FF FF D9 CB D8 85 34 FF FF FF D9 CB D8 C0 D9 C9 DE CB DC A5 60 FE FF FF
-***** EXPENSIVE 1820 369
-
-. 1819 805231A 212
-. D9 CA D9 9D DC FE FF FF D9 C9 DC A5 58 FE FF FF D9 85 54 FF FF FF D9 C9 DC B5 78 FE FF FF D9 C9 D8 E2 D8 C9 D9 9D 14 FF FF FF D9 85 50 FF FF FF D8 A5 34 FF FF FF DE C9 D9 9D 10 FF FF FF DD 85 60 FE FF FF D8 C0 DC AD 68 FE FF FF DC 85 58 FE FF FF D9 85 34 FF FF FF D9 C9 DC B5 78 FE FF FF D9 C9 D8 A5 40 FF FF FF D9 C1 DE C9 D9 CA D8 A5 44 FF FF FF D9 CA D9 9D 08 FF FF FF DD 85 58 FE FF FF D9 C9 DE CA D8 C0 D9 C9 D9 9D 0C FF FF FF D8 AD 88 FE FF FF D9 85 44 FF FF FF D9 C9 DC B5 78 FE FF FF D9 C9 D8 A5 54 FF FF FF D9 9D 44 FF FF FF D9 C0 D8 8D 44 FF FF FF D9 9D 04 FF FF FF D9 85 40 FF FF FF D8 A5 50 FF FF FF DE C9 D9 9D 00 FF FF FF
-***** EXPENSIVE 1821 370
-
-. 1820 80523EE 218
-. D9 85 84 FE FF FF D8 65 B4 DD 85 78 FE FF FF DE F9 DC 8D F0 FE FF FF D9 85 24 FF FF FF D8 85 4C FF FF FF D9 C1 DE C9 D9 9D FC FE FF FF D9 85 20 FF FF FF D8 C2 DE C9 DD 85 50 FE FF FF D8 C0 DC A5 48 FE FF FF DC 85 40 FE FF FF D9 C9 D9 9D EC FE FF FF DC B5 78 FE FF FF D9 85 4C FF FF FF D9 C9 DC 8D F0 FE FF FF D9 C9 D8 A5 30 FF FF FF D8 C9 D9 9D E8 FE FF FF D9 C1 D8 A5 2C FF FF FF DE C9 D9 9D E4 FE FF FF DD 85 48 FE FF FF D8 C0 DC AD 50 FE FF FF DC A5 40 FE FF FF D9 85 30 FF FF FF D9 C9 DC B5 78 FE FF FF DC 8D F0 FE FF FF D9 C9 D8 A5 3C FF FF FF D9 9D 30 FF FF FF D9 85 2C FF FF FF D9 C1 D8 8D 30 FF FF FF D9 C9 D8 A5 38 FF FF FF D9 C9 D9 5D EC DE C9
-***** EXPENSIVE 1822 371
-
-. 1821 80524C8 214
-. D9 45 EC D9 C9 D9 5D EC DD 85 40 FE FF FF D8 C0 D8 85 84 FE FF FF DC B5 78 FE FF FF DC 8D F0 FE FF FF D9 85 3C FF FF FF D8 A5 4C FF FF FF D9 C1 DE C9 D9 85 1C FF FF FF D8 85 E0 FE FF FF D9 85 38 FF FF FF DE E5 D9 9D E0 FE FF FF D9 85 14 FF FF FF D9 CA DE CC D9 C9 D8 85 0C FF FF FF D9 85 18 FF FF FF D8 85 DC FE FF FF D9 C9 D9 9D D8 FE FF FF D9 85 04 FF FF FF D8 A5 0C FF FF FF D9 C9 D9 9D DC FE FF FF D9 85 10 FF FF FF D8 85 08 FF FF FF D9 C9 D9 9D D0 FE FF FF D9 85 10 FF FF FF D9 45 EC D9 CA D9 9D D4 FE FF FF D9 CA D9 5D EC D9 85 00 FF FF FF D9 85 14 FF FF FF D9 CB D9 E0 D9 45 EC D9 CA D8 A5 08 FF FF FF D9 CE D9 5D EC D8 A5 00 FF FF FF
-***** EXPENSIVE 1823 372
-
-. 1822 805259E 217
-. D9 CB D9 E0 D9 45 EC D9 CE D9 9D CC FE FF FF D8 A5 04 FF FF FF D9 CB D9 9D C8 FE FF FF D9 85 E8 FE FF FF D8 C4 D9 9D C4 FE FF FF D9 85 E0 FE FF FF D8 85 D8 FE FF FF D9 9D D8 FE FF FF D9 85 DC FE FF FF D8 85 D4 FE FF FF D9 9D D4 FE FF FF D9 85 E0 FE FF FF D8 85 D0 FE FF FF D9 9D D0 FE FF FF D9 85 DC FE FF FF D8 85 CC FE FF FF D9 9D CC FE FF FF D9 85 DC FE FF FF D8 85 C8 FE FF FF D9 85 E4 FE FF FF D9 C9 D9 9D C8 FE FF FF D9 85 C4 FE FF FF D8 85 FC FE FF FF D9 C9 D8 C3 D9 C9 D9 9D C4 FE FF FF D8 85 EC FE FF FF D9 85 D8 FE FF FF D8 C1 D9 CD D8 EA D9 CB D8 EE D9 CD D9 9D C0 FE FF FF D9 C9 D9 E0 D9 85 D4 FE FF FF D9 CE D9 E0 D9 C9 D8 A5 E8 FE FF FF
-***** EXPENSIVE 1824 373
-
-. 1823 8052677 192
-. D9 C9 D8 A5 E4 FE FF FF D9 CE D8 A5 C4 FE FF FF D9 CB D8 85 FC FE FF FF D9 C9 D8 85 FC FE FF FF D9 CE D8 85 EC FE FF FF D9 CC D8 85 E0 FE FF FF D9 CD D8 85 EC FE FF FF D9 CB D9 9D BC FE FF FF D9 85 C8 FE FF FF D8 E6 D9 9D B8 FE FF FF D9 85 D0 FE FF FF D8 E3 D9 CB D8 85 D0 FE FF FF D9 CA D8 AD D8 FE FF FF D9 CB D9 9D B4 FE FF FF D9 C9 D9 9D AC FE FF FF D9 85 CC FE FF FF D9 85 CC FE FF FF D9 C9 D8 C2 D9 C9 DE E2 D9 C4 D9 85 C8 FE FF FF D9 CC D9 9D A4 FE FF FF D9 85 D4 FE FF FF D9 CE D8 E5 D9 C9 DE C5 D9 CB DE C6 D9 CC D8 85 C4 FE FF FF D9 85 1C FF FF FF D9 85 18 FF FF FF
-***** EXPENSIVE 1825 374
-
-. 1824 8052737 168
-. D9 C9 D9 1C CF D9 5C CF 04 D9 CC D9 9D B0 FE FF FF D9 CB D9 9D A0 FE FF FF 8B 45 E4 D9 45 B0 D9 45 AC D9 45 B0 D9 45 AC D9 CA 03 45 D0 D8 8D BC FE FF FF D9 CA D8 8D C0 FE FF FF D9 CB D8 8D C0 FE FF FF D9 C9 D8 8D BC FE FF FF D9 C9 0F AF 45 14 DE E2 DE C2 D9 1C C7 D9 5C C7 04 D9 45 A8 8B 45 E4 D9 45 A4 03 85 9C FE FF FF D8 8D B8 FE FF FF D9 C9 D8 CB 0F AF 45 14 DE E1 D9 C9 D9 95 A8 FE FF FF D9 C9 D9 1C C7 D9 45 A8 D8 8D B8 FE FF FF D9 CA D8 4D A4 DE C2 D9 45 9C D9 45 A0 D9 C9 D8 8D B0 FE FF FF D9 C9
-***** EXPENSIVE 1826 375
-
-. 1825 80527DF 163
-. D8 8D B4 FE FF FF D9 CB D9 54 C7 04 D9 CB DE E1 8B 45 E4 D9 45 A0 D9 45 9C 03 85 98 FE FF FF D8 8D B4 FE FF FF D9 C9 D8 8D B0 FE FF FF 0F AF 45 14 DE C1 D9 C9 D9 1C C7 D9 5C C7 04 D9 45 98 8B 45 E4 D9 45 94 D9 45 94 D9 C9 03 85 94 FE FF FF D8 CD D9 CA D8 8D AC FE FF FF D9 CD D8 4D 98 D9 C9 D8 8D AC FE FF FF D9 CD 0F AF 45 14 DE E2 DE C4 D9 1C C7 D9 CA D9 5C C7 04 D9 45 90 8B 45 E4 D9 45 8C 03 85 90 FE FF FF D8 CC D9 C9 D8 CB 0F AF 45 14 DE E1 D9 C9 D9 9D B8 FE FF FF D9 1C C7 D9 45 8C
-***** EXPENSIVE 1827 376
-
-. 1826 8052882 112
-. DE C9 D9 C9 D8 4D 90 DE C1 D9 45 84 D9 45 88 D9 C9 D8 8D A0 FE FF FF D9 C9 D8 8D A4 FE FF FF D9 CA D9 5C C7 04 DE E9 8B 45 E4 D9 45 88 D9 45 84 D9 C9 03 85 8C FE FF FF D8 8D A0 FE FF FF D9 C9 D8 8D A4 FE FF FF 0F AF 45 14 DE C1 D9 C9 D9 1C C7 D9 5C C7 04 FF 45 DC 8B 45 D0 03 55 0C FF 45 E8 03 4D 14 FF 45 E4 39 45 DC 0F 82 1E F8 FF FF
-
-. 1827 80528F2 28
-. 8B 55 CC FF 45 E0 8B 45 D4 01 55 E4 83 85 3C FE FF FF 08 39 45 E0 0F 82 B2 F6 FF FF
-
-. 1828 805290E 10
-. 8D 65 F4 5B 5E 31 C0 5F C9 C3
-
-. 1829 80509C6 8
-. 83 C4 40 E9 59 FF FF FF
-
-. 1830 804CD19 13
-. 8D 76 00 31 D2 89 C8 F7 F6 85 D2 74 0F
-
-. 1831 804CD26 15
-. 89 F6 83 C6 02 31 D2 89 C8 F7 F6 85 D2 75 F3
-vex iropt: 4 x unrolling (16 sts -> 64 sts)
-
-. 1832 804CD28 13
-. 83 C6 02 31 D2 89 C8 F7 F6 85 D2 75 F3
-
-. 1833 804CD35 20
-. 89 C8 31 D2 F7 F6 8B 55 14 89 34 BA 47 83 F8 01 89 C1 75 D3
-
-. 1834 8058B09 34
-. 8B 4D 14 FF B4 B9 08 01 00 00 FF 75 10 FF 75 EC 52 FF 75 D4 FF 75 D8 FF 75 DC FF 75 E0 E8 A1 15 00 00
-***** EXPENSIVE 1836 377
-
-. 1835 805A0CC 90
-. 55 89 E5 57 56 53 81 EC 1C 01 00 00 8B 45 20 31 D2 F7 75 18 89 45 DC 31 D2 8B 45 20 F7 75 1C 89 45 D8 31 D2 8B 45 1C F7 75 18 31 D2 52 89 45 D4 8B 45 18 50 E8 00 00 00 00 5B 81 C3 0F 70 00 00 DF 2C 24 DC BB D4 F5 FF FF 83 EC 08 DD 14 24 DD 9D E8 FE FF FF E8 FA E4 FE FF
-***** EXPENSIVE 1837 378
-
-. 1836 805A126 17
-. DD 85 E8 FE FF FF DD 1C 24 DD 5D C8 E8 F9 E5 FE FF
-***** EXPENSIVE 1838 379
-
-. 1837 805A137 25
-. C7 45 E0 00 00 00 00 8B 55 D8 83 C4 10 39 55 E0 DD 5D C0 0F 83 B9 01 00 00
-***** EXPENSIVE 1839 380
-
-. 1838 805A150 184
-. 8B 45 D4 D1 E0 DD 83 34 F6 FF FF DD 83 44 F6 FF FF D9 C9 DD 9D 40 FF FF FF DD 9D 38 FF FF FF C7 85 10 FF FF FF 00 00 00 00 C7 85 0C FF FF FF 00 00 00 00 C7 85 08 FF FF FF 00 00 00 00 C7 85 04 FF FF FF 00 00 00 00 89 85 18 FF FF FF 89 85 14 FF FF FF 8B 45 14 8B 8D 0C FF FF FF 8B BD 10 FF FF FF DD 85 40 FF FF FF DD 85 38 FF FF FF D9 C9 0F AF 85 04 FF FF FF 8B 95 08 FF FF FF 49 4F DD 5D B8 DD 5D B0 C7 45 D0 00 00 00 00 89 45 A8 8B 75 18 89 55 AC 89 8D E4 FE FF FF 89 BD 00 FF FF FF 8B 45 D0 DD 85 38 FF FF FF 85 C0 D9 C0 DD 85 40 FF FF FF D9 C2 74 30
-
-. 1839 805A238 11
-. 31 C9 3B 4D 18 0F 83 01 07 00 00
-***** EXPENSIVE 1841 381
-
-. 1840 805A243 21
-. 8B 55 AC 89 F6 8B 45 0C 0F AF C2 8B 7D 08 85 C9 DD 04 C7 74 24
-***** EXPENSIVE 1842 382
-
-. 1841 805A27C 25
-. D9 C2 41 D8 C9 D9 C9 03 55 DC D8 CA D9 CD 3B 4D 18 DE C1 D9 CB DE C4 73 08
-***** EXPENSIVE 1843 383
-
-. 1842 805A295 8
-. D9 CA D9 CB D9 CA EB AB
-***** EXPENSIVE 1844 384
-
-. 1843 805A248 16
-. 8B 45 0C 0F AF C2 8B 7D 08 85 C9 DD 04 C7 74 24
-***** EXPENSIVE 1845 385
-
-. 1844 805A258 61
-. DD 45 B8 D8 CB DD 45 B0 DD 45 B0 D9 C9 D8 CC D9 C9 DE CD D9 CB DC 4D B8 D9 C9 DE E3 DE C3 D9 C9 D9 CA D9 C9 D9 C2 41 D8 C9 D9 C9 03 55 DC D8 CA D9 CD 3B 4D 18 DE C1 D9 CB DE C4 73 08
-***** EXPENSIVE 1846 386
-
-. 1845 805A29D 15
-. DD D8 DD D8 8B 45 D0 85 C0 0F 85 4D 06 00 00
-***** EXPENSIVE 1847 387
-
-. 1846 805A2AC 48
-. DD D9 8B 45 A8 8B 55 10 DD 1C C2 8B 8D 18 FF FF FF 8B BD 14 FF FF FF 4E FF 45 D0 01 8D 00 FF FF FF 01 BD E4 FE FF FF 39 75 D0 0F 86 15 FF FF FF
-***** EXPENSIVE 1848 388
-
-. 1847 805A1F1 23
-. 8B 45 D0 DD 85 38 FF FF FF 85 C0 D9 C0 DD 85 40 FF FF FF D9 C2 74 30
-***** EXPENSIVE 1849 389
-
-. 1848 805A208 59
-. DD 45 B8 DD 45 B8 DD 45 B0 DD 45 B0 D9 CB D9 E0 D9 CA DC 4D C8 D9 C9 DC 4D C0 D9 CA DC 4D C0 D9 CB DC 4D C8 D9 C9 DE C2 DE C2 DD 5D B8 DD 5D B0 31 C9 3B 4D 18 0F 83 01 07 00 00
-
-. 1849 805A8F9 5
-. 39 75 D0 73 29
-***** EXPENSIVE 1851 390
-
-. 1850 805A8FE 41
-. 8B 45 14 0F AF 85 E4 FE FF FF 8B 4D 10 8B BD E4 FE FF FF DD 1C C1 8D 04 FD 08 00 00 00 0F AF 45 14 DD 1C 08 E9 90 F9 FF FF
-
-. 1851 805A2B7 37
-. 8B 8D 18 FF FF FF 8B BD 14 FF FF FF 4E FF 45 D0 01 8D 00 FF FF FF 01 BD E4 FE FF FF 39 75 D0 0F 86 15 FF FF FF
-
-. 1852 805A2DC 45
-. 8B 45 1C 8B 55 D4 FF 45 E0 8B 4D D8 01 85 10 FF FF FF 01 85 0C FF FF FF 01 95 08 FF FF FF 01 85 04 FF FF FF 39 4D E0 0F 82 9A FE FF FF
-
-. 1853 805A309 10
-. 83 7D D4 01 0F 84 05 05 00 00
-
-. 1854 805A818 8
-. 8D 65 F4 5B 5E 5F C9 C3
-
-. 1855 8053A6D 35
-. 8B 75 D8 8B 45 14 FF B4 B0 08 01 00 00 57 FF 75 DC 51 FF 75 E0 FF 75 E8 FF 75 E4 FF 75 EC E8 98 15 00 00
-***** EXPENSIVE 1857 391
-
-. 1856 8055028 90
-. 55 89 E5 57 56 53 81 EC 0C 01 00 00 8B 45 20 31 D2 F7 75 18 89 45 DC 31 D2 8B 45 20 F7 75 1C 89 45 D8 31 D2 8B 45 1C F7 75 18 31 D2 52 89 45 D4 8B 45 18 50 E8 00 00 00 00 5B 81 C3 B3 C0 00 00 DF 2C 24 DC BB D4 F5 FF FF 83 EC 08 DD 14 24 DD 9D F8 FE FF FF E8 9E 35 FF FF
-***** EXPENSIVE 1858 392
-
-. 1857 8055082 17
-. DD 85 F8 FE FF FF DD 1C 24 DD 5D C8 E8 9D 36 FF FF
-***** EXPENSIVE 1859 393
-
-. 1858 8055093 25
-. C7 45 E0 00 00 00 00 8B 55 D4 83 C4 10 39 55 E0 DD 5D C0 0F 83 6C 01 00 00
-***** EXPENSIVE 1860 394
-
-. 1859 80550AC 88
-. 8B 45 D8 DD 83 34 F6 FF FF DD 83 44 F6 FF FF D9 C9 D1 E0 DD 9D 60 FF FF FF DD 9D 58 FF FF FF C7 85 10 FF FF FF 00 00 00 00 C7 85 0C FF FF FF 00 00 00 00 89 85 18 FF FF FF C7 45 D0 00 00 00 00 8B 55 18 39 55 D0 DD 85 60 FF FF FF DD 85 58 FF FF FF 0F 83 40 07 00 00
-***** EXPENSIVE 1861 395
-
-. 1860 8055104 51
-. 0F AF 55 D8 8B 8D 0C FF FF FF 0F AF 55 E0 C7 85 14 FF FF FF 00 00 00 00 89 4D BC 89 55 B4 8B 55 D0 DD 85 58 FF FF FF 85 D2 DD 85 60 FF FF FF D9 C1 74 24
-
-. 1861 805515B 53
-. 8B 45 BC 0F AF 45 D8 0F AF 45 0C 89 45 B8 8B 45 18 0F AF 45 D8 0F AF 45 E0 8D 48 FF 8B 45 D8 8B 7D B4 D1 E0 31 F6 4F 89 85 1C FF FF FF 85 F6 0F 85 40 06 00 00
-***** EXPENSIVE 1863 396
-
-. 1862 8055190 49
-. D9 C1 8B 55 B8 8B 45 08 DD 85 58 FF FF FF D9 C9 DC 0C D0 D9 C9 D8 CA DE E9 DE C3 46 8B 45 18 29 F0 03 8D 1C FF FF FF 03 BD 18 FF FF FF 39 C6 76 C7
-
-. 1863 8055188 8
-. 85 F6 0F 85 40 06 00 00
-***** EXPENSIVE 1865 397
-
-. 1864 80557D0 35
-. D9 C4 D9 C4 D8 CA D9 C9 D8 CB DE E1 8B 45 18 D9 C5 DE CA D9 CA D8 CC 29 F0 DE C1 39 C6 D9 C1 D9 C1 74 39
-***** EXPENSIVE 1866 398
-
-. 1865 80557F3 57
-. D9 CB 8D 04 CD 08 00 00 00 0F AF 45 0C 8B 55 0C 0F AF D1 89 85 F4 FE FF FF 8B 45 08 DC 0C D0 D9 CA 8B 95 F4 FE FF FF DC 0C 02 DE EA D9 C9 D8 C0 DE C3 D9 C9 E9 7F F9 FF FF
-
-. 1866 80551AB 22
-. 46 8B 45 18 29 F0 03 8D 1C FF FF FF 03 BD 18 FF FF FF 39 C6 76 C7
-***** EXPENSIVE 1868 399
-
-. 1867 80551C1 50
-. DD D8 DD D8 8B 85 10 FF FF FF 03 85 14 FF FF FF 0F AF 45 14 8B 4D 10 DD 1C C1 8B 7D DC FF 45 D0 8B 45 18 01 BD 14 FF FF FF 39 45 D0 0F 82 2F FF FF FF
-***** EXPENSIVE 1869 400
-
-. 1868 8055122 21
-. 8B 55 D0 DD 85 58 FF FF FF 85 D2 DD 85 60 FF FF FF D9 C1 74 24
-***** EXPENSIVE 1870 401
-vex iropt: fold_Expr: no rule for: 32to1(0x1:I32)
-
-. 1869 8055137 89
-. DD 45 C8 D8 CD DD 45 C0 DD 45 C0 D9 C9 D8 CE D9 C9 DE CF D9 CD DC 4D C8 D9 C9 DE E5 DE C5 D9 CB D9 CC D9 CB 8B 45 BC 0F AF 45 D8 0F AF 45 0C 89 45 B8 8B 45 18 0F AF 45 D8 0F AF 45 E0 8D 48 FF 8B 45 D8 8B 7D B4 D1 E0 31 F6 4F 89 85 1C FF FF FF 85 F6 0F 85 40 06 00 00
-***** EXPENSIVE 1871 402
-
-. 1870 80551F3 37
-. DD D8 DD D8 8B 55 D8 8B 4D 18 FF 45 E0 8B 7D D4 01 95 10 FF FF FF 01 8D 0C FF FF FF 39 7D E0 0F 82 CD FE FF FF
-
-. 1871 8055218 10
-. 83 7D D8 01 0F 84 25 05 00 00
-
-. 1872 8055747 8
-. 8D 65 F4 5B 5E 5F C9 C3
-
-. 1873 805B161 34
-. 8B 75 14 FF B4 BE 08 01 00 00 FF 75 10 FF 75 EC 52 FF 75 D4 FF 75 D8 FF 75 DC FF 75 E0 E8 89 17 00 00
-***** EXPENSIVE 1875 403
-
-. 1874 805C90C 90
-. 55 89 E5 57 56 53 81 EC DC 00 00 00 8B 45 20 31 D2 F7 75 18 89 45 D8 31 D2 8B 45 20 F7 75 1C 89 45 D4 31 D2 8B 45 1C F7 75 18 31 D2 52 89 45 D0 8B 45 18 50 E8 00 00 00 00 5B 81 C3 CF 47 00 00 DF 2C 24 DC BB D4 F5 FF FF 83 EC 08 DD 14 24 DD 9D 28 FF FF FF E8 BA BC FE FF
-***** EXPENSIVE 1876 404
-
-. 1875 805C966 17
-. DD 85 28 FF FF FF DD 1C 24 D9 5D C8 E8 B9 BD FE FF
-***** EXPENSIVE 1877 405
-
-. 1876 805C977 25
-. C7 45 DC 00 00 00 00 8B 55 D4 83 C4 10 39 55 DC D9 5D C4 0F 83 B1 01 00 00
-***** EXPENSIVE 1878 406
-
-. 1877 805C990 175
-. 8B 45 D0 D1 E0 D9 83 4C F6 FF FF D9 83 50 F6 FF FF D9 C9 D9 5D 80 D9 9D 7C FF FF FF C7 85 50 FF FF FF 00 00 00 00 C7 85 4C FF FF FF 00 00 00 00 C7 85 48 FF FF FF 00 00 00 00 C7 85 44 FF FF FF 00 00 00 00 89 85 58 FF FF FF 89 85 54 FF FF FF 8B 45 14 8B B5 4C FF FF FF 8B BD 50 FF FF FF D9 45 80 D9 85 7C FF FF FF D9 C9 0F AF 85 44 FF FF FF 8B 95 48 FF FF FF 4E 4F D9 5D C0 D9 5D BC C7 45 CC 00 00 00 00 89 45 B4 8B 4D 18 89 55 B8 89 B5 24 FF FF FF 89 BD 40 FF FF FF 8B 45 CC D9 85 7C FF FF FF 85 C0 D9 C0 D9 45 80 D9 C2 74 30
-
-. 1878 805CA6F 11
-. 31 F6 3B 75 18 0F 83 85 06 00 00
-***** EXPENSIVE 1880 407
-
-. 1879 805CA7A 22
-. 8B 55 B8 8D 76 00 8B 45 0C 0F AF C2 8B 7D 08 85 F6 D9 04 87 74 24
-***** EXPENSIVE 1881 408
-
-. 1880 805CAB4 25
-. D9 C2 46 D8 C9 D9 C9 03 55 D8 D8 CA D9 CD 3B 75 18 DE C1 D9 CB DE C4 73 08
-***** EXPENSIVE 1882 409
-
-. 1881 805CACD 8
-. D9 CA D9 CB D9 CA EB AB
-***** EXPENSIVE 1883 410
-
-. 1882 805CA80 16
-. 8B 45 0C 0F AF C2 8B 7D 08 85 F6 D9 04 87 74 24
-***** EXPENSIVE 1884 411
-
-. 1883 805CA90 61
-. D9 45 C0 D8 CB D9 45 BC D9 45 BC D9 C9 D8 CC D9 C9 DE CD D9 CB D8 4D C0 D9 C9 DE E3 DE C3 D9 C9 D9 CA D9 C9 D9 C2 46 D8 C9 D9 C9 03 55 D8 D8 CA D9 CD 3B 75 18 DE C1 D9 CB DE C4 73 08
-***** EXPENSIVE 1885 412
-
-. 1884 805CAD5 15
-. DD D8 DD D8 8B 45 CC 85 C0 0F 85 D0 05 00 00
-***** EXPENSIVE 1886 413
-
-. 1885 805CAE4 48
-. DD D9 8B 45 B4 8B 55 10 D9 1C 82 8B B5 58 FF FF FF 8B BD 54 FF FF FF 49 FF 45 CC 01 B5 40 FF FF FF 01 BD 24 FF FF FF 39 4D CC 0F 86 17 FF FF FF
-***** EXPENSIVE 1887 414
-
-. 1886 805CA2B 20
-. 8B 45 CC D9 85 7C FF FF FF 85 C0 D9 C0 D9 45 80 D9 C2 74 30
-***** EXPENSIVE 1888 415
-
-. 1887 805CA3F 59
-. D9 45 C0 D9 45 C0 D9 45 BC D9 45 BC D9 CB D9 E0 D9 CA D8 4D C8 D9 C9 D8 4D C4 D9 CA D8 4D C4 D9 CB D8 4D C8 D9 C9 DE C2 DE C2 D9 5D C0 D9 5D BC 31 F6 3B 75 18 0F 83 85 06 00 00
-
-. 1888 805D0B4 5
-. 39 4D CC 73 29
-***** EXPENSIVE 1890 416
-
-. 1889 805D0B9 41
-. 8B 45 14 0F AF 85 24 FF FF FF 8B 75 10 8B BD 24 FF FF FF D9 1C 86 8D 04 BD 04 00 00 00 0F AF 45 14 D9 1C 30 E9 0D FA FF FF
-
-. 1890 805CAEF 37
-. 8B B5 58 FF FF FF 8B BD 54 FF FF FF 49 FF 45 CC 01 B5 40 FF FF FF 01 BD 24 FF FF FF 39 4D CC 0F 86 17 FF FF FF
-
-. 1891 805CB14 45
-. 8B 45 1C 8B 55 D0 FF 45 DC 8B 4D D4 01 85 50 FF FF FF 01 85 4C FF FF FF 01 95 48 FF FF FF 01 85 44 FF FF FF 39 4D DC 0F 82 9F FE FF FF
-
-. 1892 805CB41 10
-. 83 7D D0 01 0F 84 98 04 00 00
-
-. 1893 805CFE3 8
-. 8D 65 F4 5B 5E 5F C9 C3
-
-. 1894 8056268 35
-. 8B 45 D8 8B 55 14 FF B4 82 08 01 00 00 56 FF 75 DC 51 FF 75 E0 FF 75 E8 FF 75 E4 FF 75 EC E8 AD 16 00 00
-***** EXPENSIVE 1896 417
-
-. 1895 8057938 90
-. 55 89 E5 57 56 53 81 EC EC 00 00 00 8B 45 20 31 D2 F7 75 18 89 45 D8 31 D2 8B 45 20 F7 75 1C 89 45 D4 31 D2 8B 45 1C F7 75 18 31 D2 52 89 45 D0 8B 45 18 50 E8 00 00 00 00 5B 81 C3 A3 97 00 00 DF 2C 24 DC BB D4 F5 FF FF 83 EC 08 DD 14 24 DD 9D 18 FF FF FF E8 8E 0C FF FF
-***** EXPENSIVE 1897 418
-
-. 1896 8057992 17
-. DD 85 18 FF FF FF DD 1C 24 D9 5D C8 E8 8D 0D FF FF
-***** EXPENSIVE 1898 419
-
-. 1897 80579A3 25
-. C7 45 DC 00 00 00 00 8B 55 D0 83 C4 10 39 55 DC D9 5D C4 0F 83 59 01 00 00
-***** EXPENSIVE 1899 420
-
-. 1898 80579BC 76
-. 8B 45 D4 D9 83 4C F6 FF FF D9 83 50 F6 FF FF D9 C9 D1 E0 D9 5D 88 D9 5D 84 C7 85 3C FF FF FF 00 00 00 00 C7 85 38 FF FF FF 00 00 00 00 89 85 44 FF FF FF C7 45 CC 00 00 00 00 8B 55 18 39 55 CC D9 45 88 D9 45 84 0F 83 E0 06 00 00
-***** EXPENSIVE 1900 421
-
-. 1899 8057A08 45
-. 0F AF 55 D4 8B 8D 38 FF FF FF 0F AF 55 DC C7 85 40 FF FF FF 00 00 00 00 89 4D C0 89 55 B8 8B 45 CC D9 45 84 85 C0 D9 45 88 D9 C1 74 24
-
-. 1900 8057A59 55
-. 8B 45 C0 0F AF 45 D4 0F AF 45 0C 89 45 BC 8B 45 18 0F AF 45 D4 0F AF 45 DC 8D 48 FF 8B 45 D4 8B 7D B8 D1 E0 31 F6 4F 89 85 48 FF FF FF 89 F6 85 F6 0F 85 E4 05 00 00
-***** EXPENSIVE 1902 422
-
-. 1901 8057A90 46
-. D9 C1 8B 55 BC 8B 45 08 D9 45 84 D9 C9 D8 0C 90 D9 C9 D8 CA DE E9 DE C3 46 8B 45 18 29 F0 03 8D 48 FF FF FF 03 BD 44 FF FF FF 39 C6 76 CA
-
-. 1902 8057A88 8
-. 85 F6 0F 85 E4 05 00 00
-***** EXPENSIVE 1904 423
-
-. 1903 8058074 35
-. D9 C4 D9 C4 D8 CA D9 C9 D8 CB DE E1 8B 45 18 D9 C5 DE CA D9 CA D8 CC 29 F0 DE C1 39 C6 D9 C1 D9 C1 74 39
-***** EXPENSIVE 1905 424
-
-. 1904 8058097 57
-. D9 CB 8D 04 8D 04 00 00 00 0F AF 45 0C 8B 55 0C 0F AF D1 89 85 14 FF FF FF 8B 45 08 D8 0C 90 D9 CA 8B 95 14 FF FF FF D8 0C 02 DE EA D9 C9 D8 C0 DE C3 D9 C9 E9 D8 F9 FF FF
-
-. 1905 8057AA8 22
-. 46 8B 45 18 29 F0 03 8D 48 FF FF FF 03 BD 44 FF FF FF 39 C6 76 CA
-***** EXPENSIVE 1907 425
-
-. 1906 8057ABE 50
-. DD D8 DD D8 8B 85 3C FF FF FF 03 85 40 FF FF FF 0F AF 45 14 8B 4D 10 D9 1C 81 8B 7D D8 FF 45 CC 8B 45 18 01 BD 40 FF FF FF 39 45 CC 0F 82 36 FF FF FF
-***** EXPENSIVE 1908 426
-
-. 1907 8057A26 15
-. 8B 45 CC D9 45 84 85 C0 D9 45 88 D9 C1 74 24
-***** EXPENSIVE 1909 427
-vex iropt: fold_Expr: no rule for: 32to1(0x1:I32)
-
-. 1908 8057A35 91
-. D9 45 C8 D8 CD D9 45 C4 D9 45 C4 D9 C9 D8 CE D9 C9 DE CF D9 CD D8 4D C8 D9 C9 DE E5 DE C5 D9 CB D9 CC D9 CB 8B 45 C0 0F AF 45 D4 0F AF 45 0C 89 45 BC 8B 45 18 0F AF 45 D4 0F AF 45 DC 8D 48 FF 8B 45 D4 8B 7D B8 D1 E0 31 F6 4F 89 85 48 FF FF FF 89 F6 85 F6 0F 85 E4 05 00 00
-***** EXPENSIVE 1910 428
-
-. 1909 8057AF0 37
-. DD D8 DD D8 8B 55 D4 8B 4D 18 FF 45 DC 8B 7D D0 01 95 3C FF FF FF 01 8D 38 FF FF FF 39 7D DC 0F 82 DA FE FF FF
-
-. 1910 8057B15 10
-. 83 7D D4 01 0F 84 D2 04 00 00
-
-. 1911 8057FF1 8
-. 8D 65 F4 5B 5E 5F C9 C3
-***** EXPENSIVE 1913 429
-
-. 1912 804CF5C 53
-. 8B 75 AC 01 75 B0 8B 45 B0 31 D2 F7 75 08 89 55 B0 31 D2 52 8B 45 B0 50 DF 2C 24 DC 4D C8 83 EC 08 8B 45 C4 8B B0 08 02 00 00 DD 55 88 DD 1C 24 E8 8F B6 FF FF
-
-. 1913 804CEE1 80
-. 8B 45 C4 8B 75 E0 8B 74 B0 08 8B 55 C4 8B 45 A8 03 82 08 02 00 00 89 75 BC 8B 75 E0 89 84 B2 08 01 00 00 8B 45 D8 89 C2 0F AF 55 BC 89 55 D8 89 45 D4 31 D2 8B 45 08 F7 75 D8 C7 45 C0 01 00 00 00 8B 55 BC 39 55 C0 89 45 B8 0F 83 AF 00 00 00
-
-. 1914 804DB5C 11
-. 8B 45 E4 85 C0 0F 85 64 02 00 00
-
-. 1915 804DDCB 6
-. 83 7D 18 FF 74 4E
-***** EXPENSIVE 1917 430
-
-. 1916 804DE1F 65
-. 8B 85 54 FF FF FF 8B 55 24 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 28 DD 5D C8 DD 5D C0 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 2C DD 5D B8 DD 44 02 F0 D9 C9 DD 5D B0 DD 5D A8 DD 44 02 F8 E9 2C FD FF FF
-***** EXPENSIVE 1918 431
-
-. 1917 804DB8C 22
-. DD 5D A0 C7 45 E0 00 00 00 00 8B 45 D4 39 45 E0 0F 83 00 02 00 00
-
-. 1918 804D3DC 37
-. 8B 45 EC 8B 55 14 8B 4C 82 08 8B 45 E8 0F AF C1 89 45 E8 31 D2 89 F0 F7 75 E8 8B 55 DC 85 D2 0F 85 5F 02 00 00
-
-. 1919 804D660 37
-. 8B 55 D8 89 55 D4 8B 55 08 89 55 CC 8B 55 0C C7 45 D0 01 00 00 00 89 55 C8 C7 45 DC 00 00 00 00 E9 9C FD FF FF
-
-. 1920 804D421 9
-. 83 F9 02 0F 84 06 02 00 00
-***** EXPENSIVE 1922 432
-
-. 1921 804D74C 130
-. 8B 45 F0 03 45 E4 8B 7D 08 0F AF 45 0C DD 04 17 DD 44 17 08 C1 E0 04 DD 04 07 DD 44 07 08 D9 C3 D9 C3 D9 C9 8B 45 10 D8 C3 D9 C9 D8 C2 D9 C9 DD 1C 08 DD 5C 08 08 D9 CB 8B 45 EC DE E1 D9 C9 DE E2 03 45 CC D9 C3 D9 C3 D9 C9 0F AF 45 14 D8 CA D9 C9 D8 CB D9 CA D8 CC D9 CB D8 CD D9 C9 C1 E0 04 8B 7D 10 DE E2 DE C2 DD 1C 07 DD 5C 07 08 46 8B 45 0C 03 55 D8 01 45 D0 FF 45 F0 03 4D DC FF 45 EC
-
-. 1922 804D7CE 9
-. 3B 75 CC 0F 82 75 FF FF FF
-***** EXPENSIVE 1924 433
-
-. 1923 804DDD1 78
-. 8B 85 54 FF FF FF 8B 55 24 DD 44 02 F0 DD 44 02 F8 8B 55 28 DD 5D C0 DD 5D C8 DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 2C DD 5D B0 DD 44 02 F8 D9 C9 DD 5D B8 DD 5D A0 DD 44 02 F0 80 75 C7 80 80 75 B7 80 DD 5D A8 80 75 A7 80 E9 70 FD FF FF
-
-. 1924 804DB8F 19
-. C7 45 E0 00 00 00 00 8B 45 D4 39 45 E0 0F 83 00 02 00 00
-
-. 1925 8050F94 11
-. 8B 45 E8 85 C0 0F 85 02 02 00 00
-
-. 1926 80511A1 6
-. 83 7D 18 FF 74 4B
-***** EXPENSIVE 1928 434
-
-. 1927 80511F2 62
-. 8B 45 80 8B 55 24 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 28 D9 5D D0 D9 5D CC D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 2C D9 5D C8 D9 44 02 F8 D9 C9 D9 5D C4 D9 5D C0 D9 44 02 FC E9 94 FD FF FF
-***** EXPENSIVE 1929 435
-
-. 1928 8050FC4 22
-. D9 5D BC C7 45 E4 00 00 00 00 8B 45 D8 39 45 E4 0F 83 A4 01 00 00
-
-. 1929 8050880 37
-. 8B 55 EC 8B 7D 14 8B 4C 97 08 8B 45 E8 0F AF C1 89 45 E8 31 D2 89 F0 8B 7D DC F7 75 E8 85 FF 0F 85 5B 02 00 00
-
-. 1930 8050B00 37
-. 8B 7D D8 89 7D D4 8B 55 08 8B 7D 0C C7 45 D0 01 00 00 00 89 55 CC 89 7D C8 C7 45 DC 00 00 00 00 E9 A0 FD FF FF
-
-. 1931 80508C5 9
-. 83 F9 02 0F 84 02 02 00 00
-***** EXPENSIVE 1933 436
-vex iropt: not unrolling (126 sts)
-
-. 1932 8050BD0 123
-. 8B 45 F0 8B 7D 08 03 45 E4 D9 04 D7 D9 44 D7 04 0F AF 45 0C D9 04 C7 D9 44 C7 04 D9 C3 D9 C3 D9 C9 8B 45 10 D8 C3 D9 C9 D8 C2 D9 C9 D9 1C C8 D9 5C C8 04 D9 CB DE E1 D9 C9 DE E2 8B 45 EC D9 C3 D9 C3 D9 C9 03 45 D8 D8 CA D9 C9 D8 CB D9 CA D8 CC D9 CB D8 CD D9 C9 46 0F AF 45 14 8B 7D 10 DE E2 DE C2 03 55 0C FF 45 F0 03 4D 14 FF 45 EC 3B 75 D8 D9 1C C7 D9 5C C7 04 72 85
-***** EXPENSIVE 1934 437
-
-. 1933 80511A7 75
-. 8B 45 80 8B 55 24 D9 44 02 F8 D9 44 02 FC 8B 55 28 D9 5D CC D9 5D D0 D9 44 02 FC D9 44 02 F8 D9 C9 8B 55 2C D9 5D C4 D9 44 02 FC D9 C9 D9 5D C8 D9 5D BC D9 44 02 F8 80 75 CF 80 80 75 C7 80 D9 5D C0 80 75 BF 80 E9 D5 FD FF FF
-
-. 1934 8050FC7 19
-. C7 45 E4 00 00 00 00 8B 45 D8 39 45 E4 0F 83 A4 01 00 00
-***** EXPENSIVE 1936 438
-
-. 1935 8059310 159
-. 8B 95 50 FF FF FF 03 55 E4 8B 75 E4 8D 0C 16 01 CE 8B 45 0C 0F AF 85 50 FF FF FF 0F AF 55 0C 0F AF 4D 0C 89 B5 3C FF FF FF 8B 75 08 DD 04 C6 DD 04 D6 DD 04 CE 8B B5 3C FF FF FF 0F AF 75 0C 8B 45 08 D9 C2 DD 04 F0 D9 C9 D8 C2 D9 C3 D8 C2 D9 CC DE E2 8B 45 14 D9 C0 0F AF 85 54 FF FF FF 8B 75 10 D8 C4 DD 1C C6 D9 CC 8B 45 14 0F AF C7 8B 4D D8 DE E2 D9 C9 DD 1C C6 8D 14 39 8D 04 FD 08 00 00 00 0F AF 45 14 0F AF 55 14 D9 E0 D9 CA DE E1 D9 C9 DD 1C 30 DD 1C D6 8B 45 18 8B 55 DC
-
-. 1936 80593AF 30
-. 03 7D 18 01 85 54 FF FF FF 01 95 50 FF FF FF FF 45 E8 8B 4D E0 39 4D E8 0F 82 43 FF FF FF
-
-. 1937 8058E4C 15
-. C7 45 F0 00 00 00 00 8B 55 E8 39 55 F0 73 6E
-***** EXPENSIVE 1939 439
-
-. 1938 8058E5B 110
-. 8B 4D E4 49 89 4D DC 89 CF 8B 45 EC 8D 34 38 8B 45 0C 0F AF C7 8B 55 08 8B 4D 14 DD 04 C2 0F AF 4D DC 8B 55 DC 8B 45 10 DD 1C C8 8D 0C D5 08 00 00 00 0F AF 4D 14 0F AF 75 0C 89 4D CC 8B 4D 08 8B 54 F1 04 8B 04 F1 81 F2 00 00 00 80 8B 75 10 8B 4D CC 89 04 31 89 54 31 04 FF 45 F0 8B 75 18 8B 45 E8 01 75 DC 03 7D E4 39 45 F0 72 9B
-
-. 1939 8054388 28
-. 8B 45 E0 40 C7 45 EC 01 00 00 00 89 85 6C FF FF FF D1 E8 39 45 EC 0F 83 DF 02 00 00
-
-. 1940 8054683 13
-. F7 45 E0 01 00 00 00 0F 85 01 01 00 00
-
-. 1941 8054690 19
-. C7 45 E8 00 00 00 00 8B 55 DC 39 55 E8 0F 83 EE 00 00 00
-***** EXPENSIVE 1943 440
-
-. 1942 80546A3 161
-. 8B 4D E0 8B 75 E0 49 C1 E6 02 DD 83 DC F8 FF FF 89 8D 68 FF FF FF 89 CF 89 B5 64 FF FF FF 8D 76 00 8B 45 E0 8D 14 47 8B 45 0C 8B 4D 08 0F AF C7 DD 04 C1 8D 04 FD 08 00 00 00 0F AF 45 0C DD 04 08 8B 45 0C 0F AF C2 8D 14 D5 08 00 00 00 0F AF 55 0C DD 04 C1 DD 04 0A D9 C4 D9 FA D9 C3 D8 C2 DE C9 D9 C5 D9 FA 8B 95 68 FF FF FF D9 C5 03 55 E4 D8 E4 8B 45 E4 8D 0C 10 DE C9 01 C8 D9 C0 D9 CE DE C4 D9 CA DE E4 D9 CA 8B 75 14 0F AF B5 68 FF FF FF 0F AF 55 14 0F AF 4D 14 89 85 34 FF FF FF
-***** EXPENSIVE 1944 441
-
-. 1943 8054744 75
-. D8 C0 D9 CC 8B 45 10 D8 E2 D9 CB D8 C0 D9 CC DD 1C F0 DE C1 D9 C9 DD 1C D0 D9 C9 8B B5 34 FF FF FF DD 1C C8 8B 55 E0 FF 45 E8 8B 4D DC 0F AF 75 14 D9 E0 01 95 68 FF FF FF 03 BD 64 FF FF FF 39 4D E8 DD 1C F0 0F 82 35 FF FF FF
-***** EXPENSIVE 1945 442
-
-. 1944 805478F 13
-. DD D8 81 C4 C4 00 00 00 5B 5E 5F C9 C3
-***** EXPENSIVE 1946 443
-
-. 1945 805B934 160
-. 8B 95 4C FF FF FF 03 55 E4 8B 75 E4 8D 0C 16 01 CE 8B 45 0C 0F AF 85 4C FF FF FF 89 B5 44 FF FF FF 8B 75 08 D9 04 86 0F AF 55 0C 0F AF 4D 0C D9 04 96 D9 04 8E D9 CA D9 5D D8 8B B5 44 FF FF FF 0F AF 75 0C 8B 45 08 D9 45 D8 D9 04 B0 D9 C9 D8 C3 8B 45 D0 D9 C2 D8 C2 D9 CB 8D 14 38 DE E2 8B 45 14 D9 C0 8B 4D 10 0F AF 85 50 FF FF FF D8 C3 D9 1C 81 D9 CB 8B 45 14 0F AF C7 D8 6D D8 D9 14 81 D9 C9 8D 04 BD 04 00 00 00 0F AF 45 14 D9 E0 D9 1C 08 D9 C9 0F AF 55 14 DE EA D9 C9 8B 45 18
-***** EXPENSIVE 1947 444
-
-. 1946 805B9D4 44
-. D9 14 91 D9 C9 03 7D 18 D9 5D D8 D9 5D D4 01 85 50 FF FF FF 8B 55 DC FF 45 E8 8B 4D E0 01 95 4C FF FF FF 39 4D E8 0F 82 34 FF FF FF
-
-. 1947 805B495 15
-. C7 45 F0 00 00 00 00 8B 55 E8 39 55 F0 73 63
-***** EXPENSIVE 1949 445
-
-. 1948 805B4A4 99
-. 8B 7D E4 4F 89 FE 89 F6 8B 45 EC 8B 55 14 0F AF D7 8D 0C 30 8B 45 0C 89 55 D0 0F AF C6 8B 55 08 D9 04 82 8B 45 D0 8B 55 10 D9 1C 82 8D 14 BD 04 00 00 00 0F AF 55 14 0F AF 4D 0C 89 55 D0 8B 55 08 8B 04 8A 35 00 00 00 80 8B 4D 10 8B 55 D0 89 04 0A FF 45 F0 8B 4D E8 03 7D 18 03 75 E4 39 4D F0 72 A5
-
-. 1949 8056B76 28
-. 8B 45 E0 40 C7 45 EC 01 00 00 00 89 85 5C FF FF FF D1 E8 39 45 EC 0F 83 FE 02 00 00
-
-. 1950 8056E90 13
-. F7 45 E0 01 00 00 00 0F 85 3E 01 00 00
-
-. 1951 8056E9D 19
-. C7 45 E8 00 00 00 00 8B 45 DC 39 45 E8 0F 83 2B 01 00 00
-***** EXPENSIVE 1953 446
-
-. 1952 8056EB0 188
-. 8B 55 E0 8B 4D E0 4A C1 E1 02 89 95 58 FF FF FF 89 D7 89 8D 54 FF FF FF 8B 45 0C 8B 4D 08 0F AF C7 D9 04 81 8D 04 BD 04 00 00 00 0F AF 45 0C 8B 75 E0 8D 14 77 D9 04 08 D9 C9 8B 45 0C 0F AF C2 8D 14 95 04 00 00 00 0F AF 55 0C D9 9D 70 FF FF FF D9 04 0A D9 9D 64 FF FF FF D9 95 6C FF FF FF D9 04 81 DD 83 DC F8 FF FF D9 FA D9 CA D8 85 64 FF FF FF DE CA D9 C9 D9 9D 60 FF FF FF DD 83 DC F8 FF FF D9 FA D9 85 70 FF FF FF D8 E2 8B 95 58 FF FF FF 03 55 E4 DE C9 8B 45 E4 D9 85 70 FF FF FF D9 C9 D9 5D F0 8D 0C 10 DE C1 D9 85 64 FF FF FF D9 45 F0 01 C8 D9 85 60 FF FF FF
-***** EXPENSIVE 1954 447
-
-. 1953 8056F6C 111
-. D9 CA D8 A5 6C FF FF FF D9 CA 8B 75 14 0F AF B5 58 FF FF FF 0F AF 55 14 0F AF 4D 14 D8 E9 D9 CB 89 85 34 FF FF FF D8 C0 D9 CA 8B 45 10 D8 C0 D9 CA D9 1C B0 D8 85 60 FF FF FF D9 CA D9 1C 90 8B B5 34 FF FF FF D9 1C 88 8B 55 E0 FF 45 E8 8B 4D DC 0F AF 75 14 D9 E0 01 95 58 FF FF FF 03 BD 54 FF FF FF 39 4D E8 D9 1C B0 0F 82 ED FE FF FF
-vex iropt: 2 x unrolling (32 sts -> 64 sts)
-
-. 1954 804CCAC 30
-. 89 C8 31 D2 F7 75 EC 89 C1 8B 55 14 8B 45 EC 89 04 BA 31 D2 89 C8 F7 75 EC 47 85 D2 74 E2
-
-. 1955 804D8B0 11
-. 8B 75 E8 85 F6 0F 85 CB 01 00 00
-
-. 1956 804DA86 6
-. 83 7D 18 FF 74 32
-***** EXPENSIVE 1958 448
-
-. 1957 804DABE 39
-. 8B 45 8C 8B 55 24 DD 44 02 F0 DD 5D C8 DD 44 02 F8 8B 55 28 DD 5D C0 DD 44 02 F0 DD 5D B8 DD 44 02 F8 E9 F1 FD FF FF
-***** EXPENSIVE 1959 449
-
-. 1958 804D8D6 25
-. DD 5D B0 C7 45 E4 00 00 00 00 8B 85 7C FF FF FF 39 45 E4 0F 83 77 01 00 00
-***** EXPENSIVE 1960 450
-
-. 1959 804D91C 140
-. 8B 45 08 DD 04 08 DD 5D A8 DD 44 08 08 8B 45 EC 03 45 E0 0F AF 45 0C C1 E0 04 8B 55 08 DD 04 02 D9 C9 DD 5D A0 DD 44 02 08 8B 55 EC 8B 45 E0 8D 04 42 89 45 80 0F AF 45 0C C1 E0 04 8B 55 08 DD 04 02 DD 44 02 08 D9 C3 D9 C3 D9 C9 D8 C3 D9 C9 D8 C2 DD 83 BC F8 FF FF DD 83 BC F8 FF FF D9 C9 D8 CB D9 C9 D8 CA D9 C9 DC 6D A8 D9 C9 DC 6D A0 D9 CF DE E5 D9 CD DE E3 D9 CB DC 4D 98 D9 CA DC 4D 98 D9 C9 8B 45 10 DC 45 A8 D9 CB
-***** EXPENSIVE 1961 451
-
-. 1960 804D9A8 132
-. DC 45 A0 8B 95 7C FF FF FF D9 C4 D9 C6 D9 C9 D8 E3 D9 C9 D8 C4 D9 CE DE C3 D9 CE DE E3 D9 CB DD 14 30 D9 CB DD 54 30 08 DD 45 C8 8D 04 3A DD 45 C0 0F AF 45 14 D8 CE D9 C9 D8 CF C1 E0 04 DE E1 D9 CC 8B 55 10 DD 5D A8 DD 5D A0 D9 CA DD 1C 02 D9 CA DC 4D C8 D9 CB DC 4D C0 DE C3 D9 CA DD 5C 02 08 8B 95 7C FF FF FF 8D 04 57 DD 45 B8 DD 45 B0 D9 C9 0F AF 45 14 D8 CB D9 C9 D8 CA D9 CB DC 4D B0 D9 CA
-***** EXPENSIVE 1962 452
-
-. 1961 804DA2C 58
-. DC 4D B8 D9 C9 C1 E0 04 8B 55 10 DE E3 DE C1 D9 C9 DD 1C 02 DD 5C 02 08 FF 45 E4 8B 45 0C 8B 95 7C FF FF FF 03 4D 90 01 45 88 FF 45 EC 03 75 94 47 39 55 E4 0F 82 B6 FE FF FF
-***** EXPENSIVE 1963 453
-
-. 1962 804DA8C 50
-. 8B 45 8C 8B 55 24 DD 44 02 F0 DD 5D C8 DD 44 02 F8 8B 55 28 DD 5D C0 DD 44 02 F0 DD 5D B8 DD 44 02 F8 DD 5D B0 80 75 C7 80 80 75 B7 80 E9 1B FE FF FF
-
-. 1963 804D8D9 22
-. C7 45 E4 00 00 00 00 8B 85 7C FF FF FF 39 45 E4 0F 83 77 01 00 00
-
-. 1964 8050D18 11
-. 8B 45 E4 85 C0 0F 85 A5 01 00 00
-
-. 1965 8050EC8 6
-. 83 7D 18 FF 74 34
-***** EXPENSIVE 1967 454
-
-. 1966 8050F02 43
-. 8B 45 A4 8B 55 24 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 28 D9 5D CC D9 44 02 F8 D9 C9 D9 5D C8 D9 5D C4 D9 44 02 FC E9 11 FE FF FF
-***** EXPENSIVE 1968 455
-
-. 1967 8050D3E 22
-. D9 5D C0 C7 45 E0 00 00 00 00 8B 45 94 39 45 E0 0F 83 54 01 00 00
-***** EXPENSIVE 1969 456
-
-. 1968 8050D6C 142
-. 8B 45 08 D9 04 C8 D9 44 C8 04 8B 45 E8 03 45 DC 0F AF 45 0C 8B 55 08 D9 04 C2 D9 C9 D9 5D B8 D9 44 C2 04 8B 55 E8 8B 45 DC 8D 04 42 89 45 98 8B 55 08 0F AF 45 0C D9 04 C2 D9 C2 D9 CC D9 5D BC DC C3 DD 83 BC F8 FF FF D8 CC D9 44 C2 04 D9 C9 D8 6D BC D9 C3 D8 C2 D9 C9 D9 5D EC DD 83 BC F8 FF FF D8 C9 D8 6D B8 D9 5D B4 D9 CC DE E2 DE EA D9 C9 D8 4D B0 D9 45 EC D9 CA D8 4D B0 D9 45 B4 D9 CD D8 45 BC D9 CC D8 45 B8 D9 CD D8 C1
-***** EXPENSIVE 1970 457
-
-. 1969 8050DFA 127
-. D9 C3 D9 CA D8 6D B4 D9 CC D8 C3 D9 CA DE E3 D9 CC D9 55 BC D9 CD D9 55 B8 D9 C9 D9 55 AC D9 CB D9 55 A8 8B 45 10 8B 55 94 D9 45 CC D9 45 C8 D9 CF D9 1C F0 D9 CA D9 5C F0 04 D9 CD D8 CC D9 C9 8D 04 3A D8 CA D9 CC D8 4D CC D9 CA D8 4D C8 D9 CC 0F AF 45 14 DE E1 D9 C9 8B 55 10 DE C3 D9 1C C2 D9 C9 D9 5C C2 04 D9 45 C4 8B 55 94 D9 45 C0 8D 04 57 D8 CB D9 C9 D8 CA 0F AF 45 14 DE E1
-***** EXPENSIVE 1971 458
-
-. 1970 8050E79 47
-. 8B 55 10 D9 1C C2 D9 45 C0 D9 45 C4 DE CB DE C9 DE C1 D9 5C C2 04 FF 45 E0 8B 45 94 03 4D 0C FF 45 E8 03 75 14 47 39 45 E0 0F 82 C4 FE FF FF
-***** EXPENSIVE 1972 459
-
-. 1971 8050ECE 52
-. 8B 45 A4 8B 55 24 D9 44 02 F8 D9 44 02 FC 8B 55 28 D9 5D C8 D9 44 02 FC D9 C9 D9 5D CC D9 5D C0 D9 44 02 F8 80 75 CB 80 D9 5D C4 80 75 C3 80 E9 3F FE FF FF
-
-. 1972 8050D41 19
-. C7 45 E0 00 00 00 00 8B 45 94 39 45 E0 0F 83 54 01 00 00
-
-. 1973 8058FD3 27
-. 8B 4D DC 41 89 C8 C7 45 EC 01 00 00 00 D1 E8 39 45 EC 89 4D 94 0F 83 07 02 00 00
-***** EXPENSIVE 1975 460
-
-. 1974 8058FEE 76
-. C7 45 8C 10 00 00 00 8D 76 00 8B 45 8C 8B 55 20 DD 44 02 F0 DD 44 02 F8 8B 55 24 DD 5D C0 DD 44 02 F8 D9 C9 DD 5D C8 DD 5D B0 DD 44 02 F0 C7 45 E8 00 00 00 00 8B 45 E0 80 75 C7 80 80 75 B7 80 39 45 E8 DD 5D B8 0F 83 A6 01 00 00
-***** EXPENSIVE 1976 461
-
-. 1975 805903A 171
-. 8B 4D D4 81 F1 00 00 00 80 8B 45 DC 89 4D 9C 2B 45 EC 8B 4D EC 8B 55 D0 8D 44 00 FF 8D 74 09 FF 89 55 98 89 45 90 89 F7 89 F6 8B 45 E4 8D 14 38 01 D0 8B 4D 0C 89 85 7C FF FF FF 0F AF CF 8B 45 08 DD 04 C8 8D 04 FD 08 00 00 00 8B 4D 08 0F AF 45 0C DD 5D A8 DD 04 08 8B 45 0C 0F AF C2 8D 14 D5 08 00 00 00 DD 04 C1 0F AF 55 0C 8B 45 0C DD 04 0A 0F AF 85 7C FF FF FF 8B 95 7C FF FF FF DD 04 C1 D9 CB DD 5D A0 8D 0C D5 08 00 00 00 DD 45 C8 DD 45 C0 0F AF 4D 0C 8B 45 08 D8 CA D9 C9 D8 CB D9 CA DC 4D C8 D9 CB DC 4D C0
-***** EXPENSIVE 1977 462
-
-. 1976 80590E5 122
-. DD 04 01 D9 CB DE E2 DE C3 DD 45 B8 DD 45 B0 DD 45 B8 D9 C9 D8 CC D9 CA D8 CE D9 C9 DE CC D9 CD DC 4D B0 D9 CD DE E1 D9 CA DE C4 D9 C0 D9 C3 D9 C9 D8 C3 D9 C9 D8 C5 DD 83 BC F8 FF FF DD 83 BC F8 FF FF D9 C9 D8 CB D9 C9 D8 CA D9 CC DE E5 D9 CD DE E6 D9 C9 DC 45 A8 D9 CC DC 6D A8 D9 CA DC 6D A0 D9 CB DC 4D 98 D9 CD DC 4D 98 D9 CC DD 55 A8 8B 4D DC 8B 45 14 8D 14 4E
-***** EXPENSIVE 1978 463
-
-. 1977 805915F 129
-. 0F AF C6 8B 4D 10 DD 1C C1 8D 04 F5 08 00 00 00 0F AF 45 14 DC 45 A0 DD 14 08 D9 C1 8B 45 14 0F AF C2 D9 C3 D9 C9 D8 E5 8D 14 D5 08 00 00 00 DD 1C C1 0F AF 55 14 D8 C5 8B 45 14 DD 1C 0A D9 C9 0F AF 45 90 8B 55 90 DE C3 D9 CA DD 1C C1 DE E2 D9 C9 8D 04 D5 08 00 00 00 0F AF 45 14 D9 E0 DD 1C 08 FF 45 E8 8B 4D 18 8B 45 E0 01 CA 01 CE 03 7D DC 39 45 E8 DD 5D A0 89 55 90 0F 82 84 FE FF FF
-
-. 1978 80591E0 21
-. 8B 45 94 FF 45 EC D1 E8 83 45 8C 10 39 45 EC 0F 82 03 FE FF FF
-
-. 1979 80591F5 13
-. F7 45 DC 01 00 00 00 0F 85 9F 00 00 00
-***** EXPENSIVE 1981 464
-
-. 1980 8053754 57
-. 8B 7D A4 90 8B 75 AC 01 75 B4 8B 45 B4 31 D2 F7 75 08 89 55 B4 31 D2 52 8B 45 B4 50 DF 2C 24 DC 4D C8 83 EC 08 8B 45 C4 8B B0 08 02 00 00 DD 55 88 DD 1C 24 E8 93 4E FF FF
-***** EXPENSIVE 1982 465
-
-. 1981 805378D 23
-. DD 1C 3E 8B 55 C4 DD 45 88 8B B2 08 02 00 00 DD 1C 24 E8 8C 4F FF FF
-***** EXPENSIVE 1983 466
-
-. 1982 80537A4 34
-. 8B 45 B0 FF 45 B8 D1 E8 DD 5C 3E 08 83 45 A8 10 83 C7 10 83 45 A4 10 FF 45 DC 83 C4 10 39 45 B8 72 92
-***** EXPENSIVE 1984 467
-
-. 1983 8053FA6 70
-. C7 45 8C 10 00 00 00 C7 45 80 02 00 00 00 8B 4D 8C 8B 75 20 DD 44 0E F0 8B 45 24 DD 5D C8 DD 44 0E F8 DD 5D C0 DD 44 08 F0 DD 5D B8 C7 45 E8 00 00 00 00 DD 44 08 F8 8B 45 D4 39 45 E8 DD 5D B0 0F 83 A7 01 00 00
-***** EXPENSIVE 1985 468
-
-. 1984 8053FEC 170
-. 8B 55 80 8B 4D D8 89 D7 D1 E1 89 55 AC 4F 89 4D A8 C7 45 84 00 00 00 00 8B 55 AC 8B 75 84 8D 44 32 FF 8B 4D A8 8D 34 01 8B 4D 84 29 D1 8B 55 A8 8D 4C 0A FF 89 8D 74 FF FF FF 8B 4D 0C 8B 55 08 0F AF C8 8D 04 C5 08 00 00 00 DD 04 CA 0F AF 45 0C DD 5D A0 DD 04 10 8B 45 0C 0F AF C6 DD 04 C2 8B 45 0C 0F AF 85 74 FF FF FF DD 04 C2 8B 85 74 FF FF FF 8D 0C C5 08 00 00 00 8D 34 F5 08 00 00 00 0F AF 75 0C 0F AF 4D 0C D9 C1 D9 CB DD 5D 98 DD 04 11 DD 04 16 D9 CC D8 C2 DD 83 BC F8 FF FF D9 CA D9 E0 D9 C5 D9 CB D8 CA
-***** EXPENSIVE 1986 469
-
-. 1985 8054096 129
-. DC 6D A0 D9 CB D8 C1 D9 CA DC 45 A0 DD 83 BC F8 FF FF D9 CF DE E2 D9 C9 DC 4D E0 D9 C9 DD 5D A0 D9 CD D8 C9 D9 C2 D9 C9 8B 45 14 8B 75 10 DC 6D 98 D9 CA 0F AF C7 DC 45 98 D9 C9 D8 E6 D9 CB DE C6 D9 CC DE E3 DD 45 A0 D9 CB DC 4D E0 8B 4D DC D9 C1 D9 CD DD 55 98 D9 CC DD 1C C6 8D 04 FD 08 00 00 00 DC C4 DE E9 0F AF 45 14 DD 45 C8 DD 45 C0 D9 CC DD 1C 30 D9 CB 8D 14 39 D8 CC D9 CB D8 CA
-***** EXPENSIVE 1987 470
-
-. 1986 8054117 124
-. 8B 45 14 0F AF C2 DE E3 D9 CA DD 1C C6 8D 0C 11 DC 4D C0 D9 CA 8D 14 D5 08 00 00 00 DC 4D C8 8B 45 14 DD 45 B8 DD 45 B0 D9 C9 0F AF C1 0F AF 55 14 D8 CD D9 C9 D8 CB D9 CC DE C2 D9 CC 8D 0C CD 08 00 00 00 DC 4D B0 D9 CA DC 4D B8 D9 C9 DD 1C 32 D9 CB 0F AF 4D 14 DE E2 DE C2 8B 55 D8 DD 1C C6 FF 45 E8 DD 1C 31 8D 04 52 8B 4D D4 03 7D D8 01 45 84 39 4D E8 0F 82 71 FE FF FF
-
-. 1987 8054193 25
-. 8B 45 94 FF 45 EC D1 E8 83 45 8C 10 83 45 80 02 39 45 EC 0F 82 08 FE FF FF
-***** EXPENSIVE 1989 471
-vex iropt: not unrolling (110 sts)
-
-. 1988 8053EEC 147
-. 8B 75 D8 8B 45 0C 0F AF C7 8B 4D 08 D1 E6 DD 04 C1 8D 54 3E FF 8B 45 0C 0F AF C2 8D 14 D5 08 00 00 00 DD 04 C1 0F AF 55 0C D9 C1 8B 45 88 D9 C3 DC 0C 0A D9 C9 D8 E2 D9 CA 03 45 DC D8 C0 8B 55 DC 01 C2 DE C3 8B 4D 14 D9 C1 0F AF 4D 88 0F AF 45 14 03 75 D8 89 95 7C FF FF FF D8 E1 D9 CB 8B 55 10 DD 1C CA D9 CA 01 F7 DD 1C C2 8B 75 D8 8B 95 7C FF FF FF FF 45 E8 8B 45 D4 0F AF 55 14 DE C1 8B 4D 10 01 75 88 39 45 E8 DD 1C D1 0F 82 6D FF FF FF
-
-. 1989 805B612 27
-. 8B 55 DC 42 89 D0 C7 45 EC 01 00 00 00 D1 E8 39 45 EC 89 55 B8 0F 83 F5 01 00 00
-***** EXPENSIVE 1991 472
-
-. 1990 805B62D 73
-. C7 45 AC 02 00 00 00 8B 4D AC 8B 45 20 D9 44 88 F8 D9 44 88 FC 8B 45 24 D9 5D D0 D9 44 88 FC D9 C9 D9 5D D4 D9 5D C8 D9 44 88 F8 C7 45 E8 00 00 00 00 8B 45 E0 80 75 D3 80 80 75 CB 80 39 45 E8 D9 5D CC 0F 83 97 01 00 00
-***** EXPENSIVE 1992 473
-
-. 1991 805B676 160
-. 8B 45 DC 2B 45 EC 8D 44 00 FF D9 45 D8 89 45 B0 8B 45 EC D9 83 EC F8 FF FF D9 C9 D9 E0 D9 C9 8D 74 00 FF D9 5D B4 D9 5D BC 89 F7 8D 76 00 8B 4D E4 8D 14 39 01 D1 8B 45 0C 89 4D A0 0F AF C7 8B 4D 08 D9 04 81 8D 04 BD 04 00 00 00 0F AF 45 0C D9 04 08 8B 45 0C 0F AF C2 8D 14 95 04 00 00 00 D9 04 81 D9 C9 0F AF 55 0C 8B 45 0C D9 5D C0 0F AF 45 A0 D9 04 0A 8B 55 A0 D9 04 81 D9 CB D9 5D C4 8D 0C 95 04 00 00 00 D9 45 D4 D9 45 D0 0F AF 4D 0C 8B 45 08 D8 CA D9 C9 D8 CB D9 CA D8 4D D4
-***** EXPENSIVE 1993 474
-
-. 1992 805B716 115
-. D9 CB D8 4D D0 D9 04 01 D9 CB DE E2 DE C3 D9 45 CC D9 45 C8 D9 45 CC D9 C9 D8 CC D9 CA D8 CE D9 C9 DE CC D9 CD D8 4D C8 D9 CD DE E1 D9 CA DE C4 D9 C0 D9 C3 D9 C9 D8 C3 D9 C9 D8 C5 D9 45 B4 D9 45 B4 D9 C9 D8 CB D9 C9 D8 CA D9 CC DE E5 D9 CD DE E6 D8 45 C0 D9 CC D8 6D C4 D9 CA D8 6D C0 D9 CB D8 4D BC D9 CD D8 4D BC D9 C9 D8 45 C4 D9 CC D9 55 C0
-***** EXPENSIVE 1994 475
-
-. 1993 805B789 132
-. D9 CC 8B 4D DC 8B 45 14 8D 14 4E 0F AF C6 8B 4D 10 D9 1C 81 D9 CB 8D 04 B5 04 00 00 00 0F AF 45 14 D9 1C 08 D9 C0 8B 45 14 0F AF C2 D9 C2 D9 C9 D8 E4 8D 14 95 04 00 00 00 D9 1C 81 0F AF 55 14 D8 C4 8B 45 14 D9 1C 0A 0F AF 45 B0 8B 55 B0 DE C2 D9 C9 D9 1C 81 DE E1 8D 04 95 04 00 00 00 0F AF 45 14 D9 E0 D9 1C 08 FF 45 E8 8B 4D 18 8B 45 E0 01 CA 01 CE 03 7D DC 39 45 E8 89 55 B0 0F 82 97 FE FF FF
-
-. 1994 805B80D 21
-. 8B 45 B8 FF 45 EC D1 E8 83 45 AC 02 39 45 EC 0F 82 12 FE FF FF
-
-. 1995 805B822 13
-. F7 45 DC 01 00 00 00 0F 85 9C 00 00 00
-***** EXPENSIVE 1997 476
-
-. 1996 8055FC4 45
-. 03 7D B0 89 F8 31 D2 F7 75 08 89 D7 31 D2 52 57 DF 2C 24 DC 4D C8 83 EC 08 8B 45 C4 8B B0 08 02 00 00 DD 55 98 DD 1C 24 E8 2F 26 FF FF
-***** EXPENSIVE 1998 477
-
-. 1997 8055FF1 26
-. 8B 55 D8 D9 1C D6 8B 45 C4 DD 45 98 8B B0 08 02 00 00 DD 1C 24 E8 25 27 FF FF
-***** EXPENSIVE 1999 478
-
-. 1998 805600B 27
-. 8B 45 B4 8B 55 D8 FF 45 B8 D1 E8 D9 5C D6 04 83 C4 10 42 39 45 B8 89 55 D8 72 9E
-
-. 1999 8056026 5
-. E9 34 FF FF FF
-***** EXPENSIVE 2001 479
-
-. 2000 8056790 68
-. C7 45 A4 02 00 00 00 90 8B 4D A4 8B 75 20 8B 45 24 D9 44 8E F8 D9 44 8E FC D9 C9 D9 5D D4 D9 5D D0 D9 44 88 F8 D9 44 88 FC D9 C9 C7 45 E8 00 00 00 00 8B 45 D8 39 45 E8 D9 5D CC D9 5D C8 0F 83 BA 01 00 00
-***** EXPENSIVE 2002 480
-
-. 2001 80567D4 167
-. 89 4D C4 8B 4D DC 8B 55 EC D1 E1 8D 7C 12 FF 89 4D C0 C7 45 9C 00 00 00 00 8D 76 00 8B 55 C4 8B 75 9C 8D 44 32 FF 8B 4D C0 8D 34 01 8B 4D 9C 29 D1 8B 55 C0 8D 4C 0A FF 89 4D 94 8B 4D 0C 0F AF C8 8D 04 85 04 00 00 00 8B 55 08 0F AF 45 0C D9 04 10 8B 45 0C 0F AF C6 D9 04 82 8B 45 0C D9 04 8A 0F AF 45 94 D9 04 82 D9 C9 D9 5D BC 8B 45 94 D9 C1 8D 0C 85 04 00 00 00 D8 C1 8D 34 B5 04 00 00 00 0F AF 75 0C 0F AF 4D 0C D9 5D B4 DD 83 BC F8 FF FF D9 04 11 D9 CC D9 5D B8 D8 4D B4 D9 04 16 D9 CC D9 E0 D9 C9
-***** EXPENSIVE 2003 481
-
-. 2002 805687B 135
-. D8 6D BC D9 C4 D9 C9 D9 5D F0 D8 C1 DD 83 BC F8 FF FF D8 C9 D8 6D B8 D9 45 F0 D9 C9 D9 5D F0 D9 45 BC D9 CE DE E3 D9 CD D8 45 B4 D9 CC DE E3 D9 C9 D8 4D E4 D9 45 F0 D9 CB D8 4D E4 D9 CC D9 5D BC 8B 45 E0 8D 14 38 D9 C2 8D 0C 10 D8 C4 8B 45 14 8B 75 10 0F AF C7 D9 5D B0 D9 45 BC D9 1C 86 D9 C4 8D 04 BD 04 00 00 00 D8 E1 D9 CD DE C1 D9 C9 0F AF 45 14 D8 45 B8 D9 45 D4 D9 45 D0 D9 CA D9 14 30 D9 C9 D8 CE
-***** EXPENSIVE 2004 482
-
-. 2003 8056902 140
-. D9 CA D8 4D B0 8B 45 14 0F AF C2 DE EA D9 C9 D9 1C 86 D9 45 D4 D8 4D B0 D9 CD D8 4D D0 D9 CB DE E4 D9 CA DE C4 8D 14 95 04 00 00 00 8B 45 14 D9 45 CC D9 45 C8 D9 C9 0F AF C1 0F AF 55 14 D8 CA D9 C9 D8 CC D9 CA 8D 0C 8D 04 00 00 00 D8 4D C8 D9 CC D8 4D CC D9 CD D9 1C 32 0F AF 4D 14 DE E1 D9 CA DE C3 D9 C9 8B 55 DC D9 1C 86 D9 C9 FF 45 E8 D9 1C 31 8D 04 52 8B 4D D8 03 7D DC 01 45 9C 39 4D E8 D9 5D B8 0F 82 62 FE FF FF
-
-. 2004 805698E 21
-. 8B 45 AC FF 45 EC D1 E8 83 45 A4 02 39 45 EC 0F 82 F5 FD FF FF
-***** EXPENSIVE 2006 483
-vex iropt: not unrolling (116 sts)
-
-. 2005 80566DC 141
-. 8B 75 DC 8B 45 0C 0F AF C7 8B 4D 08 D1 E6 D9 04 81 8D 54 3E FF 8B 45 0C 0F AF C2 8D 14 95 04 00 00 00 D9 04 81 0F AF 55 0C D9 C1 8B 45 A0 D9 C3 D8 0C 0A D9 C9 D8 E2 D9 CA 03 45 E0 D8 C0 8B 55 E0 01 C2 DE C3 8B 4D 14 D9 C1 0F AF 4D A0 0F AF 45 14 03 75 DC 89 55 98 D8 E1 D9 CB 8B 55 10 D9 1C 8A D9 CA 01 F7 D9 1C 82 8B 75 DC 8B 55 98 FF 45 E8 8B 45 D8 0F AF 55 14 DE C1 8B 4D 10 01 75 A0 39 45 E8 D9 1C 91 0F 82 73 FF FF FF
-
-. 2006 804DF14 11
-. 8B 45 E4 85 C0 0F 85 80 04 00 00
-
-. 2007 804E39F 6
-. 83 7D 18 FF 74 65
-***** EXPENSIVE 2009 484
-
-. 2008 804E40A 87
-. 8B 85 DC FE FF FF 8B 55 24 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 28 DD 5D B8 DD 5D B0 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 2C DD 5D A8 DD 5D A0 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 30 DD 5D 98 DD 5D 90 DD 44 02 F0 DD 44 02 F8 D9 C9 DD 5D 88 DD 5D 80 E9 F2 FA FF FF
-
-. 2009 804DF53 19
-. C7 45 E0 00 00 00 00 8B 45 D4 39 45 E0 0F 83 13 04 00 00
-***** EXPENSIVE 2011 485
-
-. 2010 804E3A5 101
-. 8B 85 DC FE FF FF 8B 55 24 DD 44 02 F0 DD 44 02 F8 8B 55 28 DD 5D B0 DD 5D B8 DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 2C DD 5D A0 DD 5D A8 DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 30 DD 5D 90 DD 44 02 F8 D9 C9 DD 5D 98 DD 5D 80 DD 44 02 F0 80 75 B7 80 80 75 A7 80 80 75 97 80 DD 5D 88 80 75 87 80 E9 49 FB FF FF
-
-. 2011 80512DC 11
-. 8B 45 E0 85 C0 0F 85 91 04 00 00
-
-. 2012 8051778 6
-. 83 7D 18 FF 74 65
-***** EXPENSIVE 2014 486
-
-. 2013 80517E3 84
-. 8B 85 18 FF FF FF 8B 55 24 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 28 D9 5D C0 D9 5D BC D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 2C D9 5D B8 D9 5D B4 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 30 D9 5D B0 D9 44 02 F8 D9 C9 D9 5D AC D9 5D A8 D9 44 02 FC E9 DF FA FF FF
-***** EXPENSIVE 2015 487
-
-. 2014 8051316 22
-. D9 5D A4 C7 45 DC 00 00 00 00 8B 45 D0 39 45 DC 0F 83 26 04 00 00
-***** EXPENSIVE 2016 488
-
-. 2015 805177E 101
-. 8B 85 18 FF FF FF 8B 55 24 D9 44 02 F8 D9 44 02 FC 8B 55 28 D9 5D BC D9 5D C0 D9 44 02 FC D9 44 02 F8 D9 C9 8B 55 2C D9 5D B4 D9 5D B8 D9 44 02 FC D9 44 02 F8 D9 C9 8B 55 30 D9 5D AC D9 44 02 FC D9 C9 D9 5D B0 D9 5D A4 D9 44 02 F8 80 75 BF 80 80 75 B7 80 80 75 AF 80 D9 5D A8 80 75 A7 80 E9 36 FB FF FF
-
-. 2016 8051319 19
-. C7 45 DC 00 00 00 00 8B 45 D0 39 45 DC 0F 83 26 04 00 00
-***** EXPENSIVE 2018 489
-
-. 2017 805879C 53
-. 8B 45 B0 01 45 B8 8B 45 B8 31 D2 F7 75 08 89 55 B8 31 D2 52 8B 45 B8 50 DF 2C 24 DC 4D D0 83 EC 08 8B 4D CC 8B B1 08 02 00 00 DD 55 98 DD 1C 24 E8 4F FE FE FF
-***** EXPENSIVE 2019 490
-
-. 2018 80598BC 158
-. 8B 95 BC FE FF FF 03 55 E4 8B 75 E4 8D 0C 16 8D 34 0E 8B 7D E4 01 F7 8B 45 0C 89 BD 9C FE FF FF 0F AF 85 BC FE FF FF 8B 7D 08 0F AF 55 0C 0F AF 4D 0C 0F AF 75 0C DD 04 D7 DD 04 CF DD 04 F7 DD 04 C7 8B BD 9C FE FF FF 0F AF 7D 0C 8B 45 08 DD 04 F8 D9 C4 D8 C1 D9 C4 D8 C4 D9 C1 D9 CF DE E3 D9 CD DE E4 D9 CD D8 C4 DD 85 E8 FE FF FF D9 FA D9 CE DE E5 D9 CD DC 8D E0 FE FF FF DE CC DD 85 E0 FE FF FF D8 CD 8B 45 14 8B 4D 10 0F AF 85 C0 FE FF FF D8 EA D9 CA DE C5 D9 CC DD 1C C1
-***** EXPENSIVE 2020 491
-
-. 2019 805995A 150
-. D9 C0 DD 45 D0 D9 C9 8B 45 14 0F AF 85 C4 FE FF FF 8B B5 C4 FE FF FF D8 C4 D9 CA DE E4 D9 E0 DD 45 C8 D9 CA DD 1C C1 D9 C9 D8 CA D9 C9 8D 04 F5 08 00 00 00 D8 CC 0F AF 45 14 DE E1 8B 95 C4 FE FF FF DD 45 C8 D9 C9 03 55 C4 DD 1C 08 D9 E0 8B 45 14 0F AF C2 DE CB DC 4D D0 8D 14 D5 08 00 00 00 0F AF 55 14 DE C2 DD 1C C1 8B 7D 18 DD 1C 0A 8B 45 DC FF 45 E8 8B 55 E0 01 FE 01 BD C0 FE FF FF 01 85 BC FE FF FF 39 55 E8 89 B5 C4 FE FF FF 0F 82 CC FE FF FF
-***** EXPENSIVE 2021 492
-
-. 2020 8058D44 32
-. 8B 45 D8 C7 45 F0 00 00 00 00 8B 55 E8 DD 40 F8 39 55 F0 DD 40 F0 D9 C9 D9 E0 0F 83 6C 01 00 00
-
-. 2021 8054982 30
-. 8B 75 D0 46 89 F0 C7 45 EC 01 00 00 00 D1 E8 39 45 EC 89 B5 FC FE FF FF 0F 83 EB 04 00 00
-
-. 2022 8054E8B 13
-. F7 45 D0 01 00 00 00 0F 85 86 01 00 00
-
-. 2023 8054E98 19
-. C7 45 E8 00 00 00 00 8B 75 CC 39 75 E8 0F 83 73 01 00 00
-***** EXPENSIVE 2025 493
-
-. 2024 8054EAB 174
-. 8B 45 D0 48 DD 83 C4 F8 FF FF DD 83 CC F8 FF FF D9 C9 DD 9D F0 FE FF FF DD 9D E8 FE FF FF 89 85 E4 FE FF FF 89 85 D4 FE FF FF 8D 76 00 8B B5 D4 FE FF FF 8B 45 0C 8B 7D 08 0F AF C6 DD 04 C7 8D 04 F5 08 00 00 00 8B 4D D0 0F AF 45 0C 8D 14 4E DD 04 38 D9 C9 8B 45 0C 0F AF C2 D8 C0 DD 04 C7 8D 0C 8E D8 C0 D9 C1 8D 14 D5 08 00 00 00 0F AF 55 0C 0F AF 4D 0C D8 C1 DD 85 E8 FE FF FF DD 04 3A DD 04 CF D9 CA D8 CB D9 CD DD 9D A8 FE FF FF D9 CD D8 C0 D9 CD D8 C0 D9 CC D8 E1 DD 85 F0 FE FF FF D9 FA D9 CC DC AD A8 FE FF FF D9 CC
-***** EXPENSIVE 2026 494
-
-. 2025 8054F59 145
-. DC 8D E8 FE FF FF D8 CC D9 CC DD 9D A8 FE FF FF DD 45 E0 DD 45 D8 D9 C9 D8 CE D9 C9 D8 CF 8B 95 E4 FE FF FF DE C1 03 55 D4 8B 45 D4 DD 45 E0 8D 0C 10 DE CF D9 CD DC 4D D8 DE EE 8D 34 08 D9 C3 01 F0 D8 C1 D9 CC 8B 7D 14 0F AF BD E4 FE FF FF DE E1 89 85 A4 FE FF FF D9 C3 D9 CB 8B 45 10 DE C2 D9 C9 DD 1C F8 0F AF 55 14 D9 C0 D9 CA D8 E4 D9 C9 D9 E0 D9 CB D9 E0 D9 C9 8B BD A4 FE FF FF DD 1C D0 D9 C9 0F AF 4D 14 0F AF 75 14 0F AF 7D 14
-***** EXPENSIVE 2027 495
-
-. 2026 8054FEA 52
-. 8B 55 D0 D8 E4 D9 CA DE E4 DE E2 DD 1C C8 D9 C9 FF 45 E8 DD 1C F0 8B 4D CC DD 1C F8 8D 04 92 01 95 E4 FE FF FF 01 85 D4 FE FF FF 39 4D E8 0F 82 BA FE FF FF
-***** EXPENSIVE 2028 496
-
-. 2027 805BF2C 161
-. 8B 95 8C FE FF FF 03 55 E0 8B 75 E0 8D 0C 16 8D 34 0E 8B 7D E0 01 F7 8B 45 0C 89 BD 7C FE FF FF 0F AF 85 8C FE FF FF 8B 7D 08 D9 04 87 0F AF 55 0C 0F AF 4D 0C 0F AF 75 0C D9 04 97 D9 04 B7 D9 CA D9 5D CC D9 04 8F 8B BD 7C FE FF FF 0F AF 7D 0C 8B 45 08 D9 5D C4 D9 04 B8 D9 C9 D9 55 C8 D8 C1 D9 5D C0 D8 6D C8 D9 45 C4 D8 C2 D9 C9 D9 5D B8 D9 45 C0 D8 C1 D9 CA D8 6D C4 D9 CA D9 5D B0 D9 5D BC D9 55 B4 DD 85 B8 FE FF FF D9 FA D9 45 C0 D8 65 BC D9 C9 DC 8D B0 FE FF FF DE C9 D9 5D AC
-***** EXPENSIVE 2029 497
-
-. 2028 805BFCD 161
-. DD 85 B0 FE FF FF D8 4D B0 D8 6D CC D9 5D A8 D9 45 A8 D8 45 AC D9 5D A4 D9 45 D4 D9 E0 D8 4D B8 D9 5D A0 D9 45 D0 D8 C9 D9 45 A8 D9 C9 D8 6D A0 D9 C9 D8 65 AC D9 C9 D9 5D A0 D9 45 D0 D9 C9 D9 5D A8 D9 E0 D9 45 D4 D9 C9 D8 4D B8 D9 C9 DE CA DE C1 8B 45 14 D9 45 CC 0F AF 85 90 FE FF FF D8 45 B0 8B 4D 10 D9 1C 81 8B 45 14 0F AF 85 94 FE FF FF 8B 95 94 FE FF FF D9 45 A4 03 55 9C D9 1C 81 8B 8D 94 FE FF FF 8D 04 8D 04 00 00 00 0F AF 45 14 8B 75 10 D9 45 A0 D9 1C 30 8B 45 14 0F AF C2
-***** EXPENSIVE 2030 498
-
-. 2029 805C06E 61
-. D9 45 A8 D9 1C 86 8D 14 95 04 00 00 00 8B 45 18 0F AF 55 14 01 C1 D9 1C 32 89 8D 94 FE FF FF 8B 55 D8 FF 45 E4 8B 4D DC 01 85 90 FE FF FF 01 95 8C FE FF FF 39 4D E4 0F 82 81 FE FF FF
-***** EXPENSIVE 2031 499
-
-. 2030 805B390 32
-. 8B 55 DC C7 45 F0 00 00 00 00 8B 4D E8 D9 42 FC 39 4D F0 D9 42 F8 D9 C9 D9 E0 0F 83 5E 01 00 00
-
-. 2031 80571F6 30
-. 8B 75 D4 46 89 F0 C7 45 E8 01 00 00 00 D1 E8 39 45 E8 89 B5 F8 FE FF FF 0F 83 4A 05 00 00
-
-. 2032 805775E 13
-. F7 45 D4 01 00 00 00 0F 85 C4 01 00 00
-
-. 2033 805776B 19
-. C7 45 E4 00 00 00 00 8B 75 D0 39 75 E4 0F 83 B1 01 00 00
-***** EXPENSIVE 2035 500
-
-. 2034 805777E 185
-. 8B 45 D4 48 DD 83 C4 F8 FF FF DD 83 CC F8 FF FF D9 C9 DD 9D F0 FE FF FF DD 9D E8 FE FF FF 89 85 E4 FE FF FF 89 85 D4 FE FF FF 8B B5 D4 FE FF FF 8B 45 0C 8B 7D 08 0F AF C6 D9 04 87 8D 04 B5 04 00 00 00 8B 4D D4 0F AF 45 0C 8D 14 4E D9 04 38 8B 45 0C 0F AF C2 D9 04 87 D9 CA D8 C0 D9 CA D8 C0 D9 CA 8D 0C 8E D9 95 18 FF FF FF D8 C2 D9 9D 0C FF FF FF 0F AF 4D 0C DD 85 E8 FE FF FF 8D 14 95 04 00 00 00 0F AF 55 0C D9 04 8F D9 C9 D8 8D 0C FF FF FF D8 E1 D9 04 3A D9 C9 D9 9D 08 FF FF FF D9 CA D8 C0 D9 CA D8 C0 DD 85 F0 FE FF FF D9 FA D9 CC D8 AD 18 FF FF FF
-***** EXPENSIVE 2036 501
-
-. 2035 8057837 179
-. D9 CC DC 8D E8 FE FF FF D8 CC D9 9D 04 FF FF FF D9 CB D9 9D 18 FF FF FF D9 45 E0 D9 45 DC D9 C9 D8 CC D9 C9 D8 CB 8B 95 E4 FE FF FF 03 55 D8 8B 45 D8 DE C1 D9 45 E0 8D 0C 10 DE CB D9 85 04 FF FF FF D9 CC D8 4D DC D9 CC D8 A5 08 FF FF FF 8D 34 08 D9 9D 00 FF FF FF D9 CA 01 F0 DE E3 D9 85 0C FF FF FF D9 85 04 FF FF FF 8B 7D 14 0F AF BD E4 FE FF FF D8 85 08 FF FF FF D9 C9 89 85 BC FE FF FF DE C2 D9 C9 8B 45 10 D9 1C B8 D9 85 00 FF FF FF D9 C1 80 B5 03 FF FF FF 80 8B BD BC FE FF FF D9 E0 D9 C9 0F AF 55 14 0F AF 4D 14 0F AF 75 14 D8 E4
-***** EXPENSIVE 2037 502
-
-. 2036 80578EA 69
-. D9 CC 0F AF 7D 14 D8 AD 00 FF FF FF D9 CA D8 E3 D9 C9 DE E3 D9 1C 90 D9 CA D9 1C 88 D9 C9 D9 1C B0 D9 1C B8 8B 55 D4 8D 04 92 FF 45 E4 8B 4D D0 01 95 E4 FE FF FF 01 85 D4 FE FF FF 39 4D E4 0F 82 79 FE FF FF
-
-. 2037 804D457 41
-. 83 EC 0C 8B 45 EC 8B 55 14 FF B4 82 08 01 00 00 56 FF 75 E8 51 FF 75 1C FF 75 C8 FF 75 CC FF 75 D0 FF 75 D4 E8 C4 21 00 00
-
-. 2038 804F644 77
-. 55 89 E5 57 56 53 81 EC AC 00 00 00 31 D2 8B 45 24 F7 75 1C 89 45 E0 31 D2 8B 45 24 F7 75 20 89 45 DC 31 D2 8B 45 20 F7 75 1C 8B 55 1C 4A 31 FF E8 00 00 00 00 5B 81 C3 9B 1A 01 00 89 55 D0 0F AF D0 3B 7D E0 89 45 D8 89 55 D4 73 42
-***** EXPENSIVE 2040 503
-
-. 2039 804F691 66
-. 8B 45 0C 8B 55 14 C1 E0 04 C1 E2 04 31 F6 31 C9 89 85 64 FF FF FF 89 95 60 FF FF FF 8B 45 08 DD 04 30 8B 55 10 DD 1C 0A DD 44 30 08 47 DD 5C 0A 08 03 B5 64 FF FF FF 03 8D 60 FF FF FF 3B 7D E0 72 DA
-
-. 2040 804F6D3 22
-. 8B 45 D0 D1 E8 C7 45 CC 01 00 00 00 40 39 45 CC 0F 83 B2 00 00 00
-
-. 2041 804F6E9 23
-. 8B 4D E0 89 45 C4 89 8D 68 FF FF FF 31 FF 3B 7D E0 0F 83 83 00 00 00
-***** EXPENSIVE 2043 504
-
-. 2042 804F700 131
-. 8B 75 1C 2B 75 CC 0F AF 75 E0 89 75 C0 8D 76 00 8B 85 68 FF FF FF 8B 4D C0 01 F9 8D 14 38 8B 45 0C 0F AF C1 8B 75 14 0F AF F2 C1 E0 04 89 8D 54 FF FF FF 0F AF 55 0C 8B 4D 08 DD 04 01 C1 E2 04 DC 04 11 C1 E6 04 8B 4D 10 DD 1C 31 03 45 08 03 55 08 DD 40 08 DC 42 08 DD 5C 31 08 8B 8D 54 FF FF FF DD 00 0F AF 4D 14 C1 E1 04 DC 2A 8B 75 10 DD 1C 0E DD 40 08 47 DC 6A 08 3B 7D E0 DD 5C 0E 08 72 8D
-
-. 2043 804F783 24
-. 8B 7D E0 FF 45 CC 8B 45 C4 01 BD 68 FF FF FF 39 45 CC 0F 82 5A FF FF FF
-
-. 2044 804F6F5 11
-. 31 FF 3B 7D E0 0F 83 83 00 00 00
-
-. 2045 804F79B 7
-. 31 FF 3B 7D E0 73 42
-***** EXPENSIVE 2047 505
-
-. 2046 804F7A2 66
-. 8B 55 14 8B 45 0C C1 E2 04 C1 E0 04 31 F6 31 C9 89 95 70 FF FF FF 89 85 6C FF FF FF 8B 55 10 DD 04 32 8B 45 08 DD 1C 08 DD 44 32 08 47 DD 5C 08 08 03 B5 70 FF FF FF 03 8D 6C FF FF FF 3B 7D E0 72 DA
-
-. 2047 804F7E4 18
-. 8B 45 D0 D1 E8 C7 45 C8 01 00 00 00 40 39 45 C8 73 75
-
-. 2048 804F7F6 19
-. 8B 55 E0 89 45 BC 89 95 74 FF FF FF 31 FF 3B 7D E0 73 4E
-***** EXPENSIVE 2050 506
-
-. 2049 804F809 78
-. 8B 4D 0C C1 E1 04 8B B5 74 FF FF FF 31 D2 89 8D 54 FF FF FF 8D 76 00 8D 04 3E 0F AF 45 14 C1 E0 04 8B 4D 10 DD 04 01 8B 4D 08 DC 04 11 DD 1C 11 8B 4D 10 DD 44 01 08 8B 45 08 DC 44 10 08 47 DD 5C 10 08 03 95 54 FF FF FF 3B 7D E0 72 C9
-
-. 2050 804F857 20
-. 8B 55 E0 FF 45 C8 8B 4D BC 01 95 74 FF FF FF 39 4D C8 72 97
-
-. 2051 804F802 7
-. 31 FF 3B 7D E0 73 4E
-
-. 2052 804F86B 22
-. 8B 45 D0 D1 E8 C7 45 CC 01 00 00 00 40 39 45 CC 0F 83 BC 01 00 00
-
-. 2053 804F881 42
-. 8B 75 E0 89 B5 78 FF FF FF 8B 55 1C 2B 55 CC 8B 45 CC 31 FF 0F AF 45 DC 0F AF 55 E0 3B 7D E0 89 45 B8 89 45 B4 89 55 B0 73 62
-***** EXPENSIVE 2055 507
-
-. 2054 804F8AB 98
-. 8B 4D 14 C1 E1 04 31 F6 89 8D 7C FF FF FF 8D 76 00 8B 85 78 FF FF FF 8D 0C 38 8B 55 10 0F AF 4D 0C DD 04 32 C1 E1 04 8B 45 08 DD 1C 08 DD 44 32 08 8B 55 B0 DD 5C 08 08 8D 0C 3A 0F AF 4D 0C 8B 45 10 DD 04 30 C1 E1 04 8B 55 08 DD 1C 0A 47 DD 44 30 08 03 B5 7C FF FF FF 3B 7D E0 DD 5C 0A 08 72 AF
-
-. 2055 804F90D 22
-. 8B 45 D0 D1 E8 C7 45 C8 01 00 00 00 40 39 45 C8 0F 83 FF 00 00 00
-***** EXPENSIVE 2057 508
-
-. 2056 804F923 32
-. DD 83 34 F6 FF FF 89 45 AC DD 5D 80 DD 83 44 F6 FF FF 8B 75 E0 8B 7D B8 85 FF 0F 85 E1 03 00 00
-
-. 2057 804FD24 6
-. 83 7D 18 FF 74 18
-***** EXPENSIVE 2059 509
-
-. 2058 804FD42 20
-. 8B 45 B8 C1 E0 04 03 45 28 DD 40 F0 DD 40 F8 E9 F2 FB FF FF
-
-. 2059 804F948 11
-. 31 FF 3B 7D E0 0F 83 C8 03 00 00
-***** EXPENSIVE 2061 510
-
-. 2060 804F953 145
-. 8B 45 1C 2B 45 C8 0F AF 45 E0 89 85 54 FF FF FF 90 8D 14 3E 8B 8D 54 FF FF FF 8D 04 39 0F AF 55 14 8B 4D 10 C1 E2 04 0F AF 45 14 D9 C1 DC 0C 11 C1 E0 04 D9 C1 DC 4C 01 08 D9 C1 D9 C4 DC 4C 11 08 D9 C9 D8 E2 D9 CB DE C2 8B 95 78 FF FF FF D9 C3 DC 0C 01 D9 CB 8D 04 3A 0F AF 45 0C 8B 4D 08 C1 E0 04 DC 04 01 D9 C1 D9 C9 DD 1C 01 D8 C3 01 C8 DC 40 08 8B 55 B0 DD 58 08 D9 C9 8D 04 3A 0F AF 45 0C C1 E0 04 DC 04 01 DD 1C 01 DE E1 01 C8 47
-***** EXPENSIVE 2062 511
-
-. 2061 804F9E4 15
-. DC 40 08 3B 7D E0 DD 58 08 0F 82 71 FF FF FF
-***** EXPENSIVE 2063 512
-
-. 2062 804F9F3 45
-. DD D8 DD D8 8B 4D B4 01 4D B8 8B 4D 1C 0F AF 4D DC 8B 45 B8 31 D2 F7 F1 FF 45 C8 8B 4D AC 03 75 E0 39 4D C8 89 55 B8 0F 82 18 FF FF FF
-
-. 2063 804F938 11
-. 8B 7D B8 85 FF 0F 85 E1 03 00 00
-***** EXPENSIVE 2065 513
-
-. 2064 804FA20 29
-. DD D8 8B 45 D0 D1 E8 8B 75 E0 FF 45 CC 40 01 B5 78 FF FF FF 39 45 CC 0F 82 4D FE FF FF
-
-. 2065 804F88A 33
-. 8B 55 1C 2B 55 CC 8B 45 CC 31 FF 0F AF 45 DC 0F AF 55 E0 3B 7D E0 89 45 B8 89 45 B4 89 55 B0 73 62
-
-. 2066 804FA3D 14
-. 8B 4D D8 85 C9 C7 45 E4 00 00 00 00 74 57
-
-. 2067 804FA4B 87
-. 8B 7D 0C 8B 45 14 C1 E7 04 C1 E0 04 31 F6 31 C9 89 7D 88 89 85 4C FF FF FF 8B 7D 08 8B 04 37 8B 54 37 04 8B 7D 10 89 04 0F 89 54 0F 04 8B 7D 08 8B 44 37 08 8B 54 37 0C 8B 7D 10 89 44 0F 08 FF 45 E4 8B 45 D8 89 54 0F 0C 03 75 88 03 8D 4C FF FF FF 39 45 E4 72 C2
-
-. 2068 804FAA2 19
-. C7 45 C8 01 00 00 00 8B 55 1C 39 55 C8 0F 83 98 00 00 00
-
-. 2069 804FAB5 27
-. 8B 4D E0 8B 75 D8 89 4D 90 89 75 8C C7 45 E4 00 00 00 00 8B 7D D8 39 7D E4 73 62
-
-. 2070 804FAD0 98
-. 8B 45 8C 8B 55 90 89 45 A8 89 95 4C FF FF FF 90 8B 4D E4 8B 75 E4 03 8D 4C FF FF FF 03 75 A8 0F AF 4D 0C C1 E1 04 8B 7D 08 0F AF 75 14 8B 04 0F 8B 54 0F 04 C1 E6 04 8B 7D 10 89 04 37 89 54 37 04 8B 7D 08 8B 44 0F 08 8B 54 0F 0C 8B 4D 10 89 44 31 08 89 54 31 0C FF 45 E4 8B 75 D8 39 75 E4 72 AE
-
-. 2071 804FB32 27
-. 8B 7D E0 8B 45 D8 FF 45 C8 8B 55 1C 01 7D 90 01 45 8C 39 55 C8 0F 82 74 FF FF FF
-
-. 2072 804FAC1 15
-. C7 45 E4 00 00 00 00 8B 7D D8 39 7D E4 73 62
-
-. 2073 804FB4D 28
-. C7 45 E8 01 00 00 00 8B 75 DC 8B 4D 20 39 75 E8 8B 7D D8 89 4D EC 0F 83 98 01 00 00
-
-. 2074 804FD01 13
-. 81 C4 AC 00 00 00 5B 5E 31 C0 5F C9 C3
-***** EXPENSIVE 2076 514
-
-. 2075 804FD2A 24
-. 8B 45 B8 C1 E0 04 03 45 28 DD 40 F8 DD 40 F0 D9 C9 D9 E0 E9 06 FC FF FF
-
-. 2076 80508FB 41
-. 83 EC 0C 8B 45 EC 8B 55 14 FF B4 82 08 01 00 00 56 FF 75 E8 51 FF 75 1C FF 75 C8 FF 75 CC FF 75 D0 FF 75 D4 E8 0C 21 00 00
-
-. 2077 8052A30 74
-. 55 89 E5 57 56 53 83 EC 7C 31 D2 8B 45 24 F7 75 1C 89 45 E4 31 D2 8B 45 24 F7 75 20 89 45 E0 31 D2 8B 45 20 F7 75 1C 8B 55 1C 4A 31 FF E8 00 00 00 00 5B 81 C3 B2 E6 00 00 89 55 D4 0F AF D0 3B 7D E4 89 45 DC 89 55 D8 73 2A
-
-. 2078 8052A7A 42
-. 31 C9 31 D2 8B 75 08 8B 04 CE 8B 75 10 89 04 D6 8B 75 08 8B 44 CE 04 47 8B 75 10 89 44 D6 04 03 4D 0C 03 55 14 3B 7D E4 72 DA
-
-. 2079 8052AA4 22
-. 8B 45 D4 D1 E8 C7 45 D0 01 00 00 00 40 39 45 D0 0F 83 AD 00 00 00
-
-. 2080 8052ABA 20
-. 89 45 C8 8B 45 E4 89 45 84 31 FF 3B 7D E4 0F 83 84 00 00 00
-***** EXPENSIVE 2082 515
-
-. 2081 8052ACE 132
-. 8B 4D 1C 2B 4D D0 8B 55 84 0F AF 4D E4 89 55 C4 89 4D C0 8D 76 00 8B 55 C0 01 FA 89 55 80 8B 75 C4 8B 55 0C 0F AF 55 80 8D 04 3E 8B 4D 08 8B 75 14 D9 04 D1 0F AF F0 0F AF 45 0C D8 04 C1 8B 4D 10 D9 1C F1 8B 4D 08 D9 44 D1 04 D8 44 C1 04 8B 4D 10 D9 5C F1 04 8B 75 08 D9 04 D6 8B 4D 80 D8 2C C6 0F AF 4D 14 8B 75 10 D9 1C CE 8B 75 08 D9 44 D6 04 47 D8 6C C6 04 3B 7D E4 8B 45 10 D9 5C C8 04 72 92
-
-. 2082 8052B52 21
-. 8B 55 E4 FF 45 D0 8B 4D C8 01 55 84 39 4D D0 0F 82 5C FF FF FF
-
-. 2083 8052AC3 11
-. 31 FF 3B 7D E4 0F 83 84 00 00 00
-
-. 2084 8052B67 7
-. 31 FF 3B 7D E4 73 2A
-
-. 2085 8052B6E 42
-. 31 C9 31 D2 8B 75 10 8B 04 CE 8B 75 08 89 04 D6 8B 75 10 8B 44 CE 04 47 8B 75 08 89 44 D6 04 03 4D 14 03 55 0C 3B 7D E4 72 DA
-
-. 2086 8052B98 18
-. 8B 45 D4 D1 E8 C7 45 CC 01 00 00 00 40 39 45 CC 73 63
-
-. 2087 8052BAA 19
-. 89 45 BC 8B 45 E4 89 85 78 FF FF FF 31 FF 3B 7D E4 73 3C
-***** EXPENSIVE 2089 516
-
-. 2088 8052BBD 60
-. 8B 8D 78 FF FF FF 31 D2 8D 76 00 8D 04 39 0F AF 45 14 8B 75 10 D9 04 C6 8B 75 08 D8 04 D6 D9 1C D6 8B 75 10 D9 44 C6 04 8B 45 08 D8 44 D0 04 47 D9 5C D0 04 03 55 0C 3B 7D E4 72 CF
-
-. 2089 8052BF9 20
-. 8B 55 E4 FF 45 CC 8B 4D BC 01 95 78 FF FF FF 39 4D CC 72 A9
-
-. 2090 8052BB6 7
-. 31 FF 3B 7D E4 73 3C
-
-. 2091 8052C0D 22
-. 8B 45 D4 D1 E8 C7 45 D0 01 00 00 00 40 39 45 D0 0F 83 A0 01 00 00
-
-. 2092 8052C23 45
-. 8B 75 E4 89 45 A4 89 75 88 89 45 B8 8B 55 1C 2B 55 D0 8B 45 D0 31 FF 0F AF 45 E0 0F AF 55 E4 3B 7D E4 89 45 B4 89 45 B0 89 55 AC 73 55
-
-. 2093 8052C50 85
-. 31 C9 89 F6 8B 75 88 8D 04 3E 8B 75 10 8B 14 CE 0F AF 45 0C 8B 75 08 89 14 C6 8B 75 10 8B 54 CE 04 8B 75 08 89 54 C6 04 8B 55 AC 8D 04 3A 8B 75 10 8B 14 CE 0F AF 45 0C 8B 75 08 89 14 C6 47 8B 75 10 8B 54 CE 04 8B 75 08 03 4D 14 3B 7D E4 89 54 C6 04 72 AF
-
-. 2094 8052CA5 19
-. C7 45 CC 01 00 00 00 8B 45 A4 39 45 CC 0F 83 F6 00 00 00
-***** EXPENSIVE 2096 517
-
-. 2095 8052CB8 43
-. 8B 45 D4 D1 E8 40 D9 83 50 F6 FF FF 89 45 A8 D9 83 4C F6 FF FF D9 C9 D9 5D 8C 8B 75 E4 8D 76 00 8B 7D B4 85 FF 0F 85 32 03 00 00
-
-. 2096 8053015 6
-. 83 7D 18 FF 74 18
-***** EXPENSIVE 2098 518
-
-. 2097 8053033 20
-. 8B 55 B4 8B 4D 28 8D 04 D1 D9 40 F8 D9 40 FC E9 A1 FC FF FF
-
-. 2098 8052CE8 11
-. 31 FF 3B 7D E4 0F 83 19 03 00 00
-***** EXPENSIVE 2100 519
-
-. 2099 8052CF3 140
-. 8B 45 1C 2B 45 CC 0F AF 45 E4 89 45 80 8D 14 3E 8B 4D 80 0F AF 55 14 8D 04 39 D9 C1 8B 4D 10 D8 0C D1 0F AF 45 14 D9 C1 D8 4C C1 04 D9 C1 D9 C4 D8 4C D1 04 D9 C9 D8 E2 D9 CB DE C2 8B 55 88 D9 C3 D8 0C C1 D9 C1 8D 04 3A 8B 4D 08 0F AF 45 0C D8 C1 D9 CC D8 04 C1 D9 CC D8 44 C1 04 D9 CC 8B 55 AC D9 1C C1 D9 CB D9 5C C1 04 8D 04 3A 0F AF 45 0C DE E2 47 D8 04 C1 D9 C9 D8 44 C1 04 D9 C9 3B 7D E4 D9 1C C1 D9 5C C1 04 72 81
-***** EXPENSIVE 2101 520
-
-. 2100 8052D7F 45
-. DD D8 DD D8 8B 4D B0 01 4D B4 8B 4D 1C 0F AF 4D E0 8B 45 B4 31 D2 F7 F1 FF 45 CC 8B 4D A8 03 75 E4 39 4D CC 89 55 B4 0F 82 2C FF FF FF
-
-. 2101 8052CD8 11
-. 8B 7D B4 85 FF 0F 85 32 03 00 00
-***** EXPENSIVE 2103 521
-
-. 2102 8052DAC 23
-. DD D8 8B 75 E4 FF 45 D0 8B 45 B8 01 75 88 39 45 D0 0F 82 6C FE FF FF
-
-. 2103 8052C2F 33
-. 8B 55 1C 2B 55 D0 8B 45 D0 31 FF 0F AF 45 E0 0F AF 55 E4 3B 7D E4 89 45 B4 89 45 B0 89 55 AC 73 55
-
-. 2104 8052DC3 14
-. 8B 4D DC 85 C9 C7 45 E8 00 00 00 00 74 2F
-
-. 2105 8052DD1 47
-. 31 C9 31 D2 8B 75 08 8B 04 CE 8B 75 10 89 04 D6 8B 75 08 8B 44 CE 04 8B 75 10 89 44 D6 04 FF 45 E8 8B 45 DC 03 4D 0C 03 55 14 39 45 E8 72 D5
-
-. 2106 8052E00 15
-. C7 45 CC 01 00 00 00 8B 55 1C 39 55 CC 73 78
-
-. 2107 8052E0F 27
-. 8B 4D E4 8B 75 DC 89 4D 94 89 75 90 C7 45 E8 00 00 00 00 8B 45 DC 39 45 E8 73 46
-
-. 2108 8052E2A 70
-. 8B 55 94 8B 7D 90 89 95 78 FF FF FF 89 F6 8B 45 E8 8B 4D E8 03 85 78 FF FF FF 0F AF 45 0C 01 F9 8B 75 08 8B 14 C6 0F AF 4D 14 8B 75 10 89 14 CE 8B 55 08 8B 44 C2 04 89 44 CE 04 FF 45 E8 8B 4D DC 39 4D E8 72 C8
-
-. 2109 8052E70 23
-. 8B 75 E4 8B 45 DC FF 45 CC 8B 55 1C 01 75 94 01 45 90 39 55 CC 72 94
-
-. 2110 8052E1B 15
-. C7 45 E8 00 00 00 00 8B 45 DC 39 45 E8 73 46
-
-. 2111 8052E87 28
-. C7 45 EC 01 00 00 00 8B 75 E0 8B 4D 20 39 75 EC 8B 7D DC 89 4D F0 0F 83 57 01 00 00
-
-. 2112 8052FFA 10
-. 83 C4 7C 5B 5E 31 C0 5F C9 C3
-***** EXPENSIVE 2114 522
-
-. 2113 805301B 24
-. 8B 55 B4 8B 4D 28 8D 04 D1 D9 40 FC D9 40 F8 D9 C9 D9 E0 E9 B5 FC FF FF
-
-. 2114 804E500 11
-. 8B 4D E4 85 C9 0F 85 AB 04 00 00
-
-. 2115 804E9B6 10
-. 83 7D 18 FF 0F 84 80 00 00 00
-***** EXPENSIVE 2117 523
-
-. 2116 804EA40 103
-. 8B 85 AC FE FF FF 8B 55 24 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 28 DD 5D C0 DD 5D B8 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 2C DD 5D B0 DD 5D A8 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 30 DD 5D A0 DD 5D 98 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 34 DD 5D 90 DD 44 02 F0 D9 C9 DD 5D 88 DD 5D 80 DD 44 02 F8 E9 9D FA FF FF
-***** EXPENSIVE 2118 524
-
-. 2117 804E544 25
-. DD 9D 78 FF FF FF C7 45 E0 00 00 00 00 8B 45 D4 39 45 E0 0F 83 30 04 00 00
-***** EXPENSIVE 2119 525
-
-. 2118 804E9C0 128
-. 8B 85 AC FE FF FF 8B 55 24 DD 44 02 F0 DD 44 02 F8 8B 55 28 DD 5D B8 DD 5D C0 DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 2C DD 5D A8 DD 5D B0 DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 30 DD 5D 98 DD 5D A0 DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 34 DD 5D 88 DD 5D 90 DD 44 02 F8 DD 44 02 F0 80 75 BF 80 80 75 AF 80 80 75 9F 80 80 75 8F 80 DD 5D 80 DD 9D 78 FF FF FF 80 B5 7F FF FF FF 80 E9 0A FB FF FF
-
-. 2119 804E54A 19
-. C7 45 E0 00 00 00 00 8B 45 D4 39 45 E0 0F 83 30 04 00 00
-
-. 2120 80518CC 11
-. 8B 4D E0 85 C9 0F 85 C6 04 00 00
-
-. 2121 8051D9D 6
-. 83 7D 18 FF 74 7A
-***** EXPENSIVE 2123 526
-
-. 2122 8051E1D 103
-. 8B 85 F4 FE FF FF 8B 55 24 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 28 D9 5D C4 D9 5D C0 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 2C D9 5D BC D9 5D B8 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 30 D9 5D B4 D9 5D B0 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 34 D9 5D AC D9 44 02 F8 D9 C9 D9 5D A8 D9 5D A4 D9 44 02 FC E9 8C FA FF FF
-***** EXPENSIVE 2124 527
-
-. 2123 8051910 22
-. D9 5D A0 C7 45 DC 00 00 00 00 8B 45 D0 39 45 DC 0F 83 4E 04 00 00
-***** EXPENSIVE 2125 528
-
-. 2124 8051DA3 122
-. 8B 85 F4 FE FF FF 8B 55 24 D9 44 02 F8 D9 44 02 FC 8B 55 28 D9 5D C0 D9 5D C4 D9 44 02 FC D9 44 02 F8 D9 C9 8B 55 2C D9 5D B8 D9 5D BC D9 44 02 FC D9 44 02 F8 D9 C9 8B 55 30 D9 5D B0 D9 5D B4 D9 44 02 FC D9 44 02 F8 D9 C9 8B 55 34 D9 5D A8 D9 5D AC D9 44 02 FC D9 44 02 F8 80 75 C3 80 80 75 BB 80 80 75 B3 80 80 75 AB 80 D9 5D A4 D9 5D A0 80 75 A3 80 E9 F6 FA FF FF
-
-. 2125 8051913 19
-. C7 45 DC 00 00 00 00 8B 45 D0 39 45 DC 0F 83 4E 04 00 00
-
-. 2126 8059202 19
-. C7 45 E8 00 00 00 00 8B 55 E0 39 55 E8 0F 83 8C 00 00 00
-***** EXPENSIVE 2128 529
-
-. 2127 8059215 138
-. 8B 75 DC DD 45 D0 4E D9 E0 89 F7 8B 4D E4 8D 04 39 01 C1 8B 55 0C 0F AF D7 0F AF 45 0C 89 8D 7C FF FF FF 8B 4D 08 DD 04 D1 DD 04 C1 8B 8D 7C FF FF FF 0F AF 4D 0C 8B 45 08 DD 04 C8 D9 C1 D8 E1 DD 83 BC F8 FF FF 8B 4D DC D8 C9 8B 45 14 0F AF C6 8D 14 4E D8 C4 8B 4D 10 DD 1C C1 D9 CA DE C1 8D 04 F5 08 00 00 00 0F AF 45 14 D8 CB DD 1C 08 FF 45 E8 8B 45 E0 0F AF 55 14 DE E9 03 75 18 03 7D DC 39 45 E8 DD 1C D1 72 81
-***** EXPENSIVE 2129 530
-
-. 2128 805929F 10
-. DD D8 83 C4 7C 5B 5E 5F C9 C3
-***** EXPENSIVE 2130 531
-
-. 2129 80543A4 102
-. C7 85 54 FF FF FF 10 00 00 00 C7 85 50 FF FF FF FE FF FF FF 8B 95 54 FF FF FF 8B 4D 20 8B 45 24 DD 44 11 F0 DD 44 11 F8 D9 C9 DD 5D D0 DD 5D C8 DD 44 10 F0 DD 44 10 F8 D9 C9 8B 45 28 DD 5D C0 DD 5D B8 DD 44 10 F0 DD 44 10 F8 D9 C9 C7 45 E8 00 00 00 00 8B 45 DC 39 45 E8 DD 5D B0 DD 5D A8 0F 83 57 02 00 00
-***** EXPENSIVE 2131 532
-
-. 2130 805440A 192
-. 8B 55 E0 D1 E2 8B 4D EC 8B B5 50 FF FF FF 8B 45 E0 8D 4C 09 FF 8D 74 32 FF C1 E0 02 89 55 A4 89 8D 60 FF FF FF 89 B5 5C FF FF FF 89 CF 89 85 58 FF FF FF 8D 76 00 8B 45 0C 8B 75 08 0F AF C7 DD 04 C6 8D 04 FD 08 00 00 00 0F AF 45 0C 8B 4D A4 DD 04 30 8D 14 39 8B 45 0C 0F AF C2 8B 8D 5C FF FF FF DD 04 C6 03 4D A4 8B 45 0C 0F AF C1 8D 14 D5 08 00 00 00 DD 04 C6 0F AF 55 0C 8B 45 0C DD 04 32 0F AF 85 5C FF FF FF 8B 95 5C FF FF FF DD 04 C6 D9 CB DD 5D 98 D9 C9 DD 55 90 8D 04 D5 08 00 00 00 D8 C4 0F AF 45 0C DD 9D 40 FF FF FF 8D 0C CD 08 00 00 00 DD 45 98 0F AF 4D 0C DD 04 30
-***** EXPENSIVE 2132 533
-
-. 2131 80544CA 152
-. D9 C9 D8 C3 DD 04 31 D9 CA D9 E0 D9 C9 DD 5D 88 D9 CB DC 6D 98 D9 C2 D8 C4 D9 CA D9 E0 D9 C9 DD 9D 78 FF FF FF D9 C4 D8 C1 D9 CD DE E1 D9 C9 DD 55 80 DD 85 78 FF FF FF D9 CB DE E4 D9 CA D8 C1 DD 45 88 D9 CE DC 65 90 D9 CE DC 85 40 FF FF FF D9 C9 DD 9D 70 FF FF FF 8B 95 60 FF FF FF 03 55 E4 8B 45 E4 8D 0C 10 01 C8 8B 75 14 0F AF B5 60 FF FF FF 89 85 34 FF FF FF 8B 45 10 DD 1C F0 D9 C9 8B B5 60 FF FF FF 8D 34 F5 08 00 00 00 0F AF 75 14 D8 C3 D9 C4 D9 C9
-***** EXPENSIVE 2133 534
-
-. 2132 8054562 149
-. DD 1C 06 D8 E2 DD 45 D0 DD 45 C8 DC 8D 70 FF FF FF D9 C9 8B 45 14 D8 CA 8B 75 10 0F AF C2 DE E1 DD 1C C6 DD 45 D0 DC 8D 70 FF FF FF DD 85 40 FF FF FF D9 CA DC 4D C8 D9 CA DC 65 88 D9 CD DC 65 80 D9 CA DE C1 8B 45 14 DD 45 C0 DD 45 B8 0F AF C1 D8 CB D9 C9 D8 CE D9 CB DC 4D C0 D9 CE DC 4D B8 D9 CB 8D 14 D5 08 00 00 00 8D 0C CD 08 00 00 00 0F AF 55 14 DE E1 D9 CA 0F AF 4D 14 DE C5 DD 1C 32 D9 C9 DC A5 78 FF FF FF D9 C9 DD 1C C6 D9 CB DE C1 D9 C9
-***** EXPENSIVE 2134 535
-
-. 2133 80545F7 106
-. DD 1C 31 DD 45 B0 DD 45 A8 D9 C9 D8 CA D9 C9 D8 CB 8B 45 14 0F AF 85 34 FF FF FF DE E9 DD 1C C6 D9 C9 8B 85 34 FF FF FF 8D 34 C5 08 00 00 00 DC 4D B0 D9 C9 DC 4D A8 0F AF 75 14 DE C1 8B 55 10 8B 4D E0 DD 1C 16 FF 45 E8 8B B5 58 FF FF FF 8B 45 DC 01 8D 60 FF FF FF 01 B5 5C FF FF FF 39 45 E8 8D 3C 8F 0F 82 DF FD FF FF
-
-. 2134 8054661 34
-. 8B 85 6C FF FF FF FF 45 EC D1 E8 83 85 54 FF FF FF 10 83 AD 50 FF FF FF 02 39 45 EC 0F 82 35 FD FF FF
-
-. 2135 805B82F 19
-. C7 45 E8 00 00 00 00 8B 55 E0 39 55 E8 0F 83 89 00 00 00
-***** EXPENSIVE 2137 536
-
-. 2136 805B842 135
-. 8B 75 DC D9 45 D8 4E D9 E0 89 F7 8D 76 00 8B 4D E4 8D 04 39 01 C1 8B 55 0C 0F AF D7 0F AF 45 0C 89 4D A0 8B 4D 08 D9 04 91 D9 04 81 8B 4D A0 0F AF 4D 0C 8B 45 08 D9 04 88 D9 C1 D8 E1 DD 83 BC F8 FF FF 8B 4D DC D8 C9 8B 45 14 0F AF C6 8D 14 4E D8 C4 8B 4D 10 D9 1C 81 D9 CA DE C1 8D 04 B5 04 00 00 00 0F AF 45 14 D8 CB D9 1C 08 FF 45 E8 8B 45 E0 0F AF 55 14 DE E9 03 75 18 03 7D DC 39 45 E8 D9 1C 91 72 87
-***** EXPENSIVE 2138 537
-
-. 2137 805B8C9 10
-. DD D8 83 C4 54 5B 5E 5F C9 C3
-***** EXPENSIVE 2139 538
-
-. 2138 8056B92 104
-. C7 85 44 FF FF FF 02 00 00 00 C7 85 40 FF FF FF FE FF FF FF 89 F6 8B 95 44 FF FF FF 8B 4D 20 8B 45 24 D9 44 91 F8 D9 44 91 FC D9 C9 D9 5D D0 D9 5D CC D9 44 90 F8 D9 44 90 FC D9 C9 8B 45 28 D9 5D C8 D9 5D C4 D9 44 90 F8 D9 44 90 FC D9 C9 C7 45 E8 00 00 00 00 8B 45 DC 39 45 E8 D9 5D C0 D9 5D BC 0F 83 74 02 00 00
-***** EXPENSIVE 2140 539
-
-. 2139 8056BFA 185
-. 8B 55 E0 D1 E2 8B 4D EC 8B B5 40 FF FF FF 8B 45 E0 8D 4C 09 FF 8D 74 32 FF C1 E0 02 89 55 B8 89 8D 50 FF FF FF 89 B5 4C FF FF FF 89 CF 89 85 48 FF FF FF 8D 76 00 8B 45 0C 8B 75 08 0F AF C7 D9 04 86 8D 04 BD 04 00 00 00 0F AF 45 0C 8B 4D B8 D9 04 30 8D 14 39 8B 45 0C 0F AF C2 8B 8D 4C FF FF FF D9 04 86 D9 CA 03 4D B8 8B 45 0C 0F AF C1 8D 0C 8D 04 00 00 00 0F AF 4D 0C D9 5D B4 D9 5D B0 D9 5D AC D9 04 86 D9 04 31 8D 14 95 04 00 00 00 0F AF 55 0C D9 5D A0 D9 5D A4 8B 45 0C D9 45 B4 D9 04 32 D9 C9 0F AF 85 4C FF FF FF 8B 95 4C FF FF FF D8 45 A4 D9 04 86
-***** EXPENSIVE 2141 540
-
-. 2140 8056CB3 158
-. D9 C9 80 75 A3 80 8D 04 95 04 00 00 00 D9 5D 9C D9 45 B0 0F AF 45 0C D8 45 A0 D9 CA D9 5D A8 D9 04 30 D9 CA D9 5D 98 D9 C9 8B 95 50 FF FF FF 03 55 E4 8B 45 E4 D9 E0 D9 45 A8 8D 0C 10 D8 C1 D9 45 AC D9 CA D8 6D A8 D9 5D 94 D9 C9 01 C8 D8 C2 D9 45 AC D9 45 9C D9 C9 8B 75 14 0F AF B5 50 FF FF FF DE E4 D8 C1 D9 45 98 D9 C9 89 85 34 FF FF FF 8B 45 10 D9 1C B0 D8 C2 8B B5 50 FF FF FF D9 5D 90 D9 45 B4 D9 45 B0 8D 34 B5 04 00 00 00 D8 65 A0 D9 C9 0F AF 75 14 D8 65 A4 D9 45 90
-***** EXPENSIVE 2142 541
-
-. 2141 8056D51 131
-. D9 45 94 D8 EA D9 C9 D9 1C 06 D9 C2 D9 45 D0 D9 CA D9 55 8C D9 C9 D8 C7 D9 CA DE C9 D9 45 CC D8 CA D9 CE 8B 45 14 8B 75 10 D8 6D 98 D9 CB D8 45 94 D9 CD 0F AF C2 D8 6D 9C D9 C9 DE E6 D9 5D 88 D9 C9 D9 55 84 D9 CB D9 55 80 D9 CC D9 1C 86 D9 45 CC D8 4D 8C D9 C9 D8 4D D0 DE C1 D9 45 C4 D9 45 C8 8B 45 14 D8 4D 88 D9 C9 D8 CC 8D 14 95 04 00 00 00 0F AF 55 14 0F AF C1 DE E9 D9 C9 D9 14 32 D9 C9
-***** EXPENSIVE 2143 542
-
-. 2142 8056DD4 154
-. D9 1C 86 D9 45 C4 D9 45 C8 D9 C9 D8 4D 88 D9 C9 DE CC D9 CA DE E5 D9 C9 DE C2 D9 45 BC D9 45 C0 D9 C9 8B 45 14 D8 CD D9 C9 8D 0C 8D 04 00 00 00 D8 CC 0F AF 4D 14 0F AF 85 34 FF FF FF DE E1 D9 CA D9 1C 31 D9 C9 D9 1C 86 8B 85 34 FF FF FF D9 45 BC D9 CB 8D 34 85 04 00 00 00 D8 4D C0 D9 CB DE CA D9 CA 0F AF 75 14 8B 55 E0 8B 45 10 8B 8D 48 FF FF FF DE C1 D9 1C 06 01 95 50 FF FF FF 01 8D 4C FF FF FF D9 5D 8C FF 45 E8 8B 75 DC 39 75 E8 8D 3C 97 0F 82 C2 FD FF FF
-
-. 2143 8056E6E 34
-. 8B 85 5C FF FF FF FF 45 EC D1 E8 83 85 44 FF FF FF 02 83 AD 40 FF FF FF 02 39 45 EC 0F 82 18 FD FF FF
-
-. 2144 804EBF0 11
-. 8B 45 E4 85 C0 0F 85 F5 08 00 00
-
-. 2145 804F4F0 10
-. 83 7D 18 FF 0F 84 B5 00 00 00
-***** EXPENSIVE 2147 543
-
-. 2146 804F5AF 149
-. 8B 85 A4 FD FF FF 8B 55 24 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 28 DD 5D 98 DD 5D 90 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 2C DD 5D 88 DD 5D 80 DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 30 DD 9D 78 FF FF FF DD 9D 70 FF FF FF DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 34 DD 9D 68 FF FF FF DD 9D 60 FF FF FF DD 44 02 F0 DD 44 02 F8 D9 C9 8B 55 38 DD 9D 58 FF FF FF DD 9D 50 FF FF FF DD 44 02 F0 DD 44 02 F8 D9 C9 DD 9D 48 FF FF FF DD 9D 40 FF FF FF E9 0B F6 FF FF
-
-. 2147 804EC4F 19
-. C7 45 E0 00 00 00 00 8B 45 D4 39 45 E0 0F 83 68 08 00 00
-***** EXPENSIVE 2149 544
-
-. 2148 804F4FA 181
-. 8B 85 A4 FD FF FF 8B 55 24 DD 44 02 F0 DD 44 02 F8 8B 55 28 DD 5D 90 DD 5D 98 DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 2C DD 5D 80 DD 5D 88 DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 30 DD 9D 70 FF FF FF DD 9D 78 FF FF FF DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 34 DD 9D 60 FF FF FF DD 9D 68 FF FF FF DD 44 02 F8 DD 44 02 F0 DD 9D 58 FF FF FF 80 75 97 80 80 75 87 80 80 B5 77 FF FF FF 80 80 B5 67 FF FF FF 80 DD 9D 50 FF FF FF 8B 55 38 DD 44 02 F8 DD 44 02 F0 D9 C9 DD 9D 40 FF FF FF 80 B5 57 FF FF FF 80 DD 9D 48 FF FF FF 80 B5 47 FF FF FF 80 E9 A0 F6 FF FF
-
-. 2149 8051FC0 11
-. 8B 45 E0 85 C0 0F 85 4D 09 00 00
-
-. 2150 8052918 10
-. 83 7D 18 FF 0F 84 91 00 00 00
-***** EXPENSIVE 2152 545
-
-. 2151 80529B3 122
-. 8B 85 3C FE FF FF 8B 55 24 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 28 D9 5D B0 D9 5D AC D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 2C D9 5D A8 D9 5D A4 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 30 D9 5D A0 D9 5D 9C D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 34 D9 5D 98 D9 5D 94 D9 44 02 F8 D9 44 02 FC D9 C9 8B 55 38 D9 5D 90 D9 44 02 F8 D9 C9 D9 5D 8C D9 5D 88 D9 44 02 FC E9 E1 F5 FF FF
-***** EXPENSIVE 2153 546
-
-. 2152 805200E 22
-. D9 5D 84 C7 45 DC 00 00 00 00 8B 45 D0 39 45 DC 0F 83 CE 08 00 00
-***** EXPENSIVE 2154 547
-
-. 2153 8052922 145
-. 8B 85 3C FE FF FF 8B 55 24 D9 44 02 F8 D9 44 02 FC 8B 55 28 D9 5D AC D9 5D B0 D9 44 02 FC D9 44 02 F8 D9 C9 8B 55 2C D9 5D A4 D9 5D A8 D9 44 02 FC D9 44 02 F8 D9 C9 8B 55 30 D9 5D 9C D9 5D A0 D9 44 02 FC D9 44 02 F8 D9 C9 8B 55 34 D9 5D 94 D9 5D 98 D9 44 02 FC D9 44 02 F8 D9 5D 90 80 75 AF 80 80 75 A7 80 80 75 9F 80 80 75 97 80 D9 5D 8C 8B 55 38 D9 44 02 FC D9 44 02 F8 D9 C9 D9 5D 84 80 75 8F 80 D9 5D 88 80 75 87 80 E9 5E F6 FF FF
-
-. 2154 8052011 19
-. C7 45 DC 00 00 00 00 8B 45 D0 39 45 DC 0F 83 CE 08 00 00
-***** EXPENSIVE 2156 548
-vex iropt: not unrolling (81 sts)
-
-. 2155 8058CBC 80
-. 8B 45 EC 01 F0 8B 55 0C 0F AF D6 89 45 D0 8B 45 08 DD 04 D0 8B 45 D0 0F AF 45 0C 8B 55 08 DD 04 C2 D9 C1 8B 45 14 0F AF C7 8B 55 10 D8 C1 DD 1C C2 8B 45 14 0F AF C1 DE E9 DD 1C C2 FF 45 F0 8B 45 E8 03 4D 18 03 7D 18 03 75 E4 39 45 F0 72 B0
-
-. 2156 805A313 30
-. 8B 75 D4 46 89 F0 C7 45 E4 01 00 00 00 D1 E8 39 45 E4 89 B5 4C FF FF FF 0F 83 50 02 00 00
-
-. 2157 805A581 13
-. F7 45 D4 01 00 00 00 0F 85 8A 02 00 00
-***** EXPENSIVE 2159 549
-
-. 2158 805A58E 33
-. 31 D2 52 8B 45 18 50 DF 2C 24 DC BB 3C F6 FF FF 83 EC 08 DD 14 24 DD 9D E8 FE FF FF E8 71 E0 FE FF
-***** EXPENSIVE 2160 550
-
-. 2159 805A5AF 20
-. DD 85 E8 FE FF FF DD 1C 24 DD 9D 78 FF FF FF E8 6D E1 FE FF
-***** EXPENSIVE 2161 551
-
-. 2160 805A5C3 35
-. DD 9D 70 FF FF FF C7 45 E0 00 00 00 00 8B 55 D8 80 B5 77 FF FF FF 80 83 C4 10 39 55 E0 0F 83 32 02 00 00
-***** EXPENSIVE 2162 552
-
-. 2161 805A5E6 103
-. DD 83 34 F6 FF FF DD 83 44 F6 FF FF D9 C9 DD 9D 40 FF FF FF DD 9D 38 FF FF FF C7 85 34 FF FF FF 00 00 00 00 C7 85 30 FF FF FF 00 00 00 00 31 FF C7 85 2C FF FF FF 00 00 00 00 C7 45 D0 00 00 00 00 8B 45 18 DD 85 40 FF FF FF DD 85 38 FF FF FF D9 C9 39 45 D0 DD 9D 68 FF FF FF DD 9D 60 FF FF FF 0F 83 A2 01 00 00
-***** EXPENSIVE 2163 553
-
-. 2162 805A64D 55
-. 8B 55 E4 8B 8D 2C FF FF FF 8D 14 51 89 95 E0 FE FF FF 8B 45 D0 DD 85 38 FF FF FF DD 85 40 FF FF FF D9 C9 85 C0 DD 95 50 FF FF FF DD 95 58 FF FF FF D9 C0 D9 C2 74 42
-
-. 2163 805A6C6 11
-. 31 C9 3B 4D 18 0F 83 C0 01 00 00
-
-. 2164 805A6D1 11
-. 8B 95 E0 FE FF FF 4A 85 C9 74 5C
-***** EXPENSIVE 2166 554
-
-. 2165 805A738 89
-. 8B 45 0C 0F AF C2 8B 75 08 DD 04 C6 D9 C1 D9 C4 D9 C9 D8 CA D9 C9 DE CA D9 C3 D9 C6 D8 CA D9 C9 D8 CB D9 CA D8 CD D9 CB D8 CF D9 C9 DE E2 DE C2 41 DC 85 58 FF FF FF D9 C9 DC 85 50 FF FF FF D9 C9 03 55 DC 3B 4D 18 DD 9D 58 FF FF FF DD 9D 50 FF FF FF 0F 82 47 FF FF FF
-
-. 2166 805A6D8 4
-. 85 C9 74 5C
-***** EXPENSIVE 2168 555
-
-. 2167 805A6DC 136
-. DD 85 78 FF FF FF D8 C9 DD 85 70 FF FF FF DD 85 70 FF FF FF D9 C9 D8 CD D9 C9 DE CB D9 CC DC 8D 78 FF FF FF DD 85 68 FF FF FF D9 CA DE E5 DE C2 D8 CC DD 85 60 FF FF FF DD 85 60 FF FF FF D9 C9 D8 CC D9 C9 DE CE D9 CB DC 8D 68 FF FF FF D9 C9 DE E3 DE C4 D9 CA D9 C9 D9 CB D9 C9 8B 45 0C 0F AF C2 8B 75 08 DD 04 C6 D9 C1 D9 C4 D9 C9 D8 CA D9 C9 DE CA D9 C3 D9 C6 D8 CA D9 C9 D8 CB D9 CA D8 CD D9 CB D8 CF D9 C9
-***** EXPENSIVE 2169 556
-
-. 2168 805A764 45
-. DE E2 DE C2 41 DC 85 58 FF FF FF D9 C9 DC 85 50 FF FF FF D9 C9 03 55 DC 3B 4D 18 DD 9D 58 FF FF FF DD 9D 50 FF FF FF 0F 82 47 FF FF FF
-***** EXPENSIVE 2170 557
-
-. 2169 805A791 22
-. DD D8 DD D8 DD D8 DD D8 8B 4D D0 8B 45 18 41 2B 45 D0 39 C1 73 79
-***** EXPENSIVE 2171 558
-
-. 2170 805A7A7 72
-. 8B 45 D0 0F AF 45 D4 8B 55 E4 89 45 D0 8D 04 47 8D 44 50 FF 8B 55 14 0F AF D0 8D 04 C5 08 00 00 00 DD 85 58 FF FF FF 8B 75 10 0F AF 45 14 DD 1C D6 DD 85 50 FF FF FF DD 1C 30 8B 45 18 39 C1 89 4D D0 0F 82 70 FE FF FF
-***** EXPENSIVE 2172 559
-
-. 2171 805A65F 37
-. 8B 45 D0 DD 85 38 FF FF FF DD 85 40 FF FF FF D9 C9 85 C0 DD 95 50 FF FF FF DD 95 58 FF FF FF D9 C0 D9 C2 74 42
-***** EXPENSIVE 2173 560
-
-. 2172 805A684 77
-. DD 85 68 FF FF FF DD 85 68 FF FF FF DD 85 60 FF FF FF DD 85 60 FF FF FF D9 CB D9 E0 D9 CA DC 4D C8 D9 C9 DC 4D C0 D9 CA DC 4D C0 D9 CB DC 4D C8 D9 C9 DE C2 DE C2 DD 9D 68 FF FF FF DD 9D 60 FF FF FF 31 C9 3B 4D 18 0F 83 C0 01 00 00
-
-. 2173 805A820 4
-. 39 C1 74 3E
-***** EXPENSIVE 2175 561
-
-. 2174 805A862 47
-. 8B 45 D0 0F AF 45 D4 8B 95 30 FF FF FF 89 45 D0 8B 75 E4 8D 04 42 8D 44 70 FF 0F AF 45 14 DD 85 58 FF FF FF 8B 55 10 DD 1C C2 E9 50 FF FF FF
-
-. 2175 805A7E1 14
-. 8B 45 18 39 C1 89 4D D0 0F 82 70 FE FF FF
-***** EXPENSIVE 2177 562
-
-. 2176 805A824 62
-. 8B 95 34 FF FF FF 0F AF 45 D4 8D 04 42 8B 55 E4 D1 E2 29 D0 48 8B 55 14 0F AF D0 DD 85 58 FF FF FF 8B 75 10 8D 04 C5 08 00 00 00 DD 1C D6 0F AF 45 14 80 B5 57 FF FF FF 80 E9 76 FF FF FF
-***** EXPENSIVE 2178 563
-
-. 2177 805A7D8 23
-. DD 85 50 FF FF FF DD 1C 30 8B 45 18 39 C1 89 4D D0 0F 82 70 FE FF FF
-
-. 2178 805A7EF 41
-. 8B 55 1C 8B 4D D4 FF 45 E0 8B 75 D8 01 95 34 FF FF FF 01 95 30 FF FF FF 01 D7 01 8D 2C FF FF FF 39 75 E0 0F 82 08 FE FF FF
-***** EXPENSIVE 2180 564
-
-. 2179 8053758 53
-. 8B 75 AC 01 75 B4 8B 45 B4 31 D2 F7 75 08 89 55 B4 31 D2 52 8B 45 B4 50 DF 2C 24 DC 4D C8 83 EC 08 8B 45 C4 8B B0 08 02 00 00 DD 55 88 DD 1C 24 E8 93 4E FF FF
-
-. 2180 8053C9C 27
-. 8B 55 E0 42 89 D0 C7 45 F0 01 00 00 00 D1 E8 39 45 F0 89 55 D4 0F 83 32 01 00 00
-***** EXPENSIVE 2182 565
-
-. 2181 8053CB7 49
-. 8B 4D 20 8B 7D E0 83 C1 10 8D 7C 3F FE 89 4D C0 89 7D BC 89 F6 C7 45 EC 00 00 00 00 8B 55 D8 8B 45 C0 39 55 EC DD 40 F0 DD 40 F8 0F 83 8D 01 00 00
-***** EXPENSIVE 2183 566
-
-. 2182 8053CE8 152
-. 8B 45 E0 D1 E0 8B 7D BC 8B 4D F0 4F 8D 74 09 FF C7 45 C4 00 00 00 00 89 45 CC 89 45 C8 8D 76 00 8B 45 0C 8B 55 08 0F AF C6 DD 04 C2 8D 04 F5 08 00 00 00 0F AF 45 0C DD 04 10 8B 45 0C 0F AF C7 DD 04 C2 8D 04 FD 08 00 00 00 0F AF 45 0C DD 04 10 8B 4D F0 8B 55 C4 8D 44 4A FF 8B 4D E8 8B 55 14 01 C1 0F AF D0 D9 C3 D9 C3 D9 CD 8D 04 C5 08 00 00 00 D8 E3 D9 CC D8 C2 D9 C9 89 4D B0 0F AF 45 14 8B 4D 10 DE C3 D9 CC DE E1 D9 C4 D9 C6 D9 CB DD 1C D1 D9 CA D8 CB
-***** EXPENSIVE 2184 567
-
-. 2183 8053D80 76
-. D9 C9 DD 1C 08 D9 C9 D8 CB 8B 45 14 0F AF 45 B0 DE E9 DD 1C C1 8B 45 B0 8D 0C C5 08 00 00 00 D8 CA D9 C9 D8 CB 0F AF 4D 14 DE C1 8B 55 10 DD 1C 11 FF 45 EC 8B 4D E0 8B 45 D8 03 7D CC 03 75 C8 01 4D C4 39 45 EC 0F 82 3C FF FF FF
-***** EXPENSIVE 2185 568
-
-. 2184 8053DCC 29
-. DD D8 DD D8 8B 45 D4 FF 45 F0 D1 E8 83 45 C0 10 83 6D BC 02 39 45 F0 0F 82 E3 FE FF FF
-***** EXPENSIVE 2186 569
-
-. 2185 8053CCC 28
-. C7 45 EC 00 00 00 00 8B 55 D8 8B 45 C0 39 55 EC DD 40 F0 DD 40 F8 0F 83 8D 01 00 00
-
-. 2186 8053DE9 9
-. F7 45 E0 01 00 00 00 75 7B
-***** EXPENSIVE 2188 570
-
-. 2187 80550E5 31
-. C7 45 D0 00 00 00 00 8B 55 18 39 55 D0 DD 85 60 FF FF FF DD 85 58 FF FF FF 0F 83 40 07 00 00
-***** EXPENSIVE 2189 571
-vex iropt: not unrolling (85 sts)
-
-. 2188 805B308 80
-. 8B 45 EC 01 F0 8B 55 0C 0F AF D6 89 45 D4 8B 45 08 D9 04 90 8B 45 D4 0F AF 45 0C 8B 55 08 D9 04 82 D9 C1 8B 45 14 0F AF C7 8B 55 10 D8 C1 D9 1C 82 8B 45 14 0F AF C1 DE E9 D9 1C 82 FF 45 F0 8B 45 E8 03 4D 18 03 7D 18 03 75 E4 39 45 F0 72 B0
-
-. 2189 805CB4B 27
-. 8B 75 D0 46 89 F0 C7 45 E0 01 00 00 00 D1 E8 39 45 E0 89 75 84 0F 83 3D 02 00 00
-
-. 2190 805CDA3 13
-. F7 45 D0 01 00 00 00 0F 85 33 02 00 00
-***** EXPENSIVE 2192 572
-
-. 2191 805CDB0 33
-. 31 D2 52 8B 45 18 50 DF 2C 24 DC BB 3C F6 FF FF 83 EC 08 DD 14 24 DD 9D 28 FF FF FF E8 4F B8 FE FF
-***** EXPENSIVE 2193 573
-
-. 2192 805CDD1 17
-. DD 85 28 FF FF FF DD 1C 24 D9 5D 9C E8 4E B9 FE FF
-***** EXPENSIVE 2194 574
-
-. 2193 805CDE2 27
-. C7 45 DC 00 00 00 00 8B 55 D4 D9 E0 83 C4 10 39 55 DC D9 5D 98 0F 83 E6 01 00 00
-***** EXPENSIVE 2195 575
-
-. 2194 805CDFD 99
-. D9 83 4C F6 FF FF D9 83 50 F6 FF FF D9 C9 D9 5D 80 D9 9D 7C FF FF FF C7 85 78 FF FF FF 00 00 00 00 C7 85 74 FF FF FF 00 00 00 00 C7 85 70 FF FF FF 00 00 00 00 C7 85 6C FF FF FF 00 00 00 00 C7 45 CC 00 00 00 00 8B 45 18 D9 45 80 D9 85 7C FF FF FF D9 C9 39 45 CC D9 5D 94 D9 5D 90 0F 83 56 01 00 00
-***** EXPENSIVE 2196 576
-
-. 2195 805CE60 40
-. 8B 55 E0 8B 8D 6C FF FF FF 8D 3C 51 8B 45 CC D9 85 7C FF FF FF D9 45 80 D9 C9 85 C0 D9 55 88 D9 55 8C D9 C0 D9 C2 74 30
-
-. 2196 805CEB8 11
-. 31 F6 3B 75 18 0F 83 90 01 00 00
-
-. 2197 805CEC3 7
-. 8D 57 FF 85 F6 74 44
-***** EXPENSIVE 2199 577
-
-. 2198 805CF0E 77
-. 8B 45 0C 0F AF C2 8B 4D 08 D9 04 81 D9 C1 D9 C4 D9 C9 D8 CA D9 C9 DE CA D9 C3 D9 C6 D8 CA D9 C9 D8 CB D9 CA D8 CD D9 CB D8 CF D9 C9 DE E2 DE C2 46 D8 45 8C D9 C9 D8 45 88 D9 C9 03 55 D8 3B 75 18 D9 5D 8C D9 5D 88 0F 82 6B FF FF FF
-
-. 2199 805CEC6 4
-. 85 F6 74 44
-***** EXPENSIVE 2201 578
-
-. 2200 805CECA 112
-. D9 45 9C D8 C9 D9 45 98 D9 45 98 D9 C9 D8 CD D9 C9 DE CB D9 CC D8 4D 9C D9 45 94 D9 CA DE E5 DE C2 D8 CC D9 45 90 D9 45 90 D9 C9 D8 CC D9 C9 DE CE D9 CB D8 4D 94 D9 C9 DE E3 DE C4 D9 CA D9 C9 D9 CB D9 C9 8B 45 0C 0F AF C2 8B 4D 08 D9 04 81 D9 C1 D9 C4 D9 C9 D8 CA D9 C9 DE CA D9 C3 D9 C6 D8 CA D9 C9 D8 CB D9 CA D8 CD D9 CB D8 CF D9 C9
-***** EXPENSIVE 2202 579
-
-. 2201 805CF3A 33
-. DE E2 DE C2 46 D8 45 8C D9 C9 D8 45 88 D9 C9 03 55 D8 3B 75 18 D9 5D 8C D9 5D 88 0F 82 6B FF FF FF
-***** EXPENSIVE 2203 580
-
-. 2202 805CF5B 22
-. DD D8 DD D8 DD D8 DD D8 8B 4D CC 8B 45 18 41 2B 45 CC 39 C1 73 7A
-***** EXPENSIVE 2204 581
-
-. 2203 805CF71 69
-. 8B 75 CC 0F AF 75 D0 8B 95 70 FF FF FF 8D 04 72 8B 75 E0 8D 44 70 FF 8B 55 14 0F AF D0 8D 04 85 04 00 00 00 D9 45 8C 8B 75 10 0F AF 45 14 D9 1C 96 D9 45 88 D9 1C 30 8B 45 18 39 C1 89 4D CC 0F 82 B6 FE FF FF
-***** EXPENSIVE 2205 582
-
-. 2204 805CE6C 28
-. 8B 45 CC D9 85 7C FF FF FF D9 45 80 D9 C9 85 C0 D9 55 88 D9 55 8C D9 C0 D9 C2 74 30
-***** EXPENSIVE 2206 583
-
-. 2205 805CE88 59
-. D9 45 94 D9 45 94 D9 45 90 D9 45 90 D9 CB D9 E0 D9 CA D8 4D C8 D9 C9 D8 4D C4 D9 CA D8 4D C4 D9 CB D8 4D C8 D9 C9 DE C2 DE C2 D9 5D 94 D9 5D 90 31 F6 3B 75 18 0F 83 90 01 00 00
-
-. 2206 805CFEB 4
-. 39 C1 74 38
-***** EXPENSIVE 2208 584
-
-. 2207 805D027 44
-. 8B 45 CC 0F AF 45 D0 8B 95 74 FF FF FF 89 45 CC 8B 75 E0 8D 04 42 8D 44 70 FF 0F AF 45 14 D9 45 8C 8B 55 10 D9 1C 82 E9 55 FF FF FF
-
-. 2208 805CFA8 14
-. 8B 45 18 39 C1 89 4D CC 0F 82 B6 FE FF FF
-***** EXPENSIVE 2210 585
-
-. 2209 805CFEF 56
-. 8B 95 78 FF FF FF 0F AF 45 D0 8D 04 42 8B 55 E0 D1 E2 29 D0 48 8B 55 14 0F AF D0 D9 45 8C 8B 75 10 8D 04 85 04 00 00 00 D9 1C 96 0F AF 45 14 80 75 8B 80 E9 7B FF FF FF
-***** EXPENSIVE 2211 586
-
-. 2210 805CFA2 20
-. D9 45 88 D9 1C 30 8B 45 18 39 C1 89 4D CC 0F 82 B6 FE FF FF
-
-. 2211 805CFB6 45
-. 8B 55 1C 8B 4D D0 FF 45 DC 8B 75 D4 01 95 78 FF FF FF 01 95 74 FF FF FF 01 95 70 FF FF FF 01 8D 6C FF FF FF 39 75 DC 0F 82 59 FE FF FF
-
-. 2212 8056491 27
-. 8B 55 E0 42 89 D0 C7 45 F0 01 00 00 00 D1 E8 39 45 F0 89 55 D4 0F 83 31 01 00 00
-***** EXPENSIVE 2214 587
-
-. 2213 80564AC 48
-. 8B 4D 20 8B 7D E0 83 C1 08 8D 7C 3F FE 89 4D C0 89 7D BC 90 C7 45 EC 00 00 00 00 8B 55 D8 8B 45 C0 39 55 EC D9 40 F8 D9 40 FC 0F 83 8D 01 00 00
-***** EXPENSIVE 2215 588
-
-. 2214 80564DC 152
-. 8B 45 E0 D1 E0 8B 7D BC 8B 4D F0 4F 8D 74 09 FF C7 45 C4 00 00 00 00 89 45 CC 89 45 C8 8D 76 00 8B 45 0C 8B 55 08 0F AF C6 D9 04 82 8D 04 B5 04 00 00 00 0F AF 45 0C D9 04 10 8B 45 0C 0F AF C7 D9 04 82 8D 04 BD 04 00 00 00 0F AF 45 0C D9 04 10 8B 4D F0 8B 55 C4 8D 44 4A FF 8B 4D E8 8B 55 14 01 C1 0F AF D0 D9 C3 D9 C3 D9 CD 8D 04 85 04 00 00 00 D8 E3 D9 CC D8 C2 D9 C9 89 4D B0 0F AF 45 14 8B 4D 10 DE C3 D9 CC DE E1 D9 C4 D9 C6 D9 CB D9 1C 91 D9 CA D8 CB
-***** EXPENSIVE 2216 589
-
-. 2215 8056574 76
-. D9 C9 D9 1C 08 D9 C9 D8 CB 8B 45 14 0F AF 45 B0 DE E9 D9 1C 81 8B 45 B0 8D 0C 85 04 00 00 00 D8 CA D9 C9 D8 CB 0F AF 4D 14 DE C1 8B 55 10 D9 1C 11 FF 45 EC 8B 4D E0 8B 45 D8 03 7D CC 03 75 C8 01 4D C4 39 45 EC 0F 82 3C FF FF FF
-***** EXPENSIVE 2217 590
-
-. 2216 80565C0 29
-. DD D8 DD D8 8B 45 D4 FF 45 F0 D1 E8 83 45 C0 08 83 6D BC 02 39 45 F0 0F 82 E3 FE FF FF
-***** EXPENSIVE 2218 591
-
-. 2217 80564C0 28
-. C7 45 EC 00 00 00 00 8B 55 D8 8B 45 C0 39 55 EC D9 40 F8 D9 40 FC 0F 83 8D 01 00 00
-
-. 2218 80565DD 9
-. F7 45 E0 01 00 00 00 75 7B
-***** EXPENSIVE 2220 592
-
-. 2219 80579EF 25
-. C7 45 CC 00 00 00 00 8B 55 18 39 55 CC D9 45 88 D9 45 84 0F 83 E0 06 00 00
-***** EXPENSIVE 2221 593
-
-. 2220 8058FF8 66
-. 8B 45 8C 8B 55 20 DD 44 02 F0 DD 44 02 F8 8B 55 24 DD 5D C0 DD 44 02 F8 D9 C9 DD 5D C8 DD 5D B0 DD 44 02 F0 C7 45 E8 00 00 00 00 8B 45 E0 80 75 C7 80 80 75 B7 80 39 45 E8 DD 5D B8 0F 83 A6 01 00 00
-***** EXPENSIVE 2222 594
-
-. 2221 80549A0 121
-. C7 85 DC FE FF FF 10 00 00 00 C7 85 CC FE FF FF 02 00 00 00 8B BD DC FE FF FF 8B 45 20 DD 44 38 F0 DD 44 38 F8 D9 C9 8B 45 24 DD 5D C0 DD 5D B8 DD 44 38 F0 DD 44 38 F8 D9 C9 8B 45 28 DD 5D B0 DD 5D A8 DD 44 38 F0 DD 44 38 F8 D9 C9 8B 45 2C DD 5D A0 DD 5D 98 DD 44 38 F0 DD 44 38 F8 D9 C9 C7 45 E8 00 00 00 00 8B 45 CC 39 45 E8 DD 5D 90 DD 5D 88 0F 83 50 04 00 00
-***** EXPENSIVE 2223 595
-
-. 2222 8054A19 205
-. 8B 85 CC FE FF FF 8B 55 D0 89 C1 DD 83 C4 F8 FF FF DD 83 CC F8 FF FF D9 C9 D1 E2 49 DD 9D F0 FE FF FF DD 9D E8 FE FF FF 89 45 84 89 55 80 89 8D E0 FE FF FF C7 85 D0 FE FF FF 00 00 00 00 90 8B 7D 84 8B B5 D0 FE FF FF 8D 44 37 FF 8B 55 80 8D 0C 02 01 CA 29 FE 8B 7D 80 89 95 A4 FE FF FF 8D 74 37 FF 8B 55 0C 01 F7 0F AF D0 8D 04 C5 08 00 00 00 89 BD 7C FF FF FF 0F AF 45 0C 8B 7D 08 DD 04 38 8B 45 0C 0F AF C1 8D 0C CD 08 00 00 00 DD 04 C7 0F AF 4D 0C 8B 45 0C DD 04 39 0F AF 85 A4 FE FF FF DD 9D 58 FF FF FF DD 04 C7 8B 85 A4 FE FF FF DD 04 D7 8D 3C C5 08 00 00 00 8B 45 0C 8B 55 08 0F AF 85 7C FF FF FF 0F AF 7D 0C
-***** EXPENSIVE 2224 596
-
-. 2223 8054AE6 186
-. DD 9D 70 FF FF FF D9 CA DD 9D 68 FF FF FF DD 04 17 DD 04 C2 8B 95 7C FF FF FF 8D 04 D5 08 00 00 00 8B 4D 08 0F AF 45 0C DD 04 08 D9 CA 8B 45 0C 0F AF C6 8D 34 F5 08 00 00 00 DD 9D B8 FE FF FF D9 CA 0F AF 75 0C DD 9D 60 FF FF FF D9 E0 DD 04 0E DD 85 B8 FE FF FF D9 CB DD 9D 50 FF FF FF DD 04 C1 DD 85 60 FF FF FF DD 85 58 FF FF FF D9 CD D8 C4 D9 CB D9 E0 D9 C9 D8 C2 D9 CD D8 C1 DD 85 50 FF FF FF D9 CC DD 9D 48 FF FF FF D9 CA DC AD 60 FF FF FF D9 C9 DC AD 58 FF FF FF D9 CB D8 C6 D9 C9 DD 9D 40 FF FF FF D9 CA DD 9D 38 FF FF FF DD 85 48 FF FF FF D9 C4 D8 C3
-***** EXPENSIVE 2225 597
-
-. 2224 8054BA0 172
-. DD 85 B8 FE FF FF D9 CA D8 C3 D9 C9 DD 9D 30 FF FF FF D9 CE DC A5 50 FF FF FF D9 C9 DE E4 D9 CD DD 95 28 FF FF FF DD 85 F0 FE FF FF D9 FA DC 8D E8 FE FF FF D9 CD DE E3 D9 CC DE CA DD 85 F0 FE FF FF D9 FA D9 C9 DC A5 48 FF FF FF D9 C9 DC 8D E8 FE FF FF DE C9 DD 85 30 FF FF FF DC 8D E8 FE FF FF DC AD 70 FF FF FF D9 CC DC 8D E8 FE FF FF D9 C4 D9 C9 DC AD 68 FF FF FF D9 C9 D8 C3 DD 9D 20 FF FF FF D9 C0 D8 C2 D9 C9 DE E2 DD 45 E0 DD 45 D8 D8 CF D9 C9 DC 8D 40 FF FF FF D9 CA DD 9D 18 FF FF FF DE C1 DD 45 E0 DD 45 D8
-***** EXPENSIVE 2226 598
-
-. 2225 8054C4C 176
-. D8 CD D9 C9 DC 8D 38 FF FF FF DE C1 DD 45 D8 D9 CD DC 4D E0 D9 CD DC 8D 38 FF FF FF DE E5 D9 CD DE E3 DD 85 68 FF FF FF DD 45 D8 D9 CC DD 95 B0 FE FF FF D9 CF DC 4D E0 D9 C9 DC 85 28 FF FF FF D9 CF D8 E5 D9 CC DC 8D 40 FF FF FF DE E1 D9 CE DD 9D 68 FF FF FF DD 85 70 FF FF FF DD 85 20 FF FF FF D9 CC DD 9D 10 FF FF FF D9 C2 D9 C9 DC 85 30 FF FF FF D9 CC D8 E6 D9 C9 D8 C7 D9 CE DC 85 20 FF FF FF D9 CC DD 9D 70 FF FF FF D9 CD DD 9D 08 FF FF FF DD 85 18 FF FF FF DD 85 B0 FE FF FF D9 CC DD 9D 00 FF FF FF D9 CB 8B 95 E0 FE FF FF
-***** EXPENSIVE 2227 599
-
-. 2226 8054CFC 166
-. 03 55 D4 8B 45 D4 8D 0C 10 8D 34 08 01 F0 8B 7D 14 0F AF BD E0 FE FF FF DE C4 89 85 A4 FE FF FF DD 85 70 FF FF FF 8B 45 10 DD 1C F8 8B 85 E0 FE FF FF 8D 04 C5 08 00 00 00 8B 7D 10 0F AF 45 14 DD 85 68 FF FF FF DD 1C 38 D9 C9 DE E5 DC C1 DD 45 C0 DD 45 B8 D8 CB D9 C9 8B 45 14 D8 CD 0F AF C2 DE E1 DD 1C C7 DD 45 A8 DD 45 B0 D9 C9 DC 8D 08 FF FF FF D9 CB DC 4D C0 D9 CD DC 4D B8 D9 C9 8B 45 14 DC 8D 10 FF FF FF 8D 14 D5 08 00 00 00 0F AF 55 14 0F AF C1 DE E3 DE C4 D9 CB DD 1C 3A DD 1C C7 DD 45 A8
-***** EXPENSIVE 2228 600
-
-. 2227 8054DA2 169
-. DD 45 B0 DC 8D 08 FF FF FF D9 C9 DC 8D 10 FF FF FF 8D 0C CD 08 00 00 00 0F AF 4D 14 DE C1 DD 85 18 FF FF FF D9 C9 DD 1C 39 DD 45 A0 DD 45 98 D8 CD D9 C9 D8 CB 8B 45 14 0F AF C6 DE E1 DD 1C C7 DE E2 DD 45 90 DD 45 88 D8 CB D9 CC 8D 34 F5 08 00 00 00 DC 4D A0 D9 CA DC 4D 98 D9 C9 8B 45 14 DC 8D 00 FF FF FF 0F AF 85 A4 FE FF FF 0F AF 75 14 DE E4 DE C1 DD 1C 3E D9 C9 DD 1C C7 8B 85 A4 FE FF FF DD 45 88 D9 C9 8D 3C C5 08 00 00 00 DC 4D 90 D9 C9 DC 8D 00 FF FF FF 0F AF 7D 14 8B 45 10 8B 55 D0 DE C1 DD 1C 07
-
-. 2228 8054E4B 30
-. FF 45 E8 8D 04 92 8B 4D CC 01 95 E0 FE FF FF 01 85 D0 FE FF FF 39 4D E8 0F 82 EF FB FF FF
-
-. 2229 8054E69 34
-. 8B 85 FC FE FF FF FF 45 EC D1 E8 83 85 DC FE FF FF 10 83 85 CC FE FF FF 02 39 45 EC 0F 82 29 FB FF FF
-***** EXPENSIVE 2231 601
-
-. 2230 805B634 66
-. 8B 4D AC 8B 45 20 D9 44 88 F8 D9 44 88 FC 8B 45 24 D9 5D D0 D9 44 88 FC D9 C9 D9 5D D4 D9 5D C8 D9 44 88 F8 C7 45 E8 00 00 00 00 8B 45 E0 80 75 D3 80 80 75 CB 80 39 45 E8 D9 5D CC 0F 83 97 01 00 00
-***** EXPENSIVE 2232 602
-
-. 2231 8057214 113
-. C7 85 DC FE FF FF 02 00 00 00 89 F6 8B BD DC FE FF FF 8B 45 20 D9 44 B8 F8 D9 44 B8 FC D9 C9 8B 45 24 D9 5D B0 D9 5D AC D9 44 B8 F8 D9 44 B8 FC D9 C9 8B 45 28 D9 5D A8 D9 5D A4 D9 44 B8 F8 D9 44 B8 FC D9 C9 8B 45 2C D9 5D A0 D9 5D 9C D9 44 B8 F8 D9 44 B8 FC D9 C9 C7 45 E4 00 00 00 00 8B 45 D0 39 45 E4 D9 5D 98 D9 5D 94 0F 83 BE 04 00 00
-***** EXPENSIVE 2233 603
-
-. 2232 8057285 202
-. 8B 45 E8 8B 55 D4 DD 83 C4 F8 FF FF DD 83 CC F8 FF FF D9 C9 8D 44 00 FF D1 E2 DD 9D F0 FE FF FF DD 9D E8 FE FF FF 89 7D 90 89 85 E0 FE FF FF 89 55 8C C7 85 D0 FE FF FF 00 00 00 00 8D 76 00 8B 8D D0 FE FF FF 8B 75 90 8D 44 0E FF 8B 7D 8C 8D 0C 07 8B B5 D0 FE FF FF 01 CF 8B 55 8C 2B 75 90 89 BD BC FE FF FF 8D 74 32 FF 8B 7D 0C 01 F2 0F AF F8 8D 04 85 04 00 00 00 89 55 88 0F AF 45 0C 8B 55 08 D9 04 10 8B 45 0C 0F AF C1 D9 04 82 D9 C9 8B 45 0C 0F AF 85 BC FE FF FF D9 5D 80 8D 0C 8D 04 00 00 00 D9 04 82 8B 85 BC FE FF FF D9 04 BA 0F AF 4D 0C 8D 3C 85 04 00 00 00 8B 45 0C 0F AF 45 88 D9 5D 84 0F AF 7D 0C
-***** EXPENSIVE 2234 604
-
-. 2233 805734F 205
-. D9 04 11 D9 9D 78 FF FF FF D9 9D 74 FF FF FF D9 04 17 D9 04 82 D9 C9 8B 55 88 8D 04 95 04 00 00 00 8B 4D 08 0F AF 45 0C D9 9D 70 FF FF FF D9 04 08 D9 CA D9 9D 7C FF FF FF D9 C9 D9 9D 6C FF FF FF 8B 45 0C 0F AF C6 D9 04 81 D9 85 7C FF FF FF D9 C9 8D 34 B5 04 00 00 00 D9 95 68 FF FF FF DE C1 0F AF 75 0C D9 85 74 FF FF FF D8 C2 D9 04 0E D9 C9 D9 9D 64 FF FF FF D9 E0 D9 85 78 FF FF FF D9 85 7C FF FF FF D9 C9 80 B5 6F FF FF FF 80 D8 C2 D9 C9 D8 A5 68 FF FF FF D9 CA D8 AD 78 FF FF FF D9 CC D8 AD 74 FF FF FF D9 85 70 FF FF FF D8 85 6C FF FF FF D9 CB D9 9D 60 FF FF FF D9 CC D9 9D 5C FF FF FF D9 CB D9 9D 58 FF FF FF
-***** EXPENSIVE 2235 605
-
-. 2234 805741C 191
-. D9 85 70 FF FF FF D9 85 64 FF FF FF D9 C4 D9 CA D8 A5 6C FF FF FF D9 C9 D8 C4 D9 CA D8 C3 D9 C9 D9 9D 54 FF FF FF D9 C9 D9 95 50 FF FF FF D9 C9 D9 9D 4C FF FF FF DD 85 F0 FE FF FF D9 FA DC 8D E8 FE FF FF D9 CB D8 A5 64 FF FF FF DE CB D9 CA D9 5D EC D9 45 EC DD 85 F0 FE FF FF D9 FA DC 8D E8 FE FF FF D9 CC DE E2 D9 CB DE C9 D9 5D EC DD 85 E8 FE FF FF DE C9 D8 6D 84 D9 9D 48 FF FF FF DD 85 E8 FE FF FF D8 8D 4C FF FF FF D8 6D 80 D9 9D 44 FF FF FF D9 85 48 FF FF FF D8 C1 D9 C9 D8 AD 48 FF FF FF D9 C9 D9 9D 40 FF FF FF D9 9D 38 FF FF FF D9 45 DC D9 45 E0 D8 8D 60 FF FF FF
-***** EXPENSIVE 2236 606
-
-. 2235 80574DB 173
-. D9 C9 D8 8D 58 FF FF FF DE C1 D9 45 EC D9 85 44 FF FF FF D9 CA D9 9D 30 FF FF FF D9 45 E0 D9 45 DC D9 CB D8 C2 D9 CB D8 8D 54 FF FF FF D9 CA D8 AD 44 FF FF FF D9 C9 D8 8D 5C FF FF FF DE C2 D9 9D 34 FF FF FF D9 45 E0 D9 45 DC D9 C9 D8 8D 58 FF FF FF D9 C9 D8 8D 60 FF FF FF D9 45 84 D9 C9 DE E2 D9 CB D9 9D 3C FF FF FF D9 45 DC D9 45 E0 D9 CC D8 85 50 FF FF FF D9 CC D8 8D 54 FF FF FF D9 C9 D8 8D 5C FF FF FF D9 CC D9 5D 84 8B 95 E0 FE FF FF 03 55 D8 8B 45 D8 8D 0C 10 8D 34 08 DE EB D9 85 38 FF FF FF 01 F0 D8 E3 D9 CB
-***** EXPENSIVE 2237 607
-
-. 2236 8057588 187
-. 8B 7D 14 D8 85 38 FF FF FF 0F AF BD E0 FE FF FF D9 45 80 D9 C9 D9 9D 24 FF FF FF 89 85 BC FE FF FF D9 45 84 8B 45 10 D9 1C B8 D8 85 4C FF FF FF 8B 85 E0 FE FF FF D9 5D 80 D9 85 34 FF FF FF 8D 04 85 04 00 00 00 8B 7D 10 0F AF 45 14 D8 C1 D9 45 80 D9 CA D8 AD 34 FF FF FF D9 85 40 FF FF FF D9 85 3C FF FF FF D9 C9 D8 E5 D9 C9 D8 85 30 FF FF FF D9 CC D9 1C 38 D9 C9 D9 9D 20 FF FF FF D9 45 B0 D9 45 AC D9 CD D8 85 40 FF FF FF D9 CD D8 CC D9 C9 8B 45 14 D8 CA 0F AF C2 DE E1 D9 CC D9 9D 1C FF FF FF D9 85 3C FF FF FF D8 A5 30 FF FF FF D9 CC D9 1C 87 D9 45 B0 DE CB
-***** EXPENSIVE 2238 608
-
-. 2237 8057643 159
-. D9 45 AC DE C9 8D 14 95 04 00 00 00 0F AF 55 14 DE C2 D9 C9 D9 1C 3A D9 45 A4 D9 45 A8 D9 C9 D8 CA D9 C9 8B 45 14 D8 CC 0F AF C1 DE E1 D9 1C 87 D9 45 9C D9 45 A0 D9 C9 D8 8D 20 FF FF FF D9 CA D8 4D A8 D9 CC D8 4D A4 D9 C9 8B 45 14 D8 8D 24 FF FF FF 8D 0C 8D 04 00 00 00 0F AF 4D 14 0F AF C6 DE E2 DE C3 D9 CA D9 1C 39 D9 45 A0 D9 CA D9 1C 87 D9 45 9C D8 8D 24 FF FF FF D9 CA D8 8D 20 FF FF FF DE C2 D9 45 94 D9 45 98 8B 45 14 D8 8D 1C FF FF FF D9 C9 D8 CA 8D 34 B5 04 00 00 00
-***** EXPENSIVE 2239 609
-
-. 2238 80576E2 97
-. 0F AF 85 BC FE FF FF 0F AF 75 14 DE E9 D9 CA D9 1C 3E D9 C9 D9 1C 87 8B 85 BC FE FF FF D9 45 94 D9 C9 8D 3C 85 04 00 00 00 D8 4D 98 D9 C9 D8 8D 1C FF FF FF 0F AF 7D 14 8B 45 10 DE C1 D9 1C 07 8B 55 D4 8D 04 92 FF 45 E4 8B 4D D0 01 95 E0 FE FF FF 01 85 D0 FE FF FF 39 4D E4 0F 82 81 FB FF FF
-
-. 2239 8057743 27
-. 8B 85 F8 FE FF FF FF 45 E8 D1 E8 83 85 DC FE FF FF 02 39 45 E8 0F 82 C2 FA FF FF
-***** EXPENSIVE 2241 610
-
-. 2240 804DBF8 160
-. 8B 45 EC 03 45 DC 0F AF 45 0C C1 E0 04 DD 04 07 DD 9D 48 FF FF FF DD 44 07 08 8B 45 EC 03 45 94 0F AF 45 0C C1 E0 04 DD 04 07 DD 44 07 08 8B 45 EC 03 45 84 0F AF 45 0C C1 E0 04 DD 04 07 D9 CA DD 55 98 DD 85 48 FF FF FF D8 C3 DD 44 07 08 D9 C9 DD 9D 78 FF FF FF D9 C4 D8 C1 DD 04 17 D9 C9 DD 9D 70 FF FF FF DD 85 48 FF FF FF D9 CB D8 C1 D9 CB DE E5 DD 85 78 FF FF FF DD 44 17 08 D9 C9 D8 C4 D9 CD DD 55 88 D9 CD DD 1C 0E DC C4 DD 85 70 FF FF FF D9 CA DC 65 98 D9 C9 DC 65 88 D9 CA
-***** EXPENSIVE 2242 611
-
-. 2241 804DC98 139
-. D8 C5 D9 CF DE E3 D9 CD DC 8D 60 FF FF FF D9 CA DC 8D 60 FF FF FF D9 CE DD 5C 0E 08 D9 C4 D9 C1 D9 C9 8B 45 E8 D8 E7 D9 C9 D8 C3 D9 CE DE C7 D9 C9 DE E2 03 45 D4 DD 45 C8 DD 45 C0 0F AF 45 14 D8 CE D9 C9 D8 CA C1 E0 04 DE E1 D9 CB DC A5 78 FF FF FF D9 CC DC A5 70 FF FF FF D9 CB DD 1C 06 D9 CC DC 4D C8 D9 CC DC 4D C0 DE C4 D9 CB DD 5C 06 08 8B 45 E8 03 85 6C FF FF FF DD 45 B8 DD 45 B0 D8 CA D9 C9 0F AF 45 14 D8 CB
-***** EXPENSIVE 2243 612
-
-. 2242 804DD23 127
-. D9 CA DC 4D B8 D9 CB DC 4D B0 D9 CA C1 E0 04 DE E1 D9 CA DE C1 D9 C9 DD 1C 06 DD 5C 06 08 8B 45 E8 03 85 68 FF FF FF DD 45 A8 DD 45 A0 D9 C9 0F AF 45 14 D8 CB D9 C9 D8 CA D9 CB DC 4D A0 D9 CA DC 4D A8 D9 C9 C1 E0 04 DE E3 DE C1 D9 C9 DD 1C 06 DD 5C 06 08 8B 45 0C 01 85 50 FF FF FF FF 45 E0 8B 45 D4 03 95 58 FF FF FF FF 45 EC 03 8D 5C FF FF FF FF 45 E8 39 45 E0 0F 82 56 FE FF FF
-***** EXPENSIVE 2244 613
-
-. 2243 805100C 138
-. 8B 45 F0 03 45 E0 0F AF 45 0C D9 04 C7 D9 44 C7 04 8B 45 F0 03 45 B8 0F AF 45 0C D9 04 C7 D9 44 C7 04 8B 45 F0 03 45 B4 0F AF 45 0C D9 44 C7 04 D9 5D B0 D9 04 D7 D8 C2 D9 04 C7 D9 C9 D9 5D AC D9 C4 D9 44 D7 04 D8 C3 D9 C9 D8 C2 D9 CE DE E2 D9 45 AC D9 C9 D9 5D A8 D8 C5 D9 45 B0 D9 CB D8 6C D7 04 D9 04 D7 D9 CC D8 C6 D9 CA D9 1C CE D9 45 A8 D8 C2 D9 CC DE E5 D9 CD D8 65 B0 D8 4D 84 D9 CB D9 5C CE 04 D9 C3 D8 E3
-***** EXPENSIVE 2245 614
-
-. 2244 8051096 128
-. D9 CA D8 4D 84 D9 CE D8 6D AC D9 CA D9 5D A0 D9 C4 D8 C6 D9 CD D9 5D A4 D9 C9 D9 55 9C D9 CD D8 6D A4 D9 5D 90 D9 CA DE C1 8B 45 EC D9 45 D0 D9 45 CC 03 45 D8 D8 CC D9 C9 D8 4D A0 0F AF 45 14 DE E1 D9 1C C6 D9 45 CC D8 4D A0 D9 CB D8 4D D0 DE C3 D9 C9 D8 6D A8 D9 C9 D9 5D 94 D9 C9 D9 5C C6 04 D9 45 C8 8B 45 EC D9 45 C4 D9 45 C8 D9 45 C4 D9 CA 03 45 8C D8 CC D9 CB D8 CD D9 C9 D8 CC
-***** EXPENSIVE 2246 615
-
-. 2245 8051116 104
-. D9 CA DE CD 0F AF 45 14 DE E2 DE C3 D9 1C C6 D9 C9 D9 5C C6 04 D9 45 C0 8B 45 EC D9 45 BC D9 C9 03 45 88 D8 4D 94 D9 C9 D8 4D 90 0F AF 45 14 DE E9 D9 1C C6 D9 45 BC D9 45 C0 D8 4D 90 D9 C9 D8 4D 94 DE C1 D9 C9 D9 5D 98 D9 5C C6 04 FF 45 E4 8B 45 D8 03 55 0C FF 45 F0 03 4D 14 FF 45 EC 39 45 E4 0F 82 8E FE FF FF
-
-. 2246 80593D7 30
-. 8B 75 DC 46 89 F0 C7 45 EC 01 00 00 00 D1 E8 39 45 EC 89 B5 68 FF FF FF 0F 83 F9 02 00 00
-***** EXPENSIVE 2248 616
-
-. 2247 80593F5 103
-. C7 85 58 FF FF FF 10 00 00 00 90 8B 85 58 FF FF FF 8B 55 20 DD 44 02 F0 DD 44 02 F8 8B 55 24 DD 5D C8 DD 5D D0 DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 28 DD 5D B8 DD 44 02 F8 D9 C9 DD 5D C0 DD 5D A8 DD 44 02 F0 C7 45 E8 00 00 00 00 8B 45 E0 80 75 CF 80 80 75 BF 80 80 75 AF 80 39 45 E8 DD 5D B0 0F 83 77 02 00 00
-***** EXPENSIVE 2249 617
-
-. 2248 805945C 198
-. 8B 55 DC 8B 4D EC 8B 45 DC 8D 4C 09 FF D1 E2 2B 45 EC 89 95 6C FF FF FF 89 8D 60 FF FF FF 89 8D 5C FF FF FF 8D 7C 00 FF 8B 95 5C FF FF FF 03 55 E4 8B 75 E4 8D 0C 16 01 CE 8B 45 0C 89 B5 3C FF FF FF 0F AF 85 5C FF FF FF 8B 75 08 DD 04 C6 8B 85 5C FF FF FF 8D 04 C5 08 00 00 00 0F AF 45 0C DD 5D A0 DD 04 30 8B 45 0C 0F AF C2 DD 04 C6 8B 45 0C 0F AF C1 8D 14 D5 08 00 00 00 DD 04 C6 0F AF 55 0C 8B 45 0C 8D 0C CD 08 00 00 00 DD 04 32 0F AF 4D 0C 0F AF 85 3C FF FF FF 8B 95 3C FF FF FF DD 04 31 DD 04 C6 D9 CD 8D 34 D5 08 00 00 00 0F AF 75 0C 8B 4D 08 DD 5D 98 DD 04 0E DD 5D 90 DD 45 D0 DD 45 C8
-***** EXPENSIVE 2250 618
-
-. 2249 8059522 128
-. D9 C9 D8 CD D9 C9 D8 CB DE E9 DD 9D 40 FF FF FF DD 45 C0 DD 45 B8 D9 CD DC 4D C8 D9 CD D8 CA D9 CB DC 4D D0 D9 C9 D8 CC D9 C9 DE C5 DE E2 DD 45 B0 DD 45 A8 DC 4D 90 D9 C9 D8 CE DE E1 DD 85 40 FF FF FF DD 45 B0 D9 CD DC 4D B8 D9 CF DC 4D A8 D9 C9 D8 C2 D9 CB DC 4D C0 D9 CD DC 4D 90 DE C1 D9 CC DE C6 DD 45 A0 DD 45 98 D9 CB DD 5D 88 8B 85 6C FF FF FF D9 C5 D9 C9 8D 0C 38 D8 C4 D9 C9
-***** EXPENSIVE 2251 619
-
-. 2250 80595A2 156
-. D8 C5 D9 CE DE E5 8B 45 14 DD 45 88 0F AF 85 60 FF FF FF 8B 75 10 D8 C1 DD 1C C6 D9 CD DD 5D 80 8B B5 60 FF FF FF DD 85 40 FF FF FF D9 CA D8 C6 D9 CA DE E1 8D 04 F5 08 00 00 00 DD 45 80 D9 CB 8B 75 10 DC 6D A0 D9 CE 0F AF 45 14 DC 6D 98 D9 CB D8 C2 D9 CB 8B 95 60 FF FF FF DD 9D 70 FF FF FF D9 CA DD 1C 30 D9 CA 03 95 6C FF FF FF D9 E0 D9 C4 8B 45 14 0F AF C2 D8 E1 DD 1C C6 D9 CC 8B 45 14 DD 9D 78 FF FF FF 0F AF C1 DD 85 70 FF FF FF D9 C9 D9 E0 D9 CA DC 65 80 D9 CC
-***** EXPENSIVE 2252 620
-
-. 2251 805963E 149
-. 8D 14 D5 08 00 00 00 8D 0C CD 08 00 00 00 0F AF 55 14 DC 85 78 FF FF FF D9 C9 0F AF 4D 14 D8 C2 D9 CB DC 65 88 D9 CA DC AD 70 FF FF FF D9 CC D9 E0 D9 CB DD 1C 32 D9 CB DD 9D 70 FF FF FF DD 1C C6 D9 C9 DD 95 78 FF FF FF D9 C9 DD 1C 31 8B 45 14 0F AF C7 DD 1C C6 80 B5 77 FF FF FF 80 8D 04 FD 08 00 00 00 0F AF 45 14 DD 85 70 FF FF FF DD 1C 30 8B 55 DC 8B 45 18 FF 45 E8 8B 4D E0 01 85 60 FF FF FF 01 C7 01 95 5C FF FF FF 39 4D E8 0F 82 B1 FD FF FF
-
-. 2252 80596D3 27
-. 8B 85 68 FF FF FF FF 45 EC D1 E8 83 85 58 FF FF FF 10 39 45 EC 0F 82 12 FD FF FF
-
-. 2253 80596EE 13
-. F7 45 DC 01 00 00 00 0F 85 FC 00 00 00
-
-. 2254 80596FB 19
-. C7 45 E8 00 00 00 00 8B 75 E0 39 75 E8 0F 83 E9 00 00 00
-***** EXPENSIVE 2256 621
-
-. 2255 805970E 162
-. 8B 7D DC DD 83 DC F8 FF FF C7 85 64 FF FF FF 00 00 00 00 4F 89 F6 8B 45 E4 8D 14 38 8D 0C 10 01 C8 8B 75 0C 89 85 3C FF FF FF 0F AF F7 8B 45 08 DD 04 F0 8B B5 3C FF FF FF 0F AF 55 0C 0F AF 4D 0C 0F AF 75 0C DD 04 D0 DD 04 C8 DD 04 F0 D9 C4 D9 FA DD 83 34 F6 FF FF DE F1 D9 C3 D8 E2 DE C9 D9 C5 D9 FA 8B 8D 64 FF FF FF 8B 55 EC DD 83 34 F6 FF FF 8D 44 51 FF DE F1 8B 75 DC D9 C5 8B 55 14 8D 0C 70 0F AF D0 8B 75 10 D8 C2 DD 1C D6 D9 CC DE C2 D9 C2 D9 CC DE CA D9 CB 8D 04 C5 08 00 00 00
-***** EXPENSIVE 2257 622
-
-. 2256 80597B0 69
-. D9 E0 0F AF 45 14 D8 E1 DD 1C 30 D9 CB 8B 45 14 0F AF C1 DE E2 D9 C9 DD 1C C6 8D 0C CD 08 00 00 00 8B 45 18 FF 45 E8 8B 55 E0 0F AF 4D 14 DE E1 01 85 64 FF FF FF 03 7D DC 39 55 E8 DD 1C 31 0F 82 2F FF FF FF
-***** EXPENSIVE 2258 623
-
-. 2257 80597F5 13
-. DD D8 81 C4 BC 00 00 00 5B 5E 5F C9 C3
-***** EXPENSIVE 2259 624
-
-. 2258 80542D8 154
-. 8D 14 BD 00 00 00 00 8B 4D D8 8B 75 08 8D 44 11 FF 0F AF 55 0C DD 04 D6 8B 55 0C 0F AF D0 8D 0C 01 8D 04 C5 08 00 00 00 DD 04 D6 0F AF 45 0C 0F AF 4D 0C 8B 55 E4 DD 04 CE DD 04 30 D9 C3 8D 04 3A 8D 14 02 D8 C2 D9 CC 8B 4D E4 01 D1 DE E2 D9 CA D8 C0 D9 C3 8B 75 14 0F AF F7 89 8D 34 FF FF FF D8 C1 8B 4D 10 DD 1C F1 D9 CA D8 C0 D9 C1 8B B5 34 FF FF FF 0F AF 75 14 0F AF 45 14 0F AF 55 14 D8 E1 D9 CC DE E3 DE C1 D9 CA DD 1C C1 FF 45 E8 DD 1C D1 DD 1C F1 8B 75 DC
-
-. 2259 8054372 12
-. 03 7D E0 39 75 E8 0F 82 5A FF FF FF
-
-. 2260 805BA0A 30
-. 8B 75 DC 46 89 F0 C7 45 EC 01 00 00 00 D1 E8 39 45 EC 89 B5 64 FF FF FF 0F 83 05 03 00 00
-***** EXPENSIVE 2262 625
-
-. 2261 805BA28 104
-. C7 85 54 FF FF FF 02 00 00 00 89 F6 8B 85 54 FF FF FF 8B 55 20 D9 44 82 F8 D9 44 82 FC 8B 55 24 D9 5D C8 D9 5D CC D9 44 82 FC D9 44 82 F8 D9 C9 8B 55 28 D9 5D C0 D9 44 82 FC D9 C9 D9 5D C4 D9 5D B8 D9 44 82 F8 C7 45 E8 00 00 00 00 8B 45 E0 80 75 CB 80 80 75 C3 80 80 75 BB 80 39 45 E8 D9 5D BC 0F 83 82 02 00 00
-***** EXPENSIVE 2263 626
-
-. 2262 805BA90 197
-. 8B 55 DC 8B 4D EC 8B 45 DC 8D 4C 09 FF D1 E2 2B 45 EC 89 95 78 FF FF FF 89 8D 5C FF FF FF 89 8D 58 FF FF FF 8D 7C 00 FF 8B 95 58 FF FF FF 03 55 E4 8B 75 E4 8D 0C 16 01 CE 8B 45 0C 89 B5 44 FF FF FF 0F AF 85 58 FF FF FF 8B 75 08 D9 04 86 8B 85 58 FF FF FF 8D 04 85 04 00 00 00 0F AF 45 0C D9 5D B4 D9 04 30 8B 45 0C 0F AF C2 D9 5D B0 D9 04 86 8B 45 0C 0F AF C1 D9 04 86 D9 C9 8B 45 0C 0F AF 85 44 FF FF FF 8D 14 95 04 00 00 00 8D 0C 8D 04 00 00 00 0F AF 55 0C 0F AF 4D 0C D9 5D AC D9 04 86 8B 85 44 FF FF FF D9 04 32 D9 04 31 D9 CA D9 5D A4 8D 34 85 04 00 00 00 D9 45 CC 0F AF 75 0C 8B 55 08
-***** EXPENSIVE 2264 627
-
-. 2263 805BB55 138
-. D8 4D AC D9 CB D9 5D A8 D9 04 16 D9 CB D9 5D A0 D9 45 C8 D8 C9 D8 6D A0 D9 5D A0 D9 45 C8 D8 4D AC D9 C9 D8 4D CC DE C1 D9 45 C4 D8 4D A8 D9 5D 9C D9 45 C0 D8 CA D8 6D 9C D9 5D 9C D9 45 C0 D8 4D A8 D9 CA D8 4D C4 D9 CA D9 5D A8 D9 C9 D8 45 A8 D9 5D 98 D9 45 BC D8 4D A4 D9 5D 94 D9 45 B8 D8 CA D8 6D 94 D9 5D 94 D9 45 BC DE CA D9 45 B8 D8 4D A4 DE C2 D9 45 B4 D8 45 9C D9 5D 90 D9 45 B0 D8 45 98 D9 5D 8C D9 45 A0
-***** EXPENSIVE 2265 628
-
-. 2264 805BBDF 151
-. D9 45 A0 D9 45 B4 D9 45 B0 D9 CB D8 65 94 D9 CA D8 45 94 D9 C9 D8 65 9C D9 CB D8 65 98 D9 C4 D9 CB D9 5D 88 D9 CA 8B 85 78 FF FF FF 8D 0C 38 D8 C5 D9 45 8C D9 CD DE E6 8B 45 14 D9 45 90 0F AF 85 5C FF FF FF D8 C2 D9 CD D8 C1 D9 CD 8B 75 10 D9 1C 86 D9 CC D9 5D 84 D9 CC 8B B5 5C FF FF FF D9 E0 D9 C2 80 75 8B 80 D8 E1 8D 04 B5 04 00 00 00 0F AF 45 14 8B 75 10 D9 5D 80 D9 45 84 D9 45 88 D9 C9 8B 95 5C FF FF FF D9 1C 30 03 95 78 FF FF FF D8 C2 8B 45 14
-***** EXPENSIVE 2266 629
-
-. 2265 805BC76 156
-. 0F AF C2 D9 9D 7C FF FF FF D9 45 80 D9 1C 86 D9 CC 8D 14 95 04 00 00 00 8B 45 14 0F AF 55 14 0F AF C1 D8 6D 90 D9 85 7C FF FF FF D9 CC D8 6D 8C D9 CC 8D 0C 8D 04 00 00 00 D9 1C 32 D9 C9 0F AF 4D 14 D8 65 88 D9 C9 D9 14 86 D9 5D 90 D9 CA D9 5D 8C 80 75 8F 80 8B 45 14 0F AF C7 DE C2 D9 45 8C D9 1C 31 D9 C9 D9 1C 86 8D 04 BD 04 00 00 00 0F AF 45 14 D9 E0 D9 1C 30 8B 55 DC 8B 45 18 FF 45 E8 8B 4D E0 01 85 5C FF FF FF 01 C7 01 95 58 FF FF FF 39 4D E8 0F 82 A6 FD FF FF
-
-. 2266 805BD12 27
-. 8B 85 64 FF FF FF FF 45 EC D1 E8 83 85 54 FF FF FF 02 39 45 EC 0F 82 07 FD FF FF
-
-. 2267 805BD2D 13
-. F7 45 DC 01 00 00 00 0F 85 2F 01 00 00
-
-. 2268 805BD3A 19
-. C7 45 E8 00 00 00 00 8B 75 E0 39 75 E8 0F 83 1C 01 00 00
-***** EXPENSIVE 2270 630
-
-. 2269 805BD4D 189
-. 8B 7D DC C7 85 60 FF FF FF 00 00 00 00 4F 90 8B 45 E4 8D 14 38 8D 0C 10 01 C8 8B 75 0C 89 85 44 FF FF FF 0F AF F7 8B 45 08 D9 04 B0 8B B5 44 FF FF FF 0F AF 75 0C D9 9D 74 FF FF FF 0F AF 55 0C D9 04 B0 0F AF 4D 0C D9 9D 6C FF FF FF D9 04 90 D9 04 88 DD 83 DC F8 FF FF D9 FA D9 85 6C FF FF FF D9 C9 DC BB 34 F6 FF FF D9 C9 D8 EB DE C9 D9 9D 68 FF FF FF DD 83 DC F8 FF FF D9 FA DC BB 34 F6 FF FF D9 CA D8 85 6C FF FF FF 8B 8D 60 FF FF FF DE CA D9 C9 8B 55 EC D9 5D F0 8D 44 51 FF 8B 75 DC 8B 55 14 D9 85 74 FF FF FF 8D 0C 70 0F AF D0 8B 75 10 D8 85 68 FF FF FF D9 45 F0
-***** EXPENSIVE 2271 631
-
-. 2270 805BE0A 95
-. D9 C9 D9 1C 96 D9 C1 8D 04 85 04 00 00 00 D9 E0 0F AF 45 14 D8 E1 D9 1C 30 8B 45 14 D9 85 74 FF FF FF 0F AF C1 D8 A5 68 FF FF FF D9 1C 86 8D 0C 8D 04 00 00 00 8B 45 18 FF 45 E8 8B 55 E0 0F AF 4D 14 DE E9 01 85 60 FF FF FF 03 7D DC 39 55 E8 D9 95 70 FF FF FF D9 1C 31 0F 82 F3 FE FF FF
-***** EXPENSIVE 2272 632
-
-. 2271 8056AC0 154
-. 8D 14 BD 00 00 00 00 8B 4D D8 8B 75 08 8D 44 11 FF 0F AF 55 0C D9 04 96 8B 55 0C 0F AF D0 8D 0C 01 8D 04 85 04 00 00 00 0F AF 45 0C D9 04 30 D9 04 96 D9 C9 0F AF 4D 0C 8B 55 E4 8D 04 3A D9 5D D4 D9 C1 D9 04 8E 8D 14 02 DC C1 8B 4D E4 01 D1 DE EB D9 C9 D8 C0 D9 C1 D9 45 D4 8B 75 14 0F AF F7 D8 C0 D9 C9 89 8D 34 FF FF FF D8 C2 8B 4D 10 D9 1C B1 D9 C0 8B B5 34 FF FF FF 0F AF 75 14 0F AF 45 14 D8 EC D9 CB 0F AF 55 14 DE E2 DE C3 D9 C9 D9 1C 81 FF 45 E8 D9 1C 91
-***** EXPENSIVE 2273 633
-
-. 2272 8056B5A 18
-. D9 1C B1 8B 75 DC 03 7D E0 39 75 E8 0F 82 54 FF FF FF
-***** EXPENSIVE 2274 634
-
-. 2273 8059064 159
-. 8B 45 E4 8D 14 38 01 D0 8B 4D 0C 89 85 7C FF FF FF 0F AF CF 8B 45 08 DD 04 C8 8D 04 FD 08 00 00 00 8B 4D 08 0F AF 45 0C DD 5D A8 DD 04 08 8B 45 0C 0F AF C2 8D 14 D5 08 00 00 00 DD 04 C1 0F AF 55 0C 8B 45 0C DD 04 0A 0F AF 85 7C FF FF FF 8B 95 7C FF FF FF DD 04 C1 D9 CB DD 5D A0 8D 0C D5 08 00 00 00 DD 45 C8 DD 45 C0 0F AF 4D 0C 8B 45 08 D8 CA D9 C9 D8 CB D9 CA DC 4D C8 D9 CB DC 4D C0 DD 04 01 D9 CB DE E2 DE C3 DD 45 B8 DD 45 B0 DD 45 B8 D9 C9 D8 CC D9 CA D8 CE D9 C9 DE CC
-***** EXPENSIVE 2275 635
-
-. 2274 8059103 132
-. D9 CD DC 4D B0 D9 CD DE E1 D9 CA DE C4 D9 C0 D9 C3 D9 C9 D8 C3 D9 C9 D8 C5 DD 83 BC F8 FF FF DD 83 BC F8 FF FF D9 C9 D8 CB D9 C9 D8 CA D9 CC DE E5 D9 CD DE E6 D9 C9 DC 45 A8 D9 CC DC 6D A8 D9 CA DC 6D A0 D9 CB DC 4D 98 D9 CD DC 4D 98 D9 CC DD 55 A8 8B 4D DC 8B 45 14 8D 14 4E 0F AF C6 8B 4D 10 DD 1C C1 8D 04 F5 08 00 00 00 0F AF 45 14 DC 45 A0 DD 14 08 D9 C1 8B 45 14 0F AF C2 D9 C3 D9 C9 D8 E5
-***** EXPENSIVE 2276 636
-
-. 2275 8059187 89
-. 8D 14 D5 08 00 00 00 DD 1C C1 0F AF 55 14 D8 C5 8B 45 14 DD 1C 0A D9 C9 0F AF 45 90 8B 55 90 DE C3 D9 CA DD 1C C1 DE E2 D9 C9 8D 04 D5 08 00 00 00 0F AF 45 14 D9 E0 DD 1C 08 FF 45 E8 8B 4D 18 8B 45 E0 01 CA 01 CE 03 7D DC 39 45 E8 DD 5D A0 89 55 90 0F 82 84 FE FF FF
-***** EXPENSIVE 2277 637
-
-. 2276 8053FB4 56
-. 8B 4D 8C 8B 75 20 DD 44 0E F0 8B 45 24 DD 5D C8 DD 44 0E F8 DD 5D C0 DD 44 08 F0 DD 5D B8 C7 45 E8 00 00 00 00 DD 44 08 F8 8B 45 D4 39 45 E8 DD 5D B0 0F 83 A7 01 00 00
-***** EXPENSIVE 2278 638
-vex iropt: not unrolling (108 sts)
-
-. 2277 80541DC 144
-. 8B 45 0C 0F AF C7 8B 4D 08 8B 75 D8 DD 04 C1 D1 E6 8D 04 FD 08 00 00 00 8D 14 3E 0F AF 45 0C D9 C1 DC 0C 08 0F AF 55 0C 8B 45 90 DD 04 D1 03 45 DC 8B 55 DC 01 C2 D9 C2 8B 4D 14 D8 C0 D9 CB 0F AF 4D 90 D8 E1 D9 CB DE C1 89 95 74 FF FF FF 8B 55 10 DD 1C CA D9 C1 8B 8D 74 FF FF FF D9 E0 D9 CA 0F AF 4D 14 0F AF 45 14 D8 E1 D9 CA DE E1 D9 C9 DD 1C C2 DD 1C CA 8B 4D D8 01 CE 01 F7 FF 45 E8 8B 75 D4 01 4D 90 39 75 E8 0F 82 70 FF FF FF
-***** EXPENSIVE 2279 639
-
-. 2278 805B6A4 149
-. 8B 4D E4 8D 14 39 01 D1 8B 45 0C 89 4D A0 0F AF C7 8B 4D 08 D9 04 81 8D 04 BD 04 00 00 00 0F AF 45 0C D9 04 08 8B 45 0C 0F AF C2 8D 14 95 04 00 00 00 D9 04 81 D9 C9 0F AF 55 0C 8B 45 0C D9 5D C0 0F AF 45 A0 D9 04 0A 8B 55 A0 D9 04 81 D9 CB D9 5D C4 8D 0C 95 04 00 00 00 D9 45 D4 D9 45 D0 0F AF 4D 0C 8B 45 08 D8 CA D9 C9 D8 CB D9 CA D8 4D D4 D9 CB D8 4D D0 D9 04 01 D9 CB DE E2 DE C3 D9 45 CC D9 45 C8 D9 45 CC D9 C9 D8 CC D9 CA D8 CE D9 C9 DE CC
-***** EXPENSIVE 2280 640
-
-. 2279 805B739 126
-. D9 CD D8 4D C8 D9 CD DE E1 D9 CA DE C4 D9 C0 D9 C3 D9 C9 D8 C3 D9 C9 D8 C5 D9 45 B4 D9 45 B4 D9 C9 D8 CB D9 C9 D8 CA D9 CC DE E5 D9 CD DE E6 D8 45 C0 D9 CC D8 6D C4 D9 CA D8 6D C0 D9 CB D8 4D BC D9 CD D8 4D BC D9 C9 D8 45 C4 D9 CC D9 55 C0 D9 CC 8B 4D DC 8B 45 14 8D 14 4E 0F AF C6 8B 4D 10 D9 1C 81 D9 CB 8D 04 B5 04 00 00 00 0F AF 45 14 D9 1C 08 D9 C0 8B 45 14 0F AF C2 D9 C2
-***** EXPENSIVE 2281 641
-
-. 2280 805B7B7 86
-. D9 C9 D8 E4 8D 14 95 04 00 00 00 D9 1C 81 0F AF 55 14 D8 C4 8B 45 14 D9 1C 0A 0F AF 45 B0 8B 55 B0 DE C2 D9 C9 D9 1C 81 DE E1 8D 04 95 04 00 00 00 0F AF 45 14 D9 E0 D9 1C 08 FF 45 E8 8B 4D 18 8B 45 E0 01 CA 01 CE 03 7D DC 39 45 E8 89 55 B0 0F 82 97 FE FF FF
-***** EXPENSIVE 2282 642
-
-. 2281 8056798 60
-. 8B 4D A4 8B 75 20 8B 45 24 D9 44 8E F8 D9 44 8E FC D9 C9 D9 5D D4 D9 5D D0 D9 44 88 F8 D9 44 88 FC D9 C9 C7 45 E8 00 00 00 00 8B 45 D8 39 45 E8 D9 5D CC D9 5D C8 0F 83 BA 01 00 00
-***** EXPENSIVE 2283 643
-vex iropt: not unrolling (114 sts)
-
-. 2282 80569D4 138
-. 8B 45 0C 0F AF C7 8B 4D 08 8B 75 DC D9 04 81 D1 E6 8D 04 BD 04 00 00 00 8D 14 3E 0F AF 45 0C D9 C1 D8 0C 08 0F AF 55 0C 8B 45 A8 D9 04 91 03 45 E0 8B 55 E0 01 C2 D9 C2 8B 4D 14 D8 C0 D9 CB 0F AF 4D A8 D8 E1 D9 CB DE C1 89 55 94 8B 55 10 D9 1C 8A D9 C1 8B 4D 94 D9 E0 D9 CA 0F AF 4D 14 0F AF 45 14 D8 E1 D9 CA DE E1 D9 C9 D9 1C 82 D9 1C 8A 8B 4D DC 01 CE 01 F7 FF 45 E8 8B 75 D8 01 4D A8 39 75 E8 0F 82 76 FF FF FF
-***** EXPENSIVE 2284 644
-
-. 2283 8059400 92
-. 8B 85 58 FF FF FF 8B 55 20 DD 44 02 F0 DD 44 02 F8 8B 55 24 DD 5D C8 DD 5D D0 DD 44 02 F8 DD 44 02 F0 D9 C9 8B 55 28 DD 5D B8 DD 44 02 F8 D9 C9 DD 5D C0 DD 5D A8 DD 44 02 F0 C7 45 E8 00 00 00 00 8B 45 E0 80 75 CF 80 80 75 BF 80 80 75 AF 80 39 45 E8 DD 5D B0 0F 83 77 02 00 00
-***** EXPENSIVE 2285 645
-
-. 2284 805BA34 92
-. 8B 85 54 FF FF FF 8B 55 20 D9 44 82 F8 D9 44 82 FC 8B 55 24 D9 5D C8 D9 5D CC D9 44 82 FC D9 44 82 F8 D9 C9 8B 55 28 D9 5D C0 D9 44 82 FC D9 C9 D9 5D C4 D9 5D B8 D9 44 82 F8 C7 45 E8 00 00 00 00 8B 45 E0 80 75 CB 80 80 75 C3 80 80 75 BB 80 39 45 E8 D9 5D BC 0F 83 82 02 00 00
-
-. 2285 805A331 19
-. C7 45 E0 00 00 00 00 8B 7D D8 39 7D E0 0F 83 29 02 00 00
-***** EXPENSIVE 2287 646
-
-. 2286 805A344 95
-. DD 83 34 F6 FF FF DD 83 44 F6 FF FF D9 C9 DD 9D 40 FF FF FF DD 9D 38 FF FF FF C7 85 24 FF FF FF 00 00 00 00 C7 85 20 FF FF FF 00 00 00 00 C7 85 1C FF FF FF 00 00 00 00 C7 45 D0 00 00 00 00 8B 45 18 DD 85 40 FF FF FF DD 85 38 FF FF FF D9 C9 39 45 D0 DD 5D A0 DD 5D 98 0F 83 A3 01 00 00
-***** EXPENSIVE 2288 647
-
-. 2287 805A3A3 46
-. 8B 95 1C FF FF FF C7 85 28 FF FF FF 00 00 00 00 89 55 84 89 F6 8B 45 D0 DD 85 38 FF FF FF 85 C0 DD 55 88 DD 55 90 DD 85 40 FF FF FF 74 30
-
-. 2288 805A401 11
-. 31 C9 3B 4D 18 0F 83 E4 04 00 00
-
-. 2289 805A40C 40
-. 8B 85 4C FF FF FF D1 E8 8B 75 E4 89 85 E4 FE FF FF 29 C6 8B 7D E4 8B 45 84 8D 54 78 FF 8D 76 00 85 C9 0F 85 A4 04 00 00
-***** EXPENSIVE 2291 648
-
-. 2290 805A434 68
-. DD 85 40 FF FF FF DD 85 38 FF FF FF 8B 45 0C 0F AF C2 8B 7D 08 DD 04 C7 8D 04 D5 08 00 00 00 0F AF 45 0C DD 04 38 D9 C3 D9 C3 D9 C9 D8 CB D9 C9 D8 CA D9 CD DE CA D9 CB DE CA D9 CA 85 C9 DE E3 DE C1 74 24
-***** EXPENSIVE 2292 649
-
-. 2291 805A49C 67
-. D9 C2 D9 C4 D9 C9 D8 CB D9 C9 D8 CA D9 CB D8 CD D9 CA D8 CC D9 C9 DE E3 DE C1 D9 C9 41 DC 45 90 D9 C9 DC 45 88 D9 C9 8B 85 E4 FE FF FF 03 55 DC 3B 4D 18 DD 5D 90 DD 5D 88 8D 74 06 FF 0F 82 4D FF FF FF
-
-. 2292 805A42C 8
-. 85 C9 0F 85 A4 04 00 00
-***** EXPENSIVE 2294 650
-
-. 2293 805A8D8 24
-. 89 F0 C1 E0 04 8B 7D 24 DD 44 07 08 DD 04 07 D9 C9 D9 E0 E9 50 FB FF FF
-***** EXPENSIVE 2295 651
-
-. 2294 805A440 56
-. 8B 45 0C 0F AF C2 8B 7D 08 DD 04 C7 8D 04 D5 08 00 00 00 0F AF 45 0C DD 04 38 D9 C3 D9 C3 D9 C9 D8 CB D9 C9 D8 CA D9 CD DE CA D9 CB DE CA D9 CA 85 C9 DE E3 DE C1 74 24
-***** EXPENSIVE 2296 652
-
-. 2295 805A478 103
-. DD 45 A0 D8 CB DD 45 98 DD 45 98 D9 C9 D8 CE D9 C9 DE CD D9 CD DC 4D A0 D9 C9 DE E5 DE C3 D9 CA D9 CB D9 CA D9 C2 D9 C4 D9 C9 D8 CB D9 C9 D8 CA D9 CB D8 CD D9 CA D8 CC D9 C9 DE E3 DE C1 D9 C9 41 DC 45 90 D9 C9 DC 45 88 D9 C9 8B 85 E4 FE FF FF 03 55 DC 3B 4D 18 DD 5D 90 DD 5D 88 8D 74 06 FF 0F 82 4D FF FF FF
-***** EXPENSIVE 2297 653
-
-. 2296 805A4DF 19
-. DD D8 DD D8 8B 45 18 2B 45 D0 39 45 D0 0F 83 AC 03 00 00
-***** EXPENSIVE 2298 654
-
-. 2297 805A4F2 84
-. 8B 85 20 FF FF FF 8B 55 E4 03 85 28 FF FF FF 8D 44 50 FF 8B 55 14 0F AF D0 8D 04 C5 08 00 00 00 DD 45 90 8B 4D 10 0F AF 45 14 DD 1C D1 DD 45 88 DD 1C 08 8B 95 28 FF FF FF 8B 45 D4 FF 45 D0 8B 4D 18 8D 14 42 39 4D D0 89 95 28 FF FF FF 0F 82 72 FE FF FF
-***** EXPENSIVE 2299 655
-
-. 2298 805A3B8 25
-. 8B 45 D0 DD 85 38 FF FF FF 85 C0 DD 55 88 DD 55 90 DD 85 40 FF FF FF 74 30
-***** EXPENSIVE 2300 656
-
-. 2299 805A3D1 59
-. DD 45 A0 DD 45 A0 DD 45 98 DD 45 98 D9 CB D9 E0 D9 CA DC 4D C8 D9 C9 DC 4D C0 D9 CA DC 4D C0 D9 CB DC 4D C8 D9 C9 DE C2 DE C2 DD 5D A0 DD 5D 98 31 C9 3B 4D 18 0F 83 E4 04 00 00
-***** EXPENSIVE 2301 657
-
-. 2300 805A89E 56
-. 8B 95 24 FF FF FF 0F AF 45 D4 8D 04 42 8B 55 E4 D1 E2 29 D0 48 8B 55 14 0F AF D0 DD 45 90 8B 4D 10 8D 04 C5 08 00 00 00 DD 1C D1 0F AF 45 14 80 75 8F 80 E9 49 FC FF FF
-***** EXPENSIVE 2302 658
-
-. 2301 805A51F 39
-. DD 45 88 DD 1C 08 8B 95 28 FF FF FF 8B 45 D4 FF 45 D0 8B 4D 18 8D 14 42 39 4D D0 89 95 28 FF FF FF 0F 82 72 FE FF FF
-
-. 2302 805A546 39
-. 8B 75 1C 8B 7D D4 FF 45 E0 8B 45 D8 01 B5 24 FF FF FF 01 B5 20 FF FF FF 01 BD 1C FF FF FF 39 45 E0 0F 82 0F FE FF FF
-
-. 2303 805A56D 20
-. 8B 85 4C FF FF FF FF 45 E4 D1 E8 39 45 E4 0F 82 B0 FD FF FF
-
-. 2304 805CB66 19
-. C7 45 DC 00 00 00 00 8B 7D D4 39 7D DC 0F 83 19 02 00 00
-***** EXPENSIVE 2306 659
-
-. 2305 805CB79 89
-. D9 83 4C F6 FF FF D9 83 50 F6 FF FF D9 C9 D9 5D 80 D9 9D 7C FF FF FF C7 85 64 FF FF FF 00 00 00 00 C7 85 60 FF FF FF 00 00 00 00 C7 85 5C FF FF FF 00 00 00 00 C7 45 CC 00 00 00 00 8B 45 18 D9 45 80 D9 85 7C FF FF FF D9 C9 39 45 CC D9 5D B0 D9 5D AC 0F 83 99 01 00 00
-***** EXPENSIVE 2307 660
-
-. 2306 805CBD2 44
-. 8B 95 5C FF FF FF C7 85 68 FF FF FF 00 00 00 00 89 55 A0 8D 76 00 8B 45 CC D9 85 7C FF FF FF 85 C0 D9 55 A4 D9 55 A8 D9 45 80 74 30
-
-. 2307 805CC2E 11
-. 31 F6 3B 75 18 0F 83 72 04 00 00
-
-. 2308 805CC39 35
-. 8B 45 84 D1 E8 8B 4D E0 89 85 24 FF FF FF 29 C1 8B 7D E0 8B 45 A0 8D 54 78 FF 90 85 F6 0F 85 3C 04 00 00
-***** EXPENSIVE 2310 661
-
-. 2309 805CC5C 65
-. D9 45 80 D9 85 7C FF FF FF 8B 45 0C 0F AF C2 8B 7D 08 D9 04 87 8D 04 95 04 00 00 00 0F AF 45 0C D9 04 38 D9 C3 D9 C3 D9 C9 D8 CB D9 C9 D8 CA D9 CD DE CA D9 CB DE CA D9 CA 85 F6 DE E3 DE C1 74 24
-***** EXPENSIVE 2311 662
-
-. 2310 805CCC1 67
-. D9 C2 D9 C4 D9 C9 D8 CB D9 C9 D8 CA D9 CB D8 CD D9 CA D8 CC D9 C9 DE E3 DE C1 D9 C9 46 D8 45 A8 D9 C9 D8 45 A4 D9 C9 8B 85 24 FF FF FF 03 55 D8 3B 75 18 D9 5D A8 D9 5D A4 8D 4C 01 FF 0F 82 50 FF FF FF
-
-. 2311 805CC54 8
-. 85 F6 0F 85 3C 04 00 00
-***** EXPENSIVE 2313 663
-
-. 2312 805D098 19
-. 8B 7D 24 D9 44 CF 04 D9 04 CF D9 C9 D9 E0 E9 BA FB FF FF
-***** EXPENSIVE 2314 664
-
-. 2313 805CC65 56
-. 8B 45 0C 0F AF C2 8B 7D 08 D9 04 87 8D 04 95 04 00 00 00 0F AF 45 0C D9 04 38 D9 C3 D9 C3 D9 C9 D8 CB D9 C9 D8 CA D9 CD DE CA D9 CB DE CA D9 CA 85 F6 DE E3 DE C1 74 24
-***** EXPENSIVE 2315 665
-
-. 2314 805CC9D 103
-. D9 45 B0 D8 CB D9 45 AC D9 45 AC D9 C9 D8 CE D9 C9 DE CD D9 CD D8 4D B0 D9 C9 DE E5 DE C3 D9 CA D9 CB D9 CA D9 C2 D9 C4 D9 C9 D8 CB D9 C9 D8 CA D9 CB D8 CD D9 CA D8 CC D9 C9 DE E3 DE C1 D9 C9 46 D8 45 A8 D9 C9 D8 45 A4 D9 C9 8B 85 24 FF FF FF 03 55 D8 3B 75 18 D9 5D A8 D9 5D A4 8D 4C 01 FF 0F 82 50 FF FF FF
-***** EXPENSIVE 2316 666
-
-. 2315 805CD04 19
-. DD D8 DD D8 8B 45 18 2B 45 CC 39 45 CC 0F 83 49 03 00 00
-***** EXPENSIVE 2317 667
-
-. 2316 805CD17 84
-. 8B 85 60 FF FF FF 8B 55 E0 03 85 68 FF FF FF 8D 44 50 FF 8B 55 14 0F AF D0 8D 04 85 04 00 00 00 D9 45 A8 8B 4D 10 0F AF 45 14 D9 1C 91 D9 45 A4 D9 1C 08 8B 95 68 FF FF FF 8B 45 D0 FF 45 CC 8B 4D 18 8D 14 42 39 4D CC 89 95 68 FF FF FF 0F 82 7D FE FF FF
-***** EXPENSIVE 2318 668
-
-. 2317 805CBE8 22
-. 8B 45 CC D9 85 7C FF FF FF 85 C0 D9 55 A4 D9 55 A8 D9 45 80 74 30
-***** EXPENSIVE 2319 669
-
-. 2318 805CBFE 59
-. D9 45 B0 D9 45 B0 D9 45 AC D9 45 AC D9 CB D9 E0 D9 CA D8 4D C8 D9 C9 D8 4D C4 D9 CA D8 4D C4 D9 CB D8 4D C8 D9 C9 DE C2 DE C2 D9 5D B0 D9 5D AC 31 F6 3B 75 18 0F 83 72 04 00 00
-***** EXPENSIVE 2320 670
-
-. 2319 805D060 56
-. 8B 95 64 FF FF FF 0F AF 45 D0 8D 04 42 8B 55 E0 D1 E2 29 D0 48 8B 55 14 0F AF D0 D9 45 A8 8B 4D 10 8D 04 85 04 00 00 00 D9 1C 91 0F AF 45 14 80 75 A7 80 E9 AC FC FF FF
-***** EXPENSIVE 2321 671
-
-. 2320 805CD44 39
-. D9 45 A4 D9 1C 08 8B 95 68 FF FF FF 8B 45 D0 FF 45 CC 8B 4D 18 8D 14 42 39 4D CC 89 95 68 FF FF FF 0F 82 7D FE FF FF
-
-. 2321 805CD6B 39
-. 8B 75 1C 8B 7D D0 FF 45 DC 8B 45 D4 01 B5 64 FF FF FF 01 B5 60 FF FF FF 01 BD 5C FF FF FF 39 45 DC 0F 82 1C FE FF FF
-
-. 2322 805CD92 17
-. 8B 45 84 FF 45 E0 D1 E8 39 45 E0 0F 82 C3 FD FF FF
-
-. 2323 804D708 11
-. 8B 4D E8 85 C9 0F 85 F1 00 00 00
-
-. 2324 804D804 6
-. 83 7D 18 FF 74 12
-***** EXPENSIVE 2326 672
-
-. 2325 804D81C 14
-. 8B 7D D4 DD 47 F0 DD 47 F8 E9 F5 FE FF FF
-
-. 2326 804D71F 11
-. 31 F6 3B 75 CC 0F 83 D4 00 00 00
-***** EXPENSIVE 2328 673
-vex iropt: 2 x unrolling (44 sts -> 88 sts)
-
-. 2327 804F6AD 38
-. 8B 45 08 DD 04 30 8B 55 10 DD 1C 0A DD 44 30 08 47 DD 5C 0A 08 03 B5 64 FF FF FF 03 8D 60 FF FF FF 3B 7D E0 72 DA
-***** EXPENSIVE 2329 674
-vex iropt: not unrolling (80 sts)
-
-. 2328 804F710 115
-. 8B 85 68 FF FF FF 8B 4D C0 01 F9 8D 14 38 8B 45 0C 0F AF C1 8B 75 14 0F AF F2 C1 E0 04 89 8D 54 FF FF FF 0F AF 55 0C 8B 4D 08 DD 04 01 C1 E2 04 DC 04 11 C1 E6 04 8B 4D 10 DD 1C 31 03 45 08 03 55 08 DD 40 08 DC 42 08 DD 5C 31 08 8B 8D 54 FF FF FF DD 00 0F AF 4D 14 C1 E1 04 DC 2A 8B 75 10 DD 1C 0E DD 40 08 47 DC 6A 08 3B 7D E0 DD 5C 0E 08 72 8D
-***** EXPENSIVE 2330 675
-vex iropt: 2 x unrolling (44 sts -> 88 sts)
-
-. 2329 804F7BE 38
-. 8B 55 10 DD 04 32 8B 45 08 DD 1C 08 DD 44 32 08 47 DD 5C 08 08 03 B5 70 FF FF FF 03 8D 6C FF FF FF 3B 7D E0 72 DA
-***** EXPENSIVE 2331 676
-vex iropt: 2 x unrolling (53 sts -> 106 sts)
-
-. 2330 804F820 55
-. 8D 04 3E 0F AF 45 14 C1 E0 04 8B 4D 10 DD 04 01 8B 4D 08 DC 04 11 DD 1C 11 8B 4D 10 DD 44 01 08 8B 45 08 DC 44 10 08 47 DD 5C 10 08 03 95 54 FF FF FF 3B 7D E0 72 C9
-***** EXPENSIVE 2332 677
-vex iropt: not unrolling (63 sts)
-
-. 2331 804F8BC 81
-. 8B 85 78 FF FF FF 8D 0C 38 8B 55 10 0F AF 4D 0C DD 04 32 C1 E1 04 8B 45 08 DD 1C 08 DD 44 32 08 8B 55 B0 DD 5C 08 08 8D 0C 3A 0F AF 4D 0C 8B 45 10 DD 04 30 C1 E1 04 8B 55 08 DD 1C 0A 47 DD 44 30 08 03 B5 7C FF FF FF 3B 7D E0 DD 5C 0A 08 72 AF
-***** EXPENSIVE 2333 678
-vex iropt: not unrolling (114 sts)
-
-. 2332 804F964 143
-. 8D 14 3E 8B 8D 54 FF FF FF 8D 04 39 0F AF 55 14 8B 4D 10 C1 E2 04 0F AF 45 14 D9 C1 DC 0C 11 C1 E0 04 D9 C1 DC 4C 01 08 D9 C1 D9 C4 DC 4C 11 08 D9 C9 D8 E2 D9 CB DE C2 8B 95 78 FF FF FF D9 C3 DC 0C 01 D9 CB 8D 04 3A 0F AF 45 0C 8B 4D 08 C1 E0 04 DC 04 01 D9 C1 D9 C9 DD 1C 01 D8 C3 01 C8 DC 40 08 8B 55 B0 DD 58 08 D9 C9 8D 04 3A 0F AF 45 0C C1 E0 04 DC 04 01 DD 1C 01 DE E1 01 C8 47 DC 40 08 3B 7D E0 DD 58 08 0F 82 71 FF FF FF
-vex iropt: 2 x unrolling (58 sts -> 116 sts)
-
-. 2333 804FA64 62
-. 8B 7D 08 8B 04 37 8B 54 37 04 8B 7D 10 89 04 0F 89 54 0F 04 8B 7D 08 8B 44 37 08 8B 54 37 0C 8B 7D 10 89 44 0F 08 FF 45 E4 8B 45 D8 89 54 0F 0C 03 75 88 03 8D 4C FF FF FF 39 45 E4 72 C2
-vex iropt: not unrolling (68 sts)
-
-. 2334 804FAE0 82
-. 8B 4D E4 8B 75 E4 03 8D 4C FF FF FF 03 75 A8 0F AF 4D 0C C1 E1 04 8B 7D 08 0F AF 75 14 8B 04 0F 8B 54 0F 04 C1 E6 04 8B 7D 10 89 04 37 89 54 37 04 8B 7D 08 8B 44 0F 08 8B 54 0F 0C 8B 4D 10 89 44 31 08 89 54 31 0C FF 45 E4 8B 75 D8 39 75 E4 72 AE
-***** EXPENSIVE 2336 679
-
-. 2335 804D80A 18
-. 8B 45 D4 DD 40 F8 DD 40 F0 D9 C9 D9 E0 E9 03 FF FF FF
-
-. 2336 8050BA0 11
-. 8B 45 E8 85 C0 0F 85 CD 00 00 00
-
-. 2337 8050C78 6
-. 83 7D 18 FF 74 12
-***** EXPENSIVE 2339 680
-
-. 2338 8050C90 14
-. 8B 7D DC D9 47 F8 D9 47 FC E9 19 FF FF FF
-
-. 2339 8050BB7 11
-. 31 F6 3B 75 D8 0F 83 B0 00 00 00
-vex iropt: 2 x unrolling (46 sts -> 92 sts)
-
-. 2340 8052A7E 38
-. 8B 75 08 8B 04 CE 8B 75 10 89 04 D6 8B 75 08 8B 44 CE 04 47 8B 75 10 89 44 D6 04 03 4D 0C 03 55 14 3B 7D E4 72 DA
-***** EXPENSIVE 2342 681
-vex iropt: not unrolling (104 sts)
-
-. 2341 8052AE4 110
-. 8B 55 C0 01 FA 89 55 80 8B 75 C4 8B 55 0C 0F AF 55 80 8D 04 3E 8B 4D 08 8B 75 14 D9 04 D1 0F AF F0 0F AF 45 0C D8 04 C1 8B 4D 10 D9 1C F1 8B 4D 08 D9 44 D1 04 D8 44 C1 04 8B 4D 10 D9 5C F1 04 8B 75 08 D9 04 D6 8B 4D 80 D8 2C C6 0F AF 4D 14 8B 75 10 D9 1C CE 8B 75 08 D9 44 D6 04 47 D8 6C C6 04 3B 7D E4 8B 45 10 D9 5C C8 04 72 92
-vex iropt: 2 x unrolling (46 sts -> 92 sts)
-
-. 2342 8052B72 38
-. 8B 75 10 8B 04 CE 8B 75 08 89 04 D6 8B 75 10 8B 44 CE 04 47 8B 75 08 89 44 D6 04 03 4D 14 03 55 0C 3B 7D E4 72 DA
-***** EXPENSIVE 2344 682
-vex iropt: 2 x unrolling (60 sts -> 120 sts)
-
-. 2343 8052BC8 49
-. 8D 04 39 0F AF 45 14 8B 75 10 D9 04 C6 8B 75 08 D8 04 D6 D9 1C D6 8B 75 10 D9 44 C6 04 8B 45 08 D8 44 D0 04 47 D9 5C D0 04 03 55 0C 3B 7D E4 72 CF
-vex iropt: not unrolling (76 sts)
-
-. 2344 8052C54 81
-. 8B 75 88 8D 04 3E 8B 75 10 8B 14 CE 0F AF 45 0C 8B 75 08 89 14 C6 8B 75 10 8B 54 CE 04 8B 75 08 89 54 C6 04 8B 55 AC 8D 04 3A 8B 75 10 8B 14 CE 0F AF 45 0C 8B 75 08 89 14 C6 47 8B 75 10 8B 54 CE 04 8B 75 08 03 4D 14 3B 7D E4 89 54 C6 04 72 AF
-***** EXPENSIVE 2346 683
-vex iropt: not unrolling (124 sts)
-
-. 2345 8052D00 127
-. 8D 14 3E 8B 4D 80 0F AF 55 14 8D 04 39 D9 C1 8B 4D 10 D8 0C D1 0F AF 45 14 D9 C1 D8 4C C1 04 D9 C1 D9 C4 D8 4C D1 04 D9 C9 D8 E2 D9 CB DE C2 8B 55 88 D9 C3 D8 0C C1 D9 C1 8D 04 3A 8B 4D 08 0F AF 45 0C D8 C1 D9 CC D8 04 C1 D9 CC D8 44 C1 04 D9 CC 8B 55 AC D9 1C C1 D9 CB D9 5C C1 04 8D 04 3A 0F AF 45 0C DE E2 47 D8 04 C1 D9 C9 D8 44 C1 04 D9 C9 3B 7D E4 D9 1C C1 D9 5C C1 04 72 81
-vex iropt: 2 x unrolling (49 sts -> 98 sts)
-
-. 2346 8052DD5 43
-. 8B 75 08 8B 04 CE 8B 75 10 89 04 D6 8B 75 08 8B 44 CE 04 8B 75 10 89 44 D6 04 FF 45 E8 8B 45 DC 03 4D 0C 03 55 14 39 45 E8 72 D5
-vex iropt: 2 x unrolling (54 sts -> 108 sts)
-
-. 2347 8052E38 56
-. 8B 45 E8 8B 4D E8 03 85 78 FF FF FF 0F AF 45 0C 01 F9 8B 75 08 8B 14 C6 0F AF 4D 14 8B 75 10 89 14 CE 8B 55 08 8B 44 C2 04 89 44 CE 04 FF 45 E8 8B 4D DC 39 4D E8 72 C8
-***** EXPENSIVE 2349 684
-
-. 2348 8050C7E 18
-. 8B 45 DC D9 40 FC D9 40 F8 D9 C9 D9 E0 E9 27 FF FF FF
-***** EXPENSIVE 2350 685
-vex iropt: not unrolling (111 sts)
-
-. 2349 8059220 127
-. 8B 4D E4 8D 04 39 01 C1 8B 55 0C 0F AF D7 0F AF 45 0C 89 8D 7C FF FF FF 8B 4D 08 DD 04 D1 DD 04 C1 8B 8D 7C FF FF FF 0F AF 4D 0C 8B 45 08 DD 04 C8 D9 C1 D8 E1 DD 83 BC F8 FF FF 8B 4D DC D8 C9 8B 45 14 0F AF C6 8D 14 4E D8 C4 8B 4D 10 DD 1C C1 D9 CA DE C1 8D 04 F5 08 00 00 00 0F AF 45 14 D8 CB DD 1C 08 FF 45 E8 8B 45 E0 0F AF 55 14 DE E9 03 75 18 03 7D DC 39 45 E8 DD 1C D1 72 81
-***** EXPENSIVE 2351 686
-
-. 2350 80543B8 82
-. 8B 95 54 FF FF FF 8B 4D 20 8B 45 24 DD 44 11 F0 DD 44 11 F8 D9 C9 DD 5D D0 DD 5D C8 DD 44 10 F0 DD 44 10 F8 D9 C9 8B 45 28 DD 5D C0 DD 5D B8 DD 44 10 F0 DD 44 10 F8 D9 C9 C7 45 E8 00 00 00 00 8B 45 DC 39 45 E8 DD 5D B0 DD 5D A8 0F 83 57 02 00 00
-***** EXPENSIVE 2352 687
-vex iropt: not unrolling (117 sts)
-
-. 2351 805B850 121
-. 8B 4D E4 8D 04 39 01 C1 8B 55 0C 0F AF D7 0F AF 45 0C 89 4D A0 8B 4D 08 D9 04 91 D9 04 81 8B 4D A0 0F AF 4D 0C 8B 45 08 D9 04 88 D9 C1 D8 E1 DD 83 BC F8 FF FF 8B 4D DC D8 C9 8B 45 14 0F AF C6 8D 14 4E D8 C4 8B 4D 10 D9 1C 81 D9 CA DE C1 8D 04 B5 04 00 00 00 0F AF 45 14 D8 CB D9 1C 08 FF 45 E8 8B 45 E0 0F AF 55 14 DE E9 03 75 18 03 7D DC 39 45 E8 D9 1C 91 72 87
-***** EXPENSIVE 2353 688
-
-. 2352 8056BA8 82
-. 8B 95 44 FF FF FF 8B 4D 20 8B 45 24 D9 44 91 F8 D9 44 91 FC D9 C9 D9 5D D0 D9 5D CC D9 44 90 F8 D9 44 90 FC D9 C9 8B 45 28 D9 5D C8 D9 5D C4 D9 44 90 F8 D9 44 90 FC D9 C9 C7 45 E8 00 00 00 00 8B 45 DC 39 45 E8 D9 5D C0 D9 5D BC 0F 83 74 02 00 00
-***** EXPENSIVE 2354 689
-
-. 2353 804DFCC 190
-. 8B 85 B4 FE FF FF DD 04 06 DD 44 06 08 8B 45 EC 03 45 DC 0F AF 45 0C C1 E0 04 DD 04 06 DD 44 06 08 8B 45 EC 03 85 44 FF FF FF 0F AF 45 0C C1 E0 04 DD 44 06 08 D9 C9 DD 9D 48 FF FF FF DD 04 06 8B 45 EC 03 85 40 FF FF FF 0F AF 45 0C C1 E0 04 DD 04 06 DD 44 06 08 8B 4D EC 8B 45 DC 8D 04 81 DD 9D 38 FF FF FF D9 CC 89 85 D0 FE FF FF 0F AF 45 0C DD 9D 58 FF FF FF C1 E0 04 DD 85 38 FF FF FF D9 CB DD 95 50 FF FF FF D9 CD DD 9D 60 FF FF FF D9 CA D8 C1 DD 04 06 DC C5 D9 C9 DD 9D 30 FF FF FF DD 85 50 FF FF FF DD 44 06 08 D9 CE DD 9D C0 FE FF FF DE E1 DD 85 48 FF FF FF D9 C3
-***** EXPENSIVE 2355 690
-
-. 2354 804E08A 184
-. D9 CA DD 9D 28 FF FF FF D8 C5 D9 C9 D8 C4 DD 85 C0 FE FF FF DD 85 30 FF FF FF D9 C9 D8 C2 D9 CF DC AD 48 FF FF FF D9 C9 D8 C3 D9 CF DD 9D 18 FF FF FF DD 9D 20 FF FF FF D9 CB DE E4 D9 C9 DC A5 38 FF FF FF D9 CC DD 9D 10 FF FF FF DD 85 E0 FE FF FF D9 FA DC 8D F0 FE FF FF D9 CA DC AD C0 FE FF FF DE CA DD 85 E0 FE FF FF D9 FA D9 C9 DC A5 30 FF FF FF D9 C9 DC 8D F0 FE FF FF DE C9 DD 85 18 FF FF FF DC 8D F0 FE FF FF DC AD 60 FF FF FF DD 85 10 FF FF FF DC 8D F0 FE FF FF D9 C1 D9 C9 DC AD 58 FF FF FF D9 C9 D8 C4 DD 9D 08 FF FF FF D9 C0 D8 C3 D9 C9 DE E3
-***** EXPENSIVE 2356 691
-
-. 2355 804E142 168
-. DD 45 C8 DD 45 C0 D8 CE D9 C9 DC 8D 28 FF FF FF D9 CA DD 9D 00 FF FF FF DE C1 DD 45 C8 DD 45 C0 D8 CF D9 C9 DC 8D 20 FF FF FF D9 CB DE E5 DE C2 DD 45 C0 D9 CC DD 9D B8 FE FF FF D9 CD DC 4D C8 DD 85 60 FF FF FF DD 45 C0 D9 CD DC 8D 20 FF FF FF D9 CE DC 4D C8 D9 C9 DC 85 18 FF FF FF D9 CD DC 8D 28 FF FF FF D9 CE DE E2 D9 C9 DC 8D E8 FE FF FF D9 CD DE E1 D9 CB DD 9D 60 FF FF FF DD 85 58 FF FF FF DD 85 B8 FE FF FF D9 C9 DC 85 10 FF FF FF D9 C9 D8 E5 D9 CC DC 8D E8 FE FF FF D9 CE DC 8D E8 FE FF FF D9 CA
-***** EXPENSIVE 2357 692
-
-. 2356 804E1EA 164
-. DC 8D E8 FE FF FF D9 C9 DD 9D 58 FF FF FF DD 85 08 FF FF FF DD 85 00 FF FF FF D9 CD DD 9D 78 FF FF FF D9 C3 D8 C7 DD 9D 70 FF FF FF DD 85 B8 FE FF FF DE C6 D9 CB DE E6 DD 85 60 FF FF FF DD 85 58 FF FF FF D9 C9 8B 45 E8 DD 1C 17 DD 5C 17 08 DC EA D9 CB 03 45 D4 D8 C1 DD 45 B8 DD 45 B0 0F AF 45 14 D8 CA D9 C9 D8 CC D9 CA DC 4D B8 D9 CC DC 4D B0 D9 CA C1 E0 04 DE E1 D9 CB DE C1 D9 CA DD 1C 07 D9 C9 DD 5C 07 08 8B 45 E8 03 85 FC FE FF FF DD 45 A8 DD 45 A0 0F AF 45 14 DC 8D 70 FF FF FF D9 C9
-***** EXPENSIVE 2358 693
-
-. 2357 804E28E 162
-. DC 8D 78 FF FF FF C1 E0 04 DE E1 DD 1C 07 DD 45 A8 DD 45 A0 DC 8D 78 FF FF FF D9 C9 DC 8D 70 FF FF FF DE C1 DD 5C 07 08 8B 45 E8 03 85 F8 FE FF FF DD 45 98 DD 45 90 0F AF 45 14 D8 CD D9 C9 D8 CC D9 CB C1 E0 04 DC 85 08 FF FF FF D9 CB DE E1 D9 CA DD 9D 68 FF FF FF DD 85 00 FF FF FF D9 CA DD 1C 07 D9 CB DC 4D 98 D9 CA DC 4D 90 DE C2 D9 C9 8B 4D E8 DD 5C 07 08 8B 45 D4 8D 04 81 DE E1 DD 45 88 DD 45 80 D8 CA D9 C9 89 85 D0 FE FF FF DC 8D 68 FF FF FF 0F AF 45 14 C1 E0 04 DE E1 DD 1C 07
-***** EXPENSIVE 2359 694
-
-. 2358 804E330 73
-. DD 45 80 D9 C9 DC 4D 88 D9 C9 DC 8D 68 FF FF FF DE C1 DD 5C 07 08 8B 45 0C C1 E0 04 01 85 B4 FE FF FF 8B 45 0C 41 01 85 D8 FE FF FF 8B 45 14 C1 E0 04 89 4D E8 FF 45 E0 8B 4D D4 FF 45 EC 01 C2 39 4D E0 0F 82 53 FC FF FF
-***** EXPENSIVE 2360 695
-
-. 2359 805138C 177
-. 8B 45 E8 03 45 D8 0F AF 45 0C D9 04 C6 D9 44 C6 04 D9 C9 8B 45 E8 03 85 7C FF FF FF 0F AF 45 0C D9 5D 84 D9 04 C6 D9 44 C6 04 8B 45 E8 8B 95 0C FF FF FF 03 85 74 FF FF FF D9 04 D6 D9 44 D6 04 D9 C9 0F AF 45 0C D9 5D 8C D9 5D 88 D9 04 C6 D9 44 C6 04 D9 C9 8B 55 E8 8B 45 D8 8D 04 82 89 85 10 FF FF FF 0F AF 45 0C D9 9D 78 FF FF FF D9 9D 70 FF FF FF D9 04 C6 D9 44 C6 04 D9 45 84 D9 CD D9 55 80 D9 CD D8 C2 D9 CD D8 C1 D9 CA D8 6D 84 D9 CA D9 9D 6C FF FF FF D9 85 70 FF FF FF D9 85 78 FF FF FF D9 CB D9 9D 68 FF FF FF D9 C9 D8 6D 80
-***** EXPENSIVE 2361 696
-
-. 2360 805143D 181
-. D9 CA D8 C4 D9 C9 D8 C3 D9 CA D9 9D 64 FF FF FF D9 C4 D9 85 6C FF FF FF D9 C9 D8 C2 D9 CD D8 A5 78 FF FF FF D9 CC D8 A5 70 FF FF FF D9 C9 D8 C3 D9 CD D9 9D 58 FF FF FF D9 CB D9 95 60 FF FF FF D9 CB D9 9D 5C FF FF FF D9 CB D9 9D 54 FF FF FF DD 85 28 FF FF FF D9 FA DC 8D 20 FF FF FF D9 CC DE E3 D9 CB DE CA D9 C9 D9 5D EC D9 45 EC DD 85 28 FF FF FF D9 FA D9 CB D8 AD 6C FF FF FF D9 CB DC 8D 20 FF FF FF D8 CB D9 5D EC DD 85 20 FF FF FF D8 8D 58 FF FF FF D8 6D 8C D9 9D 50 FF FF FF DD 85 20 FF FF FF D8 8D 54 FF FF FF D8 6D 88 D9 9D 4C FF FF FF
-***** EXPENSIVE 2362 697
-
-. 2361 80514F2 181
-. D9 45 C8 D8 8D 68 FF FF FF D9 9D 38 FF FF FF D9 85 50 FF FF FF D9 45 C4 D9 45 EC D9 CA D8 C3 D9 85 4C FF FF FF D9 CC D8 AD 50 FF FF FF D9 CA D8 CD D8 85 38 FF FF FF D9 CC D8 C3 D9 CA D9 9D 40 FF FF FF D9 85 1C FF FF FF D9 CB D8 AD 4C FF FF FF D9 CB DE CC D9 C9 D9 9D 44 FF FF FF D9 45 C4 D9 45 C8 D9 C9 D8 8D 5C FF FF FF D9 CA D9 9D 48 FF FF FF D9 CA D9 9D 3C FF FF FF D9 C9 D8 8D 64 FF FF FF D9 45 C4 D9 45 C8 D9 CC D9 9D 38 FF FF FF D9 C9 DE C2 D8 8D 68 FF FF FF D9 CA DE CB D9 45 C4 D9 45 C8 D8 8D 5C FF FF FF D9 CB DE E4 D8 8D 64 FF FF FF
-***** EXPENSIVE 2363 698
-
-. 2362 80515A7 169
-. D9 45 8C D9 C9 DE E3 D8 85 58 FF FF FF D9 C9 D8 8D 1C FF FF FF D9 CB D8 8D 1C FF FF FF D9 CA D8 8D 1C FF FF FF D9 CC D9 9D 6C FF FF FF D9 5D 8C D9 85 48 FF FF FF D8 E2 D9 5D A0 D9 45 88 D9 85 40 FF FF FF D9 C9 D8 85 54 FF FF FF D9 C9 D8 E4 D9 85 3C FF FF FF D9 CD D8 85 40 FF FF FF D9 CA D9 5D 88 D9 CC D8 C2 D9 85 44 FF FF FF D9 CB D8 AD 3C FF FF FF D9 CA D9 5D 98 D9 45 8C D9 1C CF D9 CA D8 85 38 FF FF FF D9 C9 D9 5D 94 8B 45 E4 D9 45 C0 D9 45 BC 03 45 D0 D8 CA D9 C9 D8 4D A0 D9 CD 0F AF 45 14 D9 5D 9C
-***** EXPENSIVE 2364 699
-
-. 2363 8051650 152
-. DE EC D9 45 88 D9 5C CF 04 D9 CB D9 1C C7 D9 45 BC D8 4D A0 D9 CB D8 4D C0 DE C3 D9 CA D9 5C C7 04 D9 45 B8 8B 45 E4 D9 45 B4 D9 CA D8 85 48 FF FF FF D9 CA 03 85 34 FF FF FF D8 CB D9 C9 D8 4D 9C 0F AF 45 14 DE E1 D9 C9 D9 5D 90 D9 85 44 FF FF FF D8 A5 38 FF FF FF D9 C9 D9 1C C7 D9 45 B4 D9 CA D8 4D B8 D9 CA D8 4D 9C DE C2 D9 C9 D9 5C C7 04 D9 45 B0 8B 45 E4 D9 45 AC 03 85 30 FF FF FF D8 4D 94 D9 C9 D8 4D 98 0F AF 45 14 DE E1 D9 1C C7 D9 45 B0 D9 45 AC
-***** EXPENSIVE 2365 700
-
-. 2364 80516E8 106
-. D8 4D 98 D9 C9 D8 4D 94 DE C1 D9 5C C7 04 8B 55 E4 8B 45 D0 D9 45 A8 D9 45 A4 D9 C9 8D 04 82 D8 4D 90 D9 C9 D8 CA 89 85 10 FF FF FF DE E9 0F AF 45 14 D9 1C C7 D9 45 A4 D9 C9 D8 4D A8 D9 C9 D8 4D 90 DE C1 42 D9 5C C7 04 8B 45 0C 01 85 0C FF FF FF FF 45 E8 03 4D 14 89 55 E4 FF 45 DC 8B 55 D0 39 55 DC 0F 82 3A FC FF FF
-
-. 2365 80599FA 30
-. 8B 4D DC 41 89 C8 C7 45 EC 01 00 00 00 D1 E8 39 45 EC 89 8D F0 FE FF FF 0F 83 2E 05 00 00
-***** EXPENSIVE 2367 701
-
-. 2366 8059A18 127
-. C7 85 C8 FE FF FF 10 00 00 00 89 F6 8B B5 C8 FE FF FF 8B 7D 20 8B 45 24 DD 44 37 F0 DD 44 37 F8 DD 5D B0 DD 5D B8 DD 44 30 F8 DD 44 30 F0 D9 C9 8B 45 28 DD 5D A0 DD 5D A8 DD 44 30 F8 DD 44 30 F0 D9 C9 8B 45 2C DD 5D 90 DD 44 30 F8 D9 C9 DD 5D 98 DD 5D 80 DD 44 30 F0 C7 45 E8 00 00 00 00 8B 45 E0 80 75 B7 80 80 75 A7 80 80 75 97 80 80 75 87 80 39 45 E8 DD 5D 88 0F 83 94 04 00 00
-***** EXPENSIVE 2368 702
-
-. 2367 8059A97 219
-. 8B 45 DC 8B 55 EC 8D 54 12 FF DD 83 C4 F8 FF FF DD 83 CC F8 FF FF D9 C9 D1 E0 DD 9D E8 FE FF FF DD 9D E0 FE FF FF 89 85 F4 FE FF FF 89 95 D4 FE FF FF C7 85 D0 FE FF FF 00 00 00 00 89 95 CC FE FF FF 8D 76 00 8B 95 CC FE FF FF 03 55 E4 8B 75 E4 8D 0C 16 8D 34 0E 8B 7D E4 01 F7 8B 45 0C 89 BD 9C FE FF FF 0F AF 85 CC FE FF FF 8B 7D 08 DD 04 C7 8B 85 CC FE FF FF 8D 04 C5 08 00 00 00 0F AF 45 0C DD 9D 78 FF FF FF DD 04 38 8B 45 0C 0F AF C2 DD 04 C7 8B 45 0C 0F AF C1 DD 04 C7 8B 45 0C 0F AF C6 DD 04 C7 8B 45 0C 0F AF 85 9C FE FF FF 8D 14 D5 08 00 00 00 8D 0C CD 08 00 00 00 8D 34 F5 08 00 00 00 DD 04 C7 0F AF 55 0C 0F AF 4D 0C 0F AF 75 0C 8B 85 9C FE FF FF
-***** EXPENSIVE 2369 703
-
-. 2368 8059B72 167
-. DD 04 3A DD 04 39 D9 CE DD 9D 70 FF FF FF DD 04 3E 8D 3C C5 08 00 00 00 0F AF 7D 0C 8B 55 08 DD 9D 68 FF FF FF DD 04 17 D9 CA DD 9D 60 FF FF FF D9 C9 DD 9D 58 FF FF FF DD 45 B8 DD 45 B0 D9 C9 D8 CD D9 C9 D8 CA DE E9 DD 9D 50 FF FF FF DD 45 A8 D8 CB DD 9D A8 FE FF FF DD 45 A0 D8 CD DC AD A8 FE FF FF D9 C9 DC 4D B8 D9 C9 DD 9D A8 FE FF FF D9 CB DC 4D B0 DD 45 98 DD 45 90 DC 8D 68 FF FF FF D9 CA DE C5 D8 CA D9 CC DD 9D 48 FF FF FF DE EB DD 45 88 DD 45 80 D9 CB DC 4D A0 D9 CB DC 8D 58 FF FF FF D9 CD
-***** EXPENSIVE 2370 704
-
-. 2369 8059C19 169
-. DC 4D A8 D9 C9 DC 8D 60 FF FF FF D9 C9 DE C3 DD 45 98 D9 C9 DE E5 DD 45 80 DD 45 88 DD 85 A8 FE FF FF D9 CC DC 4D 90 D9 CA DC 8D 60 FF FF FF D9 CB DC 8D 68 FF FF FF D9 C9 DC 8D 58 FF FF FF D9 CC D8 C6 D9 C9 DE C2 D9 CB DE C2 D9 CA DD 9D 40 FF FF FF DD 85 50 FF FF FF D9 C3 D9 C9 D8 C6 DD 85 48 FF FF FF D9 CA D8 C4 D9 CF DC AD 50 FF FF FF D9 CA D8 C3 D9 CF DD 9D 38 FF FF FF D9 C9 DD 9D 30 FF FF FF D9 C9 DC AD 48 FF FF FF DD 9D 28 FF FF FF DD 85 40 FF FF FF D8 C1 DD 9D 20 FF FF FF DD 85 38 FF FF FF D8 C5
-***** EXPENSIVE 2371 705
-
-. 2370 8059CC2 171
-. DD 85 A8 FE FF FF D9 C9 DD 9D 18 FF FF FF DE E4 D9 CA DE E1 DD 85 E8 FE FF FF D9 FA DC 8D E0 FE FF FF D9 CA DC A5 40 FF FF FF DE CA DD 85 E8 FE FF FF D9 FA D9 CC DC A5 38 FF FF FF D9 CC DC 8D E0 FE FF FF DE CC DD 85 20 FF FF FF DC 8D E0 FE FF FF DC AD 78 FF FF FF DD 85 18 FF FF FF DC 8D E0 FE FF FF D9 C1 D9 C9 DC AD 70 FF FF FF D9 C9 D8 C4 DD 9D 10 FF FF FF D9 C9 DE E3 D9 C0 DD 45 D0 D9 C9 D8 C6 D9 CA DE E6 D9 E0 DD 85 30 FF FF FF DD 45 C8 D8 CE D9 C9 D8 CA DE E1 DD 45 C8 D8 CC D9 CA DC 8D 28 FF FF FF DE E2
-***** EXPENSIVE 2372 706
-
-. 2371 8059D6D 195
-. DD 45 C8 D9 CB DD 9D 08 FF FF FF D9 CA D9 E0 DD 85 30 FF FF FF D9 CE DC 4D D0 D9 CE D8 C9 DE C6 DD 85 78 FF FF FF DC 85 20 FF FF FF DD 9D 78 FF FF FF DD 85 70 FF FF FF DC 85 18 FF FF FF DD 9D 70 FF FF FF DD 85 10 FF FF FF D9 CC DC 4D D0 D9 CC D8 E2 D9 C9 DC 8D 28 FF FF FF DE C4 DD 9D A8 FE FF FF DD 85 08 FF FF FF D9 C4 D8 E4 D9 CA DC 85 10 FF FF FF D9 C9 D8 C3 D9 CB DC AD 08 FF FF FF D9 CA DD 9D 00 FF FF FF DD 95 10 FF FF FF D9 C9 DD 9D 08 FF FF FF D9 CB 8B 95 D4 FE FF FF 03 95 F4 FE FF FF 8B 85 F4 FE FF FF 8B 4D DC 01 D0 2B 4D EC 8B B5 D0 FE FF FF 89 85 98 FE FF FF 8D 4C 4E FF
-***** EXPENSIVE 2373 707
-
-. 2372 8059E30 201
-. 8B 85 F4 FE FF FF 8B 75 14 8D 3C 08 0F AF B5 D4 FE FF FF 8B 45 10 DE C2 DD 85 78 FF FF FF DD 1C F0 8B 85 D4 FE FF FF 8D 04 C5 08 00 00 00 8B 75 10 0F AF 45 14 DD 85 70 FF FF FF DD 1C 30 8B 45 14 0F AF C2 DD 85 A8 FE FF FF DD 1C C6 D9 C4 8B 45 14 8D 14 D5 08 00 00 00 0F AF 55 14 0F AF 85 98 FE FF FF D8 C4 D9 CD DE E4 DD 85 00 FF FF FF D9 C9 DD 1C 32 DD 1C C6 D9 CB 8B 85 98 FE FF FF 8D 34 C5 08 00 00 00 8B 45 14 8B 55 10 0F AF C1 0F AF 75 14 8D 0C CD 08 00 00 00 0F AF 4D 14 DD 1C 16 DD 1C C2 80 B5 0F FF FF FF 80 8B 45 14 0F AF C7 8D 3C FD 08 00 00 00 0F AF 7D 14 DD 85 08 FF FF FF D9 C9 D9 E0 D9 C9
-***** EXPENSIVE 2374 708
-
-. 2373 8059EF9 50
-. DD 1C 11 D9 C9 FF 45 E8 DD 1C C2 8B 4D E0 8B 45 18 DD 1C 17 8B 55 DC 01 85 D4 FE FF FF 01 85 D0 FE FF FF 01 95 CC FE FF FF 39 4D E8 0F 82 B1 FB FF FF
-
-. 2374 8059F2B 27
-. 8B 85 F0 FE FF FF FF 45 EC D1 E8 83 85 C8 FE FF FF 10 39 45 EC 0F 82 DE FA FF FF
-***** EXPENSIVE 2376 709
-
-. 2375 8059A24 115
-. 8B B5 C8 FE FF FF 8B 7D 20 8B 45 24 DD 44 37 F0 DD 44 37 F8 DD 5D B0 DD 5D B8 DD 44 30 F8 DD 44 30 F0 D9 C9 8B 45 28 DD 5D A0 DD 5D A8 DD 44 30 F8 DD 44 30 F0 D9 C9 8B 45 2C DD 5D 90 DD 44 30 F8 D9 C9 DD 5D 98 DD 5D 80 DD 44 30 F0 C7 45 E8 00 00 00 00 8B 45 E0 80 75 B7 80 80 75 A7 80 80 75 97 80 80 75 87 80 39 45 E8 DD 5D 88 0F 83 94 04 00 00
-
-. 2376 8059F46 13
-. F7 45 DC 01 00 00 00 0F 85 71 01 00 00
-***** EXPENSIVE 2378 710
-
-. 2377 80549B4 101
-. 8B BD DC FE FF FF 8B 45 20 DD 44 38 F0 DD 44 38 F8 D9 C9 8B 45 24 DD 5D C0 DD 5D B8 DD 44 38 F0 DD 44 38 F8 D9 C9 8B 45 28 DD 5D B0 DD 5D A8 DD 44 38 F0 DD 44 38 F8 D9 C9 8B 45 2C DD 5D A0 DD 5D 98 DD 44 38 F0 DD 44 38 F8 D9 C9 C7 45 E8 00 00 00 00 8B 45 CC 39 45 E8 DD 5D 90 DD 5D 88 0F 83 50 04 00 00
-***** EXPENSIVE 2379 711
-
-. 2378 8054848 159
-. 8B 95 C8 FE FF FF 8B 4D C8 8D 44 11 FF 8B 55 0C 8B 75 08 0F AF 95 C8 FE FF FF DD 04 D6 8B 55 0C 8D 0C 01 0F AF D0 8D 04 C5 08 00 00 00 0F AF 45 0C DD 04 30 8B 45 0C 0F AF C1 DD 04 D6 DD 04 C6 D9 C1 8D 0C CD 08 00 00 00 0F AF 4D 0C D8 C1 DD 04 31 D9 C9 D8 C0 DD 85 F0 FE FF FF D9 FA DC 8D E8 FE FF FF D9 CC DE E3 D9 CB D8 C0 DD 85 E8 FE FF FF D9 C9 DE CB D8 CB D8 ED D9 C2 D8 C1 DD 45 E0 D9 CA DE E4 DD 45 D8 D8 CB D9 CA 8B 95 D8 FE FF FF D8 CE 03 55 D4 8B 7D D4 DE C2 DD 45 D8
-***** EXPENSIVE 2380 712
-
-. 2379 80548E7 145
-. D9 CB 8D 0C 17 DC 4D E0 D9 CB DE CE D9 CD 8D 34 0F DE E2 01 F7 D8 C0 D9 C9 D8 C0 D9 CD DE C3 D9 C1 D9 C4 8B 45 14 0F AF 85 D8 FE FF FF 0F AF 55 14 0F AF 4D 14 89 BD A4 FE FF FF 0F AF 75 14 8B 7D 10 D8 E2 D9 C9 D8 E6 D9 CB DE C6 D9 CB DD 1C C7 D9 CA DD 1C D7 DD 1C CF D9 CA DD 1C F7 8B BD A4 FE FF FF 0F AF 7D 14 8B 45 10 8B 55 D0 DE C1 DD 1C F8 FF 45 E8 8D 04 92 8B 4D CC 01 85 C8 FE FF FF 01 95 D8 FE FF FF 39 4D E8 0F 82 D0 FE FF FF
-
-. 2380 805C0B5 30
-. 8B 75 D8 46 89 F0 C7 45 E8 01 00 00 00 D1 E8 39 45 E8 89 B5 C0 FE FF FF 0F 83 4C 06 00 00
-***** EXPENSIVE 2382 713
-
-. 2381 805C0D3 134
-. C7 85 98 FE FF FF 02 00 00 00 8D 76 00 8B BD 98 FE FF FF 8B 45 20 D9 44 B8 F8 D9 44 B8 FC 8B 45 24 D9 5D 94 D9 5D 98 D9 44 B8 FC D9 44 B8 F8 D9 C9 8B 45 28 D9 5D 8C D9 5D 90 D9 44 B8 FC D9 44 B8 F8 D9 C9 8B 45 2C D9 5D 84 D9 44 B8 FC D9 C9 D9 5D 88 D9 9D 7C FF FF FF D9 44 B8 F8 C7 45 E4 00 00 00 00 8B 45 DC 80 75 97 80 80 75 8F 80 80 75 87 80 80 B5 7F FF FF FF 80 39 45 E4 D9 5D 80 0F 83 AB 05 00 00
-***** EXPENSIVE 2383 714
-
-. 2382 805C159 217
-. 8B 45 D8 8B 55 E8 8D 54 12 FF DD 83 C4 F8 FF FF DD 83 CC F8 FF FF D9 C9 D1 E0 DD 9D B8 FE FF FF DD 9D B0 FE FF FF 89 85 EC FE FF FF 89 95 A4 FE FF FF C7 85 A0 FE FF FF 00 00 00 00 89 95 9C FE FF FF 90 8B 95 9C FE FF FF 03 55 E0 8B 75 E0 8D 0C 16 8D 34 0E 8B 7D E0 01 F7 8B 45 0C 89 BD 7C FE FF FF 0F AF 85 9C FE FF FF 8B 7D 08 D9 04 87 8B 85 9C FE FF FF 8D 04 85 04 00 00 00 0F AF 45 0C D9 9D 78 FF FF FF D9 04 38 8B 45 0C 0F AF C2 D9 9D 74 FF FF FF D9 04 87 8B 45 0C 0F AF C1 D9 04 87 8B 45 0C 0F AF C6 D9 9D 6C FF FF FF 8D 0C 8D 04 00 00 00 D9 04 87 8B 45 0C 0F AF 85 7C FE FF FF 0F AF 4D 0C 8D 14 95 04 00 00 00 8D 34 B5 04 00 00 00 D9 04 87 D9 CA
-***** EXPENSIVE 2384 715
-
-. 2383 805C232 190
-. 0F AF 55 0C D9 9D 70 FF FF FF 0F AF 75 0C D9 04 39 8B 85 7C FE FF FF D9 04 3A D9 C9 D9 9D 68 FF FF FF D9 04 3E 8D 3C 85 04 00 00 00 0F AF 7D 0C 8B 55 08 D9 9D 60 FF FF FF D9 04 17 D9 CA D9 9D 64 FF FF FF D9 C9 D9 9D 5C FF FF FF D9 45 98 D9 45 94 D9 C9 D8 8D 70 FF FF FF D9 C9 D8 CA DE E9 D9 45 90 D8 8D 6C FF FF FF D9 9D 58 FF FF FF D9 45 8C D9 45 94 D9 C9 D8 8D 68 FF FF FF D9 C9 D8 8D 70 FF FF FF D9 C9 D8 AD 58 FF FF FF D9 CB D8 4D 98 DE C1 D9 CA D9 9D 58 FF FF FF D9 45 90 D9 45 8C D8 8D 6C FF FF FF D9 C9 D8 8D 68 FF FF FF DE C1 D9 9D 54 FF FF FF D9 45 84 D9 45 88
-***** EXPENSIVE 2385 716
-
-. 2384 805C2F0 204
-. D8 8D 64 FF FF FF D9 C9 D8 8D 60 FF FF FF DE E9 D9 9D 50 FF FF FF D9 45 84 D9 45 88 D9 C9 D8 8D 64 FF FF FF D9 C9 D8 8D 60 FF FF FF DE C1 D9 9D 4C FF FF FF D9 45 80 D8 CB D9 9D 48 FF FF FF D9 85 7C FF FF FF D8 8D 5C FF FF FF D8 AD 48 FF FF FF D9 9D 48 FF FF FF D9 45 80 D9 85 48 FF FF FF D8 C2 D9 C9 D8 8D 5C FF FF FF D9 CC D8 8D 7C FF FF FF DE C4 D9 9D 44 FF FF FF D9 C1 D8 C3 D9 CA DE E3 D9 85 54 FF FF FF D9 CA D9 9D 40 FF FF FF D9 C9 D8 A5 4C FF FF FF D9 85 58 FF FF FF D9 85 54 FF FF FF D9 C9 D8 85 50 FF FF FF D9 C9 D8 85 4C FF FF FF D9 CA D9 9D 34 FF FF FF D9 85 44 FF FF FF D9 85 40 FF FF FF D8 C3 D9 CC
-***** EXPENSIVE 2386 717
-
-. 2385 805C3BC 219
-. D8 A5 48 FF FF FF D9 85 58 FF FF FF D9 CA D8 C3 D9 CD D9 9D 2C FF FF FF D9 95 3C FF FF FF D9 CD D9 95 38 FF FF FF D9 C9 D8 A5 50 FF FF FF D9 CC D9 9D 30 FF FF FF DD 85 B8 FE FF FF D9 FA D9 CA D8 AD 44 FF FF FF D9 CA DC 8D B0 FE FF FF D8 CA D9 5D EC D9 C9 D9 9D 44 FF FF FF D9 45 EC DD 85 B8 FE FF FF D9 FA D9 CB D8 AD 40 FF FF FF D9 CB DC 8D B0 FE FF FF D8 CB D9 9D 28 FF FF FF DD 85 B0 FE FF FF D8 8D 30 FF FF FF D8 AD 78 FF FF FF D9 9D 24 FF FF FF DD 85 B0 FE FF FF D8 8D 2C FF FF FF D8 AD 74 FF FF FF D9 9D 20 FF FF FF D9 85 24 FF FF FF D8 C1 D9 9D 1C FF FF FF D9 85 20 FF FF FF D8 85 28 FF FF FF D9 9D 18 FF FF FF D9 45 D4 D9 E0 D9 95 08 FF FF FF D8 CD
-***** EXPENSIVE 2387 718
-
-. 2386 805C497 213
-. D9 9D 0C FF FF FF D8 AD 24 FF FF FF D9 45 D0 D9 C9 D9 9D 14 FF FF FF D8 CB D9 85 20 FF FF FF D8 A5 28 FF FF FF D9 C9 D8 AD 0C FF FF FF D9 C9 D9 9D 10 FF FF FF D9 9D 0C FF FF FF D9 85 08 FF FF FF D9 45 D0 D9 C9 D8 CA D9 C9 D8 8D 34 FF FF FF DE E9 D9 9D 04 FF FF FF D9 45 D0 D9 E0 DC CC D9 CB D8 4D D4 DE C4 D9 C9 D9 9D 40 FF FF FF D9 CA D9 95 00 FF FF FF D9 45 D4 D8 8D 34 FF FF FF D9 CA DE CB D9 CA DE C1 D9 85 78 FF FF FF D8 85 30 FF FF FF D9 9D 78 FF FF FF D9 85 74 FF FF FF D8 85 2C FF FF FF D9 9D 74 FF FF FF D9 85 1C FF FF FF D8 A5 04 FF FF FF D9 9D FC FE FF FF D9 85 18 FF FF FF D8 85 0C FF FF FF D9 9D F8 FE FF FF D9 85 14 FF FF FF
-***** EXPENSIVE 2388 719
-
-. 2387 805C56C 225
-. D8 E1 D9 C9 D8 85 14 FF FF FF D9 9D 14 FF FF FF 8B 95 A4 FE FF FF D9 85 10 FF FF FF D9 C9 03 95 EC FE FF FF D9 9D F4 FE FF FF D8 E1 D9 85 10 FF FF FF 8B 85 EC FE FF FF 8B 4D D8 01 D0 2B 4D E8 8B B5 A0 FE FF FF DE C2 D9 9D 10 FF FF FF D9 85 18 FF FF FF 8D 4C 4E FF D8 A5 0C FF FF FF D9 C9 D9 9D F0 FE FF FF 89 85 78 FE FF FF D9 85 1C FF FF FF 8B 85 EC FE FF FF 8B 75 14 8D 3C 08 D8 85 04 FF FF FF D9 C9 0F AF B5 A4 FE FF FF D9 9D 18 FF FF FF 8B 45 10 D9 85 78 FF FF FF D9 C9 D9 9D 1C FF FF FF D9 1C B0 8B 85 A4 FE FF FF 8D 04 85 04 00 00 00 8B 75 10 0F AF 45 14 D9 85 74 FF FF FF D9 1C 30 8B 45 14 0F AF C2 D9 85 FC FE FF FF D9 1C 86 8D 14 95 04 00 00 00 8B 45 14 0F AF 55 14
-***** EXPENSIVE 2389 720
-
-. 2388 805C64D 183
-. 0F AF 85 78 FE FF FF D9 85 F8 FE FF FF D9 85 F4 FE FF FF D9 C9 D9 1C 32 D9 1C 86 8B 85 78 FE FF FF 8D 34 85 04 00 00 00 8B 45 14 8B 55 10 0F AF C1 0F AF 75 14 D9 85 F0 FE FF FF D9 85 1C FF FF FF D9 C9 D9 1C 16 80 B5 1B FF FF FF 80 D9 1C 82 8D 0C 8D 04 00 00 00 8B 45 14 0F AF 4D 14 0F AF C7 D9 85 18 FF FF FF 80 B5 13 FF FF FF 80 8D 3C BD 04 00 00 00 D9 1C 11 D9 85 14 FF FF FF 0F AF 7D 14 D9 85 10 FF FF FF D9 C9 D9 1C 82 D9 1C 17 8B 45 18 8B 55 D8 FF 45 E4 8B 4D DC 01 85 A4 FE FF FF 01 85 A0 FE FF FF 01 95 9C FE FF FF 39 4D E4 0F 82 98 FA FF FF
-
-. 2389 805C704 27
-. 8B 85 C0 FE FF FF FF 45 E8 D1 E8 83 85 98 FE FF FF 02 39 45 E8 0F 82 C1 F9 FF FF
-***** EXPENSIVE 2391 721
-
-. 2390 805C0E0 121
-. 8B BD 98 FE FF FF 8B 45 20 D9 44 B8 F8 D9 44 B8 FC 8B 45 24 D9 5D 94 D9 5D 98 D9 44 B8 FC D9 44 B8 F8 D9 C9 8B 45 28 D9 5D 8C D9 5D 90 D9 44 B8 FC D9 44 B8 F8 D9 C9 8B 45 2C D9 5D 84 D9 44 B8 FC D9 C9 D9 5D 88 D9 9D 7C FF FF FF D9 44 B8 F8 C7 45 E4 00 00 00 00 8B 45 DC 80 75 97 80 80 75 8F 80 80 75 87 80 80 B5 7F FF FF FF 80 39 45 E4 D9 5D 80 0F 83 AB 05 00 00
-
-. 2391 805C71F 13
-. F7 45 D8 01 00 00 00 0F 85 D8 01 00 00
-***** EXPENSIVE 2393 722
-
-. 2392 8057220 101
-. 8B BD DC FE FF FF 8B 45 20 D9 44 B8 F8 D9 44 B8 FC D9 C9 8B 45 24 D9 5D B0 D9 5D AC D9 44 B8 F8 D9 44 B8 FC D9 C9 8B 45 28 D9 5D A8 D9 5D A4 D9 44 B8 F8 D9 44 B8 FC D9 C9 8B 45 2C D9 5D A0 D9 5D 9C D9 44 B8 F8 D9 44 B8 FC D9 C9 C7 45 E4 00 00 00 00 8B 45 D0 39 45 E4 D9 5D 98 D9 5D 94 0F 83 BE 04 00 00
-***** EXPENSIVE 2394 723
-
-. 2393 8057094 161
-. 8B 95 CC FE FF FF 8B 4D CC 8D 44 11 FF 8B 55 0C 8B 75 08 0F AF 95 CC FE FF FF D9 04 96 8B 55 0C 8D 0C 01 0F AF D0 8D 04 85 04 00 00 00 0F AF 45 0C D9 04 30 8B 45 0C 0F AF C1 D9 04 96 D9 04 86 D9 C1 8D 0C 8D 04 00 00 00 0F AF 4D 0C D8 C1 D9 CC D9 5D C8 D9 04 31 D9 CC D8 C0 DD 85 F0 FE FF FF D9 FA DC 8D E8 FE FF FF D9 CB DE E2 D9 CA D8 C0 DE C9 D9 5D EC DD 85 E8 FE FF FF D8 C9 D8 6D C8 D9 5D BC D9 45 EC D9 45 BC D8 C1 D9 C9 D8 6D BC D9 C9 D9 5D B8 D9 5D B4 D9 45 DC D9 45 E0 D8 CB
-***** EXPENSIVE 2395 724
-
-. 2394 8057135 147
-. D9 C9 D8 CC DE C1 D9 45 DC DE CB 8B 95 D8 FE FF FF D9 45 E0 03 55 D8 8B 45 D8 DE CC D9 CA 8D 0C 10 DE E3 D8 45 C8 D9 45 B4 D9 CB 8D 34 08 D8 C0 D9 C9 01 F0 D9 5D C8 D9 C9 D8 C0 D9 45 B8 D9 CB D8 E2 D9 CA 8B 7D 14 D8 45 B4 D9 CB 0F AF BD D8 FE FF FF 0F AF 55 14 0F AF 4D 14 D8 E1 D9 CB D9 5D B4 D8 45 B8 89 85 BC FE FF FF D9 45 C8 8B 45 10 D9 1C B8 D9 55 B8 D9 CA D9 1C 90 D9 1C 88 8B BD BC FE FF FF 0F AF 75 14 0F AF 7D 14 8B 55 D4 D9 45 B4
-***** EXPENSIVE 2396 725
-
-. 2395 80571C8 36
-. D9 1C B0 FF 45 E4 D9 1C B8 8B 4D D0 8D 04 92 01 85 CC FE FF FF 01 95 D8 FE FF FF 39 4D E4 0F 82 A8 FE FF FF
-***** EXPENSIVE 2397 726
-
-. 2396 8054004 168
-. 8B 55 AC 8B 75 84 8D 44 32 FF 8B 4D A8 8D 34 01 8B 4D 84 29 D1 8B 55 A8 8D 4C 0A FF 89 8D 74 FF FF FF 8B 4D 0C 8B 55 08 0F AF C8 8D 04 C5 08 00 00 00 DD 04 CA 0F AF 45 0C DD 5D A0 DD 04 10 8B 45 0C 0F AF C6 DD 04 C2 8B 45 0C 0F AF 85 74 FF FF FF DD 04 C2 8B 85 74 FF FF FF 8D 0C C5 08 00 00 00 8D 34 F5 08 00 00 00 0F AF 75 0C 0F AF 4D 0C D9 C1 D9 CB DD 5D 98 DD 04 11 DD 04 16 D9 CC D8 C2 DD 83 BC F8 FF FF D9 CA D9 E0 D9 C5 D9 CB D8 CA DC 6D A0 D9 CB D8 C1 D9 CA DC 45 A0 DD 83 BC F8 FF FF D9 CF DE E2
-***** EXPENSIVE 2398 727
-
-. 2397 80540AC 128
-. D9 C9 DC 4D E0 D9 C9 DD 5D A0 D9 CD D8 C9 D9 C2 D9 C9 8B 45 14 8B 75 10 DC 6D 98 D9 CA 0F AF C7 DC 45 98 D9 C9 D8 E6 D9 CB DE C6 D9 CC DE E3 DD 45 A0 D9 CB DC 4D E0 8B 4D DC D9 C1 D9 CD DD 55 98 D9 CC DD 1C C6 8D 04 FD 08 00 00 00 DC C4 DE E9 0F AF 45 14 DD 45 C8 DD 45 C0 D9 CC DD 1C 30 D9 CB 8D 14 39 D8 CC D9 CB D8 CA 8B 45 14 0F AF C2 DE E3 D9 CA DD 1C C6 8D 0C 11 DC 4D C0 D9 CA
-***** EXPENSIVE 2399 728
-
-. 2398 805412C 103
-. 8D 14 D5 08 00 00 00 DC 4D C8 8B 45 14 DD 45 B8 DD 45 B0 D9 C9 0F AF C1 0F AF 55 14 D8 CD D9 C9 D8 CB D9 CC DE C2 D9 CC 8D 0C CD 08 00 00 00 DC 4D B0 D9 CA DC 4D B8 D9 C9 DD 1C 32 D9 CB 0F AF 4D 14 DE E2 DE C2 8B 55 D8 DD 1C C6 FF 45 E8 DD 1C 31 8D 04 52 8B 4D D4 03 7D D8 01 45 84 39 4D E8 0F 82 71 FE FF FF
-***** EXPENSIVE 2400 729
-
-. 2399 80567F0 162
-. 8B 55 C4 8B 75 9C 8D 44 32 FF 8B 4D C0 8D 34 01 8B 4D 9C 29 D1 8B 55 C0 8D 4C 0A FF 89 4D 94 8B 4D 0C 0F AF C8 8D 04 85 04 00 00 00 8B 55 08 0F AF 45 0C D9 04 10 8B 45 0C 0F AF C6 D9 04 82 8B 45 0C D9 04 8A 0F AF 45 94 D9 04 82 D9 C9 D9 5D BC 8B 45 94 D9 C1 8D 0C 85 04 00 00 00 D8 C1 8D 34 B5 04 00 00 00 0F AF 75 0C 0F AF 4D 0C D9 5D B4 DD 83 BC F8 FF FF D9 04 11 D9 CC D9 5D B8 D8 4D B4 D9 04 16 D9 CC D9 E0 D9 C9 D8 6D BC D9 C4 D9 C9 D9 5D F0 D8 C1 DD 83 BC F8 FF FF D8 C9 D8 6D B8
-***** EXPENSIVE 2401 730
-
-. 2400 8056892 133
-. D9 45 F0 D9 C9 D9 5D F0 D9 45 BC D9 CE DE E3 D9 CD D8 45 B4 D9 CC DE E3 D9 C9 D8 4D E4 D9 45 F0 D9 CB D8 4D E4 D9 CC D9 5D BC 8B 45 E0 8D 14 38 D9 C2 8D 0C 10 D8 C4 8B 45 14 8B 75 10 0F AF C7 D9 5D B0 D9 45 BC D9 1C 86 D9 C4 8D 04 BD 04 00 00 00 D8 E1 D9 CD DE C1 D9 C9 0F AF 45 14 D8 45 B8 D9 45 D4 D9 45 D0 D9 CA D9 14 30 D9 C9 D8 CE D9 CA D8 4D B0 8B 45 14 0F AF C2 DE EA D9 C9 D9 1C 86 D9 45 D4
-***** EXPENSIVE 2402 731
-
-. 2401 8056917 119
-. D8 4D B0 D9 CD D8 4D D0 D9 CB DE E4 D9 CA DE C4 8D 14 95 04 00 00 00 8B 45 14 D9 45 CC D9 45 C8 D9 C9 0F AF C1 0F AF 55 14 D8 CA D9 C9 D8 CC D9 CA 8D 0C 8D 04 00 00 00 D8 4D C8 D9 CC D8 4D CC D9 CD D9 1C 32 0F AF 4D 14 DE E1 D9 CA DE C3 D9 C9 8B 55 DC D9 1C 86 D9 C9 FF 45 E8 D9 1C 31 8D 04 52 8B 4D D8 03 7D DC 01 45 9C 39 4D E8 D9 5D B8 0F 82 62 FE FF FF
-***** EXPENSIVE 2403 732
-
-. 2402 8059484 185
-. 8B 95 5C FF FF FF 03 55 E4 8B 75 E4 8D 0C 16 01 CE 8B 45 0C 89 B5 3C FF FF FF 0F AF 85 5C FF FF FF 8B 75 08 DD 04 C6 8B 85 5C FF FF FF 8D 04 C5 08 00 00 00 0F AF 45 0C DD 5D A0 DD 04 30 8B 45 0C 0F AF C2 DD 04 C6 8B 45 0C 0F AF C1 8D 14 D5 08 00 00 00 DD 04 C6 0F AF 55 0C 8B 45 0C 8D 0C CD 08 00 00 00 DD 04 32 0F AF 4D 0C 0F AF 85 3C FF FF FF 8B 95 3C FF FF FF DD 04 31 DD 04 C6 D9 CD 8D 34 D5 08 00 00 00 0F AF 75 0C 8B 4D 08 DD 5D 98 DD 04 0E DD 5D 90 DD 45 D0 DD 45 C8 D9 C9 D8 CD D9 C9 D8 CB DE E9 DD 9D 40 FF FF FF DD 45 C0 DD 45 B8 D9 CD DC 4D C8
-***** EXPENSIVE 2404 733
-
-. 2403 805953D 130
-. D9 CD D8 CA D9 CB DC 4D D0 D9 C9 D8 CC D9 C9 DE C5 DE E2 DD 45 B0 DD 45 A8 DC 4D 90 D9 C9 D8 CE DE E1 DD 85 40 FF FF FF DD 45 B0 D9 CD DC 4D B8 D9 CF DC 4D A8 D9 C9 D8 C2 D9 CB DC 4D C0 D9 CD DC 4D 90 DE C1 D9 CC DE C6 DD 45 A0 DD 45 98 D9 CB DD 5D 88 8B 85 6C FF FF FF D9 C5 D9 C9 8D 0C 38 D8 C4 D9 C9 D8 C5 D9 CE DE E5 8B 45 14 DD 45 88 0F AF 85 60 FF FF FF 8B 75 10 D8 C1 DD 1C C6 D9 CD
-***** EXPENSIVE 2405 734
-
-. 2404 80595BF 166
-. DD 5D 80 8B B5 60 FF FF FF DD 85 40 FF FF FF D9 CA D8 C6 D9 CA DE E1 8D 04 F5 08 00 00 00 DD 45 80 D9 CB 8B 75 10 DC 6D A0 D9 CE 0F AF 45 14 DC 6D 98 D9 CB D8 C2 D9 CB 8B 95 60 FF FF FF DD 9D 70 FF FF FF D9 CA DD 1C 30 D9 CA 03 95 6C FF FF FF D9 E0 D9 C4 8B 45 14 0F AF C2 D8 E1 DD 1C C6 D9 CC 8B 45 14 DD 9D 78 FF FF FF 0F AF C1 DD 85 70 FF FF FF D9 C9 D9 E0 D9 CA DC 65 80 D9 CC 8D 14 D5 08 00 00 00 8D 0C CD 08 00 00 00 0F AF 55 14 DC 85 78 FF FF FF D9 C9 0F AF 4D 14 D8 C2 D9 CB DC 65 88 D9 CA
-***** EXPENSIVE 2406 735
-
-. 2405 8059665 110
-. DC AD 70 FF FF FF D9 CC D9 E0 D9 CB DD 1C 32 D9 CB DD 9D 70 FF FF FF DD 1C C6 D9 C9 DD 95 78 FF FF FF D9 C9 DD 1C 31 8B 45 14 0F AF C7 DD 1C C6 80 B5 77 FF FF FF 80 8D 04 FD 08 00 00 00 0F AF 45 14 DD 85 70 FF FF FF DD 1C 30 8B 55 DC 8B 45 18 FF 45 E8 8B 4D E0 01 85 60 FF FF FF 01 C7 01 95 5C FF FF FF 39 4D E8 0F 82 B1 FD FF FF
-***** EXPENSIVE 2407 736
-
-. 2406 8059724 153
-. 8B 45 E4 8D 14 38 8D 0C 10 01 C8 8B 75 0C 89 85 3C FF FF FF 0F AF F7 8B 45 08 DD 04 F0 8B B5 3C FF FF FF 0F AF 55 0C 0F AF 4D 0C 0F AF 75 0C DD 04 D0 DD 04 C8 DD 04 F0 D9 C4 D9 FA DD 83 34 F6 FF FF DE F1 D9 C3 D8 E2 DE C9 D9 C5 D9 FA 8B 8D 64 FF FF FF 8B 55 EC DD 83 34 F6 FF FF 8D 44 51 FF DE F1 8B 75 DC D9 C5 8B 55 14 8D 0C 70 0F AF D0 8B 75 10 D8 C2 DD 1C D6 D9 CC DE C2 D9 C2 D9 CC DE CA D9 CB 8D 04 C5 08 00 00 00 D9 E0 0F AF 45 14 D8 E1 DD 1C 30 D9 CB
-***** EXPENSIVE 2408 737
-
-. 2407 80597BD 56
-. 8B 45 14 0F AF C1 DE E2 D9 C9 DD 1C C6 8D 0C CD 08 00 00 00 8B 45 18 FF 45 E8 8B 55 E0 0F AF 4D 14 DE E1 01 85 64 FF FF FF 03 7D DC 39 55 E8 DD 1C 31 0F 82 2F FF FF FF
-***** EXPENSIVE 2409 738
-
-. 2408 80546C4 148
-. 8B 45 E0 8D 14 47 8B 45 0C 8B 4D 08 0F AF C7 DD 04 C1 8D 04 FD 08 00 00 00 0F AF 45 0C DD 04 08 8B 45 0C 0F AF C2 8D 14 D5 08 00 00 00 0F AF 55 0C DD 04 C1 DD 04 0A D9 C4 D9 FA D9 C3 D8 C2 DE C9 D9 C5 D9 FA 8B 95 68 FF FF FF D9 C5 03 55 E4 D8 E4 8B 45 E4 8D 0C 10 DE C9 01 C8 D9 C0 D9 CE DE C4 D9 CA DE E4 D9 CA 8B 75 14 0F AF B5 68 FF FF FF 0F AF 55 14 0F AF 4D 14 89 85 34 FF FF FF D8 C0 D9 CC 8B 45 10 D8 E2 D9 CB D8 C0 D9 CC DD 1C F0 DE C1
-***** EXPENSIVE 2410 739
-
-. 2409 8054758 55
-. D9 C9 DD 1C D0 D9 C9 8B B5 34 FF FF FF DD 1C C8 8B 55 E0 FF 45 E8 8B 4D DC 0F AF 75 14 D9 E0 01 95 68 FF FF FF 03 BD 64 FF FF FF 39 4D E8 DD 1C F0 0F 82 35 FF FF FF
-***** EXPENSIVE 2411 740
-
-. 2410 805BAB8 184
-. 8B 95 58 FF FF FF 03 55 E4 8B 75 E4 8D 0C 16 01 CE 8B 45 0C 89 B5 44 FF FF FF 0F AF 85 58 FF FF FF 8B 75 08 D9 04 86 8B 85 58 FF FF FF 8D 04 85 04 00 00 00 0F AF 45 0C D9 5D B4 D9 04 30 8B 45 0C 0F AF C2 D9 5D B0 D9 04 86 8B 45 0C 0F AF C1 D9 04 86 D9 C9 8B 45 0C 0F AF 85 44 FF FF FF 8D 14 95 04 00 00 00 8D 0C 8D 04 00 00 00 0F AF 55 0C 0F AF 4D 0C D9 5D AC D9 04 86 8B 85 44 FF FF FF D9 04 32 D9 04 31 D9 CA D9 5D A4 8D 34 85 04 00 00 00 D9 45 CC 0F AF 75 0C 8B 55 08 D8 4D AC D9 CB D9 5D A8 D9 04 16 D9 CB D9 5D A0 D9 45 C8 D8 C9 D8 6D A0 D9 5D A0
-***** EXPENSIVE 2412 741
-
-. 2411 805BB70 137
-. D9 45 C8 D8 4D AC D9 C9 D8 4D CC DE C1 D9 45 C4 D8 4D A8 D9 5D 9C D9 45 C0 D8 CA D8 6D 9C D9 5D 9C D9 45 C0 D8 4D A8 D9 CA D8 4D C4 D9 CA D9 5D A8 D9 C9 D8 45 A8 D9 5D 98 D9 45 BC D8 4D A4 D9 5D 94 D9 45 B8 D8 CA D8 6D 94 D9 5D 94 D9 45 BC DE CA D9 45 B8 D8 4D A4 DE C2 D9 45 B4 D8 45 9C D9 5D 90 D9 45 B0 D8 45 98 D9 5D 8C D9 45 A0 D9 45 A0 D9 45 B4 D9 45 B0 D9 CB D8 65 94 D9 CA D8 45 94 D9 C9 D8 65 9C D9 CB
-***** EXPENSIVE 2413 742
-
-. 2412 805BBF9 162
-. D8 65 98 D9 C4 D9 CB D9 5D 88 D9 CA 8B 85 78 FF FF FF 8D 0C 38 D8 C5 D9 45 8C D9 CD DE E6 8B 45 14 D9 45 90 0F AF 85 5C FF FF FF D8 C2 D9 CD D8 C1 D9 CD 8B 75 10 D9 1C 86 D9 CC D9 5D 84 D9 CC 8B B5 5C FF FF FF D9 E0 D9 C2 80 75 8B 80 D8 E1 8D 04 B5 04 00 00 00 0F AF 45 14 8B 75 10 D9 5D 80 D9 45 84 D9 45 88 D9 C9 8B 95 5C FF FF FF D9 1C 30 03 95 78 FF FF FF D8 C2 8B 45 14 0F AF C2 D9 9D 7C FF FF FF D9 45 80 D9 1C 86 D9 CC 8D 14 95 04 00 00 00 8B 45 14 0F AF 55 14 0F AF C1 D8 6D 90
-***** EXPENSIVE 2414 743
-
-. 2413 805BC9B 119
-. D9 85 7C FF FF FF D9 CC D8 6D 8C D9 CC 8D 0C 8D 04 00 00 00 D9 1C 32 D9 C9 0F AF 4D 14 D8 65 88 D9 C9 D9 14 86 D9 5D 90 D9 CA D9 5D 8C 80 75 8F 80 8B 45 14 0F AF C7 DE C2 D9 45 8C D9 1C 31 D9 C9 D9 1C 86 8D 04 BD 04 00 00 00 0F AF 45 14 D9 E0 D9 1C 30 8B 55 DC 8B 45 18 FF 45 E8 8B 4D E0 01 85 5C FF FF FF 01 C7 01 95 58 FF FF FF 39 4D E8 0F 82 A6 FD FF FF
-***** EXPENSIVE 2415 744
-
-. 2414 805BD5C 188
-. 8B 45 E4 8D 14 38 8D 0C 10 01 C8 8B 75 0C 89 85 44 FF FF FF 0F AF F7 8B 45 08 D9 04 B0 8B B5 44 FF FF FF 0F AF 75 0C D9 9D 74 FF FF FF 0F AF 55 0C D9 04 B0 0F AF 4D 0C D9 9D 6C FF FF FF D9 04 90 D9 04 88 DD 83 DC F8 FF FF D9 FA D9 85 6C FF FF FF D9 C9 DC BB 34 F6 FF FF D9 C9 D8 EB DE C9 D9 9D 68 FF FF FF DD 83 DC F8 FF FF D9 FA DC BB 34 F6 FF FF D9 CA D8 85 6C FF FF FF 8B 8D 60 FF FF FF DE CA D9 C9 8B 55 EC D9 5D F0 8D 44 51 FF 8B 75 DC 8B 55 14 D9 85 74 FF FF FF 8D 0C 70 0F AF D0 8B 75 10 D8 85 68 FF FF FF D9 45 F0 D9 C9 D9 1C 96 D9 C1 8D 04 85 04 00 00 00
-***** EXPENSIVE 2416 745
-
-. 2415 805BE18 81
-. D9 E0 0F AF 45 14 D8 E1 D9 1C 30 8B 45 14 D9 85 74 FF FF FF 0F AF C1 D8 A5 68 FF FF FF D9 1C 86 8D 0C 8D 04 00 00 00 8B 45 18 FF 45 E8 8B 55 E0 0F AF 4D 14 DE E9 01 85 60 FF FF FF 03 7D DC 39 55 E8 D9 95 70 FF FF FF D9 1C 31 0F 82 F3 FE FF FF
-***** EXPENSIVE 2417 746
-
-. 2416 8056EC8 192
-. 8B 45 0C 8B 4D 08 0F AF C7 D9 04 81 8D 04 BD 04 00 00 00 0F AF 45 0C 8B 75 E0 8D 14 77 D9 04 08 D9 C9 8B 45 0C 0F AF C2 8D 14 95 04 00 00 00 0F AF 55 0C D9 9D 70 FF FF FF D9 04 0A D9 9D 64 FF FF FF D9 95 6C FF FF FF D9 04 81 DD 83 DC F8 FF FF D9 FA D9 CA D8 85 64 FF FF FF DE CA D9 C9 D9 9D 60 FF FF FF DD 83 DC F8 FF FF D9 FA D9 85 70 FF FF FF D8 E2 8B 95 58 FF FF FF 03 55 E4 DE C9 8B 45 E4 D9 85 70 FF FF FF D9 C9 D9 5D F0 8D 0C 10 DE C1 D9 85 64 FF FF FF D9 45 F0 01 C8 D9 85 60 FF FF FF D9 CA D8 A5 6C FF FF FF D9 CA 8B 75 14 0F AF B5 58 FF FF FF 0F AF 55 14 0F AF 4D 14
-***** EXPENSIVE 2418 747
-
-. 2417 8056F88 83
-. D8 E9 D9 CB 89 85 34 FF FF FF D8 C0 D9 CA 8B 45 10 D8 C0 D9 CA D9 1C B0 D8 85 60 FF FF FF D9 CA D9 1C 90 8B B5 34 FF FF FF D9 1C 88 8B 55 E0 FF 45 E8 8B 4D DC 0F AF 75 14 D9 E0 01 95 58 FF FF FF 03 BD 54 FF FF FF 39 4D E8 D9 1C B0 0F 82 ED FE FF FF
-***** EXPENSIVE 2419 748
-
-. 2418 804E5D0 190
-. 8B 45 EC 03 45 DC 0F AF 45 0C C1 E0 04 DD 04 06 DD 44 06 08 8B 45 EC 03 85 64 FF FF FF 0F AF 45 0C C1 E0 04 DD 04 06 D9 CA DD 9D 70 FF FF FF DD 44 06 08 D9 C9 8B 45 EC 03 85 54 FF FF FF 0F AF 45 0C C1 E0 04 DD 9D 68 FF FF FF DD 04 06 DD 9D 58 FF FF FF DD 44 06 08 8B 45 EC 03 85 3C FF FF FF 0F AF 45 0C C1 E0 04 DD 9D 48 FF FF FF DD 04 06 DD 9D 40 FF FF FF DD 44 06 08 DD 9D 30 FF FF FF 8B 45 EC 03 85 2C FF FF FF DD 85 40 FF FF FF DD 85 30 FF FF FF D9 C9 0F AF 45 0C D8 C3 D9 C9 D8 C2 DD 83 BC F8 FF FF DD 83 BC F8 FF FF D9 C9 C1 E0 04 D8 CB D9 C9 D8 CA D9 CB DC 04 16
-***** EXPENSIVE 2420 749
-
-. 2419 804E68E 196
-. D9 CD DC A5 40 FF FF FF D9 CC DC A5 30 FF FF FF DD 04 06 DD 44 06 08 D9 CB DC 2C 16 D9 CD DC 6C 16 08 D9 CE DC 8D 20 FF FF FF D9 CA DC 8D 20 FF FF FF D9 CF DD 9D 18 FF FF FF D9 CB DC 44 16 08 DD 9D 10 FF FF FF D9 C3 D8 E6 D9 CC DE C6 DD 85 70 FF FF FF D8 C3 DD 9D 08 FF FF FF DD 85 68 FF FF FF D8 C2 DD 95 00 FF FF FF DC 8B BC F8 FF FF DC AD 48 FF FF FF DD 9D 98 FE FF FF D9 C4 DD 85 58 FF FF FF D9 C9 D8 C2 D9 CE DE E2 DC 85 08 FF FF FF DD 85 08 FF FF FF D9 C9 DD 9D F8 FE FF FF DC 8B BC F8 FF FF DD 85 48 FF FF FF D9 C9 DC AD 58 FF FF FF D9 C9 DC 85 00 FF FF FF D9 CB DC A5 68 FF FF FF
-***** EXPENSIVE 2421 750
-
-. 2420 804E752 204
-. DC 8D 20 FF FF FF D9 CB DD 9D F0 FE FF FF D9 C0 D8 E3 D9 CC DC A5 70 FF FF FF D9 C9 DE C3 DC 8D 20 FF FF FF D9 CB DD 9D E8 FE FF FF DD 85 18 FF FF FF DD 85 98 FE FF FF D8 C4 D9 C9 DC 85 F8 FE FF FF DD 1C 0F DD 9D E0 FE FF FF DD 85 E8 FE FF FF DD 85 10 FF FF FF D9 CC DC AD 98 FE FF FF D9 CC DC 85 F0 FE FF FF D9 C9 D8 C5 D9 C9 DD 5C 0F 08 D9 CB DD 9D 98 FE FF FF D9 CA DD 9D D8 FE FF FF DD 85 E0 FE FF FF D8 C4 DD 9D D0 FE FF FF DD 85 18 FF FF FF DC A5 F8 FE FF FF DD 9D C8 FE FF FF DD 85 10 FF FF FF DC A5 F0 FE FF FF D9 C5 8B 45 E8 D8 C2 D9 C9 DD 9D C0 FE FF FF D9 CB DC A5 E8 FE FF FF D9 CC DC A5 E0 FE FF FF
-***** EXPENSIVE 2422 751
-
-. 2421 804E81E 143
-. D9 CD DE E1 03 45 D4 DD 45 C0 DD 45 B8 0F AF 45 14 D8 CE D9 C9 D8 CD D9 CE DC 4D C0 D9 CD DC 4D B8 D9 CE C1 E0 04 DE E1 D9 CC DE C5 D9 CB DD 1C 07 D9 CB DD 5C 07 08 DD 85 98 FE FF FF 8B 45 E8 D8 C3 03 85 BC FE FF FF DD 45 B0 DD 45 A8 0F AF 45 14 D8 CA D9 C9 D8 CB D9 CA DC 4D B0 D9 CB DC 4D A8 D9 CA C1 E0 04 DE E1 D9 CA DE C1 D9 C9 DD 1C 07 DD 5C 07 08 8B 45 E8 03 85 B8 FE FF FF DD 45 A0 DD 45 98 0F AF 45 14 DC 8D C0 FE FF FF
-***** EXPENSIVE 2423 752
-
-. 2422 804E8AD 171
-. D9 C9 DC 8D C8 FE FF FF C1 E0 04 DE E1 D9 CA DC A5 98 FE FF FF D9 CA DD 1C 07 DD 45 A0 DD 45 98 DC 8D C8 FE FF FF D9 C9 DC 8D C0 FE FF FF DE C1 DD 5C 07 08 8B 45 E8 03 85 B4 FE FF FF DD 45 90 DD 45 88 0F AF 45 14 DC 8D D0 FE FF FF D9 C9 DC 8D D8 FE FF FF C1 E0 04 DE E1 DD 1C 07 DD 45 90 DD 45 88 DC 8D D8 FE FF FF D9 C9 DC 8D D0 FE FF FF DE C1 DD 5C 07 08 8B 45 E8 03 85 B0 FE FF FF DD 45 80 DD 85 78 FF FF FF D9 C9 0F AF 45 14 D8 CA D9 C9 D8 CB D9 CA DC 8D 78 FF FF FF D9 CB DC 4D 80 D9 C9 C1 E0 04 DE E2 DE C2
-***** EXPENSIVE 2424 753
-
-. 2423 804E958 53
-. DD 1C 07 DD 5C 07 08 8B 45 0C C1 E0 04 01 C2 8B 45 0C 01 85 A8 FE FF FF 8B 45 14 C1 E0 04 FF 45 EC 01 C1 FF 45 E8 FF 45 E0 8B 45 D4 39 45 E0 0F 82 43 FC FF FF
-***** EXPENSIVE 2425 754
-
-. 2424 8051998 183
-. 8B 45 E8 03 45 D8 0F AF 45 0C D9 04 C6 D9 44 C6 04 8B 45 E8 03 45 94 0F AF 45 0C D9 04 C6 D9 CA D9 5D 9C D9 44 C6 04 8B 45 E8 03 45 8C 0F AF 45 0C D9 04 C6 D9 CA D9 5D 98 D9 44 C6 04 D9 CA 8B 45 E8 03 45 84 0F AF 45 0C D9 5D 90 D9 C9 D9 5D 88 D9 04 C6 D9 44 C6 04 8B 45 E8 03 85 78 FF FF FF 0F AF 45 0C D9 5D 80 D9 04 C6 D9 9D 7C FF FF FF D9 44 C6 04 D9 9D 74 FF FF FF D9 C2 D8 C1 D9 9D 70 FF FF FF D9 45 80 D8 C2 D9 9D 6C FF FF FF D9 85 70 FF FF FF D8 8D F8 FE FF FF D9 04 CE DE E1 D9 85 6C FF FF FF D8 8D F8 FE FF FF D9 9D 60 FF FF FF D9 44 CE 04
-***** EXPENSIVE 2426 755
-
-. 2425 8051A4F 183
-. D8 A5 60 FF FF FF D9 CC DE E2 D9 04 CE D9 CC D9 9D 64 FF FF FF D9 CB D8 85 70 FF FF FF D9 44 CE 04 D9 CB D8 65 80 D8 8D 5C FF FF FF D9 CB D8 85 6C FF FF FF D9 C9 D9 9D 58 FF FF FF D9 C3 D9 CA D8 8D 5C FF FF FF D9 CA D8 E3 D9 C9 D9 9D 54 FF FF FF D9 85 64 FF FF FF D8 C2 D9 C9 D9 9D 50 FF FF FF D9 C9 D8 AD 64 FF FF FF D9 85 7C FF FF FF D9 85 74 FF FF FF D9 85 7C FF FF FF D9 CE DE C5 D9 C9 D8 45 9C D9 C9 D8 45 98 D9 CD D8 65 9C D9 CB D9 9D 4C FF FF FF D9 C9 D9 9D 44 FF FF FF D9 85 F8 FE FF FF D9 85 F8 FE FF FF D9 85 5C FF FF FF DE CC D8 CA D9 C9
-***** EXPENSIVE 2427 756
-
-. 2426 8051B06 196
-. D8 CD D9 C9 D8 6D 90 D9 C9 D8 6D 88 D9 CC D9 95 48 FF FF FF D9 CB D9 9D 40 FF FF FF D9 85 74 FF FF FF D8 65 98 D9 85 5C FF FF FF DE C9 D9 9D 3C FF FF FF D9 85 3C FF FF FF D8 E9 D9 9D 38 FF FF FF D9 85 40 FF FF FF D8 C4 D9 45 90 D9 C9 D9 9D 34 FF FF FF DE C2 D9 85 58 FF FF FF D8 C2 D9 45 88 D9 C9 D9 1C D7 DE C5 D9 85 54 FF FF FF D8 C5 D9 5C D7 04 D9 85 50 FF FF FF D8 85 38 FF FF FF D9 9D 30 FF FF FF D9 85 4C FF FF FF D8 85 34 FF FF FF D9 C9 D8 85 3C FF FF FF D9 C9 D9 9D 2C FF FF FF DC C2 D9 CB D8 A5 40 FF FF FF D9 CA D9 9D 28 FF FF FF D9 85 44 FF FF FF D8 C2 D9 CC D8 AD 54 FF FF FF
-***** EXPENSIVE 2428 757
-
-. 2427 8051BCA 179
-. D9 C9 D8 AD 58 FF FF FF D9 CC D9 9D 24 FF FF FF D9 9D 1C FF FF FF D9 85 4C FF FF FF D9 85 50 FF FF FF D9 CB D8 AD 48 FF FF FF D9 CB D8 A5 38 FF FF FF D9 C9 D8 A5 34 FF FF FF D9 CC D9 95 20 FF FF FF D9 CB D9 9D 10 FF FF FF D9 C9 D8 AD 44 FF FF FF D9 9D 0C FF FF FF 8B 45 E4 D9 45 C4 D9 45 C0 03 45 D0 D8 CC D9 C9 D8 CA 0F AF 45 14 DE E1 D9 1C C7 D9 45 C4 DE CB D9 45 C0 DE C9 DE C2 D9 C9 D9 5C C7 04 D9 45 B8 8B 45 E4 D9 45 BC D9 C9 03 85 08 FF FF FF D8 8D 24 FF FF FF D9 C9 D8 8D 28 FF FF FF 0F AF 45 14 DE E1 D9 1C C7 D9 45 B8 D9 45 BC
-***** EXPENSIVE 2429 758
-
-. 2428 8051C7D 165
-. D9 C9 D8 8D 28 FF FF FF D9 C9 D8 8D 24 FF FF FF DE C1 D9 5C C7 04 D9 45 B0 8B 45 E4 D9 45 B4 D9 C9 03 85 04 FF FF FF D8 8D 1C FF FF FF D9 C9 D8 CA 0F AF 45 14 DE E1 D9 1C C7 D9 45 B4 D9 45 B0 D9 C9 D8 8D 1C FF FF FF D9 C9 DE CA DE C1 D9 5C C7 04 8B 45 E4 D9 45 AC D9 45 A8 D9 45 AC D9 45 A8 D9 CA 03 85 00 FF FF FF D8 8D 2C FF FF FF D9 CB D8 8D 30 FF FF FF D9 C9 D8 8D 2C FF FF FF D9 CA D8 8D 30 FF FF FF D9 C9 0F AF 45 14 DE E3 DE C1 D9 C9 D9 1C C7 D9 5C C7 04 D9 45 A4 8B 45 E4 D9 45 A0 D9 C9
-***** EXPENSIVE 2430 759
-
-. 2429 8051D22 82
-. 03 85 FC FE FF FF D8 8D 10 FF FF FF D9 C9 D8 8D 0C FF FF FF 0F AF 45 14 DE E9 D9 1C C7 D9 45 A0 D9 45 A4 D8 8D 0C FF FF FF D9 C9 D8 8D 10 FF FF FF DE C1 D9 5C C7 04 FF 45 DC 8B 45 D0 03 4D 0C FF 45 E8 03 55 14 FF 45 E4 39 45 DC 0F 82 24 FC FF FF
-***** EXPENSIVE 2431 760
-
-. 2430 8058D74 151
-. 8B 45 EC 01 C8 8B 55 0C 0F AF D1 89 45 C8 8B 45 08 DD 04 D0 8D 04 CD 08 00 00 00 0F AF 45 0C 8B 55 08 DD 04 10 8B 45 0C 0F AF 45 C8 DD 04 C2 8B 45 C8 8D 14 C5 08 00 00 00 0F AF 55 0C 8B 45 08 DD 04 02 D9 C5 D9 C5 D8 CA D9 C9 D8 CB DE E1 D9 C6 DE CA D9 CA D8 CD DE C1 8B 45 14 D9 C3 0F AF C6 8B 55 10 D8 C2 DD 1C C2 D9 C2 8D 04 F5 08 00 00 00 0F AF 45 14 D8 C1 DD 1C 10 D9 CB 8B 45 14 0F AF C7 DE E1 DD 1C C2 DE E1 8D 04 FD 08 00 00 00 0F AF 45 14 D9 E0
-***** EXPENSIVE 2432 761
-
-. 2431 8058E0B 27
-. DD 1C 10 FF 45 F0 8B 45 E8 03 7D 18 03 75 18 03 4D E4 39 45 F0 0F 82 4E FF FF FF
-***** EXPENSIVE 2433 762
-
-. 2432 8053D08 151
-. 8B 45 0C 8B 55 08 0F AF C6 DD 04 C2 8D 04 F5 08 00 00 00 0F AF 45 0C DD 04 10 8B 45 0C 0F AF C7 DD 04 C2 8D 04 FD 08 00 00 00 0F AF 45 0C DD 04 10 8B 4D F0 8B 55 C4 8D 44 4A FF 8B 4D E8 8B 55 14 01 C1 0F AF D0 D9 C3 D9 C3 D9 CD 8D 04 C5 08 00 00 00 D8 E3 D9 CC D8 C2 D9 C9 89 4D B0 0F AF 45 14 8B 4D 10 DE C3 D9 CC DE E1 D9 C4 D9 C6 D9 CB DD 1C D1 D9 CA D8 CB D9 C9 DD 1C 08 D9 C9 D8 CB 8B 45 14 0F AF 45 B0 DE E9 DD 1C C1 8B 45 B0 8D 0C C5 08 00 00 00
-***** EXPENSIVE 2434 763
-
-. 2433 8053D9F 45
-. D8 CA D9 C9 D8 CB 0F AF 4D 14 DE C1 8B 55 10 DD 1C 11 FF 45 EC 8B 4D E0 8B 45 D8 03 7D CC 03 75 C8 01 4D C4 39 45 EC 0F 82 3C FF FF FF
-***** EXPENSIVE 2435 764
-
-. 2434 805B3C0 151
-. 8B 55 EC 01 CA 8B 45 0C 0F AF C1 89 55 D0 8B 55 08 D9 04 82 8D 04 8D 04 00 00 00 0F AF 45 0C D9 04 10 8B 45 0C 0F AF 45 D0 D9 04 82 8B 45 D0 8D 14 85 04 00 00 00 0F AF 55 0C 8B 45 08 D9 04 02 D9 C5 D9 C5 D8 CA D9 C9 D8 CB DE E1 D9 C6 DE CA D9 CA D8 CD DE C1 8B 45 14 D9 C3 0F AF C6 8B 55 10 D8 C2 D9 1C 82 D9 C2 8D 04 B5 04 00 00 00 0F AF 45 14 D8 C1 D9 1C 10 D9 CB 8B 45 14 0F AF C7 DE E1 D9 1C 82 DE E1 8D 04 BD 04 00 00 00 0F AF 45 14 D9 E0 D9 1C 10
-
-. 2435 805B457 24
-. FF 45 F0 8B 45 E8 03 7D 18 03 75 18 03 4D E4 39 45 F0 0F 82 51 FF FF FF
-***** EXPENSIVE 2437 765
-
-. 2436 80564FC 151
-. 8B 45 0C 8B 55 08 0F AF C6 D9 04 82 8D 04 B5 04 00 00 00 0F AF 45 0C D9 04 10 8B 45 0C 0F AF C7 D9 04 82 8D 04 BD 04 00 00 00 0F AF 45 0C D9 04 10 8B 4D F0 8B 55 C4 8D 44 4A FF 8B 4D E8 8B 55 14 01 C1 0F AF D0 D9 C3 D9 C3 D9 CD 8D 04 85 04 00 00 00 D8 E3 D9 CC D8 C2 D9 C9 89 4D B0 0F AF 45 14 8B 4D 10 DE C3 D9 CC DE E1 D9 C4 D9 C6 D9 CB D9 1C 91 D9 CA D8 CB D9 C9 D9 1C 08 D9 C9 D8 CB 8B 45 14 0F AF 45 B0 DE E9 D9 1C 81 8B 45 B0 8D 0C 85 04 00 00 00
-***** EXPENSIVE 2438 766
-
-. 2437 8056593 45
-. D8 CA D9 C9 D8 CB 0F AF 4D 14 DE C1 8B 55 10 D9 1C 11 FF 45 EC 8B 4D E0 8B 45 D8 03 7D CC 03 75 C8 01 4D C4 39 45 EC 0F 82 3C FF FF FF
-***** EXPENSIVE 2439 767
-
-. 2438 8054440 169
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-***** EXPENSIVE 2440 768
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-. 2439 80544E9 165
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-***** EXPENSIVE 2441 769
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-. 2440 805458E 152
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-***** EXPENSIVE 2442 770
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-. 2441 8054626 59
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-***** EXPENSIVE 2443 771
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-. 2442 8056C30 178
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-***** EXPENSIVE 2444 772
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-. 2443 8056CE2 144
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-***** EXPENSIVE 2445 773
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-. 2444 8056D72 132
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-***** EXPENSIVE 2446 774
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-. 2445 8056DF6 120
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-***** EXPENSIVE 2447 775
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-. 2446 804ED74 195
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-***** EXPENSIVE 2448 776
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-. 2447 804EE37 182
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-***** EXPENSIVE 2449 777
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-. 2448 804EEED 178
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-***** EXPENSIVE 2450 778
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-. 2449 804EF9F 217
-. D8 C9 D9 CB DE C9 DD 85 D8 FE FF FF DC A5 F8 FE FF FF DD 85 98 FE FF FF DE C9 DD 85 D0 FE FF FF DC A5 F0 FE FF FF D9 C9 DD 9D A0 FE FF FF DD 85 98 FE FF FF DE C9 DD 85 C8 FD FF FF DC 65 A0 D9 C9 DD 9D 90 FE FF FF DC B5 A8 FD FF FF DD 85 88 FE FF FF D9 C9 DC 8D 80 FE FF FF D9 C9 DC 85 E8 FE FF FF D8 C9 DD 9D 88 FE FF FF DD 85 78 FE FF FF DC 85 E0 FE FF FF DE C9 DD 9D 78 FE FF FF DD 85 D0 FD FF FF DC 65 A8 DC 45 A0 DC B5 A8 FD FF FF DD 85 E8 FE FF FF D9 C9 DC 8D 80 FE FF FF D9 C9 D8 E7 D8 C9 DD 9D 70 FE FF FF DD 85 E0 FE FF FF DC A5 80 FD FF FF DE C9 DD 9D 68 FE FF FF DD 45 B0 DC A5 C0 FD FF FF DC 65 A0 DC B5 A8 FD FF FF DD 85 80 FD FF FF D9 C9
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-. 2450 804F078 220
-. DC 8D 80 FE FF FF D9 CF D8 E3 D9 C9 D8 E6 D9 C9 D8 CF D9 C9 DE CF DD 85 C8 FD FF FF DC 85 B8 FD FF FF DC B5 A8 FD FF FF DC 8D 80 FE FF FF D9 CB DC A5 E8 FE FF FF D9 CE DC A5 E0 FE FF FF D9 CE D8 CB D9 CE DE CB DD 85 B8 FE FF FF DC 85 60 FE FF FF DD 9D 60 FE FF FF DD 85 B0 FE FF FF D8 C4 8B 95 B4 FE FF FF 8B 85 B0 FE FF FF 81 F2 00 00 00 80 DD 9D 58 FE FF FF DD 85 A8 FE FF FF 89 85 48 FE FF FF 89 95 4C FE FF FF D8 C2 DD 9D 50 FE FF FF 8B 95 AC FE FF FF DD 85 48 FE FF FF DC A5 A0 FE FF FF D9 CD 81 F2 00 00 00 80 8B 85 A8 FE FF FF DC 85 C0 FE FF FF D9 CC DC AD A0 FE FF FF D9 CA DC AD 90 FE FF FF D9 CD DD 9D 48 FE FF FF 89 85 40 FE FF FF 89 95 44 FE FF FF
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-. 2451 804F154 204
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-. 2452 804F220 190
-. DC A5 68 FE FF FF D9 CB DC A5 38 FE FF FF D9 CF DC 85 88 FE FF FF D9 CE DC 85 78 FE FF FF D9 C9 DC 85 88 FE FF FF D9 CD DC 85 60 FE FF FF D9 CB DC 85 78 FE FF FF D9 CA DD 9D 30 FE FF FF D9 CE DD 9D 28 FE FF FF DD 85 48 FE FF FF DD 85 40 FE FF FF D9 C9 D8 C2 D9 C9 D8 E5 D9 C9 DD 9D 20 FE FF FF DD 9D 18 FE FF FF D9 C2 D9 C2 D9 C9 D8 E7 D9 C9 D8 C6 D9 C9 8B 85 98 FD FF FF DD 9D 10 FE FF FF DD 9D 08 FE FF FF DD 85 C0 FE FF FF DD 85 B8 FE FF FF D9 C9 DD 1C 07 DD 5C 07 08 8B 45 E8 03 45 D4 DD 45 98 DD 45 90 0F AF 45 14 DC 8D 28 FE FF FF D9 C9 DC 8D 30 FE FF FF C1 E0 04
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-. 2453 804F2DE 181
-. DE E1 DD 1C 07 DD 45 90 DD 45 98 D9 C9 DC 8D 30 FE FF FF D9 C9 DC 8D 28 FE FF FF DE C1 DD 5C 07 08 8B 45 E8 03 85 04 FE FF FF DD 45 88 DD 45 80 D9 CC DE C7 D9 CB 0F AF 45 14 DC 8D 18 FE FF FF DD 85 40 FE FF FF D9 CC DC 8D 20 FE FF FF D9 CB C1 E0 04 DE E6 D9 CB DE C4 D9 C9 DE E2 DD 85 58 FE FF FF DD 85 50 FE FF FF D9 CA DC AD 48 FE FF FF D9 C9 DC A5 88 FD FF FF D9 CA DC 85 38 FE FF FF D9 CB DD 1C 07 DD 45 88 DD 45 80 DC 8D 20 FE FF FF D9 C9 DC 8D 18 FE FF FF DE C1 DD 5C 07 08 8B 45 E8 03 85 00 FE FF FF DD 85 78 FF FF FF DD 85 70 FF FF FF
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-. 2454 804F393 181
-. 0F AF 45 14 DC 8D 08 FE FF FF D9 C9 DC 8D 10 FE FF FF C1 E0 04 DE E1 DD 1C 07 DD 85 70 FF FF FF DD 85 78 FF FF FF D9 C9 DC 8D 10 FE FF FF D9 C9 DC 8D 08 FE FF FF DE C1 DD 5C 07 08 8B 45 E8 03 85 FC FD FF FF DD 85 68 FF FF FF DD 85 60 FF FF FF 0F AF 45 14 D8 CE D9 C9 D8 CF D9 CE DC 8D 68 FF FF FF D9 CF DC 8D 60 FF FF FF D9 CE C1 E0 04 DE E1 D9 CE DE C5 D9 CD DD 1C 07 D9 CB DD 5C 07 08 8B 45 E8 03 85 F8 FD FF FF DD 85 58 FF FF FF DD 85 50 FF FF FF 0F AF 45 14 D8 CB D9 C9 D8 CD D9 CB DC 8D 58 FF FF FF D9 CD DC 8D 50 FF FF FF D9 CB C1 E0 04
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-. 2455 804F448 130
-. DE E1 D9 CC DE C2 D9 CB DD 1C 07 DD 5C 07 08 8B 45 E8 03 85 F4 FD FF FF DD 85 48 FF FF FF DD 85 40 FF FF FF D9 C9 0F AF 45 14 D8 CA D9 C9 D8 CB D9 CA DC 8D 40 FF FF FF D9 CB DC 8D 48 FF FF FF D9 C9 C1 E0 04 DE E2 DE C2 DD 1C 07 DD 5C 07 08 8B 45 0C C1 E0 04 01 C1 8B 45 0C 01 85 A0 FD FF FF 8B 45 14 C1 E0 04 FF 45 E0 8B 55 D4 FF 45 EC 01 85 98 FD FF FF FF 45 E8 39 55 E0 0F 82 AA F8 FF FF
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-. 2456 8052110 186
-. 8B 45 E8 03 45 D8 0F AF 45 0C D9 04 C6 D9 44 C6 04 8B 45 E8 03 85 7C FF FF FF 0F AF 45 0C D9 04 C6 D9 44 C6 04 8B 45 E8 03 85 70 FF FF FF 0F AF 45 0C D9 04 C6 D9 44 C6 04 D9 CB 8B 45 E8 03 85 68 FF FF FF 0F AF 45 0C D9 5D 80 D9 9D 74 FF FF FF D9 44 C6 04 D9 04 C6 8B 45 E8 03 85 5C FF FF FF 0F AF 45 0C D9 44 C6 04 D9 CB D9 9D 78 FF FF FF D9 04 C6 D9 CC 8B 45 E8 03 85 58 FF FF FF 0F AF 45 0C D9 9D 6C FF FF FF D9 C9 D9 9D 64 FF FF FF D9 C4 D9 04 C6 DC C1 D9 CC D9 9D 60 FF FF FF D9 44 C6 04 D9 C9 D9 9D 54 FF FF FF D9 C4 D8 C1 D9 CD DE E1 D9 85 78 FF FF FF
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-. 2457 80521CA 204
-. D9 CE DE E4 D9 CD D8 C2 D9 45 80 D8 85 60 FF FF FF D9 C9 D9 9D 40 FF FF FF D9 CA D8 AD 78 FF FF FF D9 CB D9 9D 4C FF FF FF D9 85 64 FF FF FF D9 85 74 FF FF FF D8 C2 D9 CB D9 9D 44 FF FF FF D9 CB D9 9D 38 FF FF FF D8 A5 74 FF FF FF D9 CA D8 A5 6C FF FF FF D9 CB D9 9D 50 FF FF FF D9 C9 D9 9D 30 FF FF FF D9 85 64 FF FF FF D9 CA D9 95 2C FF FF FF D9 85 44 FF FF FF D9 C9 D8 85 38 FF FF FF D9 85 40 FF FF FF D9 CC D8 85 6C FF FF FF D9 CA D8 85 54 FF FF FF D9 CC D8 85 50 FF FF FF D9 45 80 D9 CA D9 9D 20 FF FF FF D9 44 D6 04 D9 CA D8 A5 60 FF FF FF D9 CB D9 9D 34 FF FF FF D9 CC D9 95 28 FF FF FF D9 85 30 FF FF FF
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-. 2458 8052296 186
-. D9 C9 D8 04 D6 D9 CA D8 C5 D9 C9 D8 C3 D9 CA D8 C4 D9 C9 D8 85 34 FF FF FF D9 CE D9 95 48 FF FF FF D9 CB D9 9D 3C FF FF FF D9 C9 D9 9D 24 FF FF FF D9 9D 1C FF FF FF D9 CB D9 9D 18 FF FF FF D9 85 88 FE FF FF D8 45 C0 DD 85 78 FE FF FF DE F9 DC A5 70 FE FF FF D9 85 28 FF FF FF D8 C2 D9 C1 DE C9 D9 9D E0 FE FF FF DD 85 68 FE FF FF D9 CB D8 85 34 FF FF FF D9 CB D8 C0 D9 C9 DE CB DC A5 60 FE FF FF D9 CA D9 9D DC FE FF FF D9 C9 DC A5 58 FE FF FF D9 85 54 FF FF FF D9 C9 DC B5 78 FE FF FF D9 C9 D8 E2 D8 C9 D9 9D 14 FF FF FF D9 85 50 FF FF FF D8 A5 34 FF FF FF
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-. 2459 8052350 213
-. DE C9 D9 9D 10 FF FF FF DD 85 60 FE FF FF D8 C0 DC AD 68 FE FF FF DC 85 58 FE FF FF D9 85 34 FF FF FF D9 C9 DC B5 78 FE FF FF D9 C9 D8 A5 40 FF FF FF D9 C1 DE C9 D9 CA D8 A5 44 FF FF FF D9 CA D9 9D 08 FF FF FF DD 85 58 FE FF FF D9 C9 DE CA D8 C0 D9 C9 D9 9D 0C FF FF FF D8 AD 88 FE FF FF D9 85 44 FF FF FF D9 C9 DC B5 78 FE FF FF D9 C9 D8 A5 54 FF FF FF D9 9D 44 FF FF FF D9 C0 D8 8D 44 FF FF FF D9 9D 04 FF FF FF D9 85 40 FF FF FF D8 A5 50 FF FF FF DE C9 D9 9D 00 FF FF FF D9 85 84 FE FF FF D8 65 B4 DD 85 78 FE FF FF DE F9 DC 8D F0 FE FF FF D9 85 24 FF FF FF D8 85 4C FF FF FF D9 C1 DE C9 D9 9D FC FE FF FF D9 85 20 FF FF FF D8 C2 DE C9
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-. 2460 8052425 219
-. DD 85 50 FE FF FF D8 C0 DC A5 48 FE FF FF DC 85 40 FE FF FF D9 C9 D9 9D EC FE FF FF DC B5 78 FE FF FF D9 85 4C FF FF FF D9 C9 DC 8D F0 FE FF FF D9 C9 D8 A5 30 FF FF FF D8 C9 D9 9D E8 FE FF FF D9 C1 D8 A5 2C FF FF FF DE C9 D9 9D E4 FE FF FF DD 85 48 FE FF FF D8 C0 DC AD 50 FE FF FF DC A5 40 FE FF FF D9 85 30 FF FF FF D9 C9 DC B5 78 FE FF FF DC 8D F0 FE FF FF D9 C9 D8 A5 3C FF FF FF D9 9D 30 FF FF FF D9 85 2C FF FF FF D9 C1 D8 8D 30 FF FF FF D9 C9 D8 A5 38 FF FF FF D9 C9 D9 5D EC DE C9 D9 45 EC D9 C9 D9 5D EC DD 85 40 FE FF FF D8 C0 D8 85 84 FE FF FF DC B5 78 FE FF FF DC 8D F0 FE FF FF D9 85 3C FF FF FF D8 A5 4C FF FF FF D9 C1 DE C9 D9 85 1C FF FF FF
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-. 2461 8052500 213
-. D8 85 E0 FE FF FF D9 85 38 FF FF FF DE E5 D9 9D E0 FE FF FF D9 85 14 FF FF FF D9 CA DE CC D9 C9 D8 85 0C FF FF FF D9 85 18 FF FF FF D8 85 DC FE FF FF D9 C9 D9 9D D8 FE FF FF D9 85 04 FF FF FF D8 A5 0C FF FF FF D9 C9 D9 9D DC FE FF FF D9 85 10 FF FF FF D8 85 08 FF FF FF D9 C9 D9 9D D0 FE FF FF D9 85 10 FF FF FF D9 45 EC D9 CA D9 9D D4 FE FF FF D9 CA D9 5D EC D9 85 00 FF FF FF D9 85 14 FF FF FF D9 CB D9 E0 D9 45 EC D9 CA D8 A5 08 FF FF FF D9 CE D9 5D EC D8 A5 00 FF FF FF D9 CB D9 E0 D9 45 EC D9 CE D9 9D CC FE FF FF D8 A5 04 FF FF FF D9 CB D9 9D C8 FE FF FF D9 85 E8 FE FF FF D8 C4 D9 9D C4 FE FF FF D9 85 E0 FE FF FF D8 85 D8 FE FF FF
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-. 2462 80525D5 212
-. D9 9D D8 FE FF FF D9 85 DC FE FF FF D8 85 D4 FE FF FF D9 9D D4 FE FF FF D9 85 E0 FE FF FF D8 85 D0 FE FF FF D9 9D D0 FE FF FF D9 85 DC FE FF FF D8 85 CC FE FF FF D9 9D CC FE FF FF D9 85 DC FE FF FF D8 85 C8 FE FF FF D9 85 E4 FE FF FF D9 C9 D9 9D C8 FE FF FF D9 85 C4 FE FF FF D8 85 FC FE FF FF D9 C9 D8 C3 D9 C9 D9 9D C4 FE FF FF D8 85 EC FE FF FF D9 85 D8 FE FF FF D8 C1 D9 CD D8 EA D9 CB D8 EE D9 CD D9 9D C0 FE FF FF D9 C9 D9 E0 D9 85 D4 FE FF FF D9 CE D9 E0 D9 C9 D8 A5 E8 FE FF FF D9 C9 D8 A5 E4 FE FF FF D9 CE D8 A5 C4 FE FF FF D9 CB D8 85 FC FE FF FF D9 C9 D8 85 FC FE FF FF D9 CE D8 85 EC FE FF FF D9 CC D8 85 E0 FE FF FF D9 CD
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-. 2463 80526A9 184
-. D8 85 EC FE FF FF D9 CB D9 9D BC FE FF FF D9 85 C8 FE FF FF D8 E6 D9 9D B8 FE FF FF D9 85 D0 FE FF FF D8 E3 D9 CB D8 85 D0 FE FF FF D9 CA D8 AD D8 FE FF FF D9 CB D9 9D B4 FE FF FF D9 C9 D9 9D AC FE FF FF D9 85 CC FE FF FF D9 85 CC FE FF FF D9 C9 D8 C2 D9 C9 DE E2 D9 C4 D9 85 C8 FE FF FF D9 CC D9 9D A4 FE FF FF D9 85 D4 FE FF FF D9 CE D8 E5 D9 C9 DE C5 D9 CB DE C6 D9 CC D8 85 C4 FE FF FF D9 85 1C FF FF FF D9 85 18 FF FF FF D9 C9 D9 1C CF D9 5C CF 04 D9 CC D9 9D B0 FE FF FF D9 CB D9 9D A0 FE FF FF 8B 45 E4 D9 45 B0 D9 45 AC D9 45 B0 D9 45 AC D9 CA
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-. 2464 8052761 175
-. 03 45 D0 D8 8D BC FE FF FF D9 CA D8 8D C0 FE FF FF D9 CB D8 8D C0 FE FF FF D9 C9 D8 8D BC FE FF FF D9 C9 0F AF 45 14 DE E2 DE C2 D9 1C C7 D9 5C C7 04 D9 45 A8 8B 45 E4 D9 45 A4 03 85 9C FE FF FF D8 8D B8 FE FF FF D9 C9 D8 CB 0F AF 45 14 DE E1 D9 C9 D9 95 A8 FE FF FF D9 C9 D9 1C C7 D9 45 A8 D8 8D B8 FE FF FF D9 CA D8 4D A4 DE C2 D9 45 9C D9 45 A0 D9 C9 D8 8D B0 FE FF FF D9 C9 D8 8D B4 FE FF FF D9 CB D9 54 C7 04 D9 CB DE E1 8B 45 E4 D9 45 A0 D9 45 9C 03 85 98 FE FF FF D8 8D B4 FE FF FF D9 C9 D8 8D B0 FE FF FF 0F AF 45 14
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-. 2465 8052810 153
-. DE C1 D9 C9 D9 1C C7 D9 5C C7 04 D9 45 98 8B 45 E4 D9 45 94 D9 45 94 D9 C9 03 85 94 FE FF FF D8 CD D9 CA D8 8D AC FE FF FF D9 CD D8 4D 98 D9 C9 D8 8D AC FE FF FF D9 CD 0F AF 45 14 DE E2 DE C4 D9 1C C7 D9 CA D9 5C C7 04 D9 45 90 8B 45 E4 D9 45 8C 03 85 90 FE FF FF D8 CC D9 C9 D8 CB 0F AF 45 14 DE E1 D9 C9 D9 9D B8 FE FF FF D9 1C C7 D9 45 8C DE C9 D9 C9 D8 4D 90 DE C1 D9 45 84 D9 45 88 D9 C9 D8 8D A0 FE FF FF D9 C9 D8 8D A4 FE FF FF D9 CA D9 5C C7 04 DE E9
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-. 2466 80528A9 73
-. 8B 45 E4 D9 45 88 D9 45 84 D9 C9 03 85 8C FE FF FF D8 8D A0 FE FF FF D9 C9 D8 8D A4 FE FF FF 0F AF 45 14 DE C1 D9 C9 D9 1C C7 D9 5C C7 04 FF 45 DC 8B 45 D0 03 55 0C FF 45 E8 03 4D 14 FF 45 E4 39 45 DC 0F 82 1E F8 FF FF
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-. 2467 804CD1C 10
-. 31 D2 89 C8 F7 F6 85 D2 74 0F
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-. 2468 805A1A3 101
-. 8B 45 14 8B 8D 0C FF FF FF 8B BD 10 FF FF FF DD 85 40 FF FF FF DD 85 38 FF FF FF D9 C9 0F AF 85 04 FF FF FF 8B 95 08 FF FF FF 49 4F DD 5D B8 DD 5D B0 C7 45 D0 00 00 00 00 89 45 A8 8B 75 18 89 55 AC 89 8D E4 FE FF FF 89 BD 00 FF FF FF 8B 45 D0 DD 85 38 FF FF FF 85 C0 D9 C0 DD 85 40 FF FF FF D9 C2 74 30
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-. 2469 8055222 28
-. 8B 45 D8 40 C7 45 E4 01 00 00 00 89 85 6C FF FF FF D1 E8 39 45 E4 0F 83 85 02 00 00
-
-. 2470 805523E 19
-. C7 45 E0 00 00 00 00 8B 55 D4 39 55 E0 0F 83 5E 02 00 00
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-. 2471 8055251 95
-. DD 83 34 F6 FF FF DD 83 44 F6 FF FF D9 C9 DD 9D 60 FF FF FF DD 9D 58 FF FF FF C7 85 28 FF FF FF 00 00 00 00 C7 85 24 FF FF FF 00 00 00 00 C7 85 20 FF FF FF 00 00 00 00 C7 45 D0 00 00 00 00 8B 45 18 DD 85 60 FF FF FF DD 85 58 FF FF FF D9 C9 39 45 D0 DD 5D A8 DD 5D A0 0F 83 D8 01 00 00
-***** EXPENSIVE 2473 798
-
-. 2472 80552B0 87
-. 8B 95 6C FF FF FF D1 EA 8B 45 E4 29 D0 40 8B BD 24 FF FF FF 8B 8D 20 FF FF FF 89 85 2C FF FF FF 0F AF 7D D8 8B 85 28 FF FF FF 89 55 94 89 4D 90 C7 85 30 FF FF FF 00 00 00 00 89 7D 9C 89 45 98 8B 45 D0 DD 85 58 FF FF FF 85 C0 D9 C0 DD 85 60 FF FF FF D9 C2 74 30
-
-. 2473 8055337 11
-. 31 F6 3B 75 18 0F 83 83 04 00 00
-
-. 2474 8055342 46
-. 8B 45 98 0F AF 45 D8 89 85 F0 FE FF FF 8B 7D D8 8B 45 E4 D1 E0 8B 55 9C D1 E7 29 85 F0 FE FF FF 8D 4C 02 FF 89 BD 34 FF FF FF 85 F6 74 20
-
-. 2475 8055390 13
-. 8B 45 18 29 F0 39 C6 0F 83 F7 03 00 00
-***** EXPENSIVE 2477 799
-
-. 2476 805539D 72
-. 8B 45 0C 0F AF C1 8B 55 08 DD 04 C2 8D 04 CD 08 00 00 00 0F AF 45 0C DD 04 10 D9 C3 D9 C3 D9 C9 D8 CB D9 C9 D8 CA D9 CB D8 CC D9 CA D8 CD D9 C9 46 DE E3 DE C1 D9 CD 03 8D 34 FF FF FF 3B 75 18 DE C1 D9 CB DE C4 73 0B
-***** EXPENSIVE 2478 800
-
-. 2477 80553E5 11
-. D9 CA D9 CB D9 CA E9 7C FF FF FF
-
-. 2478 805536C 4
-. 85 F6 74 20
-***** EXPENSIVE 2480 801
-
-. 2479 8055370 45
-. DD 45 A8 D8 CA DD 45 A0 DD 45 A0 D9 C9 D8 CB D9 C9 DE CC D9 CA DC 4D A8 D9 C9 DE E2 DE C2 D9 C9 8B 45 18 29 F0 39 C6 0F 83 F7 03 00 00
-***** EXPENSIVE 2481 802
-
-. 2480 8055794 49
-. 8B BD F0 FE FF FF 0F AF 45 D8 8D 44 47 FF 8B 55 0C 0F AF D0 8D 04 C5 08 00 00 00 8B 7D 08 0F AF 45 0C DD 04 38 DD 04 D7 D9 C9 D9 E0 E9 F2 FB FF FF
-***** EXPENSIVE 2482 803
-
-. 2481 80553B7 46
-. D9 C3 D9 C3 D9 C9 D8 CB D9 C9 D8 CA D9 CB D8 CC D9 CA D8 CD D9 C9 46 DE E3 DE C1 D9 CD 03 8D 34 FF FF FF 3B 75 18 DE C1 D9 CB DE C4 73 0B
-***** EXPENSIVE 2483 804
-
-. 2482 80553F0 11
-. DD D8 DD D8 8B 45 E4 85 C0 74 0B
-
-. 2483 80553FB 11
-. 8B 45 D0 85 C0 0F 85 74 03 00 00
-***** EXPENSIVE 2485 805
-
-. 2484 8055406 130
-. DD 85 60 FF FF FF DD 85 58 FF FF FF 8B 55 E4 8B 4D 90 8D 04 51 8B BD 30 FF FF FF 8D 44 07 FF D9 C1 D9 C1 D9 C9 8B 55 14 0F AF D0 D8 CC D9 C9 D8 CD D9 CB 8D 04 C5 08 00 00 00 DE CD D9 C9 DE CB 8B 4D 10 0F AF 45 14 DE E1 D9 CA DE C1 D9 C9 DD 1C D1 DD 1C 08 8B 45 DC 01 C7 8B 8D 2C FF FF FF 89 BD 30 FF FF FF 8B 55 94 FF 45 D0 8B 7D 18 8D 54 11 FF 39 7D D0 89 95 2C FF FF FF 0F 82 68 FE FF FF
-***** EXPENSIVE 2486 806
-
-. 2485 80552F0 23
-. 8B 45 D0 DD 85 58 FF FF FF 85 C0 D9 C0 DD 85 60 FF FF FF D9 C2 74 30
-***** EXPENSIVE 2487 807
-
-. 2486 8055307 59
-. DD 45 A8 DD 45 A0 DD 45 A8 DD 45 A0 D9 CB DC 4D C8 D9 CA DC 4D C0 D9 C9 DC 4D C0 D9 CB DC 4D C8 D9 CA DE E1 D9 CA DE C1 D9 C9 DD 5D A8 DD 5D A0 31 F6 3B 75 18 0F 83 83 04 00 00
-***** EXPENSIVE 2488 808
-
-. 2487 805577A 23
-. 8B 85 2C FF FF FF C1 E0 04 03 45 24 DD 40 F0 DD 40 F8 E9 81 FC FF FF
-***** EXPENSIVE 2489 809
-
-. 2488 8055412 118
-. 8B 55 E4 8B 4D 90 8D 04 51 8B BD 30 FF FF FF 8D 44 07 FF D9 C1 D9 C1 D9 C9 8B 55 14 0F AF D0 D8 CC D9 C9 D8 CD D9 CB 8D 04 C5 08 00 00 00 DE CD D9 C9 DE CB 8B 4D 10 0F AF 45 14 DE E1 D9 CA DE C1 D9 C9 DD 1C D1 DD 1C 08 8B 45 DC 01 C7 8B 8D 2C FF FF FF 89 BD 30 FF FF FF 8B 55 94 FF 45 D0 8B 7D 18 8D 54 11 FF 39 7D D0 89 95 2C FF FF FF 0F 82 68 FE FF FF
-
-. 2489 8055488 39
-. 8B 45 18 8B 55 D8 FF 45 E0 8B 4D D4 01 85 28 FF FF FF 01 85 24 FF FF FF 01 95 20 FF FF FF 39 4D E0 0F 82 DA FD FF FF
-
-. 2490 80554AF 20
-. 8B 85 6C FF FF FF FF 45 E4 D1 E8 39 45 E4 0F 82 7B FD FF FF
-
-. 2491 80554C3 13
-. F7 45 D8 01 00 00 00 0F 85 77 02 00 00
-***** EXPENSIVE 2493 810
-
-. 2492 805C9E0 95
-. 8B 45 14 8B B5 4C FF FF FF 8B BD 50 FF FF FF D9 45 80 D9 85 7C FF FF FF D9 C9 0F AF 85 44 FF FF FF 8B 95 48 FF FF FF 4E 4F D9 5D C0 D9 5D BC C7 45 CC 00 00 00 00 89 45 B4 8B 4D 18 89 55 B8 89 B5 24 FF FF FF 89 BD 40 FF FF FF 8B 45 CC D9 85 7C FF FF FF 85 C0 D9 C0 D9 45 80 D9 C2 74 30
-
-. 2493 8057B1F 25
-. 8B 45 D4 40 C7 45 E0 01 00 00 00 89 45 8C D1 E8 39 45 E0 0F 83 6A 02 00 00
-
-. 2494 8057B38 19
-. C7 45 DC 00 00 00 00 8B 55 D0 39 55 DC 0F 83 46 02 00 00
-***** EXPENSIVE 2496 811
-
-. 2495 8057B4B 83
-. D9 83 4C F6 FF FF D9 83 50 F6 FF FF D9 C9 D9 5D 88 D9 5D 84 C7 85 54 FF FF FF 00 00 00 00 C7 85 50 FF FF FF 00 00 00 00 C7 85 4C FF FF FF 00 00 00 00 C7 45 CC 00 00 00 00 8B 45 18 D9 45 88 D9 45 84 D9 C9 39 45 CC D9 5D B4 D9 5D B0 0F 83 CC 01 00 00
-***** EXPENSIVE 2497 812
-
-. 2496 8057B9E 79
-. 8B 55 8C D1 EA 8B 45 E0 29 D0 40 8B BD 50 FF FF FF 8B 8D 4C FF FF FF 89 85 58 FF FF FF 0F AF 7D D4 8B 85 54 FF FF FF 89 55 A4 89 4D A0 C7 85 5C FF FF FF 00 00 00 00 89 7D AC 89 45 A8 90 8B 45 CC D9 45 84 85 C0 D9 C0 D9 45 88 D9 C2 74 30
-
-. 2497 8057C1D 11
-. 31 F6 3B 75 18 0F 83 41 04 00 00
-
-. 2498 8057C28 48
-. 8B 45 A8 0F AF 45 D4 89 85 10 FF FF FF 8B 7D D4 8B 45 E0 D1 E0 8B 55 AC D1 E7 29 85 10 FF FF FF 8D 4C 02 FF 89 BD 60 FF FF FF 89 F6 85 F6 74 20
-
-. 2499 8057C78 13
-. 8B 45 18 29 F0 39 C6 0F 83 B3 03 00 00
-***** EXPENSIVE 2501 813
-
-. 2500 8057C85 72
-. 8B 45 0C 0F AF C1 8B 55 08 D9 04 82 8D 04 8D 04 00 00 00 0F AF 45 0C D9 04 10 D9 C3 D9 C3 D9 C9 D8 CB D9 C9 D8 CA D9 CB D8 CC D9 CA D8 CD D9 C9 46 DE E3 DE C1 D9 CD 03 8D 60 FF FF FF 3B 75 18 DE C1 D9 CB DE C4 73 0B
-***** EXPENSIVE 2502 814
-
-. 2501 8057CCD 11
-. D9 CA D9 CB D9 CA E9 7C FF FF FF
-
-. 2502 8057C54 4
-. 85 F6 74 20
-***** EXPENSIVE 2504 815
-
-. 2503 8057C58 45
-. D9 45 B4 D8 CA D9 45 B0 D9 45 B0 D9 C9 D8 CB D9 C9 DE CC D9 CA D8 4D B4 D9 C9 DE E2 DE C2 D9 C9 8B 45 18 29 F0 39 C6 0F 83 B3 03 00 00
-***** EXPENSIVE 2505 816
-
-. 2504 8058038 49
-. 8B BD 10 FF FF FF 0F AF 45 D4 8D 44 47 FF 8B 55 0C 0F AF D0 8D 04 85 04 00 00 00 8B 7D 08 0F AF 45 0C D9 04 38 D9 04 97 D9 C9 D9 E0 E9 36 FC FF FF
-***** EXPENSIVE 2506 817
-
-. 2505 8057C9F 46
-. D9 C3 D9 C3 D9 C9 D8 CB D9 C9 D8 CA D9 CB D8 CC D9 CA D8 CD D9 C9 46 DE E3 DE C1 D9 CD 03 8D 60 FF FF FF 3B 75 18 DE C1 D9 CB DE C4 73 0B
-***** EXPENSIVE 2507 818
-
-. 2506 8057CD8 11
-. DD D8 DD D8 8B 45 E0 85 C0 74 0B
-
-. 2507 8057CE3 11
-. 8B 45 CC 85 C0 0F 85 33 03 00 00
-***** EXPENSIVE 2509 819
-
-. 2508 8057CEE 124
-. D9 45 88 D9 45 84 8B 7D E0 8B 55 A0 8D 04 7A 8B 8D 5C FF FF FF 8D 44 01 FF D9 C1 D9 C1 D9 C9 8B 55 14 0F AF D0 D8 CC D9 C9 D8 CD D9 CB 8D 04 85 04 00 00 00 DE CD D9 C9 DE CB 8B 7D 10 0F AF 45 14 DE E1 D9 CA DE C1 D9 C9 D9 1C 97 D9 1C 38 8B 45 D8 01 C1 89 8D 5C FF FF FF 8B 55 A4 8B 8D 58 FF FF FF FF 45 CC 8B 7D 18 8D 54 11 FF 39 7D CC 89 95 58 FF FF FF 0F 82 72 FE FF FF
-***** EXPENSIVE 2510 820
-
-. 2509 8057BDC 17
-. 8B 45 CC D9 45 84 85 C0 D9 C0 D9 45 88 D9 C2 74 30
-***** EXPENSIVE 2511 821
-
-. 2510 8057BED 59
-. D9 45 B4 D9 45 B0 D9 45 B4 D9 45 B0 D9 CB D8 4D C8 D9 CA D8 4D C4 D9 C9 D8 4D C4 D9 CB D8 4D C8 D9 CA DE E1 D9 CA DE C1 D9 C9 D9 5D B4 D9 5D B0 31 F6 3B 75 18 0F 83 41 04 00 00
-***** EXPENSIVE 2512 822
-
-. 2511 8058021 23
-. 8B 95 58 FF FF FF 8B 4D 24 8D 04 D1 D9 40 F8 D9 40 FC E9 BC FC FF FF
-***** EXPENSIVE 2513 823
-
-. 2512 8057CF4 118
-. 8B 7D E0 8B 55 A0 8D 04 7A 8B 8D 5C FF FF FF 8D 44 01 FF D9 C1 D9 C1 D9 C9 8B 55 14 0F AF D0 D8 CC D9 C9 D8 CD D9 CB 8D 04 85 04 00 00 00 DE CD D9 C9 DE CB 8B 7D 10 0F AF 45 14 DE E1 D9 CA DE C1 D9 C9 D9 1C 97 D9 1C 38 8B 45 D8 01 C1 89 8D 5C FF FF FF 8B 55 A4 8B 8D 58 FF FF FF FF 45 CC 8B 7D 18 8D 54 11 FF 39 7D CC 89 95 58 FF FF FF 0F 82 72 FE FF FF
-
-. 2513 8057D6A 39
-. 8B 45 18 8B 55 D4 FF 45 DC 8B 4D D0 01 85 54 FF FF FF 01 85 50 FF FF FF 01 95 4C FF FF FF 39 4D DC 0F 82 EC FD FF FF
-
-. 2514 8057D91 17
-. 8B 45 8C FF 45 E0 D1 E8 39 45 E0 0F 82 96 FD FF FF
-
-. 2515 8057DA2 13
-. F7 45 D4 01 00 00 00 0F 85 42 02 00 00
-***** EXPENSIVE 2517 824
-
-. 2516 8059ADC 206
-. 8B 95 CC FE FF FF 03 55 E4 8B 75 E4 8D 0C 16 8D 34 0E 8B 7D E4 01 F7 8B 45 0C 89 BD 9C FE FF FF 0F AF 85 CC FE FF FF 8B 7D 08 DD 04 C7 8B 85 CC FE FF FF 8D 04 C5 08 00 00 00 0F AF 45 0C DD 9D 78 FF FF FF DD 04 38 8B 45 0C 0F AF C2 DD 04 C7 8B 45 0C 0F AF C1 DD 04 C7 8B 45 0C 0F AF C6 DD 04 C7 8B 45 0C 0F AF 85 9C FE FF FF 8D 14 D5 08 00 00 00 8D 0C CD 08 00 00 00 8D 34 F5 08 00 00 00 DD 04 C7 0F AF 55 0C 0F AF 4D 0C 0F AF 75 0C 8B 85 9C FE FF FF DD 04 3A DD 04 39 D9 CE DD 9D 70 FF FF FF DD 04 3E 8D 3C C5 08 00 00 00 0F AF 7D 0C 8B 55 08 DD 9D 68 FF FF FF DD 04 17 D9 CA DD 9D 60 FF FF FF D9 C9 DD 9D 58 FF FF FF
-***** EXPENSIVE 2518 825
-
-. 2517 8059BAA 152
-. DD 45 B8 DD 45 B0 D9 C9 D8 CD D9 C9 D8 CA DE E9 DD 9D 50 FF FF FF DD 45 A8 D8 CB DD 9D A8 FE FF FF DD 45 A0 D8 CD DC AD A8 FE FF FF D9 C9 DC 4D B8 D9 C9 DD 9D A8 FE FF FF D9 CB DC 4D B0 DD 45 98 DD 45 90 DC 8D 68 FF FF FF D9 CA DE C5 D8 CA D9 CC DD 9D 48 FF FF FF DE EB DD 45 88 DD 45 80 D9 CB DC 4D A0 D9 CB DC 8D 58 FF FF FF D9 CD DC 4D A8 D9 C9 DC 8D 60 FF FF FF D9 C9 DE C3 DD 45 98 D9 C9 DE E5 DD 45 80 DD 45 88 DD 85 A8 FE FF FF D9 CC DC 4D 90 D9 CA
-***** EXPENSIVE 2519 826
-
-. 2518 8059C42 180
-. DC 8D 60 FF FF FF D9 CB DC 8D 68 FF FF FF D9 C9 DC 8D 58 FF FF FF D9 CC D8 C6 D9 C9 DE C2 D9 CB DE C2 D9 CA DD 9D 40 FF FF FF DD 85 50 FF FF FF D9 C3 D9 C9 D8 C6 DD 85 48 FF FF FF D9 CA D8 C4 D9 CF DC AD 50 FF FF FF D9 CA D8 C3 D9 CF DD 9D 38 FF FF FF D9 C9 DD 9D 30 FF FF FF D9 C9 DC AD 48 FF FF FF DD 9D 28 FF FF FF DD 85 40 FF FF FF D8 C1 DD 9D 20 FF FF FF DD 85 38 FF FF FF D8 C5 DD 85 A8 FE FF FF D9 C9 DD 9D 18 FF FF FF DE E4 D9 CA DE E1 DD 85 E8 FE FF FF D9 FA DC 8D E0 FE FF FF D9 CA DC A5 40 FF FF FF DE CA DD 85 E8 FE FF FF D9 FA
-***** EXPENSIVE 2520 827
-
-. 2519 8059CF6 169
-. D9 CC DC A5 38 FF FF FF D9 CC DC 8D E0 FE FF FF DE CC DD 85 20 FF FF FF DC 8D E0 FE FF FF DC AD 78 FF FF FF DD 85 18 FF FF FF DC 8D E0 FE FF FF D9 C1 D9 C9 DC AD 70 FF FF FF D9 C9 D8 C4 DD 9D 10 FF FF FF D9 C9 DE E3 D9 C0 DD 45 D0 D9 C9 D8 C6 D9 CA DE E6 D9 E0 DD 85 30 FF FF FF DD 45 C8 D8 CE D9 C9 D8 CA DE E1 DD 45 C8 D8 CC D9 CA DC 8D 28 FF FF FF DE E2 DD 45 C8 D9 CB DD 9D 08 FF FF FF D9 CA D9 E0 DD 85 30 FF FF FF D9 CE DC 4D D0 D9 CE D8 C9 DE C6 DD 85 78 FF FF FF DC 85 20 FF FF FF DD 9D 78 FF FF FF
-***** EXPENSIVE 2521 828
-
-. 2520 8059D9F 207
-. DD 85 70 FF FF FF DC 85 18 FF FF FF DD 9D 70 FF FF FF DD 85 10 FF FF FF D9 CC DC 4D D0 D9 CC D8 E2 D9 C9 DC 8D 28 FF FF FF DE C4 DD 9D A8 FE FF FF DD 85 08 FF FF FF D9 C4 D8 E4 D9 CA DC 85 10 FF FF FF D9 C9 D8 C3 D9 CB DC AD 08 FF FF FF D9 CA DD 9D 00 FF FF FF DD 95 10 FF FF FF D9 C9 DD 9D 08 FF FF FF D9 CB 8B 95 D4 FE FF FF 03 95 F4 FE FF FF 8B 85 F4 FE FF FF 8B 4D DC 01 D0 2B 4D EC 8B B5 D0 FE FF FF 89 85 98 FE FF FF 8D 4C 4E FF 8B 85 F4 FE FF FF 8B 75 14 8D 3C 08 0F AF B5 D4 FE FF FF 8B 45 10 DE C2 DD 85 78 FF FF FF DD 1C F0 8B 85 D4 FE FF FF 8D 04 C5 08 00 00 00 8B 75 10 0F AF 45 14 DD 85 70 FF FF FF DD 1C 30
-***** EXPENSIVE 2522 829
-
-. 2521 8059E6E 189
-. 8B 45 14 0F AF C2 DD 85 A8 FE FF FF DD 1C C6 D9 C4 8B 45 14 8D 14 D5 08 00 00 00 0F AF 55 14 0F AF 85 98 FE FF FF D8 C4 D9 CD DE E4 DD 85 00 FF FF FF D9 C9 DD 1C 32 DD 1C C6 D9 CB 8B 85 98 FE FF FF 8D 34 C5 08 00 00 00 8B 45 14 8B 55 10 0F AF C1 0F AF 75 14 8D 0C CD 08 00 00 00 0F AF 4D 14 DD 1C 16 DD 1C C2 80 B5 0F FF FF FF 80 8B 45 14 0F AF C7 8D 3C FD 08 00 00 00 0F AF 7D 14 DD 85 08 FF FF FF D9 C9 D9 E0 D9 C9 DD 1C 11 D9 C9 FF 45 E8 DD 1C C2 8B 4D E0 8B 45 18 DD 1C 17 8B 55 DC 01 85 D4 FE FF FF 01 85 D0 FE FF FF 01 95 CC FE FF FF 39 4D E8 0F 82 B1 FB FF FF
-***** EXPENSIVE 2523 830
-
-. 2522 8054ED8 159
-. 8B B5 D4 FE FF FF 8B 45 0C 8B 7D 08 0F AF C6 DD 04 C7 8D 04 F5 08 00 00 00 8B 4D D0 0F AF 45 0C 8D 14 4E DD 04 38 D9 C9 8B 45 0C 0F AF C2 D8 C0 DD 04 C7 8D 0C 8E D8 C0 D9 C1 8D 14 D5 08 00 00 00 0F AF 55 0C 0F AF 4D 0C D8 C1 DD 85 E8 FE FF FF DD 04 3A DD 04 CF D9 CA D8 CB D9 CD DD 9D A8 FE FF FF D9 CD D8 C0 D9 CD D8 C0 D9 CC D8 E1 DD 85 F0 FE FF FF D9 FA D9 CC DC AD A8 FE FF FF D9 CC DC 8D E8 FE FF FF D8 CC D9 CC DD 9D A8 FE FF FF DD 45 E0 DD 45 D8 D9 C9 D8 CE D9 C9 D8 CF
-***** EXPENSIVE 2524 831
-
-. 2523 8054F77 140
-. 8B 95 E4 FE FF FF DE C1 03 55 D4 8B 45 D4 DD 45 E0 8D 0C 10 DE CF D9 CD DC 4D D8 DE EE 8D 34 08 D9 C3 01 F0 D8 C1 D9 CC 8B 7D 14 0F AF BD E4 FE FF FF DE E1 89 85 A4 FE FF FF D9 C3 D9 CB 8B 45 10 DE C2 D9 C9 DD 1C F8 0F AF 55 14 D9 C0 D9 CA D8 E4 D9 C9 D9 E0 D9 CB D9 E0 D9 C9 8B BD A4 FE FF FF DD 1C D0 D9 C9 0F AF 4D 14 0F AF 75 14 0F AF 7D 14 8B 55 D0 D8 E4 D9 CA DE E4 DE E2 DD 1C C8 D9 C9 FF 45 E8 DD 1C F0 8B 4D CC
-***** EXPENSIVE 2525 832
-
-. 2524 8055003 27
-. DD 1C F8 8D 04 92 01 95 E4 FE FF FF 01 85 D4 FE FF FF 39 4D E8 0F 82 BA FE FF FF
-***** EXPENSIVE 2526 833
-
-. 2525 805C19C 210
-. 8B 95 9C FE FF FF 03 55 E0 8B 75 E0 8D 0C 16 8D 34 0E 8B 7D E0 01 F7 8B 45 0C 89 BD 7C FE FF FF 0F AF 85 9C FE FF FF 8B 7D 08 D9 04 87 8B 85 9C FE FF FF 8D 04 85 04 00 00 00 0F AF 45 0C D9 9D 78 FF FF FF D9 04 38 8B 45 0C 0F AF C2 D9 9D 74 FF FF FF D9 04 87 8B 45 0C 0F AF C1 D9 04 87 8B 45 0C 0F AF C6 D9 9D 6C FF FF FF 8D 0C 8D 04 00 00 00 D9 04 87 8B 45 0C 0F AF 85 7C FE FF FF 0F AF 4D 0C 8D 14 95 04 00 00 00 8D 34 B5 04 00 00 00 D9 04 87 D9 CA 0F AF 55 0C D9 9D 70 FF FF FF 0F AF 75 0C D9 04 39 8B 85 7C FE FF FF D9 04 3A D9 C9 D9 9D 68 FF FF FF D9 04 3E 8D 3C 85 04 00 00 00 0F AF 7D 0C 8B 55 08 D9 9D 60 FF FF FF D9 04 17
-***** EXPENSIVE 2527 834
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-. 2526 805C26E 185
-. D9 CA D9 9D 64 FF FF FF D9 C9 D9 9D 5C FF FF FF D9 45 98 D9 45 94 D9 C9 D8 8D 70 FF FF FF D9 C9 D8 CA DE E9 D9 45 90 D8 8D 6C FF FF FF D9 9D 58 FF FF FF D9 45 8C D9 45 94 D9 C9 D8 8D 68 FF FF FF D9 C9 D8 8D 70 FF FF FF D9 C9 D8 AD 58 FF FF FF D9 CB D8 4D 98 DE C1 D9 CA D9 9D 58 FF FF FF D9 45 90 D9 45 8C D8 8D 6C FF FF FF D9 C9 D8 8D 68 FF FF FF DE C1 D9 9D 54 FF FF FF D9 45 84 D9 45 88 D8 8D 64 FF FF FF D9 C9 D8 8D 60 FF FF FF DE E9 D9 9D 50 FF FF FF D9 45 84 D9 45 88 D9 C9 D8 8D 64 FF FF FF D9 C9 D8 8D 60 FF FF FF DE C1 D9 9D 4C FF FF FF D9 45 80
-***** EXPENSIVE 2528 835
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-. 2527 805C327 209
-. D8 CB D9 9D 48 FF FF FF D9 85 7C FF FF FF D8 8D 5C FF FF FF D8 AD 48 FF FF FF D9 9D 48 FF FF FF D9 45 80 D9 85 48 FF FF FF D8 C2 D9 C9 D8 8D 5C FF FF FF D9 CC D8 8D 7C FF FF FF DE C4 D9 9D 44 FF FF FF D9 C1 D8 C3 D9 CA DE E3 D9 85 54 FF FF FF D9 CA D9 9D 40 FF FF FF D9 C9 D8 A5 4C FF FF FF D9 85 58 FF FF FF D9 85 54 FF FF FF D9 C9 D8 85 50 FF FF FF D9 C9 D8 85 4C FF FF FF D9 CA D9 9D 34 FF FF FF D9 85 44 FF FF FF D9 85 40 FF FF FF D8 C3 D9 CC D8 A5 48 FF FF FF D9 85 58 FF FF FF D9 CA D8 C3 D9 CD D9 9D 2C FF FF FF D9 95 3C FF FF FF D9 CD D9 95 38 FF FF FF D9 C9 D8 A5 50 FF FF FF D9 CC D9 9D 30 FF FF FF DD 85 B8 FE FF FF
-***** EXPENSIVE 2529 836
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-. 2528 805C3F8 224
-. D9 FA D9 CA D8 AD 44 FF FF FF D9 CA DC 8D B0 FE FF FF D8 CA D9 5D EC D9 C9 D9 9D 44 FF FF FF D9 45 EC DD 85 B8 FE FF FF D9 FA D9 CB D8 AD 40 FF FF FF D9 CB DC 8D B0 FE FF FF D8 CB D9 9D 28 FF FF FF DD 85 B0 FE FF FF D8 8D 30 FF FF FF D8 AD 78 FF FF FF D9 9D 24 FF FF FF DD 85 B0 FE FF FF D8 8D 2C FF FF FF D8 AD 74 FF FF FF D9 9D 20 FF FF FF D9 85 24 FF FF FF D8 C1 D9 9D 1C FF FF FF D9 85 20 FF FF FF D8 85 28 FF FF FF D9 9D 18 FF FF FF D9 45 D4 D9 E0 D9 95 08 FF FF FF D8 CD D9 9D 0C FF FF FF D8 AD 24 FF FF FF D9 45 D0 D9 C9 D9 9D 14 FF FF FF D8 CB D9 85 20 FF FF FF D8 A5 28 FF FF FF D9 C9 D8 AD 0C FF FF FF D9 C9 D9 9D 10 FF FF FF D9 9D 0C FF FF FF D9 85 08 FF FF FF
-***** EXPENSIVE 2530 837
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-. 2529 805C4D8 209
-. D9 45 D0 D9 C9 D8 CA D9 C9 D8 8D 34 FF FF FF DE E9 D9 9D 04 FF FF FF D9 45 D0 D9 E0 DC CC D9 CB D8 4D D4 DE C4 D9 C9 D9 9D 40 FF FF FF D9 CA D9 95 00 FF FF FF D9 45 D4 D8 8D 34 FF FF FF D9 CA DE CB D9 CA DE C1 D9 85 78 FF FF FF D8 85 30 FF FF FF D9 9D 78 FF FF FF D9 85 74 FF FF FF D8 85 2C FF FF FF D9 9D 74 FF FF FF D9 85 1C FF FF FF D8 A5 04 FF FF FF D9 9D FC FE FF FF D9 85 18 FF FF FF D8 85 0C FF FF FF D9 9D F8 FE FF FF D9 85 14 FF FF FF D8 E1 D9 C9 D8 85 14 FF FF FF D9 9D 14 FF FF FF 8B 95 A4 FE FF FF D9 85 10 FF FF FF D9 C9 03 95 EC FE FF FF D9 9D F4 FE FF FF D8 E1 D9 85 10 FF FF FF 8B 85 EC FE FF FF 8B 4D D8 01 D0
-***** EXPENSIVE 2531 838
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-. 2530 805C5A9 229
-. 2B 4D E8 8B B5 A0 FE FF FF DE C2 D9 9D 10 FF FF FF D9 85 18 FF FF FF 8D 4C 4E FF D8 A5 0C FF FF FF D9 C9 D9 9D F0 FE FF FF 89 85 78 FE FF FF D9 85 1C FF FF FF 8B 85 EC FE FF FF 8B 75 14 8D 3C 08 D8 85 04 FF FF FF D9 C9 0F AF B5 A4 FE FF FF D9 9D 18 FF FF FF 8B 45 10 D9 85 78 FF FF FF D9 C9 D9 9D 1C FF FF FF D9 1C B0 8B 85 A4 FE FF FF 8D 04 85 04 00 00 00 8B 75 10 0F AF 45 14 D9 85 74 FF FF FF D9 1C 30 8B 45 14 0F AF C2 D9 85 FC FE FF FF D9 1C 86 8D 14 95 04 00 00 00 8B 45 14 0F AF 55 14 0F AF 85 78 FE FF FF D9 85 F8 FE FF FF D9 85 F4 FE FF FF D9 C9 D9 1C 32 D9 1C 86 8B 85 78 FE FF FF 8D 34 85 04 00 00 00 8B 45 14 8B 55 10 0F AF C1 0F AF 75 14 D9 85 F0 FE FF FF D9 85 1C FF FF FF
-***** EXPENSIVE 2532 839
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-. 2531 805C68E 118
-. D9 C9 D9 1C 16 80 B5 1B FF FF FF 80 D9 1C 82 8D 0C 8D 04 00 00 00 8B 45 14 0F AF 4D 14 0F AF C7 D9 85 18 FF FF FF 80 B5 13 FF FF FF 80 8D 3C BD 04 00 00 00 D9 1C 11 D9 85 14 FF FF FF 0F AF 7D 14 D9 85 10 FF FF FF D9 C9 D9 1C 82 D9 1C 17 8B 45 18 8B 55 D8 FF 45 E4 8B 4D DC 01 85 A4 FE FF FF 01 85 A0 FE FF FF 01 95 9C FE FF FF 39 4D E4 0F 82 98 FA FF FF
-***** EXPENSIVE 2533 840
-
-. 2532 80577A8 175
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-vex iropt: not unrolling (79 sts)
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-***** EXPENSIVE 2537 844
-vex iropt: not unrolling (75 sts)
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-***** EXPENSIVE 2539 846
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-***** EXPENSIVE 2542 849
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-. 2542 8054DD7 146
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-
-. 2544 8057388 196
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-***** EXPENSIVE 2546 853
-
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-***** EXPENSIVE 2547 854
-
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-***** EXPENSIVE 2548 855
-
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-***** EXPENSIVE 2549 856
-
-. 2548 805766B 171
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-***** EXPENSIVE 2550 857
-
-. 2549 8057716 45
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-***** EXPENSIVE 2551 858
-
-. 2550 805A620 45
-. C7 45 D0 00 00 00 00 8B 45 18 DD 85 40 FF FF FF DD 85 38 FF FF FF D9 C9 39 45 D0 DD 9D 68 FF FF FF DD 9D 60 FF FF FF 0F 83 A2 01 00 00
-***** EXPENSIVE 2552 859
-
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-***** EXPENSIVE 2553 860
-
-. 2552 805CE3C 36
-. C7 45 CC 00 00 00 00 8B 45 18 D9 45 80 D9 85 7C FF FF FF D9 C9 39 45 CC D9 5D 94 D9 5D 90 0F 83 56 01 00 00
-***** EXPENSIVE 2554 861
-
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-. 55 89 E5 83 EC 28 89 75 F8 8B 75 08 89 5D F4 89 7D FC 8B 7D 0C 0F BE 56 46 E8 5F 59 FA FF
-
-. 2860 4206FDFE 19
-. 81 C3 D2 A4 0B 00 8B 84 32 94 00 00 00 89 34 24 FF 50 30
-
-. 2861 4206FE11 5
-. 31 D2 40 74 58
-
-. 2862 4206FE16 4
-. 85 FF 74 07
-
-. 2863 4206FE21 33
-. 83 0E 02 8D 56 47 8D 46 48 89 34 24 89 54 24 04 89 44 24 08 C7 44 24 0C 00 00 00 00 E8 2E FE FF FF
-
-. 2864 4206FC91 10
-. 8B 16 F7 C2 01 00 00 00 74 2A
-
-. 2865 4206FCC5 27
-. 89 0C 24 8B 46 20 29 C8 05 FF 0F 00 00 25 00 F0 FF FF 89 44 24 04 E8 80 70 06 00
-
-. 2866 420D6D60 17
-. 89 DA 8B 4C 24 08 8B 5C 24 04 B8 5B 00 00 00 CD 80
-
-. 2867 420D6D71 9
-. 89 D3 3D 01 F0 FF FF 73 01
-
-. 2868 420D6D7A 1
-. C3
-
-. 2869 4206FCC0 5
-. 83 CA 01 EB EC
-
-. 2870 4206FCB1 12
-. 89 16 8B 5D F8 8B 75 FC 89 EC 5D C3
-
-. 2871 4206FE42 59
-. 89 F2 C7 46 18 00 00 00 00 C7 46 14 00 00 00 00 C7 46 10 00 00 00 00 C7 46 08 00 00 00 00 C7 46 04 00 00 00 00 C7 46 0C 00 00 00 00 8B 5D F4 89 D0 8B 75 F8 8B 7D FC 89 EC 5D C3
-
-. 2872 4206DF80 6
-. 31 D2 85 C0 74 17
-
-. 2873 4206DF86 35
-. 8B 46 1C 89 F2 89 46 18 89 46 14 89 46 10 89 46 0C 89 46 04 89 46 08 8B 5D F8 89 D0 8B 75 FC 89 EC 5D C3
-
-. 2874 42070223 2
-. EB C5
-
-. 2875 420701F8 10
-. 83 C4 0C 89 F8 5B 5E 5F 5D C3
-
-. 2876 4202B1A2 11
-. 83 C6 04 3B B3 88 02 00 00 72 F3
-
-. 2877 4202B1AD 2
-. EB 12
-
-. 2878 4202B1C1 8
-. 89 3C 24 E8 BB A4 FE FF
-
-. 2879 42015684 6
-. FF A3 34 01 00 00
-
-. 2880 4201568A 10
-. 68 50 02 00 00 E9 40 FB FF FF
-
-. 2881 420AE610 13
-. 89 DA 8B 5C 24 04 B8 01 00 00 00 CD 80
-==13306==
---13306-- lru: 1494 epochs, 0 clearings.
---13306-- translate: new 2882 (113298 -> 626759), discard 0 (0 -> 0).
---13306-- dispatch: 149400000 basic blocks, 1495/98742 sched events, 66040 tt_fast misses.
---13306-- reg-alloc: 0 t-req-spill, 0+0 orig+spill uis, 0 total-reg-r.
---13306-- sanity: 1496 cheap, 60 expensive checks.
-vex storage: P 176, T total 158600256 (4015121), T curr 0 (0)
10
dir
-2062
+2064
svn://svn.valgrind.org/vex/trunk/priv
svn://svn.valgrind.org/vex
-2010-10-06T20:47:22.726851Z
-2062
+2010-10-11T18:57:10.814504Z
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sewardj
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sewardj
has-props
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\f
host_amd64_isel.c
file
2250
\f
-host_arm_isel.c
+main_main.c
file
2010-10-07T07:09:08.557032Z
-cb9152b8e04c2beba026cf5e0ceb9653
-2010-09-22T00:56:37.752333Z
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sewardj
has-props
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\f
guest_amd64_defs.h
file
18762
\f
-main_main.c
+host_arm_isel.c
file
2010-10-07T07:09:08.557032Z
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-2010-09-03T15:49:57.860297Z
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sewardj
has-props
-33113
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\f
-host_generic_regs.c
+guest_generic_x87.c
file
2010-10-07T07:09:08.557032Z
-9725520726b86d6660f608c03ce6fcc2
-2010-05-03T21:38:49.487119Z
-1977
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+2010
sewardj
has-props
-6681
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\f
-guest_generic_x87.c
+host_generic_regs.c
file
2010-10-07T07:09:08.557032Z
-1f3b1a112cadee2ef4c18dc1edc41dbc
-2010-08-17T22:52:08.679037Z
-2010
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sewardj
has-props
-28814
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\f
ir_match.h
file
3071
\f
-guest_arm_defs.h
+main_globals.h
file
2010-10-07T07:09:08.561031Z
-c94d120fe04b41c9e96b4703cc7b6c5a
-2010-08-22T12:44:20.551526Z
-2013
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has-props
-9350
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\f
ir_opt.c
file
153847
\f
-main_globals.h
+guest_arm_defs.h
file
2010-10-07T07:09:08.561031Z
-4dfc1057f586110ca623182328e9d44d
-2010-05-03T21:38:49.487119Z
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sewardj
has-props
-2850
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\f
-host_generic_regs.h
+guest_generic_x87.h
file
2010-10-07T07:09:08.561031Z
-8dff41e41a42937cb044c732951ffa56
-2010-05-03T21:38:49.487119Z
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sewardj
has-props
-8892
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\f
-guest_generic_x87.h
+host_generic_regs.h
file
2010-10-07T07:09:08.561031Z
-78449e73a0de376c73152c25a120914a
-2010-08-17T22:52:08.679037Z
-2010
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sewardj
has-props
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\f
host_generic_simd64.c
file
if (0x01900F9F == (insn & 0x0FF00FFF)) {
UInt rT = INSN(15,12);
UInt rN = INSN(19,16);
- if (rT == 15 || rN == 15 || rT == 14 /* || (rT & 1)*/) {
+ if (rT == 15 || rN == 15) {
/* undecodable; fall through */
} else {
IRTemp res;
UInt rN = INSN(19,16);
UInt rD = INSN(15,12);
if (rT == 15 || rN == 15 || rD == 15
- || rT == 14 /* || (rT & 1)*/
- || rD == rT || rN == rT) {
+ || rD == rT || rD == rN) {
/* undecodable; fall through */
} else {
IRTemp resSC1, resSC32;
}
}
+ /* ------------------- NOP ------------------ */
+ if (0x0320F000 == (insn & 0x0FFFFFFF)) {
+ DIP("nop%s\n", nCC(INSN_COND));
+ goto decode_success;
+ }
+
/* ----------------------------------------------------------- */
/* -- ARMv7 instructions -- */
/* ----------------------------------------------------------- */
/* -------------- v7 barrier insns -------------- */
if (INSN0(15,0) == 0xF3BF && (INSN1(15,0) & 0xFF0F) == 0x8F0F) {
+ /* XXX this isn't really right, is it? The generated IR does
+ them unconditionally. I guess it doesn't matter since it
+ doesn't do any harm to do them even when the guarding
+ condition is false -- it's just a performance loss. */
switch (INSN1(7,4)) {
case 0x4: /* DSB */
stmt( IRStmt_MBE(Imbe_Fence) );
}
}
+ /* ------------------- NOP ------------------ */
+ if (INSN0(15,0) == 0xF3AF && INSN1(15,0) == 0x8000) {
+ DIP("nop\n");
+ goto decode_success;
+ }
+
/* ----------------------------------------------------------- */
/* -- VFP (CP 10, CP 11) instructions (in Thumb mode) -- */
/* ----------------------------------------------------------- */
if (0x01900F9F == (insn & 0x0FF00FFF)) {
UInt rT = INSN(15,12);
UInt rN = INSN(19,16);
- if (rT == 15 || rN == 15 || rT == 14 /* || (rT & 1)*/) {
+ if (rT == 15 || rN == 15) {
/* undecodable; fall through */
} else {
IRTemp res;
UInt rN = INSN(19,16);
UInt rD = INSN(15,12);
if (rT == 15 || rN == 15 || rD == 15
- || rT == 14 /* || (rT & 1)*/
- || rD == rT || rN == rT) {
+ || rD == rT || rD == rN) {
/* undecodable; fall through */
} else {
IRTemp resSC1, resSC32;
}
}
+ /* ------------------- NOP ------------------ */
+ if (0x0320F000 == (insn & 0x0FFFFFFF)) {
+ DIP("nop%s\n", nCC(INSN_COND));
+ goto decode_success;
+ }
+
/* ----------------------------------------------------------- */
/* -- ARMv7 instructions -- */
/* ----------------------------------------------------------- */
/* -------------- v7 barrier insns -------------- */
if (INSN0(15,0) == 0xF3BF && (INSN1(15,0) & 0xFF0F) == 0x8F0F) {
+ /* XXX this isn't really right, is it? The generated IR does
+ them unconditionally. I guess it doesn't matter since it
+ doesn't do any harm to do them even when the guarding
+ condition is false -- it's just a performance loss. */
switch (INSN1(7,4)) {
case 0x4: /* DSB */
stmt( IRStmt_MBE(Imbe_Fence) );
}
}
+ /* ------------------- NOP ------------------ */
+ if (INSN0(15,0) == 0xF3AF && INSN1(15,0) == 0x8000) {
+ DIP("nop\n");
+ goto decode_success;
+ }
+
/* ----------------------------------------------------------- */
/* -- VFP (CP 10, CP 11) instructions (in Thumb mode) -- */
/* ----------------------------------------------------------- */
10
dir
-2062
+2064
svn://svn.valgrind.org/vex/trunk/pub
svn://svn.valgrind.org/vex
10
dir
-2062
+2064
svn://svn.valgrind.org/vex/trunk/switchback
svn://svn.valgrind.org/vex
10
dir
-2062
+2064
svn://svn.valgrind.org/vex/trunk/test
svn://svn.valgrind.org/vex
20405
\f
-x87fxam.c
+fpgames.s
file
2010-10-07T07:08:55.975145Z
-36e30dff91ebc011217eb7c6382a3b40
-2005-03-25T22:32:39.177626Z
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sewardj
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\f
-fpgames.s
+x87fxam.c
file
2010-10-07T07:08:55.975145Z
-921da1799be2078de00bf1475fa22c5f
-2004-08-24T22:43:26.357563Z
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sewardj
-1451
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\f
fsave.c
file
393
\f
-fp1.s
+test-i386.c
file
2010-10-07T07:08:55.975145Z
-adcd3d77024ad95c52e814029276a5e2
-2004-08-24T22:43:26.357563Z
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sewardj
-792
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\f
-test-i386.c
+fp1.s
file
2010-10-07T07:08:55.975145Z
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-2006-12-17T14:24:05.825160Z
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\f
test-amd64-shift.h
file
10
dir
-2062
+2064
svn://svn.valgrind.org/vex/trunk/unused
svn://svn.valgrind.org/vex
10
dir
-2062
+2064
svn://svn.valgrind.org/vex/trunk/useful
svn://svn.valgrind.org/vex
10
dir
-11404
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svn://svn.valgrind.org/valgrind/trunk/auxprogs
svn://svn.valgrind.org/valgrind
10
dir
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svn://svn.valgrind.org/valgrind/trunk/cachegrind
svn://svn.valgrind.org/valgrind
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dir
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svn://svn.valgrind.org/valgrind/trunk/cachegrind/docs
svn://svn.valgrind.org/valgrind
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dir
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svn://svn.valgrind.org/valgrind/trunk/cachegrind/tests
svn://svn.valgrind.org/valgrind
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-njn
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has-props
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\f
Makefile.am
file
# Remove CPUID warnings lines for P4s and other machines
sed "/warning: Pentium 4 with 12 KB micro-op instruction trace cache/d" |
sed "/Simulating a 16 KB I-cache with 32 B lines/d" |
-sed "/warning: L3 cache detected but ignored/d" |
+sed "/warning: L3 cache found, using its data for the LL simulation./d" |
sed "/Warning: Cannot auto-detect cache config on PPC.., using one or more defaults/d"
# Remove CPUID warnings lines for P4s and other machines
sed "/warning: Pentium 4 with 12 KB micro-op instruction trace cache/d" |
sed "/Simulating a 16 KB I-cache with 32 B lines/d" |
-sed "/warning: L3 cache detected but ignored/d" |
+sed "/warning: L3 cache found, using its data for the LL simulation./d" |
sed "/Warning: Cannot auto-detect cache config on PPC.., using one or more defaults/d"
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/cachegrind/tests/x86
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/callgrind
svn://svn.valgrind.org/valgrind
-2010-10-06T22:46:31.279099Z
-11404
-njn
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has-props
10
dir
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svn://svn.valgrind.org/valgrind/trunk/callgrind/docs
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/callgrind/tests
svn://svn.valgrind.org/valgrind
-2010-10-06T22:46:31.279099Z
-11404
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has-props
-2010-10-07T07:07:10.848801Z
-6ae781a1cb0bf1fdecf7ad9d2a1a8379
-2010-10-06T22:46:31.279099Z
-11404
-njn
+2010-10-08T00:53:29.849223Z
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has-props
-1114
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\f
Makefile.am
file
# Remove CPUID warnings lines for P4s and other machines
sed "/warning: Pentium 4 with 12 KB micro-op instruction trace cache/d" |
sed "/Simulating a 16 KB I-cache with 32 B lines/d" |
-sed "/warning: L3 cache detected but ignored/d" |
+sed "/warning: L3 cache found, using its data for the LL simulation./d" |
sed "/Warning: Cannot auto-detect cache config on PPC.., using one or more defaults/d"
# Remove CPUID warnings lines for P4s and other machines
sed "/warning: Pentium 4 with 12 KB micro-op instruction trace cache/d" |
sed "/Simulating a 16 KB I-cache with 32 B lines/d" |
-sed "/warning: L3 cache detected but ignored/d" |
+sed "/warning: L3 cache found, using its data for the LL simulation./d" |
sed "/Warning: Cannot auto-detect cache config on PPC.., using one or more defaults/d"
AM_CONDITIONAL([HAVE_BUILTIN_ATOMIC], [test x$ac_have_builtin_atomic = xyes])
-# Check for __builtin_frame_address() support
-AC_MSG_CHECKING([if gcc supports __builtin_frame_address])
-
-AC_TRY_COMPILE(
-[
-], [
- __builtin_frame_address(0);
- return 0;
-],
-[
-ac_have_builtin_frame_address=yes
-AC_MSG_RESULT([yes])
-AC_DEFINE([HAVE_BUILTIN_FRAME_ADDRESS], 1,
- [Define to 1 if your compiler supports __builtin_frame_address.])
-], [
-ac_have_builtin_frame_address=no
-AC_MSG_RESULT([no])
-])
-CFLAGS=$safe_CFLAGS
-
-AM_CONDITIONAL(HAVE_BUILTIN_FRAME_ADDRESS,
- test x$ac_have_builtin_frame_address = xyes)
-
#----------------------------------------------------------------------------
# Ok. We're done checking.
#----------------------------------------------------------------------------
10
dir
-11404
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svn://svn.valgrind.org/valgrind/trunk/coregrind
svn://svn.valgrind.org/valgrind
-2010-10-06T22:45:18.828329Z
-11403
+2010-10-11T19:15:33.622257Z
+11429
sewardj
has-props
-2010-10-07T07:08:50.444074Z
-2c849b7407bf6fd3a6fe7dd16b0e1341
-2010-07-01T00:20:20.236166Z
-11194
-njn
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-6664
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\f
pub_core_trampoline.h
file
VG_USERREQ__LIBC_FREERES_DONE,
0, 0, 0, 0, 0);
/*NOTREACHED*/
- *(int *)0 = 'x';
+ *(volatile int *)0 = 'x';
}
/* ---------------------------------------------------------------------
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/coregrind/m_aspacemgr
svn://svn.valgrind.org/valgrind
-2010-09-08T08:30:31.467786Z
-11343
+2010-10-07T10:01:40.450470Z
+11409
sewardj
has-props
-2010-10-07T07:08:46.788688Z
-f069776eb8e332c5a3e235a78d23618f
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-11204
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sewardj
has-props
-116375
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\f
aspacemgr-aix5.c
file
(*record_gap)(last, (Addr)-1 - last);
}
-Bool css_overflowed;
-ChangedSeg* css_local;
-Int css_size_local;
-Int css_used_local;
+// Urr. So much for thread safety.
+static Bool css_overflowed;
+static ChangedSeg* css_local;
+static Int css_size_local;
+static Int css_used_local;
static void add_mapping_callback(Addr addr, SizeT len, UInt prot,
ULong dev, ULong ino, Off64T offset,
(*record_gap)(last, (Addr)-1 - last);
}
-Bool css_overflowed;
-ChangedSeg* css_local;
-Int css_size_local;
-Int css_used_local;
+// Urr. So much for thread safety.
+static Bool css_overflowed;
+static ChangedSeg* css_local;
+static Int css_size_local;
+static Int css_used_local;
static void add_mapping_callback(Addr addr, SizeT len, UInt prot,
ULong dev, ULong ino, Off64T offset,
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/coregrind/m_coredump
svn://svn.valgrind.org/valgrind
10
dir
-11404
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svn://svn.valgrind.org/valgrind/trunk/coregrind/m_debuginfo
svn://svn.valgrind.org/valgrind
-2010-10-06T11:38:01.541065Z
-11397
+2010-10-11T19:15:33.622257Z
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sewardj
has-props
-2010-10-07T07:08:43.361264Z
-55c3730e9fd6e46010fe29c7ed519812
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-11397
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+2010-10-07T09:56:19.796456Z
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sewardj
-129703
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\f
readelf.c
file
-2010-10-07T07:08:43.365263Z
-89d84eb6f664c5418fe84dd424118c27
-2010-05-03T21:37:12.323546Z
-11121
+2010-10-11T22:17:21.038663Z
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+2010-10-08T23:57:25.543876Z
+11418
sewardj
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\f
readdwarf3.c
file
-2010-10-07T07:08:43.365263Z
-39600870672b9b519aa1cf9812459f95
-2010-05-03T21:37:12.323546Z
-11121
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+2010-10-11T19:15:33.622257Z
+11429
sewardj
-150412
+150360
\f
readmacho.c
file
DebugInfo* di;
ULong di_handle;
SysRes fd;
- Int nread;
+ Int nread, oflags;
HChar buf1k[1024];
Bool debug = False;
SysRes statres;
/* Peer at the first few bytes of the file, to see if it is an ELF */
/* object file. Ignore the file if we do not have read permission. */
VG_(memset)(buf1k, 0, sizeof(buf1k));
- fd = VG_(open)( filename, VKI_O_RDONLY|VKI_O_LARGEFILE, 0 );
+ oflags = VKI_O_RDONLY;
+# if defined(VKI_O_LARGEFILE)
+ oflags |= VKI_O_LARGEFILE;
+# endif
+ fd = VG_(open)( filename, oflags, 0 );
if (sr_isError(fd)) {
if (sr_Err(fd) != VKI_EACCES) {
DebugInfo fake_di;
return &c->region_start_img[ c->region_next ];
}
-__attribute__((noreturn))
-static void failWith ( Cursor* c, HChar* str ) {
- vg_assert(c);
- vg_assert(c->barf);
- c->barf(str);
- /*NOTREACHED*/
- vg_assert(0);
-}
-
/* FIXME: document assumptions on endianness for
get_UShort/UInt/ULong. */
static inline UChar get_UChar ( Cursor* c ) {
key.dioff = varp->absOri; /* this is what we want to find */
found = VG_(lookupXA)( dioff_lookup_tab, &keyp,
&ixFirst, &ixLast );
- if (!found)
- barf("DW_AT_abstract_origin can't be resolved");
+ if (!found) {
+ /* barf("DW_AT_abstract_origin can't be resolved"); */
+ TRACE_D3(" SKIP (DW_AT_abstract_origin can't be resolved)\n\n");
+ continue;
+ }
/* If the following fails, there is more than one entry with
the same dioff. Which can't happen. */
vg_assert(ixFirst == ixLast);
- bo->Te.Bound.boundL + 1) ));
}
return eszB;
+ case Te_TyVoid:
+ return mk_MaybeULong_Nothing(); /*UNKNOWN*/
default:
VG_(printf)("ML_(sizeOfType): unhandled: ");
ML_(pp_TyEnt)(ent);
DebugInfo* di;
ULong di_handle;
SysRes fd;
- Int nread;
+ Int nread, oflags;
HChar buf1k[1024];
Bool debug = False;
SysRes statres;
/* Peer at the first few bytes of the file, to see if it is an ELF */
/* object file. Ignore the file if we do not have read permission. */
VG_(memset)(buf1k, 0, sizeof(buf1k));
- fd = VG_(open)( filename, VKI_O_RDONLY|VKI_O_LARGEFILE, 0 );
+ oflags = VKI_O_RDONLY;
+# if defined(VKI_O_LARGEFILE)
+ oflags |= VKI_O_LARGEFILE;
+# endif
+ fd = VG_(open)( filename, oflags, 0 );
if (sr_isError(fd)) {
if (sr_Err(fd) != VKI_EACCES) {
DebugInfo fake_di;
return &c->region_start_img[ c->region_next ];
}
-__attribute__((noreturn))
-static void failWith ( Cursor* c, HChar* str ) {
- vg_assert(c);
- vg_assert(c->barf);
- c->barf(str);
- /*NOTREACHED*/
- vg_assert(0);
-}
-
/* FIXME: document assumptions on endianness for
get_UShort/UInt/ULong. */
static inline UChar get_UChar ( Cursor* c ) {
key.dioff = varp->absOri; /* this is what we want to find */
found = VG_(lookupXA)( dioff_lookup_tab, &keyp,
&ixFirst, &ixLast );
- if (!found)
- barf("DW_AT_abstract_origin can't be resolved");
+ if (!found) {
+ /* barf("DW_AT_abstract_origin can't be resolved"); */
+ TRACE_D3(" SKIP (DW_AT_abstract_origin can't be resolved)\n\n");
+ continue;
+ }
/* If the following fails, there is more than one entry with
the same dioff. Which can't happen. */
vg_assert(ixFirst == ixLast);
- bo->Te.Bound.boundL + 1) ));
}
return eszB;
+ case Te_TyVoid:
+ return mk_MaybeULong_Nothing(); /*UNKNOWN*/
default:
VG_(printf)("ML_(sizeOfType): unhandled: ");
ML_(pp_TyEnt)(ent);
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/coregrind/m_demangle
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/coregrind/m_dispatch
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/coregrind/m_initimg
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/coregrind/m_mach
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/coregrind/m_replacemalloc
svn://svn.valgrind.org/valgrind
-2010-07-30T13:14:11.979494Z
-11244
-tom
+2010-10-11T19:15:33.622257Z
+11429
+sewardj
has-props
-2010-10-07T07:08:23.952523Z
-7435a9970d14e31897c5388c4a2b54ea
-2010-07-30T13:14:11.979494Z
-11244
-tom
+2010-10-11T22:17:20.750711Z
+7b33a26877b5aca9031a69b02434b747
+2010-10-11T19:15:33.622257Z
+11429
+sewardj
-31604
+31613
\f
replacemalloc_core.c
file
{
VALGRIND_PRINTF_BACKTRACE("Program aborting because of call to %s\n", str);
_exit(99);
- *(int *)0 = 'x';
+ *(volatile int *)0 = 'x';
}
#define PANIC(soname, fnname) \
{
VALGRIND_PRINTF_BACKTRACE("Program aborting because of call to %s\n", str);
_exit(99);
- *(int *)0 = 'x';
+ *(volatile int *)0 = 'x';
}
#define PANIC(soname, fnname) \
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/coregrind/m_scheduler
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/coregrind/m_sigframe
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/coregrind/m_syswrap
svn://svn.valgrind.org/valgrind
-2010-10-06T15:24:39.069755Z
-11399
+2010-10-11T19:09:53.133904Z
+11428
sewardj
has-props
-2010-10-07T07:08:34.230797Z
-1593e62ae5e9987e4166f503764eadcd
-2010-10-06T15:24:39.069755Z
-11399
+2010-10-11T22:17:20.806702Z
+ef3e8d3a6582af802a0316e6e1adfbc9
+2010-10-11T19:09:53.133904Z
+11428
sewardj
-62975
+62986
\f
syswrap-generic.c
file
-2010-10-07T07:08:34.234796Z
-9d28ed370db3d5d84c4c47f69c570a47
-2010-09-02T22:42:14.903107Z
-11332
+2010-10-08T00:53:30.141174Z
+6deca389e6cd196e950edb346eb18543
+2010-10-07T15:38:51.858917Z
+11412
sewardj
-243916
+243968
\f
syswrap-main.c
file
PLAX_(__NR_shmget, sys_shmget), //307
PLAXY(__NR_shmctl, sys_shmctl), // 308
// LINX_(__NR_pselect6, sys_pselect6), //
-// LINXY(__NR_ppoll, sys_ppoll), // 309
// LINX_(__NR_unshare, sys_unshare), // 310
LINX_(__NR_set_robust_list, sys_set_robust_list), // 311
// correspond to what's in include/vki/vki-scnums-arm-linux.h.
// From here onwards, please ensure the numbers are correct.
- LINX_(__NR_pselect6, sys_pselect6), // 335
+ LINX_(__NR_pselect6, sys_pselect6), // 335
+ LINXY(__NR_ppoll, sys_ppoll), // 336
LINXY(__NR_signalfd4, sys_signalfd4), // 355
LINX_(__NR_eventfd2, sys_eventfd2), // 356
/* DDD: relative to the xnu sources (kauth_copyinfilesec), this
is just way wrong. [The trouble is with the size, which depends on a
non-trival kernel computation] */
- PRE_MEM_READ( "fchmod_extended(xsecurity)", ARG5,
- sizeof(struct vki_kauth_filesec) );
+ if (ARG5) {
+ PRE_MEM_READ( "fchmod_extended(xsecurity)", ARG5,
+ sizeof(struct vki_kauth_filesec) );
+ }
}
PRE(chmod_extended)
/* DDD: relative to the xnu sources (kauth_copyinfilesec), this
is just way wrong. [The trouble is with the size, which depends on a
non-trival kernel computation] */
- PRE_MEM_READ( "chmod_extended(xsecurity)", ARG5,
- sizeof(struct vki_kauth_filesec) );
+ if (ARG5) {
+ PRE_MEM_READ( "chmod_extended(xsecurity)", ARG5,
+ sizeof(struct vki_kauth_filesec) );
+ }
}
PRE(open_extended)
PLAX_(__NR_shmget, sys_shmget), //307
PLAXY(__NR_shmctl, sys_shmctl), // 308
// LINX_(__NR_pselect6, sys_pselect6), //
-// LINXY(__NR_ppoll, sys_ppoll), // 309
// LINX_(__NR_unshare, sys_unshare), // 310
LINX_(__NR_set_robust_list, sys_set_robust_list), // 311
// correspond to what's in include/vki/vki-scnums-arm-linux.h.
// From here onwards, please ensure the numbers are correct.
- LINX_(__NR_pselect6, sys_pselect6), // 335
+ LINX_(__NR_pselect6, sys_pselect6), // 335
+ LINXY(__NR_ppoll, sys_ppoll), // 336
LINXY(__NR_signalfd4, sys_signalfd4), // 355
LINX_(__NR_eventfd2, sys_eventfd2), // 356
/* DDD: relative to the xnu sources (kauth_copyinfilesec), this
is just way wrong. [The trouble is with the size, which depends on a
non-trival kernel computation] */
- PRE_MEM_READ( "fchmod_extended(xsecurity)", ARG5,
- sizeof(struct vki_kauth_filesec) );
+ if (ARG5) {
+ PRE_MEM_READ( "fchmod_extended(xsecurity)", ARG5,
+ sizeof(struct vki_kauth_filesec) );
+ }
}
PRE(chmod_extended)
/* DDD: relative to the xnu sources (kauth_copyinfilesec), this
is just way wrong. [The trouble is with the size, which depends on a
non-trival kernel computation] */
- PRE_MEM_READ( "chmod_extended(xsecurity)", ARG5,
- sizeof(struct vki_kauth_filesec) );
+ if (ARG5) {
+ PRE_MEM_READ( "chmod_extended(xsecurity)", ARG5,
+ sizeof(struct vki_kauth_filesec) );
+ }
}
PRE(open_extended)
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/coregrind/m_ume
svn://svn.valgrind.org/valgrind
VG_USERREQ__LIBC_FREERES_DONE,
0, 0, 0, 0, 0);
/*NOTREACHED*/
- *(int *)0 = 'x';
+ *(volatile int *)0 = 'x';
}
/* ---------------------------------------------------------------------
# Memcheck
##----------------------------------------------------------------------##
+# afaict this is legit. Might be caused by setenv("VAR=")
+# where the value string is empty (not sure)
+{
+ macos-Cond-7
+ Memcheck:Cond
+ fun:__setenv
+}
+
# From Jesse Ruderman.
{
Mac OS X 10.6.4. rdar://8145289. "new[]" paired with "delete" in the DesktopServicesPriv framework.
Memcheck:Cond
fun:_ZN13HIMenuBarView31SetAdjustTextTitleBoundsAtIndexEih
fun:_ZN13HIMenuBarView15MeasureAppMenusEv
- }
+}
+
+{
+ TFontFeatures::TFontFeatures(CGFont*) (in CoreText.framework)
+ Memcheck:Cond
+ fun:_ZN13TFontFeaturesC2EP6CGFont
+ fun:_ZNK9TBaseFont12CopyFeaturesEv
+}
+valgrind (3.6.0-7) unstable; urgency=low
+
+ * Updated to revision 11429.
+
+ -- Sanjeev BA <as2902.b@samsung.com> Fri, 08 Oct 2010 09:45:06 +0900
+
+valgrind (3.6.0-6) unstable; urgency=low
+
+ * Updated to revision 11413.
+
+ -- Sanjeev BA <as2902.b@samsung.com> Fri, 08 Oct 2010 09:45:06 +0900
+
+
valgrind (3.6.0-5) unstable; urgency=low
* Updated to revision 11404.
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/docs
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/docs/images
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/docs/internals
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/docs/lib
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/docs/xml
svn://svn.valgrind.org/valgrind
--- /dev/null
+drd_arm_linux-drd_barrier.o: drd_barrier.c drd_barrier.h drd_basics.h \
+ ../include/pub_tool_basics.h ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ drd_clientreq.h drd.h ../include/valgrind.h drd_clientobj.h \
+ ../include/pub_tool_execontext.h ../include/pub_tool_oset.h \
+ ../include/pub_tool_xarray.h drd_error.h pub_drd_bitmap.h drd_thread.h \
+ drd_segment.h drd_vc.h ../include/pub_tool_libcassert.h \
+ ../include/pub_tool_stacktrace.h ../include/pub_tool_threadstate.h \
+ ../include/pub_tool_debuginfo.h ../include/pub_tool_errormgr.h \
+ ../include/pub_tool_execontext.h drd_suppression.h \
+ ../include/pub_tool_libcprint.h ../include/pub_tool_machine.h \
+ ../include/pub_tool_mallocfree.h
+
+drd_barrier.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+drd_clientreq.h:
+
+drd.h:
+
+../include/valgrind.h:
+
+drd_clientobj.h:
+
+../include/pub_tool_execontext.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_xarray.h:
+
+drd_error.h:
+
+pub_drd_bitmap.h:
+
+drd_thread.h:
+
+drd_segment.h:
+
+drd_vc.h:
+
+../include/pub_tool_libcassert.h:
+
+../include/pub_tool_stacktrace.h:
+
+../include/pub_tool_threadstate.h:
+
+../include/pub_tool_debuginfo.h:
+
+../include/pub_tool_errormgr.h:
+
+../include/pub_tool_execontext.h:
+
+drd_suppression.h:
+
+../include/pub_tool_libcprint.h:
+
+../include/pub_tool_machine.h:
+
+../include/pub_tool_mallocfree.h:
--- /dev/null
+drd_arm_linux-drd_bitmap2_node.o: drd_bitmap2_node.c drd_basics.h \
+ ../include/pub_tool_basics.h ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ drd_bitmap.h pub_drd_bitmap.h ../include/pub_tool_oset.h \
+ ../include/pub_tool_libcbase.h ../include/pub_tool_libcassert.h \
+ ../include/pub_tool_libcprint.h ../include/pub_tool_mallocfree.h
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+drd_bitmap.h:
+
+pub_drd_bitmap.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_libcbase.h:
+
+../include/pub_tool_libcassert.h:
+
+../include/pub_tool_libcprint.h:
+
+../include/pub_tool_mallocfree.h:
--- /dev/null
+drd_arm_linux-drd_clientobj.o: drd_clientobj.c drd_clientobj.h \
+ drd_basics.h ../include/pub_tool_basics.h ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ drd_clientreq.h drd.h ../include/valgrind.h \
+ ../include/pub_tool_execontext.h ../include/pub_tool_oset.h \
+ ../include/pub_tool_xarray.h drd_suppression.h \
+ ../include/pub_tool_libcassert.h ../include/pub_tool_libcbase.h \
+ ../include/pub_tool_libcprint.h ../include/pub_tool_mallocfree.h \
+ ../include/pub_tool_options.h ../VEX/pub/libvex.h \
+ ../VEX/pub/libvex_basictypes.h ../VEX/pub/libvex_ir.h \
+ ../include/pub_tool_stacktrace.h ../include/pub_tool_threadstate.h
+
+drd_clientobj.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+drd_clientreq.h:
+
+drd.h:
+
+../include/valgrind.h:
+
+../include/pub_tool_execontext.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_xarray.h:
+
+drd_suppression.h:
+
+../include/pub_tool_libcassert.h:
+
+../include/pub_tool_libcbase.h:
+
+../include/pub_tool_libcprint.h:
+
+../include/pub_tool_mallocfree.h:
+
+../include/pub_tool_options.h:
+
+../VEX/pub/libvex.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+../VEX/pub/libvex_ir.h:
+
+../include/pub_tool_stacktrace.h:
+
+../include/pub_tool_threadstate.h:
--- /dev/null
+drd_arm_linux-drd_clientreq.o: drd_clientreq.c drd_barrier.h drd_basics.h \
+ ../include/pub_tool_basics.h ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ drd_clientreq.h drd.h ../include/valgrind.h drd_cond.h drd_thread.h \
+ drd_segment.h drd_vc.h ../include/pub_tool_libcassert.h pub_drd_bitmap.h \
+ ../include/pub_tool_oset.h ../include/pub_tool_execontext.h \
+ ../include/pub_tool_stacktrace.h ../include/pub_tool_threadstate.h \
+ drd_error.h ../include/pub_tool_debuginfo.h \
+ ../include/pub_tool_errormgr.h ../include/pub_tool_execontext.h drd_hb.h \
+ drd_load_store.h ../VEX/pub/libvex.h ../VEX/pub/libvex_basictypes.h \
+ ../VEX/pub/libvex_ir.h ../include/pub_tool_tooliface.h \
+ ../include/pub_tool_errormgr.h drd_malloc_wrappers.h drd_mutex.h \
+ drd_rwlock.h drd_clientobj.h ../include/pub_tool_xarray.h \
+ drd_semaphore.h drd_suppression.h ../include/pub_tool_libcprint.h \
+ ../include/pub_tool_machine.h
+
+drd_barrier.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+drd_clientreq.h:
+
+drd.h:
+
+../include/valgrind.h:
+
+drd_cond.h:
+
+drd_thread.h:
+
+drd_segment.h:
+
+drd_vc.h:
+
+../include/pub_tool_libcassert.h:
+
+pub_drd_bitmap.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_execontext.h:
+
+../include/pub_tool_stacktrace.h:
+
+../include/pub_tool_threadstate.h:
+
+drd_error.h:
+
+../include/pub_tool_debuginfo.h:
+
+../include/pub_tool_errormgr.h:
+
+../include/pub_tool_execontext.h:
+
+drd_hb.h:
+
+drd_load_store.h:
+
+../VEX/pub/libvex.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+../VEX/pub/libvex_ir.h:
+
+../include/pub_tool_tooliface.h:
+
+../include/pub_tool_errormgr.h:
+
+drd_malloc_wrappers.h:
+
+drd_mutex.h:
+
+drd_rwlock.h:
+
+drd_clientobj.h:
+
+../include/pub_tool_xarray.h:
+
+drd_semaphore.h:
+
+drd_suppression.h:
+
+../include/pub_tool_libcprint.h:
+
+../include/pub_tool_machine.h:
--- /dev/null
+drd_arm_linux-drd_cond.o: drd_cond.c drd_clientobj.h drd_basics.h \
+ ../include/pub_tool_basics.h ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ drd_clientreq.h drd.h ../include/valgrind.h \
+ ../include/pub_tool_execontext.h ../include/pub_tool_oset.h \
+ ../include/pub_tool_xarray.h drd_cond.h drd_thread.h drd_segment.h \
+ drd_vc.h ../include/pub_tool_libcassert.h pub_drd_bitmap.h \
+ ../include/pub_tool_stacktrace.h ../include/pub_tool_threadstate.h \
+ drd_error.h ../include/pub_tool_debuginfo.h \
+ ../include/pub_tool_errormgr.h ../include/pub_tool_execontext.h \
+ drd_mutex.h ../include/pub_tool_libcbase.h \
+ ../include/pub_tool_libcprint.h ../include/pub_tool_machine.h
+
+drd_clientobj.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+drd_clientreq.h:
+
+drd.h:
+
+../include/valgrind.h:
+
+../include/pub_tool_execontext.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_xarray.h:
+
+drd_cond.h:
+
+drd_thread.h:
+
+drd_segment.h:
+
+drd_vc.h:
+
+../include/pub_tool_libcassert.h:
+
+pub_drd_bitmap.h:
+
+../include/pub_tool_stacktrace.h:
+
+../include/pub_tool_threadstate.h:
+
+drd_error.h:
+
+../include/pub_tool_debuginfo.h:
+
+../include/pub_tool_errormgr.h:
+
+../include/pub_tool_execontext.h:
+
+drd_mutex.h:
+
+../include/pub_tool_libcbase.h:
+
+../include/pub_tool_libcprint.h:
+
+../include/pub_tool_machine.h:
--- /dev/null
+drd_arm_linux-drd_cond_initializer.o: drd_cond_initializer.c drd_cond.h \
+ drd_thread.h drd_basics.h ../include/pub_tool_basics.h \
+ ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ drd_segment.h drd_vc.h ../include/pub_tool_libcassert.h pub_drd_bitmap.h \
+ ../include/pub_tool_oset.h ../include/pub_tool_execontext.h \
+ ../include/pub_tool_stacktrace.h ../include/pub_tool_threadstate.h \
+ /usr/include/pthread.h /usr/include/features.h \
+ /usr/include/bits/predefs.h /usr/include/sys/cdefs.h \
+ /usr/include/bits/wordsize.h /usr/include/gnu/stubs.h \
+ /usr/include/endian.h /usr/include/bits/endian.h \
+ /usr/include/bits/byteswap.h /usr/include/sched.h \
+ /usr/include/bits/types.h /usr/include/bits/typesizes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stddef.h \
+ /usr/include/time.h /usr/include/bits/sched.h /usr/include/bits/time.h \
+ /usr/include/xlocale.h /usr/include/signal.h /usr/include/bits/sigset.h \
+ /usr/include/bits/pthreadtypes.h /usr/include/bits/setjmp.h
+
+drd_cond.h:
+
+drd_thread.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+drd_segment.h:
+
+drd_vc.h:
+
+../include/pub_tool_libcassert.h:
+
+pub_drd_bitmap.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_execontext.h:
+
+../include/pub_tool_stacktrace.h:
+
+../include/pub_tool_threadstate.h:
+
+/usr/include/pthread.h:
+
+/usr/include/features.h:
+
+/usr/include/bits/predefs.h:
+
+/usr/include/sys/cdefs.h:
+
+/usr/include/bits/wordsize.h:
+
+/usr/include/gnu/stubs.h:
+
+/usr/include/endian.h:
+
+/usr/include/bits/endian.h:
+
+/usr/include/bits/byteswap.h:
+
+/usr/include/sched.h:
+
+/usr/include/bits/types.h:
+
+/usr/include/bits/typesizes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stddef.h:
+
+/usr/include/time.h:
+
+/usr/include/bits/sched.h:
+
+/usr/include/bits/time.h:
+
+/usr/include/xlocale.h:
+
+/usr/include/signal.h:
+
+/usr/include/bits/sigset.h:
+
+/usr/include/bits/pthreadtypes.h:
+
+/usr/include/bits/setjmp.h:
--- /dev/null
+drd_arm_linux-drd_error.o: drd_error.c drd_clientobj.h drd_basics.h \
+ ../include/pub_tool_basics.h ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ drd_clientreq.h drd.h ../include/valgrind.h \
+ ../include/pub_tool_execontext.h ../include/pub_tool_oset.h \
+ ../include/pub_tool_xarray.h drd_error.h pub_drd_bitmap.h drd_thread.h \
+ drd_segment.h drd_vc.h ../include/pub_tool_libcassert.h \
+ ../include/pub_tool_stacktrace.h ../include/pub_tool_threadstate.h \
+ ../include/pub_tool_debuginfo.h ../include/pub_tool_errormgr.h \
+ ../include/pub_tool_execontext.h drd_malloc_wrappers.h drd_mutex.h \
+ drd_suppression.h ../include/pub_tool_vki.h ../include/vki/vki-linux.h \
+ ../include/vki/vki-posixtypes-arm-linux.h ../include/vki/vki-arm-linux.h \
+ ../include/pub_tool_libcbase.h ../include/pub_tool_libcfile.h \
+ ../include/pub_tool_libcprint.h ../include/pub_tool_machine.h \
+ ../include/pub_tool_mallocfree.h ../include/pub_tool_tooliface.h \
+ ../include/pub_tool_errormgr.h ../VEX/pub/libvex.h \
+ ../VEX/pub/libvex_basictypes.h ../VEX/pub/libvex_ir.h
+
+drd_clientobj.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+drd_clientreq.h:
+
+drd.h:
+
+../include/valgrind.h:
+
+../include/pub_tool_execontext.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_xarray.h:
+
+drd_error.h:
+
+pub_drd_bitmap.h:
+
+drd_thread.h:
+
+drd_segment.h:
+
+drd_vc.h:
+
+../include/pub_tool_libcassert.h:
+
+../include/pub_tool_stacktrace.h:
+
+../include/pub_tool_threadstate.h:
+
+../include/pub_tool_debuginfo.h:
+
+../include/pub_tool_errormgr.h:
+
+../include/pub_tool_execontext.h:
+
+drd_malloc_wrappers.h:
+
+drd_mutex.h:
+
+drd_suppression.h:
+
+../include/pub_tool_vki.h:
+
+../include/vki/vki-linux.h:
+
+../include/vki/vki-posixtypes-arm-linux.h:
+
+../include/vki/vki-arm-linux.h:
+
+../include/pub_tool_libcbase.h:
+
+../include/pub_tool_libcfile.h:
+
+../include/pub_tool_libcprint.h:
+
+../include/pub_tool_machine.h:
+
+../include/pub_tool_mallocfree.h:
+
+../include/pub_tool_tooliface.h:
+
+../include/pub_tool_errormgr.h:
+
+../VEX/pub/libvex.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+../VEX/pub/libvex_ir.h:
--- /dev/null
+drd_arm_linux-drd_hb.o: drd_hb.c drd_clientobj.h drd_basics.h \
+ ../include/pub_tool_basics.h ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ drd_clientreq.h drd.h ../include/valgrind.h \
+ ../include/pub_tool_execontext.h ../include/pub_tool_oset.h \
+ ../include/pub_tool_xarray.h drd_hb.h drd_thread.h drd_segment.h \
+ drd_vc.h ../include/pub_tool_libcassert.h pub_drd_bitmap.h \
+ ../include/pub_tool_stacktrace.h ../include/pub_tool_threadstate.h \
+ drd_error.h ../include/pub_tool_debuginfo.h \
+ ../include/pub_tool_errormgr.h ../include/pub_tool_execontext.h \
+ ../include/pub_tool_libcprint.h ../include/pub_tool_machine.h \
+ ../include/pub_tool_mallocfree.h
+
+drd_clientobj.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+drd_clientreq.h:
+
+drd.h:
+
+../include/valgrind.h:
+
+../include/pub_tool_execontext.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_xarray.h:
+
+drd_hb.h:
+
+drd_thread.h:
+
+drd_segment.h:
+
+drd_vc.h:
+
+../include/pub_tool_libcassert.h:
+
+pub_drd_bitmap.h:
+
+../include/pub_tool_stacktrace.h:
+
+../include/pub_tool_threadstate.h:
+
+drd_error.h:
+
+../include/pub_tool_debuginfo.h:
+
+../include/pub_tool_errormgr.h:
+
+../include/pub_tool_execontext.h:
+
+../include/pub_tool_libcprint.h:
+
+../include/pub_tool_machine.h:
+
+../include/pub_tool_mallocfree.h:
--- /dev/null
+drd_arm_linux-drd_load_store.o: drd_load_store.c drd_bitmap.h \
+ pub_drd_bitmap.h drd_basics.h ../include/pub_tool_basics.h \
+ ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ ../include/pub_tool_oset.h ../include/pub_tool_libcbase.h \
+ drd_thread_bitmap.h drd_thread.h drd_segment.h drd_vc.h \
+ ../include/pub_tool_libcassert.h ../include/pub_tool_execontext.h \
+ ../include/pub_tool_stacktrace.h ../include/pub_tool_threadstate.h \
+ drd_bitmap.c drd_error.h ../include/pub_tool_debuginfo.h \
+ ../include/pub_tool_errormgr.h ../include/pub_tool_execontext.h \
+ drd_suppression.h ../include/pub_tool_libcprint.h \
+ ../include/pub_tool_machine.h ../include/pub_tool_mallocfree.h \
+ drd_load_store.h ../VEX/pub/libvex.h ../VEX/pub/libvex_basictypes.h \
+ ../VEX/pub/libvex_ir.h ../include/pub_tool_tooliface.h \
+ ../include/pub_tool_errormgr.h drd_segment.c drd_thread.c drd_barrier.h \
+ drd_clientreq.h drd.h ../include/valgrind.h drd_clientobj.h \
+ ../include/pub_tool_xarray.h drd_cond.h drd_mutex.h drd_semaphore.h \
+ ../include/pub_tool_vki.h ../include/vki/vki-linux.h \
+ ../include/vki/vki-posixtypes-arm-linux.h ../include/vki/vki-arm-linux.h \
+ ../include/pub_tool_libcproc.h ../include/pub_tool_options.h drd_vc.c \
+ ../VEX/pub/libvex_guest_offsets.h
+
+drd_bitmap.h:
+
+pub_drd_bitmap.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_libcbase.h:
+
+drd_thread_bitmap.h:
+
+drd_thread.h:
+
+drd_segment.h:
+
+drd_vc.h:
+
+../include/pub_tool_libcassert.h:
+
+../include/pub_tool_execontext.h:
+
+../include/pub_tool_stacktrace.h:
+
+../include/pub_tool_threadstate.h:
+
+drd_bitmap.c:
+
+drd_error.h:
+
+../include/pub_tool_debuginfo.h:
+
+../include/pub_tool_errormgr.h:
+
+../include/pub_tool_execontext.h:
+
+drd_suppression.h:
+
+../include/pub_tool_libcprint.h:
+
+../include/pub_tool_machine.h:
+
+../include/pub_tool_mallocfree.h:
+
+drd_load_store.h:
+
+../VEX/pub/libvex.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+../VEX/pub/libvex_ir.h:
+
+../include/pub_tool_tooliface.h:
+
+../include/pub_tool_errormgr.h:
+
+drd_segment.c:
+
+drd_thread.c:
+
+drd_barrier.h:
+
+drd_clientreq.h:
+
+drd.h:
+
+../include/valgrind.h:
+
+drd_clientobj.h:
+
+../include/pub_tool_xarray.h:
+
+drd_cond.h:
+
+drd_mutex.h:
+
+drd_semaphore.h:
+
+../include/pub_tool_vki.h:
+
+../include/vki/vki-linux.h:
+
+../include/vki/vki-posixtypes-arm-linux.h:
+
+../include/vki/vki-arm-linux.h:
+
+../include/pub_tool_libcproc.h:
+
+../include/pub_tool_options.h:
+
+drd_vc.c:
+
+../VEX/pub/libvex_guest_offsets.h:
--- /dev/null
+drd_arm_linux-drd_main.o: drd_main.c drd_barrier.h drd_basics.h \
+ ../include/pub_tool_basics.h ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ drd_clientreq.h drd.h ../include/valgrind.h drd_clientobj.h \
+ ../include/pub_tool_execontext.h ../include/pub_tool_oset.h \
+ ../include/pub_tool_xarray.h drd_cond.h drd_thread.h drd_segment.h \
+ drd_vc.h ../include/pub_tool_libcassert.h pub_drd_bitmap.h \
+ ../include/pub_tool_stacktrace.h ../include/pub_tool_threadstate.h \
+ drd_error.h ../include/pub_tool_debuginfo.h \
+ ../include/pub_tool_errormgr.h ../include/pub_tool_execontext.h \
+ drd_load_store.h ../VEX/pub/libvex.h ../VEX/pub/libvex_basictypes.h \
+ ../VEX/pub/libvex_ir.h ../include/pub_tool_tooliface.h \
+ ../include/pub_tool_errormgr.h drd_malloc_wrappers.h drd_mutex.h \
+ drd_rwlock.h drd_semaphore.h drd_suppression.h \
+ ../VEX/pub/libvex_guest_offsets.h ../include/pub_tool_vki.h \
+ ../include/vki/vki-linux.h ../include/vki/vki-posixtypes-arm-linux.h \
+ ../include/vki/vki-arm-linux.h ../include/pub_tool_libcbase.h \
+ ../include/pub_tool_libcprint.h ../include/pub_tool_libcproc.h \
+ ../include/pub_tool_machine.h ../include/pub_tool_mallocfree.h \
+ ../include/pub_tool_options.h ../include/pub_tool_replacemalloc.h
+
+drd_barrier.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+drd_clientreq.h:
+
+drd.h:
+
+../include/valgrind.h:
+
+drd_clientobj.h:
+
+../include/pub_tool_execontext.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_xarray.h:
+
+drd_cond.h:
+
+drd_thread.h:
+
+drd_segment.h:
+
+drd_vc.h:
+
+../include/pub_tool_libcassert.h:
+
+pub_drd_bitmap.h:
+
+../include/pub_tool_stacktrace.h:
+
+../include/pub_tool_threadstate.h:
+
+drd_error.h:
+
+../include/pub_tool_debuginfo.h:
+
+../include/pub_tool_errormgr.h:
+
+../include/pub_tool_execontext.h:
+
+drd_load_store.h:
+
+../VEX/pub/libvex.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+../VEX/pub/libvex_ir.h:
+
+../include/pub_tool_tooliface.h:
+
+../include/pub_tool_errormgr.h:
+
+drd_malloc_wrappers.h:
+
+drd_mutex.h:
+
+drd_rwlock.h:
+
+drd_semaphore.h:
+
+drd_suppression.h:
+
+../VEX/pub/libvex_guest_offsets.h:
+
+../include/pub_tool_vki.h:
+
+../include/vki/vki-linux.h:
+
+../include/vki/vki-posixtypes-arm-linux.h:
+
+../include/vki/vki-arm-linux.h:
+
+../include/pub_tool_libcbase.h:
+
+../include/pub_tool_libcprint.h:
+
+../include/pub_tool_libcproc.h:
+
+../include/pub_tool_machine.h:
+
+../include/pub_tool_mallocfree.h:
+
+../include/pub_tool_options.h:
+
+../include/pub_tool_replacemalloc.h:
--- /dev/null
+drd_arm_linux-drd_malloc_wrappers.o: drd_malloc_wrappers.c \
+ drd_malloc_wrappers.h drd_basics.h ../include/pub_tool_basics.h \
+ ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ ../include/pub_tool_execontext.h drd_thread.h drd_segment.h drd_vc.h \
+ ../include/pub_tool_libcassert.h pub_drd_bitmap.h \
+ ../include/pub_tool_oset.h ../include/pub_tool_stacktrace.h \
+ ../include/pub_tool_threadstate.h ../include/pub_tool_hashtable.h \
+ ../include/pub_tool_libcbase.h ../include/pub_tool_libcprint.h \
+ ../include/pub_tool_mallocfree.h ../include/pub_tool_options.h \
+ ../VEX/pub/libvex.h ../VEX/pub/libvex_basictypes.h \
+ ../VEX/pub/libvex_ir.h ../include/pub_tool_replacemalloc.h \
+ ../include/pub_tool_tooliface.h ../include/pub_tool_errormgr.h \
+ ../include/pub_tool_execontext.h
+
+drd_malloc_wrappers.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+../include/pub_tool_execontext.h:
+
+drd_thread.h:
+
+drd_segment.h:
+
+drd_vc.h:
+
+../include/pub_tool_libcassert.h:
+
+pub_drd_bitmap.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_stacktrace.h:
+
+../include/pub_tool_threadstate.h:
+
+../include/pub_tool_hashtable.h:
+
+../include/pub_tool_libcbase.h:
+
+../include/pub_tool_libcprint.h:
+
+../include/pub_tool_mallocfree.h:
+
+../include/pub_tool_options.h:
+
+../VEX/pub/libvex.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+../VEX/pub/libvex_ir.h:
+
+../include/pub_tool_replacemalloc.h:
+
+../include/pub_tool_tooliface.h:
+
+../include/pub_tool_errormgr.h:
+
+../include/pub_tool_execontext.h:
--- /dev/null
+drd_arm_linux-drd_mutex.o: drd_mutex.c drd_basics.h \
+ ../include/pub_tool_basics.h ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ drd_clientobj.h drd_clientreq.h drd.h ../include/valgrind.h \
+ ../include/pub_tool_execontext.h ../include/pub_tool_oset.h \
+ ../include/pub_tool_xarray.h drd_error.h pub_drd_bitmap.h drd_thread.h \
+ drd_segment.h drd_vc.h ../include/pub_tool_libcassert.h \
+ ../include/pub_tool_stacktrace.h ../include/pub_tool_threadstate.h \
+ ../include/pub_tool_debuginfo.h ../include/pub_tool_errormgr.h \
+ ../include/pub_tool_execontext.h drd_mutex.h ../include/pub_tool_vki.h \
+ ../include/vki/vki-linux.h ../include/vki/vki-posixtypes-arm-linux.h \
+ ../include/vki/vki-arm-linux.h ../include/pub_tool_libcbase.h \
+ ../include/pub_tool_libcprint.h ../include/pub_tool_libcproc.h \
+ ../include/pub_tool_machine.h
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+drd_clientobj.h:
+
+drd_clientreq.h:
+
+drd.h:
+
+../include/valgrind.h:
+
+../include/pub_tool_execontext.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_xarray.h:
+
+drd_error.h:
+
+pub_drd_bitmap.h:
+
+drd_thread.h:
+
+drd_segment.h:
+
+drd_vc.h:
+
+../include/pub_tool_libcassert.h:
+
+../include/pub_tool_stacktrace.h:
+
+../include/pub_tool_threadstate.h:
+
+../include/pub_tool_debuginfo.h:
+
+../include/pub_tool_errormgr.h:
+
+../include/pub_tool_execontext.h:
+
+drd_mutex.h:
+
+../include/pub_tool_vki.h:
+
+../include/vki/vki-linux.h:
+
+../include/vki/vki-posixtypes-arm-linux.h:
+
+../include/vki/vki-arm-linux.h:
+
+../include/pub_tool_libcbase.h:
+
+../include/pub_tool_libcprint.h:
+
+../include/pub_tool_libcproc.h:
+
+../include/pub_tool_machine.h:
--- /dev/null
+drd_arm_linux-drd_rwlock.o: drd_rwlock.c drd_clientobj.h drd_basics.h \
+ ../include/pub_tool_basics.h ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ drd_clientreq.h drd.h ../include/valgrind.h \
+ ../include/pub_tool_execontext.h ../include/pub_tool_oset.h \
+ ../include/pub_tool_xarray.h drd_error.h pub_drd_bitmap.h drd_thread.h \
+ drd_segment.h drd_vc.h ../include/pub_tool_libcassert.h \
+ ../include/pub_tool_stacktrace.h ../include/pub_tool_threadstate.h \
+ ../include/pub_tool_debuginfo.h ../include/pub_tool_errormgr.h \
+ ../include/pub_tool_execontext.h drd_rwlock.h ../include/pub_tool_vki.h \
+ ../include/vki/vki-linux.h ../include/vki/vki-posixtypes-arm-linux.h \
+ ../include/vki/vki-arm-linux.h ../include/pub_tool_libcprint.h \
+ ../include/pub_tool_libcproc.h ../include/pub_tool_machine.h \
+ ../include/pub_tool_mallocfree.h
+
+drd_clientobj.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+drd_clientreq.h:
+
+drd.h:
+
+../include/valgrind.h:
+
+../include/pub_tool_execontext.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_xarray.h:
+
+drd_error.h:
+
+pub_drd_bitmap.h:
+
+drd_thread.h:
+
+drd_segment.h:
+
+drd_vc.h:
+
+../include/pub_tool_libcassert.h:
+
+../include/pub_tool_stacktrace.h:
+
+../include/pub_tool_threadstate.h:
+
+../include/pub_tool_debuginfo.h:
+
+../include/pub_tool_errormgr.h:
+
+../include/pub_tool_execontext.h:
+
+drd_rwlock.h:
+
+../include/pub_tool_vki.h:
+
+../include/vki/vki-linux.h:
+
+../include/vki/vki-posixtypes-arm-linux.h:
+
+../include/vki/vki-arm-linux.h:
+
+../include/pub_tool_libcprint.h:
+
+../include/pub_tool_libcproc.h:
+
+../include/pub_tool_machine.h:
+
+../include/pub_tool_mallocfree.h:
--- /dev/null
+drd_arm_linux-drd_semaphore.o: drd_semaphore.c drd_clientobj.h \
+ drd_basics.h ../include/pub_tool_basics.h ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ drd_clientreq.h drd.h ../include/valgrind.h \
+ ../include/pub_tool_execontext.h ../include/pub_tool_oset.h \
+ ../include/pub_tool_xarray.h drd_error.h pub_drd_bitmap.h drd_thread.h \
+ drd_segment.h drd_vc.h ../include/pub_tool_libcassert.h \
+ ../include/pub_tool_stacktrace.h ../include/pub_tool_threadstate.h \
+ ../include/pub_tool_debuginfo.h ../include/pub_tool_errormgr.h \
+ ../include/pub_tool_execontext.h drd_semaphore.h drd_suppression.h \
+ ../include/pub_tool_libcprint.h ../include/pub_tool_machine.h \
+ ../include/pub_tool_mallocfree.h
+
+drd_clientobj.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+drd_clientreq.h:
+
+drd.h:
+
+../include/valgrind.h:
+
+../include/pub_tool_execontext.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_xarray.h:
+
+drd_error.h:
+
+pub_drd_bitmap.h:
+
+drd_thread.h:
+
+drd_segment.h:
+
+drd_vc.h:
+
+../include/pub_tool_libcassert.h:
+
+../include/pub_tool_stacktrace.h:
+
+../include/pub_tool_threadstate.h:
+
+../include/pub_tool_debuginfo.h:
+
+../include/pub_tool_errormgr.h:
+
+../include/pub_tool_execontext.h:
+
+drd_semaphore.h:
+
+drd_suppression.h:
+
+../include/pub_tool_libcprint.h:
+
+../include/pub_tool_machine.h:
+
+../include/pub_tool_mallocfree.h:
--- /dev/null
+drd_arm_linux-drd_suppression.o: drd_suppression.c drd_suppression.h \
+ drd_basics.h ../include/pub_tool_basics.h ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ pub_drd_bitmap.h ../include/pub_tool_oset.h \
+ ../include/pub_tool_libcassert.h ../include/pub_tool_stacktrace.h \
+ ../include/pub_tool_threadstate.h ../include/pub_tool_libcprint.h
+
+drd_suppression.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+pub_drd_bitmap.h:
+
+../include/pub_tool_oset.h:
+
+../include/pub_tool_libcassert.h:
+
+../include/pub_tool_stacktrace.h:
+
+../include/pub_tool_threadstate.h:
+
+../include/pub_tool_libcprint.h:
--- /dev/null
+vgpreload_drd_arm_linux_so-drd_pthread_intercepts.o: \
+ drd_pthread_intercepts.c /usr/include/assert.h /usr/include/features.h \
+ /usr/include/bits/predefs.h /usr/include/sys/cdefs.h \
+ /usr/include/bits/wordsize.h /usr/include/gnu/stubs.h \
+ /usr/include/pthread.h /usr/include/endian.h /usr/include/bits/endian.h \
+ /usr/include/bits/byteswap.h /usr/include/sched.h \
+ /usr/include/bits/types.h /usr/include/bits/typesizes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stddef.h \
+ /usr/include/time.h /usr/include/bits/sched.h /usr/include/bits/time.h \
+ /usr/include/xlocale.h /usr/include/signal.h /usr/include/bits/sigset.h \
+ /usr/include/bits/pthreadtypes.h /usr/include/bits/setjmp.h \
+ /usr/include/semaphore.h /usr/include/sys/types.h \
+ /usr/include/sys/select.h /usr/include/bits/select.h \
+ /usr/include/sys/sysmacros.h /usr/include/bits/semaphore.h \
+ /usr/include/stdint.h /usr/include/bits/wchar.h /usr/include/stdio.h \
+ /usr/include/libio.h /usr/include/_G_config.h /usr/include/wchar.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ /usr/include/bits/stdio_lim.h /usr/include/bits/sys_errlist.h \
+ /usr/include/bits/stdio.h /usr/include/stdlib.h \
+ /usr/include/bits/waitflags.h /usr/include/bits/waitstatus.h \
+ /usr/include/alloca.h /usr/include/unistd.h \
+ /usr/include/bits/posix_opt.h /usr/include/bits/environments.h \
+ /usr/include/bits/confname.h /usr/include/getopt.h ../config.h \
+ drd_basics.h ../include/pub_tool_basics.h ../VEX/pub/libvex_basictypes.h \
+ drd_clientreq.h drd.h ../include/valgrind.h ../include/pub_tool_redir.h
+
+/usr/include/assert.h:
+
+/usr/include/features.h:
+
+/usr/include/bits/predefs.h:
+
+/usr/include/sys/cdefs.h:
+
+/usr/include/bits/wordsize.h:
+
+/usr/include/gnu/stubs.h:
+
+/usr/include/pthread.h:
+
+/usr/include/endian.h:
+
+/usr/include/bits/endian.h:
+
+/usr/include/bits/byteswap.h:
+
+/usr/include/sched.h:
+
+/usr/include/bits/types.h:
+
+/usr/include/bits/typesizes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stddef.h:
+
+/usr/include/time.h:
+
+/usr/include/bits/sched.h:
+
+/usr/include/bits/time.h:
+
+/usr/include/xlocale.h:
+
+/usr/include/signal.h:
+
+/usr/include/bits/sigset.h:
+
+/usr/include/bits/pthreadtypes.h:
+
+/usr/include/bits/setjmp.h:
+
+/usr/include/semaphore.h:
+
+/usr/include/sys/types.h:
+
+/usr/include/sys/select.h:
+
+/usr/include/bits/select.h:
+
+/usr/include/sys/sysmacros.h:
+
+/usr/include/bits/semaphore.h:
+
+/usr/include/stdint.h:
+
+/usr/include/bits/wchar.h:
+
+/usr/include/stdio.h:
+
+/usr/include/libio.h:
+
+/usr/include/_G_config.h:
+
+/usr/include/wchar.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+/usr/include/bits/stdio_lim.h:
+
+/usr/include/bits/sys_errlist.h:
+
+/usr/include/bits/stdio.h:
+
+/usr/include/stdlib.h:
+
+/usr/include/bits/waitflags.h:
+
+/usr/include/bits/waitstatus.h:
+
+/usr/include/alloca.h:
+
+/usr/include/unistd.h:
+
+/usr/include/bits/posix_opt.h:
+
+/usr/include/bits/environments.h:
+
+/usr/include/bits/confname.h:
+
+/usr/include/getopt.h:
+
+../config.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+drd_clientreq.h:
+
+drd.h:
+
+../include/valgrind.h:
+
+../include/pub_tool_redir.h:
--- /dev/null
+vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.o: \
+ drd_qtcore_intercepts.c /usr/include/assert.h /usr/include/features.h \
+ /usr/include/bits/predefs.h /usr/include/sys/cdefs.h \
+ /usr/include/bits/wordsize.h /usr/include/gnu/stubs.h drd_clientreq.h \
+ drd.h ../include/valgrind.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ drd_basics.h ../include/pub_tool_basics.h ../VEX/pub/libvex_basictypes.h \
+ ../include/pub_tool_redir.h
+
+/usr/include/assert.h:
+
+/usr/include/features.h:
+
+/usr/include/bits/predefs.h:
+
+/usr/include/sys/cdefs.h:
+
+/usr/include/bits/wordsize.h:
+
+/usr/include/gnu/stubs.h:
+
+drd_clientreq.h:
+
+drd.h:
+
+../include/valgrind.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+drd_basics.h:
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+../include/pub_tool_redir.h:
--- /dev/null
+vgpreload_drd_arm_linux_so-drd_strmem_intercepts.o: \
+ drd_strmem_intercepts.c ../include/pub_tool_basics.h \
+ ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ ../include/pub_tool_hashtable.h ../include/pub_tool_redir.h \
+ ../include/pub_tool_tooliface.h ../include/pub_tool_errormgr.h \
+ ../include/pub_tool_execontext.h ../VEX/pub/libvex.h \
+ ../VEX/pub/libvex_basictypes.h ../VEX/pub/libvex_ir.h \
+ ../include/valgrind.h
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+../include/pub_tool_hashtable.h:
+
+../include/pub_tool_redir.h:
+
+../include/pub_tool_tooliface.h:
+
+../include/pub_tool_errormgr.h:
+
+../include/pub_tool_execontext.h:
+
+../VEX/pub/libvex.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+../VEX/pub/libvex_ir.h:
+
+../include/valgrind.h:
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drd_clientreq.h
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drd_load_store.c
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drd_error.h
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drd_malloc_wrappers.h
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drd_suppression.h
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drd_rwlock.c
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drd_rwlock.h
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drd_thread_bitmap.h
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drd_clientobj.c
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drd_basics.h
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drd_clientobj.h
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drd_cond.c
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drd_cond_initializer.c
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pub_drd_bitmap.h
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drd_cond.h
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drd_hb.c
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drd_barrier.h
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drd_qtcore_intercepts.c
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drd_hb.h
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Makefile.am
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drd_segment.c
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drd_bitmap2_node.c
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\f
This file is part of DRD, a Valgrind tool for verification of
multithreaded programs.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
All rights reserved.
Redistribution and use in source and binary forms, with or without
public: \
static_var##_annotator() \
{ \
- ANNOTATE_BENIGN_RACE(&static_var, #static_var ": " description); \
+ ANNOTATE_BENIGN_RACE_SIZED(&static_var, sizeof(static_var), \
+ #static_var ": " description); \
} \
} the_##static_var##_annotator; \
}
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of DRD, a thread error detector.
- Copyright (C) 2009 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2009 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of DRD, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# drd/Makefile. Generated from Makefile.in by configure.
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
+
+
+
+pkgdatadir = $(datadir)/valgrind
+pkglibdir = $(libdir)/valgrind
+pkgincludedir = $(includedir)/valgrind
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+install_sh_DATA = $(install_sh) -c -m 644
+install_sh_PROGRAM = $(install_sh) -c
+install_sh_SCRIPT = $(install_sh) -c
+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+build_triplet = arm-unknown-linux-gnueabi
+host_triplet = arm-unknown-linux-gnueabi
+DIST_COMMON = $(noinst_HEADERS) $(pkginclude_HEADERS) \
+ $(srcdir)/Makefile.am $(srcdir)/Makefile.in \
+ $(top_srcdir)/Makefile.all.am $(top_srcdir)/Makefile.tool.am
+noinst_PROGRAMS = drd-arm-linux$(EXEEXT) \
+ $(am__EXEEXT_1) \
+ vgpreload_drd-arm-linux.so$(EXEEXT) \
+ $(am__EXEEXT_2)
+#am__append_1 = drd--linux
+drd__linux_DEPENDENCIES =
+#am__append_2 = vgpreload_drd--linux.so
+subdir = drd
+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
+am__aclocal_m4_deps = $(top_srcdir)/configure.in
+am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
+ $(ACLOCAL_M4)
+mkinstalldirs = $(install_sh) -d
+CONFIG_HEADER = $(top_builddir)/config.h
+CONFIG_CLEAN_FILES =
+#am__EXEEXT_1 = drd--linux$(EXEEXT)
+#am__EXEEXT_2 = vgpreload_drd--linux.so$(EXEEXT)
+PROGRAMS = $(noinst_PROGRAMS)
+am__objects_1 = \
+ drd_arm_linux-drd_barrier.$(OBJEXT) \
+ drd_arm_linux-drd_bitmap2_node.$(OBJEXT) \
+ drd_arm_linux-drd_clientobj.$(OBJEXT) \
+ drd_arm_linux-drd_clientreq.$(OBJEXT) \
+ drd_arm_linux-drd_cond.$(OBJEXT) \
+ drd_arm_linux-drd_cond_initializer.$(OBJEXT) \
+ drd_arm_linux-drd_error.$(OBJEXT) \
+ drd_arm_linux-drd_hb.$(OBJEXT) \
+ drd_arm_linux-drd_load_store.$(OBJEXT) \
+ drd_arm_linux-drd_main.$(OBJEXT) \
+ drd_arm_linux-drd_malloc_wrappers.$(OBJEXT) \
+ drd_arm_linux-drd_mutex.$(OBJEXT) \
+ drd_arm_linux-drd_rwlock.$(OBJEXT) \
+ drd_arm_linux-drd_semaphore.$(OBJEXT) \
+ drd_arm_linux-drd_suppression.$(OBJEXT)
+am_drd_arm_linux_OBJECTS = $(am__objects_1)
+drd_arm_linux_OBJECTS = \
+ $(am_drd_arm_linux_OBJECTS)
+am__drd__linux_SOURCES_DIST = drd_barrier.c \
+ drd_bitmap2_node.c drd_clientobj.c drd_clientreq.c drd_cond.c \
+ drd_cond_initializer.c drd_error.c drd_hb.c drd_load_store.c \
+ drd_main.c drd_malloc_wrappers.c drd_mutex.c drd_rwlock.c \
+ drd_semaphore.c drd_suppression.c
+am__objects_2 = \
+ drd__linux-drd_barrier.$(OBJEXT) \
+ drd__linux-drd_bitmap2_node.$(OBJEXT) \
+ drd__linux-drd_clientobj.$(OBJEXT) \
+ drd__linux-drd_clientreq.$(OBJEXT) \
+ drd__linux-drd_cond.$(OBJEXT) \
+ drd__linux-drd_cond_initializer.$(OBJEXT) \
+ drd__linux-drd_error.$(OBJEXT) \
+ drd__linux-drd_hb.$(OBJEXT) \
+ drd__linux-drd_load_store.$(OBJEXT) \
+ drd__linux-drd_main.$(OBJEXT) \
+ drd__linux-drd_malloc_wrappers.$(OBJEXT) \
+ drd__linux-drd_mutex.$(OBJEXT) \
+ drd__linux-drd_rwlock.$(OBJEXT) \
+ drd__linux-drd_semaphore.$(OBJEXT) \
+ drd__linux-drd_suppression.$(OBJEXT)
+#am_drd__linux_OBJECTS = \
+# $(am__objects_2)
+drd__linux_OBJECTS = \
+ $(am_drd__linux_OBJECTS)
+am__objects_3 = vgpreload_drd_arm_linux_so-drd_pthread_intercepts.$(OBJEXT) \
+ vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.$(OBJEXT) \
+ vgpreload_drd_arm_linux_so-drd_strmem_intercepts.$(OBJEXT)
+am_vgpreload_drd_arm_linux_so_OBJECTS = \
+ $(am__objects_3)
+vgpreload_drd_arm_linux_so_OBJECTS = \
+ $(am_vgpreload_drd_arm_linux_so_OBJECTS)
+vgpreload_drd_arm_linux_so_LDADD = $(LDADD)
+vgpreload_drd_arm_linux_so_LINK = $(CCLD) \
+ $(vgpreload_drd_arm_linux_so_CFLAGS) \
+ $(CFLAGS) \
+ $(vgpreload_drd_arm_linux_so_LDFLAGS) \
+ $(LDFLAGS) -o $@
+am__vgpreload_drd__linux_so_SOURCES_DIST = \
+ drd_pthread_intercepts.c drd_qtcore_intercepts.c \
+ drd_strmem_intercepts.c
+am__objects_4 = vgpreload_drd__linux_so-drd_pthread_intercepts.$(OBJEXT) \
+ vgpreload_drd__linux_so-drd_qtcore_intercepts.$(OBJEXT) \
+ vgpreload_drd__linux_so-drd_strmem_intercepts.$(OBJEXT)
+#am_vgpreload_drd__linux_so_OBJECTS = \
+# $(am__objects_4)
+vgpreload_drd__linux_so_OBJECTS = \
+ $(am_vgpreload_drd__linux_so_OBJECTS)
+vgpreload_drd__linux_so_LDADD = $(LDADD)
+vgpreload_drd__linux_so_LINK = $(CCLD) \
+ $(vgpreload_drd__linux_so_CFLAGS) \
+ $(CFLAGS) \
+ $(vgpreload_drd__linux_so_LDFLAGS) \
+ $(LDFLAGS) -o $@
+DEFAULT_INCLUDES = -I. -I$(top_builddir)
+depcomp = $(SHELL) $(top_srcdir)/depcomp
+am__depfiles_maybe = depfiles
+COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
+ $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
+CCLD = $(CC)
+LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) -o $@
+SOURCES = $(drd_arm_linux_SOURCES) \
+ $(drd__linux_SOURCES) \
+ $(vgpreload_drd_arm_linux_so_SOURCES) \
+ $(vgpreload_drd__linux_so_SOURCES)
+DIST_SOURCES = $(drd_arm_linux_SOURCES) \
+ $(am__drd__linux_SOURCES_DIST) \
+ $(vgpreload_drd_arm_linux_so_SOURCES) \
+ $(am__vgpreload_drd__linux_so_SOURCES_DIST)
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+ html-recursive info-recursive install-data-recursive \
+ install-dvi-recursive install-exec-recursive \
+ install-html-recursive install-info-recursive \
+ install-pdf-recursive install-ps-recursive install-recursive \
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+am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`;
+am__vpath_adj = case $$p in \
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+ *) f=$$p;; \
+ esac;
+am__strip_dir = `echo $$p | sed -e 's|^.*/||'`;
+am__installdirs = "$(DESTDIR)$(pkgincludedir)"
+pkgincludeHEADERS_INSTALL = $(INSTALL_HEADER)
+HEADERS = $(noinst_HEADERS) $(pkginclude_HEADERS)
+RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
+ distclean-recursive maintainer-clean-recursive
+ETAGS = etags
+CTAGS = ctags
+DIST_SUBDIRS = $(SUBDIRS)
+DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST)
+ACLOCAL = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run aclocal-1.10
+AMTAR = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run tar
+AR = /scratchbox/compilers/bin/ar
+AUTOCONF = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run autoconf
+AUTOHEADER = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run autoheader
+AUTOMAKE = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run automake-1.10
+AWK = gawk
+BOOST_CFLAGS =
+BOOST_LIBS =
+CC = gcc
+CCAS = gcc
+CCASDEPMODE = depmode=gcc3
+CCASFLAGS = -Wno-long-long
+CCDEPMODE = depmode=gcc3
+CFLAGS = -Wno-long-long -Wno-pointer-sign -fno-stack-protector
+CPP = gcc -E
+CPPFLAGS =
+CXX = g++
+CXXDEPMODE = depmode=gcc3
+CXXFLAGS = -g -O2
+CYGPATH_W = echo
+DEFAULT_SUPP = exp-ptrcheck.supp xfree-3.supp xfree-4.supp glibc-2.X-drd.supp glibc-2.34567-NPTL-helgrind.supp glibc-2.X.supp
+DEFS = -DHAVE_CONFIG_H
+DEPDIR = .deps
+DIFF = diff -u
+ECHO_C =
+ECHO_N = -n
+ECHO_T =
+EGREP = /scratchbox/tools/bin/grep -E
+EXEEXT =
+FLAG_FNO_STACK_PROTECTOR = -fno-stack-protector
+FLAG_M32 =
+FLAG_M64 =
+FLAG_MAIX32 =
+FLAG_MAIX64 =
+FLAG_MMMX =
+FLAG_MSSE =
+FLAG_NO_BUILD_ID = -Wl,--build-id=none
+FLAG_UNLIMITED_INLINE_UNIT_GROWTH = --param inline-unit-growth=900
+FLAG_W_EXTRA = -Wextra
+FLAG_W_NO_EMPTY_BODY = -Wno-empty-body
+FLAG_W_NO_FORMAT_ZERO_LENGTH = -Wno-format-zero-length
+FLAG_W_NO_UNINITIALIZED = -Wno-uninitialized
+GDB = /targets/links/arch_tools/bin/gdb
+GLIBC_VERSION = 2.11
+GREP = /scratchbox/tools/bin/grep
+INSTALL = /scratchbox/tools/bin/install -c
+INSTALL_DATA = ${INSTALL} -m 644
+INSTALL_PROGRAM = ${INSTALL}
+INSTALL_SCRIPT = ${INSTALL}
+INSTALL_STRIP_PROGRAM = $(install_sh) -c -s
+LDFLAGS = -Wl,--hash-style=both
+LIBOBJS =
+LIBS =
+LN_S = ln -s
+LTLIBOBJS =
+MAINT = #
+MAKEINFO = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run makeinfo
+MKDIR_P = /scratchbox/tools/bin/mkdir -p
+MPI_CC = mpicc
+OBJEXT = o
+PACKAGE = valgrind
+PACKAGE_BUGREPORT = valgrind-users@lists.sourceforge.net
+PACKAGE_NAME = Valgrind
+PACKAGE_STRING = Valgrind 3.6.0.SVN
+PACKAGE_TARNAME = valgrind
+PACKAGE_VERSION = 3.6.0.SVN
+PATH_SEPARATOR = :
+PERL = /scratchbox/tools/bin/perl
+PKG_CONFIG = /scratchbox/tools/bin/pkg-config
+PREFERRED_STACK_BOUNDARY =
+QTCORE_CFLAGS =
+QTCORE_LIBS =
+RANLIB = ranlib
+SED = /scratchbox/tools/bin/sed
+SET_MAKE =
+SHELL = /bin/sh
+STRIP =
+VALT_LOAD_ADDRESS_PRI = 0x38000000
+VALT_LOAD_ADDRESS_SEC = 0xUNSET
+VERSION = 3.6.0.SVN
+VGCONF_ARCH_PRI = arm
+VGCONF_ARCH_SEC =
+VGCONF_OS = linux
+VGCONF_PLATFORM_PRI_CAPS = ARM_LINUX
+VGCONF_PLATFORM_SEC_CAPS =
+abs_builddir = /home/ubuntu/valgrind-3.5.0/drd
+abs_srcdir = /home/ubuntu/valgrind-3.5.0/drd
+abs_top_builddir = /home/ubuntu/valgrind-3.5.0
+abs_top_srcdir = /home/ubuntu/valgrind-3.5.0
+ac_ct_CC = gcc
+ac_ct_CXX = g++
+am__include = include
+am__leading_dot = .
+am__quote =
+am__tar = ${AMTAR} chof - "$$tardir"
+am__untar = ${AMTAR} xf -
+bindir = ${exec_prefix}/bin
+build = arm-unknown-linux-gnueabi
+build_alias =
+build_cpu = arm
+build_os = linux-gnueabi
+build_vendor = unknown
+builddir = .
+datadir = ${datarootdir}
+datarootdir = ${prefix}/share
+docdir = ${datarootdir}/doc/${PACKAGE_TARNAME}
+dvidir = ${docdir}
+exec_prefix = ${prefix}
+host = arm-unknown-linux-gnueabi
+host_alias =
+host_cpu = arm
+host_os = linux-gnueabi
+host_vendor = unknown
+htmldir = ${docdir}
+includedir = ${prefix}/include
+infodir = ${datarootdir}/info
+install_sh = $(SHELL) /home/ubuntu/valgrind-3.5.0/install-sh
+libdir = ${exec_prefix}/lib
+libexecdir = ${exec_prefix}/libexec
+localedir = ${datarootdir}/locale
+localstatedir = ${prefix}/var
+mandir = ${datarootdir}/man
+mkdir_p = /scratchbox/tools/bin/mkdir -p
+oldincludedir = /usr/include
+pdfdir = ${docdir}
+prefix = /usr
+program_transform_name = s,x,x,
+psdir = ${docdir}
+sbindir = ${exec_prefix}/sbin
+sharedstatedir = ${prefix}/com
+srcdir = .
+sysconfdir = ${prefix}/etc
+target_alias =
+top_builddir = ..
+top_srcdir = ..
+SUBDIRS = . tests
+inplacedir = $(top_builddir)/.in_place
+
+#----------------------------------------------------------------------------
+# Flags
+#----------------------------------------------------------------------------
+
+# Baseline flags for all compilations. Aim here is to maximise
+# performance and get whatever useful warnings we can out of gcc.
+AM_CFLAGS_BASE = \
+ -O2 -g \
+ -Wall \
+ -Wmissing-prototypes \
+ -Wshadow \
+ -Wpointer-arith \
+ -Wstrict-prototypes \
+ -Wmissing-declarations \
+ -Wno-format-zero-length \
+ -fno-strict-aliasing
+
+AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+#AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+# -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
+# and so the CPPFLAGS are passed to the assembler. But this is not true for
+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
+# AM_CPPFLAGS_<PLATFORM> in each AM_CCASFLAGS_<PLATFORM> variable. This
+# means some of the flags are duplicated on systems with newer versions of
+# automake, but this does not really matter and seems hard to avoid.
+AM_CPPFLAGS_ARM_LINUX = \
+ -I$(top_srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_arm=1 \
+ -DVGO_linux=1 \
+ -DVGP_arm_linux=1
+
+#AM_CPPFLAGS_ = \
+# -I$(top_srcdir) \
+# -I$(top_srcdir)/include \
+# -I$(top_srcdir)/VEX/pub \
+# -DVGA_=1 \
+# -DVGO_linux=1 \
+# -DVGP__linux=1
+
+AM_FLAG_M3264_X86_LINUX =
+AM_CFLAGS_X86_LINUX = \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) -g
+AM_FLAG_M3264_AMD64_LINUX =
+AM_CFLAGS_AMD64_LINUX = -fomit-frame-pointer \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) -g
+AM_FLAG_M3264_PPC32_LINUX =
+AM_CFLAGS_PPC32_LINUX = $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_LINUX = $(AM_CPPFLAGS_PPC32_LINUX) -g
+AM_FLAG_M3264_PPC64_LINUX =
+AM_CFLAGS_PPC64_LINUX = $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_LINUX = $(AM_CPPFLAGS_PPC64_LINUX) -g
+AM_FLAG_M3264_ARM_LINUX =
+AM_CFLAGS_ARM_LINUX = \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) -g
+AM_FLAG_M3264_PPC32_AIX5 =
+AM_CFLAGS_PPC32_AIX5 = -mcpu=powerpc $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
+ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 =
+AM_CFLAGS_PPC64_AIX5 = -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 \
+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_ARM_LINUX)
+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_ARM_LINUX)
+AM_CFLAGS_PRI = $(AM_CFLAGS_ARM_LINUX)
+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_ARM_LINUX)
+AM_FLAG_M3264_SEC =
+#AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+
+#----------------------------------------------------------------------------
+# <tool>-<platform> stuff
+#----------------------------------------------------------------------------
+TOOL_DEPENDENCIES_ARM_LINUX = \
+ $(top_builddir)/coregrind/libcoregrind-arm-linux.a \
+ $(top_builddir)/VEX/libvex-arm-linux.a
+
+#TOOL_DEPENDENCIES_ = \
+# $(top_builddir)/coregrind/libcoregrind--linux.a \
+# $(top_builddir)/VEX/libvex--linux.a
+
+TOOL_LDADD_COMMON = -lgcc
+TOOL_LDADD_ARM_LINUX = \
+ $(TOOL_DEPENDENCIES_ARM_LINUX) $(TOOL_LDADD_COMMON)
+
+#TOOL_LDADD_ = \
+# $(TOOL_DEPENDENCIES_) $(TOOL_LDADD_COMMON)
+
+
+# -Wl,--build-id=none is needed when linking tools on Linux. Without this
+# flag newer ld versions (2.20 and later) create a .note.gnu.build-id at the
+# default text segment address, which of course means the resulting executable
+# is unusable. So we have to tell ld not to generate that, with --build-id=none.
+TOOL_LDFLAGS_COMMON_LINUX = \
+ -static -nodefaultlibs -nostartfiles -u _start -Wl,--build-id=none
+
+TOOL_LDFLAGS_COMMON_AIX5 = \
+ -static -Wl,-e_start_valgrind
+
+TOOL_LDFLAGS_COMMON_DARWIN = \
+ -nodefaultlibs -nostartfiles -Wl,-u,__start -Wl,-e,__start
+
+TOOL_LDFLAGS_X86_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX)
+
+TOOL_LDFLAGS_AMD64_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX)
+
+TOOL_LDFLAGS_PPC32_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX)
+
+TOOL_LDFLAGS_PPC64_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX)
+
+TOOL_LDFLAGS_ARM_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX)
+
+TOOL_LDFLAGS_PPC32_AIX5 = \
+ $(TOOL_LDFLAGS_COMMON_AIX5)
+
+TOOL_LDFLAGS_PPC64_AIX5 = \
+ $(TOOL_LDFLAGS_COMMON_AIX5) -Wl,-bbigtoc
+
+TOOL_LDFLAGS_X86_DARWIN = \
+ $(TOOL_LDFLAGS_COMMON_DARWIN) -arch i386
+
+TOOL_LDFLAGS_AMD64_DARWIN = \
+ $(TOOL_LDFLAGS_COMMON_DARWIN) -arch x86_64
+
+
+# NB for 64-bit darwin. We may want to set -Wl,-pagezero_size to
+# something smaller than the default of 4G, so as to facilitate
+# loading clients who are also linked thusly (currently m_ume.c
+# will fail to load them). Although such setting is probably
+# better done in link_tool_exe.c.
+#
+# -Wl,-pagezero_size,0x100000000
+
+#----------------------------------------------------------------------------
+# vgpreload_<tool>-<platform>.a stuff
+#----------------------------------------------------------------------------
+LIBREPLACEMALLOC_X86_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-linux.a
+
+LIBREPLACEMALLOC_AMD64_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-amd64-linux.a
+
+LIBREPLACEMALLOC_PPC32_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc32-linux.a
+
+LIBREPLACEMALLOC_PPC64_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc64-linux.a
+
+LIBREPLACEMALLOC_ARM_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-arm-linux.a
+
+LIBREPLACEMALLOC_PPC32_AIX5 = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc32-aix5.a
+
+LIBREPLACEMALLOC_PPC64_AIX5 = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc64-aix5.a
+
+LIBREPLACEMALLOC_X86_DARWIN = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-darwin.a
+
+LIBREPLACEMALLOC_AMD64_DARWIN = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-amd64-darwin.a
+
+LIBREPLACEMALLOC_LDFLAGS_X86_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_X86_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_AMD64_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_AMD64_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_PPC32_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_PPC32_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_PPC64_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_PPC64_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_ARM_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_ARM_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_PPC32_AIX5 = \
+ $(LIBREPLACEMALLOC_PPC32_AIX5)
+
+LIBREPLACEMALLOC_LDFLAGS_PPC64_AIX5 = \
+ $(LIBREPLACEMALLOC_PPC64_AIX5)
+
+LIBREPLACEMALLOC_LDFLAGS_X86_DARWIN = \
+ $(LIBREPLACEMALLOC_X86_DARWIN)
+
+LIBREPLACEMALLOC_LDFLAGS_AMD64_DARWIN = \
+ $(LIBREPLACEMALLOC_AMD64_DARWIN)
+
+EXTRA_DIST = docs/drd-manual.xml
+
+#----------------------------------------------------------------------------
+# Headers, flags
+#----------------------------------------------------------------------------
+pkginclude_HEADERS = drd.h
+noinst_HEADERS = \
+ drd_barrier.h \
+ drd_basics.h \
+ drd_bitmap.c \
+ drd_bitmap.h \
+ drd_clientobj.h \
+ drd_clientreq.h \
+ drd_cond.h \
+ drd_error.h \
+ drd_hb.h \
+ drd_load_store.h \
+ drd_malloc_wrappers.h \
+ drd_mutex.h \
+ drd_rwlock.h \
+ drd_segment.c \
+ drd_segment.h \
+ drd_semaphore.h \
+ drd_suppression.h \
+ drd_thread.c \
+ drd_thread.h \
+ drd_thread_bitmap.h \
+ drd_vc.c \
+ drd_vc.h \
+ pub_drd_bitmap.h
+
+DRD_CFLAGS = \
+ --param inline-unit-growth=900 \
+ -O2 \
+ -Wextra \
+ -Wformat-nonliteral \
+ -Wno-inline \
+ -Wno-unused-parameter
+
+DRD_SOURCES_COMMON = \
+ drd_barrier.c \
+ drd_bitmap2_node.c \
+ drd_clientobj.c \
+ drd_clientreq.c \
+ drd_cond.c \
+ drd_cond_initializer.c \
+ drd_error.c \
+ drd_hb.c \
+ drd_load_store.c \
+ drd_main.c \
+ drd_malloc_wrappers.c \
+ drd_mutex.c \
+ drd_rwlock.c \
+ drd_semaphore.c \
+ drd_suppression.c
+
+drd_arm_linux_SOURCES = \
+ $(DRD_SOURCES_COMMON)
+
+drd_arm_linux_CPPFLAGS = \
+ $(AM_CPPFLAGS_ARM_LINUX)
+
+drd_arm_linux_CFLAGS = \
+ $(AM_CFLAGS_ARM_LINUX) $(DRD_CFLAGS)
+
+drd_arm_linux_DEPENDENCIES = \
+ $(TOOL_DEPENDENCIES_ARM_LINUX)
+
+drd_arm_linux_LDADD = \
+ $(TOOL_LDADD_ARM_LINUX)
+
+drd_arm_linux_LDFLAGS = \
+ $(TOOL_LDFLAGS_ARM_LINUX)
+
+drd_arm_linux_LINK = \
+ $(top_builddir)/coregrind/link_tool_exe_linux \
+ 0x38000000 \
+ $(LINK) \
+ $(drd_arm_linux_CFLAGS) \
+ $(drd_arm_linux_LDFLAGS)
+
+#drd__linux_SOURCES = \
+# $(DRD_SOURCES_COMMON)
+
+#drd__linux_CPPFLAGS = \
+# $(AM_CPPFLAGS_)
+
+#drd__linux_CFLAGS = \
+# $(AM_CFLAGS_) $(DRD_CFLAGS)
+
+#drd__linux_DEPENDENCIES = \
+# $(TOOL_DEPENDENCIES_)
+
+#drd__linux_LDADD = \
+# $(TOOL_LDADD_)
+
+#drd__linux_LDFLAGS = \
+# $(TOOL_LDFLAGS_)
+
+#drd__linux_LINK = \
+# $(top_builddir)/coregrind/link_tool_exe_linux \
+# 0xUNSET \
+# $(LINK) \
+# $(drd__linux_CFLAGS) \
+# $(drd__linux_LDFLAGS)
+
+#noinst_DSYMS = $(noinst_PROGRAMS)
+VGPRELOAD_DRD_SOURCES_COMMON = \
+ drd_pthread_intercepts.c \
+ drd_qtcore_intercepts.c \
+ drd_strmem_intercepts.c
+
+vgpreload_drd_arm_linux_so_SOURCES = \
+ $(VGPRELOAD_DRD_SOURCES_COMMON)
+
+vgpreload_drd_arm_linux_so_CPPFLAGS = \
+ $(AM_CPPFLAGS_ARM_LINUX)
+
+vgpreload_drd_arm_linux_so_CFLAGS = \
+ $(AM_CFLAGS_ARM_LINUX) $(AM_CFLAGS_PIC) $(DRD_CFLAGS)
+
+vgpreload_drd_arm_linux_so_DEPENDENCIES = \
+ $(LIBREPLACEMALLOC_ARM_LINUX)
+
+vgpreload_drd_arm_linux_so_LDFLAGS = \
+ $(PRELOAD_LDFLAGS_ARM_LINUX) \
+ $(LIBREPLACEMALLOC_LDFLAGS_ARM_LINUX)
+
+#vgpreload_drd__linux_so_SOURCES = \
+# $(VGPRELOAD_DRD_SOURCES_COMMON)
+
+#vgpreload_drd__linux_so_CPPFLAGS = \
+# $(AM_CPPFLAGS_)
+
+#vgpreload_drd__linux_so_CFLAGS = \
+# $(AM_CFLAGS_) $(AM_CFLAGS_PIC) $(DRD_CFLAGS)
+
+#vgpreload_drd__linux_so_DEPENDENCIES = \
+# $(LIBREPLACEMALLOC_)
+
+#vgpreload_drd__linux_so_LDFLAGS = \
+# $(PRELOAD_LDFLAGS_) \
+# $(LIBREPLACEMALLOC_LDFLAGS_)
+
+all: all-recursive
+
+.SUFFIXES:
+.SUFFIXES: .c .o .obj
+$(srcdir)/Makefile.in: # $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign drd/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign drd/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: # $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): # $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-noinstPROGRAMS:
+ -test -z "$(noinst_PROGRAMS)" || rm -f $(noinst_PROGRAMS)
+drd-arm-linux$(EXEEXT): $(drd_arm_linux_OBJECTS) $(drd_arm_linux_DEPENDENCIES)
+ @rm -f drd-arm-linux$(EXEEXT)
+ $(drd_arm_linux_LINK) $(drd_arm_linux_OBJECTS) $(drd_arm_linux_LDADD) $(LIBS)
+drd--linux$(EXEEXT): $(drd__linux_OBJECTS) $(drd__linux_DEPENDENCIES)
+ @rm -f drd--linux$(EXEEXT)
+ $(drd__linux_LINK) $(drd__linux_OBJECTS) $(drd__linux_LDADD) $(LIBS)
+vgpreload_drd-arm-linux.so$(EXEEXT): $(vgpreload_drd_arm_linux_so_OBJECTS) $(vgpreload_drd_arm_linux_so_DEPENDENCIES)
+ @rm -f vgpreload_drd-arm-linux.so$(EXEEXT)
+ $(vgpreload_drd_arm_linux_so_LINK) $(vgpreload_drd_arm_linux_so_OBJECTS) $(vgpreload_drd_arm_linux_so_LDADD) $(LIBS)
+vgpreload_drd--linux.so$(EXEEXT): $(vgpreload_drd__linux_so_OBJECTS) $(vgpreload_drd__linux_so_DEPENDENCIES)
+ @rm -f vgpreload_drd--linux.so$(EXEEXT)
+ $(vgpreload_drd__linux_so_LINK) $(vgpreload_drd__linux_so_OBJECTS) $(vgpreload_drd__linux_so_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+include ./$(DEPDIR)/drd_arm_linux-drd_barrier.Po
+include ./$(DEPDIR)/drd_arm_linux-drd_bitmap2_node.Po
+include ./$(DEPDIR)/drd_arm_linux-drd_clientobj.Po
+include ./$(DEPDIR)/drd_arm_linux-drd_clientreq.Po
+include ./$(DEPDIR)/drd_arm_linux-drd_cond.Po
+include ./$(DEPDIR)/drd_arm_linux-drd_cond_initializer.Po
+include ./$(DEPDIR)/drd_arm_linux-drd_error.Po
+include ./$(DEPDIR)/drd_arm_linux-drd_hb.Po
+include ./$(DEPDIR)/drd_arm_linux-drd_load_store.Po
+include ./$(DEPDIR)/drd_arm_linux-drd_main.Po
+include ./$(DEPDIR)/drd_arm_linux-drd_malloc_wrappers.Po
+include ./$(DEPDIR)/drd_arm_linux-drd_mutex.Po
+include ./$(DEPDIR)/drd_arm_linux-drd_rwlock.Po
+include ./$(DEPDIR)/drd_arm_linux-drd_semaphore.Po
+include ./$(DEPDIR)/drd_arm_linux-drd_suppression.Po
+include ./$(DEPDIR)/drd__linux-drd_barrier.Po
+include ./$(DEPDIR)/drd__linux-drd_bitmap2_node.Po
+include ./$(DEPDIR)/drd__linux-drd_clientobj.Po
+include ./$(DEPDIR)/drd__linux-drd_clientreq.Po
+include ./$(DEPDIR)/drd__linux-drd_cond.Po
+include ./$(DEPDIR)/drd__linux-drd_cond_initializer.Po
+include ./$(DEPDIR)/drd__linux-drd_error.Po
+include ./$(DEPDIR)/drd__linux-drd_hb.Po
+include ./$(DEPDIR)/drd__linux-drd_load_store.Po
+include ./$(DEPDIR)/drd__linux-drd_main.Po
+include ./$(DEPDIR)/drd__linux-drd_malloc_wrappers.Po
+include ./$(DEPDIR)/drd__linux-drd_mutex.Po
+include ./$(DEPDIR)/drd__linux-drd_rwlock.Po
+include ./$(DEPDIR)/drd__linux-drd_semaphore.Po
+include ./$(DEPDIR)/drd__linux-drd_suppression.Po
+include ./$(DEPDIR)/vgpreload_drd_arm_linux_so-drd_pthread_intercepts.Po
+include ./$(DEPDIR)/vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.Po
+include ./$(DEPDIR)/vgpreload_drd_arm_linux_so-drd_strmem_intercepts.Po
+include ./$(DEPDIR)/vgpreload_drd__linux_so-drd_pthread_intercepts.Po
+include ./$(DEPDIR)/vgpreload_drd__linux_so-drd_qtcore_intercepts.Po
+include ./$(DEPDIR)/vgpreload_drd__linux_so-drd_strmem_intercepts.Po
+
+.c.o:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c $<
+
+.c.obj:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
+drd_arm_linux-drd_barrier.o: drd_barrier.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_barrier.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_barrier.Tpo -c -o drd_arm_linux-drd_barrier.o `test -f 'drd_barrier.c' || echo '$(srcdir)/'`drd_barrier.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_barrier.Tpo $(DEPDIR)/drd_arm_linux-drd_barrier.Po
+# source='drd_barrier.c' object='drd_arm_linux-drd_barrier.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_barrier.o `test -f 'drd_barrier.c' || echo '$(srcdir)/'`drd_barrier.c
+
+drd_arm_linux-drd_barrier.obj: drd_barrier.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_barrier.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_barrier.Tpo -c -o drd_arm_linux-drd_barrier.obj `if test -f 'drd_barrier.c'; then $(CYGPATH_W) 'drd_barrier.c'; else $(CYGPATH_W) '$(srcdir)/drd_barrier.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_barrier.Tpo $(DEPDIR)/drd_arm_linux-drd_barrier.Po
+# source='drd_barrier.c' object='drd_arm_linux-drd_barrier.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_barrier.obj `if test -f 'drd_barrier.c'; then $(CYGPATH_W) 'drd_barrier.c'; else $(CYGPATH_W) '$(srcdir)/drd_barrier.c'; fi`
+
+drd_arm_linux-drd_bitmap2_node.o: drd_bitmap2_node.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_bitmap2_node.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_bitmap2_node.Tpo -c -o drd_arm_linux-drd_bitmap2_node.o `test -f 'drd_bitmap2_node.c' || echo '$(srcdir)/'`drd_bitmap2_node.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_bitmap2_node.Tpo $(DEPDIR)/drd_arm_linux-drd_bitmap2_node.Po
+# source='drd_bitmap2_node.c' object='drd_arm_linux-drd_bitmap2_node.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_bitmap2_node.o `test -f 'drd_bitmap2_node.c' || echo '$(srcdir)/'`drd_bitmap2_node.c
+
+drd_arm_linux-drd_bitmap2_node.obj: drd_bitmap2_node.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_bitmap2_node.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_bitmap2_node.Tpo -c -o drd_arm_linux-drd_bitmap2_node.obj `if test -f 'drd_bitmap2_node.c'; then $(CYGPATH_W) 'drd_bitmap2_node.c'; else $(CYGPATH_W) '$(srcdir)/drd_bitmap2_node.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_bitmap2_node.Tpo $(DEPDIR)/drd_arm_linux-drd_bitmap2_node.Po
+# source='drd_bitmap2_node.c' object='drd_arm_linux-drd_bitmap2_node.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_bitmap2_node.obj `if test -f 'drd_bitmap2_node.c'; then $(CYGPATH_W) 'drd_bitmap2_node.c'; else $(CYGPATH_W) '$(srcdir)/drd_bitmap2_node.c'; fi`
+
+drd_arm_linux-drd_clientobj.o: drd_clientobj.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_clientobj.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_clientobj.Tpo -c -o drd_arm_linux-drd_clientobj.o `test -f 'drd_clientobj.c' || echo '$(srcdir)/'`drd_clientobj.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_clientobj.Tpo $(DEPDIR)/drd_arm_linux-drd_clientobj.Po
+# source='drd_clientobj.c' object='drd_arm_linux-drd_clientobj.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_clientobj.o `test -f 'drd_clientobj.c' || echo '$(srcdir)/'`drd_clientobj.c
+
+drd_arm_linux-drd_clientobj.obj: drd_clientobj.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_clientobj.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_clientobj.Tpo -c -o drd_arm_linux-drd_clientobj.obj `if test -f 'drd_clientobj.c'; then $(CYGPATH_W) 'drd_clientobj.c'; else $(CYGPATH_W) '$(srcdir)/drd_clientobj.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_clientobj.Tpo $(DEPDIR)/drd_arm_linux-drd_clientobj.Po
+# source='drd_clientobj.c' object='drd_arm_linux-drd_clientobj.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_clientobj.obj `if test -f 'drd_clientobj.c'; then $(CYGPATH_W) 'drd_clientobj.c'; else $(CYGPATH_W) '$(srcdir)/drd_clientobj.c'; fi`
+
+drd_arm_linux-drd_clientreq.o: drd_clientreq.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_clientreq.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_clientreq.Tpo -c -o drd_arm_linux-drd_clientreq.o `test -f 'drd_clientreq.c' || echo '$(srcdir)/'`drd_clientreq.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_clientreq.Tpo $(DEPDIR)/drd_arm_linux-drd_clientreq.Po
+# source='drd_clientreq.c' object='drd_arm_linux-drd_clientreq.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_clientreq.o `test -f 'drd_clientreq.c' || echo '$(srcdir)/'`drd_clientreq.c
+
+drd_arm_linux-drd_clientreq.obj: drd_clientreq.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_clientreq.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_clientreq.Tpo -c -o drd_arm_linux-drd_clientreq.obj `if test -f 'drd_clientreq.c'; then $(CYGPATH_W) 'drd_clientreq.c'; else $(CYGPATH_W) '$(srcdir)/drd_clientreq.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_clientreq.Tpo $(DEPDIR)/drd_arm_linux-drd_clientreq.Po
+# source='drd_clientreq.c' object='drd_arm_linux-drd_clientreq.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_clientreq.obj `if test -f 'drd_clientreq.c'; then $(CYGPATH_W) 'drd_clientreq.c'; else $(CYGPATH_W) '$(srcdir)/drd_clientreq.c'; fi`
+
+drd_arm_linux-drd_cond.o: drd_cond.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_cond.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_cond.Tpo -c -o drd_arm_linux-drd_cond.o `test -f 'drd_cond.c' || echo '$(srcdir)/'`drd_cond.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_cond.Tpo $(DEPDIR)/drd_arm_linux-drd_cond.Po
+# source='drd_cond.c' object='drd_arm_linux-drd_cond.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_cond.o `test -f 'drd_cond.c' || echo '$(srcdir)/'`drd_cond.c
+
+drd_arm_linux-drd_cond.obj: drd_cond.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_cond.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_cond.Tpo -c -o drd_arm_linux-drd_cond.obj `if test -f 'drd_cond.c'; then $(CYGPATH_W) 'drd_cond.c'; else $(CYGPATH_W) '$(srcdir)/drd_cond.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_cond.Tpo $(DEPDIR)/drd_arm_linux-drd_cond.Po
+# source='drd_cond.c' object='drd_arm_linux-drd_cond.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_cond.obj `if test -f 'drd_cond.c'; then $(CYGPATH_W) 'drd_cond.c'; else $(CYGPATH_W) '$(srcdir)/drd_cond.c'; fi`
+
+drd_arm_linux-drd_cond_initializer.o: drd_cond_initializer.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_cond_initializer.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_cond_initializer.Tpo -c -o drd_arm_linux-drd_cond_initializer.o `test -f 'drd_cond_initializer.c' || echo '$(srcdir)/'`drd_cond_initializer.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_cond_initializer.Tpo $(DEPDIR)/drd_arm_linux-drd_cond_initializer.Po
+# source='drd_cond_initializer.c' object='drd_arm_linux-drd_cond_initializer.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_cond_initializer.o `test -f 'drd_cond_initializer.c' || echo '$(srcdir)/'`drd_cond_initializer.c
+
+drd_arm_linux-drd_cond_initializer.obj: drd_cond_initializer.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_cond_initializer.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_cond_initializer.Tpo -c -o drd_arm_linux-drd_cond_initializer.obj `if test -f 'drd_cond_initializer.c'; then $(CYGPATH_W) 'drd_cond_initializer.c'; else $(CYGPATH_W) '$(srcdir)/drd_cond_initializer.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_cond_initializer.Tpo $(DEPDIR)/drd_arm_linux-drd_cond_initializer.Po
+# source='drd_cond_initializer.c' object='drd_arm_linux-drd_cond_initializer.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_cond_initializer.obj `if test -f 'drd_cond_initializer.c'; then $(CYGPATH_W) 'drd_cond_initializer.c'; else $(CYGPATH_W) '$(srcdir)/drd_cond_initializer.c'; fi`
+
+drd_arm_linux-drd_error.o: drd_error.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_error.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_error.Tpo -c -o drd_arm_linux-drd_error.o `test -f 'drd_error.c' || echo '$(srcdir)/'`drd_error.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_error.Tpo $(DEPDIR)/drd_arm_linux-drd_error.Po
+# source='drd_error.c' object='drd_arm_linux-drd_error.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_error.o `test -f 'drd_error.c' || echo '$(srcdir)/'`drd_error.c
+
+drd_arm_linux-drd_error.obj: drd_error.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_error.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_error.Tpo -c -o drd_arm_linux-drd_error.obj `if test -f 'drd_error.c'; then $(CYGPATH_W) 'drd_error.c'; else $(CYGPATH_W) '$(srcdir)/drd_error.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_error.Tpo $(DEPDIR)/drd_arm_linux-drd_error.Po
+# source='drd_error.c' object='drd_arm_linux-drd_error.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_error.obj `if test -f 'drd_error.c'; then $(CYGPATH_W) 'drd_error.c'; else $(CYGPATH_W) '$(srcdir)/drd_error.c'; fi`
+
+drd_arm_linux-drd_hb.o: drd_hb.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_hb.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_hb.Tpo -c -o drd_arm_linux-drd_hb.o `test -f 'drd_hb.c' || echo '$(srcdir)/'`drd_hb.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_hb.Tpo $(DEPDIR)/drd_arm_linux-drd_hb.Po
+# source='drd_hb.c' object='drd_arm_linux-drd_hb.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_hb.o `test -f 'drd_hb.c' || echo '$(srcdir)/'`drd_hb.c
+
+drd_arm_linux-drd_hb.obj: drd_hb.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_hb.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_hb.Tpo -c -o drd_arm_linux-drd_hb.obj `if test -f 'drd_hb.c'; then $(CYGPATH_W) 'drd_hb.c'; else $(CYGPATH_W) '$(srcdir)/drd_hb.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_hb.Tpo $(DEPDIR)/drd_arm_linux-drd_hb.Po
+# source='drd_hb.c' object='drd_arm_linux-drd_hb.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_hb.obj `if test -f 'drd_hb.c'; then $(CYGPATH_W) 'drd_hb.c'; else $(CYGPATH_W) '$(srcdir)/drd_hb.c'; fi`
+
+drd_arm_linux-drd_load_store.o: drd_load_store.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_load_store.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_load_store.Tpo -c -o drd_arm_linux-drd_load_store.o `test -f 'drd_load_store.c' || echo '$(srcdir)/'`drd_load_store.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_load_store.Tpo $(DEPDIR)/drd_arm_linux-drd_load_store.Po
+# source='drd_load_store.c' object='drd_arm_linux-drd_load_store.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_load_store.o `test -f 'drd_load_store.c' || echo '$(srcdir)/'`drd_load_store.c
+
+drd_arm_linux-drd_load_store.obj: drd_load_store.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_load_store.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_load_store.Tpo -c -o drd_arm_linux-drd_load_store.obj `if test -f 'drd_load_store.c'; then $(CYGPATH_W) 'drd_load_store.c'; else $(CYGPATH_W) '$(srcdir)/drd_load_store.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_load_store.Tpo $(DEPDIR)/drd_arm_linux-drd_load_store.Po
+# source='drd_load_store.c' object='drd_arm_linux-drd_load_store.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_load_store.obj `if test -f 'drd_load_store.c'; then $(CYGPATH_W) 'drd_load_store.c'; else $(CYGPATH_W) '$(srcdir)/drd_load_store.c'; fi`
+
+drd_arm_linux-drd_main.o: drd_main.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_main.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_main.Tpo -c -o drd_arm_linux-drd_main.o `test -f 'drd_main.c' || echo '$(srcdir)/'`drd_main.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_main.Tpo $(DEPDIR)/drd_arm_linux-drd_main.Po
+# source='drd_main.c' object='drd_arm_linux-drd_main.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_main.o `test -f 'drd_main.c' || echo '$(srcdir)/'`drd_main.c
+
+drd_arm_linux-drd_main.obj: drd_main.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_main.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_main.Tpo -c -o drd_arm_linux-drd_main.obj `if test -f 'drd_main.c'; then $(CYGPATH_W) 'drd_main.c'; else $(CYGPATH_W) '$(srcdir)/drd_main.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_main.Tpo $(DEPDIR)/drd_arm_linux-drd_main.Po
+# source='drd_main.c' object='drd_arm_linux-drd_main.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_main.obj `if test -f 'drd_main.c'; then $(CYGPATH_W) 'drd_main.c'; else $(CYGPATH_W) '$(srcdir)/drd_main.c'; fi`
+
+drd_arm_linux-drd_malloc_wrappers.o: drd_malloc_wrappers.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_malloc_wrappers.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_malloc_wrappers.Tpo -c -o drd_arm_linux-drd_malloc_wrappers.o `test -f 'drd_malloc_wrappers.c' || echo '$(srcdir)/'`drd_malloc_wrappers.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_malloc_wrappers.Tpo $(DEPDIR)/drd_arm_linux-drd_malloc_wrappers.Po
+# source='drd_malloc_wrappers.c' object='drd_arm_linux-drd_malloc_wrappers.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_malloc_wrappers.o `test -f 'drd_malloc_wrappers.c' || echo '$(srcdir)/'`drd_malloc_wrappers.c
+
+drd_arm_linux-drd_malloc_wrappers.obj: drd_malloc_wrappers.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_malloc_wrappers.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_malloc_wrappers.Tpo -c -o drd_arm_linux-drd_malloc_wrappers.obj `if test -f 'drd_malloc_wrappers.c'; then $(CYGPATH_W) 'drd_malloc_wrappers.c'; else $(CYGPATH_W) '$(srcdir)/drd_malloc_wrappers.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_malloc_wrappers.Tpo $(DEPDIR)/drd_arm_linux-drd_malloc_wrappers.Po
+# source='drd_malloc_wrappers.c' object='drd_arm_linux-drd_malloc_wrappers.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_malloc_wrappers.obj `if test -f 'drd_malloc_wrappers.c'; then $(CYGPATH_W) 'drd_malloc_wrappers.c'; else $(CYGPATH_W) '$(srcdir)/drd_malloc_wrappers.c'; fi`
+
+drd_arm_linux-drd_mutex.o: drd_mutex.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_mutex.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_mutex.Tpo -c -o drd_arm_linux-drd_mutex.o `test -f 'drd_mutex.c' || echo '$(srcdir)/'`drd_mutex.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_mutex.Tpo $(DEPDIR)/drd_arm_linux-drd_mutex.Po
+# source='drd_mutex.c' object='drd_arm_linux-drd_mutex.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_mutex.o `test -f 'drd_mutex.c' || echo '$(srcdir)/'`drd_mutex.c
+
+drd_arm_linux-drd_mutex.obj: drd_mutex.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_mutex.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_mutex.Tpo -c -o drd_arm_linux-drd_mutex.obj `if test -f 'drd_mutex.c'; then $(CYGPATH_W) 'drd_mutex.c'; else $(CYGPATH_W) '$(srcdir)/drd_mutex.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_mutex.Tpo $(DEPDIR)/drd_arm_linux-drd_mutex.Po
+# source='drd_mutex.c' object='drd_arm_linux-drd_mutex.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_mutex.obj `if test -f 'drd_mutex.c'; then $(CYGPATH_W) 'drd_mutex.c'; else $(CYGPATH_W) '$(srcdir)/drd_mutex.c'; fi`
+
+drd_arm_linux-drd_rwlock.o: drd_rwlock.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_rwlock.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_rwlock.Tpo -c -o drd_arm_linux-drd_rwlock.o `test -f 'drd_rwlock.c' || echo '$(srcdir)/'`drd_rwlock.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_rwlock.Tpo $(DEPDIR)/drd_arm_linux-drd_rwlock.Po
+# source='drd_rwlock.c' object='drd_arm_linux-drd_rwlock.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_rwlock.o `test -f 'drd_rwlock.c' || echo '$(srcdir)/'`drd_rwlock.c
+
+drd_arm_linux-drd_rwlock.obj: drd_rwlock.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_rwlock.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_rwlock.Tpo -c -o drd_arm_linux-drd_rwlock.obj `if test -f 'drd_rwlock.c'; then $(CYGPATH_W) 'drd_rwlock.c'; else $(CYGPATH_W) '$(srcdir)/drd_rwlock.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_rwlock.Tpo $(DEPDIR)/drd_arm_linux-drd_rwlock.Po
+# source='drd_rwlock.c' object='drd_arm_linux-drd_rwlock.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_rwlock.obj `if test -f 'drd_rwlock.c'; then $(CYGPATH_W) 'drd_rwlock.c'; else $(CYGPATH_W) '$(srcdir)/drd_rwlock.c'; fi`
+
+drd_arm_linux-drd_semaphore.o: drd_semaphore.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_semaphore.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_semaphore.Tpo -c -o drd_arm_linux-drd_semaphore.o `test -f 'drd_semaphore.c' || echo '$(srcdir)/'`drd_semaphore.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_semaphore.Tpo $(DEPDIR)/drd_arm_linux-drd_semaphore.Po
+# source='drd_semaphore.c' object='drd_arm_linux-drd_semaphore.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_semaphore.o `test -f 'drd_semaphore.c' || echo '$(srcdir)/'`drd_semaphore.c
+
+drd_arm_linux-drd_semaphore.obj: drd_semaphore.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_semaphore.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_semaphore.Tpo -c -o drd_arm_linux-drd_semaphore.obj `if test -f 'drd_semaphore.c'; then $(CYGPATH_W) 'drd_semaphore.c'; else $(CYGPATH_W) '$(srcdir)/drd_semaphore.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_semaphore.Tpo $(DEPDIR)/drd_arm_linux-drd_semaphore.Po
+# source='drd_semaphore.c' object='drd_arm_linux-drd_semaphore.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_semaphore.obj `if test -f 'drd_semaphore.c'; then $(CYGPATH_W) 'drd_semaphore.c'; else $(CYGPATH_W) '$(srcdir)/drd_semaphore.c'; fi`
+
+drd_arm_linux-drd_suppression.o: drd_suppression.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_suppression.o -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_suppression.Tpo -c -o drd_arm_linux-drd_suppression.o `test -f 'drd_suppression.c' || echo '$(srcdir)/'`drd_suppression.c
+ mv -f $(DEPDIR)/drd_arm_linux-drd_suppression.Tpo $(DEPDIR)/drd_arm_linux-drd_suppression.Po
+# source='drd_suppression.c' object='drd_arm_linux-drd_suppression.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_suppression.o `test -f 'drd_suppression.c' || echo '$(srcdir)/'`drd_suppression.c
+
+drd_arm_linux-drd_suppression.obj: drd_suppression.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -MT drd_arm_linux-drd_suppression.obj -MD -MP -MF $(DEPDIR)/drd_arm_linux-drd_suppression.Tpo -c -o drd_arm_linux-drd_suppression.obj `if test -f 'drd_suppression.c'; then $(CYGPATH_W) 'drd_suppression.c'; else $(CYGPATH_W) '$(srcdir)/drd_suppression.c'; fi`
+ mv -f $(DEPDIR)/drd_arm_linux-drd_suppression.Tpo $(DEPDIR)/drd_arm_linux-drd_suppression.Po
+# source='drd_suppression.c' object='drd_arm_linux-drd_suppression.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd_arm_linux_CPPFLAGS) $(CPPFLAGS) $(drd_arm_linux_CFLAGS) $(CFLAGS) -c -o drd_arm_linux-drd_suppression.obj `if test -f 'drd_suppression.c'; then $(CYGPATH_W) 'drd_suppression.c'; else $(CYGPATH_W) '$(srcdir)/drd_suppression.c'; fi`
+
+drd__linux-drd_barrier.o: drd_barrier.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_barrier.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_barrier.Tpo -c -o drd__linux-drd_barrier.o `test -f 'drd_barrier.c' || echo '$(srcdir)/'`drd_barrier.c
+ mv -f $(DEPDIR)/drd__linux-drd_barrier.Tpo $(DEPDIR)/drd__linux-drd_barrier.Po
+# source='drd_barrier.c' object='drd__linux-drd_barrier.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_barrier.o `test -f 'drd_barrier.c' || echo '$(srcdir)/'`drd_barrier.c
+
+drd__linux-drd_barrier.obj: drd_barrier.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_barrier.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_barrier.Tpo -c -o drd__linux-drd_barrier.obj `if test -f 'drd_barrier.c'; then $(CYGPATH_W) 'drd_barrier.c'; else $(CYGPATH_W) '$(srcdir)/drd_barrier.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_barrier.Tpo $(DEPDIR)/drd__linux-drd_barrier.Po
+# source='drd_barrier.c' object='drd__linux-drd_barrier.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_barrier.obj `if test -f 'drd_barrier.c'; then $(CYGPATH_W) 'drd_barrier.c'; else $(CYGPATH_W) '$(srcdir)/drd_barrier.c'; fi`
+
+drd__linux-drd_bitmap2_node.o: drd_bitmap2_node.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_bitmap2_node.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_bitmap2_node.Tpo -c -o drd__linux-drd_bitmap2_node.o `test -f 'drd_bitmap2_node.c' || echo '$(srcdir)/'`drd_bitmap2_node.c
+ mv -f $(DEPDIR)/drd__linux-drd_bitmap2_node.Tpo $(DEPDIR)/drd__linux-drd_bitmap2_node.Po
+# source='drd_bitmap2_node.c' object='drd__linux-drd_bitmap2_node.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_bitmap2_node.o `test -f 'drd_bitmap2_node.c' || echo '$(srcdir)/'`drd_bitmap2_node.c
+
+drd__linux-drd_bitmap2_node.obj: drd_bitmap2_node.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_bitmap2_node.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_bitmap2_node.Tpo -c -o drd__linux-drd_bitmap2_node.obj `if test -f 'drd_bitmap2_node.c'; then $(CYGPATH_W) 'drd_bitmap2_node.c'; else $(CYGPATH_W) '$(srcdir)/drd_bitmap2_node.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_bitmap2_node.Tpo $(DEPDIR)/drd__linux-drd_bitmap2_node.Po
+# source='drd_bitmap2_node.c' object='drd__linux-drd_bitmap2_node.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_bitmap2_node.obj `if test -f 'drd_bitmap2_node.c'; then $(CYGPATH_W) 'drd_bitmap2_node.c'; else $(CYGPATH_W) '$(srcdir)/drd_bitmap2_node.c'; fi`
+
+drd__linux-drd_clientobj.o: drd_clientobj.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_clientobj.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_clientobj.Tpo -c -o drd__linux-drd_clientobj.o `test -f 'drd_clientobj.c' || echo '$(srcdir)/'`drd_clientobj.c
+ mv -f $(DEPDIR)/drd__linux-drd_clientobj.Tpo $(DEPDIR)/drd__linux-drd_clientobj.Po
+# source='drd_clientobj.c' object='drd__linux-drd_clientobj.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_clientobj.o `test -f 'drd_clientobj.c' || echo '$(srcdir)/'`drd_clientobj.c
+
+drd__linux-drd_clientobj.obj: drd_clientobj.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_clientobj.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_clientobj.Tpo -c -o drd__linux-drd_clientobj.obj `if test -f 'drd_clientobj.c'; then $(CYGPATH_W) 'drd_clientobj.c'; else $(CYGPATH_W) '$(srcdir)/drd_clientobj.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_clientobj.Tpo $(DEPDIR)/drd__linux-drd_clientobj.Po
+# source='drd_clientobj.c' object='drd__linux-drd_clientobj.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_clientobj.obj `if test -f 'drd_clientobj.c'; then $(CYGPATH_W) 'drd_clientobj.c'; else $(CYGPATH_W) '$(srcdir)/drd_clientobj.c'; fi`
+
+drd__linux-drd_clientreq.o: drd_clientreq.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_clientreq.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_clientreq.Tpo -c -o drd__linux-drd_clientreq.o `test -f 'drd_clientreq.c' || echo '$(srcdir)/'`drd_clientreq.c
+ mv -f $(DEPDIR)/drd__linux-drd_clientreq.Tpo $(DEPDIR)/drd__linux-drd_clientreq.Po
+# source='drd_clientreq.c' object='drd__linux-drd_clientreq.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_clientreq.o `test -f 'drd_clientreq.c' || echo '$(srcdir)/'`drd_clientreq.c
+
+drd__linux-drd_clientreq.obj: drd_clientreq.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_clientreq.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_clientreq.Tpo -c -o drd__linux-drd_clientreq.obj `if test -f 'drd_clientreq.c'; then $(CYGPATH_W) 'drd_clientreq.c'; else $(CYGPATH_W) '$(srcdir)/drd_clientreq.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_clientreq.Tpo $(DEPDIR)/drd__linux-drd_clientreq.Po
+# source='drd_clientreq.c' object='drd__linux-drd_clientreq.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_clientreq.obj `if test -f 'drd_clientreq.c'; then $(CYGPATH_W) 'drd_clientreq.c'; else $(CYGPATH_W) '$(srcdir)/drd_clientreq.c'; fi`
+
+drd__linux-drd_cond.o: drd_cond.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_cond.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_cond.Tpo -c -o drd__linux-drd_cond.o `test -f 'drd_cond.c' || echo '$(srcdir)/'`drd_cond.c
+ mv -f $(DEPDIR)/drd__linux-drd_cond.Tpo $(DEPDIR)/drd__linux-drd_cond.Po
+# source='drd_cond.c' object='drd__linux-drd_cond.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_cond.o `test -f 'drd_cond.c' || echo '$(srcdir)/'`drd_cond.c
+
+drd__linux-drd_cond.obj: drd_cond.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_cond.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_cond.Tpo -c -o drd__linux-drd_cond.obj `if test -f 'drd_cond.c'; then $(CYGPATH_W) 'drd_cond.c'; else $(CYGPATH_W) '$(srcdir)/drd_cond.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_cond.Tpo $(DEPDIR)/drd__linux-drd_cond.Po
+# source='drd_cond.c' object='drd__linux-drd_cond.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_cond.obj `if test -f 'drd_cond.c'; then $(CYGPATH_W) 'drd_cond.c'; else $(CYGPATH_W) '$(srcdir)/drd_cond.c'; fi`
+
+drd__linux-drd_cond_initializer.o: drd_cond_initializer.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_cond_initializer.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_cond_initializer.Tpo -c -o drd__linux-drd_cond_initializer.o `test -f 'drd_cond_initializer.c' || echo '$(srcdir)/'`drd_cond_initializer.c
+ mv -f $(DEPDIR)/drd__linux-drd_cond_initializer.Tpo $(DEPDIR)/drd__linux-drd_cond_initializer.Po
+# source='drd_cond_initializer.c' object='drd__linux-drd_cond_initializer.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_cond_initializer.o `test -f 'drd_cond_initializer.c' || echo '$(srcdir)/'`drd_cond_initializer.c
+
+drd__linux-drd_cond_initializer.obj: drd_cond_initializer.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_cond_initializer.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_cond_initializer.Tpo -c -o drd__linux-drd_cond_initializer.obj `if test -f 'drd_cond_initializer.c'; then $(CYGPATH_W) 'drd_cond_initializer.c'; else $(CYGPATH_W) '$(srcdir)/drd_cond_initializer.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_cond_initializer.Tpo $(DEPDIR)/drd__linux-drd_cond_initializer.Po
+# source='drd_cond_initializer.c' object='drd__linux-drd_cond_initializer.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_cond_initializer.obj `if test -f 'drd_cond_initializer.c'; then $(CYGPATH_W) 'drd_cond_initializer.c'; else $(CYGPATH_W) '$(srcdir)/drd_cond_initializer.c'; fi`
+
+drd__linux-drd_error.o: drd_error.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_error.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_error.Tpo -c -o drd__linux-drd_error.o `test -f 'drd_error.c' || echo '$(srcdir)/'`drd_error.c
+ mv -f $(DEPDIR)/drd__linux-drd_error.Tpo $(DEPDIR)/drd__linux-drd_error.Po
+# source='drd_error.c' object='drd__linux-drd_error.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_error.o `test -f 'drd_error.c' || echo '$(srcdir)/'`drd_error.c
+
+drd__linux-drd_error.obj: drd_error.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_error.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_error.Tpo -c -o drd__linux-drd_error.obj `if test -f 'drd_error.c'; then $(CYGPATH_W) 'drd_error.c'; else $(CYGPATH_W) '$(srcdir)/drd_error.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_error.Tpo $(DEPDIR)/drd__linux-drd_error.Po
+# source='drd_error.c' object='drd__linux-drd_error.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_error.obj `if test -f 'drd_error.c'; then $(CYGPATH_W) 'drd_error.c'; else $(CYGPATH_W) '$(srcdir)/drd_error.c'; fi`
+
+drd__linux-drd_hb.o: drd_hb.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_hb.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_hb.Tpo -c -o drd__linux-drd_hb.o `test -f 'drd_hb.c' || echo '$(srcdir)/'`drd_hb.c
+ mv -f $(DEPDIR)/drd__linux-drd_hb.Tpo $(DEPDIR)/drd__linux-drd_hb.Po
+# source='drd_hb.c' object='drd__linux-drd_hb.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_hb.o `test -f 'drd_hb.c' || echo '$(srcdir)/'`drd_hb.c
+
+drd__linux-drd_hb.obj: drd_hb.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_hb.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_hb.Tpo -c -o drd__linux-drd_hb.obj `if test -f 'drd_hb.c'; then $(CYGPATH_W) 'drd_hb.c'; else $(CYGPATH_W) '$(srcdir)/drd_hb.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_hb.Tpo $(DEPDIR)/drd__linux-drd_hb.Po
+# source='drd_hb.c' object='drd__linux-drd_hb.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_hb.obj `if test -f 'drd_hb.c'; then $(CYGPATH_W) 'drd_hb.c'; else $(CYGPATH_W) '$(srcdir)/drd_hb.c'; fi`
+
+drd__linux-drd_load_store.o: drd_load_store.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_load_store.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_load_store.Tpo -c -o drd__linux-drd_load_store.o `test -f 'drd_load_store.c' || echo '$(srcdir)/'`drd_load_store.c
+ mv -f $(DEPDIR)/drd__linux-drd_load_store.Tpo $(DEPDIR)/drd__linux-drd_load_store.Po
+# source='drd_load_store.c' object='drd__linux-drd_load_store.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_load_store.o `test -f 'drd_load_store.c' || echo '$(srcdir)/'`drd_load_store.c
+
+drd__linux-drd_load_store.obj: drd_load_store.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_load_store.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_load_store.Tpo -c -o drd__linux-drd_load_store.obj `if test -f 'drd_load_store.c'; then $(CYGPATH_W) 'drd_load_store.c'; else $(CYGPATH_W) '$(srcdir)/drd_load_store.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_load_store.Tpo $(DEPDIR)/drd__linux-drd_load_store.Po
+# source='drd_load_store.c' object='drd__linux-drd_load_store.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_load_store.obj `if test -f 'drd_load_store.c'; then $(CYGPATH_W) 'drd_load_store.c'; else $(CYGPATH_W) '$(srcdir)/drd_load_store.c'; fi`
+
+drd__linux-drd_main.o: drd_main.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_main.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_main.Tpo -c -o drd__linux-drd_main.o `test -f 'drd_main.c' || echo '$(srcdir)/'`drd_main.c
+ mv -f $(DEPDIR)/drd__linux-drd_main.Tpo $(DEPDIR)/drd__linux-drd_main.Po
+# source='drd_main.c' object='drd__linux-drd_main.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_main.o `test -f 'drd_main.c' || echo '$(srcdir)/'`drd_main.c
+
+drd__linux-drd_main.obj: drd_main.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_main.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_main.Tpo -c -o drd__linux-drd_main.obj `if test -f 'drd_main.c'; then $(CYGPATH_W) 'drd_main.c'; else $(CYGPATH_W) '$(srcdir)/drd_main.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_main.Tpo $(DEPDIR)/drd__linux-drd_main.Po
+# source='drd_main.c' object='drd__linux-drd_main.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_main.obj `if test -f 'drd_main.c'; then $(CYGPATH_W) 'drd_main.c'; else $(CYGPATH_W) '$(srcdir)/drd_main.c'; fi`
+
+drd__linux-drd_malloc_wrappers.o: drd_malloc_wrappers.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_malloc_wrappers.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_malloc_wrappers.Tpo -c -o drd__linux-drd_malloc_wrappers.o `test -f 'drd_malloc_wrappers.c' || echo '$(srcdir)/'`drd_malloc_wrappers.c
+ mv -f $(DEPDIR)/drd__linux-drd_malloc_wrappers.Tpo $(DEPDIR)/drd__linux-drd_malloc_wrappers.Po
+# source='drd_malloc_wrappers.c' object='drd__linux-drd_malloc_wrappers.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_malloc_wrappers.o `test -f 'drd_malloc_wrappers.c' || echo '$(srcdir)/'`drd_malloc_wrappers.c
+
+drd__linux-drd_malloc_wrappers.obj: drd_malloc_wrappers.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_malloc_wrappers.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_malloc_wrappers.Tpo -c -o drd__linux-drd_malloc_wrappers.obj `if test -f 'drd_malloc_wrappers.c'; then $(CYGPATH_W) 'drd_malloc_wrappers.c'; else $(CYGPATH_W) '$(srcdir)/drd_malloc_wrappers.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_malloc_wrappers.Tpo $(DEPDIR)/drd__linux-drd_malloc_wrappers.Po
+# source='drd_malloc_wrappers.c' object='drd__linux-drd_malloc_wrappers.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_malloc_wrappers.obj `if test -f 'drd_malloc_wrappers.c'; then $(CYGPATH_W) 'drd_malloc_wrappers.c'; else $(CYGPATH_W) '$(srcdir)/drd_malloc_wrappers.c'; fi`
+
+drd__linux-drd_mutex.o: drd_mutex.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_mutex.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_mutex.Tpo -c -o drd__linux-drd_mutex.o `test -f 'drd_mutex.c' || echo '$(srcdir)/'`drd_mutex.c
+ mv -f $(DEPDIR)/drd__linux-drd_mutex.Tpo $(DEPDIR)/drd__linux-drd_mutex.Po
+# source='drd_mutex.c' object='drd__linux-drd_mutex.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_mutex.o `test -f 'drd_mutex.c' || echo '$(srcdir)/'`drd_mutex.c
+
+drd__linux-drd_mutex.obj: drd_mutex.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_mutex.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_mutex.Tpo -c -o drd__linux-drd_mutex.obj `if test -f 'drd_mutex.c'; then $(CYGPATH_W) 'drd_mutex.c'; else $(CYGPATH_W) '$(srcdir)/drd_mutex.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_mutex.Tpo $(DEPDIR)/drd__linux-drd_mutex.Po
+# source='drd_mutex.c' object='drd__linux-drd_mutex.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_mutex.obj `if test -f 'drd_mutex.c'; then $(CYGPATH_W) 'drd_mutex.c'; else $(CYGPATH_W) '$(srcdir)/drd_mutex.c'; fi`
+
+drd__linux-drd_rwlock.o: drd_rwlock.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_rwlock.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_rwlock.Tpo -c -o drd__linux-drd_rwlock.o `test -f 'drd_rwlock.c' || echo '$(srcdir)/'`drd_rwlock.c
+ mv -f $(DEPDIR)/drd__linux-drd_rwlock.Tpo $(DEPDIR)/drd__linux-drd_rwlock.Po
+# source='drd_rwlock.c' object='drd__linux-drd_rwlock.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_rwlock.o `test -f 'drd_rwlock.c' || echo '$(srcdir)/'`drd_rwlock.c
+
+drd__linux-drd_rwlock.obj: drd_rwlock.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_rwlock.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_rwlock.Tpo -c -o drd__linux-drd_rwlock.obj `if test -f 'drd_rwlock.c'; then $(CYGPATH_W) 'drd_rwlock.c'; else $(CYGPATH_W) '$(srcdir)/drd_rwlock.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_rwlock.Tpo $(DEPDIR)/drd__linux-drd_rwlock.Po
+# source='drd_rwlock.c' object='drd__linux-drd_rwlock.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_rwlock.obj `if test -f 'drd_rwlock.c'; then $(CYGPATH_W) 'drd_rwlock.c'; else $(CYGPATH_W) '$(srcdir)/drd_rwlock.c'; fi`
+
+drd__linux-drd_semaphore.o: drd_semaphore.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_semaphore.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_semaphore.Tpo -c -o drd__linux-drd_semaphore.o `test -f 'drd_semaphore.c' || echo '$(srcdir)/'`drd_semaphore.c
+ mv -f $(DEPDIR)/drd__linux-drd_semaphore.Tpo $(DEPDIR)/drd__linux-drd_semaphore.Po
+# source='drd_semaphore.c' object='drd__linux-drd_semaphore.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_semaphore.o `test -f 'drd_semaphore.c' || echo '$(srcdir)/'`drd_semaphore.c
+
+drd__linux-drd_semaphore.obj: drd_semaphore.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_semaphore.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_semaphore.Tpo -c -o drd__linux-drd_semaphore.obj `if test -f 'drd_semaphore.c'; then $(CYGPATH_W) 'drd_semaphore.c'; else $(CYGPATH_W) '$(srcdir)/drd_semaphore.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_semaphore.Tpo $(DEPDIR)/drd__linux-drd_semaphore.Po
+# source='drd_semaphore.c' object='drd__linux-drd_semaphore.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_semaphore.obj `if test -f 'drd_semaphore.c'; then $(CYGPATH_W) 'drd_semaphore.c'; else $(CYGPATH_W) '$(srcdir)/drd_semaphore.c'; fi`
+
+drd__linux-drd_suppression.o: drd_suppression.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_suppression.o -MD -MP -MF $(DEPDIR)/drd__linux-drd_suppression.Tpo -c -o drd__linux-drd_suppression.o `test -f 'drd_suppression.c' || echo '$(srcdir)/'`drd_suppression.c
+ mv -f $(DEPDIR)/drd__linux-drd_suppression.Tpo $(DEPDIR)/drd__linux-drd_suppression.Po
+# source='drd_suppression.c' object='drd__linux-drd_suppression.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_suppression.o `test -f 'drd_suppression.c' || echo '$(srcdir)/'`drd_suppression.c
+
+drd__linux-drd_suppression.obj: drd_suppression.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -MT drd__linux-drd_suppression.obj -MD -MP -MF $(DEPDIR)/drd__linux-drd_suppression.Tpo -c -o drd__linux-drd_suppression.obj `if test -f 'drd_suppression.c'; then $(CYGPATH_W) 'drd_suppression.c'; else $(CYGPATH_W) '$(srcdir)/drd_suppression.c'; fi`
+ mv -f $(DEPDIR)/drd__linux-drd_suppression.Tpo $(DEPDIR)/drd__linux-drd_suppression.Po
+# source='drd_suppression.c' object='drd__linux-drd_suppression.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(drd__linux_CPPFLAGS) $(CPPFLAGS) $(drd__linux_CFLAGS) $(CFLAGS) -c -o drd__linux-drd_suppression.obj `if test -f 'drd_suppression.c'; then $(CYGPATH_W) 'drd_suppression.c'; else $(CYGPATH_W) '$(srcdir)/drd_suppression.c'; fi`
+
+vgpreload_drd_arm_linux_so-drd_pthread_intercepts.o: drd_pthread_intercepts.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vgpreload_drd_arm_linux_so_CPPFLAGS) $(CPPFLAGS) $(vgpreload_drd_arm_linux_so_CFLAGS) $(CFLAGS) -MT vgpreload_drd_arm_linux_so-drd_pthread_intercepts.o -MD -MP -MF $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_pthread_intercepts.Tpo -c -o vgpreload_drd_arm_linux_so-drd_pthread_intercepts.o `test -f 'drd_pthread_intercepts.c' || echo '$(srcdir)/'`drd_pthread_intercepts.c
+ mv -f $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_pthread_intercepts.Tpo $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_pthread_intercepts.Po
+# source='drd_pthread_intercepts.c' object='vgpreload_drd_arm_linux_so-drd_pthread_intercepts.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vgpreload_drd_arm_linux_so_CPPFLAGS) $(CPPFLAGS) $(vgpreload_drd_arm_linux_so_CFLAGS) $(CFLAGS) -c -o vgpreload_drd_arm_linux_so-drd_pthread_intercepts.o `test -f 'drd_pthread_intercepts.c' || echo '$(srcdir)/'`drd_pthread_intercepts.c
+
+vgpreload_drd_arm_linux_so-drd_pthread_intercepts.obj: drd_pthread_intercepts.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vgpreload_drd_arm_linux_so_CPPFLAGS) $(CPPFLAGS) $(vgpreload_drd_arm_linux_so_CFLAGS) $(CFLAGS) -MT vgpreload_drd_arm_linux_so-drd_pthread_intercepts.obj -MD -MP -MF $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_pthread_intercepts.Tpo -c -o vgpreload_drd_arm_linux_so-drd_pthread_intercepts.obj `if test -f 'drd_pthread_intercepts.c'; then $(CYGPATH_W) 'drd_pthread_intercepts.c'; else $(CYGPATH_W) '$(srcdir)/drd_pthread_intercepts.c'; fi`
+ mv -f $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_pthread_intercepts.Tpo $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_pthread_intercepts.Po
+# source='drd_pthread_intercepts.c' object='vgpreload_drd_arm_linux_so-drd_pthread_intercepts.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vgpreload_drd_arm_linux_so_CPPFLAGS) $(CPPFLAGS) $(vgpreload_drd_arm_linux_so_CFLAGS) $(CFLAGS) -c -o vgpreload_drd_arm_linux_so-drd_pthread_intercepts.obj `if test -f 'drd_pthread_intercepts.c'; then $(CYGPATH_W) 'drd_pthread_intercepts.c'; else $(CYGPATH_W) '$(srcdir)/drd_pthread_intercepts.c'; fi`
+
+vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.o: drd_qtcore_intercepts.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vgpreload_drd_arm_linux_so_CPPFLAGS) $(CPPFLAGS) $(vgpreload_drd_arm_linux_so_CFLAGS) $(CFLAGS) -MT vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.o -MD -MP -MF $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.Tpo -c -o vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.o `test -f 'drd_qtcore_intercepts.c' || echo '$(srcdir)/'`drd_qtcore_intercepts.c
+ mv -f $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.Tpo $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.Po
+# source='drd_qtcore_intercepts.c' object='vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vgpreload_drd_arm_linux_so_CPPFLAGS) $(CPPFLAGS) $(vgpreload_drd_arm_linux_so_CFLAGS) $(CFLAGS) -c -o vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.o `test -f 'drd_qtcore_intercepts.c' || echo '$(srcdir)/'`drd_qtcore_intercepts.c
+
+vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.obj: drd_qtcore_intercepts.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vgpreload_drd_arm_linux_so_CPPFLAGS) $(CPPFLAGS) $(vgpreload_drd_arm_linux_so_CFLAGS) $(CFLAGS) -MT vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.obj -MD -MP -MF $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.Tpo -c -o vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.obj `if test -f 'drd_qtcore_intercepts.c'; then $(CYGPATH_W) 'drd_qtcore_intercepts.c'; else $(CYGPATH_W) '$(srcdir)/drd_qtcore_intercepts.c'; fi`
+ mv -f $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.Tpo $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.Po
+# source='drd_qtcore_intercepts.c' object='vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vgpreload_drd_arm_linux_so_CPPFLAGS) $(CPPFLAGS) $(vgpreload_drd_arm_linux_so_CFLAGS) $(CFLAGS) -c -o vgpreload_drd_arm_linux_so-drd_qtcore_intercepts.obj `if test -f 'drd_qtcore_intercepts.c'; then $(CYGPATH_W) 'drd_qtcore_intercepts.c'; else $(CYGPATH_W) '$(srcdir)/drd_qtcore_intercepts.c'; fi`
+
+vgpreload_drd_arm_linux_so-drd_strmem_intercepts.o: drd_strmem_intercepts.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vgpreload_drd_arm_linux_so_CPPFLAGS) $(CPPFLAGS) $(vgpreload_drd_arm_linux_so_CFLAGS) $(CFLAGS) -MT vgpreload_drd_arm_linux_so-drd_strmem_intercepts.o -MD -MP -MF $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_strmem_intercepts.Tpo -c -o vgpreload_drd_arm_linux_so-drd_strmem_intercepts.o `test -f 'drd_strmem_intercepts.c' || echo '$(srcdir)/'`drd_strmem_intercepts.c
+ mv -f $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_strmem_intercepts.Tpo $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_strmem_intercepts.Po
+# source='drd_strmem_intercepts.c' object='vgpreload_drd_arm_linux_so-drd_strmem_intercepts.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vgpreload_drd_arm_linux_so_CPPFLAGS) $(CPPFLAGS) $(vgpreload_drd_arm_linux_so_CFLAGS) $(CFLAGS) -c -o vgpreload_drd_arm_linux_so-drd_strmem_intercepts.o `test -f 'drd_strmem_intercepts.c' || echo '$(srcdir)/'`drd_strmem_intercepts.c
+
+vgpreload_drd_arm_linux_so-drd_strmem_intercepts.obj: drd_strmem_intercepts.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vgpreload_drd_arm_linux_so_CPPFLAGS) $(CPPFLAGS) $(vgpreload_drd_arm_linux_so_CFLAGS) $(CFLAGS) -MT vgpreload_drd_arm_linux_so-drd_strmem_intercepts.obj -MD -MP -MF $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_strmem_intercepts.Tpo -c -o vgpreload_drd_arm_linux_so-drd_strmem_intercepts.obj `if test -f 'drd_strmem_intercepts.c'; then $(CYGPATH_W) 'drd_strmem_intercepts.c'; else $(CYGPATH_W) '$(srcdir)/drd_strmem_intercepts.c'; fi`
+ mv -f $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_strmem_intercepts.Tpo $(DEPDIR)/vgpreload_drd_arm_linux_so-drd_strmem_intercepts.Po
+# source='drd_strmem_intercepts.c' object='vgpreload_drd_arm_linux_so-drd_strmem_intercepts.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vgpreload_drd_arm_linux_so_CPPFLAGS) $(CPPFLAGS) $(vgpreload_drd_arm_linux_so_CFLAGS) $(CFLAGS) -c -o vgpreload_drd_arm_linux_so-drd_strmem_intercepts.obj `if test -f 'drd_strmem_intercepts.c'; then $(CYGPATH_W) 'drd_strmem_intercepts.c'; else $(CYGPATH_W) '$(srcdir)/drd_strmem_intercepts.c'; fi`
+
+vgpreload_drd__linux_so-drd_pthread_intercepts.o: drd_pthread_intercepts.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vgpreload_drd__linux_so_CPPFLAGS) $(CPPFLAGS) $(vgpreload_drd__linux_so_CFLAGS) $(CFLAGS) -MT vgpreload_drd__linux_so-drd_pthread_intercepts.o -MD -MP -MF $(DEPDIR)/vgpreload_drd__linux_so-drd_pthread_intercepts.Tpo -c -o vgpreload_drd__linux_so-drd_pthread_intercepts.o `test -f 'drd_pthread_intercepts.c' || echo '$(srcdir)/'`drd_pthread_intercepts.c
+ mv -f $(DEPDIR)/vgpreload_drd__linux_so-drd_pthread_intercepts.Tpo $(DEPDIR)/vgpreload_drd__linux_so-drd_pthread_intercepts.Po
+# source='drd_pthread_intercepts.c' object='vgpreload_drd__linux_so-drd_pthread_intercepts.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(vgpreload_drd__linux_so_CPPFLAGS) $(CPPFLAGS) $(vgpreload_drd__linux_so_CFLAGS) $(CFLAGS) -c -o vgpreload_drd__linux_so-drd_pthread_intercepts.o `test -f 'drd_pthread_intercepts.c' || echo '$(srcdir)/'`drd_pthread_intercepts.c
+
+vgpreload_drd__linux_so-drd_pthread_intercepts.obj: drd_pthread_intercepts.c
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+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX32@
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX64@
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+
+#----------------------------------------------------------------------------
+# <tool>-<platform> stuff
+#----------------------------------------------------------------------------
+TOOL_DEPENDENCIES_@VGCONF_PLATFORM_PRI_CAPS@ = \
+ $(top_builddir)/coregrind/libcoregrind-@VGCONF_ARCH_PRI@-@VGCONF_OS@.a \
+ $(top_builddir)/VEX/libvex-@VGCONF_ARCH_PRI@-@VGCONF_OS@.a
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@TOOL_DEPENDENCIES_@VGCONF_PLATFORM_SEC_CAPS@ = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(top_builddir)/coregrind/libcoregrind-@VGCONF_ARCH_SEC@-@VGCONF_OS@.a \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(top_builddir)/VEX/libvex-@VGCONF_ARCH_SEC@-@VGCONF_OS@.a
+
+TOOL_LDADD_COMMON = -lgcc
+TOOL_LDADD_@VGCONF_PLATFORM_PRI_CAPS@ = \
+ $(TOOL_DEPENDENCIES_@VGCONF_PLATFORM_PRI_CAPS@) $(TOOL_LDADD_COMMON)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@TOOL_LDADD_@VGCONF_PLATFORM_SEC_CAPS@ = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(TOOL_DEPENDENCIES_@VGCONF_PLATFORM_SEC_CAPS@) $(TOOL_LDADD_COMMON)
+
+
+# -Wl,--build-id=none is needed when linking tools on Linux. Without this
+# flag newer ld versions (2.20 and later) create a .note.gnu.build-id at the
+# default text segment address, which of course means the resulting executable
+# is unusable. So we have to tell ld not to generate that, with --build-id=none.
+TOOL_LDFLAGS_COMMON_LINUX = \
+ -static -nodefaultlibs -nostartfiles -u _start @FLAG_NO_BUILD_ID@
+
+TOOL_LDFLAGS_COMMON_AIX5 = \
+ -static -Wl,-e_start_valgrind
+
+TOOL_LDFLAGS_COMMON_DARWIN = \
+ -nodefaultlibs -nostartfiles -Wl,-u,__start -Wl,-e,__start
+
+TOOL_LDFLAGS_X86_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+
+TOOL_LDFLAGS_AMD64_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+
+TOOL_LDFLAGS_PPC32_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+
+TOOL_LDFLAGS_PPC64_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+
+TOOL_LDFLAGS_ARM_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+
+TOOL_LDFLAGS_PPC32_AIX5 = \
+ $(TOOL_LDFLAGS_COMMON_AIX5) @FLAG_MAIX32@
+
+TOOL_LDFLAGS_PPC64_AIX5 = \
+ $(TOOL_LDFLAGS_COMMON_AIX5) @FLAG_MAIX64@ -Wl,-bbigtoc
+
+TOOL_LDFLAGS_X86_DARWIN = \
+ $(TOOL_LDFLAGS_COMMON_DARWIN) -arch i386
+
+TOOL_LDFLAGS_AMD64_DARWIN = \
+ $(TOOL_LDFLAGS_COMMON_DARWIN) -arch x86_64
+
+
+# NB for 64-bit darwin. We may want to set -Wl,-pagezero_size to
+# something smaller than the default of 4G, so as to facilitate
+# loading clients who are also linked thusly (currently m_ume.c
+# will fail to load them). Although such setting is probably
+# better done in link_tool_exe.c.
+#
+# -Wl,-pagezero_size,0x100000000
+
+#----------------------------------------------------------------------------
+# vgpreload_<tool>-<platform>.a stuff
+#----------------------------------------------------------------------------
+LIBREPLACEMALLOC_X86_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-linux.a
+
+LIBREPLACEMALLOC_AMD64_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-amd64-linux.a
+
+LIBREPLACEMALLOC_PPC32_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc32-linux.a
+
+LIBREPLACEMALLOC_PPC64_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc64-linux.a
+
+LIBREPLACEMALLOC_ARM_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-arm-linux.a
+
+LIBREPLACEMALLOC_PPC32_AIX5 = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc32-aix5.a
+
+LIBREPLACEMALLOC_PPC64_AIX5 = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc64-aix5.a
+
+LIBREPLACEMALLOC_X86_DARWIN = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-darwin.a
+
+LIBREPLACEMALLOC_AMD64_DARWIN = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-amd64-darwin.a
+
+LIBREPLACEMALLOC_LDFLAGS_X86_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_X86_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_AMD64_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_AMD64_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_PPC32_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_PPC32_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_PPC64_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_PPC64_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_ARM_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_ARM_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_PPC32_AIX5 = \
+ $(LIBREPLACEMALLOC_PPC32_AIX5)
+
+LIBREPLACEMALLOC_LDFLAGS_PPC64_AIX5 = \
+ $(LIBREPLACEMALLOC_PPC64_AIX5)
+
+LIBREPLACEMALLOC_LDFLAGS_X86_DARWIN = \
+ $(LIBREPLACEMALLOC_X86_DARWIN)
+
+LIBREPLACEMALLOC_LDFLAGS_AMD64_DARWIN = \
+ $(LIBREPLACEMALLOC_AMD64_DARWIN)
+
+EXTRA_DIST = docs/drd-manual.xml
+
+#----------------------------------------------------------------------------
+# Headers, flags
+#----------------------------------------------------------------------------
+pkginclude_HEADERS = drd.h
+noinst_HEADERS = \
+ drd_barrier.h \
+ drd_basics.h \
+ drd_bitmap.c \
+ drd_bitmap.h \
+ drd_clientobj.h \
+ drd_clientreq.h \
+ drd_cond.h \
+ drd_error.h \
+ drd_hb.h \
+ drd_load_store.h \
+ drd_malloc_wrappers.h \
+ drd_mutex.h \
+ drd_rwlock.h \
+ drd_segment.c \
+ drd_segment.h \
+ drd_semaphore.h \
+ drd_suppression.h \
+ drd_thread.c \
+ drd_thread.h \
+ drd_thread_bitmap.h \
+ drd_vc.c \
+ drd_vc.h \
+ pub_drd_bitmap.h
+
+DRD_CFLAGS = \
+ @FLAG_UNLIMITED_INLINE_UNIT_GROWTH@ \
+ -O2 \
+ @FLAG_W_EXTRA@ \
+ -Wformat-nonliteral \
+ -Wno-inline \
+ -Wno-unused-parameter
+
+DRD_SOURCES_COMMON = \
+ drd_barrier.c \
+ drd_bitmap2_node.c \
+ drd_clientobj.c \
+ drd_clientreq.c \
+ drd_cond.c \
+ drd_cond_initializer.c \
+ drd_error.c \
+ drd_hb.c \
+ drd_load_store.c \
+ drd_main.c \
+ drd_malloc_wrappers.c \
+ drd_mutex.c \
+ drd_rwlock.c \
+ drd_semaphore.c \
+ drd_suppression.c
+
+drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_SOURCES = \
+ $(DRD_SOURCES_COMMON)
+
+drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CPPFLAGS = \
+ $(AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+
+drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CFLAGS = \
+ $(AM_CFLAGS_@VGCONF_PLATFORM_PRI_CAPS@) $(DRD_CFLAGS)
+
+drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_DEPENDENCIES = \
+ $(TOOL_DEPENDENCIES_@VGCONF_PLATFORM_PRI_CAPS@)
+
+drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LDADD = \
+ $(TOOL_LDADD_@VGCONF_PLATFORM_PRI_CAPS@)
+
+drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LDFLAGS = \
+ $(TOOL_LDFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+
+drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LINK = \
+ $(top_builddir)/coregrind/link_tool_exe_@VGCONF_OS@ \
+ @VALT_LOAD_ADDRESS_PRI@ \
+ $(LINK) \
+ $(drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CFLAGS) \
+ $(drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LDFLAGS)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_SOURCES = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(DRD_SOURCES_COMMON)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_CPPFLAGS = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(AM_CPPFLAGS_@VGCONF_PLATFORM_SEC_CAPS@)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_CFLAGS = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(AM_CFLAGS_@VGCONF_PLATFORM_SEC_CAPS@) $(DRD_CFLAGS)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_DEPENDENCIES = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(TOOL_DEPENDENCIES_@VGCONF_PLATFORM_SEC_CAPS@)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LDADD = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(TOOL_LDADD_@VGCONF_PLATFORM_SEC_CAPS@)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LDFLAGS = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(TOOL_LDFLAGS_@VGCONF_PLATFORM_SEC_CAPS@)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LINK = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(top_builddir)/coregrind/link_tool_exe_@VGCONF_OS@ \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ @VALT_LOAD_ADDRESS_SEC@ \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(LINK) \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_CFLAGS) \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LDFLAGS)
+
+@VGCONF_OS_IS_DARWIN_TRUE@noinst_DSYMS = $(noinst_PROGRAMS)
+VGPRELOAD_DRD_SOURCES_COMMON = \
+ drd_pthread_intercepts.c \
+ drd_qtcore_intercepts.c \
+ drd_strmem_intercepts.c
+
+vgpreload_drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_so_SOURCES = \
+ $(VGPRELOAD_DRD_SOURCES_COMMON)
+
+vgpreload_drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_so_CPPFLAGS = \
+ $(AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+
+vgpreload_drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_so_CFLAGS = \
+ $(AM_CFLAGS_@VGCONF_PLATFORM_PRI_CAPS@) $(AM_CFLAGS_PIC) $(DRD_CFLAGS)
+
+vgpreload_drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_so_DEPENDENCIES = \
+ $(LIBREPLACEMALLOC_@VGCONF_PLATFORM_PRI_CAPS@)
+
+vgpreload_drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_so_LDFLAGS = \
+ $(PRELOAD_LDFLAGS_@VGCONF_PLATFORM_PRI_CAPS@) \
+ $(LIBREPLACEMALLOC_LDFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@vgpreload_drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_so_SOURCES = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(VGPRELOAD_DRD_SOURCES_COMMON)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@vgpreload_drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_so_CPPFLAGS = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(AM_CPPFLAGS_@VGCONF_PLATFORM_SEC_CAPS@)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@vgpreload_drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_so_CFLAGS = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(AM_CFLAGS_@VGCONF_PLATFORM_SEC_CAPS@) $(AM_CFLAGS_PIC) $(DRD_CFLAGS)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@vgpreload_drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_so_DEPENDENCIES = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(LIBREPLACEMALLOC_@VGCONF_PLATFORM_SEC_CAPS@)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@vgpreload_drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_so_LDFLAGS = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(PRELOAD_LDFLAGS_@VGCONF_PLATFORM_SEC_CAPS@) \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(LIBREPLACEMALLOC_LDFLAGS_@VGCONF_PLATFORM_SEC_CAPS@)
+
+all: all-recursive
+
+.SUFFIXES:
+.SUFFIXES: .c .o .obj
+$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign drd/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign drd/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-noinstPROGRAMS:
+ -test -z "$(noinst_PROGRAMS)" || rm -f $(noinst_PROGRAMS)
+drd-@VGCONF_ARCH_PRI@-@VGCONF_OS@$(EXEEXT): $(drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_OBJECTS) $(drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_DEPENDENCIES)
+ @rm -f drd-@VGCONF_ARCH_PRI@-@VGCONF_OS@$(EXEEXT)
+ $(drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LINK) $(drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_OBJECTS) $(drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LDADD) $(LIBS)
+drd-@VGCONF_ARCH_SEC@-@VGCONF_OS@$(EXEEXT): $(drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_OBJECTS) $(drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_DEPENDENCIES)
+ @rm -f drd-@VGCONF_ARCH_SEC@-@VGCONF_OS@$(EXEEXT)
+ $(drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LINK) $(drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_OBJECTS) $(drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LDADD) $(LIBS)
+vgpreload_drd-@VGCONF_ARCH_PRI@-@VGCONF_OS@.so$(EXEEXT): $(vgpreload_drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_so_OBJECTS) $(vgpreload_drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_so_DEPENDENCIES)
+ @rm -f vgpreload_drd-@VGCONF_ARCH_PRI@-@VGCONF_OS@.so$(EXEEXT)
+ $(vgpreload_drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_so_LINK) $(vgpreload_drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_so_OBJECTS) $(vgpreload_drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@_so_LDADD) $(LIBS)
+vgpreload_drd-@VGCONF_ARCH_SEC@-@VGCONF_OS@.so$(EXEEXT): $(vgpreload_drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_so_OBJECTS) $(vgpreload_drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_so_DEPENDENCIES)
+ @rm -f vgpreload_drd-@VGCONF_ARCH_SEC@-@VGCONF_OS@.so$(EXEEXT)
+ $(vgpreload_drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_so_LINK) $(vgpreload_drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_so_OBJECTS) $(vgpreload_drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@_so_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_barrier.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_bitmap2_node.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_clientobj.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_clientreq.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_cond.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_cond_initializer.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_error.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_hb.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_load_store.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_main.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_malloc_wrappers.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_mutex.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_rwlock.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_semaphore.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_PRI@_@VGCONF_OS@-drd_suppression.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@-drd_barrier.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@-drd_bitmap2_node.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@-drd_clientobj.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@-drd_clientreq.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@-drd_cond.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@-drd_cond_initializer.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drd_@VGCONF_ARCH_SEC@_@VGCONF_OS@-drd_error.Po@am__quote@
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+++ /dev/null
-Last updated August 7, 2009.
-~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-
-The DRD tool
-~~~~~~~~~~~~
-- Improve the code for suppressing races reported on glibc FILE objects, e.g. by
- intercepting all operations on FILE objects and by associating mutex semantics
- with FILE objects. Verify that races on unsynchronized *_unlocked() operations
- are reported. Remove FILE-I/O suppression patterns from glibc-2.X-drd.supp.
- See also http://www.unix.org/whitepapers/reentrant.html.
-- Add locking order checking. Start from the following information:
- * http://sourceforge.net/mailarchive/message.php?msg_id=alpine.LNX.1.10.0803270822080.17890%40mudge.stoecker.eu
- * http://lwn.net/Articles/185605/
- * http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=Documentation/lockdep-design.txt;h=488773018152056ea159685e732e42452a7ae142;hb=HEAD
-- Make sure tc14_laog_dinphils is run during drd regression tests
- (only possible after locking order checking is implemented).
-- Evaluate whether integration of drd with one of the available Valgrind GUI's
- makes sense (http://valgrind.org/downloads/guis.html).
-
-
-Testing
-~~~~~~~
-- Measure the performance and the memory overhead of drd on the PARSEC
- benchmark (http://parsec.cs.princeton.edu/license.htm).
-- Test with Synfig Studio (see also http://bugs.kde.org/show_bug.cgi?id=158555)
-- Test with a multithreaded Python application.
-
-
-Documentation
-~~~~~~~~~~~~~
-- Document the algorithms used in drd.
-- Add comment on double checked locking.
-- Add comment on lockless algorithms in general and circular buffers in
- particular.
-- Explain how to handle transactions (with regard to locking order).
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/drd/docs
svn://svn.valgrind.org/valgrind
-2010-09-10T14:56:18.607069Z
-11351
-sewardj
+2010-10-10T18:57:53.826496Z
+11423
+bart
has-props
-2010-10-07T07:08:19.277308Z
-c6dbbfb9ce4fcd85b36f5bae382c8a3d
-2010-09-10T14:56:18.607069Z
-11351
-sewardj
+2010-10-11T22:17:20.634731Z
+093b38ca51b0424250581a0d28e0e8bc
+2010-10-10T18:57:53.826496Z
+11423
+bart
-61697
+61700
\f
the next access to the variable at the specified address should be
considered to have happened after the access just before the latest
<literal>ANNOTATE_HAPPENS_BEFORE(addr)</literal> annotation that
- references the same variable. The purpose of these two macros is to
- tell DRD about the order of inter-thread memory accesses implemented via
- atomic memory operations.
+ references the same variable. The purpose of these two macros is to tell
+ DRD about the order of inter-thread memory accesses implemented via
+ atomic memory operations. See
+ also <literal>drd/tests/annotate_smart_pointer.cpp</literal> for an
+ example.
</para>
</listitem>
<listitem>
The macro <literal>ANNOTATE_RWLOCK_CREATE(rwlock)</literal> tells DRD
that the object at address <literal>rwlock</literal> is a
reader-writer synchronization object that is not a
- <literal>pthread_rwlock_t</literal> synchronization object.
+ <literal>pthread_rwlock_t</literal> synchronization object. See
+ also <literal>drd/tests/annotate_rwlock.c</literal> for an example.
</para>
</listitem>
<listitem>
</listitem>
<listitem>
<para>
- The macro <literal>ANNOTATE_BENIGN_RACE(addr, descr)</literal> tells
- DRD that any races detected on the specified address are benign and
- hence should not be reported. The <literal>descr</literal> argument is
- ignored but can be used to document why data races
- on <literal>addr</literal> are benign.
+ The macro <literal>ANNOTATE_BARRIER_INIT(barrier, count,
+ reinitialization_allowed)</literal> tells DRD that a new barrier object
+ at the address <literal>barrier</literal> has been initialized,
+ that <literal>count</literal> threads participate in each barrier and
+ also whether or not barrier reinitialization without intervening
+ destruction should be reported as an error. See
+ also <literal>drd/tests/annotate_barrier.c</literal> for an example.
+ </para>
+ </listitem>
+ <listitem>
+ <para>
+ The macro <literal>ANNOTATE_BARRIER_DESTROY(barrier)</literal>
+ tells DRD that a barrier object is about to be destroyed.
+ </para>
+ </listitem>
+ <listitem>
+ <para>
+ The macro <literal>ANNOTATE_BARRIER_WAIT_BEFORE(barrier)</literal>
+ tells DRD that waiting for a barrier will start.
+ </para>
+ </listitem>
+ <listitem>
+ <para>
+ The macro <literal>ANNOTATE_BARRIER_WAIT_AFTER(barrier)</literal>
+ tells DRD that waiting for a barrier has finished.
+ </para>
+ </listitem>
+ <listitem>
+ <para>
+ The macro <literal>ANNOTATE_BENIGN_RACE_SIZED(addr, size,
+ descr)</literal> tells DRD that any races detected on the specified
+ address are benign and hence should not be
+ reported. The <literal>descr</literal> argument is ignored but can be
+ used to document why data races on <literal>addr</literal> are benign.
+ </para>
+ </listitem>
+ <listitem>
+ <para>
+ The macro <literal>ANNOTATE_BENIGN_RACE_STATIC(var, descr)</literal>
+ tells DRD that any races detected on the specified static variable are
+ benign and hence should not be reported. The <literal>descr</literal>
+ argument is ignored but can be used to document why data races
+ on <literal>var</literal> are benign. Note: this macro can only be
+ used in C++ programs and not in C programs.
</para>
</listitem>
<listitem>
</para>
<para>
-For an example of how to use the annotations for user-defined reader-writer
-synchronization objects, see
-also the source file <literal>drd/tests/annotate_rwlock.c</literal> in the
-Valgrind source archive. And an example of how to
-use the <literal>ANNOTATE_HAPPENS_BEFORE</literal> and
-the <literal>ANNOTATE_HAPPENS_AFTER</literal> annotations can be found
-in the source code of the <ulink url="http://code.google.com/chromium/">Chromium</ulink>
-web browser.
-</para>
-
-<para>
Note: if you compiled Valgrind yourself, the header file
<literal><valgrind/drd.h></literal> will have been installed in
the directory <literal>/usr/include</literal> by the command
</sect2>
-<sect2 id="drd-manual.naming-threads" xreflabel="naming threads">
-<title>Assigning names to threads</title>
-
-<para>
-Many applications log information about changes in internal or
-external state to a file. When analyzing log files of a multithreaded
-application it can be very convenient to know which thread logged
-which information. One possible approach is to identify threads in
-logging output by including the result of
-<function>pthread_self</function> in every log line. However, this approach
-has two disadvantages: there is no direct relationship between these
-values and the source code and these values can be different in each
-run. A better approach is to assign a brief name to each thread and to
-include the assigned thread name in each log line. One possible
-approach for managing thread names is as follows:
-<itemizedlist>
- <listitem>
- <para>
- Allocate a key for the pointer to the thread name through
- <function>pthread_key_create</function>.
- </para>
- </listitem>
- <listitem>
- <para>
- Just after thread creation, set the thread name through
- <function>pthread_setspecific</function>.
- </para>
- </listitem>
- <listitem>
- <para>
- In the code that generates the logging information, query the thread
- name by calling <function>pthread_getspecific</function>.
- </para>
- </listitem>
-</itemizedlist>
-
-</para>
-
-</sect2>
-
</sect1>
<itemizedlist>
<listitem>
<para>
- DRD has only been tested on Linux and Mac OS X.
- </para>
- </listitem>
- <listitem>
- <para>
- Of the two POSIX threads implementations for Linux, only the
- NPTL (Native POSIX Thread Library) is supported. The older
- LinuxThreads library is not supported.
- </para>
- </listitem>
- <listitem>
- <para>
DRD, just like Memcheck, will refuse to start on Linux
distributions where all symbol information has been removed from
<filename>ld.so</filename>. This is e.g. the case for the PPC editions
</listitem>
<listitem>
<para>
+ With gcc 4.4.3 and before, DRD may report data races on the C++
+ class <literal>std::string</literal> in a multithreaded program. This is
+ a know <literal>libstdc++</literal> issue -- see also GCC bug
+ <ulink url="http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40518">40518</ulink>
+ for more information.
+ </para>
+ </listitem>
+ <listitem>
+ <para>
When address tracing is enabled, no information on atomic stores
- will be displayed. This functionality is easy to add
- however. Please contact the Valgrind authors if you would like
- to see this functionality enabled.
+ will be displayed.
</para>
</listitem>
<listitem>
later. GCC 2.95 is not supported.
</para>
</listitem>
+ <listitem>
+ <para>
+ Of the two POSIX threads implementations for Linux, only the
+ NPTL (Native POSIX Thread Library) is supported. The older
+ LinuxThreads library is not supported.
+ </para>
+ </listitem>
</itemizedlist>
</sect1>
the next access to the variable at the specified address should be
considered to have happened after the access just before the latest
<literal>ANNOTATE_HAPPENS_BEFORE(addr)</literal> annotation that
- references the same variable. The purpose of these two macros is to
- tell DRD about the order of inter-thread memory accesses implemented via
- atomic memory operations.
+ references the same variable. The purpose of these two macros is to tell
+ DRD about the order of inter-thread memory accesses implemented via
+ atomic memory operations. See
+ also <literal>drd/tests/annotate_smart_pointer.cpp</literal> for an
+ example.
</para>
</listitem>
<listitem>
The macro <literal>ANNOTATE_RWLOCK_CREATE(rwlock)</literal> tells DRD
that the object at address <literal>rwlock</literal> is a
reader-writer synchronization object that is not a
- <literal>pthread_rwlock_t</literal> synchronization object.
+ <literal>pthread_rwlock_t</literal> synchronization object. See
+ also <literal>drd/tests/annotate_rwlock.c</literal> for an example.
</para>
</listitem>
<listitem>
</listitem>
<listitem>
<para>
- The macro <literal>ANNOTATE_BENIGN_RACE(addr, descr)</literal> tells
- DRD that any races detected on the specified address are benign and
- hence should not be reported. The <literal>descr</literal> argument is
- ignored but can be used to document why data races
- on <literal>addr</literal> are benign.
+ The macro <literal>ANNOTATE_BARRIER_INIT(barrier, count,
+ reinitialization_allowed)</literal> tells DRD that a new barrier object
+ at the address <literal>barrier</literal> has been initialized,
+ that <literal>count</literal> threads participate in each barrier and
+ also whether or not barrier reinitialization without intervening
+ destruction should be reported as an error. See
+ also <literal>drd/tests/annotate_barrier.c</literal> for an example.
+ </para>
+ </listitem>
+ <listitem>
+ <para>
+ The macro <literal>ANNOTATE_BARRIER_DESTROY(barrier)</literal>
+ tells DRD that a barrier object is about to be destroyed.
+ </para>
+ </listitem>
+ <listitem>
+ <para>
+ The macro <literal>ANNOTATE_BARRIER_WAIT_BEFORE(barrier)</literal>
+ tells DRD that waiting for a barrier will start.
+ </para>
+ </listitem>
+ <listitem>
+ <para>
+ The macro <literal>ANNOTATE_BARRIER_WAIT_AFTER(barrier)</literal>
+ tells DRD that waiting for a barrier has finished.
+ </para>
+ </listitem>
+ <listitem>
+ <para>
+ The macro <literal>ANNOTATE_BENIGN_RACE_SIZED(addr, size,
+ descr)</literal> tells DRD that any races detected on the specified
+ address are benign and hence should not be
+ reported. The <literal>descr</literal> argument is ignored but can be
+ used to document why data races on <literal>addr</literal> are benign.
+ </para>
+ </listitem>
+ <listitem>
+ <para>
+ The macro <literal>ANNOTATE_BENIGN_RACE_STATIC(var, descr)</literal>
+ tells DRD that any races detected on the specified static variable are
+ benign and hence should not be reported. The <literal>descr</literal>
+ argument is ignored but can be used to document why data races
+ on <literal>var</literal> are benign. Note: this macro can only be
+ used in C++ programs and not in C programs.
</para>
</listitem>
<listitem>
</para>
<para>
-For an example of how to use the annotations for user-defined reader-writer
-synchronization objects, see
-also the source file <literal>drd/tests/annotate_rwlock.c</literal> in the
-Valgrind source archive. And an example of how to
-use the <literal>ANNOTATE_HAPPENS_BEFORE</literal> and
-the <literal>ANNOTATE_HAPPENS_AFTER</literal> annotations can be found
-in the source code of the <ulink url="http://code.google.com/chromium/">Chromium</ulink>
-web browser.
-</para>
-
-<para>
Note: if you compiled Valgrind yourself, the header file
<literal><valgrind/drd.h></literal> will have been installed in
the directory <literal>/usr/include</literal> by the command
</sect2>
-<sect2 id="drd-manual.naming-threads" xreflabel="naming threads">
-<title>Assigning names to threads</title>
-
-<para>
-Many applications log information about changes in internal or
-external state to a file. When analyzing log files of a multithreaded
-application it can be very convenient to know which thread logged
-which information. One possible approach is to identify threads in
-logging output by including the result of
-<function>pthread_self</function> in every log line. However, this approach
-has two disadvantages: there is no direct relationship between these
-values and the source code and these values can be different in each
-run. A better approach is to assign a brief name to each thread and to
-include the assigned thread name in each log line. One possible
-approach for managing thread names is as follows:
-<itemizedlist>
- <listitem>
- <para>
- Allocate a key for the pointer to the thread name through
- <function>pthread_key_create</function>.
- </para>
- </listitem>
- <listitem>
- <para>
- Just after thread creation, set the thread name through
- <function>pthread_setspecific</function>.
- </para>
- </listitem>
- <listitem>
- <para>
- In the code that generates the logging information, query the thread
- name by calling <function>pthread_getspecific</function>.
- </para>
- </listitem>
-</itemizedlist>
-
-</para>
-
-</sect2>
-
</sect1>
<itemizedlist>
<listitem>
<para>
- DRD has only been tested on Linux and Mac OS X.
- </para>
- </listitem>
- <listitem>
- <para>
- Of the two POSIX threads implementations for Linux, only the
- NPTL (Native POSIX Thread Library) is supported. The older
- LinuxThreads library is not supported.
- </para>
- </listitem>
- <listitem>
- <para>
DRD, just like Memcheck, will refuse to start on Linux
distributions where all symbol information has been removed from
<filename>ld.so</filename>. This is e.g. the case for the PPC editions
</listitem>
<listitem>
<para>
+ With gcc 4.4.3 and before, DRD may report data races on the C++
+ class <literal>std::string</literal> in a multithreaded program. This is
+ a know <literal>libstdc++</literal> issue -- see also GCC bug
+ <ulink url="http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40518">40518</ulink>
+ for more information.
+ </para>
+ </listitem>
+ <listitem>
+ <para>
When address tracing is enabled, no information on atomic stores
- will be displayed. This functionality is easy to add
- however. Please contact the Valgrind authors if you would like
- to see this functionality enabled.
+ will be displayed.
</para>
</listitem>
<listitem>
later. GCC 2.95 is not supported.
</para>
</listitem>
+ <listitem>
+ <para>
+ Of the two POSIX threads implementations for Linux, only the
+ NPTL (Native POSIX Thread Library) is supported. The older
+ LinuxThreads library is not supported.
+ </para>
+ </listitem>
</itemizedlist>
</sect1>
This file is part of DRD, a Valgrind tool for verification of
multithreaded programs.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
All rights reserved.
Redistribution and use in source and binary forms, with or without
public: \
static_var##_annotator() \
{ \
- ANNOTATE_BENIGN_RACE(&static_var, #static_var ": " description); \
+ ANNOTATE_BENIGN_RACE_SIZED(&static_var, sizeof(static_var), \
+ #static_var ": " description); \
} \
} the_##static_var##_annotator; \
}
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of DRD, a thread error detector.
- Copyright (C) 2009 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2009 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of DRD, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
/*
This file is part of drd, a thread error detector.
- Copyright (C) 2006-2010 Bart Van Assche <bart.vanassche@gmail.com>.
+ Copyright (C) 2006-2010 Bart Van Assche <bvanassche@acm.org>.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/drd/scripts
svn://svn.valgrind.org/valgrind
-2010-07-29T15:19:50.197795Z
-11240
+2010-10-10T18:07:31.346936Z
+11420
bart
has-props
--- /dev/null
+#!/bin/bash
+
+downloads="$HOME/software/downloads"
+
+if [ ! -e /usr/include/tiffio.h ]; then
+ echo "Error: could not find file tiffio.h. Please install libtiff4-dev."
+ exit 1
+fi
+
+export LC_ALL=C
+
+mkdir -p "${downloads}"
+
+cd "$(dirname $0)/.."
+
+if [ -e splash2 ]; then
+ echo "Error: a directory with the name splash2 already exists. Please"
+ echo "remove it before running this script, or run this script in another"
+ echo "directory."
+ exit 1
+fi
+
+(
+ cd "$downloads"
+ if [ ! -e splash2.tar.gz ]; then
+ wget -q http://www-flash.stanford.edu/apps/SPLASH/splash2.tar.gz
+ fi
+ if [ ! -e splash2-modified.patch.gz ]; then
+ wget -q http://www.capsl.udel.edu/splash/splash2-modified.patch.gz
+ fi
+)
+
+tar zxf $downloads/splash2.tar.gz
+cd splash2
+gzip -cd < "$downloads/splash2-modified.patch.gz" | patch -p1 -s
+patch -p1 -s <<'EOF'
+diff -ru orig/splash2/codes/apps/radiosity/display.C splash2/codes/apps/radiosity/display.C
+--- orig/splash2/codes/apps/radiosity/display.C 2008-05-25 10:38:52.000000000 +0200
++++ splash2/codes/apps/radiosity/display.C 2008-05-25 10:37:51.000000000 +0200
+@@ -14,6 +14,7 @@
+ /* */
+ /*************************************************************************/
+
++#include <math.h>
+ #include <stdio.h>
+
+ EXTERN_ENV;
+--- orig/splash2/codes/apps/radiosity/Makefile 2008-05-25 10:38:52.000000000 +0200
++++ splash2/codes/apps/radiosity/Makefile 2008-05-25 13:05:36.000000000 +0200
+@@ -15,7 +15,7 @@
+
+ LOADLIBES = glibdumb/glib.a glibps/glibps.a
+
+-$(TARGET): $(OBJS)
++$(TARGET): $(OBJS) $(LOADLIBES)
+ $(CC) $(OBJS) $(CFLAGS) $(LOADLIBES) -o $(TARGET) $(LDFLAGS)
+
+ radiosity.h: patch.h model.h parallel.h task.h
+@@ -29,3 +29,7 @@
+ visible.c: visible.C $(HS)
+ rad_tools.c: rad_tools.C $(HS)
+ room_model.c: room_model.C $(HS)
++glibdumb/glib.a:
++ make -C glibdumb glib.a
++glibps/glibps.a:
++ make -C glibps glibps.a
+diff -ru orig/splash2/codes/apps/raytrace/rltotiff/Makefile splash2/codes/apps/raytrace/rltotiff/Makefile
+--- orig/splash2/codes/apps/raytrace/rltotiff/Makefile 2008-05-25 10:38:52.000000000 +0200
++++ splash2/codes/apps/raytrace/rltotiff/Makefile 2008-05-25 10:31:57.000000000 +0200
+@@ -4,6 +4,3 @@
+ include ../../../Makefile.config
+
+ LDFLAGS := $(LDFLAGS) -ltiff
+-
+-clean:
+- rm -rf $(OBJS) $(TARGET)
+EOF
+
+
+patch -p1 -s <<EOF
+diff -ru orig/splash2/codes/Makefile.config splash2/codes/Makefile.config
+--- orig/splash2/codes/Makefile.config 2008-05-25 10:38:52.000000000 +0200
++++ splash2/codes/Makefile.config 2008-05-25 10:14:25.000000000 +0200
+@@ -1,5 +1,5 @@
+-CC := gcc
++CC := gcc
+-CFLAGS := -O3 -pthread -D_POSIX_C_SOURCE=200112
++CFLAGS := -g3 -m32 -O3 -pthread -D_POSIX_C_SOURCE=200112
+ #CFLAGS := -g3 -pthread -D_POSIX_C_SOURCE=200112
+ CFLAGS := \$(CFLAGS) -Wall -W -Wmissing-prototypes -Wmissing-declarations -Wredundant-decls -Wdisabled-optimization
+ CFLAGS := \$(CFLAGS) -Wpadded -Winline -Wpointer-arith -Wsign-compare -Wendif-labels
+@@ -5,8 +5,8 @@
+ CFLAGS := \$(CFLAGS) -Wpadded -Winline -Wpointer-arith -Wsign-compare -Wendif-labels
+ LDFLAGS := -lm
+
+-BASEDIR := \$(HOME)/splash2/codes
+-MACROS := \$(BASEDIR)/null_macros/c.m4.null
++BASEDIR := ${PWD}/codes
++MACROS := \$(BASEDIR)/null_macros/c.m4.null.POSIX_BARRIER
+ M4 := m4 -s -Ulen -Uindex
+
+ x = *
+--- orig/splash2/codes/apps/radiosity/elemman.C 2008-07-13 20:24:35.000000000 +0200
++++ splash2/codes/apps/radiosity/elemman.C 2008-07-13 20:45:15.000000000 +0200
+@@ -24,6 +24,7 @@
+
+
+ #include <stdio.h>
++#include "drd.h"
+
+ EXTERN_ENV;
+
+@@ -707,6 +708,12 @@ void process_rays(Element *e, long proce
+ e->n_interactions = 0 ;
+ UNLOCK(e->elem_lock->lock);
+
++ {
++ Interaction* p;
++ for (p = i_list; p; p = p->next)
++ DRD_IGNORE_VAR(*p);
++ }
++
+ /* For each interaction, do BF-error-analysis */
+ bf_error_analysis_list( e, i_list, process_id ) ;
+
+--- orig/splash2/codes/apps/radiosity/rad_main.C 2008-07-13 20:24:35.000000000 +0200
++++ splash2/codes/apps/radiosity/rad_main.C 2008-07-13 20:50:01.000000000 +0200
+@@ -30,6 +30,7 @@
+ #include <panel.h>
+ #endif
+ #endif
++#include "drd.h"
+
+ /* ANL macro initialization */
+
+@@ -1084,6 +1085,18 @@ void init_global(long process_id)
+ /* Initialize statistical info */
+ init_stat_info(process_id) ;
+
++ {
++ int i;
++
++ DRD_IGNORE_VAR(global->pbar_count);
++ for (i = 0;
++ i < sizeof(global->task_queue) / sizeof(global->task_queue[0]);
++ i++)
++ {
++ DRD_IGNORE_VAR(global->task_queue[i].n_tasks);
++ }
++ DRD_IGNORE_VAR(global->element_buf);
++ }
+ }
+
+
+--- orig/splash2/codes/apps/radiosity/Makefile 2008-07-13 20:24:35.000000000 +0200
++++ splash2/codes/apps/radiosity/Makefile 2008-07-13 20:09:27.000000000 +0200
+@@ -6,7 +6,7 @@ HS = model.h parallel.h patch.h radiosit
+
+ include ../../Makefile.config
+
+-CFLAGS := \$(CFLAGS) -I./glibdumb -I./glibps
++CFLAGS := \$(CFLAGS) -I./glibdumb -I./glibps -I../../../../../drd -I../../../../../include
+
+ #CCOPTS = -I -float -I/usr/include \$(CFLAGS)
+ #LDFLAGS = -lm -lpthread
+EOF
+
+for m in $(find codes -name Makefile)
+do
+ echo "==== $m ===="
+ make -s -C $(dirname $m)
+done
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/drd/scripts/ppc-cross
svn://svn.valgrind.org/valgrind
-2009-08-29T11:59:27.708432Z
-10879
+2010-10-10T18:07:31.346936Z
+11420
bart
has-props
-2010-10-07T07:08:18.965361Z
-c146e2a60efda2ddfd56d617112da899
-2009-08-29T11:59:27.708432Z
-10879
+2010-10-11T22:17:20.554744Z
+89e7d0cdf783f9b51ed33e478a32397c
+2010-10-10T18:07:31.346936Z
+11420
bart
has-props
-4681
+4675
\f
patches
dir
#
# Script for generating a PowerPC cross compiler using crosstool.
#
-# Copyright (C) 2009 Bart Van Assche <bart.vanassche@gmail.com>.
+# Copyright (C) 2009 Bart Van Assche <bvanassche@acm.org>.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/drd/scripts/ppc-cross/crosstool-patches
svn://svn.valgrind.org/valgrind
#
# Script for generating a PowerPC cross compiler using crosstool.
#
-# Copyright (C) 2009 Bart Van Assche <bart.vanassche@gmail.com>.
+# Copyright (C) 2009 Bart Van Assche <bvanassche@acm.org>.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/drd/scripts/ppc-cross/kernel-config
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/drd/scripts/ppc-cross/kernel-config/2.6.22
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/drd/scripts/ppc-cross/kernel
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/drd/scripts/ppc-cross/patches
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/drd/tests
svn://svn.valgrind.org/valgrind
--- /dev/null
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+# drd/tests/Makefile. Generated from Makefile.in by configure.
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
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+
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+ fp_race2.stderr.exp \
+ fp_race2.vgtest \
+ hg01_all_ok.stderr.exp \
+ hg01_all_ok.vgtest \
+ hg02_deadlock.stderr.exp \
+ hg02_deadlock.vgtest \
+ hg03_inherit.stderr.exp \
+ hg03_inherit.vgtest \
+ hg04_race.stderr.exp \
+ hg04_race.vgtest \
+ hg05_race2.stderr.exp \
+ hg05_race2.stderr.exp-powerpc \
+ hg05_race2.vgtest \
+ hg06_readshared.stderr.exp \
+ hg06_readshared.vgtest \
+ hold_lock_1.stderr.exp \
+ hold_lock_1.vgtest \
+ hold_lock_2.stderr.exp \
+ hold_lock_2.vgtest \
+ linuxthreads_det.stderr.exp \
+ linuxthreads_det.stderr.exp-linuxthreads \
+ linuxthreads_det.stdout.exp \
+ linuxthreads_det.stdout.exp-linuxthreads \
+ linuxthreads_det.vgtest \
+ matinv.stderr.exp \
+ matinv.stdout.exp \
+ matinv.vgtest \
+ memory_allocation.stderr.exp \
+ memory_allocation.vgtest \
+ monitor_example.stderr.exp \
+ monitor_example.vgtest \
+ new_delete.stderr.exp \
+ new_delete.vgtest \
+ omp_matinv.stderr.exp \
+ omp_matinv.stdout.exp \
+ omp_matinv.vgtest \
+ omp_matinv_racy.stderr.exp \
+ omp_matinv_racy.stdout.exp \
+ omp_matinv_racy.vgtest \
+ omp_prime_racy.stderr.exp \
+ omp_prime_racy.vgtest \
+ omp_printf.stderr.exp \
+ omp_printf.vgtest \
+ pth_barrier.stderr.exp \
+ pth_barrier.vgtest \
+ pth_barrier2.stderr.exp \
+ pth_barrier2.vgtest \
+ pth_barrier3.stderr.exp \
+ pth_barrier3.vgtest \
+ pth_barrier_race.stderr.exp \
+ pth_barrier_race.vgtest \
+ pth_barrier_reinit.stderr.exp \
+ pth_barrier_reinit.vgtest \
+ pth_broadcast.stderr.exp \
+ pth_broadcast.vgtest \
+ pth_cancel_locked.stderr.exp \
+ pth_cancel_locked.stderr.exp-darwin \
+ pth_cancel_locked.vgtest \
+ pth_cleanup_handler.stderr.exp \
+ pth_cleanup_handler.vgtest \
+ pth_cond_race.stderr.exp \
+ pth_cond_race.vgtest \
+ pth_cond_race2.stderr.exp \
+ pth_cond_race2.vgtest \
+ pth_cond_race3.stderr.exp \
+ pth_cond_race3.vgtest \
+ pth_create_chain.stderr.exp \
+ pth_create_chain.vgtest \
+ pth_create_glibc_2_0.stderr.exp \
+ pth_create_glibc_2_0.vgtest \
+ pth_detached.stderr.exp \
+ pth_detached.stdout.exp \
+ pth_detached.vgtest \
+ pth_detached2.stderr.exp \
+ pth_detached2.stdout.exp \
+ pth_detached2.vgtest \
+ pth_detached_sem.stderr.exp \
+ pth_detached_sem.stdout.exp \
+ pth_detached_sem.vgtest \
+ pth_inconsistent_cond_wait.stderr.exp1 \
+ pth_inconsistent_cond_wait.stderr.exp2 \
+ pth_inconsistent_cond_wait.vgtest \
+ pth_mutex_reinit.stderr.exp \
+ pth_mutex_reinit.vgtest \
+ pth_once.stderr.exp \
+ pth_once.vgtest \
+ pth_process_shared_mutex.stderr.exp \
+ pth_process_shared_mutex.vgtest \
+ pth_spinlock.stderr.exp \
+ pth_spinlock.vgtest \
+ pth_uninitialized_cond.stderr.exp \
+ pth_uninitialized_cond.vgtest \
+ qt4_atomic.stderr.exp \
+ qt4_atomic.vgtest \
+ qt4_mutex.stderr.exp \
+ qt4_mutex.vgtest \
+ qt4_rwlock.stderr.exp \
+ qt4_rwlock.vgtest \
+ qt4_semaphore.stderr.exp \
+ qt4_semaphore.vgtest \
+ read_after_free.stderr.exp \
+ read_after_free.vgtest \
+ recursive_mutex.stderr.exp-linux \
+ recursive_mutex.stderr.exp-darwin \
+ recursive_mutex.vgtest \
+ rwlock_race.stderr.exp \
+ rwlock_race.stderr.exp2 \
+ rwlock_race.vgtest \
+ rwlock_test.stderr.exp \
+ rwlock_test.vgtest \
+ rwlock_type_checking.stderr.exp \
+ rwlock_type_checking.vgtest \
+ sem_as_mutex.stderr.exp \
+ sem_as_mutex.vgtest \
+ sem_as_mutex2.stderr.exp \
+ sem_as_mutex2.vgtest \
+ sem_as_mutex3.stderr.exp \
+ sem_as_mutex3.vgtest \
+ sem_open.stderr.exp \
+ sem_open.vgtest \
+ sem_open2.stderr.exp \
+ sem_open2.vgtest \
+ sem_open3.stderr.exp \
+ sem_open3.vgtest \
+ sem_open_traced.stderr.exp \
+ sem_open_traced.vgtest \
+ sigalrm.stderr.exp \
+ sigalrm.vgtest \
+ sigaltstack.stderr.exp \
+ sigaltstack.vgtest \
+ tc01_simple_race.stderr.exp \
+ tc01_simple_race.vgtest \
+ tc02_simple_tls.stderr.exp \
+ tc02_simple_tls.vgtest \
+ tc03_re_excl.stderr.exp \
+ tc03_re_excl.vgtest \
+ tc04_free_lock.stderr.exp \
+ tc04_free_lock.vgtest \
+ tc05_simple_race.stderr.exp \
+ tc05_simple_race.vgtest \
+ tc06_two_races.stderr.exp \
+ tc06_two_races.vgtest \
+ tc07_hbl1.stderr.exp \
+ tc07_hbl1.stdout.exp \
+ tc07_hbl1.vgtest \
+ tc08_hbl2.stderr.exp \
+ tc08_hbl2.stdout.exp \
+ tc08_hbl2.vgtest \
+ tc09_bad_unlock.stderr.exp \
+ tc09_bad_unlock.stderr.exp-glibc2.8 \
+ tc09_bad_unlock.vgtest \
+ tc10_rec_lock.stderr.exp \
+ tc10_rec_lock.vgtest \
+ tc11_XCHG.stderr.exp tc11_XCHG.stdout.exp \
+ tc11_XCHG.vgtest \
+ tc12_rwl_trivial.stderr.exp \
+ tc12_rwl_trivial.vgtest \
+ tc13_laog1.stderr.exp \
+ tc13_laog1.vgtest \
+ tc15_laog_lockdel.stderr.exp \
+ tc15_laog_lockdel.vgtest \
+ tc16_byterace.stderr.exp \
+ tc16_byterace.vgtest \
+ tc17_sembar.stderr.exp \
+ tc17_sembar.vgtest \
+ tc18_semabuse.stderr.exp \
+ tc18_semabuse.vgtest \
+ tc19_shadowmem.stderr.exp-32bit \
+ tc19_shadowmem.stderr.exp-64bit \
+ tc19_shadowmem.vgtest \
+ tc21_pthonce.stderr.exp \
+ tc21_pthonce.stdout.exp \
+ tc21_pthonce.vgtest \
+ tc22_exit_w_lock.stderr.exp-32bit \
+ tc22_exit_w_lock.stderr.exp-64bit \
+ tc22_exit_w_lock.vgtest \
+ tc23_bogus_condwait.stderr.exp-linux-x86 \
+ tc23_bogus_condwait.stderr.exp-linux-ppc \
+ tc23_bogus_condwait.stderr.exp-darwin \
+ tc23_bogus_condwait.vgtest \
+ tc24_nonzero_sem.stderr.exp \
+ tc24_nonzero_sem.vgtest \
+ thread_name.stderr.exp \
+ thread_name.vgtest \
+ trylock.stderr.exp \
+ trylock.vgtest \
+ unit_bitmap.stderr.exp \
+ unit_bitmap.vgtest \
+ unit_vc.stderr.exp \
+ unit_vc.vgtest
+
+LDADD = -lpthread
+monitor_example_SOURCES = monitor_example.cpp
+new_delete_SOURCES = new_delete.cpp
+pth_cleanup_handler_CFLAGS = $(AM_CFLAGS) -Wno-empty-body
+tsan_unittest_SOURCES = tsan_unittest.cpp
+tsan_unittest_CXXFLAGS = $(AM_CXXFLAGS) \
+ -DTHREAD_WRAPPERS='"tsan_thread_wrappers_pthread.h"'
+
+unit_bitmap_CFLAGS = $(AM_CFLAGS) -O2 \
+ -DENABLE_DRD_CONSISTENCY_CHECKS \
+ --param inline-unit-growth=900
+
+unit_bitmap_LDADD = # nothing, i.e. not -lpthread
+unit_vc_CFLAGS = $(AM_CFLAGS) -DENABLE_DRD_CONSISTENCY_CHECKS
+unit_vc_LDADD = # nothing, i.e. not -lpthread
+#boost_thread_SOURCES = boost_thread.cpp
+#boost_thread_CXXFLAGS = $(AM_CXXFLAGS) $(BOOST_CFLAGS)
+#boost_thread_LDADD = $(BOOST_LIBS)
+annotate_smart_pointer_SOURCES = annotate_smart_pointer.cpp
+annotate_static_SOURCES = annotate_static.cpp
+omp_matinv_CFLAGS = $(AM_CFLAGS) -fopenmp
+omp_matinv_LDFLAGS = -fopenmp
+omp_matinv_LDADD = $(LDADD) -lm
+omp_prime_CFLAGS = $(AM_CFLAGS) -fopenmp
+omp_prime_LDFLAGS = -fopenmp
+omp_prime_LDADD = $(LDADD) -lm
+omp_printf_CFLAGS = $(AM_CFLAGS) -fopenmp
+omp_printf_LDFLAGS = -fopenmp
+omp_printf_LDADD = $(LDADD) -lm
+matinv_LDADD = $(LDADD) -lm
+#qt4_mutex_SOURCES = qt4_mutex.cpp
+#qt4_mutex_CXXFLAGS = $(AM_CXXFLAGS) $(QTCORE_CFLAGS)
+#qt4_mutex_LDADD = $(LDADD) $(QTCORE_LIBS)
+#qt4_rwlock_SOURCES = qt4_rwlock.cpp
+#qt4_rwlock_CXXFLAGS = $(AM_CXXFLAGS) $(QTCORE_CFLAGS)
+#qt4_rwlock_LDADD = $(LDADD) $(QTCORE_LIBS)
+#qt4_semaphore_SOURCES = qt4_semaphore.cpp
+#qt4_semaphore_CXXFLAGS = $(AM_CXXFLAGS) $(QTCORE_CFLAGS)
+#qt4_semaphore_LDADD = $(LDADD) $(QTCORE_LIBS)
+#qt4_atomic_SOURCES = qt4_atomic.cpp
+#qt4_atomic_CXXFLAGS = $(AM_CXXFLAGS) $(QTCORE_CFLAGS)
+#qt4_atomic_LDADD = $(LDADD) $(QTCORE_LIBS)
+all: all-am
+
+.SUFFIXES:
+.SUFFIXES: .c .cpp .o .obj
+$(srcdir)/Makefile.in: # $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign drd/tests/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign drd/tests/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: # $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): # $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
+ -test -z "$(check_PROGRAMS)" || rm -f $(check_PROGRAMS)
+annotate_barrier$(EXEEXT): $(annotate_barrier_OBJECTS) $(annotate_barrier_DEPENDENCIES)
+ @rm -f annotate_barrier$(EXEEXT)
+ $(LINK) $(annotate_barrier_OBJECTS) $(annotate_barrier_LDADD) $(LIBS)
+annotate_hb_err$(EXEEXT): $(annotate_hb_err_OBJECTS) $(annotate_hb_err_DEPENDENCIES)
+ @rm -f annotate_hb_err$(EXEEXT)
+ $(LINK) $(annotate_hb_err_OBJECTS) $(annotate_hb_err_LDADD) $(LIBS)
+annotate_hb_race$(EXEEXT): $(annotate_hb_race_OBJECTS) $(annotate_hb_race_DEPENDENCIES)
+ @rm -f annotate_hb_race$(EXEEXT)
+ $(LINK) $(annotate_hb_race_OBJECTS) $(annotate_hb_race_LDADD) $(LIBS)
+annotate_ignore_rw$(EXEEXT): $(annotate_ignore_rw_OBJECTS) $(annotate_ignore_rw_DEPENDENCIES)
+ @rm -f annotate_ignore_rw$(EXEEXT)
+ $(LINK) $(annotate_ignore_rw_OBJECTS) $(annotate_ignore_rw_LDADD) $(LIBS)
+annotate_ignore_write$(EXEEXT): $(annotate_ignore_write_OBJECTS) $(annotate_ignore_write_DEPENDENCIES)
+ @rm -f annotate_ignore_write$(EXEEXT)
+ $(LINK) $(annotate_ignore_write_OBJECTS) $(annotate_ignore_write_LDADD) $(LIBS)
+annotate_publish_hg$(EXEEXT): $(annotate_publish_hg_OBJECTS) $(annotate_publish_hg_DEPENDENCIES)
+ @rm -f annotate_publish_hg$(EXEEXT)
+ $(LINK) $(annotate_publish_hg_OBJECTS) $(annotate_publish_hg_LDADD) $(LIBS)
+annotate_rwlock$(EXEEXT): $(annotate_rwlock_OBJECTS) $(annotate_rwlock_DEPENDENCIES)
+ @rm -f annotate_rwlock$(EXEEXT)
+ $(LINK) $(annotate_rwlock_OBJECTS) $(annotate_rwlock_LDADD) $(LIBS)
+annotate_smart_pointer$(EXEEXT): $(annotate_smart_pointer_OBJECTS) $(annotate_smart_pointer_DEPENDENCIES)
+ @rm -f annotate_smart_pointer$(EXEEXT)
+ $(CXXLINK) $(annotate_smart_pointer_OBJECTS) $(annotate_smart_pointer_LDADD) $(LIBS)
+annotate_static$(EXEEXT): $(annotate_static_OBJECTS) $(annotate_static_DEPENDENCIES)
+ @rm -f annotate_static$(EXEEXT)
+ $(CXXLINK) $(annotate_static_OBJECTS) $(annotate_static_LDADD) $(LIBS)
+atomic_var$(EXEEXT): $(atomic_var_OBJECTS) $(atomic_var_DEPENDENCIES)
+ @rm -f atomic_var$(EXEEXT)
+ $(LINK) $(atomic_var_OBJECTS) $(atomic_var_LDADD) $(LIBS)
+boost_thread$(EXEEXT): $(boost_thread_OBJECTS) $(boost_thread_DEPENDENCIES)
+ @rm -f boost_thread$(EXEEXT)
+ $(boost_thread_LINK) $(boost_thread_OBJECTS) $(boost_thread_LDADD) $(LIBS)
+bug-235681$(EXEEXT): $(bug_235681_OBJECTS) $(bug_235681_DEPENDENCIES)
+ @rm -f bug-235681$(EXEEXT)
+ $(LINK) $(bug_235681_OBJECTS) $(bug_235681_LDADD) $(LIBS)
+circular_buffer$(EXEEXT): $(circular_buffer_OBJECTS) $(circular_buffer_DEPENDENCIES)
+ @rm -f circular_buffer$(EXEEXT)
+ $(LINK) $(circular_buffer_OBJECTS) $(circular_buffer_LDADD) $(LIBS)
+custom_alloc$(EXEEXT): $(custom_alloc_OBJECTS) $(custom_alloc_DEPENDENCIES)
+ @rm -f custom_alloc$(EXEEXT)
+ $(LINK) $(custom_alloc_OBJECTS) $(custom_alloc_LDADD) $(LIBS)
+fp_race$(EXEEXT): $(fp_race_OBJECTS) $(fp_race_DEPENDENCIES)
+ @rm -f fp_race$(EXEEXT)
+ $(LINK) $(fp_race_OBJECTS) $(fp_race_LDADD) $(LIBS)
+hold_lock$(EXEEXT): $(hold_lock_OBJECTS) $(hold_lock_DEPENDENCIES)
+ @rm -f hold_lock$(EXEEXT)
+ $(LINK) $(hold_lock_OBJECTS) $(hold_lock_LDADD) $(LIBS)
+linuxthreads_det$(EXEEXT): $(linuxthreads_det_OBJECTS) $(linuxthreads_det_DEPENDENCIES)
+ @rm -f linuxthreads_det$(EXEEXT)
+ $(LINK) $(linuxthreads_det_OBJECTS) $(linuxthreads_det_LDADD) $(LIBS)
+matinv$(EXEEXT): $(matinv_OBJECTS) $(matinv_DEPENDENCIES)
+ @rm -f matinv$(EXEEXT)
+ $(LINK) $(matinv_OBJECTS) $(matinv_LDADD) $(LIBS)
+memory_allocation$(EXEEXT): $(memory_allocation_OBJECTS) $(memory_allocation_DEPENDENCIES)
+ @rm -f memory_allocation$(EXEEXT)
+ $(LINK) $(memory_allocation_OBJECTS) $(memory_allocation_LDADD) $(LIBS)
+monitor_example$(EXEEXT): $(monitor_example_OBJECTS) $(monitor_example_DEPENDENCIES)
+ @rm -f monitor_example$(EXEEXT)
+ $(CXXLINK) $(monitor_example_OBJECTS) $(monitor_example_LDADD) $(LIBS)
+new_delete$(EXEEXT): $(new_delete_OBJECTS) $(new_delete_DEPENDENCIES)
+ @rm -f new_delete$(EXEEXT)
+ $(CXXLINK) $(new_delete_OBJECTS) $(new_delete_LDADD) $(LIBS)
+omp_matinv$(EXEEXT): $(omp_matinv_OBJECTS) $(omp_matinv_DEPENDENCIES)
+ @rm -f omp_matinv$(EXEEXT)
+ $(omp_matinv_LINK) $(omp_matinv_OBJECTS) $(omp_matinv_LDADD) $(LIBS)
+omp_prime$(EXEEXT): $(omp_prime_OBJECTS) $(omp_prime_DEPENDENCIES)
+ @rm -f omp_prime$(EXEEXT)
+ $(omp_prime_LINK) $(omp_prime_OBJECTS) $(omp_prime_LDADD) $(LIBS)
+omp_printf$(EXEEXT): $(omp_printf_OBJECTS) $(omp_printf_DEPENDENCIES)
+ @rm -f omp_printf$(EXEEXT)
+ $(omp_printf_LINK) $(omp_printf_OBJECTS) $(omp_printf_LDADD) $(LIBS)
+pth_barrier$(EXEEXT): $(pth_barrier_OBJECTS) $(pth_barrier_DEPENDENCIES)
+ @rm -f pth_barrier$(EXEEXT)
+ $(LINK) $(pth_barrier_OBJECTS) $(pth_barrier_LDADD) $(LIBS)
+pth_barrier_race$(EXEEXT): $(pth_barrier_race_OBJECTS) $(pth_barrier_race_DEPENDENCIES)
+ @rm -f pth_barrier_race$(EXEEXT)
+ $(LINK) $(pth_barrier_race_OBJECTS) $(pth_barrier_race_LDADD) $(LIBS)
+pth_barrier_reinit$(EXEEXT): $(pth_barrier_reinit_OBJECTS) $(pth_barrier_reinit_DEPENDENCIES)
+ @rm -f pth_barrier_reinit$(EXEEXT)
+ $(LINK) $(pth_barrier_reinit_OBJECTS) $(pth_barrier_reinit_LDADD) $(LIBS)
+pth_broadcast$(EXEEXT): $(pth_broadcast_OBJECTS) $(pth_broadcast_DEPENDENCIES)
+ @rm -f pth_broadcast$(EXEEXT)
+ $(LINK) $(pth_broadcast_OBJECTS) $(pth_broadcast_LDADD) $(LIBS)
+pth_cancel_locked$(EXEEXT): $(pth_cancel_locked_OBJECTS) $(pth_cancel_locked_DEPENDENCIES)
+ @rm -f pth_cancel_locked$(EXEEXT)
+ $(LINK) $(pth_cancel_locked_OBJECTS) $(pth_cancel_locked_LDADD) $(LIBS)
+pth_cleanup_handler$(EXEEXT): $(pth_cleanup_handler_OBJECTS) $(pth_cleanup_handler_DEPENDENCIES)
+ @rm -f pth_cleanup_handler$(EXEEXT)
+ $(pth_cleanup_handler_LINK) $(pth_cleanup_handler_OBJECTS) $(pth_cleanup_handler_LDADD) $(LIBS)
+pth_cond_race$(EXEEXT): $(pth_cond_race_OBJECTS) $(pth_cond_race_DEPENDENCIES)
+ @rm -f pth_cond_race$(EXEEXT)
+ $(LINK) $(pth_cond_race_OBJECTS) $(pth_cond_race_LDADD) $(LIBS)
+pth_create_chain$(EXEEXT): $(pth_create_chain_OBJECTS) $(pth_create_chain_DEPENDENCIES)
+ @rm -f pth_create_chain$(EXEEXT)
+ $(LINK) $(pth_create_chain_OBJECTS) $(pth_create_chain_LDADD) $(LIBS)
+pth_create_glibc_2_0$(EXEEXT): $(pth_create_glibc_2_0_OBJECTS) $(pth_create_glibc_2_0_DEPENDENCIES)
+ @rm -f pth_create_glibc_2_0$(EXEEXT)
+ $(LINK) $(pth_create_glibc_2_0_OBJECTS) $(pth_create_glibc_2_0_LDADD) $(LIBS)
+pth_detached$(EXEEXT): $(pth_detached_OBJECTS) $(pth_detached_DEPENDENCIES)
+ @rm -f pth_detached$(EXEEXT)
+ $(LINK) $(pth_detached_OBJECTS) $(pth_detached_LDADD) $(LIBS)
+pth_detached_sem$(EXEEXT): $(pth_detached_sem_OBJECTS) $(pth_detached_sem_DEPENDENCIES)
+ @rm -f pth_detached_sem$(EXEEXT)
+ $(LINK) $(pth_detached_sem_OBJECTS) $(pth_detached_sem_LDADD) $(LIBS)
+pth_inconsistent_cond_wait$(EXEEXT): $(pth_inconsistent_cond_wait_OBJECTS) $(pth_inconsistent_cond_wait_DEPENDENCIES)
+ @rm -f pth_inconsistent_cond_wait$(EXEEXT)
+ $(LINK) $(pth_inconsistent_cond_wait_OBJECTS) $(pth_inconsistent_cond_wait_LDADD) $(LIBS)
+pth_mutex_reinit$(EXEEXT): $(pth_mutex_reinit_OBJECTS) $(pth_mutex_reinit_DEPENDENCIES)
+ @rm -f pth_mutex_reinit$(EXEEXT)
+ $(LINK) $(pth_mutex_reinit_OBJECTS) $(pth_mutex_reinit_LDADD) $(LIBS)
+pth_process_shared_mutex$(EXEEXT): $(pth_process_shared_mutex_OBJECTS) $(pth_process_shared_mutex_DEPENDENCIES)
+ @rm -f pth_process_shared_mutex$(EXEEXT)
+ $(LINK) $(pth_process_shared_mutex_OBJECTS) $(pth_process_shared_mutex_LDADD) $(LIBS)
+pth_spinlock$(EXEEXT): $(pth_spinlock_OBJECTS) $(pth_spinlock_DEPENDENCIES)
+ @rm -f pth_spinlock$(EXEEXT)
+ $(LINK) $(pth_spinlock_OBJECTS) $(pth_spinlock_LDADD) $(LIBS)
+pth_uninitialized_cond$(EXEEXT): $(pth_uninitialized_cond_OBJECTS) $(pth_uninitialized_cond_DEPENDENCIES)
+ @rm -f pth_uninitialized_cond$(EXEEXT)
+ $(LINK) $(pth_uninitialized_cond_OBJECTS) $(pth_uninitialized_cond_LDADD) $(LIBS)
+qt4_atomic$(EXEEXT): $(qt4_atomic_OBJECTS) $(qt4_atomic_DEPENDENCIES)
+ @rm -f qt4_atomic$(EXEEXT)
+ $(qt4_atomic_LINK) $(qt4_atomic_OBJECTS) $(qt4_atomic_LDADD) $(LIBS)
+qt4_mutex$(EXEEXT): $(qt4_mutex_OBJECTS) $(qt4_mutex_DEPENDENCIES)
+ @rm -f qt4_mutex$(EXEEXT)
+ $(qt4_mutex_LINK) $(qt4_mutex_OBJECTS) $(qt4_mutex_LDADD) $(LIBS)
+qt4_rwlock$(EXEEXT): $(qt4_rwlock_OBJECTS) $(qt4_rwlock_DEPENDENCIES)
+ @rm -f qt4_rwlock$(EXEEXT)
+ $(qt4_rwlock_LINK) $(qt4_rwlock_OBJECTS) $(qt4_rwlock_LDADD) $(LIBS)
+qt4_semaphore$(EXEEXT): $(qt4_semaphore_OBJECTS) $(qt4_semaphore_DEPENDENCIES)
+ @rm -f qt4_semaphore$(EXEEXT)
+ $(qt4_semaphore_LINK) $(qt4_semaphore_OBJECTS) $(qt4_semaphore_LDADD) $(LIBS)
+read_after_free$(EXEEXT): $(read_after_free_OBJECTS) $(read_after_free_DEPENDENCIES)
+ @rm -f read_after_free$(EXEEXT)
+ $(LINK) $(read_after_free_OBJECTS) $(read_after_free_LDADD) $(LIBS)
+recursive_mutex$(EXEEXT): $(recursive_mutex_OBJECTS) $(recursive_mutex_DEPENDENCIES)
+ @rm -f recursive_mutex$(EXEEXT)
+ $(LINK) $(recursive_mutex_OBJECTS) $(recursive_mutex_LDADD) $(LIBS)
+rwlock_race$(EXEEXT): $(rwlock_race_OBJECTS) $(rwlock_race_DEPENDENCIES)
+ @rm -f rwlock_race$(EXEEXT)
+ $(LINK) $(rwlock_race_OBJECTS) $(rwlock_race_LDADD) $(LIBS)
+rwlock_test$(EXEEXT): $(rwlock_test_OBJECTS) $(rwlock_test_DEPENDENCIES)
+ @rm -f rwlock_test$(EXEEXT)
+ $(LINK) $(rwlock_test_OBJECTS) $(rwlock_test_LDADD) $(LIBS)
+rwlock_type_checking$(EXEEXT): $(rwlock_type_checking_OBJECTS) $(rwlock_type_checking_DEPENDENCIES)
+ @rm -f rwlock_type_checking$(EXEEXT)
+ $(LINK) $(rwlock_type_checking_OBJECTS) $(rwlock_type_checking_LDADD) $(LIBS)
+sem_as_mutex$(EXEEXT): $(sem_as_mutex_OBJECTS) $(sem_as_mutex_DEPENDENCIES)
+ @rm -f sem_as_mutex$(EXEEXT)
+ $(LINK) $(sem_as_mutex_OBJECTS) $(sem_as_mutex_LDADD) $(LIBS)
+sem_open$(EXEEXT): $(sem_open_OBJECTS) $(sem_open_DEPENDENCIES)
+ @rm -f sem_open$(EXEEXT)
+ $(LINK) $(sem_open_OBJECTS) $(sem_open_LDADD) $(LIBS)
+sigalrm$(EXEEXT): $(sigalrm_OBJECTS) $(sigalrm_DEPENDENCIES)
+ @rm -f sigalrm$(EXEEXT)
+ $(LINK) $(sigalrm_OBJECTS) $(sigalrm_LDADD) $(LIBS)
+thread_name$(EXEEXT): $(thread_name_OBJECTS) $(thread_name_DEPENDENCIES)
+ @rm -f thread_name$(EXEEXT)
+ $(LINK) $(thread_name_OBJECTS) $(thread_name_LDADD) $(LIBS)
+trylock$(EXEEXT): $(trylock_OBJECTS) $(trylock_DEPENDENCIES)
+ @rm -f trylock$(EXEEXT)
+ $(LINK) $(trylock_OBJECTS) $(trylock_LDADD) $(LIBS)
+tsan_unittest$(EXEEXT): $(tsan_unittest_OBJECTS) $(tsan_unittest_DEPENDENCIES)
+ @rm -f tsan_unittest$(EXEEXT)
+ $(tsan_unittest_LINK) $(tsan_unittest_OBJECTS) $(tsan_unittest_LDADD) $(LIBS)
+unit_bitmap$(EXEEXT): $(unit_bitmap_OBJECTS) $(unit_bitmap_DEPENDENCIES)
+ @rm -f unit_bitmap$(EXEEXT)
+ $(unit_bitmap_LINK) $(unit_bitmap_OBJECTS) $(unit_bitmap_LDADD) $(LIBS)
+unit_vc$(EXEEXT): $(unit_vc_OBJECTS) $(unit_vc_DEPENDENCIES)
+ @rm -f unit_vc$(EXEEXT)
+ $(unit_vc_LINK) $(unit_vc_OBJECTS) $(unit_vc_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+include ./$(DEPDIR)/annotate_barrier.Po
+include ./$(DEPDIR)/annotate_hb_err.Po
+include ./$(DEPDIR)/annotate_hb_race.Po
+include ./$(DEPDIR)/annotate_ignore_rw.Po
+include ./$(DEPDIR)/annotate_ignore_write.Po
+include ./$(DEPDIR)/annotate_publish_hg.Po
+include ./$(DEPDIR)/annotate_rwlock.Po
+include ./$(DEPDIR)/annotate_smart_pointer.Po
+include ./$(DEPDIR)/annotate_static.Po
+include ./$(DEPDIR)/atomic_var.Po
+include ./$(DEPDIR)/boost_thread-boost_thread.Po
+include ./$(DEPDIR)/bug-235681.Po
+include ./$(DEPDIR)/circular_buffer.Po
+include ./$(DEPDIR)/custom_alloc.Po
+include ./$(DEPDIR)/fp_race.Po
+include ./$(DEPDIR)/hold_lock.Po
+include ./$(DEPDIR)/linuxthreads_det.Po
+include ./$(DEPDIR)/matinv.Po
+include ./$(DEPDIR)/memory_allocation.Po
+include ./$(DEPDIR)/monitor_example.Po
+include ./$(DEPDIR)/new_delete.Po
+include ./$(DEPDIR)/omp_matinv-omp_matinv.Po
+include ./$(DEPDIR)/omp_prime-omp_prime.Po
+include ./$(DEPDIR)/omp_printf-omp_printf.Po
+include ./$(DEPDIR)/pth_barrier.Po
+include ./$(DEPDIR)/pth_barrier_race.Po
+include ./$(DEPDIR)/pth_barrier_reinit.Po
+include ./$(DEPDIR)/pth_broadcast.Po
+include ./$(DEPDIR)/pth_cancel_locked.Po
+include ./$(DEPDIR)/pth_cleanup_handler-pth_cleanup_handler.Po
+include ./$(DEPDIR)/pth_cond_race.Po
+include ./$(DEPDIR)/pth_create_chain.Po
+include ./$(DEPDIR)/pth_create_glibc_2_0.Po
+include ./$(DEPDIR)/pth_detached.Po
+include ./$(DEPDIR)/pth_detached_sem.Po
+include ./$(DEPDIR)/pth_inconsistent_cond_wait.Po
+include ./$(DEPDIR)/pth_mutex_reinit.Po
+include ./$(DEPDIR)/pth_process_shared_mutex.Po
+include ./$(DEPDIR)/pth_spinlock.Po
+include ./$(DEPDIR)/pth_uninitialized_cond.Po
+include ./$(DEPDIR)/qt4_atomic-qt4_atomic.Po
+include ./$(DEPDIR)/qt4_mutex-qt4_mutex.Po
+include ./$(DEPDIR)/qt4_rwlock-qt4_rwlock.Po
+include ./$(DEPDIR)/qt4_semaphore-qt4_semaphore.Po
+include ./$(DEPDIR)/read_after_free.Po
+include ./$(DEPDIR)/recursive_mutex.Po
+include ./$(DEPDIR)/rwlock_race.Po
+include ./$(DEPDIR)/rwlock_test.Po
+include ./$(DEPDIR)/rwlock_type_checking.Po
+include ./$(DEPDIR)/sem_as_mutex.Po
+include ./$(DEPDIR)/sem_open.Po
+include ./$(DEPDIR)/sigalrm.Po
+include ./$(DEPDIR)/thread_name.Po
+include ./$(DEPDIR)/trylock.Po
+include ./$(DEPDIR)/tsan_unittest-tsan_unittest.Po
+include ./$(DEPDIR)/unit_bitmap-unit_bitmap.Po
+include ./$(DEPDIR)/unit_vc-unit_vc.Po
+
+.c.o:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c $<
+
+.c.obj:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
+omp_matinv-omp_matinv.o: omp_matinv.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(omp_matinv_CFLAGS) $(CFLAGS) -MT omp_matinv-omp_matinv.o -MD -MP -MF $(DEPDIR)/omp_matinv-omp_matinv.Tpo -c -o omp_matinv-omp_matinv.o `test -f 'omp_matinv.c' || echo '$(srcdir)/'`omp_matinv.c
+ mv -f $(DEPDIR)/omp_matinv-omp_matinv.Tpo $(DEPDIR)/omp_matinv-omp_matinv.Po
+# source='omp_matinv.c' object='omp_matinv-omp_matinv.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(omp_matinv_CFLAGS) $(CFLAGS) -c -o omp_matinv-omp_matinv.o `test -f 'omp_matinv.c' || echo '$(srcdir)/'`omp_matinv.c
+
+omp_matinv-omp_matinv.obj: omp_matinv.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(omp_matinv_CFLAGS) $(CFLAGS) -MT omp_matinv-omp_matinv.obj -MD -MP -MF $(DEPDIR)/omp_matinv-omp_matinv.Tpo -c -o omp_matinv-omp_matinv.obj `if test -f 'omp_matinv.c'; then $(CYGPATH_W) 'omp_matinv.c'; else $(CYGPATH_W) '$(srcdir)/omp_matinv.c'; fi`
+ mv -f $(DEPDIR)/omp_matinv-omp_matinv.Tpo $(DEPDIR)/omp_matinv-omp_matinv.Po
+# source='omp_matinv.c' object='omp_matinv-omp_matinv.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(omp_matinv_CFLAGS) $(CFLAGS) -c -o omp_matinv-omp_matinv.obj `if test -f 'omp_matinv.c'; then $(CYGPATH_W) 'omp_matinv.c'; else $(CYGPATH_W) '$(srcdir)/omp_matinv.c'; fi`
+
+omp_prime-omp_prime.o: omp_prime.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(omp_prime_CFLAGS) $(CFLAGS) -MT omp_prime-omp_prime.o -MD -MP -MF $(DEPDIR)/omp_prime-omp_prime.Tpo -c -o omp_prime-omp_prime.o `test -f 'omp_prime.c' || echo '$(srcdir)/'`omp_prime.c
+ mv -f $(DEPDIR)/omp_prime-omp_prime.Tpo $(DEPDIR)/omp_prime-omp_prime.Po
+# source='omp_prime.c' object='omp_prime-omp_prime.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(omp_prime_CFLAGS) $(CFLAGS) -c -o omp_prime-omp_prime.o `test -f 'omp_prime.c' || echo '$(srcdir)/'`omp_prime.c
+
+omp_prime-omp_prime.obj: omp_prime.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(omp_prime_CFLAGS) $(CFLAGS) -MT omp_prime-omp_prime.obj -MD -MP -MF $(DEPDIR)/omp_prime-omp_prime.Tpo -c -o omp_prime-omp_prime.obj `if test -f 'omp_prime.c'; then $(CYGPATH_W) 'omp_prime.c'; else $(CYGPATH_W) '$(srcdir)/omp_prime.c'; fi`
+ mv -f $(DEPDIR)/omp_prime-omp_prime.Tpo $(DEPDIR)/omp_prime-omp_prime.Po
+# source='omp_prime.c' object='omp_prime-omp_prime.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(omp_prime_CFLAGS) $(CFLAGS) -c -o omp_prime-omp_prime.obj `if test -f 'omp_prime.c'; then $(CYGPATH_W) 'omp_prime.c'; else $(CYGPATH_W) '$(srcdir)/omp_prime.c'; fi`
+
+omp_printf-omp_printf.o: omp_printf.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(omp_printf_CFLAGS) $(CFLAGS) -MT omp_printf-omp_printf.o -MD -MP -MF $(DEPDIR)/omp_printf-omp_printf.Tpo -c -o omp_printf-omp_printf.o `test -f 'omp_printf.c' || echo '$(srcdir)/'`omp_printf.c
+ mv -f $(DEPDIR)/omp_printf-omp_printf.Tpo $(DEPDIR)/omp_printf-omp_printf.Po
+# source='omp_printf.c' object='omp_printf-omp_printf.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(omp_printf_CFLAGS) $(CFLAGS) -c -o omp_printf-omp_printf.o `test -f 'omp_printf.c' || echo '$(srcdir)/'`omp_printf.c
+
+omp_printf-omp_printf.obj: omp_printf.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(omp_printf_CFLAGS) $(CFLAGS) -MT omp_printf-omp_printf.obj -MD -MP -MF $(DEPDIR)/omp_printf-omp_printf.Tpo -c -o omp_printf-omp_printf.obj `if test -f 'omp_printf.c'; then $(CYGPATH_W) 'omp_printf.c'; else $(CYGPATH_W) '$(srcdir)/omp_printf.c'; fi`
+ mv -f $(DEPDIR)/omp_printf-omp_printf.Tpo $(DEPDIR)/omp_printf-omp_printf.Po
+# source='omp_printf.c' object='omp_printf-omp_printf.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(omp_printf_CFLAGS) $(CFLAGS) -c -o omp_printf-omp_printf.obj `if test -f 'omp_printf.c'; then $(CYGPATH_W) 'omp_printf.c'; else $(CYGPATH_W) '$(srcdir)/omp_printf.c'; fi`
+
+pth_cleanup_handler-pth_cleanup_handler.o: pth_cleanup_handler.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(pth_cleanup_handler_CFLAGS) $(CFLAGS) -MT pth_cleanup_handler-pth_cleanup_handler.o -MD -MP -MF $(DEPDIR)/pth_cleanup_handler-pth_cleanup_handler.Tpo -c -o pth_cleanup_handler-pth_cleanup_handler.o `test -f 'pth_cleanup_handler.c' || echo '$(srcdir)/'`pth_cleanup_handler.c
+ mv -f $(DEPDIR)/pth_cleanup_handler-pth_cleanup_handler.Tpo $(DEPDIR)/pth_cleanup_handler-pth_cleanup_handler.Po
+# source='pth_cleanup_handler.c' object='pth_cleanup_handler-pth_cleanup_handler.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(pth_cleanup_handler_CFLAGS) $(CFLAGS) -c -o pth_cleanup_handler-pth_cleanup_handler.o `test -f 'pth_cleanup_handler.c' || echo '$(srcdir)/'`pth_cleanup_handler.c
+
+pth_cleanup_handler-pth_cleanup_handler.obj: pth_cleanup_handler.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(pth_cleanup_handler_CFLAGS) $(CFLAGS) -MT pth_cleanup_handler-pth_cleanup_handler.obj -MD -MP -MF $(DEPDIR)/pth_cleanup_handler-pth_cleanup_handler.Tpo -c -o pth_cleanup_handler-pth_cleanup_handler.obj `if test -f 'pth_cleanup_handler.c'; then $(CYGPATH_W) 'pth_cleanup_handler.c'; else $(CYGPATH_W) '$(srcdir)/pth_cleanup_handler.c'; fi`
+ mv -f $(DEPDIR)/pth_cleanup_handler-pth_cleanup_handler.Tpo $(DEPDIR)/pth_cleanup_handler-pth_cleanup_handler.Po
+# source='pth_cleanup_handler.c' object='pth_cleanup_handler-pth_cleanup_handler.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(pth_cleanup_handler_CFLAGS) $(CFLAGS) -c -o pth_cleanup_handler-pth_cleanup_handler.obj `if test -f 'pth_cleanup_handler.c'; then $(CYGPATH_W) 'pth_cleanup_handler.c'; else $(CYGPATH_W) '$(srcdir)/pth_cleanup_handler.c'; fi`
+
+unit_bitmap-unit_bitmap.o: unit_bitmap.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(unit_bitmap_CFLAGS) $(CFLAGS) -MT unit_bitmap-unit_bitmap.o -MD -MP -MF $(DEPDIR)/unit_bitmap-unit_bitmap.Tpo -c -o unit_bitmap-unit_bitmap.o `test -f 'unit_bitmap.c' || echo '$(srcdir)/'`unit_bitmap.c
+ mv -f $(DEPDIR)/unit_bitmap-unit_bitmap.Tpo $(DEPDIR)/unit_bitmap-unit_bitmap.Po
+# source='unit_bitmap.c' object='unit_bitmap-unit_bitmap.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(unit_bitmap_CFLAGS) $(CFLAGS) -c -o unit_bitmap-unit_bitmap.o `test -f 'unit_bitmap.c' || echo '$(srcdir)/'`unit_bitmap.c
+
+unit_bitmap-unit_bitmap.obj: unit_bitmap.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(unit_bitmap_CFLAGS) $(CFLAGS) -MT unit_bitmap-unit_bitmap.obj -MD -MP -MF $(DEPDIR)/unit_bitmap-unit_bitmap.Tpo -c -o unit_bitmap-unit_bitmap.obj `if test -f 'unit_bitmap.c'; then $(CYGPATH_W) 'unit_bitmap.c'; else $(CYGPATH_W) '$(srcdir)/unit_bitmap.c'; fi`
+ mv -f $(DEPDIR)/unit_bitmap-unit_bitmap.Tpo $(DEPDIR)/unit_bitmap-unit_bitmap.Po
+# source='unit_bitmap.c' object='unit_bitmap-unit_bitmap.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(unit_bitmap_CFLAGS) $(CFLAGS) -c -o unit_bitmap-unit_bitmap.obj `if test -f 'unit_bitmap.c'; then $(CYGPATH_W) 'unit_bitmap.c'; else $(CYGPATH_W) '$(srcdir)/unit_bitmap.c'; fi`
+
+unit_vc-unit_vc.o: unit_vc.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(unit_vc_CFLAGS) $(CFLAGS) -MT unit_vc-unit_vc.o -MD -MP -MF $(DEPDIR)/unit_vc-unit_vc.Tpo -c -o unit_vc-unit_vc.o `test -f 'unit_vc.c' || echo '$(srcdir)/'`unit_vc.c
+ mv -f $(DEPDIR)/unit_vc-unit_vc.Tpo $(DEPDIR)/unit_vc-unit_vc.Po
+# source='unit_vc.c' object='unit_vc-unit_vc.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(unit_vc_CFLAGS) $(CFLAGS) -c -o unit_vc-unit_vc.o `test -f 'unit_vc.c' || echo '$(srcdir)/'`unit_vc.c
+
+unit_vc-unit_vc.obj: unit_vc.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(unit_vc_CFLAGS) $(CFLAGS) -MT unit_vc-unit_vc.obj -MD -MP -MF $(DEPDIR)/unit_vc-unit_vc.Tpo -c -o unit_vc-unit_vc.obj `if test -f 'unit_vc.c'; then $(CYGPATH_W) 'unit_vc.c'; else $(CYGPATH_W) '$(srcdir)/unit_vc.c'; fi`
+ mv -f $(DEPDIR)/unit_vc-unit_vc.Tpo $(DEPDIR)/unit_vc-unit_vc.Po
+# source='unit_vc.c' object='unit_vc-unit_vc.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(unit_vc_CFLAGS) $(CFLAGS) -c -o unit_vc-unit_vc.obj `if test -f 'unit_vc.c'; then $(CYGPATH_W) 'unit_vc.c'; else $(CYGPATH_W) '$(srcdir)/unit_vc.c'; fi`
+
+.cpp.o:
+ $(CXXCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) \
+# $(CXXCOMPILE) -c -o $@ $<
+
+.cpp.obj:
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+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) \
+# $(CXXCOMPILE) -c -o $@ `$(CYGPATH_W) '$<'`
+
+boost_thread-boost_thread.o: boost_thread.cpp
+ $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(boost_thread_CXXFLAGS) $(CXXFLAGS) -MT boost_thread-boost_thread.o -MD -MP -MF $(DEPDIR)/boost_thread-boost_thread.Tpo -c -o boost_thread-boost_thread.o `test -f 'boost_thread.cpp' || echo '$(srcdir)/'`boost_thread.cpp
+ mv -f $(DEPDIR)/boost_thread-boost_thread.Tpo $(DEPDIR)/boost_thread-boost_thread.Po
+# source='boost_thread.cpp' object='boost_thread-boost_thread.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) \
+# $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(boost_thread_CXXFLAGS) $(CXXFLAGS) -c -o boost_thread-boost_thread.o `test -f 'boost_thread.cpp' || echo '$(srcdir)/'`boost_thread.cpp
+
+boost_thread-boost_thread.obj: boost_thread.cpp
+ $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(boost_thread_CXXFLAGS) $(CXXFLAGS) -MT boost_thread-boost_thread.obj -MD -MP -MF $(DEPDIR)/boost_thread-boost_thread.Tpo -c -o boost_thread-boost_thread.obj `if test -f 'boost_thread.cpp'; then $(CYGPATH_W) 'boost_thread.cpp'; else $(CYGPATH_W) '$(srcdir)/boost_thread.cpp'; fi`
+ mv -f $(DEPDIR)/boost_thread-boost_thread.Tpo $(DEPDIR)/boost_thread-boost_thread.Po
+# source='boost_thread.cpp' object='boost_thread-boost_thread.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) \
+# $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(boost_thread_CXXFLAGS) $(CXXFLAGS) -c -o boost_thread-boost_thread.obj `if test -f 'boost_thread.cpp'; then $(CYGPATH_W) 'boost_thread.cpp'; else $(CYGPATH_W) '$(srcdir)/boost_thread.cpp'; fi`
+
+qt4_atomic-qt4_atomic.o: qt4_atomic.cpp
+ $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(qt4_atomic_CXXFLAGS) $(CXXFLAGS) -MT qt4_atomic-qt4_atomic.o -MD -MP -MF $(DEPDIR)/qt4_atomic-qt4_atomic.Tpo -c -o qt4_atomic-qt4_atomic.o `test -f 'qt4_atomic.cpp' || echo '$(srcdir)/'`qt4_atomic.cpp
+ mv -f $(DEPDIR)/qt4_atomic-qt4_atomic.Tpo $(DEPDIR)/qt4_atomic-qt4_atomic.Po
+# source='qt4_atomic.cpp' object='qt4_atomic-qt4_atomic.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) \
+# $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(qt4_atomic_CXXFLAGS) $(CXXFLAGS) -c -o qt4_atomic-qt4_atomic.o `test -f 'qt4_atomic.cpp' || echo '$(srcdir)/'`qt4_atomic.cpp
+
+qt4_atomic-qt4_atomic.obj: qt4_atomic.cpp
+ $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(qt4_atomic_CXXFLAGS) $(CXXFLAGS) -MT qt4_atomic-qt4_atomic.obj -MD -MP -MF $(DEPDIR)/qt4_atomic-qt4_atomic.Tpo -c -o qt4_atomic-qt4_atomic.obj `if test -f 'qt4_atomic.cpp'; then $(CYGPATH_W) 'qt4_atomic.cpp'; else $(CYGPATH_W) '$(srcdir)/qt4_atomic.cpp'; fi`
+ mv -f $(DEPDIR)/qt4_atomic-qt4_atomic.Tpo $(DEPDIR)/qt4_atomic-qt4_atomic.Po
+# source='qt4_atomic.cpp' object='qt4_atomic-qt4_atomic.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) \
+# $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(qt4_atomic_CXXFLAGS) $(CXXFLAGS) -c -o qt4_atomic-qt4_atomic.obj `if test -f 'qt4_atomic.cpp'; then $(CYGPATH_W) 'qt4_atomic.cpp'; else $(CYGPATH_W) '$(srcdir)/qt4_atomic.cpp'; fi`
+
+qt4_mutex-qt4_mutex.o: qt4_mutex.cpp
+ $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(qt4_mutex_CXXFLAGS) $(CXXFLAGS) -MT qt4_mutex-qt4_mutex.o -MD -MP -MF $(DEPDIR)/qt4_mutex-qt4_mutex.Tpo -c -o qt4_mutex-qt4_mutex.o `test -f 'qt4_mutex.cpp' || echo '$(srcdir)/'`qt4_mutex.cpp
+ mv -f $(DEPDIR)/qt4_mutex-qt4_mutex.Tpo $(DEPDIR)/qt4_mutex-qt4_mutex.Po
+# source='qt4_mutex.cpp' object='qt4_mutex-qt4_mutex.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) \
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+ mv -f $(DEPDIR)/qt4_rwlock-qt4_rwlock.Tpo $(DEPDIR)/qt4_rwlock-qt4_rwlock.Po
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+tsan_unittest-tsan_unittest.obj: tsan_unittest.cpp
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+VERSION = @VERSION@
+VGCONF_ARCH_PRI = @VGCONF_ARCH_PRI@
+VGCONF_ARCH_SEC = @VGCONF_ARCH_SEC@
+VGCONF_OS = @VGCONF_OS@
+VGCONF_PLATFORM_PRI_CAPS = @VGCONF_PLATFORM_PRI_CAPS@
+VGCONF_PLATFORM_SEC_CAPS = @VGCONF_PLATFORM_SEC_CAPS@
+abs_builddir = @abs_builddir@
+abs_srcdir = @abs_srcdir@
+abs_top_builddir = @abs_top_builddir@
+abs_top_srcdir = @abs_top_srcdir@
+ac_ct_CC = @ac_ct_CC@
+ac_ct_CXX = @ac_ct_CXX@
+am__include = @am__include@
+am__leading_dot = @am__leading_dot@
+am__quote = @am__quote@
+am__tar = @am__tar@
+am__untar = @am__untar@
+bindir = @bindir@
+build = @build@
+build_alias = @build_alias@
+build_cpu = @build_cpu@
+build_os = @build_os@
+build_vendor = @build_vendor@
+builddir = @builddir@
+datadir = @datadir@
+datarootdir = @datarootdir@
+docdir = @docdir@
+dvidir = @dvidir@
+exec_prefix = @exec_prefix@
+host = @host@
+host_alias = @host_alias@
+host_cpu = @host_cpu@
+host_os = @host_os@
+host_vendor = @host_vendor@
+htmldir = @htmldir@
+includedir = @includedir@
+infodir = @infodir@
+install_sh = @install_sh@
+libdir = @libdir@
+libexecdir = @libexecdir@
+localedir = @localedir@
+localstatedir = @localstatedir@
+mandir = @mandir@
+mkdir_p = @mkdir_p@
+oldincludedir = @oldincludedir@
+pdfdir = @pdfdir@
+prefix = @prefix@
+program_transform_name = @program_transform_name@
+psdir = @psdir@
+sbindir = @sbindir@
+sharedstatedir = @sharedstatedir@
+srcdir = @srcdir@
+sysconfdir = @sysconfdir@
+target_alias = @target_alias@
+top_builddir = @top_builddir@
+top_srcdir = @top_srcdir@
+inplacedir = $(top_builddir)/.in_place
+
+#----------------------------------------------------------------------------
+# Flags
+#----------------------------------------------------------------------------
+
+# Baseline flags for all compilations. Aim here is to maximise
+# performance and get whatever useful warnings we can out of gcc.
+AM_CFLAGS_BASE = \
+ -O2 -g \
+ -Wall \
+ -Wmissing-prototypes \
+ -Wshadow \
+ -Wpointer-arith \
+ -Wstrict-prototypes \
+ -Wmissing-declarations \
+ @FLAG_W_NO_FORMAT_ZERO_LENGTH@ \
+ -fno-strict-aliasing
+
+@VGCONF_OS_IS_DARWIN_FALSE@AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+@VGCONF_OS_IS_DARWIN_TRUE@AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+@VGCONF_OS_IS_DARWIN_TRUE@ -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
+# and so the CPPFLAGS are passed to the assembler. But this is not true for
+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
+# AM_CPPFLAGS_<PLATFORM> in each AM_CCASFLAGS_<PLATFORM> variable. This
+# means some of the flags are duplicated on systems with newer versions of
+# automake, but this does not really matter and seems hard to avoid.
+AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@ = \
+ -I$(top_srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_@VGCONF_ARCH_PRI@=1 \
+ -DVGO_@VGCONF_OS@=1 \
+ -DVGP_@VGCONF_ARCH_PRI@_@VGCONF_OS@=1
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@AM_CPPFLAGS_@VGCONF_PLATFORM_SEC_CAPS@ = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir) \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir)/include \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir)/VEX/pub \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGA_@VGCONF_ARCH_SEC@=1 \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGO_@VGCONF_OS@=1 \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGP_@VGCONF_ARCH_SEC@_@VGCONF_OS@=1
+
+AM_FLAG_M3264_X86_LINUX = @FLAG_M32@
+AM_CFLAGS_X86_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_AMD64_LINUX = @FLAG_M64@
+AM_CFLAGS_AMD64_LINUX = @FLAG_M64@ -fomit-frame-pointer \
+ @PREFERRED_STACK_BOUNDARY@ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) @FLAG_M64@ -g
+AM_FLAG_M3264_PPC32_LINUX = @FLAG_M32@
+AM_CFLAGS_PPC32_LINUX = @FLAG_M32@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_LINUX = $(AM_CPPFLAGS_PPC32_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_PPC64_LINUX = @FLAG_M64@
+AM_CFLAGS_PPC64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_LINUX = $(AM_CPPFLAGS_PPC64_LINUX) @FLAG_M64@ -g
+AM_FLAG_M3264_ARM_LINUX = @FLAG_M32@
+AM_CFLAGS_ARM_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_PPC32_AIX5 = @FLAG_MAIX32@
+AM_CFLAGS_PPC32_AIX5 = @FLAG_MAIX32@ -mcpu=powerpc $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
+ @FLAG_MAIX32@ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 = @FLAG_MAIX64@
+AM_CFLAGS_PPC64_AIX5 = @FLAG_MAIX64@ -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ @FLAG_MAIX64@ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 \
+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CFLAGS_PRI = $(AM_CFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+@VGCONF_HAVE_PLATFORM_SEC_FALSE@AM_FLAG_M3264_SEC =
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_@VGCONF_PLATFORM_SEC_CAPS@)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX32@
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX64@
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
+# as $(AM_FLAG_M3264_PRI).
+AM_CFLAGS = -Winline -Wall -Wshadow -g $(AM_FLAG_M3264_PRI) \
+ @FLAG_W_EXTRA@ -Wno-inline -Wno-unused-parameter
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g $(AM_FLAG_M3264_PRI) \
+ @FLAG_W_EXTRA@ -Wno-inline -Wno-unused-parameter
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS)
+@VGCONF_OS_IS_DARWIN_TRUE@noinst_DSYMS = $(check_PROGRAMS)
+dist_noinst_SCRIPTS = \
+ compare_error_count_with \
+ filter_error_summary \
+ filter_stderr \
+ filter_stderr_and_thread_no \
+ run_openmp_test \
+ supported_libpthread \
+ supported_sem_init
+
+noinst_HEADERS = \
+ tsan_thread_wrappers_pthread.h \
+ unified_annotations.h
+
+EXTRA_DIST = \
+ annotate_barrier.stderr.exp \
+ annotate_barrier.vgtest \
+ annotate_hb_err.stderr.exp \
+ annotate_hb_err.vgtest \
+ annotate_hb_race.stderr.exp \
+ annotate_hb_race.vgtest \
+ annotate_hbefore.stderr.exp \
+ annotate_hbefore.vgtest \
+ annotate_order_1.stderr.exp \
+ annotate_order_1.vgtest \
+ annotate_order_2.stderr.exp \
+ annotate_order_2.vgtest \
+ annotate_order_3.stderr.exp \
+ annotate_order_3.vgtest \
+ annotate_publish_hg.stderr.exp \
+ annotate_publish_hg.vgtest \
+ annotate_smart_pointer.stderr.exp \
+ annotate_smart_pointer.vgtest \
+ annotate_spinlock.stderr.exp \
+ annotate_spinlock.vgtest \
+ annotate_rwlock.stderr.exp \
+ annotate_rwlock.vgtest \
+ annotate_rwlock_hg.stderr.exp \
+ annotate_rwlock_hg.vgtest \
+ annotate_ignore_read.stderr.exp \
+ annotate_ignore_read.vgtest \
+ annotate_ignore_rw.stderr.exp \
+ annotate_ignore_rw.vgtest \
+ annotate_ignore_rw2.stderr.exp \
+ annotate_ignore_rw2.vgtest \
+ annotate_ignore_write.stderr.exp \
+ annotate_ignore_write.vgtest \
+ annotate_ignore_write2.stderr.exp \
+ annotate_ignore_write2.vgtest \
+ annotate_trace_memory.stderr.exp \
+ annotate_trace_memory.vgtest \
+ annotate_static.stderr.exp \
+ annotate_static.vgtest \
+ atomic_var.stderr.exp \
+ atomic_var.vgtest \
+ bar_bad.stderr.exp \
+ bar_bad.vgtest \
+ bar_trivial.stderr.exp \
+ bar_trivial.stdout.exp \
+ bar_trivial.vgtest \
+ boost_thread.stderr.exp \
+ boost_thread.vgtest \
+ bug-235681.stderr.exp \
+ bug-235681.vgtest \
+ circular_buffer.stderr.exp \
+ circular_buffer.vgtest \
+ custom_alloc.stderr.exp \
+ custom_alloc.vgtest \
+ fp_race.stderr.exp \
+ fp_race.vgtest \
+ fp_race2.stderr.exp \
+ fp_race2.vgtest \
+ hg01_all_ok.stderr.exp \
+ hg01_all_ok.vgtest \
+ hg02_deadlock.stderr.exp \
+ hg02_deadlock.vgtest \
+ hg03_inherit.stderr.exp \
+ hg03_inherit.vgtest \
+ hg04_race.stderr.exp \
+ hg04_race.vgtest \
+ hg05_race2.stderr.exp \
+ hg05_race2.stderr.exp-powerpc \
+ hg05_race2.vgtest \
+ hg06_readshared.stderr.exp \
+ hg06_readshared.vgtest \
+ hold_lock_1.stderr.exp \
+ hold_lock_1.vgtest \
+ hold_lock_2.stderr.exp \
+ hold_lock_2.vgtest \
+ linuxthreads_det.stderr.exp \
+ linuxthreads_det.stderr.exp-linuxthreads \
+ linuxthreads_det.stdout.exp \
+ linuxthreads_det.stdout.exp-linuxthreads \
+ linuxthreads_det.vgtest \
+ matinv.stderr.exp \
+ matinv.stdout.exp \
+ matinv.vgtest \
+ memory_allocation.stderr.exp \
+ memory_allocation.vgtest \
+ monitor_example.stderr.exp \
+ monitor_example.vgtest \
+ new_delete.stderr.exp \
+ new_delete.vgtest \
+ omp_matinv.stderr.exp \
+ omp_matinv.stdout.exp \
+ omp_matinv.vgtest \
+ omp_matinv_racy.stderr.exp \
+ omp_matinv_racy.stdout.exp \
+ omp_matinv_racy.vgtest \
+ omp_prime_racy.stderr.exp \
+ omp_prime_racy.vgtest \
+ omp_printf.stderr.exp \
+ omp_printf.vgtest \
+ pth_barrier.stderr.exp \
+ pth_barrier.vgtest \
+ pth_barrier2.stderr.exp \
+ pth_barrier2.vgtest \
+ pth_barrier3.stderr.exp \
+ pth_barrier3.vgtest \
+ pth_barrier_race.stderr.exp \
+ pth_barrier_race.vgtest \
+ pth_barrier_reinit.stderr.exp \
+ pth_barrier_reinit.vgtest \
+ pth_broadcast.stderr.exp \
+ pth_broadcast.vgtest \
+ pth_cancel_locked.stderr.exp \
+ pth_cancel_locked.stderr.exp-darwin \
+ pth_cancel_locked.vgtest \
+ pth_cleanup_handler.stderr.exp \
+ pth_cleanup_handler.vgtest \
+ pth_cond_race.stderr.exp \
+ pth_cond_race.vgtest \
+ pth_cond_race2.stderr.exp \
+ pth_cond_race2.vgtest \
+ pth_cond_race3.stderr.exp \
+ pth_cond_race3.vgtest \
+ pth_create_chain.stderr.exp \
+ pth_create_chain.vgtest \
+ pth_create_glibc_2_0.stderr.exp \
+ pth_create_glibc_2_0.vgtest \
+ pth_detached.stderr.exp \
+ pth_detached.stdout.exp \
+ pth_detached.vgtest \
+ pth_detached2.stderr.exp \
+ pth_detached2.stdout.exp \
+ pth_detached2.vgtest \
+ pth_detached_sem.stderr.exp \
+ pth_detached_sem.stdout.exp \
+ pth_detached_sem.vgtest \
+ pth_inconsistent_cond_wait.stderr.exp1 \
+ pth_inconsistent_cond_wait.stderr.exp2 \
+ pth_inconsistent_cond_wait.vgtest \
+ pth_mutex_reinit.stderr.exp \
+ pth_mutex_reinit.vgtest \
+ pth_once.stderr.exp \
+ pth_once.vgtest \
+ pth_process_shared_mutex.stderr.exp \
+ pth_process_shared_mutex.vgtest \
+ pth_spinlock.stderr.exp \
+ pth_spinlock.vgtest \
+ pth_uninitialized_cond.stderr.exp \
+ pth_uninitialized_cond.vgtest \
+ qt4_atomic.stderr.exp \
+ qt4_atomic.vgtest \
+ qt4_mutex.stderr.exp \
+ qt4_mutex.vgtest \
+ qt4_rwlock.stderr.exp \
+ qt4_rwlock.vgtest \
+ qt4_semaphore.stderr.exp \
+ qt4_semaphore.vgtest \
+ read_after_free.stderr.exp \
+ read_after_free.vgtest \
+ recursive_mutex.stderr.exp-linux \
+ recursive_mutex.stderr.exp-darwin \
+ recursive_mutex.vgtest \
+ rwlock_race.stderr.exp \
+ rwlock_race.stderr.exp2 \
+ rwlock_race.vgtest \
+ rwlock_test.stderr.exp \
+ rwlock_test.vgtest \
+ rwlock_type_checking.stderr.exp \
+ rwlock_type_checking.vgtest \
+ sem_as_mutex.stderr.exp \
+ sem_as_mutex.vgtest \
+ sem_as_mutex2.stderr.exp \
+ sem_as_mutex2.vgtest \
+ sem_as_mutex3.stderr.exp \
+ sem_as_mutex3.vgtest \
+ sem_open.stderr.exp \
+ sem_open.vgtest \
+ sem_open2.stderr.exp \
+ sem_open2.vgtest \
+ sem_open3.stderr.exp \
+ sem_open3.vgtest \
+ sem_open_traced.stderr.exp \
+ sem_open_traced.vgtest \
+ sigalrm.stderr.exp \
+ sigalrm.vgtest \
+ sigaltstack.stderr.exp \
+ sigaltstack.vgtest \
+ tc01_simple_race.stderr.exp \
+ tc01_simple_race.vgtest \
+ tc02_simple_tls.stderr.exp \
+ tc02_simple_tls.vgtest \
+ tc03_re_excl.stderr.exp \
+ tc03_re_excl.vgtest \
+ tc04_free_lock.stderr.exp \
+ tc04_free_lock.vgtest \
+ tc05_simple_race.stderr.exp \
+ tc05_simple_race.vgtest \
+ tc06_two_races.stderr.exp \
+ tc06_two_races.vgtest \
+ tc07_hbl1.stderr.exp \
+ tc07_hbl1.stdout.exp \
+ tc07_hbl1.vgtest \
+ tc08_hbl2.stderr.exp \
+ tc08_hbl2.stdout.exp \
+ tc08_hbl2.vgtest \
+ tc09_bad_unlock.stderr.exp \
+ tc09_bad_unlock.stderr.exp-glibc2.8 \
+ tc09_bad_unlock.vgtest \
+ tc10_rec_lock.stderr.exp \
+ tc10_rec_lock.vgtest \
+ tc11_XCHG.stderr.exp tc11_XCHG.stdout.exp \
+ tc11_XCHG.vgtest \
+ tc12_rwl_trivial.stderr.exp \
+ tc12_rwl_trivial.vgtest \
+ tc13_laog1.stderr.exp \
+ tc13_laog1.vgtest \
+ tc15_laog_lockdel.stderr.exp \
+ tc15_laog_lockdel.vgtest \
+ tc16_byterace.stderr.exp \
+ tc16_byterace.vgtest \
+ tc17_sembar.stderr.exp \
+ tc17_sembar.vgtest \
+ tc18_semabuse.stderr.exp \
+ tc18_semabuse.vgtest \
+ tc19_shadowmem.stderr.exp-32bit \
+ tc19_shadowmem.stderr.exp-64bit \
+ tc19_shadowmem.vgtest \
+ tc21_pthonce.stderr.exp \
+ tc21_pthonce.stdout.exp \
+ tc21_pthonce.vgtest \
+ tc22_exit_w_lock.stderr.exp-32bit \
+ tc22_exit_w_lock.stderr.exp-64bit \
+ tc22_exit_w_lock.vgtest \
+ tc23_bogus_condwait.stderr.exp-linux-x86 \
+ tc23_bogus_condwait.stderr.exp-linux-ppc \
+ tc23_bogus_condwait.stderr.exp-darwin \
+ tc23_bogus_condwait.vgtest \
+ tc24_nonzero_sem.stderr.exp \
+ tc24_nonzero_sem.vgtest \
+ thread_name.stderr.exp \
+ thread_name.vgtest \
+ trylock.stderr.exp \
+ trylock.vgtest \
+ unit_bitmap.stderr.exp \
+ unit_bitmap.vgtest \
+ unit_vc.stderr.exp \
+ unit_vc.vgtest
+
+LDADD = -lpthread
+monitor_example_SOURCES = monitor_example.cpp
+new_delete_SOURCES = new_delete.cpp
+pth_cleanup_handler_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_EMPTY_BODY@
+tsan_unittest_SOURCES = tsan_unittest.cpp
+tsan_unittest_CXXFLAGS = $(AM_CXXFLAGS) \
+ -DTHREAD_WRAPPERS='"tsan_thread_wrappers_pthread.h"'
+
+unit_bitmap_CFLAGS = $(AM_CFLAGS) -O2 \
+ -DENABLE_DRD_CONSISTENCY_CHECKS \
+ @FLAG_UNLIMITED_INLINE_UNIT_GROWTH@
+
+unit_bitmap_LDADD = # nothing, i.e. not -lpthread
+unit_vc_CFLAGS = $(AM_CFLAGS) -DENABLE_DRD_CONSISTENCY_CHECKS
+unit_vc_LDADD = # nothing, i.e. not -lpthread
+@HAVE_BOOST_1_35_TRUE@boost_thread_SOURCES = boost_thread.cpp
+@HAVE_BOOST_1_35_TRUE@boost_thread_CXXFLAGS = $(AM_CXXFLAGS) $(BOOST_CFLAGS)
+@HAVE_BOOST_1_35_TRUE@boost_thread_LDADD = $(BOOST_LIBS)
+@HAVE_BUILTIN_ATOMIC_TRUE@annotate_smart_pointer_SOURCES = annotate_smart_pointer.cpp
+annotate_static_SOURCES = annotate_static.cpp
+@HAVE_OPENMP_TRUE@omp_matinv_CFLAGS = $(AM_CFLAGS) -fopenmp
+@HAVE_OPENMP_TRUE@omp_matinv_LDFLAGS = -fopenmp
+@HAVE_OPENMP_TRUE@omp_matinv_LDADD = $(LDADD) -lm
+@HAVE_OPENMP_TRUE@omp_prime_CFLAGS = $(AM_CFLAGS) -fopenmp
+@HAVE_OPENMP_TRUE@omp_prime_LDFLAGS = -fopenmp
+@HAVE_OPENMP_TRUE@omp_prime_LDADD = $(LDADD) -lm
+@HAVE_OPENMP_TRUE@omp_printf_CFLAGS = $(AM_CFLAGS) -fopenmp
+@HAVE_OPENMP_TRUE@omp_printf_LDFLAGS = -fopenmp
+@HAVE_OPENMP_TRUE@omp_printf_LDADD = $(LDADD) -lm
+@HAVE_PTHREAD_BARRIER_TRUE@matinv_LDADD = $(LDADD) -lm
+@HAVE_QTCORE_TRUE@qt4_mutex_SOURCES = qt4_mutex.cpp
+@HAVE_QTCORE_TRUE@qt4_mutex_CXXFLAGS = $(AM_CXXFLAGS) $(QTCORE_CFLAGS)
+@HAVE_QTCORE_TRUE@qt4_mutex_LDADD = $(LDADD) $(QTCORE_LIBS)
+@HAVE_QTCORE_TRUE@qt4_rwlock_SOURCES = qt4_rwlock.cpp
+@HAVE_QTCORE_TRUE@qt4_rwlock_CXXFLAGS = $(AM_CXXFLAGS) $(QTCORE_CFLAGS)
+@HAVE_QTCORE_TRUE@qt4_rwlock_LDADD = $(LDADD) $(QTCORE_LIBS)
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10
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svn://svn.valgrind.org/valgrind
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svn://svn.valgrind.org/valgrind
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svn://svn.valgrind.org/valgrind
/* ------------------------- x86-{linux,darwin} ---------------- */
-#if defined(PLAT_x86_linux) || defined(PLAT_x86_darwin) || defined(PLAT_x86_win32) && defined(__GNUC__)
+#if defined(PLAT_x86_linux) || defined(PLAT_x86_darwin) \
+ || (defined(PLAT_x86_win32) && defined(__GNUC__))
typedef
struct {
__SPECIAL_INSTRUCTION_PREAMBLE \
/* call-noredir *%EAX */ \
"xchgl %%edx,%%edx\n\t"
-#endif /* PLAT_x86_linux || PLAT_x86_darwin || PLAT_x86_win32 && __GNUC__ */
+#endif /* PLAT_x86_linux || PLAT_x86_darwin || (PLAT_x86_win32 && __GNUC__) */
/* ------------------------- x86-Win32 ------------------------- */
adding a CFI annotation to change the CFA offset is simply wrong.
So the solution is to get hold of the CFA using
- __builtin_frame_address(0), put it in a known register, and add a
+ __builtin_dwarf_cfa(), put it in a known register, and add a
CFI annotation to say what the register is. We choose %rbp for
this (perhaps perversely), because:
generated code.
However .. one extra complication. We can't just whack the result
- of __builtin_frame_address(0) into %rbp and then add %rbp to the
+ of __builtin_dwarf_cfa() into %rbp and then add %rbp to the
list of trashed registers at the end of the inline assembly
fragments; gcc won't allow %rbp to appear in that list. Hence
instead we need to stash %rbp in %r15 for the duration of the asm,
Oh .. and this all needs to be conditionalised so that it is
unchanged from before this commit, when compiled with older gccs
- that don't support __builtin_frame_address.
+ that don't support __builtin_dwarf_cfa. Furthermore, since
+ this header file is freestanding, it has to be independent of
+ config.h, and so the following conditionalisation cannot depend on
+ configure time checks.
+
+ Although it's not clear from
+ 'defined(__GNUC__) && defined(__GCC_HAVE_DWARF2_CFI_ASM)',
+ this expression excludes Darwin.
+ .cfi directives in Darwin assembly appear to be completely
+ different and I haven't investigated how they work.
+
+ For even more entertainment value, note we have to use the
+ completely undocumented __builtin_dwarf_cfa(), which appears to
+ really compute the CFA, whereas __builtin_frame_address(0) claims
+ to but actually doesn't. See
+ https://bugs.kde.org/show_bug.cgi?id=243270#c47
*/
-#if HAVE_BUILTIN_FRAME_ADDRESS
+#if defined(__GNUC__) && defined(__GCC_HAVE_DWARF2_CFI_ASM)
# define __FRAME_POINTER \
- ,"r"(__builtin_frame_address(0))
+ ,"r"(__builtin_dwarf_cfa())
# define VALGRIND_CFI_PROLOGUE \
- ".cfi_remember_state\n\t" \
"movq %%rbp, %%r15\n\t" \
- "movq %0, %%rbp\n\t" \
+ "movq %2, %%rbp\n\t" \
+ ".cfi_remember_state\n\t" \
".cfi_def_cfa rbp, 0\n\t"
# define VALGRIND_CFI_EPILOGUE \
"movq %%r15, %%rbp\n\t" \
/* ------------------------- x86-{linux,darwin} ---------------- */
-#if defined(PLAT_x86_linux) || defined(PLAT_x86_darwin) || defined(PLAT_x86_win32) && defined(__GNUC__)
+#if defined(PLAT_x86_linux) || defined(PLAT_x86_darwin) \
+ || (defined(PLAT_x86_win32) && defined(__GNUC__))
typedef
struct {
__SPECIAL_INSTRUCTION_PREAMBLE \
/* call-noredir *%EAX */ \
"xchgl %%edx,%%edx\n\t"
-#endif /* PLAT_x86_linux || PLAT_x86_darwin || PLAT_x86_win32 && __GNUC__ */
+#endif /* PLAT_x86_linux || PLAT_x86_darwin || (PLAT_x86_win32 && __GNUC__) */
/* ------------------------- x86-Win32 ------------------------- */
adding a CFI annotation to change the CFA offset is simply wrong.
So the solution is to get hold of the CFA using
- __builtin_frame_address(0), put it in a known register, and add a
+ __builtin_dwarf_cfa(), put it in a known register, and add a
CFI annotation to say what the register is. We choose %rbp for
this (perhaps perversely), because:
generated code.
However .. one extra complication. We can't just whack the result
- of __builtin_frame_address(0) into %rbp and then add %rbp to the
+ of __builtin_dwarf_cfa() into %rbp and then add %rbp to the
list of trashed registers at the end of the inline assembly
fragments; gcc won't allow %rbp to appear in that list. Hence
instead we need to stash %rbp in %r15 for the duration of the asm,
Oh .. and this all needs to be conditionalised so that it is
unchanged from before this commit, when compiled with older gccs
- that don't support __builtin_frame_address.
+ that don't support __builtin_dwarf_cfa. Furthermore, since
+ this header file is freestanding, it has to be independent of
+ config.h, and so the following conditionalisation cannot depend on
+ configure time checks.
+
+ Although it's not clear from
+ 'defined(__GNUC__) && defined(__GCC_HAVE_DWARF2_CFI_ASM)',
+ this expression excludes Darwin.
+ .cfi directives in Darwin assembly appear to be completely
+ different and I haven't investigated how they work.
+
+ For even more entertainment value, note we have to use the
+ completely undocumented __builtin_dwarf_cfa(), which appears to
+ really compute the CFA, whereas __builtin_frame_address(0) claims
+ to but actually doesn't. See
+ https://bugs.kde.org/show_bug.cgi?id=243270#c47
*/
-#if HAVE_BUILTIN_FRAME_ADDRESS
+#if defined(__GNUC__) && defined(__GCC_HAVE_DWARF2_CFI_ASM)
# define __FRAME_POINTER \
- ,"r"(__builtin_frame_address(0))
+ ,"r"(__builtin_dwarf_cfa())
# define VALGRIND_CFI_PROLOGUE \
- ".cfi_remember_state\n\t" \
"movq %%rbp, %%r15\n\t" \
- "movq %0, %%rbp\n\t" \
+ "movq %2, %%rbp\n\t" \
+ ".cfi_remember_state\n\t" \
".cfi_def_cfa rbp, 0\n\t"
# define VALGRIND_CFI_EPILOGUE \
"movq %%r15, %%rbp\n\t" \
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/include/vki
svn://svn.valgrind.org/valgrind
-2010-10-06T15:55:59.847184Z
-11400
+2010-10-11T19:09:53.133904Z
+11428
sewardj
has-props
-2010-10-07T07:07:43.527312Z
-af6b4cee8d813e773fe9eda09558f370
-2010-08-22T12:08:59.923484Z
-11280
+2010-10-11T22:17:19.578909Z
+5c1d2fedff1364489c45ab72e7ecad94
+2010-10-11T19:09:53.133904Z
+11428
sewardj
-12578
+12585
\f
vki-ppc32-linux.h
file
-2010-10-07T07:07:43.527312Z
-cc66a23f9e191687d8f21eb72b9b4417
-2010-07-01T00:20:20.236166Z
-11194
-njn
+2010-10-08T00:53:29.877219Z
+f15c0ab21c770679f8ec8ef50ee90680
+2010-10-07T09:53:02.267509Z
+11405
+sewardj
-28373
+28399
\f
vki-scnums-x86-linux.h
file
#define VKI_SHM_RDONLY SHM_RDONLY
#define VKI_SHM_RND SHM_RND
+#define VKI_SHMLBA SHMLBA
#define vki_shmid_ds shmid_ds
#define __NR_fchmodat 333
#define __NR_faccessat 334
#define __NR_pselect6 335 /* JRS 20100812: is this correct? */
- /* 336 for ppoll */
+#define __NR_ppoll 336
#define __NR_unshare 337
#define __NR_set_robust_list 338
#define __NR_get_robust_list 339
#define VKI_SHM_RDONLY SHM_RDONLY
#define VKI_SHM_RND SHM_RND
+#define VKI_SHMLBA SHMLBA
#define vki_shmid_ds shmid_ds
#define __NR_fchmodat 333
#define __NR_faccessat 334
#define __NR_pselect6 335 /* JRS 20100812: is this correct? */
- /* 336 for ppoll */
+#define __NR_ppoll 336
#define __NR_unshare 337
#define __NR_set_robust_list 338
#define __NR_get_robust_list 339
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/lackey
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/lackey/tests
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/massif
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/massif/perf
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/massif/tests
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/memcheck/docs
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/memcheck/tests
svn://svn.valgrind.org/valgrind
-2010-09-24T23:51:17.031380Z
-11378
-sewardj
+2010-10-10T18:07:31.346936Z
+11420
+bart
has-props
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/mpi
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/nightly
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/nightly/conf
svn://svn.valgrind.org/valgrind
--- /dev/null
+none_arm_linux-nl_main.o: nl_main.c ../include/pub_tool_basics.h \
+ ../VEX/pub/libvex_basictypes.h \
+ /scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h \
+ ../include/pub_tool_tooliface.h ../include/pub_tool_errormgr.h \
+ ../include/pub_tool_execontext.h ../VEX/pub/libvex.h \
+ ../VEX/pub/libvex_basictypes.h ../VEX/pub/libvex_ir.h
+
+../include/pub_tool_basics.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+/scratchbox/compilers/arm-linux-gnueabi-gcc4.4.1-glibc2.11.1/bin/../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/stdarg.h:
+
+../include/pub_tool_tooliface.h:
+
+../include/pub_tool_errormgr.h:
+
+../include/pub_tool_execontext.h:
+
+../VEX/pub/libvex.h:
+
+../VEX/pub/libvex_basictypes.h:
+
+../VEX/pub/libvex_ir.h:
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/none
svn://svn.valgrind.org/valgrind
-2010-10-06T16:13:17.915685Z
-11401
-bart
+2010-10-11T18:55:24.778808Z
+11427
+sewardj
has-props
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# none/Makefile. Generated from Makefile.in by configure.
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
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+
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+DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in \
+ $(top_srcdir)/Makefile.all.am $(top_srcdir)/Makefile.tool.am
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+ installcheck-recursive installdirs-recursive pdf-recursive \
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+ distclean-recursive maintainer-clean-recursive
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+DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST)
+ACLOCAL = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run aclocal-1.10
+AMTAR = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run tar
+AR = /scratchbox/compilers/bin/ar
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+AUTOHEADER = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run autoheader
+AUTOMAKE = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run automake-1.10
+AWK = gawk
+BOOST_CFLAGS =
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+CCDEPMODE = depmode=gcc3
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+INSTALL_DATA = ${INSTALL} -m 644
+INSTALL_PROGRAM = ${INSTALL}
+INSTALL_SCRIPT = ${INSTALL}
+INSTALL_STRIP_PROGRAM = $(install_sh) -c -s
+LDFLAGS = -Wl,--hash-style=both
+LIBOBJS =
+LIBS =
+LN_S = ln -s
+LTLIBOBJS =
+MAINT = #
+MAKEINFO = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run makeinfo
+MKDIR_P = /scratchbox/tools/bin/mkdir -p
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+VGCONF_PLATFORM_PRI_CAPS = ARM_LINUX
+VGCONF_PLATFORM_SEC_CAPS =
+abs_builddir = /home/ubuntu/valgrind-3.5.0/none
+abs_srcdir = /home/ubuntu/valgrind-3.5.0/none
+abs_top_builddir = /home/ubuntu/valgrind-3.5.0
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+datadir = ${datarootdir}
+datarootdir = ${prefix}/share
+docdir = ${datarootdir}/doc/${PACKAGE_TARNAME}
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+host_os = linux-gnueabi
+host_vendor = unknown
+htmldir = ${docdir}
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+infodir = ${datarootdir}/info
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+libdir = ${exec_prefix}/lib
+libexecdir = ${exec_prefix}/libexec
+localedir = ${datarootdir}/locale
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+top_builddir = ..
+top_srcdir = ..
+SUBDIRS = . tests
+inplacedir = $(top_builddir)/.in_place
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+ -Wno-format-zero-length \
+ -fno-strict-aliasing
+
+AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+#AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+# -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
+# and so the CPPFLAGS are passed to the assembler. But this is not true for
+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
+# AM_CPPFLAGS_<PLATFORM> in each AM_CCASFLAGS_<PLATFORM> variable. This
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+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
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+ -DVGO_linux=1 \
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+
+#AM_CPPFLAGS_ = \
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+# -DVGO_linux=1 \
+# -DVGP__linux=1
+
+AM_FLAG_M3264_X86_LINUX =
+AM_CFLAGS_X86_LINUX = \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) -g
+AM_FLAG_M3264_AMD64_LINUX =
+AM_CFLAGS_AMD64_LINUX = -fomit-frame-pointer \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) -g
+AM_FLAG_M3264_PPC32_LINUX =
+AM_CFLAGS_PPC32_LINUX = $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_LINUX = $(AM_CPPFLAGS_PPC32_LINUX) -g
+AM_FLAG_M3264_PPC64_LINUX =
+AM_CFLAGS_PPC64_LINUX = $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_LINUX = $(AM_CPPFLAGS_PPC64_LINUX) -g
+AM_FLAG_M3264_ARM_LINUX =
+AM_CFLAGS_ARM_LINUX = \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) -g
+AM_FLAG_M3264_PPC32_AIX5 =
+AM_CFLAGS_PPC32_AIX5 = -mcpu=powerpc $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
+ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 =
+AM_CFLAGS_PPC64_AIX5 = -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 \
+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
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+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_ARM_LINUX)
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+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_ARM_LINUX)
+AM_FLAG_M3264_SEC =
+#AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+
+#----------------------------------------------------------------------------
+# <tool>-<platform> stuff
+#----------------------------------------------------------------------------
+TOOL_DEPENDENCIES_ARM_LINUX = \
+ $(top_builddir)/coregrind/libcoregrind-arm-linux.a \
+ $(top_builddir)/VEX/libvex-arm-linux.a
+
+#TOOL_DEPENDENCIES_ = \
+# $(top_builddir)/coregrind/libcoregrind--linux.a \
+# $(top_builddir)/VEX/libvex--linux.a
+
+TOOL_LDADD_COMMON = -lgcc
+TOOL_LDADD_ARM_LINUX = \
+ $(TOOL_DEPENDENCIES_ARM_LINUX) $(TOOL_LDADD_COMMON)
+
+#TOOL_LDADD_ = \
+# $(TOOL_DEPENDENCIES_) $(TOOL_LDADD_COMMON)
+
+
+# -Wl,--build-id=none is needed when linking tools on Linux. Without this
+# flag newer ld versions (2.20 and later) create a .note.gnu.build-id at the
+# default text segment address, which of course means the resulting executable
+# is unusable. So we have to tell ld not to generate that, with --build-id=none.
+TOOL_LDFLAGS_COMMON_LINUX = \
+ -static -nodefaultlibs -nostartfiles -u _start -Wl,--build-id=none
+
+TOOL_LDFLAGS_COMMON_AIX5 = \
+ -static -Wl,-e_start_valgrind
+
+TOOL_LDFLAGS_COMMON_DARWIN = \
+ -nodefaultlibs -nostartfiles -Wl,-u,__start -Wl,-e,__start
+
+TOOL_LDFLAGS_X86_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX)
+
+TOOL_LDFLAGS_AMD64_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX)
+
+TOOL_LDFLAGS_PPC32_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX)
+
+TOOL_LDFLAGS_PPC64_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX)
+
+TOOL_LDFLAGS_ARM_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX)
+
+TOOL_LDFLAGS_PPC32_AIX5 = \
+ $(TOOL_LDFLAGS_COMMON_AIX5)
+
+TOOL_LDFLAGS_PPC64_AIX5 = \
+ $(TOOL_LDFLAGS_COMMON_AIX5) -Wl,-bbigtoc
+
+TOOL_LDFLAGS_X86_DARWIN = \
+ $(TOOL_LDFLAGS_COMMON_DARWIN) -arch i386
+
+TOOL_LDFLAGS_AMD64_DARWIN = \
+ $(TOOL_LDFLAGS_COMMON_DARWIN) -arch x86_64
+
+
+# NB for 64-bit darwin. We may want to set -Wl,-pagezero_size to
+# something smaller than the default of 4G, so as to facilitate
+# loading clients who are also linked thusly (currently m_ume.c
+# will fail to load them). Although such setting is probably
+# better done in link_tool_exe.c.
+#
+# -Wl,-pagezero_size,0x100000000
+
+#----------------------------------------------------------------------------
+# vgpreload_<tool>-<platform>.a stuff
+#----------------------------------------------------------------------------
+LIBREPLACEMALLOC_X86_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-linux.a
+
+LIBREPLACEMALLOC_AMD64_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-amd64-linux.a
+
+LIBREPLACEMALLOC_PPC32_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc32-linux.a
+
+LIBREPLACEMALLOC_PPC64_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc64-linux.a
+
+LIBREPLACEMALLOC_ARM_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-arm-linux.a
+
+LIBREPLACEMALLOC_PPC32_AIX5 = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc32-aix5.a
+
+LIBREPLACEMALLOC_PPC64_AIX5 = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc64-aix5.a
+
+LIBREPLACEMALLOC_X86_DARWIN = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-darwin.a
+
+LIBREPLACEMALLOC_AMD64_DARWIN = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-amd64-darwin.a
+
+LIBREPLACEMALLOC_LDFLAGS_X86_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_X86_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_AMD64_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_AMD64_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_PPC32_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_PPC32_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_PPC64_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_PPC64_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_ARM_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_ARM_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_PPC32_AIX5 = \
+ $(LIBREPLACEMALLOC_PPC32_AIX5)
+
+LIBREPLACEMALLOC_LDFLAGS_PPC64_AIX5 = \
+ $(LIBREPLACEMALLOC_PPC64_AIX5)
+
+LIBREPLACEMALLOC_LDFLAGS_X86_DARWIN = \
+ $(LIBREPLACEMALLOC_X86_DARWIN)
+
+LIBREPLACEMALLOC_LDFLAGS_AMD64_DARWIN = \
+ $(LIBREPLACEMALLOC_AMD64_DARWIN)
+
+EXTRA_DIST = docs/nl-manual.xml
+NONE_SOURCES_COMMON = nl_main.c
+none_arm_linux_SOURCES = \
+ $(NONE_SOURCES_COMMON)
+
+none_arm_linux_CPPFLAGS = \
+ $(AM_CPPFLAGS_ARM_LINUX)
+
+none_arm_linux_CFLAGS = \
+ $(AM_CFLAGS_ARM_LINUX)
+
+none_arm_linux_DEPENDENCIES = \
+ $(TOOL_DEPENDENCIES_ARM_LINUX)
+
+none_arm_linux_LDADD = \
+ $(TOOL_LDADD_ARM_LINUX)
+
+none_arm_linux_LDFLAGS = \
+ $(TOOL_LDFLAGS_ARM_LINUX)
+
+none_arm_linux_LINK = \
+ $(top_builddir)/coregrind/link_tool_exe_linux \
+ 0x38000000 \
+ $(LINK) \
+ $(none_arm_linux_CFLAGS) \
+ $(none_arm_linux_LDFLAGS)
+
+#none__linux_SOURCES = \
+# $(NONE_SOURCES_COMMON)
+
+#none__linux_CPPFLAGS = \
+# $(AM_CPPFLAGS_)
+
+#none__linux_CFLAGS = \
+# $(AM_CFLAGS_)
+
+#none__linux_DEPENDENCIES = \
+# $(TOOL_DEPENDENCIES_)
+
+#none__linux_LDADD = \
+# $(TOOL_LDADD_)
+
+#none__linux_LDFLAGS = \
+# $(TOOL_LDFLAGS_)
+
+#none__linux_LINK = \
+# $(top_builddir)/coregrind/link_tool_exe_linux \
+# 0xUNSET \
+# $(LINK) \
+# $(none__linux_CFLAGS) \
+# $(none__linux_LDFLAGS)
+
+all: all-recursive
+
+.SUFFIXES:
+.SUFFIXES: .c .o .obj
+$(srcdir)/Makefile.in: # $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: # $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): # $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-noinstPROGRAMS:
+ -test -z "$(noinst_PROGRAMS)" || rm -f $(noinst_PROGRAMS)
+none-arm-linux$(EXEEXT): $(none_arm_linux_OBJECTS) $(none_arm_linux_DEPENDENCIES)
+ @rm -f none-arm-linux$(EXEEXT)
+ $(none_arm_linux_LINK) $(none_arm_linux_OBJECTS) $(none_arm_linux_LDADD) $(LIBS)
+none--linux$(EXEEXT): $(none__linux_OBJECTS) $(none__linux_DEPENDENCIES)
+ @rm -f none--linux$(EXEEXT)
+ $(none__linux_LINK) $(none__linux_OBJECTS) $(none__linux_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+include ./$(DEPDIR)/none_arm_linux-nl_main.Po
+include ./$(DEPDIR)/none__linux-nl_main.Po
+
+.c.o:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c $<
+
+.c.obj:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
+none_arm_linux-nl_main.o: nl_main.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(none_arm_linux_CPPFLAGS) $(CPPFLAGS) $(none_arm_linux_CFLAGS) $(CFLAGS) -MT none_arm_linux-nl_main.o -MD -MP -MF $(DEPDIR)/none_arm_linux-nl_main.Tpo -c -o none_arm_linux-nl_main.o `test -f 'nl_main.c' || echo '$(srcdir)/'`nl_main.c
+ mv -f $(DEPDIR)/none_arm_linux-nl_main.Tpo $(DEPDIR)/none_arm_linux-nl_main.Po
+# source='nl_main.c' object='none_arm_linux-nl_main.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(none_arm_linux_CPPFLAGS) $(CPPFLAGS) $(none_arm_linux_CFLAGS) $(CFLAGS) -c -o none_arm_linux-nl_main.o `test -f 'nl_main.c' || echo '$(srcdir)/'`nl_main.c
+
+none_arm_linux-nl_main.obj: nl_main.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(none_arm_linux_CPPFLAGS) $(CPPFLAGS) $(none_arm_linux_CFLAGS) $(CFLAGS) -MT none_arm_linux-nl_main.obj -MD -MP -MF $(DEPDIR)/none_arm_linux-nl_main.Tpo -c -o none_arm_linux-nl_main.obj `if test -f 'nl_main.c'; then $(CYGPATH_W) 'nl_main.c'; else $(CYGPATH_W) '$(srcdir)/nl_main.c'; fi`
+ mv -f $(DEPDIR)/none_arm_linux-nl_main.Tpo $(DEPDIR)/none_arm_linux-nl_main.Po
+# source='nl_main.c' object='none_arm_linux-nl_main.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(none_arm_linux_CPPFLAGS) $(CPPFLAGS) $(none_arm_linux_CFLAGS) $(CFLAGS) -c -o none_arm_linux-nl_main.obj `if test -f 'nl_main.c'; then $(CYGPATH_W) 'nl_main.c'; else $(CYGPATH_W) '$(srcdir)/nl_main.c'; fi`
+
+none__linux-nl_main.o: nl_main.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(none__linux_CPPFLAGS) $(CPPFLAGS) $(none__linux_CFLAGS) $(CFLAGS) -MT none__linux-nl_main.o -MD -MP -MF $(DEPDIR)/none__linux-nl_main.Tpo -c -o none__linux-nl_main.o `test -f 'nl_main.c' || echo '$(srcdir)/'`nl_main.c
+ mv -f $(DEPDIR)/none__linux-nl_main.Tpo $(DEPDIR)/none__linux-nl_main.Po
+# source='nl_main.c' object='none__linux-nl_main.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(none__linux_CPPFLAGS) $(CPPFLAGS) $(none__linux_CFLAGS) $(CFLAGS) -c -o none__linux-nl_main.o `test -f 'nl_main.c' || echo '$(srcdir)/'`nl_main.c
+
+none__linux-nl_main.obj: nl_main.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(none__linux_CPPFLAGS) $(CPPFLAGS) $(none__linux_CFLAGS) $(CFLAGS) -MT none__linux-nl_main.obj -MD -MP -MF $(DEPDIR)/none__linux-nl_main.Tpo -c -o none__linux-nl_main.obj `if test -f 'nl_main.c'; then $(CYGPATH_W) 'nl_main.c'; else $(CYGPATH_W) '$(srcdir)/nl_main.c'; fi`
+ mv -f $(DEPDIR)/none__linux-nl_main.Tpo $(DEPDIR)/none__linux-nl_main.Po
+# source='nl_main.c' object='none__linux-nl_main.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(none__linux_CPPFLAGS) $(CPPFLAGS) $(none__linux_CFLAGS) $(CFLAGS) -c -o none__linux-nl_main.obj `if test -f 'nl_main.c'; then $(CYGPATH_W) 'nl_main.c'; else $(CYGPATH_W) '$(srcdir)/nl_main.c'; fi`
+
+# This directory's subdirectories are mostly independent; you can cd
+# into them and run `make' without going through this Makefile.
+# To change the values of `make' variables: instead of editing Makefiles,
+# (1) if the variable is set in `config.status', edit `config.status'
+# (which will cause the Makefiles to be regenerated when you run `make');
+# (2) otherwise, pass the desired values on the `make' command line.
+$(RECURSIVE_TARGETS):
+ @failcom='exit 1'; \
+ for f in x $$MAKEFLAGS; do \
+ case $$f in \
+ *=* | --[!k]*);; \
+ *k*) failcom='fail=yes';; \
+ esac; \
+ done; \
+ dot_seen=no; \
+ target=`echo $@ | sed s/-recursive//`; \
+ list='$(SUBDIRS)'; for subdir in $$list; do \
+ echo "Making $$target in $$subdir"; \
+ if test "$$subdir" = "."; then \
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+ if test "$$dot_seen" = "no"; then \
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+ dot_seen=no; \
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+ distclean-* | maintainer-clean-*) list='$(DIST_SUBDIRS)' ;; \
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+ maintainer-clean-generic mostlyclean mostlyclean-compile \
+ mostlyclean-generic pdf pdf-am ps ps-am tags tags-recursive \
+ uninstall uninstall-am
+
+
+# This used to be required when Vex had a handwritten Makefile. It
+# shouldn't be needed any more, though.
+
+#----------------------------------------------------------------------------
+# noinst_PROGRAMS and noinst_DSYMS targets
+#----------------------------------------------------------------------------
+
+# On Darwin, for a program 'p', the DWARF debug info is stored in the
+# directory 'p.dSYM'. This must be generated after the executable is
+# created, with 'dsymutil p'. We could redefine LINK with a script that
+# executes 'dsymutil' after linking, but that's a pain. Instead we use this
+# hook so that every time "make check" is run, we subsequently invoke
+# 'dsymutil' on all the executables that lack a .dSYM directory, or that are
+# newer than their corresponding .dSYM directory.
+build-noinst_DSYMS: $(noinst_DSYMS)
+ for f in $(noinst_DSYMS); do \
+ if [ ! -e $$f.dSYM -o $$f -nt $$f.dSYM ] ; then \
+ echo "dsymutil $$f"; \
+ dsymutil $$f; \
+ fi; \
+ done
+
+# This is used by coregrind/Makefile.am and Makefile.tool.am for doing
+# "in-place" installs. It copies $(noinst_PROGRAMS) into $inplacedir.
+# It needs to be depended on by an 'all-local' rule.
+inplace-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_PROGRAMS) ; do \
+ rm -f $(inplacedir)/$$f; \
+ ln -f -s ../$(subdir)/$$f $(inplacedir); \
+ done
+
+# Similar to inplace-noinst_PROGRAMS
+inplace-noinst_DSYMS: build-noinst_DSYMS
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_DSYMS); do \
+ rm -f $(inplacedir)/$$f.dSYM; \
+ ln -f -s ../$(subdir)/$$f.dSYM $(inplacedir); \
+ done
+
+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
+# "make install". It copies $(noinst_PROGRAMS) into $prefix/lib/valgrind/.
+# It needs to be depended on by an 'install-exec-local' rule.
+install-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_PROGRAMS); do \
+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
+ done
+
+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
+# directories. XXX: not sure whether the resulting permissions will be
+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_DSYMS); do \
+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
+ done
+
+# This needs to be depended on by a 'clean-local' rule.
+clean-noinst_DSYMS:
+ for f in $(noinst_DSYMS); do \
+ rm -rf $$f.dSYM; \
+ done
+
+#----------------------------------------------------------------------------
+# General stuff
+#----------------------------------------------------------------------------
+
+all-local: inplace-noinst_PROGRAMS inplace-noinst_DSYMS
+
+clean-local: clean-noinst_DSYMS
+
+install-exec-local: install-noinst_PROGRAMS install-noinst_DSYMS
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
+
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+ $(am__EXEEXT_1)
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@am__append_1 = none-@VGCONF_ARCH_SEC@-@VGCONF_OS@
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+CONFIG_CLEAN_FILES =
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+PROGRAMS = $(noinst_PROGRAMS)
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+ install-dvi-recursive install-exec-recursive \
+ install-html-recursive install-info-recursive \
+ install-pdf-recursive install-ps-recursive install-recursive \
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+sharedstatedir = @sharedstatedir@
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+sysconfdir = @sysconfdir@
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+top_builddir = @top_builddir@
+top_srcdir = @top_srcdir@
+SUBDIRS = . tests
+inplacedir = $(top_builddir)/.in_place
+
+#----------------------------------------------------------------------------
+# Flags
+#----------------------------------------------------------------------------
+
+# Baseline flags for all compilations. Aim here is to maximise
+# performance and get whatever useful warnings we can out of gcc.
+AM_CFLAGS_BASE = \
+ -O2 -g \
+ -Wall \
+ -Wmissing-prototypes \
+ -Wshadow \
+ -Wpointer-arith \
+ -Wstrict-prototypes \
+ -Wmissing-declarations \
+ @FLAG_W_NO_FORMAT_ZERO_LENGTH@ \
+ -fno-strict-aliasing
+
+@VGCONF_OS_IS_DARWIN_FALSE@AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+@VGCONF_OS_IS_DARWIN_TRUE@AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
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+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
+# and so the CPPFLAGS are passed to the assembler. But this is not true for
+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
+# AM_CPPFLAGS_<PLATFORM> in each AM_CCASFLAGS_<PLATFORM> variable. This
+# means some of the flags are duplicated on systems with newer versions of
+# automake, but this does not really matter and seems hard to avoid.
+AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@ = \
+ -I$(top_srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_@VGCONF_ARCH_PRI@=1 \
+ -DVGO_@VGCONF_OS@=1 \
+ -DVGP_@VGCONF_ARCH_PRI@_@VGCONF_OS@=1
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@AM_CPPFLAGS_@VGCONF_PLATFORM_SEC_CAPS@ = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir) \
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+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir)/VEX/pub \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGA_@VGCONF_ARCH_SEC@=1 \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGO_@VGCONF_OS@=1 \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGP_@VGCONF_ARCH_SEC@_@VGCONF_OS@=1
+
+AM_FLAG_M3264_X86_LINUX = @FLAG_M32@
+AM_CFLAGS_X86_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
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+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_AMD64_LINUX = @FLAG_M64@
+AM_CFLAGS_AMD64_LINUX = @FLAG_M64@ -fomit-frame-pointer \
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+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) @FLAG_M64@ -g
+AM_FLAG_M3264_PPC32_LINUX = @FLAG_M32@
+AM_CFLAGS_PPC32_LINUX = @FLAG_M32@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_LINUX = $(AM_CPPFLAGS_PPC32_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_PPC64_LINUX = @FLAG_M64@
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+AM_FLAG_M3264_ARM_LINUX = @FLAG_M32@
+AM_CFLAGS_ARM_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
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+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) @FLAG_M32@ -g
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+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
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+
+AM_FLAG_M3264_PPC64_AIX5 = @FLAG_MAIX64@
+AM_CFLAGS_PPC64_AIX5 = @FLAG_MAIX64@ -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ @FLAG_MAIX64@ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
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+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
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+#
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+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CFLAGS_PRI = $(AM_CFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+@VGCONF_HAVE_PLATFORM_SEC_FALSE@AM_FLAG_M3264_SEC =
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_@VGCONF_PLATFORM_SEC_CAPS@)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX32@
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX64@
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+
+#----------------------------------------------------------------------------
+# <tool>-<platform> stuff
+#----------------------------------------------------------------------------
+TOOL_DEPENDENCIES_@VGCONF_PLATFORM_PRI_CAPS@ = \
+ $(top_builddir)/coregrind/libcoregrind-@VGCONF_ARCH_PRI@-@VGCONF_OS@.a \
+ $(top_builddir)/VEX/libvex-@VGCONF_ARCH_PRI@-@VGCONF_OS@.a
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@TOOL_DEPENDENCIES_@VGCONF_PLATFORM_SEC_CAPS@ = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(top_builddir)/coregrind/libcoregrind-@VGCONF_ARCH_SEC@-@VGCONF_OS@.a \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(top_builddir)/VEX/libvex-@VGCONF_ARCH_SEC@-@VGCONF_OS@.a
+
+TOOL_LDADD_COMMON = -lgcc
+TOOL_LDADD_@VGCONF_PLATFORM_PRI_CAPS@ = \
+ $(TOOL_DEPENDENCIES_@VGCONF_PLATFORM_PRI_CAPS@) $(TOOL_LDADD_COMMON)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@TOOL_LDADD_@VGCONF_PLATFORM_SEC_CAPS@ = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(TOOL_DEPENDENCIES_@VGCONF_PLATFORM_SEC_CAPS@) $(TOOL_LDADD_COMMON)
+
+
+# -Wl,--build-id=none is needed when linking tools on Linux. Without this
+# flag newer ld versions (2.20 and later) create a .note.gnu.build-id at the
+# default text segment address, which of course means the resulting executable
+# is unusable. So we have to tell ld not to generate that, with --build-id=none.
+TOOL_LDFLAGS_COMMON_LINUX = \
+ -static -nodefaultlibs -nostartfiles -u _start @FLAG_NO_BUILD_ID@
+
+TOOL_LDFLAGS_COMMON_AIX5 = \
+ -static -Wl,-e_start_valgrind
+
+TOOL_LDFLAGS_COMMON_DARWIN = \
+ -nodefaultlibs -nostartfiles -Wl,-u,__start -Wl,-e,__start
+
+TOOL_LDFLAGS_X86_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+
+TOOL_LDFLAGS_AMD64_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+
+TOOL_LDFLAGS_PPC32_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+
+TOOL_LDFLAGS_PPC64_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+
+TOOL_LDFLAGS_ARM_LINUX = \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+
+TOOL_LDFLAGS_PPC32_AIX5 = \
+ $(TOOL_LDFLAGS_COMMON_AIX5) @FLAG_MAIX32@
+
+TOOL_LDFLAGS_PPC64_AIX5 = \
+ $(TOOL_LDFLAGS_COMMON_AIX5) @FLAG_MAIX64@ -Wl,-bbigtoc
+
+TOOL_LDFLAGS_X86_DARWIN = \
+ $(TOOL_LDFLAGS_COMMON_DARWIN) -arch i386
+
+TOOL_LDFLAGS_AMD64_DARWIN = \
+ $(TOOL_LDFLAGS_COMMON_DARWIN) -arch x86_64
+
+
+# NB for 64-bit darwin. We may want to set -Wl,-pagezero_size to
+# something smaller than the default of 4G, so as to facilitate
+# loading clients who are also linked thusly (currently m_ume.c
+# will fail to load them). Although such setting is probably
+# better done in link_tool_exe.c.
+#
+# -Wl,-pagezero_size,0x100000000
+
+#----------------------------------------------------------------------------
+# vgpreload_<tool>-<platform>.a stuff
+#----------------------------------------------------------------------------
+LIBREPLACEMALLOC_X86_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-linux.a
+
+LIBREPLACEMALLOC_AMD64_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-amd64-linux.a
+
+LIBREPLACEMALLOC_PPC32_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc32-linux.a
+
+LIBREPLACEMALLOC_PPC64_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc64-linux.a
+
+LIBREPLACEMALLOC_ARM_LINUX = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-arm-linux.a
+
+LIBREPLACEMALLOC_PPC32_AIX5 = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc32-aix5.a
+
+LIBREPLACEMALLOC_PPC64_AIX5 = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-ppc64-aix5.a
+
+LIBREPLACEMALLOC_X86_DARWIN = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-x86-darwin.a
+
+LIBREPLACEMALLOC_AMD64_DARWIN = \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-amd64-darwin.a
+
+LIBREPLACEMALLOC_LDFLAGS_X86_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_X86_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_AMD64_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_AMD64_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_PPC32_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_PPC32_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_PPC64_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_PPC64_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_ARM_LINUX = \
+ -Wl,--whole-archive \
+ $(LIBREPLACEMALLOC_ARM_LINUX) \
+ -Wl,--no-whole-archive
+
+LIBREPLACEMALLOC_LDFLAGS_PPC32_AIX5 = \
+ $(LIBREPLACEMALLOC_PPC32_AIX5)
+
+LIBREPLACEMALLOC_LDFLAGS_PPC64_AIX5 = \
+ $(LIBREPLACEMALLOC_PPC64_AIX5)
+
+LIBREPLACEMALLOC_LDFLAGS_X86_DARWIN = \
+ $(LIBREPLACEMALLOC_X86_DARWIN)
+
+LIBREPLACEMALLOC_LDFLAGS_AMD64_DARWIN = \
+ $(LIBREPLACEMALLOC_AMD64_DARWIN)
+
+EXTRA_DIST = docs/nl-manual.xml
+NONE_SOURCES_COMMON = nl_main.c
+none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_SOURCES = \
+ $(NONE_SOURCES_COMMON)
+
+none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CPPFLAGS = \
+ $(AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+
+none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CFLAGS = \
+ $(AM_CFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+
+none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_DEPENDENCIES = \
+ $(TOOL_DEPENDENCIES_@VGCONF_PLATFORM_PRI_CAPS@)
+
+none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LDADD = \
+ $(TOOL_LDADD_@VGCONF_PLATFORM_PRI_CAPS@)
+
+none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LDFLAGS = \
+ $(TOOL_LDFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+
+none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LINK = \
+ $(top_builddir)/coregrind/link_tool_exe_@VGCONF_OS@ \
+ @VALT_LOAD_ADDRESS_PRI@ \
+ $(LINK) \
+ $(none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CFLAGS) \
+ $(none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LDFLAGS)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@none_@VGCONF_ARCH_SEC@_@VGCONF_OS@_SOURCES = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(NONE_SOURCES_COMMON)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@none_@VGCONF_ARCH_SEC@_@VGCONF_OS@_CPPFLAGS = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(AM_CPPFLAGS_@VGCONF_PLATFORM_SEC_CAPS@)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@none_@VGCONF_ARCH_SEC@_@VGCONF_OS@_CFLAGS = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(AM_CFLAGS_@VGCONF_PLATFORM_SEC_CAPS@)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@none_@VGCONF_ARCH_SEC@_@VGCONF_OS@_DEPENDENCIES = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(TOOL_DEPENDENCIES_@VGCONF_PLATFORM_SEC_CAPS@)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@none_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LDADD = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(TOOL_LDADD_@VGCONF_PLATFORM_SEC_CAPS@)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@none_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LDFLAGS = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(TOOL_LDFLAGS_@VGCONF_PLATFORM_SEC_CAPS@)
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@none_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LINK = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(top_builddir)/coregrind/link_tool_exe_@VGCONF_OS@ \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ @VALT_LOAD_ADDRESS_SEC@ \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(LINK) \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(none_@VGCONF_ARCH_SEC@_@VGCONF_OS@_CFLAGS) \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ $(none_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LDFLAGS)
+
+all: all-recursive
+
+.SUFFIXES:
+.SUFFIXES: .c .o .obj
+$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-noinstPROGRAMS:
+ -test -z "$(noinst_PROGRAMS)" || rm -f $(noinst_PROGRAMS)
+none-@VGCONF_ARCH_PRI@-@VGCONF_OS@$(EXEEXT): $(none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_OBJECTS) $(none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_DEPENDENCIES)
+ @rm -f none-@VGCONF_ARCH_PRI@-@VGCONF_OS@$(EXEEXT)
+ $(none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LINK) $(none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_OBJECTS) $(none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_LDADD) $(LIBS)
+none-@VGCONF_ARCH_SEC@-@VGCONF_OS@$(EXEEXT): $(none_@VGCONF_ARCH_SEC@_@VGCONF_OS@_OBJECTS) $(none_@VGCONF_ARCH_SEC@_@VGCONF_OS@_DEPENDENCIES)
+ @rm -f none-@VGCONF_ARCH_SEC@-@VGCONF_OS@$(EXEEXT)
+ $(none_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LINK) $(none_@VGCONF_ARCH_SEC@_@VGCONF_OS@_OBJECTS) $(none_@VGCONF_ARCH_SEC@_@VGCONF_OS@_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/none_@VGCONF_ARCH_PRI@_@VGCONF_OS@-nl_main.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/none_@VGCONF_ARCH_SEC@_@VGCONF_OS@-nl_main.Po@am__quote@
+
+.c.o:
+@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
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+@am__fastdepCC_FALSE@ $(COMPILE) -c $<
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+.c.obj:
+@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
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+none_@VGCONF_ARCH_PRI@_@VGCONF_OS@-nl_main.o: nl_main.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CPPFLAGS) $(CPPFLAGS) $(none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CFLAGS) $(CFLAGS) -MT none_@VGCONF_ARCH_PRI@_@VGCONF_OS@-nl_main.o -MD -MP -MF $(DEPDIR)/none_@VGCONF_ARCH_PRI@_@VGCONF_OS@-nl_main.Tpo -c -o none_@VGCONF_ARCH_PRI@_@VGCONF_OS@-nl_main.o `test -f 'nl_main.c' || echo '$(srcdir)/'`nl_main.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/none_@VGCONF_ARCH_PRI@_@VGCONF_OS@-nl_main.Tpo $(DEPDIR)/none_@VGCONF_ARCH_PRI@_@VGCONF_OS@-nl_main.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='nl_main.c' object='none_@VGCONF_ARCH_PRI@_@VGCONF_OS@-nl_main.o' libtool=no @AMDEPBACKSLASH@
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+
+none_@VGCONF_ARCH_PRI@_@VGCONF_OS@-nl_main.obj: nl_main.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CPPFLAGS) $(CPPFLAGS) $(none_@VGCONF_ARCH_PRI@_@VGCONF_OS@_CFLAGS) $(CFLAGS) -MT none_@VGCONF_ARCH_PRI@_@VGCONF_OS@-nl_main.obj -MD -MP -MF $(DEPDIR)/none_@VGCONF_ARCH_PRI@_@VGCONF_OS@-nl_main.Tpo -c -o none_@VGCONF_ARCH_PRI@_@VGCONF_OS@-nl_main.obj `if test -f 'nl_main.c'; then $(CYGPATH_W) 'nl_main.c'; else $(CYGPATH_W) '$(srcdir)/nl_main.c'; fi`
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+
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+
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+
+# This directory's subdirectories are mostly independent; you can cd
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+ case $$f in \
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+ *k*) failcom='fail=yes';; \
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+ target=`echo $@ | sed s/-recursive//`; \
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+ctags: CTAGS
+CTAGS: ctags-recursive $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ test -z "$(CTAGS_ARGS)$$tags$$unique" \
+ || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
+ $$tags $$unique
+
+GTAGS:
+ here=`$(am__cd) $(top_builddir) && pwd` \
+ && cd $(top_srcdir) \
+ && gtags -i $(GTAGS_ARGS) $$here
+
+distclean-tags:
+ -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
+
+distdir: $(DISTFILES)
+ @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ list='$(DISTFILES)'; \
+ dist_files=`for file in $$list; do echo $$file; done | \
+ sed -e "s|^$$srcdirstrip/||;t" \
+ -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \
+ case $$dist_files in \
+ */*) $(MKDIR_P) `echo "$$dist_files" | \
+ sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \
+ sort -u` ;; \
+ esac; \
+ for file in $$dist_files; do \
+ if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \
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+ fi; \
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+ else \
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+ || exit 1; \
+ fi; \
+ done
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+ if test "$$subdir" = .; then :; else \
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+ || exit 1; \
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+ top_distdir=`$(am__cd) $(top_distdir) && pwd`; \
+ (cd $$subdir && \
+ $(MAKE) $(AM_MAKEFLAGS) \
+ top_distdir="$$top_distdir" \
+ distdir="$$distdir/$$subdir" \
+ am__remove_distdir=: \
+ am__skip_length_check=: \
+ distdir) \
+ || exit 1; \
+ fi; \
+ done
+check-am: all-am
+check: check-recursive
+all-am: Makefile $(PROGRAMS) all-local
+installdirs: installdirs-recursive
+installdirs-am:
+install: install-recursive
+install-exec: install-exec-recursive
+install-data: install-data-recursive
+uninstall: uninstall-recursive
+
+install-am: all-am
+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+
+installcheck: installcheck-recursive
+install-strip:
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+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+ `test -z '$(STRIP)' || \
+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
+ @echo "This command is intended for maintainers to use"
+ @echo "it deletes files that may require special tools to rebuild."
+clean: clean-recursive
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+clean-am: clean-generic clean-local clean-noinstPROGRAMS \
+ mostlyclean-am
+
+distclean: distclean-recursive
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+
+installcheck-am:
+
+maintainer-clean: maintainer-clean-recursive
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
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+mostlyclean: mostlyclean-recursive
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+mostlyclean-am: mostlyclean-compile mostlyclean-generic
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+pdf: pdf-recursive
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+ps: ps-recursive
+
+ps-am:
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+uninstall-am:
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+.MAKE: $(RECURSIVE_CLEAN_TARGETS) $(RECURSIVE_TARGETS) install-am \
+ install-strip
+
+.PHONY: $(RECURSIVE_CLEAN_TARGETS) $(RECURSIVE_TARGETS) CTAGS GTAGS \
+ all all-am all-local check check-am clean clean-generic \
+ clean-local clean-noinstPROGRAMS ctags ctags-recursive \
+ distclean distclean-compile distclean-generic distclean-tags \
+ distdir dvi dvi-am html html-am info info-am install \
+ install-am install-data install-data-am install-dvi \
+ install-dvi-am install-exec install-exec-am install-exec-local \
+ install-html install-html-am install-info install-info-am \
+ install-man install-pdf install-pdf-am install-ps \
+ install-ps-am install-strip installcheck installcheck-am \
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+ maintainer-clean-generic mostlyclean mostlyclean-compile \
+ mostlyclean-generic pdf pdf-am ps ps-am tags tags-recursive \
+ uninstall uninstall-am
+
+
+# This used to be required when Vex had a handwritten Makefile. It
+# shouldn't be needed any more, though.
+
+#----------------------------------------------------------------------------
+# noinst_PROGRAMS and noinst_DSYMS targets
+#----------------------------------------------------------------------------
+
+# On Darwin, for a program 'p', the DWARF debug info is stored in the
+# directory 'p.dSYM'. This must be generated after the executable is
+# created, with 'dsymutil p'. We could redefine LINK with a script that
+# executes 'dsymutil' after linking, but that's a pain. Instead we use this
+# hook so that every time "make check" is run, we subsequently invoke
+# 'dsymutil' on all the executables that lack a .dSYM directory, or that are
+# newer than their corresponding .dSYM directory.
+build-noinst_DSYMS: $(noinst_DSYMS)
+ for f in $(noinst_DSYMS); do \
+ if [ ! -e $$f.dSYM -o $$f -nt $$f.dSYM ] ; then \
+ echo "dsymutil $$f"; \
+ dsymutil $$f; \
+ fi; \
+ done
+
+# This is used by coregrind/Makefile.am and Makefile.tool.am for doing
+# "in-place" installs. It copies $(noinst_PROGRAMS) into $inplacedir.
+# It needs to be depended on by an 'all-local' rule.
+inplace-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_PROGRAMS) ; do \
+ rm -f $(inplacedir)/$$f; \
+ ln -f -s ../$(subdir)/$$f $(inplacedir); \
+ done
+
+# Similar to inplace-noinst_PROGRAMS
+inplace-noinst_DSYMS: build-noinst_DSYMS
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_DSYMS); do \
+ rm -f $(inplacedir)/$$f.dSYM; \
+ ln -f -s ../$(subdir)/$$f.dSYM $(inplacedir); \
+ done
+
+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
+# "make install". It copies $(noinst_PROGRAMS) into $prefix/lib/valgrind/.
+# It needs to be depended on by an 'install-exec-local' rule.
+install-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_PROGRAMS); do \
+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
+ done
+
+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
+# directories. XXX: not sure whether the resulting permissions will be
+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_DSYMS); do \
+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
+ done
+
+# This needs to be depended on by a 'clean-local' rule.
+clean-noinst_DSYMS:
+ for f in $(noinst_DSYMS); do \
+ rm -rf $$f.dSYM; \
+ done
+
+#----------------------------------------------------------------------------
+# General stuff
+#----------------------------------------------------------------------------
+
+all-local: inplace-noinst_PROGRAMS inplace-noinst_DSYMS
+
+clean-local: clean-noinst_DSYMS
+
+install-exec-local: install-noinst_PROGRAMS install-noinst_DSYMS
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
10
dir
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svn://svn.valgrind.org/valgrind/trunk/none/docs
svn://svn.valgrind.org/valgrind
10
dir
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svn://svn.valgrind.org/valgrind/trunk/none/tests
svn://svn.valgrind.org/valgrind
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-11401
-bart
+2010-10-11T18:55:24.778808Z
+11427
+sewardj
has-props
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# none/tests/Makefile. Generated from Makefile.in by configure.
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+
+
+# This file is used for tool tests, and also in perf/Makefile.am.
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
+
+
+
+pkgdatadir = $(datadir)/valgrind
+pkglibdir = $(libdir)/valgrind
+pkgincludedir = $(includedir)/valgrind
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+install_sh_DATA = $(install_sh) -c -m 644
+install_sh_PROGRAM = $(install_sh) -c
+install_sh_SCRIPT = $(install_sh) -c
+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+build_triplet = arm-unknown-linux-gnueabi
+host_triplet = arm-unknown-linux-gnueabi
+DIST_COMMON = $(dist_noinst_SCRIPTS) $(noinst_HEADERS) \
+ $(srcdir)/Makefile.am $(srcdir)/Makefile.in \
+ $(top_srcdir)/Makefile.all.am \
+ $(top_srcdir)/Makefile.tool-tests.am
+
+# Arch-specific tests.
+#am__append_1 = x86
+#am__append_2 = amd64
+#am__append_3 = ppc32
+#am__append_4 = ppc64
+am__append_5 = arm
+
+# OS-specific tests
+am__append_6 = linux
+#am__append_7 = darwin
+
+# Platform-specific tests
+#am__append_8 = x86-linux
+check_PROGRAMS = ansi$(EXEEXT) args$(EXEEXT) async-sigs$(EXEEXT) \
+ bitfield1$(EXEEXT) bug129866$(EXEEXT) closeall$(EXEEXT) \
+ coolo_strlen$(EXEEXT) discard$(EXEEXT) exec-sigmask$(EXEEXT) \
+ execve$(EXEEXT) faultstatus$(EXEEXT) fcntl_setown$(EXEEXT) \
+ fdleak_cmsg$(EXEEXT) fdleak_creat$(EXEEXT) fdleak_dup$(EXEEXT) \
+ fdleak_dup2$(EXEEXT) fdleak_fcntl$(EXEEXT) \
+ fdleak_ipv4$(EXEEXT) fdleak_open$(EXEEXT) fdleak_pipe$(EXEEXT) \
+ fdleak_socketpair$(EXEEXT) floored$(EXEEXT) fork$(EXEEXT) \
+ fucomip$(EXEEXT) munmap_exe$(EXEEXT) map_unaligned$(EXEEXT) \
+ map_unmap$(EXEEXT) mq$(EXEEXT) nestedfns$(EXEEXT) \
+ pending$(EXEEXT) procfs-cmdline-exe$(EXEEXT) \
+ pth_atfork1$(EXEEXT) pth_blockedsig$(EXEEXT) \
+ pth_cancel1$(EXEEXT) pth_cancel2$(EXEEXT) \
+ pth_cvsimple$(EXEEXT) pth_empty$(EXEEXT) pth_exit$(EXEEXT) \
+ pth_exit2$(EXEEXT) pth_mutexspeed$(EXEEXT) pth_once$(EXEEXT) \
+ pth_rwlock$(EXEEXT) pth_stackalign$(EXEEXT) rcrl$(EXEEXT) \
+ readline1$(EXEEXT) require-text-symbol$(EXEEXT) \
+ res_search$(EXEEXT) resolv$(EXEEXT) rlimit_nofile$(EXEEXT) \
+ selfrun$(EXEEXT) sem$(EXEEXT) semlimit$(EXEEXT) \
+ sha1_test$(EXEEXT) shortpush$(EXEEXT) shorts$(EXEEXT) \
+ stackgrowth$(EXEEXT) sigstackgrowth$(EXEEXT) \
+ syscall-restart1$(EXEEXT) syscall-restart2$(EXEEXT) \
+ syslog$(EXEEXT) system$(EXEEXT) threaded-fork$(EXEEXT) \
+ threadederrno$(EXEEXT) timestamp$(EXEEXT) tls$(EXEEXT) \
+ tls.so$(EXEEXT) tls2.so$(EXEEXT) valgrind_cpp_test$(EXEEXT) \
+ vgprintf$(EXEEXT) coolo_sigaction$(EXEEXT) gxx304$(EXEEXT) \
+ $(am__EXEEXT_1)
+
+# DDD:
+# - manythreads and thread-exits have lots of this:
+# --61831:0:aspacem sync_check_mapping_callback: segment mismatch:
+# kernel's seg:
+# --61831:0:aspacem start=0x102538000 end=0x1025b7fff prot=3 dev=0 ino=0
+# offset=0 name="(none)"
+# --61831:0:aspacem sync_check_mapping_callback: segment mismatch: V's seg:
+# --61831:0:aspacem NSegment{ , start=0x10067a000, end=0x109a1efff,
+# smode=SmFixed, dev=0, ino=0, offset=0, fnIdx=-1, hasR=0,
+# hasW=0, hasX=0, hasT=0, mark=0, name="(none)"}
+am__append_9 = \
+ manythreads \
+ thread-exits
+
+subdir = none/tests
+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
+am__aclocal_m4_deps = $(top_srcdir)/configure.in
+am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
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+mkinstalldirs = $(install_sh) -d
+CONFIG_HEADER = $(top_builddir)/config.h
+CONFIG_CLEAN_FILES =
+am__EXEEXT_1 = manythreads$(EXEEXT) \
+ thread-exits$(EXEEXT)
+ansi_SOURCES = ansi.c
+ansi_OBJECTS = ansi-ansi.$(OBJEXT)
+ansi_LDADD = $(LDADD)
+ansi_LINK = $(CCLD) $(ansi_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) \
+ -o $@
+args_SOURCES = args.c
+args_OBJECTS = args.$(OBJEXT)
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+exec_sigmask_LDADD = $(LDADD)
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+fcntl_setown_OBJECTS = fcntl_setown.$(OBJEXT)
+fcntl_setown_LDADD = $(LDADD)
+fdleak_cmsg_SOURCES = fdleak_cmsg.c
+fdleak_cmsg_OBJECTS = fdleak_cmsg.$(OBJEXT)
+fdleak_cmsg_LDADD = $(LDADD)
+fdleak_creat_SOURCES = fdleak_creat.c
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+fdleak_creat_LDADD = $(LDADD)
+fdleak_dup_SOURCES = fdleak_dup.c
+fdleak_dup_OBJECTS = fdleak_dup.$(OBJEXT)
+fdleak_dup_LDADD = $(LDADD)
+fdleak_dup2_SOURCES = fdleak_dup2.c
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+fdleak_fcntl_SOURCES = fdleak_fcntl.c
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+fdleak_fcntl_LDADD = $(LDADD)
+fdleak_ipv4_SOURCES = fdleak_ipv4.c
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+fdleak_pipe_SOURCES = fdleak_pipe.c
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+fdleak_pipe_LDADD = $(LDADD)
+fdleak_socketpair_SOURCES = fdleak_socketpair.c
+fdleak_socketpair_OBJECTS = fdleak_socketpair.$(OBJEXT)
+fdleak_socketpair_LDADD = $(LDADD)
+floored_SOURCES = floored.c
+floored_OBJECTS = floored.$(OBJEXT)
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+fork_SOURCES = fork.c
+fork_OBJECTS = fork.$(OBJEXT)
+fork_LDADD = $(LDADD)
+fucomip_SOURCES = fucomip.c
+fucomip_OBJECTS = fucomip.$(OBJEXT)
+fucomip_LDADD = $(LDADD)
+am_gxx304_OBJECTS = gxx304.$(OBJEXT)
+gxx304_OBJECTS = $(am_gxx304_OBJECTS)
+gxx304_LDADD = $(LDADD)
+manythreads_SOURCES = manythreads.c
+manythreads_OBJECTS = manythreads.$(OBJEXT)
+manythreads_DEPENDENCIES =
+map_unaligned_SOURCES = map_unaligned.c
+map_unaligned_OBJECTS = map_unaligned.$(OBJEXT)
+map_unaligned_LDADD = $(LDADD)
+map_unmap_SOURCES = map_unmap.c
+map_unmap_OBJECTS = map_unmap.$(OBJEXT)
+map_unmap_LDADD = $(LDADD)
+mq_SOURCES = mq.c
+mq_OBJECTS = mq.$(OBJEXT)
+mq_DEPENDENCIES =
+munmap_exe_SOURCES = munmap_exe.c
+munmap_exe_OBJECTS = munmap_exe.$(OBJEXT)
+munmap_exe_LDADD = $(LDADD)
+nestedfns_SOURCES = nestedfns.c
+nestedfns_OBJECTS = nestedfns-nestedfns.$(OBJEXT)
+nestedfns_LDADD = $(LDADD)
+nestedfns_LINK = $(CCLD) $(nestedfns_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
+ $(LDFLAGS) -o $@
+pending_SOURCES = pending.c
+pending_OBJECTS = pending.$(OBJEXT)
+pending_LDADD = $(LDADD)
+procfs_cmdline_exe_SOURCES = procfs-cmdline-exe.c
+procfs_cmdline_exe_OBJECTS = procfs-cmdline-exe.$(OBJEXT)
+procfs_cmdline_exe_LDADD = $(LDADD)
+pth_atfork1_SOURCES = pth_atfork1.c
+pth_atfork1_OBJECTS = pth_atfork1.$(OBJEXT)
+pth_atfork1_DEPENDENCIES =
+pth_blockedsig_SOURCES = pth_blockedsig.c
+pth_blockedsig_OBJECTS = pth_blockedsig.$(OBJEXT)
+pth_blockedsig_DEPENDENCIES =
+pth_cancel1_SOURCES = pth_cancel1.c
+pth_cancel1_OBJECTS = pth_cancel1-pth_cancel1.$(OBJEXT)
+pth_cancel1_DEPENDENCIES =
+pth_cancel1_LINK = $(CCLD) $(pth_cancel1_CFLAGS) $(CFLAGS) \
+ $(AM_LDFLAGS) $(LDFLAGS) -o $@
+pth_cancel2_SOURCES = pth_cancel2.c
+pth_cancel2_OBJECTS = pth_cancel2.$(OBJEXT)
+pth_cancel2_DEPENDENCIES =
+pth_cvsimple_SOURCES = pth_cvsimple.c
+pth_cvsimple_OBJECTS = pth_cvsimple.$(OBJEXT)
+pth_cvsimple_DEPENDENCIES =
+pth_empty_SOURCES = pth_empty.c
+pth_empty_OBJECTS = pth_empty.$(OBJEXT)
+pth_empty_DEPENDENCIES =
+pth_exit_SOURCES = pth_exit.c
+pth_exit_OBJECTS = pth_exit.$(OBJEXT)
+pth_exit_DEPENDENCIES =
+pth_exit2_SOURCES = pth_exit2.c
+pth_exit2_OBJECTS = pth_exit2.$(OBJEXT)
+pth_exit2_DEPENDENCIES =
+pth_mutexspeed_SOURCES = pth_mutexspeed.c
+pth_mutexspeed_OBJECTS = pth_mutexspeed.$(OBJEXT)
+pth_mutexspeed_DEPENDENCIES =
+pth_once_SOURCES = pth_once.c
+pth_once_OBJECTS = pth_once.$(OBJEXT)
+pth_once_DEPENDENCIES =
+pth_rwlock_SOURCES = pth_rwlock.c
+pth_rwlock_OBJECTS = pth_rwlock.$(OBJEXT)
+pth_rwlock_DEPENDENCIES =
+pth_stackalign_SOURCES = pth_stackalign.c
+pth_stackalign_OBJECTS = pth_stackalign.$(OBJEXT)
+pth_stackalign_DEPENDENCIES =
+rcrl_SOURCES = rcrl.c
+rcrl_OBJECTS = rcrl.$(OBJEXT)
+rcrl_LDADD = $(LDADD)
+readline1_SOURCES = readline1.c
+readline1_OBJECTS = readline1.$(OBJEXT)
+readline1_LDADD = $(LDADD)
+require_text_symbol_SOURCES = require-text-symbol.c
+require_text_symbol_OBJECTS = require-text-symbol.$(OBJEXT)
+require_text_symbol_LDADD = $(LDADD)
+res_search_SOURCES = res_search.c
+res_search_OBJECTS = res_search.$(OBJEXT)
+res_search_DEPENDENCIES =
+resolv_SOURCES = resolv.c
+resolv_OBJECTS = resolv.$(OBJEXT)
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+rlimit_nofile_LDADD = $(LDADD)
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+sha1_test_OBJECTS = sha1_test.$(OBJEXT)
+sha1_test_LDADD = $(LDADD)
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+syslog_SOURCES = syslog.c
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+syslog_LDADD = $(LDADD)
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+system_OBJECTS = system.$(OBJEXT)
+system_LDADD = $(LDADD)
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+thread_exits_DEPENDENCIES =
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+threaded_fork_OBJECTS = threaded-fork.$(OBJEXT)
+threaded_fork_DEPENDENCIES =
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+timestamp_LDADD = $(LDADD)
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+tls_OBJECTS = $(am_tls_OBJECTS)
+tls_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(tls_LDFLAGS) $(LDFLAGS) -o \
+ $@
+am_tls_so_OBJECTS = tls_so-tls_so.$(OBJEXT)
+tls_so_OBJECTS = $(am_tls_so_OBJECTS)
+tls_so_LINK = $(CCLD) $(tls_so_CFLAGS) $(CFLAGS) $(tls_so_LDFLAGS) \
+ $(LDFLAGS) -o $@
+am_tls2_so_OBJECTS = tls2_so.$(OBJEXT)
+tls2_so_OBJECTS = $(am_tls2_so_OBJECTS)
+tls2_so_LDADD = $(LDADD)
+tls2_so_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(tls2_so_LDFLAGS) \
+ $(LDFLAGS) -o $@
+am_valgrind_cpp_test_OBJECTS = valgrind_cpp_test.$(OBJEXT)
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+LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) -o $@
+CXXCOMPILE = $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \
+ $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CXXFLAGS) $(CXXFLAGS)
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+ -o $@
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+ closeall.c $(coolo_sigaction_SOURCES) coolo_strlen.c discard.c \
+ exec-sigmask.c execve.c faultstatus.c fcntl_setown.c \
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+ fdleak_socketpair.c floored.c fork.c fucomip.c \
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+ pth_atfork1.c pth_blockedsig.c pth_cancel1.c pth_cancel2.c \
+ pth_cvsimple.c pth_empty.c pth_exit.c pth_exit2.c \
+ pth_mutexspeed.c pth_once.c pth_rwlock.c pth_stackalign.c \
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+ shortpush.c shorts.c sigstackgrowth.c stackgrowth.c \
+ syscall-restart1.c syscall-restart2.c syslog.c system.c \
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+ $(tls_SOURCES) $(tls_so_SOURCES) $(tls2_so_SOURCES) \
+ $(valgrind_cpp_test_SOURCES) vgprintf.c
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+ fdleak_fcntl.c fdleak_ipv4.c fdleak_open.c fdleak_pipe.c \
+ fdleak_socketpair.c floored.c fork.c fucomip.c \
+ $(gxx304_SOURCES) manythreads.c map_unaligned.c map_unmap.c \
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+ pth_cvsimple.c pth_empty.c pth_exit.c pth_exit2.c \
+ pth_mutexspeed.c pth_once.c pth_rwlock.c pth_stackalign.c \
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+ rlimit_nofile.c selfrun.c sem.c semlimit.c sha1_test.c \
+ shortpush.c shorts.c sigstackgrowth.c stackgrowth.c \
+ syscall-restart1.c syscall-restart2.c syslog.c system.c \
+ thread-exits.c threaded-fork.c threadederrno.c timestamp.c \
+ $(tls_SOURCES) $(tls_so_SOURCES) $(tls2_so_SOURCES) \
+ $(valgrind_cpp_test_SOURCES) vgprintf.c
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+ html-recursive info-recursive install-data-recursive \
+ install-dvi-recursive install-exec-recursive \
+ install-html-recursive install-info-recursive \
+ install-pdf-recursive install-ps-recursive install-recursive \
+ installcheck-recursive installdirs-recursive pdf-recursive \
+ ps-recursive uninstall-recursive
+HEADERS = $(noinst_HEADERS)
+RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
+ distclean-recursive maintainer-clean-recursive
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+dvidir = ${docdir}
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+top_builddir = ../..
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+#----------------------------------------------------------------------------
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+# Baseline flags for all compilations. Aim here is to maximise
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+ -Wno-format-zero-length \
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+
+AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
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+#AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
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+
+# Flags for specific targets.
+#
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+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
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+#AM_CPPFLAGS_ = \
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+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) -g
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+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) -g
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+AM_FLAG_M3264_PPC64_AIX5 =
+AM_CFLAGS_PPC64_AIX5 = -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
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+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
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+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
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+# Flags for the primary target. These must be used to build the
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+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_ARM_LINUX)
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+#AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_)
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+# Baseline link flags for making vgpreload shared objects.
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+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
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+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
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+# Nb: Tools need to augment these flags with an arch-selection option, such
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+AM_CXXFLAGS = -Winline -Wall -Wshadow -g $(AM_FLAG_M3264_PRI)
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
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+ $(am__append_7) $(am__append_8)
+DIST_SUBDIRS = x86 amd64 ppc32 ppc64 arm linux darwin x86-linux .
+dist_noinst_SCRIPTS = \
+ filter_cmdline0 \
+ filter_cmdline1 \
+ filter_fdleak \
+ filter_linenos \
+ filter_none_discards \
+ filter_stderr \
+ filter_timestamp
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+ args.stderr.exp args.stdout.exp args.vgtest \
+ async-sigs.stderr.exp async-sigs.vgtest \
+ bitfield1.stderr.exp bitfield1.vgtest \
+ bug129866.vgtest bug129866.stderr.exp bug129866.stdout.exp \
+ closeall.stderr.exp closeall.vgtest \
+ cmdline0.stderr.exp cmdline0.stdout.exp cmdline0.vgtest \
+ cmdline1.stderr.exp cmdline1.stdout.exp cmdline1.vgtest \
+ cmdline2.stderr.exp cmdline2.stdout.exp cmdline2.vgtest \
+ cmdline3.stderr.exp cmdline3.vgtest \
+ cmdline4.stderr.exp cmdline4.vgtest \
+ cmdline5.stderr.exp cmdline5.vgtest \
+ cmdline6.stderr.exp cmdline6.vgtest \
+ cmd-with-special.stderr.exp cmd-with-special.vgtest \
+ coolo_sigaction.stderr.exp \
+ coolo_sigaction.stdout.exp coolo_sigaction.vgtest \
+ coolo_strlen.stderr.exp coolo_strlen.vgtest \
+ discard.stderr.exp discard.stdout.exp \
+ discard.vgtest \
+ exec-sigmask.vgtest exec-sigmask.stdout.exp \
+ exec-sigmask.stdout.exp2 exec-sigmask.stdout.exp3 exec-sigmask.stderr.exp \
+ execve.vgtest execve.stdout.exp execve.stderr.exp \
+ faultstatus.vgtest faultstatus.stderr.exp \
+ fcntl_setown.vgtest fcntl_setown.stdout.exp fcntl_setown.stderr.exp \
+ fdleak_cmsg.stderr.exp fdleak_cmsg.vgtest \
+ fdleak_creat.stderr.exp fdleak_creat.vgtest \
+ fdleak_dup.stderr.exp fdleak_dup.vgtest \
+ fdleak_dup2.stderr.exp fdleak_dup2.vgtest \
+ fdleak_fcntl.stderr.exp fdleak_fcntl.vgtest \
+ fdleak_ipv4.stderr.exp fdleak_ipv4.stdout.exp fdleak_ipv4.vgtest \
+ fdleak_open.stderr.exp fdleak_open.vgtest \
+ fdleak_pipe.stderr.exp fdleak_pipe.vgtest \
+ fdleak_socketpair.stderr.exp fdleak_socketpair.vgtest \
+ floored.stderr.exp floored.stdout.exp floored.vgtest \
+ fork.stderr.exp fork.stdout.exp fork.vgtest \
+ fucomip.stderr.exp fucomip.vgtest \
+ gxx304.stderr.exp gxx304.vgtest \
+ manythreads.stdout.exp manythreads.stderr.exp manythreads.vgtest \
+ map_unaligned.stderr.exp map_unaligned.vgtest \
+ map_unmap.stderr.exp map_unmap.stdout.exp map_unmap.vgtest \
+ mq.stderr.exp mq.vgtest \
+ munmap_exe.stderr.exp munmap_exe.vgtest \
+ nestedfns.stderr.exp nestedfns.stdout.exp nestedfns.vgtest \
+ pending.stdout.exp pending.stderr.exp pending.vgtest \
+ procfs-linux.stderr.exp-with-readlinkat \
+ procfs-linux.stderr.exp-without-readlinkat \
+ procfs-linux.vgtest \
+ procfs-non-linux.stderr.exp procfs-non-linux.vgtest \
+ pth_atfork1.stderr.exp pth_atfork1.stdout.exp pth_atfork1.vgtest \
+ pth_blockedsig.stderr.exp \
+ pth_blockedsig.stdout.exp pth_blockedsig.vgtest \
+ pth_cancel1.stderr.exp pth_cancel1.stdout.exp pth_cancel1.vgtest \
+ pth_cancel2.stderr.exp pth_cancel2.vgtest \
+ pth_cvsimple.stderr.exp pth_cvsimple.stdout.exp pth_cvsimple.vgtest \
+ pth_empty.stderr.exp pth_empty.vgtest \
+ pth_exit.stderr.exp pth_exit.vgtest \
+ pth_exit2.stderr.exp pth_exit2.vgtest \
+ pth_mutexspeed.stderr.exp \
+ pth_mutexspeed.stdout.exp pth_mutexspeed.vgtest \
+ pth_once.stderr.exp pth_once.stdout.exp pth_once.vgtest \
+ pth_rwlock.stderr.exp pth_rwlock.vgtest \
+ pth_stackalign.stderr.exp \
+ pth_stackalign.stdout.exp pth_stackalign.vgtest \
+ rcrl.stderr.exp rcrl.stdout.exp rcrl.vgtest \
+ readline1.stderr.exp readline1.stdout.exp \
+ readline1.vgtest \
+ require-text-symbol-1.vgtest \
+ require-text-symbol-1.stderr.exp \
+ require-text-symbol-2.vgtest \
+ require-text-symbol-2.stderr.exp-libcso6 \
+ res_search.stderr.exp res_search.stdout.exp res_search.vgtest \
+ resolv.stderr.exp resolv.stdout.exp resolv.vgtest \
+ rlimit_nofile.stderr.exp rlimit_nofile.stdout.exp rlimit_nofile.vgtest \
+ selfrun.stderr.exp selfrun.stdout.exp selfrun.vgtest \
+ sem.stderr.exp sem.stdout.exp sem.vgtest \
+ semlimit.stderr.exp semlimit.stdout.exp semlimit.vgtest \
+ shell shell.vgtest shell.stderr.exp shell.stderr.exp-dash \
+ shell.stdout.exp \
+ shell_badinterp shell_badinterp.vgtest shell_badinterp.stderr.exp \
+ shell_binaryfile shell_binaryfile.vgtest shell_binaryfile.stderr.exp \
+ shell_dir.vgtest shell_dir.stderr.exp \
+ shell_nonexec.vgtest shell_nonexec.stderr.exp \
+ shell_nosuchfile.vgtest shell_nosuchfile.stderr.exp \
+ shell_valid1 shell_valid1.vgtest shell_valid1.stderr.exp \
+ shell_valid2 shell_valid2.vgtest shell_valid2.stderr.exp \
+ shell_valid3 shell_valid3.vgtest shell_valid3.stderr.exp \
+ shell_zerolength shell_zerolength.vgtest shell_zerolength.stderr.exp \
+ shell_zerolength.stderr.exp-dash \
+ sha1_test.stderr.exp sha1_test.vgtest \
+ shortpush.stderr.exp shortpush.vgtest \
+ shorts.stderr.exp shorts.vgtest \
+ sigstackgrowth.stdout.exp sigstackgrowth.stderr.exp sigstackgrowth.vgtest \
+ stackgrowth.stdout.exp stackgrowth.stderr.exp stackgrowth.vgtest \
+ syscall-restart1.vgtest syscall-restart1.stdout.exp syscall-restart1.stderr.exp \
+ syscall-restart2.vgtest syscall-restart2.stdout.exp syscall-restart2.stderr.exp \
+ syslog.vgtest syslog.stderr.exp \
+ system.stderr.exp system.vgtest \
+ thread-exits.stderr.exp thread-exits.stdout.exp thread-exits.vgtest \
+ threaded-fork.stderr.exp threaded-fork.stdout.exp threaded-fork.vgtest \
+ threadederrno.stderr.exp threadederrno.stdout.exp \
+ threadederrno.vgtest \
+ timestamp.stderr.exp timestamp.vgtest \
+ tls.vgtest tls.stderr.exp tls.stdout.exp \
+ vgprintf.stderr.exp vgprintf.vgtest
+
+
+# Extra stuff for C tests
+ansi_CFLAGS = $(AM_CFLAGS) -ansi
+floored_LDADD = -lm
+manythreads_LDADD = -lpthread
+nestedfns_CFLAGS = $(AM_CFLAGS)
+#nestedfns_CFLAGS = $(AM_CFLAGS) -fnested-functions
+mq_LDADD = -lrt
+pth_atfork1_LDADD = -lpthread
+pth_blockedsig_LDADD = -lpthread
+pth_cancel1_CFLAGS = $(AM_CFLAGS) -Wno-shadow
+pth_cancel1_LDADD = -lpthread
+pth_cancel2_LDADD = -lpthread
+pth_cvsimple_LDADD = -lpthread
+pth_empty_LDADD = -lpthread
+pth_exit_LDADD = -lpthread
+pth_exit2_LDADD = -lpthread
+pth_mutexspeed_LDADD = -lpthread
+pth_once_LDADD = -lpthread
+pth_rwlock_LDADD = -lpthread
+pth_stackalign_LDADD = -lpthread
+res_search_LDADD = -lresolv -lpthread
+#res_search_LDADD = -lpthread
+resolv_LDADD = -lresolv -lpthread
+semlimit_LDADD = -lpthread
+thread_exits_LDADD = -lpthread
+threaded_fork_LDADD = -lpthread
+threadederrno_LDADD = -lpthread
+tls_SOURCES = tls.c tls2.c
+tls_DEPENDENCIES = tls.so tls2.so
+tls_LDFLAGS = -Wl,-rpath,$(top_builddir)/none/tests
+#tls_LDFLAGS =
+tls_LDADD = tls.so tls2.so -lpthread
+tls_so_SOURCES = tls_so.c
+tls_so_DEPENDENCIES = tls2.so
+tls_so_LDFLAGS = -Wl,-rpath,$(top_builddir)/none/tests -shared -fPIC
+#tls_so_LDFLAGS = -dynamic -dynamiclib -all_load -fpic
+#tls_so_LDFLAGS = -shared -fPIC
+tls_so_LDADD = tls2.so
+#tls_so_LDADD = `pwd`/tls2.so
+#tls_so_LDADD = `pwd`/tls2.so
+tls_so_CFLAGS = $(AM_CFLAGS) -fPIC
+tls2_so_SOURCES = tls2_so.c
+tls2_so_LDFLAGS = -shared
+#tls2_so_LDFLAGS = -dynamic -dynamiclib -all_load
+valgrind_cpp_test_SOURCES = valgrind_cpp_test.cpp
+valgrind_cpp_test_LDADD = -lstdc++
+
+# C++ tests
+coolo_sigaction_SOURCES = coolo_sigaction.cpp
+gxx304_SOURCES = gxx304.cpp
+all: all-recursive
+
+.SUFFIXES:
+.SUFFIXES: .c .cpp .o .obj
+$(srcdir)/Makefile.in: # $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: # $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): # $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
+ -test -z "$(check_PROGRAMS)" || rm -f $(check_PROGRAMS)
+ansi$(EXEEXT): $(ansi_OBJECTS) $(ansi_DEPENDENCIES)
+ @rm -f ansi$(EXEEXT)
+ $(ansi_LINK) $(ansi_OBJECTS) $(ansi_LDADD) $(LIBS)
+args$(EXEEXT): $(args_OBJECTS) $(args_DEPENDENCIES)
+ @rm -f args$(EXEEXT)
+ $(LINK) $(args_OBJECTS) $(args_LDADD) $(LIBS)
+async-sigs$(EXEEXT): $(async_sigs_OBJECTS) $(async_sigs_DEPENDENCIES)
+ @rm -f async-sigs$(EXEEXT)
+ $(LINK) $(async_sigs_OBJECTS) $(async_sigs_LDADD) $(LIBS)
+bitfield1$(EXEEXT): $(bitfield1_OBJECTS) $(bitfield1_DEPENDENCIES)
+ @rm -f bitfield1$(EXEEXT)
+ $(LINK) $(bitfield1_OBJECTS) $(bitfield1_LDADD) $(LIBS)
+bug129866$(EXEEXT): $(bug129866_OBJECTS) $(bug129866_DEPENDENCIES)
+ @rm -f bug129866$(EXEEXT)
+ $(LINK) $(bug129866_OBJECTS) $(bug129866_LDADD) $(LIBS)
+closeall$(EXEEXT): $(closeall_OBJECTS) $(closeall_DEPENDENCIES)
+ @rm -f closeall$(EXEEXT)
+ $(LINK) $(closeall_OBJECTS) $(closeall_LDADD) $(LIBS)
+coolo_sigaction$(EXEEXT): $(coolo_sigaction_OBJECTS) $(coolo_sigaction_DEPENDENCIES)
+ @rm -f coolo_sigaction$(EXEEXT)
+ $(CXXLINK) $(coolo_sigaction_OBJECTS) $(coolo_sigaction_LDADD) $(LIBS)
+coolo_strlen$(EXEEXT): $(coolo_strlen_OBJECTS) $(coolo_strlen_DEPENDENCIES)
+ @rm -f coolo_strlen$(EXEEXT)
+ $(LINK) $(coolo_strlen_OBJECTS) $(coolo_strlen_LDADD) $(LIBS)
+discard$(EXEEXT): $(discard_OBJECTS) $(discard_DEPENDENCIES)
+ @rm -f discard$(EXEEXT)
+ $(LINK) $(discard_OBJECTS) $(discard_LDADD) $(LIBS)
+exec-sigmask$(EXEEXT): $(exec_sigmask_OBJECTS) $(exec_sigmask_DEPENDENCIES)
+ @rm -f exec-sigmask$(EXEEXT)
+ $(LINK) $(exec_sigmask_OBJECTS) $(exec_sigmask_LDADD) $(LIBS)
+execve$(EXEEXT): $(execve_OBJECTS) $(execve_DEPENDENCIES)
+ @rm -f execve$(EXEEXT)
+ $(LINK) $(execve_OBJECTS) $(execve_LDADD) $(LIBS)
+faultstatus$(EXEEXT): $(faultstatus_OBJECTS) $(faultstatus_DEPENDENCIES)
+ @rm -f faultstatus$(EXEEXT)
+ $(LINK) $(faultstatus_OBJECTS) $(faultstatus_LDADD) $(LIBS)
+fcntl_setown$(EXEEXT): $(fcntl_setown_OBJECTS) $(fcntl_setown_DEPENDENCIES)
+ @rm -f fcntl_setown$(EXEEXT)
+ $(LINK) $(fcntl_setown_OBJECTS) $(fcntl_setown_LDADD) $(LIBS)
+fdleak_cmsg$(EXEEXT): $(fdleak_cmsg_OBJECTS) $(fdleak_cmsg_DEPENDENCIES)
+ @rm -f fdleak_cmsg$(EXEEXT)
+ $(LINK) $(fdleak_cmsg_OBJECTS) $(fdleak_cmsg_LDADD) $(LIBS)
+fdleak_creat$(EXEEXT): $(fdleak_creat_OBJECTS) $(fdleak_creat_DEPENDENCIES)
+ @rm -f fdleak_creat$(EXEEXT)
+ $(LINK) $(fdleak_creat_OBJECTS) $(fdleak_creat_LDADD) $(LIBS)
+fdleak_dup$(EXEEXT): $(fdleak_dup_OBJECTS) $(fdleak_dup_DEPENDENCIES)
+ @rm -f fdleak_dup$(EXEEXT)
+ $(LINK) $(fdleak_dup_OBJECTS) $(fdleak_dup_LDADD) $(LIBS)
+fdleak_dup2$(EXEEXT): $(fdleak_dup2_OBJECTS) $(fdleak_dup2_DEPENDENCIES)
+ @rm -f fdleak_dup2$(EXEEXT)
+ $(LINK) $(fdleak_dup2_OBJECTS) $(fdleak_dup2_LDADD) $(LIBS)
+fdleak_fcntl$(EXEEXT): $(fdleak_fcntl_OBJECTS) $(fdleak_fcntl_DEPENDENCIES)
+ @rm -f fdleak_fcntl$(EXEEXT)
+ $(LINK) $(fdleak_fcntl_OBJECTS) $(fdleak_fcntl_LDADD) $(LIBS)
+fdleak_ipv4$(EXEEXT): $(fdleak_ipv4_OBJECTS) $(fdleak_ipv4_DEPENDENCIES)
+ @rm -f fdleak_ipv4$(EXEEXT)
+ $(LINK) $(fdleak_ipv4_OBJECTS) $(fdleak_ipv4_LDADD) $(LIBS)
+fdleak_open$(EXEEXT): $(fdleak_open_OBJECTS) $(fdleak_open_DEPENDENCIES)
+ @rm -f fdleak_open$(EXEEXT)
+ $(LINK) $(fdleak_open_OBJECTS) $(fdleak_open_LDADD) $(LIBS)
+fdleak_pipe$(EXEEXT): $(fdleak_pipe_OBJECTS) $(fdleak_pipe_DEPENDENCIES)
+ @rm -f fdleak_pipe$(EXEEXT)
+ $(LINK) $(fdleak_pipe_OBJECTS) $(fdleak_pipe_LDADD) $(LIBS)
+fdleak_socketpair$(EXEEXT): $(fdleak_socketpair_OBJECTS) $(fdleak_socketpair_DEPENDENCIES)
+ @rm -f fdleak_socketpair$(EXEEXT)
+ $(LINK) $(fdleak_socketpair_OBJECTS) $(fdleak_socketpair_LDADD) $(LIBS)
+floored$(EXEEXT): $(floored_OBJECTS) $(floored_DEPENDENCIES)
+ @rm -f floored$(EXEEXT)
+ $(LINK) $(floored_OBJECTS) $(floored_LDADD) $(LIBS)
+fork$(EXEEXT): $(fork_OBJECTS) $(fork_DEPENDENCIES)
+ @rm -f fork$(EXEEXT)
+ $(LINK) $(fork_OBJECTS) $(fork_LDADD) $(LIBS)
+fucomip$(EXEEXT): $(fucomip_OBJECTS) $(fucomip_DEPENDENCIES)
+ @rm -f fucomip$(EXEEXT)
+ $(LINK) $(fucomip_OBJECTS) $(fucomip_LDADD) $(LIBS)
+gxx304$(EXEEXT): $(gxx304_OBJECTS) $(gxx304_DEPENDENCIES)
+ @rm -f gxx304$(EXEEXT)
+ $(CXXLINK) $(gxx304_OBJECTS) $(gxx304_LDADD) $(LIBS)
+manythreads$(EXEEXT): $(manythreads_OBJECTS) $(manythreads_DEPENDENCIES)
+ @rm -f manythreads$(EXEEXT)
+ $(LINK) $(manythreads_OBJECTS) $(manythreads_LDADD) $(LIBS)
+map_unaligned$(EXEEXT): $(map_unaligned_OBJECTS) $(map_unaligned_DEPENDENCIES)
+ @rm -f map_unaligned$(EXEEXT)
+ $(LINK) $(map_unaligned_OBJECTS) $(map_unaligned_LDADD) $(LIBS)
+map_unmap$(EXEEXT): $(map_unmap_OBJECTS) $(map_unmap_DEPENDENCIES)
+ @rm -f map_unmap$(EXEEXT)
+ $(LINK) $(map_unmap_OBJECTS) $(map_unmap_LDADD) $(LIBS)
+mq$(EXEEXT): $(mq_OBJECTS) $(mq_DEPENDENCIES)
+ @rm -f mq$(EXEEXT)
+ $(LINK) $(mq_OBJECTS) $(mq_LDADD) $(LIBS)
+munmap_exe$(EXEEXT): $(munmap_exe_OBJECTS) $(munmap_exe_DEPENDENCIES)
+ @rm -f munmap_exe$(EXEEXT)
+ $(LINK) $(munmap_exe_OBJECTS) $(munmap_exe_LDADD) $(LIBS)
+nestedfns$(EXEEXT): $(nestedfns_OBJECTS) $(nestedfns_DEPENDENCIES)
+ @rm -f nestedfns$(EXEEXT)
+ $(nestedfns_LINK) $(nestedfns_OBJECTS) $(nestedfns_LDADD) $(LIBS)
+pending$(EXEEXT): $(pending_OBJECTS) $(pending_DEPENDENCIES)
+ @rm -f pending$(EXEEXT)
+ $(LINK) $(pending_OBJECTS) $(pending_LDADD) $(LIBS)
+procfs-cmdline-exe$(EXEEXT): $(procfs_cmdline_exe_OBJECTS) $(procfs_cmdline_exe_DEPENDENCIES)
+ @rm -f procfs-cmdline-exe$(EXEEXT)
+ $(LINK) $(procfs_cmdline_exe_OBJECTS) $(procfs_cmdline_exe_LDADD) $(LIBS)
+pth_atfork1$(EXEEXT): $(pth_atfork1_OBJECTS) $(pth_atfork1_DEPENDENCIES)
+ @rm -f pth_atfork1$(EXEEXT)
+ $(LINK) $(pth_atfork1_OBJECTS) $(pth_atfork1_LDADD) $(LIBS)
+pth_blockedsig$(EXEEXT): $(pth_blockedsig_OBJECTS) $(pth_blockedsig_DEPENDENCIES)
+ @rm -f pth_blockedsig$(EXEEXT)
+ $(LINK) $(pth_blockedsig_OBJECTS) $(pth_blockedsig_LDADD) $(LIBS)
+pth_cancel1$(EXEEXT): $(pth_cancel1_OBJECTS) $(pth_cancel1_DEPENDENCIES)
+ @rm -f pth_cancel1$(EXEEXT)
+ $(pth_cancel1_LINK) $(pth_cancel1_OBJECTS) $(pth_cancel1_LDADD) $(LIBS)
+pth_cancel2$(EXEEXT): $(pth_cancel2_OBJECTS) $(pth_cancel2_DEPENDENCIES)
+ @rm -f pth_cancel2$(EXEEXT)
+ $(LINK) $(pth_cancel2_OBJECTS) $(pth_cancel2_LDADD) $(LIBS)
+pth_cvsimple$(EXEEXT): $(pth_cvsimple_OBJECTS) $(pth_cvsimple_DEPENDENCIES)
+ @rm -f pth_cvsimple$(EXEEXT)
+ $(LINK) $(pth_cvsimple_OBJECTS) $(pth_cvsimple_LDADD) $(LIBS)
+pth_empty$(EXEEXT): $(pth_empty_OBJECTS) $(pth_empty_DEPENDENCIES)
+ @rm -f pth_empty$(EXEEXT)
+ $(LINK) $(pth_empty_OBJECTS) $(pth_empty_LDADD) $(LIBS)
+pth_exit$(EXEEXT): $(pth_exit_OBJECTS) $(pth_exit_DEPENDENCIES)
+ @rm -f pth_exit$(EXEEXT)
+ $(LINK) $(pth_exit_OBJECTS) $(pth_exit_LDADD) $(LIBS)
+pth_exit2$(EXEEXT): $(pth_exit2_OBJECTS) $(pth_exit2_DEPENDENCIES)
+ @rm -f pth_exit2$(EXEEXT)
+ $(LINK) $(pth_exit2_OBJECTS) $(pth_exit2_LDADD) $(LIBS)
+pth_mutexspeed$(EXEEXT): $(pth_mutexspeed_OBJECTS) $(pth_mutexspeed_DEPENDENCIES)
+ @rm -f pth_mutexspeed$(EXEEXT)
+ $(LINK) $(pth_mutexspeed_OBJECTS) $(pth_mutexspeed_LDADD) $(LIBS)
+pth_once$(EXEEXT): $(pth_once_OBJECTS) $(pth_once_DEPENDENCIES)
+ @rm -f pth_once$(EXEEXT)
+ $(LINK) $(pth_once_OBJECTS) $(pth_once_LDADD) $(LIBS)
+pth_rwlock$(EXEEXT): $(pth_rwlock_OBJECTS) $(pth_rwlock_DEPENDENCIES)
+ @rm -f pth_rwlock$(EXEEXT)
+ $(LINK) $(pth_rwlock_OBJECTS) $(pth_rwlock_LDADD) $(LIBS)
+pth_stackalign$(EXEEXT): $(pth_stackalign_OBJECTS) $(pth_stackalign_DEPENDENCIES)
+ @rm -f pth_stackalign$(EXEEXT)
+ $(LINK) $(pth_stackalign_OBJECTS) $(pth_stackalign_LDADD) $(LIBS)
+rcrl$(EXEEXT): $(rcrl_OBJECTS) $(rcrl_DEPENDENCIES)
+ @rm -f rcrl$(EXEEXT)
+ $(LINK) $(rcrl_OBJECTS) $(rcrl_LDADD) $(LIBS)
+readline1$(EXEEXT): $(readline1_OBJECTS) $(readline1_DEPENDENCIES)
+ @rm -f readline1$(EXEEXT)
+ $(LINK) $(readline1_OBJECTS) $(readline1_LDADD) $(LIBS)
+require-text-symbol$(EXEEXT): $(require_text_symbol_OBJECTS) $(require_text_symbol_DEPENDENCIES)
+ @rm -f require-text-symbol$(EXEEXT)
+ $(LINK) $(require_text_symbol_OBJECTS) $(require_text_symbol_LDADD) $(LIBS)
+res_search$(EXEEXT): $(res_search_OBJECTS) $(res_search_DEPENDENCIES)
+ @rm -f res_search$(EXEEXT)
+ $(LINK) $(res_search_OBJECTS) $(res_search_LDADD) $(LIBS)
+resolv$(EXEEXT): $(resolv_OBJECTS) $(resolv_DEPENDENCIES)
+ @rm -f resolv$(EXEEXT)
+ $(LINK) $(resolv_OBJECTS) $(resolv_LDADD) $(LIBS)
+rlimit_nofile$(EXEEXT): $(rlimit_nofile_OBJECTS) $(rlimit_nofile_DEPENDENCIES)
+ @rm -f rlimit_nofile$(EXEEXT)
+ $(LINK) $(rlimit_nofile_OBJECTS) $(rlimit_nofile_LDADD) $(LIBS)
+selfrun$(EXEEXT): $(selfrun_OBJECTS) $(selfrun_DEPENDENCIES)
+ @rm -f selfrun$(EXEEXT)
+ $(LINK) $(selfrun_OBJECTS) $(selfrun_LDADD) $(LIBS)
+sem$(EXEEXT): $(sem_OBJECTS) $(sem_DEPENDENCIES)
+ @rm -f sem$(EXEEXT)
+ $(LINK) $(sem_OBJECTS) $(sem_LDADD) $(LIBS)
+semlimit$(EXEEXT): $(semlimit_OBJECTS) $(semlimit_DEPENDENCIES)
+ @rm -f semlimit$(EXEEXT)
+ $(LINK) $(semlimit_OBJECTS) $(semlimit_LDADD) $(LIBS)
+sha1_test$(EXEEXT): $(sha1_test_OBJECTS) $(sha1_test_DEPENDENCIES)
+ @rm -f sha1_test$(EXEEXT)
+ $(LINK) $(sha1_test_OBJECTS) $(sha1_test_LDADD) $(LIBS)
+shortpush$(EXEEXT): $(shortpush_OBJECTS) $(shortpush_DEPENDENCIES)
+ @rm -f shortpush$(EXEEXT)
+ $(LINK) $(shortpush_OBJECTS) $(shortpush_LDADD) $(LIBS)
+shorts$(EXEEXT): $(shorts_OBJECTS) $(shorts_DEPENDENCIES)
+ @rm -f shorts$(EXEEXT)
+ $(LINK) $(shorts_OBJECTS) $(shorts_LDADD) $(LIBS)
+sigstackgrowth$(EXEEXT): $(sigstackgrowth_OBJECTS) $(sigstackgrowth_DEPENDENCIES)
+ @rm -f sigstackgrowth$(EXEEXT)
+ $(LINK) $(sigstackgrowth_OBJECTS) $(sigstackgrowth_LDADD) $(LIBS)
+stackgrowth$(EXEEXT): $(stackgrowth_OBJECTS) $(stackgrowth_DEPENDENCIES)
+ @rm -f stackgrowth$(EXEEXT)
+ $(LINK) $(stackgrowth_OBJECTS) $(stackgrowth_LDADD) $(LIBS)
+syscall-restart1$(EXEEXT): $(syscall_restart1_OBJECTS) $(syscall_restart1_DEPENDENCIES)
+ @rm -f syscall-restart1$(EXEEXT)
+ $(LINK) $(syscall_restart1_OBJECTS) $(syscall_restart1_LDADD) $(LIBS)
+syscall-restart2$(EXEEXT): $(syscall_restart2_OBJECTS) $(syscall_restart2_DEPENDENCIES)
+ @rm -f syscall-restart2$(EXEEXT)
+ $(LINK) $(syscall_restart2_OBJECTS) $(syscall_restart2_LDADD) $(LIBS)
+syslog$(EXEEXT): $(syslog_OBJECTS) $(syslog_DEPENDENCIES)
+ @rm -f syslog$(EXEEXT)
+ $(LINK) $(syslog_OBJECTS) $(syslog_LDADD) $(LIBS)
+system$(EXEEXT): $(system_OBJECTS) $(system_DEPENDENCIES)
+ @rm -f system$(EXEEXT)
+ $(LINK) $(system_OBJECTS) $(system_LDADD) $(LIBS)
+thread-exits$(EXEEXT): $(thread_exits_OBJECTS) $(thread_exits_DEPENDENCIES)
+ @rm -f thread-exits$(EXEEXT)
+ $(LINK) $(thread_exits_OBJECTS) $(thread_exits_LDADD) $(LIBS)
+threaded-fork$(EXEEXT): $(threaded_fork_OBJECTS) $(threaded_fork_DEPENDENCIES)
+ @rm -f threaded-fork$(EXEEXT)
+ $(LINK) $(threaded_fork_OBJECTS) $(threaded_fork_LDADD) $(LIBS)
+threadederrno$(EXEEXT): $(threadederrno_OBJECTS) $(threadederrno_DEPENDENCIES)
+ @rm -f threadederrno$(EXEEXT)
+ $(LINK) $(threadederrno_OBJECTS) $(threadederrno_LDADD) $(LIBS)
+timestamp$(EXEEXT): $(timestamp_OBJECTS) $(timestamp_DEPENDENCIES)
+ @rm -f timestamp$(EXEEXT)
+ $(LINK) $(timestamp_OBJECTS) $(timestamp_LDADD) $(LIBS)
+tls$(EXEEXT): $(tls_OBJECTS) $(tls_DEPENDENCIES)
+ @rm -f tls$(EXEEXT)
+ $(tls_LINK) $(tls_OBJECTS) $(tls_LDADD) $(LIBS)
+tls.so$(EXEEXT): $(tls_so_OBJECTS) $(tls_so_DEPENDENCIES)
+ @rm -f tls.so$(EXEEXT)
+ $(tls_so_LINK) $(tls_so_OBJECTS) $(tls_so_LDADD) $(LIBS)
+tls2.so$(EXEEXT): $(tls2_so_OBJECTS) $(tls2_so_DEPENDENCIES)
+ @rm -f tls2.so$(EXEEXT)
+ $(tls2_so_LINK) $(tls2_so_OBJECTS) $(tls2_so_LDADD) $(LIBS)
+valgrind_cpp_test$(EXEEXT): $(valgrind_cpp_test_OBJECTS) $(valgrind_cpp_test_DEPENDENCIES)
+ @rm -f valgrind_cpp_test$(EXEEXT)
+ $(CXXLINK) $(valgrind_cpp_test_OBJECTS) $(valgrind_cpp_test_LDADD) $(LIBS)
+vgprintf$(EXEEXT): $(vgprintf_OBJECTS) $(vgprintf_DEPENDENCIES)
+ @rm -f vgprintf$(EXEEXT)
+ $(LINK) $(vgprintf_OBJECTS) $(vgprintf_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+include ./$(DEPDIR)/ansi-ansi.Po
+include ./$(DEPDIR)/args.Po
+include ./$(DEPDIR)/async-sigs.Po
+include ./$(DEPDIR)/bitfield1.Po
+include ./$(DEPDIR)/bug129866.Po
+include ./$(DEPDIR)/closeall.Po
+include ./$(DEPDIR)/coolo_sigaction.Po
+include ./$(DEPDIR)/coolo_strlen.Po
+include ./$(DEPDIR)/discard.Po
+include ./$(DEPDIR)/exec-sigmask.Po
+include ./$(DEPDIR)/execve.Po
+include ./$(DEPDIR)/faultstatus.Po
+include ./$(DEPDIR)/fcntl_setown.Po
+include ./$(DEPDIR)/fdleak_cmsg.Po
+include ./$(DEPDIR)/fdleak_creat.Po
+include ./$(DEPDIR)/fdleak_dup.Po
+include ./$(DEPDIR)/fdleak_dup2.Po
+include ./$(DEPDIR)/fdleak_fcntl.Po
+include ./$(DEPDIR)/fdleak_ipv4.Po
+include ./$(DEPDIR)/fdleak_open.Po
+include ./$(DEPDIR)/fdleak_pipe.Po
+include ./$(DEPDIR)/fdleak_socketpair.Po
+include ./$(DEPDIR)/floored.Po
+include ./$(DEPDIR)/fork.Po
+include ./$(DEPDIR)/fucomip.Po
+include ./$(DEPDIR)/gxx304.Po
+include ./$(DEPDIR)/manythreads.Po
+include ./$(DEPDIR)/map_unaligned.Po
+include ./$(DEPDIR)/map_unmap.Po
+include ./$(DEPDIR)/mq.Po
+include ./$(DEPDIR)/munmap_exe.Po
+include ./$(DEPDIR)/nestedfns-nestedfns.Po
+include ./$(DEPDIR)/pending.Po
+include ./$(DEPDIR)/procfs-cmdline-exe.Po
+include ./$(DEPDIR)/pth_atfork1.Po
+include ./$(DEPDIR)/pth_blockedsig.Po
+include ./$(DEPDIR)/pth_cancel1-pth_cancel1.Po
+include ./$(DEPDIR)/pth_cancel2.Po
+include ./$(DEPDIR)/pth_cvsimple.Po
+include ./$(DEPDIR)/pth_empty.Po
+include ./$(DEPDIR)/pth_exit.Po
+include ./$(DEPDIR)/pth_exit2.Po
+include ./$(DEPDIR)/pth_mutexspeed.Po
+include ./$(DEPDIR)/pth_once.Po
+include ./$(DEPDIR)/pth_rwlock.Po
+include ./$(DEPDIR)/pth_stackalign.Po
+include ./$(DEPDIR)/rcrl.Po
+include ./$(DEPDIR)/readline1.Po
+include ./$(DEPDIR)/require-text-symbol.Po
+include ./$(DEPDIR)/res_search.Po
+include ./$(DEPDIR)/resolv.Po
+include ./$(DEPDIR)/rlimit_nofile.Po
+include ./$(DEPDIR)/selfrun.Po
+include ./$(DEPDIR)/sem.Po
+include ./$(DEPDIR)/semlimit.Po
+include ./$(DEPDIR)/sha1_test.Po
+include ./$(DEPDIR)/shortpush.Po
+include ./$(DEPDIR)/shorts.Po
+include ./$(DEPDIR)/sigstackgrowth.Po
+include ./$(DEPDIR)/stackgrowth.Po
+include ./$(DEPDIR)/syscall-restart1.Po
+include ./$(DEPDIR)/syscall-restart2.Po
+include ./$(DEPDIR)/syslog.Po
+include ./$(DEPDIR)/system.Po
+include ./$(DEPDIR)/thread-exits.Po
+include ./$(DEPDIR)/threaded-fork.Po
+include ./$(DEPDIR)/threadederrno.Po
+include ./$(DEPDIR)/timestamp.Po
+include ./$(DEPDIR)/tls.Po
+include ./$(DEPDIR)/tls2.Po
+include ./$(DEPDIR)/tls2_so.Po
+include ./$(DEPDIR)/tls_so-tls_so.Po
+include ./$(DEPDIR)/valgrind_cpp_test.Po
+include ./$(DEPDIR)/vgprintf.Po
+
+.c.o:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c $<
+
+.c.obj:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
+ansi-ansi.o: ansi.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(ansi_CFLAGS) $(CFLAGS) -MT ansi-ansi.o -MD -MP -MF $(DEPDIR)/ansi-ansi.Tpo -c -o ansi-ansi.o `test -f 'ansi.c' || echo '$(srcdir)/'`ansi.c
+ mv -f $(DEPDIR)/ansi-ansi.Tpo $(DEPDIR)/ansi-ansi.Po
+# source='ansi.c' object='ansi-ansi.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(ansi_CFLAGS) $(CFLAGS) -c -o ansi-ansi.o `test -f 'ansi.c' || echo '$(srcdir)/'`ansi.c
+
+ansi-ansi.obj: ansi.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(ansi_CFLAGS) $(CFLAGS) -MT ansi-ansi.obj -MD -MP -MF $(DEPDIR)/ansi-ansi.Tpo -c -o ansi-ansi.obj `if test -f 'ansi.c'; then $(CYGPATH_W) 'ansi.c'; else $(CYGPATH_W) '$(srcdir)/ansi.c'; fi`
+ mv -f $(DEPDIR)/ansi-ansi.Tpo $(DEPDIR)/ansi-ansi.Po
+# source='ansi.c' object='ansi-ansi.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(ansi_CFLAGS) $(CFLAGS) -c -o ansi-ansi.obj `if test -f 'ansi.c'; then $(CYGPATH_W) 'ansi.c'; else $(CYGPATH_W) '$(srcdir)/ansi.c'; fi`
+
+nestedfns-nestedfns.o: nestedfns.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(nestedfns_CFLAGS) $(CFLAGS) -MT nestedfns-nestedfns.o -MD -MP -MF $(DEPDIR)/nestedfns-nestedfns.Tpo -c -o nestedfns-nestedfns.o `test -f 'nestedfns.c' || echo '$(srcdir)/'`nestedfns.c
+ mv -f $(DEPDIR)/nestedfns-nestedfns.Tpo $(DEPDIR)/nestedfns-nestedfns.Po
+# source='nestedfns.c' object='nestedfns-nestedfns.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(nestedfns_CFLAGS) $(CFLAGS) -c -o nestedfns-nestedfns.o `test -f 'nestedfns.c' || echo '$(srcdir)/'`nestedfns.c
+
+nestedfns-nestedfns.obj: nestedfns.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(nestedfns_CFLAGS) $(CFLAGS) -MT nestedfns-nestedfns.obj -MD -MP -MF $(DEPDIR)/nestedfns-nestedfns.Tpo -c -o nestedfns-nestedfns.obj `if test -f 'nestedfns.c'; then $(CYGPATH_W) 'nestedfns.c'; else $(CYGPATH_W) '$(srcdir)/nestedfns.c'; fi`
+ mv -f $(DEPDIR)/nestedfns-nestedfns.Tpo $(DEPDIR)/nestedfns-nestedfns.Po
+# source='nestedfns.c' object='nestedfns-nestedfns.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(nestedfns_CFLAGS) $(CFLAGS) -c -o nestedfns-nestedfns.obj `if test -f 'nestedfns.c'; then $(CYGPATH_W) 'nestedfns.c'; else $(CYGPATH_W) '$(srcdir)/nestedfns.c'; fi`
+
+pth_cancel1-pth_cancel1.o: pth_cancel1.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(pth_cancel1_CFLAGS) $(CFLAGS) -MT pth_cancel1-pth_cancel1.o -MD -MP -MF $(DEPDIR)/pth_cancel1-pth_cancel1.Tpo -c -o pth_cancel1-pth_cancel1.o `test -f 'pth_cancel1.c' || echo '$(srcdir)/'`pth_cancel1.c
+ mv -f $(DEPDIR)/pth_cancel1-pth_cancel1.Tpo $(DEPDIR)/pth_cancel1-pth_cancel1.Po
+# source='pth_cancel1.c' object='pth_cancel1-pth_cancel1.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(pth_cancel1_CFLAGS) $(CFLAGS) -c -o pth_cancel1-pth_cancel1.o `test -f 'pth_cancel1.c' || echo '$(srcdir)/'`pth_cancel1.c
+
+pth_cancel1-pth_cancel1.obj: pth_cancel1.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(pth_cancel1_CFLAGS) $(CFLAGS) -MT pth_cancel1-pth_cancel1.obj -MD -MP -MF $(DEPDIR)/pth_cancel1-pth_cancel1.Tpo -c -o pth_cancel1-pth_cancel1.obj `if test -f 'pth_cancel1.c'; then $(CYGPATH_W) 'pth_cancel1.c'; else $(CYGPATH_W) '$(srcdir)/pth_cancel1.c'; fi`
+ mv -f $(DEPDIR)/pth_cancel1-pth_cancel1.Tpo $(DEPDIR)/pth_cancel1-pth_cancel1.Po
+# source='pth_cancel1.c' object='pth_cancel1-pth_cancel1.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(pth_cancel1_CFLAGS) $(CFLAGS) -c -o pth_cancel1-pth_cancel1.obj `if test -f 'pth_cancel1.c'; then $(CYGPATH_W) 'pth_cancel1.c'; else $(CYGPATH_W) '$(srcdir)/pth_cancel1.c'; fi`
+
+tls_so-tls_so.o: tls_so.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(tls_so_CFLAGS) $(CFLAGS) -MT tls_so-tls_so.o -MD -MP -MF $(DEPDIR)/tls_so-tls_so.Tpo -c -o tls_so-tls_so.o `test -f 'tls_so.c' || echo '$(srcdir)/'`tls_so.c
+ mv -f $(DEPDIR)/tls_so-tls_so.Tpo $(DEPDIR)/tls_so-tls_so.Po
+# source='tls_so.c' object='tls_so-tls_so.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(tls_so_CFLAGS) $(CFLAGS) -c -o tls_so-tls_so.o `test -f 'tls_so.c' || echo '$(srcdir)/'`tls_so.c
+
+tls_so-tls_so.obj: tls_so.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(tls_so_CFLAGS) $(CFLAGS) -MT tls_so-tls_so.obj -MD -MP -MF $(DEPDIR)/tls_so-tls_so.Tpo -c -o tls_so-tls_so.obj `if test -f 'tls_so.c'; then $(CYGPATH_W) 'tls_so.c'; else $(CYGPATH_W) '$(srcdir)/tls_so.c'; fi`
+ mv -f $(DEPDIR)/tls_so-tls_so.Tpo $(DEPDIR)/tls_so-tls_so.Po
+# source='tls_so.c' object='tls_so-tls_so.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(tls_so_CFLAGS) $(CFLAGS) -c -o tls_so-tls_so.obj `if test -f 'tls_so.c'; then $(CYGPATH_W) 'tls_so.c'; else $(CYGPATH_W) '$(srcdir)/tls_so.c'; fi`
+
+.cpp.o:
+ $(CXXCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) \
+# $(CXXCOMPILE) -c -o $@ $<
+
+.cpp.obj:
+ $(CXXCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) \
+# $(CXXCOMPILE) -c -o $@ `$(CYGPATH_W) '$<'`
+
+# This directory's subdirectories are mostly independent; you can cd
+# into them and run `make' without going through this Makefile.
+# To change the values of `make' variables: instead of editing Makefiles,
+# (1) if the variable is set in `config.status', edit `config.status'
+# (which will cause the Makefiles to be regenerated when you run `make');
+# (2) otherwise, pass the desired values on the `make' command line.
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+ case $$f in \
+ *=* | --[!k]*);; \
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+ mostlyclean mostlyclean-compile mostlyclean-generic pdf pdf-am \
+ ps ps-am tags tags-recursive uninstall uninstall-am
+
+
+# This used to be required when Vex had a handwritten Makefile. It
+# shouldn't be needed any more, though.
+
+#----------------------------------------------------------------------------
+# noinst_PROGRAMS and noinst_DSYMS targets
+#----------------------------------------------------------------------------
+
+# On Darwin, for a program 'p', the DWARF debug info is stored in the
+# directory 'p.dSYM'. This must be generated after the executable is
+# created, with 'dsymutil p'. We could redefine LINK with a script that
+# executes 'dsymutil' after linking, but that's a pain. Instead we use this
+# hook so that every time "make check" is run, we subsequently invoke
+# 'dsymutil' on all the executables that lack a .dSYM directory, or that are
+# newer than their corresponding .dSYM directory.
+build-noinst_DSYMS: $(noinst_DSYMS)
+ for f in $(noinst_DSYMS); do \
+ if [ ! -e $$f.dSYM -o $$f -nt $$f.dSYM ] ; then \
+ echo "dsymutil $$f"; \
+ dsymutil $$f; \
+ fi; \
+ done
+
+# This is used by coregrind/Makefile.am and Makefile.tool.am for doing
+# "in-place" installs. It copies $(noinst_PROGRAMS) into $inplacedir.
+# It needs to be depended on by an 'all-local' rule.
+inplace-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_PROGRAMS) ; do \
+ rm -f $(inplacedir)/$$f; \
+ ln -f -s ../$(subdir)/$$f $(inplacedir); \
+ done
+
+# Similar to inplace-noinst_PROGRAMS
+inplace-noinst_DSYMS: build-noinst_DSYMS
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_DSYMS); do \
+ rm -f $(inplacedir)/$$f.dSYM; \
+ ln -f -s ../$(subdir)/$$f.dSYM $(inplacedir); \
+ done
+
+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
+# "make install". It copies $(noinst_PROGRAMS) into $prefix/lib/valgrind/.
+# It needs to be depended on by an 'install-exec-local' rule.
+install-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_PROGRAMS); do \
+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
+ done
+
+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
+# directories. XXX: not sure whether the resulting permissions will be
+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_DSYMS); do \
+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
+ done
+
+# This needs to be depended on by a 'clean-local' rule.
+clean-noinst_DSYMS:
+ for f in $(noinst_DSYMS); do \
+ rm -rf $$f.dSYM; \
+ done
+
+check-local: build-noinst_DSYMS
+
+clean-local: clean-noinst_DSYMS
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
+
+# This file is used for tool tests, and also in perf/Makefile.am.
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
+
+
+VPATH = @srcdir@
+pkgdatadir = $(datadir)/@PACKAGE@
+pkglibdir = $(libdir)/@PACKAGE@
+pkgincludedir = $(includedir)/@PACKAGE@
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+install_sh_DATA = $(install_sh) -c -m 644
+install_sh_PROGRAM = $(install_sh) -c
+install_sh_SCRIPT = $(install_sh) -c
+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+build_triplet = @build@
+host_triplet = @host@
+DIST_COMMON = $(dist_noinst_SCRIPTS) $(noinst_HEADERS) \
+ $(srcdir)/Makefile.am $(srcdir)/Makefile.in \
+ $(top_srcdir)/Makefile.all.am \
+ $(top_srcdir)/Makefile.tool-tests.am
+
+# Arch-specific tests.
+@VGCONF_ARCHS_INCLUDE_X86_TRUE@am__append_1 = x86
+@VGCONF_ARCHS_INCLUDE_AMD64_TRUE@am__append_2 = amd64
+@VGCONF_ARCHS_INCLUDE_PPC32_TRUE@am__append_3 = ppc32
+@VGCONF_ARCHS_INCLUDE_PPC64_TRUE@am__append_4 = ppc64
+@VGCONF_ARCHS_INCLUDE_ARM_TRUE@am__append_5 = arm
+
+# OS-specific tests
+@VGCONF_OS_IS_LINUX_TRUE@am__append_6 = linux
+@VGCONF_OS_IS_DARWIN_TRUE@am__append_7 = darwin
+
+# Platform-specific tests
+@VGCONF_PLATFORMS_INCLUDE_X86_LINUX_TRUE@am__append_8 = x86-linux
+check_PROGRAMS = ansi$(EXEEXT) args$(EXEEXT) async-sigs$(EXEEXT) \
+ bitfield1$(EXEEXT) bug129866$(EXEEXT) closeall$(EXEEXT) \
+ coolo_strlen$(EXEEXT) discard$(EXEEXT) exec-sigmask$(EXEEXT) \
+ execve$(EXEEXT) faultstatus$(EXEEXT) fcntl_setown$(EXEEXT) \
+ fdleak_cmsg$(EXEEXT) fdleak_creat$(EXEEXT) fdleak_dup$(EXEEXT) \
+ fdleak_dup2$(EXEEXT) fdleak_fcntl$(EXEEXT) \
+ fdleak_ipv4$(EXEEXT) fdleak_open$(EXEEXT) fdleak_pipe$(EXEEXT) \
+ fdleak_socketpair$(EXEEXT) floored$(EXEEXT) fork$(EXEEXT) \
+ fucomip$(EXEEXT) munmap_exe$(EXEEXT) map_unaligned$(EXEEXT) \
+ map_unmap$(EXEEXT) mq$(EXEEXT) nestedfns$(EXEEXT) \
+ pending$(EXEEXT) procfs-cmdline-exe$(EXEEXT) \
+ pth_atfork1$(EXEEXT) pth_blockedsig$(EXEEXT) \
+ pth_cancel1$(EXEEXT) pth_cancel2$(EXEEXT) \
+ pth_cvsimple$(EXEEXT) pth_empty$(EXEEXT) pth_exit$(EXEEXT) \
+ pth_exit2$(EXEEXT) pth_mutexspeed$(EXEEXT) pth_once$(EXEEXT) \
+ pth_rwlock$(EXEEXT) pth_stackalign$(EXEEXT) rcrl$(EXEEXT) \
+ readline1$(EXEEXT) require-text-symbol$(EXEEXT) \
+ res_search$(EXEEXT) resolv$(EXEEXT) rlimit_nofile$(EXEEXT) \
+ selfrun$(EXEEXT) sem$(EXEEXT) semlimit$(EXEEXT) \
+ sha1_test$(EXEEXT) shortpush$(EXEEXT) shorts$(EXEEXT) \
+ stackgrowth$(EXEEXT) sigstackgrowth$(EXEEXT) \
+ syscall-restart1$(EXEEXT) syscall-restart2$(EXEEXT) \
+ syslog$(EXEEXT) system$(EXEEXT) threaded-fork$(EXEEXT) \
+ threadederrno$(EXEEXT) timestamp$(EXEEXT) tls$(EXEEXT) \
+ tls.so$(EXEEXT) tls2.so$(EXEEXT) valgrind_cpp_test$(EXEEXT) \
+ vgprintf$(EXEEXT) coolo_sigaction$(EXEEXT) gxx304$(EXEEXT) \
+ $(am__EXEEXT_1)
+
+# DDD:
+# - manythreads and thread-exits have lots of this:
+# --61831:0:aspacem sync_check_mapping_callback: segment mismatch:
+# kernel's seg:
+# --61831:0:aspacem start=0x102538000 end=0x1025b7fff prot=3 dev=0 ino=0
+# offset=0 name="(none)"
+# --61831:0:aspacem sync_check_mapping_callback: segment mismatch: V's seg:
+# --61831:0:aspacem NSegment{ , start=0x10067a000, end=0x109a1efff,
+# smode=SmFixed, dev=0, ino=0, offset=0, fnIdx=-1, hasR=0,
+# hasW=0, hasX=0, hasT=0, mark=0, name="(none)"}
+@VGCONF_PLATFORMS_INCLUDE_AMD64_DARWIN_FALSE@am__append_9 = \
+@VGCONF_PLATFORMS_INCLUDE_AMD64_DARWIN_FALSE@ manythreads \
+@VGCONF_PLATFORMS_INCLUDE_AMD64_DARWIN_FALSE@ thread-exits
+
+subdir = none/tests
+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
+am__aclocal_m4_deps = $(top_srcdir)/configure.in
+am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
+ $(ACLOCAL_M4)
+mkinstalldirs = $(install_sh) -d
+CONFIG_HEADER = $(top_builddir)/config.h
+CONFIG_CLEAN_FILES =
+@VGCONF_PLATFORMS_INCLUDE_AMD64_DARWIN_FALSE@am__EXEEXT_1 = manythreads$(EXEEXT) \
+@VGCONF_PLATFORMS_INCLUDE_AMD64_DARWIN_FALSE@ thread-exits$(EXEEXT)
+ansi_SOURCES = ansi.c
+ansi_OBJECTS = ansi-ansi.$(OBJEXT)
+ansi_LDADD = $(LDADD)
+ansi_LINK = $(CCLD) $(ansi_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) \
+ -o $@
+args_SOURCES = args.c
+args_OBJECTS = args.$(OBJEXT)
+args_LDADD = $(LDADD)
+async_sigs_SOURCES = async-sigs.c
+async_sigs_OBJECTS = async-sigs.$(OBJEXT)
+async_sigs_LDADD = $(LDADD)
+bitfield1_SOURCES = bitfield1.c
+bitfield1_OBJECTS = bitfield1.$(OBJEXT)
+bitfield1_LDADD = $(LDADD)
+bug129866_SOURCES = bug129866.c
+bug129866_OBJECTS = bug129866.$(OBJEXT)
+bug129866_LDADD = $(LDADD)
+closeall_SOURCES = closeall.c
+closeall_OBJECTS = closeall.$(OBJEXT)
+closeall_LDADD = $(LDADD)
+am_coolo_sigaction_OBJECTS = coolo_sigaction.$(OBJEXT)
+coolo_sigaction_OBJECTS = $(am_coolo_sigaction_OBJECTS)
+coolo_sigaction_LDADD = $(LDADD)
+coolo_strlen_SOURCES = coolo_strlen.c
+coolo_strlen_OBJECTS = coolo_strlen.$(OBJEXT)
+coolo_strlen_LDADD = $(LDADD)
+discard_SOURCES = discard.c
+discard_OBJECTS = discard.$(OBJEXT)
+discard_LDADD = $(LDADD)
+exec_sigmask_SOURCES = exec-sigmask.c
+exec_sigmask_OBJECTS = exec-sigmask.$(OBJEXT)
+exec_sigmask_LDADD = $(LDADD)
+execve_SOURCES = execve.c
+execve_OBJECTS = execve.$(OBJEXT)
+execve_LDADD = $(LDADD)
+faultstatus_SOURCES = faultstatus.c
+faultstatus_OBJECTS = faultstatus.$(OBJEXT)
+faultstatus_LDADD = $(LDADD)
+fcntl_setown_SOURCES = fcntl_setown.c
+fcntl_setown_OBJECTS = fcntl_setown.$(OBJEXT)
+fcntl_setown_LDADD = $(LDADD)
+fdleak_cmsg_SOURCES = fdleak_cmsg.c
+fdleak_cmsg_OBJECTS = fdleak_cmsg.$(OBJEXT)
+fdleak_cmsg_LDADD = $(LDADD)
+fdleak_creat_SOURCES = fdleak_creat.c
+fdleak_creat_OBJECTS = fdleak_creat.$(OBJEXT)
+fdleak_creat_LDADD = $(LDADD)
+fdleak_dup_SOURCES = fdleak_dup.c
+fdleak_dup_OBJECTS = fdleak_dup.$(OBJEXT)
+fdleak_dup_LDADD = $(LDADD)
+fdleak_dup2_SOURCES = fdleak_dup2.c
+fdleak_dup2_OBJECTS = fdleak_dup2.$(OBJEXT)
+fdleak_dup2_LDADD = $(LDADD)
+fdleak_fcntl_SOURCES = fdleak_fcntl.c
+fdleak_fcntl_OBJECTS = fdleak_fcntl.$(OBJEXT)
+fdleak_fcntl_LDADD = $(LDADD)
+fdleak_ipv4_SOURCES = fdleak_ipv4.c
+fdleak_ipv4_OBJECTS = fdleak_ipv4.$(OBJEXT)
+fdleak_ipv4_LDADD = $(LDADD)
+fdleak_open_SOURCES = fdleak_open.c
+fdleak_open_OBJECTS = fdleak_open.$(OBJEXT)
+fdleak_open_LDADD = $(LDADD)
+fdleak_pipe_SOURCES = fdleak_pipe.c
+fdleak_pipe_OBJECTS = fdleak_pipe.$(OBJEXT)
+fdleak_pipe_LDADD = $(LDADD)
+fdleak_socketpair_SOURCES = fdleak_socketpair.c
+fdleak_socketpair_OBJECTS = fdleak_socketpair.$(OBJEXT)
+fdleak_socketpair_LDADD = $(LDADD)
+floored_SOURCES = floored.c
+floored_OBJECTS = floored.$(OBJEXT)
+floored_DEPENDENCIES =
+fork_SOURCES = fork.c
+fork_OBJECTS = fork.$(OBJEXT)
+fork_LDADD = $(LDADD)
+fucomip_SOURCES = fucomip.c
+fucomip_OBJECTS = fucomip.$(OBJEXT)
+fucomip_LDADD = $(LDADD)
+am_gxx304_OBJECTS = gxx304.$(OBJEXT)
+gxx304_OBJECTS = $(am_gxx304_OBJECTS)
+gxx304_LDADD = $(LDADD)
+manythreads_SOURCES = manythreads.c
+manythreads_OBJECTS = manythreads.$(OBJEXT)
+manythreads_DEPENDENCIES =
+map_unaligned_SOURCES = map_unaligned.c
+map_unaligned_OBJECTS = map_unaligned.$(OBJEXT)
+map_unaligned_LDADD = $(LDADD)
+map_unmap_SOURCES = map_unmap.c
+map_unmap_OBJECTS = map_unmap.$(OBJEXT)
+map_unmap_LDADD = $(LDADD)
+mq_SOURCES = mq.c
+mq_OBJECTS = mq.$(OBJEXT)
+mq_DEPENDENCIES =
+munmap_exe_SOURCES = munmap_exe.c
+munmap_exe_OBJECTS = munmap_exe.$(OBJEXT)
+munmap_exe_LDADD = $(LDADD)
+nestedfns_SOURCES = nestedfns.c
+nestedfns_OBJECTS = nestedfns-nestedfns.$(OBJEXT)
+nestedfns_LDADD = $(LDADD)
+nestedfns_LINK = $(CCLD) $(nestedfns_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
+ $(LDFLAGS) -o $@
+pending_SOURCES = pending.c
+pending_OBJECTS = pending.$(OBJEXT)
+pending_LDADD = $(LDADD)
+procfs_cmdline_exe_SOURCES = procfs-cmdline-exe.c
+procfs_cmdline_exe_OBJECTS = procfs-cmdline-exe.$(OBJEXT)
+procfs_cmdline_exe_LDADD = $(LDADD)
+pth_atfork1_SOURCES = pth_atfork1.c
+pth_atfork1_OBJECTS = pth_atfork1.$(OBJEXT)
+pth_atfork1_DEPENDENCIES =
+pth_blockedsig_SOURCES = pth_blockedsig.c
+pth_blockedsig_OBJECTS = pth_blockedsig.$(OBJEXT)
+pth_blockedsig_DEPENDENCIES =
+pth_cancel1_SOURCES = pth_cancel1.c
+pth_cancel1_OBJECTS = pth_cancel1-pth_cancel1.$(OBJEXT)
+pth_cancel1_DEPENDENCIES =
+pth_cancel1_LINK = $(CCLD) $(pth_cancel1_CFLAGS) $(CFLAGS) \
+ $(AM_LDFLAGS) $(LDFLAGS) -o $@
+pth_cancel2_SOURCES = pth_cancel2.c
+pth_cancel2_OBJECTS = pth_cancel2.$(OBJEXT)
+pth_cancel2_DEPENDENCIES =
+pth_cvsimple_SOURCES = pth_cvsimple.c
+pth_cvsimple_OBJECTS = pth_cvsimple.$(OBJEXT)
+pth_cvsimple_DEPENDENCIES =
+pth_empty_SOURCES = pth_empty.c
+pth_empty_OBJECTS = pth_empty.$(OBJEXT)
+pth_empty_DEPENDENCIES =
+pth_exit_SOURCES = pth_exit.c
+pth_exit_OBJECTS = pth_exit.$(OBJEXT)
+pth_exit_DEPENDENCIES =
+pth_exit2_SOURCES = pth_exit2.c
+pth_exit2_OBJECTS = pth_exit2.$(OBJEXT)
+pth_exit2_DEPENDENCIES =
+pth_mutexspeed_SOURCES = pth_mutexspeed.c
+pth_mutexspeed_OBJECTS = pth_mutexspeed.$(OBJEXT)
+pth_mutexspeed_DEPENDENCIES =
+pth_once_SOURCES = pth_once.c
+pth_once_OBJECTS = pth_once.$(OBJEXT)
+pth_once_DEPENDENCIES =
+pth_rwlock_SOURCES = pth_rwlock.c
+pth_rwlock_OBJECTS = pth_rwlock.$(OBJEXT)
+pth_rwlock_DEPENDENCIES =
+pth_stackalign_SOURCES = pth_stackalign.c
+pth_stackalign_OBJECTS = pth_stackalign.$(OBJEXT)
+pth_stackalign_DEPENDENCIES =
+rcrl_SOURCES = rcrl.c
+rcrl_OBJECTS = rcrl.$(OBJEXT)
+rcrl_LDADD = $(LDADD)
+readline1_SOURCES = readline1.c
+readline1_OBJECTS = readline1.$(OBJEXT)
+readline1_LDADD = $(LDADD)
+require_text_symbol_SOURCES = require-text-symbol.c
+require_text_symbol_OBJECTS = require-text-symbol.$(OBJEXT)
+require_text_symbol_LDADD = $(LDADD)
+res_search_SOURCES = res_search.c
+res_search_OBJECTS = res_search.$(OBJEXT)
+res_search_DEPENDENCIES =
+resolv_SOURCES = resolv.c
+resolv_OBJECTS = resolv.$(OBJEXT)
+resolv_DEPENDENCIES =
+rlimit_nofile_SOURCES = rlimit_nofile.c
+rlimit_nofile_OBJECTS = rlimit_nofile.$(OBJEXT)
+rlimit_nofile_LDADD = $(LDADD)
+selfrun_SOURCES = selfrun.c
+selfrun_OBJECTS = selfrun.$(OBJEXT)
+selfrun_LDADD = $(LDADD)
+sem_SOURCES = sem.c
+sem_OBJECTS = sem.$(OBJEXT)
+sem_LDADD = $(LDADD)
+semlimit_SOURCES = semlimit.c
+semlimit_OBJECTS = semlimit.$(OBJEXT)
+semlimit_DEPENDENCIES =
+sha1_test_SOURCES = sha1_test.c
+sha1_test_OBJECTS = sha1_test.$(OBJEXT)
+sha1_test_LDADD = $(LDADD)
+shortpush_SOURCES = shortpush.c
+shortpush_OBJECTS = shortpush.$(OBJEXT)
+shortpush_LDADD = $(LDADD)
+shorts_SOURCES = shorts.c
+shorts_OBJECTS = shorts.$(OBJEXT)
+shorts_LDADD = $(LDADD)
+sigstackgrowth_SOURCES = sigstackgrowth.c
+sigstackgrowth_OBJECTS = sigstackgrowth.$(OBJEXT)
+sigstackgrowth_LDADD = $(LDADD)
+stackgrowth_SOURCES = stackgrowth.c
+stackgrowth_OBJECTS = stackgrowth.$(OBJEXT)
+stackgrowth_LDADD = $(LDADD)
+syscall_restart1_SOURCES = syscall-restart1.c
+syscall_restart1_OBJECTS = syscall-restart1.$(OBJEXT)
+syscall_restart1_LDADD = $(LDADD)
+syscall_restart2_SOURCES = syscall-restart2.c
+syscall_restart2_OBJECTS = syscall-restart2.$(OBJEXT)
+syscall_restart2_LDADD = $(LDADD)
+syslog_SOURCES = syslog.c
+syslog_OBJECTS = syslog.$(OBJEXT)
+syslog_LDADD = $(LDADD)
+system_SOURCES = system.c
+system_OBJECTS = system.$(OBJEXT)
+system_LDADD = $(LDADD)
+thread_exits_SOURCES = thread-exits.c
+thread_exits_OBJECTS = thread-exits.$(OBJEXT)
+thread_exits_DEPENDENCIES =
+threaded_fork_SOURCES = threaded-fork.c
+threaded_fork_OBJECTS = threaded-fork.$(OBJEXT)
+threaded_fork_DEPENDENCIES =
+threadederrno_SOURCES = threadederrno.c
+threadederrno_OBJECTS = threadederrno.$(OBJEXT)
+threadederrno_DEPENDENCIES =
+timestamp_SOURCES = timestamp.c
+timestamp_OBJECTS = timestamp.$(OBJEXT)
+timestamp_LDADD = $(LDADD)
+am_tls_OBJECTS = tls.$(OBJEXT) tls2.$(OBJEXT)
+tls_OBJECTS = $(am_tls_OBJECTS)
+tls_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(tls_LDFLAGS) $(LDFLAGS) -o \
+ $@
+am_tls_so_OBJECTS = tls_so-tls_so.$(OBJEXT)
+tls_so_OBJECTS = $(am_tls_so_OBJECTS)
+tls_so_LINK = $(CCLD) $(tls_so_CFLAGS) $(CFLAGS) $(tls_so_LDFLAGS) \
+ $(LDFLAGS) -o $@
+am_tls2_so_OBJECTS = tls2_so.$(OBJEXT)
+tls2_so_OBJECTS = $(am_tls2_so_OBJECTS)
+tls2_so_LDADD = $(LDADD)
+tls2_so_LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(tls2_so_LDFLAGS) \
+ $(LDFLAGS) -o $@
+am_valgrind_cpp_test_OBJECTS = valgrind_cpp_test.$(OBJEXT)
+valgrind_cpp_test_OBJECTS = $(am_valgrind_cpp_test_OBJECTS)
+valgrind_cpp_test_DEPENDENCIES =
+vgprintf_SOURCES = vgprintf.c
+vgprintf_OBJECTS = vgprintf.$(OBJEXT)
+vgprintf_LDADD = $(LDADD)
+SCRIPTS = $(dist_noinst_SCRIPTS)
+DEFAULT_INCLUDES = -I.@am__isrc@ -I$(top_builddir)
+depcomp = $(SHELL) $(top_srcdir)/depcomp
+am__depfiles_maybe = depfiles
+COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
+ $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
+CCLD = $(CC)
+LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) -o $@
+CXXCOMPILE = $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \
+ $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CXXFLAGS) $(CXXFLAGS)
+CXXLD = $(CXX)
+CXXLINK = $(CXXLD) $(AM_CXXFLAGS) $(CXXFLAGS) $(AM_LDFLAGS) $(LDFLAGS) \
+ -o $@
+SOURCES = ansi.c args.c async-sigs.c bitfield1.c bug129866.c \
+ closeall.c $(coolo_sigaction_SOURCES) coolo_strlen.c discard.c \
+ exec-sigmask.c execve.c faultstatus.c fcntl_setown.c \
+ fdleak_cmsg.c fdleak_creat.c fdleak_dup.c fdleak_dup2.c \
+ fdleak_fcntl.c fdleak_ipv4.c fdleak_open.c fdleak_pipe.c \
+ fdleak_socketpair.c floored.c fork.c fucomip.c \
+ $(gxx304_SOURCES) manythreads.c map_unaligned.c map_unmap.c \
+ mq.c munmap_exe.c nestedfns.c pending.c procfs-cmdline-exe.c \
+ pth_atfork1.c pth_blockedsig.c pth_cancel1.c pth_cancel2.c \
+ pth_cvsimple.c pth_empty.c pth_exit.c pth_exit2.c \
+ pth_mutexspeed.c pth_once.c pth_rwlock.c pth_stackalign.c \
+ rcrl.c readline1.c require-text-symbol.c res_search.c resolv.c \
+ rlimit_nofile.c selfrun.c sem.c semlimit.c sha1_test.c \
+ shortpush.c shorts.c sigstackgrowth.c stackgrowth.c \
+ syscall-restart1.c syscall-restart2.c syslog.c system.c \
+ thread-exits.c threaded-fork.c threadederrno.c timestamp.c \
+ $(tls_SOURCES) $(tls_so_SOURCES) $(tls2_so_SOURCES) \
+ $(valgrind_cpp_test_SOURCES) vgprintf.c
+DIST_SOURCES = ansi.c args.c async-sigs.c bitfield1.c bug129866.c \
+ closeall.c $(coolo_sigaction_SOURCES) coolo_strlen.c discard.c \
+ exec-sigmask.c execve.c faultstatus.c fcntl_setown.c \
+ fdleak_cmsg.c fdleak_creat.c fdleak_dup.c fdleak_dup2.c \
+ fdleak_fcntl.c fdleak_ipv4.c fdleak_open.c fdleak_pipe.c \
+ fdleak_socketpair.c floored.c fork.c fucomip.c \
+ $(gxx304_SOURCES) manythreads.c map_unaligned.c map_unmap.c \
+ mq.c munmap_exe.c nestedfns.c pending.c procfs-cmdline-exe.c \
+ pth_atfork1.c pth_blockedsig.c pth_cancel1.c pth_cancel2.c \
+ pth_cvsimple.c pth_empty.c pth_exit.c pth_exit2.c \
+ pth_mutexspeed.c pth_once.c pth_rwlock.c pth_stackalign.c \
+ rcrl.c readline1.c require-text-symbol.c res_search.c resolv.c \
+ rlimit_nofile.c selfrun.c sem.c semlimit.c sha1_test.c \
+ shortpush.c shorts.c sigstackgrowth.c stackgrowth.c \
+ syscall-restart1.c syscall-restart2.c syslog.c system.c \
+ thread-exits.c threaded-fork.c threadederrno.c timestamp.c \
+ $(tls_SOURCES) $(tls_so_SOURCES) $(tls2_so_SOURCES) \
+ $(valgrind_cpp_test_SOURCES) vgprintf.c
+RECURSIVE_TARGETS = all-recursive check-recursive dvi-recursive \
+ html-recursive info-recursive install-data-recursive \
+ install-dvi-recursive install-exec-recursive \
+ install-html-recursive install-info-recursive \
+ install-pdf-recursive install-ps-recursive install-recursive \
+ installcheck-recursive installdirs-recursive pdf-recursive \
+ ps-recursive uninstall-recursive
+HEADERS = $(noinst_HEADERS)
+RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
+ distclean-recursive maintainer-clean-recursive
+ETAGS = etags
+CTAGS = ctags
+DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST)
+ACLOCAL = @ACLOCAL@
+AMTAR = @AMTAR@
+AR = @AR@
+AUTOCONF = @AUTOCONF@
+AUTOHEADER = @AUTOHEADER@
+AUTOMAKE = @AUTOMAKE@
+AWK = @AWK@
+BOOST_CFLAGS = @BOOST_CFLAGS@
+BOOST_LIBS = @BOOST_LIBS@
+CC = @CC@
+CCAS = @CCAS@
+CCASDEPMODE = @CCASDEPMODE@
+CCASFLAGS = @CCASFLAGS@
+CCDEPMODE = @CCDEPMODE@
+CFLAGS = @CFLAGS@
+CPP = @CPP@
+CPPFLAGS = @CPPFLAGS@
+CXX = @CXX@
+CXXDEPMODE = @CXXDEPMODE@
+CXXFLAGS = @CXXFLAGS@
+CYGPATH_W = @CYGPATH_W@
+DEFAULT_SUPP = @DEFAULT_SUPP@
+DEFS = @DEFS@
+DEPDIR = @DEPDIR@
+DIFF = @DIFF@
+ECHO_C = @ECHO_C@
+ECHO_N = @ECHO_N@
+ECHO_T = @ECHO_T@
+EGREP = @EGREP@
+EXEEXT = @EXEEXT@
+FLAG_FNO_STACK_PROTECTOR = @FLAG_FNO_STACK_PROTECTOR@
+FLAG_M32 = @FLAG_M32@
+FLAG_M64 = @FLAG_M64@
+FLAG_MAIX32 = @FLAG_MAIX32@
+FLAG_MAIX64 = @FLAG_MAIX64@
+FLAG_MMMX = @FLAG_MMMX@
+FLAG_MSSE = @FLAG_MSSE@
+FLAG_NO_BUILD_ID = @FLAG_NO_BUILD_ID@
+FLAG_UNLIMITED_INLINE_UNIT_GROWTH = @FLAG_UNLIMITED_INLINE_UNIT_GROWTH@
+FLAG_W_EXTRA = @FLAG_W_EXTRA@
+FLAG_W_NO_EMPTY_BODY = @FLAG_W_NO_EMPTY_BODY@
+FLAG_W_NO_FORMAT_ZERO_LENGTH = @FLAG_W_NO_FORMAT_ZERO_LENGTH@
+FLAG_W_NO_UNINITIALIZED = @FLAG_W_NO_UNINITIALIZED@
+GDB = @GDB@
+GLIBC_VERSION = @GLIBC_VERSION@
+GREP = @GREP@
+INSTALL = @INSTALL@
+INSTALL_DATA = @INSTALL_DATA@
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_SCRIPT = @INSTALL_SCRIPT@
+INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
+LDFLAGS = @LDFLAGS@
+LIBOBJS = @LIBOBJS@
+LIBS = @LIBS@
+LN_S = @LN_S@
+LTLIBOBJS = @LTLIBOBJS@
+MAINT = @MAINT@
+MAKEINFO = @MAKEINFO@
+MKDIR_P = @MKDIR_P@
+MPI_CC = @MPI_CC@
+OBJEXT = @OBJEXT@
+PACKAGE = @PACKAGE@
+PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
+PACKAGE_NAME = @PACKAGE_NAME@
+PACKAGE_STRING = @PACKAGE_STRING@
+PACKAGE_TARNAME = @PACKAGE_TARNAME@
+PACKAGE_VERSION = @PACKAGE_VERSION@
+PATH_SEPARATOR = @PATH_SEPARATOR@
+PERL = @PERL@
+PKG_CONFIG = @PKG_CONFIG@
+PREFERRED_STACK_BOUNDARY = @PREFERRED_STACK_BOUNDARY@
+QTCORE_CFLAGS = @QTCORE_CFLAGS@
+QTCORE_LIBS = @QTCORE_LIBS@
+RANLIB = @RANLIB@
+SED = @SED@
+SET_MAKE = @SET_MAKE@
+SHELL = @SHELL@
+STRIP = @STRIP@
+VALT_LOAD_ADDRESS_PRI = @VALT_LOAD_ADDRESS_PRI@
+VALT_LOAD_ADDRESS_SEC = @VALT_LOAD_ADDRESS_SEC@
+VERSION = @VERSION@
+VGCONF_ARCH_PRI = @VGCONF_ARCH_PRI@
+VGCONF_ARCH_SEC = @VGCONF_ARCH_SEC@
+VGCONF_OS = @VGCONF_OS@
+VGCONF_PLATFORM_PRI_CAPS = @VGCONF_PLATFORM_PRI_CAPS@
+VGCONF_PLATFORM_SEC_CAPS = @VGCONF_PLATFORM_SEC_CAPS@
+abs_builddir = @abs_builddir@
+abs_srcdir = @abs_srcdir@
+abs_top_builddir = @abs_top_builddir@
+abs_top_srcdir = @abs_top_srcdir@
+ac_ct_CC = @ac_ct_CC@
+ac_ct_CXX = @ac_ct_CXX@
+am__include = @am__include@
+am__leading_dot = @am__leading_dot@
+am__quote = @am__quote@
+am__tar = @am__tar@
+am__untar = @am__untar@
+bindir = @bindir@
+build = @build@
+build_alias = @build_alias@
+build_cpu = @build_cpu@
+build_os = @build_os@
+build_vendor = @build_vendor@
+builddir = @builddir@
+datadir = @datadir@
+datarootdir = @datarootdir@
+docdir = @docdir@
+dvidir = @dvidir@
+exec_prefix = @exec_prefix@
+host = @host@
+host_alias = @host_alias@
+host_cpu = @host_cpu@
+host_os = @host_os@
+host_vendor = @host_vendor@
+htmldir = @htmldir@
+includedir = @includedir@
+infodir = @infodir@
+install_sh = @install_sh@
+libdir = @libdir@
+libexecdir = @libexecdir@
+localedir = @localedir@
+localstatedir = @localstatedir@
+mandir = @mandir@
+mkdir_p = @mkdir_p@
+oldincludedir = @oldincludedir@
+pdfdir = @pdfdir@
+prefix = @prefix@
+program_transform_name = @program_transform_name@
+psdir = @psdir@
+sbindir = @sbindir@
+sharedstatedir = @sharedstatedir@
+srcdir = @srcdir@
+sysconfdir = @sysconfdir@
+target_alias = @target_alias@
+top_builddir = @top_builddir@
+top_srcdir = @top_srcdir@
+inplacedir = $(top_builddir)/.in_place
+
+#----------------------------------------------------------------------------
+# Flags
+#----------------------------------------------------------------------------
+
+# Baseline flags for all compilations. Aim here is to maximise
+# performance and get whatever useful warnings we can out of gcc.
+AM_CFLAGS_BASE = \
+ -O2 -g \
+ -Wall \
+ -Wmissing-prototypes \
+ -Wshadow \
+ -Wpointer-arith \
+ -Wstrict-prototypes \
+ -Wmissing-declarations \
+ @FLAG_W_NO_FORMAT_ZERO_LENGTH@ \
+ -fno-strict-aliasing
+
+@VGCONF_OS_IS_DARWIN_FALSE@AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+@VGCONF_OS_IS_DARWIN_TRUE@AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+@VGCONF_OS_IS_DARWIN_TRUE@ -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
+# and so the CPPFLAGS are passed to the assembler. But this is not true for
+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
+# AM_CPPFLAGS_<PLATFORM> in each AM_CCASFLAGS_<PLATFORM> variable. This
+# means some of the flags are duplicated on systems with newer versions of
+# automake, but this does not really matter and seems hard to avoid.
+AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@ = \
+ -I$(top_srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_@VGCONF_ARCH_PRI@=1 \
+ -DVGO_@VGCONF_OS@=1 \
+ -DVGP_@VGCONF_ARCH_PRI@_@VGCONF_OS@=1
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@AM_CPPFLAGS_@VGCONF_PLATFORM_SEC_CAPS@ = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir) \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir)/include \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir)/VEX/pub \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGA_@VGCONF_ARCH_SEC@=1 \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGO_@VGCONF_OS@=1 \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGP_@VGCONF_ARCH_SEC@_@VGCONF_OS@=1
+
+AM_FLAG_M3264_X86_LINUX = @FLAG_M32@
+AM_CFLAGS_X86_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_AMD64_LINUX = @FLAG_M64@
+AM_CFLAGS_AMD64_LINUX = @FLAG_M64@ -fomit-frame-pointer \
+ @PREFERRED_STACK_BOUNDARY@ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) @FLAG_M64@ -g
+AM_FLAG_M3264_PPC32_LINUX = @FLAG_M32@
+AM_CFLAGS_PPC32_LINUX = @FLAG_M32@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_LINUX = $(AM_CPPFLAGS_PPC32_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_PPC64_LINUX = @FLAG_M64@
+AM_CFLAGS_PPC64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_LINUX = $(AM_CPPFLAGS_PPC64_LINUX) @FLAG_M64@ -g
+AM_FLAG_M3264_ARM_LINUX = @FLAG_M32@
+AM_CFLAGS_ARM_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_PPC32_AIX5 = @FLAG_MAIX32@
+AM_CFLAGS_PPC32_AIX5 = @FLAG_MAIX32@ -mcpu=powerpc $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
+ @FLAG_MAIX32@ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 = @FLAG_MAIX64@
+AM_CFLAGS_PPC64_AIX5 = @FLAG_MAIX64@ -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ @FLAG_MAIX64@ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 \
+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CFLAGS_PRI = $(AM_CFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+@VGCONF_HAVE_PLATFORM_SEC_FALSE@AM_FLAG_M3264_SEC =
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_@VGCONF_PLATFORM_SEC_CAPS@)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX32@
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX64@
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
+# as $(AM_FLAG_M3264_PRI).
+AM_CFLAGS = -Winline -Wall -Wshadow -g $(AM_FLAG_M3264_PRI)
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g $(AM_FLAG_M3264_PRI)
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS)
+@VGCONF_OS_IS_DARWIN_TRUE@noinst_DSYMS = $(check_PROGRAMS)
+SUBDIRS = . $(am__append_1) $(am__append_2) $(am__append_3) \
+ $(am__append_4) $(am__append_5) $(am__append_6) \
+ $(am__append_7) $(am__append_8)
+DIST_SUBDIRS = x86 amd64 ppc32 ppc64 arm linux darwin x86-linux .
+dist_noinst_SCRIPTS = \
+ filter_cmdline0 \
+ filter_cmdline1 \
+ filter_fdleak \
+ filter_linenos \
+ filter_none_discards \
+ filter_stderr \
+ filter_timestamp
+
+noinst_HEADERS = fdleak.h
+EXTRA_DIST = \
+ ansi.stderr.exp ansi.vgtest \
+ args.stderr.exp args.stdout.exp args.vgtest \
+ async-sigs.stderr.exp async-sigs.vgtest \
+ bitfield1.stderr.exp bitfield1.vgtest \
+ bug129866.vgtest bug129866.stderr.exp bug129866.stdout.exp \
+ closeall.stderr.exp closeall.vgtest \
+ cmdline0.stderr.exp cmdline0.stdout.exp cmdline0.vgtest \
+ cmdline1.stderr.exp cmdline1.stdout.exp cmdline1.vgtest \
+ cmdline2.stderr.exp cmdline2.stdout.exp cmdline2.vgtest \
+ cmdline3.stderr.exp cmdline3.vgtest \
+ cmdline4.stderr.exp cmdline4.vgtest \
+ cmdline5.stderr.exp cmdline5.vgtest \
+ cmdline6.stderr.exp cmdline6.vgtest \
+ cmd-with-special.stderr.exp cmd-with-special.vgtest \
+ coolo_sigaction.stderr.exp \
+ coolo_sigaction.stdout.exp coolo_sigaction.vgtest \
+ coolo_strlen.stderr.exp coolo_strlen.vgtest \
+ discard.stderr.exp discard.stdout.exp \
+ discard.vgtest \
+ exec-sigmask.vgtest exec-sigmask.stdout.exp \
+ exec-sigmask.stdout.exp2 exec-sigmask.stdout.exp3 exec-sigmask.stderr.exp \
+ execve.vgtest execve.stdout.exp execve.stderr.exp \
+ faultstatus.vgtest faultstatus.stderr.exp \
+ fcntl_setown.vgtest fcntl_setown.stdout.exp fcntl_setown.stderr.exp \
+ fdleak_cmsg.stderr.exp fdleak_cmsg.vgtest \
+ fdleak_creat.stderr.exp fdleak_creat.vgtest \
+ fdleak_dup.stderr.exp fdleak_dup.vgtest \
+ fdleak_dup2.stderr.exp fdleak_dup2.vgtest \
+ fdleak_fcntl.stderr.exp fdleak_fcntl.vgtest \
+ fdleak_ipv4.stderr.exp fdleak_ipv4.stdout.exp fdleak_ipv4.vgtest \
+ fdleak_open.stderr.exp fdleak_open.vgtest \
+ fdleak_pipe.stderr.exp fdleak_pipe.vgtest \
+ fdleak_socketpair.stderr.exp fdleak_socketpair.vgtest \
+ floored.stderr.exp floored.stdout.exp floored.vgtest \
+ fork.stderr.exp fork.stdout.exp fork.vgtest \
+ fucomip.stderr.exp fucomip.vgtest \
+ gxx304.stderr.exp gxx304.vgtest \
+ manythreads.stdout.exp manythreads.stderr.exp manythreads.vgtest \
+ map_unaligned.stderr.exp map_unaligned.vgtest \
+ map_unmap.stderr.exp map_unmap.stdout.exp map_unmap.vgtest \
+ mq.stderr.exp mq.vgtest \
+ munmap_exe.stderr.exp munmap_exe.vgtest \
+ nestedfns.stderr.exp nestedfns.stdout.exp nestedfns.vgtest \
+ pending.stdout.exp pending.stderr.exp pending.vgtest \
+ procfs-linux.stderr.exp-with-readlinkat \
+ procfs-linux.stderr.exp-without-readlinkat \
+ procfs-linux.vgtest \
+ procfs-non-linux.stderr.exp procfs-non-linux.vgtest \
+ pth_atfork1.stderr.exp pth_atfork1.stdout.exp pth_atfork1.vgtest \
+ pth_blockedsig.stderr.exp \
+ pth_blockedsig.stdout.exp pth_blockedsig.vgtest \
+ pth_cancel1.stderr.exp pth_cancel1.stdout.exp pth_cancel1.vgtest \
+ pth_cancel2.stderr.exp pth_cancel2.vgtest \
+ pth_cvsimple.stderr.exp pth_cvsimple.stdout.exp pth_cvsimple.vgtest \
+ pth_empty.stderr.exp pth_empty.vgtest \
+ pth_exit.stderr.exp pth_exit.vgtest \
+ pth_exit2.stderr.exp pth_exit2.vgtest \
+ pth_mutexspeed.stderr.exp \
+ pth_mutexspeed.stdout.exp pth_mutexspeed.vgtest \
+ pth_once.stderr.exp pth_once.stdout.exp pth_once.vgtest \
+ pth_rwlock.stderr.exp pth_rwlock.vgtest \
+ pth_stackalign.stderr.exp \
+ pth_stackalign.stdout.exp pth_stackalign.vgtest \
+ rcrl.stderr.exp rcrl.stdout.exp rcrl.vgtest \
+ readline1.stderr.exp readline1.stdout.exp \
+ readline1.vgtest \
+ require-text-symbol-1.vgtest \
+ require-text-symbol-1.stderr.exp \
+ require-text-symbol-2.vgtest \
+ require-text-symbol-2.stderr.exp-libcso6 \
+ res_search.stderr.exp res_search.stdout.exp res_search.vgtest \
+ resolv.stderr.exp resolv.stdout.exp resolv.vgtest \
+ rlimit_nofile.stderr.exp rlimit_nofile.stdout.exp rlimit_nofile.vgtest \
+ selfrun.stderr.exp selfrun.stdout.exp selfrun.vgtest \
+ sem.stderr.exp sem.stdout.exp sem.vgtest \
+ semlimit.stderr.exp semlimit.stdout.exp semlimit.vgtest \
+ shell shell.vgtest shell.stderr.exp shell.stderr.exp-dash \
+ shell.stdout.exp \
+ shell_badinterp shell_badinterp.vgtest shell_badinterp.stderr.exp \
+ shell_binaryfile shell_binaryfile.vgtest shell_binaryfile.stderr.exp \
+ shell_dir.vgtest shell_dir.stderr.exp \
+ shell_nonexec.vgtest shell_nonexec.stderr.exp \
+ shell_nosuchfile.vgtest shell_nosuchfile.stderr.exp \
+ shell_valid1 shell_valid1.vgtest shell_valid1.stderr.exp \
+ shell_valid2 shell_valid2.vgtest shell_valid2.stderr.exp \
+ shell_valid3 shell_valid3.vgtest shell_valid3.stderr.exp \
+ shell_zerolength shell_zerolength.vgtest shell_zerolength.stderr.exp \
+ shell_zerolength.stderr.exp-dash \
+ sha1_test.stderr.exp sha1_test.vgtest \
+ shortpush.stderr.exp shortpush.vgtest \
+ shorts.stderr.exp shorts.vgtest \
+ sigstackgrowth.stdout.exp sigstackgrowth.stderr.exp sigstackgrowth.vgtest \
+ stackgrowth.stdout.exp stackgrowth.stderr.exp stackgrowth.vgtest \
+ syscall-restart1.vgtest syscall-restart1.stdout.exp syscall-restart1.stderr.exp \
+ syscall-restart2.vgtest syscall-restart2.stdout.exp syscall-restart2.stderr.exp \
+ syslog.vgtest syslog.stderr.exp \
+ system.stderr.exp system.vgtest \
+ thread-exits.stderr.exp thread-exits.stdout.exp thread-exits.vgtest \
+ threaded-fork.stderr.exp threaded-fork.stdout.exp threaded-fork.vgtest \
+ threadederrno.stderr.exp threadederrno.stdout.exp \
+ threadederrno.vgtest \
+ timestamp.stderr.exp timestamp.vgtest \
+ tls.vgtest tls.stderr.exp tls.stdout.exp \
+ vgprintf.stderr.exp vgprintf.vgtest
+
+
+# Extra stuff for C tests
+ansi_CFLAGS = $(AM_CFLAGS) -ansi
+floored_LDADD = -lm
+manythreads_LDADD = -lpthread
+@VGCONF_OS_IS_DARWIN_FALSE@nestedfns_CFLAGS = $(AM_CFLAGS)
+@VGCONF_OS_IS_DARWIN_TRUE@nestedfns_CFLAGS = $(AM_CFLAGS) -fnested-functions
+@VGCONF_OS_IS_DARWIN_FALSE@mq_LDADD = -lrt
+pth_atfork1_LDADD = -lpthread
+pth_blockedsig_LDADD = -lpthread
+pth_cancel1_CFLAGS = $(AM_CFLAGS) -Wno-shadow
+pth_cancel1_LDADD = -lpthread
+pth_cancel2_LDADD = -lpthread
+pth_cvsimple_LDADD = -lpthread
+pth_empty_LDADD = -lpthread
+pth_exit_LDADD = -lpthread
+pth_exit2_LDADD = -lpthread
+pth_mutexspeed_LDADD = -lpthread
+pth_once_LDADD = -lpthread
+pth_rwlock_LDADD = -lpthread
+pth_stackalign_LDADD = -lpthread
+@VGCONF_OS_IS_AIX5_FALSE@res_search_LDADD = -lresolv -lpthread
+@VGCONF_OS_IS_AIX5_TRUE@res_search_LDADD = -lpthread
+@VGCONF_OS_IS_AIX5_FALSE@resolv_LDADD = -lresolv -lpthread
+semlimit_LDADD = -lpthread
+thread_exits_LDADD = -lpthread
+threaded_fork_LDADD = -lpthread
+threadederrno_LDADD = -lpthread
+tls_SOURCES = tls.c tls2.c
+tls_DEPENDENCIES = tls.so tls2.so
+@VGCONF_OS_IS_AIX5_FALSE@tls_LDFLAGS = -Wl,-rpath,$(top_builddir)/none/tests
+@VGCONF_OS_IS_AIX5_TRUE@tls_LDFLAGS =
+tls_LDADD = tls.so tls2.so -lpthread
+tls_so_SOURCES = tls_so.c
+tls_so_DEPENDENCIES = tls2.so
+@VGCONF_OS_IS_AIX5_FALSE@@VGCONF_OS_IS_DARWIN_FALSE@tls_so_LDFLAGS = -Wl,-rpath,$(top_builddir)/none/tests -shared -fPIC
+@VGCONF_OS_IS_AIX5_FALSE@@VGCONF_OS_IS_DARWIN_TRUE@tls_so_LDFLAGS = -dynamic -dynamiclib -all_load -fpic
+@VGCONF_OS_IS_AIX5_TRUE@tls_so_LDFLAGS = -shared -fPIC
+@VGCONF_OS_IS_AIX5_FALSE@@VGCONF_OS_IS_DARWIN_FALSE@tls_so_LDADD = tls2.so
+@VGCONF_OS_IS_AIX5_FALSE@@VGCONF_OS_IS_DARWIN_TRUE@tls_so_LDADD = `pwd`/tls2.so
+@VGCONF_OS_IS_AIX5_TRUE@tls_so_LDADD = `pwd`/tls2.so
+tls_so_CFLAGS = $(AM_CFLAGS) -fPIC
+tls2_so_SOURCES = tls2_so.c
+@VGCONF_OS_IS_DARWIN_FALSE@tls2_so_LDFLAGS = -shared
+@VGCONF_OS_IS_DARWIN_TRUE@tls2_so_LDFLAGS = -dynamic -dynamiclib -all_load
+valgrind_cpp_test_SOURCES = valgrind_cpp_test.cpp
+valgrind_cpp_test_LDADD = -lstdc++
+
+# C++ tests
+coolo_sigaction_SOURCES = coolo_sigaction.cpp
+gxx304_SOURCES = gxx304.cpp
+all: all-recursive
+
+.SUFFIXES:
+.SUFFIXES: .c .cpp .o .obj
+$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
+ -test -z "$(check_PROGRAMS)" || rm -f $(check_PROGRAMS)
+ansi$(EXEEXT): $(ansi_OBJECTS) $(ansi_DEPENDENCIES)
+ @rm -f ansi$(EXEEXT)
+ $(ansi_LINK) $(ansi_OBJECTS) $(ansi_LDADD) $(LIBS)
+args$(EXEEXT): $(args_OBJECTS) $(args_DEPENDENCIES)
+ @rm -f args$(EXEEXT)
+ $(LINK) $(args_OBJECTS) $(args_LDADD) $(LIBS)
+async-sigs$(EXEEXT): $(async_sigs_OBJECTS) $(async_sigs_DEPENDENCIES)
+ @rm -f async-sigs$(EXEEXT)
+ $(LINK) $(async_sigs_OBJECTS) $(async_sigs_LDADD) $(LIBS)
+bitfield1$(EXEEXT): $(bitfield1_OBJECTS) $(bitfield1_DEPENDENCIES)
+ @rm -f bitfield1$(EXEEXT)
+ $(LINK) $(bitfield1_OBJECTS) $(bitfield1_LDADD) $(LIBS)
+bug129866$(EXEEXT): $(bug129866_OBJECTS) $(bug129866_DEPENDENCIES)
+ @rm -f bug129866$(EXEEXT)
+ $(LINK) $(bug129866_OBJECTS) $(bug129866_LDADD) $(LIBS)
+closeall$(EXEEXT): $(closeall_OBJECTS) $(closeall_DEPENDENCIES)
+ @rm -f closeall$(EXEEXT)
+ $(LINK) $(closeall_OBJECTS) $(closeall_LDADD) $(LIBS)
+coolo_sigaction$(EXEEXT): $(coolo_sigaction_OBJECTS) $(coolo_sigaction_DEPENDENCIES)
+ @rm -f coolo_sigaction$(EXEEXT)
+ $(CXXLINK) $(coolo_sigaction_OBJECTS) $(coolo_sigaction_LDADD) $(LIBS)
+coolo_strlen$(EXEEXT): $(coolo_strlen_OBJECTS) $(coolo_strlen_DEPENDENCIES)
+ @rm -f coolo_strlen$(EXEEXT)
+ $(LINK) $(coolo_strlen_OBJECTS) $(coolo_strlen_LDADD) $(LIBS)
+discard$(EXEEXT): $(discard_OBJECTS) $(discard_DEPENDENCIES)
+ @rm -f discard$(EXEEXT)
+ $(LINK) $(discard_OBJECTS) $(discard_LDADD) $(LIBS)
+exec-sigmask$(EXEEXT): $(exec_sigmask_OBJECTS) $(exec_sigmask_DEPENDENCIES)
+ @rm -f exec-sigmask$(EXEEXT)
+ $(LINK) $(exec_sigmask_OBJECTS) $(exec_sigmask_LDADD) $(LIBS)
+execve$(EXEEXT): $(execve_OBJECTS) $(execve_DEPENDENCIES)
+ @rm -f execve$(EXEEXT)
+ $(LINK) $(execve_OBJECTS) $(execve_LDADD) $(LIBS)
+faultstatus$(EXEEXT): $(faultstatus_OBJECTS) $(faultstatus_DEPENDENCIES)
+ @rm -f faultstatus$(EXEEXT)
+ $(LINK) $(faultstatus_OBJECTS) $(faultstatus_LDADD) $(LIBS)
+fcntl_setown$(EXEEXT): $(fcntl_setown_OBJECTS) $(fcntl_setown_DEPENDENCIES)
+ @rm -f fcntl_setown$(EXEEXT)
+ $(LINK) $(fcntl_setown_OBJECTS) $(fcntl_setown_LDADD) $(LIBS)
+fdleak_cmsg$(EXEEXT): $(fdleak_cmsg_OBJECTS) $(fdleak_cmsg_DEPENDENCIES)
+ @rm -f fdleak_cmsg$(EXEEXT)
+ $(LINK) $(fdleak_cmsg_OBJECTS) $(fdleak_cmsg_LDADD) $(LIBS)
+fdleak_creat$(EXEEXT): $(fdleak_creat_OBJECTS) $(fdleak_creat_DEPENDENCIES)
+ @rm -f fdleak_creat$(EXEEXT)
+ $(LINK) $(fdleak_creat_OBJECTS) $(fdleak_creat_LDADD) $(LIBS)
+fdleak_dup$(EXEEXT): $(fdleak_dup_OBJECTS) $(fdleak_dup_DEPENDENCIES)
+ @rm -f fdleak_dup$(EXEEXT)
+ $(LINK) $(fdleak_dup_OBJECTS) $(fdleak_dup_LDADD) $(LIBS)
+fdleak_dup2$(EXEEXT): $(fdleak_dup2_OBJECTS) $(fdleak_dup2_DEPENDENCIES)
+ @rm -f fdleak_dup2$(EXEEXT)
+ $(LINK) $(fdleak_dup2_OBJECTS) $(fdleak_dup2_LDADD) $(LIBS)
+fdleak_fcntl$(EXEEXT): $(fdleak_fcntl_OBJECTS) $(fdleak_fcntl_DEPENDENCIES)
+ @rm -f fdleak_fcntl$(EXEEXT)
+ $(LINK) $(fdleak_fcntl_OBJECTS) $(fdleak_fcntl_LDADD) $(LIBS)
+fdleak_ipv4$(EXEEXT): $(fdleak_ipv4_OBJECTS) $(fdleak_ipv4_DEPENDENCIES)
+ @rm -f fdleak_ipv4$(EXEEXT)
+ $(LINK) $(fdleak_ipv4_OBJECTS) $(fdleak_ipv4_LDADD) $(LIBS)
+fdleak_open$(EXEEXT): $(fdleak_open_OBJECTS) $(fdleak_open_DEPENDENCIES)
+ @rm -f fdleak_open$(EXEEXT)
+ $(LINK) $(fdleak_open_OBJECTS) $(fdleak_open_LDADD) $(LIBS)
+fdleak_pipe$(EXEEXT): $(fdleak_pipe_OBJECTS) $(fdleak_pipe_DEPENDENCIES)
+ @rm -f fdleak_pipe$(EXEEXT)
+ $(LINK) $(fdleak_pipe_OBJECTS) $(fdleak_pipe_LDADD) $(LIBS)
+fdleak_socketpair$(EXEEXT): $(fdleak_socketpair_OBJECTS) $(fdleak_socketpair_DEPENDENCIES)
+ @rm -f fdleak_socketpair$(EXEEXT)
+ $(LINK) $(fdleak_socketpair_OBJECTS) $(fdleak_socketpair_LDADD) $(LIBS)
+floored$(EXEEXT): $(floored_OBJECTS) $(floored_DEPENDENCIES)
+ @rm -f floored$(EXEEXT)
+ $(LINK) $(floored_OBJECTS) $(floored_LDADD) $(LIBS)
+fork$(EXEEXT): $(fork_OBJECTS) $(fork_DEPENDENCIES)
+ @rm -f fork$(EXEEXT)
+ $(LINK) $(fork_OBJECTS) $(fork_LDADD) $(LIBS)
+fucomip$(EXEEXT): $(fucomip_OBJECTS) $(fucomip_DEPENDENCIES)
+ @rm -f fucomip$(EXEEXT)
+ $(LINK) $(fucomip_OBJECTS) $(fucomip_LDADD) $(LIBS)
+gxx304$(EXEEXT): $(gxx304_OBJECTS) $(gxx304_DEPENDENCIES)
+ @rm -f gxx304$(EXEEXT)
+ $(CXXLINK) $(gxx304_OBJECTS) $(gxx304_LDADD) $(LIBS)
+manythreads$(EXEEXT): $(manythreads_OBJECTS) $(manythreads_DEPENDENCIES)
+ @rm -f manythreads$(EXEEXT)
+ $(LINK) $(manythreads_OBJECTS) $(manythreads_LDADD) $(LIBS)
+map_unaligned$(EXEEXT): $(map_unaligned_OBJECTS) $(map_unaligned_DEPENDENCIES)
+ @rm -f map_unaligned$(EXEEXT)
+ $(LINK) $(map_unaligned_OBJECTS) $(map_unaligned_LDADD) $(LIBS)
+map_unmap$(EXEEXT): $(map_unmap_OBJECTS) $(map_unmap_DEPENDENCIES)
+ @rm -f map_unmap$(EXEEXT)
+ $(LINK) $(map_unmap_OBJECTS) $(map_unmap_LDADD) $(LIBS)
+mq$(EXEEXT): $(mq_OBJECTS) $(mq_DEPENDENCIES)
+ @rm -f mq$(EXEEXT)
+ $(LINK) $(mq_OBJECTS) $(mq_LDADD) $(LIBS)
+munmap_exe$(EXEEXT): $(munmap_exe_OBJECTS) $(munmap_exe_DEPENDENCIES)
+ @rm -f munmap_exe$(EXEEXT)
+ $(LINK) $(munmap_exe_OBJECTS) $(munmap_exe_LDADD) $(LIBS)
+nestedfns$(EXEEXT): $(nestedfns_OBJECTS) $(nestedfns_DEPENDENCIES)
+ @rm -f nestedfns$(EXEEXT)
+ $(nestedfns_LINK) $(nestedfns_OBJECTS) $(nestedfns_LDADD) $(LIBS)
+pending$(EXEEXT): $(pending_OBJECTS) $(pending_DEPENDENCIES)
+ @rm -f pending$(EXEEXT)
+ $(LINK) $(pending_OBJECTS) $(pending_LDADD) $(LIBS)
+procfs-cmdline-exe$(EXEEXT): $(procfs_cmdline_exe_OBJECTS) $(procfs_cmdline_exe_DEPENDENCIES)
+ @rm -f procfs-cmdline-exe$(EXEEXT)
+ $(LINK) $(procfs_cmdline_exe_OBJECTS) $(procfs_cmdline_exe_LDADD) $(LIBS)
+pth_atfork1$(EXEEXT): $(pth_atfork1_OBJECTS) $(pth_atfork1_DEPENDENCIES)
+ @rm -f pth_atfork1$(EXEEXT)
+ $(LINK) $(pth_atfork1_OBJECTS) $(pth_atfork1_LDADD) $(LIBS)
+pth_blockedsig$(EXEEXT): $(pth_blockedsig_OBJECTS) $(pth_blockedsig_DEPENDENCIES)
+ @rm -f pth_blockedsig$(EXEEXT)
+ $(LINK) $(pth_blockedsig_OBJECTS) $(pth_blockedsig_LDADD) $(LIBS)
+pth_cancel1$(EXEEXT): $(pth_cancel1_OBJECTS) $(pth_cancel1_DEPENDENCIES)
+ @rm -f pth_cancel1$(EXEEXT)
+ $(pth_cancel1_LINK) $(pth_cancel1_OBJECTS) $(pth_cancel1_LDADD) $(LIBS)
+pth_cancel2$(EXEEXT): $(pth_cancel2_OBJECTS) $(pth_cancel2_DEPENDENCIES)
+ @rm -f pth_cancel2$(EXEEXT)
+ $(LINK) $(pth_cancel2_OBJECTS) $(pth_cancel2_LDADD) $(LIBS)
+pth_cvsimple$(EXEEXT): $(pth_cvsimple_OBJECTS) $(pth_cvsimple_DEPENDENCIES)
+ @rm -f pth_cvsimple$(EXEEXT)
+ $(LINK) $(pth_cvsimple_OBJECTS) $(pth_cvsimple_LDADD) $(LIBS)
+pth_empty$(EXEEXT): $(pth_empty_OBJECTS) $(pth_empty_DEPENDENCIES)
+ @rm -f pth_empty$(EXEEXT)
+ $(LINK) $(pth_empty_OBJECTS) $(pth_empty_LDADD) $(LIBS)
+pth_exit$(EXEEXT): $(pth_exit_OBJECTS) $(pth_exit_DEPENDENCIES)
+ @rm -f pth_exit$(EXEEXT)
+ $(LINK) $(pth_exit_OBJECTS) $(pth_exit_LDADD) $(LIBS)
+pth_exit2$(EXEEXT): $(pth_exit2_OBJECTS) $(pth_exit2_DEPENDENCIES)
+ @rm -f pth_exit2$(EXEEXT)
+ $(LINK) $(pth_exit2_OBJECTS) $(pth_exit2_LDADD) $(LIBS)
+pth_mutexspeed$(EXEEXT): $(pth_mutexspeed_OBJECTS) $(pth_mutexspeed_DEPENDENCIES)
+ @rm -f pth_mutexspeed$(EXEEXT)
+ $(LINK) $(pth_mutexspeed_OBJECTS) $(pth_mutexspeed_LDADD) $(LIBS)
+pth_once$(EXEEXT): $(pth_once_OBJECTS) $(pth_once_DEPENDENCIES)
+ @rm -f pth_once$(EXEEXT)
+ $(LINK) $(pth_once_OBJECTS) $(pth_once_LDADD) $(LIBS)
+pth_rwlock$(EXEEXT): $(pth_rwlock_OBJECTS) $(pth_rwlock_DEPENDENCIES)
+ @rm -f pth_rwlock$(EXEEXT)
+ $(LINK) $(pth_rwlock_OBJECTS) $(pth_rwlock_LDADD) $(LIBS)
+pth_stackalign$(EXEEXT): $(pth_stackalign_OBJECTS) $(pth_stackalign_DEPENDENCIES)
+ @rm -f pth_stackalign$(EXEEXT)
+ $(LINK) $(pth_stackalign_OBJECTS) $(pth_stackalign_LDADD) $(LIBS)
+rcrl$(EXEEXT): $(rcrl_OBJECTS) $(rcrl_DEPENDENCIES)
+ @rm -f rcrl$(EXEEXT)
+ $(LINK) $(rcrl_OBJECTS) $(rcrl_LDADD) $(LIBS)
+readline1$(EXEEXT): $(readline1_OBJECTS) $(readline1_DEPENDENCIES)
+ @rm -f readline1$(EXEEXT)
+ $(LINK) $(readline1_OBJECTS) $(readline1_LDADD) $(LIBS)
+require-text-symbol$(EXEEXT): $(require_text_symbol_OBJECTS) $(require_text_symbol_DEPENDENCIES)
+ @rm -f require-text-symbol$(EXEEXT)
+ $(LINK) $(require_text_symbol_OBJECTS) $(require_text_symbol_LDADD) $(LIBS)
+res_search$(EXEEXT): $(res_search_OBJECTS) $(res_search_DEPENDENCIES)
+ @rm -f res_search$(EXEEXT)
+ $(LINK) $(res_search_OBJECTS) $(res_search_LDADD) $(LIBS)
+resolv$(EXEEXT): $(resolv_OBJECTS) $(resolv_DEPENDENCIES)
+ @rm -f resolv$(EXEEXT)
+ $(LINK) $(resolv_OBJECTS) $(resolv_LDADD) $(LIBS)
+rlimit_nofile$(EXEEXT): $(rlimit_nofile_OBJECTS) $(rlimit_nofile_DEPENDENCIES)
+ @rm -f rlimit_nofile$(EXEEXT)
+ $(LINK) $(rlimit_nofile_OBJECTS) $(rlimit_nofile_LDADD) $(LIBS)
+selfrun$(EXEEXT): $(selfrun_OBJECTS) $(selfrun_DEPENDENCIES)
+ @rm -f selfrun$(EXEEXT)
+ $(LINK) $(selfrun_OBJECTS) $(selfrun_LDADD) $(LIBS)
+sem$(EXEEXT): $(sem_OBJECTS) $(sem_DEPENDENCIES)
+ @rm -f sem$(EXEEXT)
+ $(LINK) $(sem_OBJECTS) $(sem_LDADD) $(LIBS)
+semlimit$(EXEEXT): $(semlimit_OBJECTS) $(semlimit_DEPENDENCIES)
+ @rm -f semlimit$(EXEEXT)
+ $(LINK) $(semlimit_OBJECTS) $(semlimit_LDADD) $(LIBS)
+sha1_test$(EXEEXT): $(sha1_test_OBJECTS) $(sha1_test_DEPENDENCIES)
+ @rm -f sha1_test$(EXEEXT)
+ $(LINK) $(sha1_test_OBJECTS) $(sha1_test_LDADD) $(LIBS)
+shortpush$(EXEEXT): $(shortpush_OBJECTS) $(shortpush_DEPENDENCIES)
+ @rm -f shortpush$(EXEEXT)
+ $(LINK) $(shortpush_OBJECTS) $(shortpush_LDADD) $(LIBS)
+shorts$(EXEEXT): $(shorts_OBJECTS) $(shorts_DEPENDENCIES)
+ @rm -f shorts$(EXEEXT)
+ $(LINK) $(shorts_OBJECTS) $(shorts_LDADD) $(LIBS)
+sigstackgrowth$(EXEEXT): $(sigstackgrowth_OBJECTS) $(sigstackgrowth_DEPENDENCIES)
+ @rm -f sigstackgrowth$(EXEEXT)
+ $(LINK) $(sigstackgrowth_OBJECTS) $(sigstackgrowth_LDADD) $(LIBS)
+stackgrowth$(EXEEXT): $(stackgrowth_OBJECTS) $(stackgrowth_DEPENDENCIES)
+ @rm -f stackgrowth$(EXEEXT)
+ $(LINK) $(stackgrowth_OBJECTS) $(stackgrowth_LDADD) $(LIBS)
+syscall-restart1$(EXEEXT): $(syscall_restart1_OBJECTS) $(syscall_restart1_DEPENDENCIES)
+ @rm -f syscall-restart1$(EXEEXT)
+ $(LINK) $(syscall_restart1_OBJECTS) $(syscall_restart1_LDADD) $(LIBS)
+syscall-restart2$(EXEEXT): $(syscall_restart2_OBJECTS) $(syscall_restart2_DEPENDENCIES)
+ @rm -f syscall-restart2$(EXEEXT)
+ $(LINK) $(syscall_restart2_OBJECTS) $(syscall_restart2_LDADD) $(LIBS)
+syslog$(EXEEXT): $(syslog_OBJECTS) $(syslog_DEPENDENCIES)
+ @rm -f syslog$(EXEEXT)
+ $(LINK) $(syslog_OBJECTS) $(syslog_LDADD) $(LIBS)
+system$(EXEEXT): $(system_OBJECTS) $(system_DEPENDENCIES)
+ @rm -f system$(EXEEXT)
+ $(LINK) $(system_OBJECTS) $(system_LDADD) $(LIBS)
+thread-exits$(EXEEXT): $(thread_exits_OBJECTS) $(thread_exits_DEPENDENCIES)
+ @rm -f thread-exits$(EXEEXT)
+ $(LINK) $(thread_exits_OBJECTS) $(thread_exits_LDADD) $(LIBS)
+threaded-fork$(EXEEXT): $(threaded_fork_OBJECTS) $(threaded_fork_DEPENDENCIES)
+ @rm -f threaded-fork$(EXEEXT)
+ $(LINK) $(threaded_fork_OBJECTS) $(threaded_fork_LDADD) $(LIBS)
+threadederrno$(EXEEXT): $(threadederrno_OBJECTS) $(threadederrno_DEPENDENCIES)
+ @rm -f threadederrno$(EXEEXT)
+ $(LINK) $(threadederrno_OBJECTS) $(threadederrno_LDADD) $(LIBS)
+timestamp$(EXEEXT): $(timestamp_OBJECTS) $(timestamp_DEPENDENCIES)
+ @rm -f timestamp$(EXEEXT)
+ $(LINK) $(timestamp_OBJECTS) $(timestamp_LDADD) $(LIBS)
+tls$(EXEEXT): $(tls_OBJECTS) $(tls_DEPENDENCIES)
+ @rm -f tls$(EXEEXT)
+ $(tls_LINK) $(tls_OBJECTS) $(tls_LDADD) $(LIBS)
+tls.so$(EXEEXT): $(tls_so_OBJECTS) $(tls_so_DEPENDENCIES)
+ @rm -f tls.so$(EXEEXT)
+ $(tls_so_LINK) $(tls_so_OBJECTS) $(tls_so_LDADD) $(LIBS)
+tls2.so$(EXEEXT): $(tls2_so_OBJECTS) $(tls2_so_DEPENDENCIES)
+ @rm -f tls2.so$(EXEEXT)
+ $(tls2_so_LINK) $(tls2_so_OBJECTS) $(tls2_so_LDADD) $(LIBS)
+valgrind_cpp_test$(EXEEXT): $(valgrind_cpp_test_OBJECTS) $(valgrind_cpp_test_DEPENDENCIES)
+ @rm -f valgrind_cpp_test$(EXEEXT)
+ $(CXXLINK) $(valgrind_cpp_test_OBJECTS) $(valgrind_cpp_test_LDADD) $(LIBS)
+vgprintf$(EXEEXT): $(vgprintf_OBJECTS) $(vgprintf_DEPENDENCIES)
+ @rm -f vgprintf$(EXEEXT)
+ $(LINK) $(vgprintf_OBJECTS) $(vgprintf_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ansi-ansi.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/args.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/async-sigs.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/bitfield1.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/bug129866.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/closeall.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coolo_sigaction.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coolo_strlen.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/discard.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/exec-sigmask.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/execve.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/faultstatus.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/fcntl_setown.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/fdleak_cmsg.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/fdleak_creat.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/fdleak_dup.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/fdleak_dup2.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/fdleak_fcntl.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/fdleak_ipv4.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/fdleak_open.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/fdleak_pipe.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/fdleak_socketpair.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/floored.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/fork.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/fucomip.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gxx304.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/manythreads.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/map_unaligned.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/map_unmap.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mq.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/munmap_exe.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nestedfns-nestedfns.Po@am__quote@
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+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+ `test -z '$(STRIP)' || \
+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
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+ @echo "it deletes files that may require special tools to rebuild."
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+clean-am: clean-checkPROGRAMS clean-generic clean-local mostlyclean-am
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+distclean: distclean-recursive
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+distclean-am: clean-am distclean-compile distclean-generic \
+ distclean-tags
+
+dvi: dvi-recursive
+
+dvi-am:
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+html: html-recursive
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+info: info-recursive
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+info-am:
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+install-dvi: install-dvi-recursive
+
+install-exec-am:
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+install-html: install-html-recursive
+
+install-info: install-info-recursive
+
+install-man:
+
+install-pdf: install-pdf-recursive
+
+install-ps: install-ps-recursive
+
+installcheck-am:
+
+maintainer-clean: maintainer-clean-recursive
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
+
+mostlyclean: mostlyclean-recursive
+
+mostlyclean-am: mostlyclean-compile mostlyclean-generic
+
+pdf: pdf-recursive
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+pdf-am:
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+ps: ps-recursive
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+ps-am:
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+uninstall-am:
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+.MAKE: $(RECURSIVE_CLEAN_TARGETS) $(RECURSIVE_TARGETS) install-am \
+ install-strip
+
+.PHONY: $(RECURSIVE_CLEAN_TARGETS) $(RECURSIVE_TARGETS) CTAGS GTAGS \
+ all all-am check check-am check-local clean \
+ clean-checkPROGRAMS clean-generic clean-local ctags \
+ ctags-recursive distclean distclean-compile distclean-generic \
+ distclean-tags distdir dvi dvi-am html html-am info info-am \
+ install install-am install-data install-data-am install-dvi \
+ install-dvi-am install-exec install-exec-am install-html \
+ install-html-am install-info install-info-am install-man \
+ install-pdf install-pdf-am install-ps install-ps-am \
+ install-strip installcheck installcheck-am installdirs \
+ installdirs-am maintainer-clean maintainer-clean-generic \
+ mostlyclean mostlyclean-compile mostlyclean-generic pdf pdf-am \
+ ps ps-am tags tags-recursive uninstall uninstall-am
+
+
+# This used to be required when Vex had a handwritten Makefile. It
+# shouldn't be needed any more, though.
+
+#----------------------------------------------------------------------------
+# noinst_PROGRAMS and noinst_DSYMS targets
+#----------------------------------------------------------------------------
+
+# On Darwin, for a program 'p', the DWARF debug info is stored in the
+# directory 'p.dSYM'. This must be generated after the executable is
+# created, with 'dsymutil p'. We could redefine LINK with a script that
+# executes 'dsymutil' after linking, but that's a pain. Instead we use this
+# hook so that every time "make check" is run, we subsequently invoke
+# 'dsymutil' on all the executables that lack a .dSYM directory, or that are
+# newer than their corresponding .dSYM directory.
+build-noinst_DSYMS: $(noinst_DSYMS)
+ for f in $(noinst_DSYMS); do \
+ if [ ! -e $$f.dSYM -o $$f -nt $$f.dSYM ] ; then \
+ echo "dsymutil $$f"; \
+ dsymutil $$f; \
+ fi; \
+ done
+
+# This is used by coregrind/Makefile.am and Makefile.tool.am for doing
+# "in-place" installs. It copies $(noinst_PROGRAMS) into $inplacedir.
+# It needs to be depended on by an 'all-local' rule.
+inplace-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_PROGRAMS) ; do \
+ rm -f $(inplacedir)/$$f; \
+ ln -f -s ../$(subdir)/$$f $(inplacedir); \
+ done
+
+# Similar to inplace-noinst_PROGRAMS
+inplace-noinst_DSYMS: build-noinst_DSYMS
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+ for f in $(noinst_DSYMS); do \
+ rm -f $(inplacedir)/$$f.dSYM; \
+ ln -f -s ../$(subdir)/$$f.dSYM $(inplacedir); \
+ done
+
+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
+# "make install". It copies $(noinst_PROGRAMS) into $prefix/lib/valgrind/.
+# It needs to be depended on by an 'install-exec-local' rule.
+install-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_PROGRAMS); do \
+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
+ done
+
+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
+# directories. XXX: not sure whether the resulting permissions will be
+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_DSYMS); do \
+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
+ done
+
+# This needs to be depended on by a 'clean-local' rule.
+clean-noinst_DSYMS:
+ for f in $(noinst_DSYMS); do \
+ rm -rf $$f.dSYM; \
+ done
+
+check-local: build-noinst_DSYMS
+
+clean-local: clean-noinst_DSYMS
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
K 10
svn:ignore
-V 455
+V 503
*.stderr.diff
*.stderr.out
*.stdout.diff
*.stdout.out
.deps
+Makefile
+Makefile.in
amd64locked
bug127521-64
bug132813-amd64
bug137714-amd64
bug156404-amd64
clc
+cmpxchg
faultstatus
fcmovnu
fxtract
insn_fpu.c
insn_mmx
insn_mmx.c
+insn_pclmulqdq
+insn_pclmulqdq.c
insn_sse
insn_sse.c
insn_sse2
jrcxz
looper
lzcnt64
-Makefile
-Makefile.in
nibz_bennee_mmap
rcl-amd64
redundantRexW
+sbbmisc
shrld
slahf-amd64
smc1
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/none/tests/amd64
svn://svn.valgrind.org/valgrind
-2010-09-28T19:59:47.541961Z
-11389
-sewardj
+2010-10-10T18:59:07.271778Z
+11424
+bart
has-props
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# none/tests/amd64/Makefile. Generated from Makefile.in by configure.
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+
+
+# This file is used for tool tests, and also in perf/Makefile.am.
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
+
+
+pkgdatadir = $(datadir)/valgrind
+pkglibdir = $(libdir)/valgrind
+pkgincludedir = $(includedir)/valgrind
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+install_sh_DATA = $(install_sh) -c -m 644
+install_sh_PROGRAM = $(install_sh) -c
+install_sh_SCRIPT = $(install_sh) -c
+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+build_triplet = arm-unknown-linux-gnueabi
+host_triplet = arm-unknown-linux-gnueabi
+DIST_COMMON = $(dist_noinst_SCRIPTS) $(srcdir)/Makefile.am \
+ $(srcdir)/Makefile.in $(top_srcdir)/Makefile.all.am \
+ $(top_srcdir)/Makefile.tool-tests.am
+#am__append_1 = insn_sse3
+#am__append_2 = insn_ssse3
+#am__append_3 = insn_pclmulqdq
+check_PROGRAMS = amd64locked$(EXEEXT) bug127521-64$(EXEEXT) \
+ bug132813-amd64$(EXEEXT) bug132918$(EXEEXT) clc$(EXEEXT) \
+ cmpxchg$(EXEEXT) $(am__EXEEXT_4) rcl-amd64$(EXEEXT) \
+ redundantRexW$(EXEEXT) smc1$(EXEEXT) sbbmisc$(EXEEXT) \
+ nibz_bennee_mmap$(EXEEXT) xadd$(EXEEXT) $(am__EXEEXT_5) \
+ $(am__EXEEXT_6) $(am__EXEEXT_7)
+#am__append_4 = ssse3_misaligned
+#am__append_5 = lzcnt64
+
+# DDD: these need to be made to work on Darwin like the x86/ ones were.
+am__append_6 = \
+ bug137714-amd64 \
+ bug156404-amd64 \
+ faultstatus \
+ fcmovnu \
+ fxtract \
+ looper \
+ jrcxz \
+ shrld \
+ slahf-amd64
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+#am__EXEEXT_1 = insn_sse3$(EXEEXT)
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+ $(am__EXEEXT_2) $(am__EXEEXT_3)
+#am__EXEEXT_5 = ssse3_misaligned$(EXEEXT)
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+ bug156404-amd64$(EXEEXT) \
+ faultstatus$(EXEEXT) \
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+ looper$(EXEEXT) jrcxz$(EXEEXT) \
+ shrld$(EXEEXT) slahf-amd64$(EXEEXT)
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+amd64locked_LINK = $(CCLD) $(amd64locked_CFLAGS) $(CFLAGS) \
+ $(AM_LDFLAGS) $(LDFLAGS) -o $@
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+sbbmisc_LDADD = $(LDADD)
+shrld_SOURCES = shrld.c
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+shrld_LDADD = $(LDADD)
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+smc1_SOURCES = smc1.c
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+smc1_LDADD = $(LDADD)
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+SOURCES = amd64locked.c bug127521-64.c bug132813-amd64.c bug132918.c \
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+ faultstatus.c fcmovnu.c fxtract.c $(insn_basic_SOURCES) \
+ $(insn_fpu_SOURCES) $(insn_mmx_SOURCES) insn_pclmulqdq.c \
+ $(insn_sse_SOURCES) $(insn_sse2_SOURCES) $(insn_sse3_SOURCES) \
+ $(insn_ssse3_SOURCES) jrcxz.c looper.c lzcnt64.c \
+ nibz_bennee_mmap.c rcl-amd64.c redundantRexW.c sbbmisc.c \
+ shrld.c slahf-amd64.c smc1.c ssse3_misaligned.c xadd.c
+DIST_SOURCES = amd64locked.c bug127521-64.c bug132813-amd64.c \
+ bug132918.c bug137714-amd64.c bug156404-amd64.c clc.c \
+ cmpxchg.c faultstatus.c fcmovnu.c fxtract.c \
+ $(insn_basic_SOURCES) $(insn_fpu_SOURCES) $(insn_mmx_SOURCES) \
+ insn_pclmulqdq.c $(insn_sse_SOURCES) $(insn_sse2_SOURCES) \
+ $(insn_sse3_SOURCES) $(insn_ssse3_SOURCES) jrcxz.c looper.c \
+ lzcnt64.c nibz_bennee_mmap.c rcl-amd64.c redundantRexW.c \
+ sbbmisc.c shrld.c slahf-amd64.c smc1.c ssse3_misaligned.c \
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+CTAGS = ctags
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+AUTOCONF = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run autoconf
+AUTOHEADER = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run autoheader
+AUTOMAKE = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run automake-1.10
+AWK = gawk
+BOOST_CFLAGS =
+BOOST_LIBS =
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+CCDEPMODE = depmode=gcc3
+CFLAGS = -Wno-long-long -Wno-pointer-sign -fno-stack-protector
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+CXXFLAGS = -g -O2
+CYGPATH_W = echo
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+localedir = ${datarootdir}/locale
+localstatedir = ${prefix}/var
+mandir = ${datarootdir}/man
+mkdir_p = /scratchbox/tools/bin/mkdir -p
+oldincludedir = /usr/include
+pdfdir = ${docdir}
+prefix = /usr
+program_transform_name = s,x,x,
+psdir = ${docdir}
+sbindir = ${exec_prefix}/sbin
+sharedstatedir = ${prefix}/com
+srcdir = .
+sysconfdir = ${prefix}/etc
+target_alias =
+top_builddir = ../../..
+top_srcdir = ../../..
+inplacedir = $(top_builddir)/.in_place
+
+#----------------------------------------------------------------------------
+# Flags
+#----------------------------------------------------------------------------
+
+# Baseline flags for all compilations. Aim here is to maximise
+# performance and get whatever useful warnings we can out of gcc.
+AM_CFLAGS_BASE = \
+ -O2 -g \
+ -Wall \
+ -Wmissing-prototypes \
+ -Wshadow \
+ -Wpointer-arith \
+ -Wstrict-prototypes \
+ -Wmissing-declarations \
+ -Wno-format-zero-length \
+ -fno-strict-aliasing
+
+AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+#AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+# -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
+# and so the CPPFLAGS are passed to the assembler. But this is not true for
+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
+# AM_CPPFLAGS_<PLATFORM> in each AM_CCASFLAGS_<PLATFORM> variable. This
+# means some of the flags are duplicated on systems with newer versions of
+# automake, but this does not really matter and seems hard to avoid.
+AM_CPPFLAGS_ARM_LINUX = \
+ -I$(top_srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_arm=1 \
+ -DVGO_linux=1 \
+ -DVGP_arm_linux=1
+
+#AM_CPPFLAGS_ = \
+# -I$(top_srcdir) \
+# -I$(top_srcdir)/include \
+# -I$(top_srcdir)/VEX/pub \
+# -DVGA_=1 \
+# -DVGO_linux=1 \
+# -DVGP__linux=1
+
+AM_FLAG_M3264_X86_LINUX =
+AM_CFLAGS_X86_LINUX = \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) -g
+AM_FLAG_M3264_AMD64_LINUX =
+AM_CFLAGS_AMD64_LINUX = -fomit-frame-pointer \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) -g
+AM_FLAG_M3264_PPC32_LINUX =
+AM_CFLAGS_PPC32_LINUX = $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_LINUX = $(AM_CPPFLAGS_PPC32_LINUX) -g
+AM_FLAG_M3264_PPC64_LINUX =
+AM_CFLAGS_PPC64_LINUX = $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_LINUX = $(AM_CPPFLAGS_PPC64_LINUX) -g
+AM_FLAG_M3264_ARM_LINUX =
+AM_CFLAGS_ARM_LINUX = \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) -g
+AM_FLAG_M3264_PPC32_AIX5 =
+AM_CFLAGS_PPC32_AIX5 = -mcpu=powerpc $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
+ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 =
+AM_CFLAGS_PPC64_AIX5 = -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 \
+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_ARM_LINUX)
+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_ARM_LINUX)
+AM_CFLAGS_PRI = $(AM_CFLAGS_ARM_LINUX)
+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_ARM_LINUX)
+AM_FLAG_M3264_SEC =
+#AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
+# as $(AM_FLAG_M3264_PRI).
+AM_CFLAGS = -Winline -Wall -Wshadow -g
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS)
+#noinst_DSYMS = $(check_PROGRAMS)
+dist_noinst_SCRIPTS = filter_cpuid filter_stderr filter_int gen_insn_test.pl
+CLEANFILES = $(addsuffix .c,$(INSN_TESTS))
+INSN_TESTS = insn_basic insn_mmx insn_sse insn_sse2 insn_fpu \
+ $(am__append_1) $(am__append_2) $(am__append_3)
+
+# Explicitly include insn_sse3 even if ! BUILD_SSE3_TESTS,
+# to avoid packaging screwups if 'make dist' is run on a machine
+# which failed the BUILD_SSE3_TESTS test in configure.in.
+EXTRA_DIST = \
+ amd64locked.vgtest amd64locked.stdout.exp amd64locked.stderr.exp \
+ bug127521-64.vgtest bug127521-64.stdout.exp bug127521-64.stderr.exp \
+ bug132813-amd64.vgtest bug132813-amd64.stdout.exp \
+ bug132813-amd64.stderr.exp \
+ bug137714-amd64.vgtest bug137714-amd64.stdout.exp \
+ bug137714-amd64.stderr.exp \
+ bug132918.vgtest bug132918.stderr.exp bug132918.stdout.exp \
+ bug156404-amd64.vgtest bug156404-amd64.stdout.exp \
+ bug156404-amd64.stderr.exp \
+ clc.vgtest clc.stdout.exp clc.stderr.exp \
+ cmpxchg.vgtest cmpxchg.stdout.exp cmpxchg.stderr.exp \
+ faultstatus.disabled faultstatus.stderr.exp \
+ fcmovnu.vgtest fcmovnu.stderr.exp fcmovnu.stdout.exp \
+ fxtract.vgtest fxtract.stderr.exp fxtract.stdout.exp \
+ $(addsuffix .stderr.exp,$(INSN_TESTS)) \
+ $(addsuffix .stdout.exp,$(INSN_TESTS)) \
+ $(addsuffix .vgtest,$(INSN_TESTS)) \
+ insn_sse3.stdout.exp insn_sse3.stderr.exp insn_sse3.vgtest \
+ insn_ssse3.stdout.exp insn_ssse3.stderr.exp insn_ssse3.vgtest \
+ jrcxz.stderr.exp jrcxz.stdout.exp jrcxz.vgtest \
+ looper.stderr.exp looper.stdout.exp looper.vgtest \
+ lzcnt64.stderr.exp lzcnt64.stdout.exp lzcnt64.vgtest \
+ nibz_bennee_mmap.stderr.exp nibz_bennee_mmap.stdout.exp \
+ nibz_bennee_mmap.vgtest \
+ rcl-amd64.vgtest rcl-amd64.stdout.exp rcl-amd64.stderr.exp \
+ redundantRexW.vgtest redundantRexW.stdout.exp \
+ redundantRexW.stderr.exp \
+ smc1.stderr.exp smc1.stdout.exp smc1.vgtest \
+ sbbmisc.stderr.exp sbbmisc.stdout.exp sbbmisc.vgtest \
+ shrld.stderr.exp shrld.stdout.exp shrld.vgtest \
+ ssse3_misaligned.stderr.exp ssse3_misaligned.stdout.exp \
+ ssse3_misaligned.vgtest \
+ ssse3_misaligned.c \
+ slahf-amd64.stderr.exp slahf-amd64.stdout.exp \
+ slahf-amd64.vgtest \
+ xadd.stderr.exp xadd.stdout.exp xadd.vgtest
+
+
+# generic C ones
+amd64locked_CFLAGS = $(AM_CFLAGS) -O
+bug132918_LDADD = -lm
+insn_basic_SOURCES = insn_basic.def
+insn_basic_LDADD = -lm
+insn_mmx_SOURCES = insn_mmx.def
+insn_mmx_LDADD = -lm
+insn_sse_SOURCES = insn_sse.def
+insn_sse_LDADD = -lm
+insn_sse2_SOURCES = insn_sse2.def
+insn_sse2_LDADD = -lm
+insn_sse3_SOURCES = insn_sse3.def
+insn_sse3_LDADD = -lm
+insn_ssse3_SOURCES = insn_ssse3.def
+insn_ssse3_LDADD = -lm
+insn_fpu_SOURCES = insn_fpu.def
+insn_fpu_LDADD = -lm
+fxtract_LDADD = -lm
+all: all-am
+
+.SUFFIXES:
+.SUFFIXES: .c .def .o .obj
+$(srcdir)/Makefile.in: # $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/amd64/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/amd64/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: # $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): # $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
+ -test -z "$(check_PROGRAMS)" || rm -f $(check_PROGRAMS)
+amd64locked$(EXEEXT): $(amd64locked_OBJECTS) $(amd64locked_DEPENDENCIES)
+ @rm -f amd64locked$(EXEEXT)
+ $(amd64locked_LINK) $(amd64locked_OBJECTS) $(amd64locked_LDADD) $(LIBS)
+bug127521-64$(EXEEXT): $(bug127521_64_OBJECTS) $(bug127521_64_DEPENDENCIES)
+ @rm -f bug127521-64$(EXEEXT)
+ $(LINK) $(bug127521_64_OBJECTS) $(bug127521_64_LDADD) $(LIBS)
+bug132813-amd64$(EXEEXT): $(bug132813_amd64_OBJECTS) $(bug132813_amd64_DEPENDENCIES)
+ @rm -f bug132813-amd64$(EXEEXT)
+ $(LINK) $(bug132813_amd64_OBJECTS) $(bug132813_amd64_LDADD) $(LIBS)
+bug132918$(EXEEXT): $(bug132918_OBJECTS) $(bug132918_DEPENDENCIES)
+ @rm -f bug132918$(EXEEXT)
+ $(LINK) $(bug132918_OBJECTS) $(bug132918_LDADD) $(LIBS)
+bug137714-amd64$(EXEEXT): $(bug137714_amd64_OBJECTS) $(bug137714_amd64_DEPENDENCIES)
+ @rm -f bug137714-amd64$(EXEEXT)
+ $(LINK) $(bug137714_amd64_OBJECTS) $(bug137714_amd64_LDADD) $(LIBS)
+bug156404-amd64$(EXEEXT): $(bug156404_amd64_OBJECTS) $(bug156404_amd64_DEPENDENCIES)
+ @rm -f bug156404-amd64$(EXEEXT)
+ $(LINK) $(bug156404_amd64_OBJECTS) $(bug156404_amd64_LDADD) $(LIBS)
+clc$(EXEEXT): $(clc_OBJECTS) $(clc_DEPENDENCIES)
+ @rm -f clc$(EXEEXT)
+ $(LINK) $(clc_OBJECTS) $(clc_LDADD) $(LIBS)
+cmpxchg$(EXEEXT): $(cmpxchg_OBJECTS) $(cmpxchg_DEPENDENCIES)
+ @rm -f cmpxchg$(EXEEXT)
+ $(LINK) $(cmpxchg_OBJECTS) $(cmpxchg_LDADD) $(LIBS)
+faultstatus$(EXEEXT): $(faultstatus_OBJECTS) $(faultstatus_DEPENDENCIES)
+ @rm -f faultstatus$(EXEEXT)
+ $(LINK) $(faultstatus_OBJECTS) $(faultstatus_LDADD) $(LIBS)
+fcmovnu$(EXEEXT): $(fcmovnu_OBJECTS) $(fcmovnu_DEPENDENCIES)
+ @rm -f fcmovnu$(EXEEXT)
+ $(LINK) $(fcmovnu_OBJECTS) $(fcmovnu_LDADD) $(LIBS)
+fxtract$(EXEEXT): $(fxtract_OBJECTS) $(fxtract_DEPENDENCIES)
+ @rm -f fxtract$(EXEEXT)
+ $(LINK) $(fxtract_OBJECTS) $(fxtract_LDADD) $(LIBS)
+insn_basic$(EXEEXT): $(insn_basic_OBJECTS) $(insn_basic_DEPENDENCIES)
+ @rm -f insn_basic$(EXEEXT)
+ $(LINK) $(insn_basic_OBJECTS) $(insn_basic_LDADD) $(LIBS)
+insn_fpu$(EXEEXT): $(insn_fpu_OBJECTS) $(insn_fpu_DEPENDENCIES)
+ @rm -f insn_fpu$(EXEEXT)
+ $(LINK) $(insn_fpu_OBJECTS) $(insn_fpu_LDADD) $(LIBS)
+insn_mmx$(EXEEXT): $(insn_mmx_OBJECTS) $(insn_mmx_DEPENDENCIES)
+ @rm -f insn_mmx$(EXEEXT)
+ $(LINK) $(insn_mmx_OBJECTS) $(insn_mmx_LDADD) $(LIBS)
+insn_pclmulqdq$(EXEEXT): $(insn_pclmulqdq_OBJECTS) $(insn_pclmulqdq_DEPENDENCIES)
+ @rm -f insn_pclmulqdq$(EXEEXT)
+ $(LINK) $(insn_pclmulqdq_OBJECTS) $(insn_pclmulqdq_LDADD) $(LIBS)
+insn_sse$(EXEEXT): $(insn_sse_OBJECTS) $(insn_sse_DEPENDENCIES)
+ @rm -f insn_sse$(EXEEXT)
+ $(LINK) $(insn_sse_OBJECTS) $(insn_sse_LDADD) $(LIBS)
+insn_sse2$(EXEEXT): $(insn_sse2_OBJECTS) $(insn_sse2_DEPENDENCIES)
+ @rm -f insn_sse2$(EXEEXT)
+ $(LINK) $(insn_sse2_OBJECTS) $(insn_sse2_LDADD) $(LIBS)
+insn_sse3$(EXEEXT): $(insn_sse3_OBJECTS) $(insn_sse3_DEPENDENCIES)
+ @rm -f insn_sse3$(EXEEXT)
+ $(LINK) $(insn_sse3_OBJECTS) $(insn_sse3_LDADD) $(LIBS)
+insn_ssse3$(EXEEXT): $(insn_ssse3_OBJECTS) $(insn_ssse3_DEPENDENCIES)
+ @rm -f insn_ssse3$(EXEEXT)
+ $(LINK) $(insn_ssse3_OBJECTS) $(insn_ssse3_LDADD) $(LIBS)
+jrcxz$(EXEEXT): $(jrcxz_OBJECTS) $(jrcxz_DEPENDENCIES)
+ @rm -f jrcxz$(EXEEXT)
+ $(LINK) $(jrcxz_OBJECTS) $(jrcxz_LDADD) $(LIBS)
+looper$(EXEEXT): $(looper_OBJECTS) $(looper_DEPENDENCIES)
+ @rm -f looper$(EXEEXT)
+ $(LINK) $(looper_OBJECTS) $(looper_LDADD) $(LIBS)
+lzcnt64$(EXEEXT): $(lzcnt64_OBJECTS) $(lzcnt64_DEPENDENCIES)
+ @rm -f lzcnt64$(EXEEXT)
+ $(LINK) $(lzcnt64_OBJECTS) $(lzcnt64_LDADD) $(LIBS)
+nibz_bennee_mmap$(EXEEXT): $(nibz_bennee_mmap_OBJECTS) $(nibz_bennee_mmap_DEPENDENCIES)
+ @rm -f nibz_bennee_mmap$(EXEEXT)
+ $(LINK) $(nibz_bennee_mmap_OBJECTS) $(nibz_bennee_mmap_LDADD) $(LIBS)
+rcl-amd64$(EXEEXT): $(rcl_amd64_OBJECTS) $(rcl_amd64_DEPENDENCIES)
+ @rm -f rcl-amd64$(EXEEXT)
+ $(LINK) $(rcl_amd64_OBJECTS) $(rcl_amd64_LDADD) $(LIBS)
+redundantRexW$(EXEEXT): $(redundantRexW_OBJECTS) $(redundantRexW_DEPENDENCIES)
+ @rm -f redundantRexW$(EXEEXT)
+ $(LINK) $(redundantRexW_OBJECTS) $(redundantRexW_LDADD) $(LIBS)
+sbbmisc$(EXEEXT): $(sbbmisc_OBJECTS) $(sbbmisc_DEPENDENCIES)
+ @rm -f sbbmisc$(EXEEXT)
+ $(LINK) $(sbbmisc_OBJECTS) $(sbbmisc_LDADD) $(LIBS)
+shrld$(EXEEXT): $(shrld_OBJECTS) $(shrld_DEPENDENCIES)
+ @rm -f shrld$(EXEEXT)
+ $(LINK) $(shrld_OBJECTS) $(shrld_LDADD) $(LIBS)
+slahf-amd64$(EXEEXT): $(slahf_amd64_OBJECTS) $(slahf_amd64_DEPENDENCIES)
+ @rm -f slahf-amd64$(EXEEXT)
+ $(LINK) $(slahf_amd64_OBJECTS) $(slahf_amd64_LDADD) $(LIBS)
+smc1$(EXEEXT): $(smc1_OBJECTS) $(smc1_DEPENDENCIES)
+ @rm -f smc1$(EXEEXT)
+ $(LINK) $(smc1_OBJECTS) $(smc1_LDADD) $(LIBS)
+ssse3_misaligned$(EXEEXT): $(ssse3_misaligned_OBJECTS) $(ssse3_misaligned_DEPENDENCIES)
+ @rm -f ssse3_misaligned$(EXEEXT)
+ $(LINK) $(ssse3_misaligned_OBJECTS) $(ssse3_misaligned_LDADD) $(LIBS)
+xadd$(EXEEXT): $(xadd_OBJECTS) $(xadd_DEPENDENCIES)
+ @rm -f xadd$(EXEEXT)
+ $(LINK) $(xadd_OBJECTS) $(xadd_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+include ./$(DEPDIR)/amd64locked-amd64locked.Po
+include ./$(DEPDIR)/bug127521-64.Po
+include ./$(DEPDIR)/bug132813-amd64.Po
+include ./$(DEPDIR)/bug132918.Po
+include ./$(DEPDIR)/bug137714-amd64.Po
+include ./$(DEPDIR)/bug156404-amd64.Po
+include ./$(DEPDIR)/clc.Po
+include ./$(DEPDIR)/cmpxchg.Po
+include ./$(DEPDIR)/faultstatus.Po
+include ./$(DEPDIR)/fcmovnu.Po
+include ./$(DEPDIR)/fxtract.Po
+include ./$(DEPDIR)/insn_basic.Po
+include ./$(DEPDIR)/insn_fpu.Po
+include ./$(DEPDIR)/insn_mmx.Po
+include ./$(DEPDIR)/insn_pclmulqdq.Po
+include ./$(DEPDIR)/insn_sse.Po
+include ./$(DEPDIR)/insn_sse2.Po
+include ./$(DEPDIR)/insn_sse3.Po
+include ./$(DEPDIR)/insn_ssse3.Po
+include ./$(DEPDIR)/jrcxz.Po
+include ./$(DEPDIR)/looper.Po
+include ./$(DEPDIR)/lzcnt64.Po
+include ./$(DEPDIR)/nibz_bennee_mmap.Po
+include ./$(DEPDIR)/rcl-amd64.Po
+include ./$(DEPDIR)/redundantRexW.Po
+include ./$(DEPDIR)/sbbmisc.Po
+include ./$(DEPDIR)/shrld.Po
+include ./$(DEPDIR)/slahf-amd64.Po
+include ./$(DEPDIR)/smc1.Po
+include ./$(DEPDIR)/ssse3_misaligned.Po
+include ./$(DEPDIR)/xadd.Po
+
+.c.o:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c $<
+
+.c.obj:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
+amd64locked-amd64locked.o: amd64locked.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(amd64locked_CFLAGS) $(CFLAGS) -MT amd64locked-amd64locked.o -MD -MP -MF $(DEPDIR)/amd64locked-amd64locked.Tpo -c -o amd64locked-amd64locked.o `test -f 'amd64locked.c' || echo '$(srcdir)/'`amd64locked.c
+ mv -f $(DEPDIR)/amd64locked-amd64locked.Tpo $(DEPDIR)/amd64locked-amd64locked.Po
+# source='amd64locked.c' object='amd64locked-amd64locked.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(amd64locked_CFLAGS) $(CFLAGS) -c -o amd64locked-amd64locked.o `test -f 'amd64locked.c' || echo '$(srcdir)/'`amd64locked.c
+
+amd64locked-amd64locked.obj: amd64locked.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(amd64locked_CFLAGS) $(CFLAGS) -MT amd64locked-amd64locked.obj -MD -MP -MF $(DEPDIR)/amd64locked-amd64locked.Tpo -c -o amd64locked-amd64locked.obj `if test -f 'amd64locked.c'; then $(CYGPATH_W) 'amd64locked.c'; else $(CYGPATH_W) '$(srcdir)/amd64locked.c'; fi`
+ mv -f $(DEPDIR)/amd64locked-amd64locked.Tpo $(DEPDIR)/amd64locked-amd64locked.Po
+# source='amd64locked.c' object='amd64locked-amd64locked.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(amd64locked_CFLAGS) $(CFLAGS) -c -o amd64locked-amd64locked.obj `if test -f 'amd64locked.c'; then $(CYGPATH_W) 'amd64locked.c'; else $(CYGPATH_W) '$(srcdir)/amd64locked.c'; fi`
+
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+ mkid -fID $$unique
+tags: TAGS
+
+TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
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+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
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+ test -n "$$unique" || unique=$$empty_fix; \
+ $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
+ $$tags $$unique; \
+ fi
+ctags: CTAGS
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+ tags=; \
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+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
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+ dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \
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+ cp -pR $(srcdir)/$$file $(distdir)$$dir || exit 1; \
+ fi; \
+ cp -pR $$d/$$file $(distdir)$$dir || exit 1; \
+ else \
+ test -f $(distdir)/$$file \
+ || cp -p $$d/$$file $(distdir)/$$file \
+ || exit 1; \
+ fi; \
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+check-am: all-am
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+install-am: all-am
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+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+ -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
+
+distclean-generic:
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+maintainer-clean-generic:
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+ @echo "it deletes files that may require special tools to rebuild."
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+clean-am: clean-checkPROGRAMS clean-generic clean-local mostlyclean-am
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+maintainer-clean: maintainer-clean-am
+ -rm -rf ./$(DEPDIR)
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+pdf: pdf-am
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+.PHONY: CTAGS GTAGS all all-am check check-am check-local clean \
+ clean-checkPROGRAMS clean-generic clean-local ctags distclean \
+ distclean-compile distclean-generic distclean-tags distdir dvi \
+ dvi-am html html-am info info-am install install-am \
+ install-data install-data-am install-dvi install-dvi-am \
+ install-exec install-exec-am install-html install-html-am \
+ install-info install-info-am install-man install-pdf \
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+ maintainer-clean-generic mostlyclean mostlyclean-compile \
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+
+
+# This used to be required when Vex had a handwritten Makefile. It
+# shouldn't be needed any more, though.
+
+#----------------------------------------------------------------------------
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+#----------------------------------------------------------------------------
+
+# On Darwin, for a program 'p', the DWARF debug info is stored in the
+# directory 'p.dSYM'. This must be generated after the executable is
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+# executes 'dsymutil' after linking, but that's a pain. Instead we use this
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+# newer than their corresponding .dSYM directory.
+build-noinst_DSYMS: $(noinst_DSYMS)
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+ if [ ! -e $$f.dSYM -o $$f -nt $$f.dSYM ] ; then \
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+ dsymutil $$f; \
+ fi; \
+ done
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+# This is used by coregrind/Makefile.am and Makefile.tool.am for doing
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+ rm -f $(inplacedir)/$$f; \
+ ln -f -s ../$(subdir)/$$f $(inplacedir); \
+ done
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+# Similar to inplace-noinst_PROGRAMS
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+ done
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+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
+# "make install". It copies $(noinst_PROGRAMS) into $prefix/lib/valgrind/.
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+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_PROGRAMS); do \
+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
+ done
+
+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
+# directories. XXX: not sure whether the resulting permissions will be
+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_DSYMS); do \
+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
+ done
+
+# This needs to be depended on by a 'clean-local' rule.
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+ rm -rf $$f.dSYM; \
+ done
+
+check-local: build-noinst_DSYMS
+
+clean-local: clean-noinst_DSYMS
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+.def.c: $(srcdir)/gen_insn_test.pl
+ $(PERL) $(srcdir)/gen_insn_test.pl < $< > $@
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
+
+# This file is used for tool tests, and also in perf/Makefile.am.
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
+
+VPATH = @srcdir@
+pkgdatadir = $(datadir)/@PACKAGE@
+pkglibdir = $(libdir)/@PACKAGE@
+pkgincludedir = $(includedir)/@PACKAGE@
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+install_sh_DATA = $(install_sh) -c -m 644
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+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
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+ $(srcdir)/Makefile.in $(top_srcdir)/Makefile.all.am \
+ $(top_srcdir)/Makefile.tool-tests.am
+@BUILD_SSE3_TESTS_TRUE@am__append_1 = insn_sse3
+@BUILD_SSSE3_TESTS_TRUE@am__append_2 = insn_ssse3
+@BUILD_PCLMULQDQ_TESTS_TRUE@am__append_3 = insn_pclmulqdq
+check_PROGRAMS = amd64locked$(EXEEXT) bug127521-64$(EXEEXT) \
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+ cmpxchg$(EXEEXT) $(am__EXEEXT_4) rcl-amd64$(EXEEXT) \
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+ $(am__EXEEXT_6) $(am__EXEEXT_7)
+@BUILD_SSSE3_TESTS_TRUE@am__append_4 = ssse3_misaligned
+@BUILD_LZCNT_TESTS_TRUE@am__append_5 = lzcnt64
+
+# DDD: these need to be made to work on Darwin like the x86/ ones were.
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+@VGCONF_OS_IS_DARWIN_FALSE@ bug137714-amd64 \
+@VGCONF_OS_IS_DARWIN_FALSE@ bug156404-amd64 \
+@VGCONF_OS_IS_DARWIN_FALSE@ faultstatus \
+@VGCONF_OS_IS_DARWIN_FALSE@ fcmovnu \
+@VGCONF_OS_IS_DARWIN_FALSE@ fxtract \
+@VGCONF_OS_IS_DARWIN_FALSE@ looper \
+@VGCONF_OS_IS_DARWIN_FALSE@ jrcxz \
+@VGCONF_OS_IS_DARWIN_FALSE@ shrld \
+@VGCONF_OS_IS_DARWIN_FALSE@ slahf-amd64
+
+subdir = none/tests/amd64
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+CONFIG_CLEAN_FILES =
+@BUILD_SSE3_TESTS_TRUE@am__EXEEXT_1 = insn_sse3$(EXEEXT)
+@BUILD_SSSE3_TESTS_TRUE@am__EXEEXT_2 = insn_ssse3$(EXEEXT)
+@BUILD_PCLMULQDQ_TESTS_TRUE@am__EXEEXT_3 = insn_pclmulqdq$(EXEEXT)
+am__EXEEXT_4 = insn_basic$(EXEEXT) insn_mmx$(EXEEXT) insn_sse$(EXEEXT) \
+ insn_sse2$(EXEEXT) insn_fpu$(EXEEXT) $(am__EXEEXT_1) \
+ $(am__EXEEXT_2) $(am__EXEEXT_3)
+@BUILD_SSSE3_TESTS_TRUE@am__EXEEXT_5 = ssse3_misaligned$(EXEEXT)
+@BUILD_LZCNT_TESTS_TRUE@am__EXEEXT_6 = lzcnt64$(EXEEXT)
+@VGCONF_OS_IS_DARWIN_FALSE@am__EXEEXT_7 = bug137714-amd64$(EXEEXT) \
+@VGCONF_OS_IS_DARWIN_FALSE@ bug156404-amd64$(EXEEXT) \
+@VGCONF_OS_IS_DARWIN_FALSE@ faultstatus$(EXEEXT) \
+@VGCONF_OS_IS_DARWIN_FALSE@ fcmovnu$(EXEEXT) fxtract$(EXEEXT) \
+@VGCONF_OS_IS_DARWIN_FALSE@ looper$(EXEEXT) jrcxz$(EXEEXT) \
+@VGCONF_OS_IS_DARWIN_FALSE@ shrld$(EXEEXT) slahf-amd64$(EXEEXT)
+amd64locked_SOURCES = amd64locked.c
+amd64locked_OBJECTS = amd64locked-amd64locked.$(OBJEXT)
+amd64locked_LDADD = $(LDADD)
+amd64locked_LINK = $(CCLD) $(amd64locked_CFLAGS) $(CFLAGS) \
+ $(AM_LDFLAGS) $(LDFLAGS) -o $@
+bug127521_64_SOURCES = bug127521-64.c
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+bug156404_amd64_SOURCES = bug156404-amd64.c
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+insn_basic_OBJECTS = $(am_insn_basic_OBJECTS)
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+am_insn_mmx_OBJECTS = insn_mmx.$(OBJEXT)
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+insn_mmx_DEPENDENCIES =
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+am_insn_sse_OBJECTS = insn_sse.$(OBJEXT)
+insn_sse_OBJECTS = $(am_insn_sse_OBJECTS)
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+am_insn_sse2_OBJECTS = insn_sse2.$(OBJEXT)
+insn_sse2_OBJECTS = $(am_insn_sse2_OBJECTS)
+insn_sse2_DEPENDENCIES =
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+insn_ssse3_OBJECTS = $(am_insn_ssse3_OBJECTS)
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+SOURCES = amd64locked.c bug127521-64.c bug132813-amd64.c bug132918.c \
+ bug137714-amd64.c bug156404-amd64.c clc.c cmpxchg.c \
+ faultstatus.c fcmovnu.c fxtract.c $(insn_basic_SOURCES) \
+ $(insn_fpu_SOURCES) $(insn_mmx_SOURCES) insn_pclmulqdq.c \
+ $(insn_sse_SOURCES) $(insn_sse2_SOURCES) $(insn_sse3_SOURCES) \
+ $(insn_ssse3_SOURCES) jrcxz.c looper.c lzcnt64.c \
+ nibz_bennee_mmap.c rcl-amd64.c redundantRexW.c sbbmisc.c \
+ shrld.c slahf-amd64.c smc1.c ssse3_misaligned.c xadd.c
+DIST_SOURCES = amd64locked.c bug127521-64.c bug132813-amd64.c \
+ bug132918.c bug137714-amd64.c bug156404-amd64.c clc.c \
+ cmpxchg.c faultstatus.c fcmovnu.c fxtract.c \
+ $(insn_basic_SOURCES) $(insn_fpu_SOURCES) $(insn_mmx_SOURCES) \
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+ $(insn_sse3_SOURCES) $(insn_ssse3_SOURCES) jrcxz.c looper.c \
+ lzcnt64.c nibz_bennee_mmap.c rcl-amd64.c redundantRexW.c \
+ sbbmisc.c shrld.c slahf-amd64.c smc1.c ssse3_misaligned.c \
+ xadd.c
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+ACLOCAL = @ACLOCAL@
+AMTAR = @AMTAR@
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+AUTOHEADER = @AUTOHEADER@
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+AWK = @AWK@
+BOOST_CFLAGS = @BOOST_CFLAGS@
+BOOST_LIBS = @BOOST_LIBS@
+CC = @CC@
+CCAS = @CCAS@
+CCASDEPMODE = @CCASDEPMODE@
+CCASFLAGS = @CCASFLAGS@
+CCDEPMODE = @CCDEPMODE@
+CFLAGS = @CFLAGS@
+CPP = @CPP@
+CPPFLAGS = @CPPFLAGS@
+CXX = @CXX@
+CXXDEPMODE = @CXXDEPMODE@
+CXXFLAGS = @CXXFLAGS@
+CYGPATH_W = @CYGPATH_W@
+DEFAULT_SUPP = @DEFAULT_SUPP@
+DEFS = @DEFS@
+DEPDIR = @DEPDIR@
+DIFF = @DIFF@
+ECHO_C = @ECHO_C@
+ECHO_N = @ECHO_N@
+ECHO_T = @ECHO_T@
+EGREP = @EGREP@
+EXEEXT = @EXEEXT@
+FLAG_FNO_STACK_PROTECTOR = @FLAG_FNO_STACK_PROTECTOR@
+FLAG_M32 = @FLAG_M32@
+FLAG_M64 = @FLAG_M64@
+FLAG_MAIX32 = @FLAG_MAIX32@
+FLAG_MAIX64 = @FLAG_MAIX64@
+FLAG_MMMX = @FLAG_MMMX@
+FLAG_MSSE = @FLAG_MSSE@
+FLAG_NO_BUILD_ID = @FLAG_NO_BUILD_ID@
+FLAG_UNLIMITED_INLINE_UNIT_GROWTH = @FLAG_UNLIMITED_INLINE_UNIT_GROWTH@
+FLAG_W_EXTRA = @FLAG_W_EXTRA@
+FLAG_W_NO_EMPTY_BODY = @FLAG_W_NO_EMPTY_BODY@
+FLAG_W_NO_FORMAT_ZERO_LENGTH = @FLAG_W_NO_FORMAT_ZERO_LENGTH@
+FLAG_W_NO_UNINITIALIZED = @FLAG_W_NO_UNINITIALIZED@
+GDB = @GDB@
+GLIBC_VERSION = @GLIBC_VERSION@
+GREP = @GREP@
+INSTALL = @INSTALL@
+INSTALL_DATA = @INSTALL_DATA@
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_SCRIPT = @INSTALL_SCRIPT@
+INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
+LDFLAGS = @LDFLAGS@
+LIBOBJS = @LIBOBJS@
+LIBS = @LIBS@
+LN_S = @LN_S@
+LTLIBOBJS = @LTLIBOBJS@
+MAINT = @MAINT@
+MAKEINFO = @MAKEINFO@
+MKDIR_P = @MKDIR_P@
+MPI_CC = @MPI_CC@
+OBJEXT = @OBJEXT@
+PACKAGE = @PACKAGE@
+PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
+PACKAGE_NAME = @PACKAGE_NAME@
+PACKAGE_STRING = @PACKAGE_STRING@
+PACKAGE_TARNAME = @PACKAGE_TARNAME@
+PACKAGE_VERSION = @PACKAGE_VERSION@
+PATH_SEPARATOR = @PATH_SEPARATOR@
+PERL = @PERL@
+PKG_CONFIG = @PKG_CONFIG@
+PREFERRED_STACK_BOUNDARY = @PREFERRED_STACK_BOUNDARY@
+QTCORE_CFLAGS = @QTCORE_CFLAGS@
+QTCORE_LIBS = @QTCORE_LIBS@
+RANLIB = @RANLIB@
+SED = @SED@
+SET_MAKE = @SET_MAKE@
+SHELL = @SHELL@
+STRIP = @STRIP@
+VALT_LOAD_ADDRESS_PRI = @VALT_LOAD_ADDRESS_PRI@
+VALT_LOAD_ADDRESS_SEC = @VALT_LOAD_ADDRESS_SEC@
+VERSION = @VERSION@
+VGCONF_ARCH_PRI = @VGCONF_ARCH_PRI@
+VGCONF_ARCH_SEC = @VGCONF_ARCH_SEC@
+VGCONF_OS = @VGCONF_OS@
+VGCONF_PLATFORM_PRI_CAPS = @VGCONF_PLATFORM_PRI_CAPS@
+VGCONF_PLATFORM_SEC_CAPS = @VGCONF_PLATFORM_SEC_CAPS@
+abs_builddir = @abs_builddir@
+abs_srcdir = @abs_srcdir@
+abs_top_builddir = @abs_top_builddir@
+abs_top_srcdir = @abs_top_srcdir@
+ac_ct_CC = @ac_ct_CC@
+ac_ct_CXX = @ac_ct_CXX@
+am__include = @am__include@
+am__leading_dot = @am__leading_dot@
+am__quote = @am__quote@
+am__tar = @am__tar@
+am__untar = @am__untar@
+bindir = @bindir@
+build = @build@
+build_alias = @build_alias@
+build_cpu = @build_cpu@
+build_os = @build_os@
+build_vendor = @build_vendor@
+builddir = @builddir@
+datadir = @datadir@
+datarootdir = @datarootdir@
+docdir = @docdir@
+dvidir = @dvidir@
+exec_prefix = @exec_prefix@
+host = @host@
+host_alias = @host_alias@
+host_cpu = @host_cpu@
+host_os = @host_os@
+host_vendor = @host_vendor@
+htmldir = @htmldir@
+includedir = @includedir@
+infodir = @infodir@
+install_sh = @install_sh@
+libdir = @libdir@
+libexecdir = @libexecdir@
+localedir = @localedir@
+localstatedir = @localstatedir@
+mandir = @mandir@
+mkdir_p = @mkdir_p@
+oldincludedir = @oldincludedir@
+pdfdir = @pdfdir@
+prefix = @prefix@
+program_transform_name = @program_transform_name@
+psdir = @psdir@
+sbindir = @sbindir@
+sharedstatedir = @sharedstatedir@
+srcdir = @srcdir@
+sysconfdir = @sysconfdir@
+target_alias = @target_alias@
+top_builddir = @top_builddir@
+top_srcdir = @top_srcdir@
+inplacedir = $(top_builddir)/.in_place
+
+#----------------------------------------------------------------------------
+# Flags
+#----------------------------------------------------------------------------
+
+# Baseline flags for all compilations. Aim here is to maximise
+# performance and get whatever useful warnings we can out of gcc.
+AM_CFLAGS_BASE = \
+ -O2 -g \
+ -Wall \
+ -Wmissing-prototypes \
+ -Wshadow \
+ -Wpointer-arith \
+ -Wstrict-prototypes \
+ -Wmissing-declarations \
+ @FLAG_W_NO_FORMAT_ZERO_LENGTH@ \
+ -fno-strict-aliasing
+
+@VGCONF_OS_IS_DARWIN_FALSE@AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+@VGCONF_OS_IS_DARWIN_TRUE@AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+@VGCONF_OS_IS_DARWIN_TRUE@ -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
+# and so the CPPFLAGS are passed to the assembler. But this is not true for
+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
+# AM_CPPFLAGS_<PLATFORM> in each AM_CCASFLAGS_<PLATFORM> variable. This
+# means some of the flags are duplicated on systems with newer versions of
+# automake, but this does not really matter and seems hard to avoid.
+AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@ = \
+ -I$(top_srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_@VGCONF_ARCH_PRI@=1 \
+ -DVGO_@VGCONF_OS@=1 \
+ -DVGP_@VGCONF_ARCH_PRI@_@VGCONF_OS@=1
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@AM_CPPFLAGS_@VGCONF_PLATFORM_SEC_CAPS@ = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir) \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir)/include \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir)/VEX/pub \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGA_@VGCONF_ARCH_SEC@=1 \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGO_@VGCONF_OS@=1 \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGP_@VGCONF_ARCH_SEC@_@VGCONF_OS@=1
+
+AM_FLAG_M3264_X86_LINUX = @FLAG_M32@
+AM_CFLAGS_X86_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_AMD64_LINUX = @FLAG_M64@
+AM_CFLAGS_AMD64_LINUX = @FLAG_M64@ -fomit-frame-pointer \
+ @PREFERRED_STACK_BOUNDARY@ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) @FLAG_M64@ -g
+AM_FLAG_M3264_PPC32_LINUX = @FLAG_M32@
+AM_CFLAGS_PPC32_LINUX = @FLAG_M32@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_LINUX = $(AM_CPPFLAGS_PPC32_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_PPC64_LINUX = @FLAG_M64@
+AM_CFLAGS_PPC64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_LINUX = $(AM_CPPFLAGS_PPC64_LINUX) @FLAG_M64@ -g
+AM_FLAG_M3264_ARM_LINUX = @FLAG_M32@
+AM_CFLAGS_ARM_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_PPC32_AIX5 = @FLAG_MAIX32@
+AM_CFLAGS_PPC32_AIX5 = @FLAG_MAIX32@ -mcpu=powerpc $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
+ @FLAG_MAIX32@ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 = @FLAG_MAIX64@
+AM_CFLAGS_PPC64_AIX5 = @FLAG_MAIX64@ -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ @FLAG_MAIX64@ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 \
+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CFLAGS_PRI = $(AM_CFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+@VGCONF_HAVE_PLATFORM_SEC_FALSE@AM_FLAG_M3264_SEC =
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_@VGCONF_PLATFORM_SEC_CAPS@)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX32@
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX64@
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
+# as $(AM_FLAG_M3264_PRI).
+AM_CFLAGS = -Winline -Wall -Wshadow -g @FLAG_M64@
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g @FLAG_M64@
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS) @FLAG_M64@
+@VGCONF_OS_IS_DARWIN_TRUE@noinst_DSYMS = $(check_PROGRAMS)
+dist_noinst_SCRIPTS = filter_cpuid filter_stderr filter_int gen_insn_test.pl
+CLEANFILES = $(addsuffix .c,$(INSN_TESTS))
+INSN_TESTS = insn_basic insn_mmx insn_sse insn_sse2 insn_fpu \
+ $(am__append_1) $(am__append_2) $(am__append_3)
+
+# Explicitly include insn_sse3 even if ! BUILD_SSE3_TESTS,
+# to avoid packaging screwups if 'make dist' is run on a machine
+# which failed the BUILD_SSE3_TESTS test in configure.in.
+EXTRA_DIST = \
+ amd64locked.vgtest amd64locked.stdout.exp amd64locked.stderr.exp \
+ bug127521-64.vgtest bug127521-64.stdout.exp bug127521-64.stderr.exp \
+ bug132813-amd64.vgtest bug132813-amd64.stdout.exp \
+ bug132813-amd64.stderr.exp \
+ bug137714-amd64.vgtest bug137714-amd64.stdout.exp \
+ bug137714-amd64.stderr.exp \
+ bug132918.vgtest bug132918.stderr.exp bug132918.stdout.exp \
+ bug156404-amd64.vgtest bug156404-amd64.stdout.exp \
+ bug156404-amd64.stderr.exp \
+ clc.vgtest clc.stdout.exp clc.stderr.exp \
+ cmpxchg.vgtest cmpxchg.stdout.exp cmpxchg.stderr.exp \
+ faultstatus.disabled faultstatus.stderr.exp \
+ fcmovnu.vgtest fcmovnu.stderr.exp fcmovnu.stdout.exp \
+ fxtract.vgtest fxtract.stderr.exp fxtract.stdout.exp \
+ $(addsuffix .stderr.exp,$(INSN_TESTS)) \
+ $(addsuffix .stdout.exp,$(INSN_TESTS)) \
+ $(addsuffix .vgtest,$(INSN_TESTS)) \
+ insn_sse3.stdout.exp insn_sse3.stderr.exp insn_sse3.vgtest \
+ insn_ssse3.stdout.exp insn_ssse3.stderr.exp insn_ssse3.vgtest \
+ jrcxz.stderr.exp jrcxz.stdout.exp jrcxz.vgtest \
+ looper.stderr.exp looper.stdout.exp looper.vgtest \
+ lzcnt64.stderr.exp lzcnt64.stdout.exp lzcnt64.vgtest \
+ nibz_bennee_mmap.stderr.exp nibz_bennee_mmap.stdout.exp \
+ nibz_bennee_mmap.vgtest \
+ rcl-amd64.vgtest rcl-amd64.stdout.exp rcl-amd64.stderr.exp \
+ redundantRexW.vgtest redundantRexW.stdout.exp \
+ redundantRexW.stderr.exp \
+ smc1.stderr.exp smc1.stdout.exp smc1.vgtest \
+ sbbmisc.stderr.exp sbbmisc.stdout.exp sbbmisc.vgtest \
+ shrld.stderr.exp shrld.stdout.exp shrld.vgtest \
+ ssse3_misaligned.stderr.exp ssse3_misaligned.stdout.exp \
+ ssse3_misaligned.vgtest \
+ ssse3_misaligned.c \
+ slahf-amd64.stderr.exp slahf-amd64.stdout.exp \
+ slahf-amd64.vgtest \
+ xadd.stderr.exp xadd.stdout.exp xadd.vgtest
+
+
+# generic C ones
+amd64locked_CFLAGS = $(AM_CFLAGS) -O
+bug132918_LDADD = -lm
+insn_basic_SOURCES = insn_basic.def
+insn_basic_LDADD = -lm
+insn_mmx_SOURCES = insn_mmx.def
+insn_mmx_LDADD = -lm
+insn_sse_SOURCES = insn_sse.def
+insn_sse_LDADD = -lm
+insn_sse2_SOURCES = insn_sse2.def
+insn_sse2_LDADD = -lm
+insn_sse3_SOURCES = insn_sse3.def
+insn_sse3_LDADD = -lm
+insn_ssse3_SOURCES = insn_ssse3.def
+insn_ssse3_LDADD = -lm
+insn_fpu_SOURCES = insn_fpu.def
+insn_fpu_LDADD = -lm
+fxtract_LDADD = -lm
+all: all-am
+
+.SUFFIXES:
+.SUFFIXES: .c .def .o .obj
+$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/amd64/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/amd64/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
+ -test -z "$(check_PROGRAMS)" || rm -f $(check_PROGRAMS)
+amd64locked$(EXEEXT): $(amd64locked_OBJECTS) $(amd64locked_DEPENDENCIES)
+ @rm -f amd64locked$(EXEEXT)
+ $(amd64locked_LINK) $(amd64locked_OBJECTS) $(amd64locked_LDADD) $(LIBS)
+bug127521-64$(EXEEXT): $(bug127521_64_OBJECTS) $(bug127521_64_DEPENDENCIES)
+ @rm -f bug127521-64$(EXEEXT)
+ $(LINK) $(bug127521_64_OBJECTS) $(bug127521_64_LDADD) $(LIBS)
+bug132813-amd64$(EXEEXT): $(bug132813_amd64_OBJECTS) $(bug132813_amd64_DEPENDENCIES)
+ @rm -f bug132813-amd64$(EXEEXT)
+ $(LINK) $(bug132813_amd64_OBJECTS) $(bug132813_amd64_LDADD) $(LIBS)
+bug132918$(EXEEXT): $(bug132918_OBJECTS) $(bug132918_DEPENDENCIES)
+ @rm -f bug132918$(EXEEXT)
+ $(LINK) $(bug132918_OBJECTS) $(bug132918_LDADD) $(LIBS)
+bug137714-amd64$(EXEEXT): $(bug137714_amd64_OBJECTS) $(bug137714_amd64_DEPENDENCIES)
+ @rm -f bug137714-amd64$(EXEEXT)
+ $(LINK) $(bug137714_amd64_OBJECTS) $(bug137714_amd64_LDADD) $(LIBS)
+bug156404-amd64$(EXEEXT): $(bug156404_amd64_OBJECTS) $(bug156404_amd64_DEPENDENCIES)
+ @rm -f bug156404-amd64$(EXEEXT)
+ $(LINK) $(bug156404_amd64_OBJECTS) $(bug156404_amd64_LDADD) $(LIBS)
+clc$(EXEEXT): $(clc_OBJECTS) $(clc_DEPENDENCIES)
+ @rm -f clc$(EXEEXT)
+ $(LINK) $(clc_OBJECTS) $(clc_LDADD) $(LIBS)
+cmpxchg$(EXEEXT): $(cmpxchg_OBJECTS) $(cmpxchg_DEPENDENCIES)
+ @rm -f cmpxchg$(EXEEXT)
+ $(LINK) $(cmpxchg_OBJECTS) $(cmpxchg_LDADD) $(LIBS)
+faultstatus$(EXEEXT): $(faultstatus_OBJECTS) $(faultstatus_DEPENDENCIES)
+ @rm -f faultstatus$(EXEEXT)
+ $(LINK) $(faultstatus_OBJECTS) $(faultstatus_LDADD) $(LIBS)
+fcmovnu$(EXEEXT): $(fcmovnu_OBJECTS) $(fcmovnu_DEPENDENCIES)
+ @rm -f fcmovnu$(EXEEXT)
+ $(LINK) $(fcmovnu_OBJECTS) $(fcmovnu_LDADD) $(LIBS)
+fxtract$(EXEEXT): $(fxtract_OBJECTS) $(fxtract_DEPENDENCIES)
+ @rm -f fxtract$(EXEEXT)
+ $(LINK) $(fxtract_OBJECTS) $(fxtract_LDADD) $(LIBS)
+insn_basic$(EXEEXT): $(insn_basic_OBJECTS) $(insn_basic_DEPENDENCIES)
+ @rm -f insn_basic$(EXEEXT)
+ $(LINK) $(insn_basic_OBJECTS) $(insn_basic_LDADD) $(LIBS)
+insn_fpu$(EXEEXT): $(insn_fpu_OBJECTS) $(insn_fpu_DEPENDENCIES)
+ @rm -f insn_fpu$(EXEEXT)
+ $(LINK) $(insn_fpu_OBJECTS) $(insn_fpu_LDADD) $(LIBS)
+insn_mmx$(EXEEXT): $(insn_mmx_OBJECTS) $(insn_mmx_DEPENDENCIES)
+ @rm -f insn_mmx$(EXEEXT)
+ $(LINK) $(insn_mmx_OBJECTS) $(insn_mmx_LDADD) $(LIBS)
+insn_pclmulqdq$(EXEEXT): $(insn_pclmulqdq_OBJECTS) $(insn_pclmulqdq_DEPENDENCIES)
+ @rm -f insn_pclmulqdq$(EXEEXT)
+ $(LINK) $(insn_pclmulqdq_OBJECTS) $(insn_pclmulqdq_LDADD) $(LIBS)
+insn_sse$(EXEEXT): $(insn_sse_OBJECTS) $(insn_sse_DEPENDENCIES)
+ @rm -f insn_sse$(EXEEXT)
+ $(LINK) $(insn_sse_OBJECTS) $(insn_sse_LDADD) $(LIBS)
+insn_sse2$(EXEEXT): $(insn_sse2_OBJECTS) $(insn_sse2_DEPENDENCIES)
+ @rm -f insn_sse2$(EXEEXT)
+ $(LINK) $(insn_sse2_OBJECTS) $(insn_sse2_LDADD) $(LIBS)
+insn_sse3$(EXEEXT): $(insn_sse3_OBJECTS) $(insn_sse3_DEPENDENCIES)
+ @rm -f insn_sse3$(EXEEXT)
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-11285
+2010-10-11T22:17:20.414768Z
+4174d26cc5bdef118caf4c7a9e3aafd7
+2010-10-11T17:41:46.733843Z
+11426
sewardj
-219844
+223956
\f
v6media.c
file
/* test macros to generate and output the result of a single instruction */
+const unsigned int mem[] = {
+ 0x121f1e1f, 0x131b1a1b, 0x141c1f1c, 0x151d191d,
+ 0x232f2e2f, 0x242c2b2b, 0x252a2e2b, 0x262d2d2a,
+ 0x3f343f3e, 0x3e353d3c, 0x363a3c3b, 0x3b373b3a,
+ 0x454f4e45, 0x4e464d46, 0x474d474c, 0x4a484a4c
+};
+
#define TESTINSN_imm(instruction, QD, imm) \
{ \
unsigned int out[4]; \
); \
printf("%s, #" #imm " :: Qd 0x%08x 0x%08x 0x%08x 0x%08x\n", \
instruction, out[3], out[2], out[1], out[0]); \
+}\
+{ \
+ unsigned int out[4]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %1, %2\n\t" \
+ "vldmia %1!, {" #QD "}\n\t" \
+ instruction ", #" #imm "\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ : \
+ : "r" (out), "r" (addr), "r" (mem) \
+ : #QD, "%2", "memory" \
+ ); \
+ printf("%s, #" #imm " :: Qd 0x%08x 0x%08x 0x%08x 0x%08x\n", \
+ instruction, out[3], out[2], out[1], out[0]); \
}
#define TESTINSN_un(instruction, QD, QM, QMtype, QMval) \
); \
printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x\n", \
instruction, out[3], out[2], out[1], out[0], QMval); \
+} \
+{ \
+ unsigned int out[4]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %2, %3\n\t" \
+ "vldmia %2!, {" #QD "}\n\t" \
+ "vldmia %2!, {" #QM "}\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ : \
+ : "r" (out), "r" (QMval), "r" (addr), "r" (mem) \
+ : #QD, #QM, "%2", "memory" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x\n", \
+ instruction, out[3], out[2], out[1], out[0], QMval); \
}
+
#define TESTINSN_un_q(instruction, QD, QM, QMtype, QMval) \
{ \
unsigned int out[4]; \
printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
" fpscr: %08x\n", \
instruction, out[3], out[2], out[1], out[0], QMval, fpscr); \
+} \
+{ \
+ unsigned int out[4]; \
+ unsigned int fpscr; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "vmov.i8 " #QD ", #0x55" "\n\t" \
+ "mov r4, #0\n\t" \
+ MOVE_to_FPSCR_from_R4 \
+ "mov %3, %4\n\t" \
+ "vldmia %3!, {" #QM "}\n\t" \
+ instruction "\n\t" \
+ "vstmia %1, {" #QD "}\n\t" \
+ MOVE_to_R4_from_FPSCR \
+ "mov %0, r4" \
+ : "=r" (fpscr) \
+ : "r" (out), "r" (QMval), "r" (addr), "r" (mem) \
+ : #QD, #QM, "memory", "r4" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " fpscr: %08x\n", \
+ instruction, out[3], out[2], out[1], out[0], QMval, fpscr); \
}
#define TESTINSN_bin(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \
printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
" Qn (" #QNtype ")0x%08x\n", \
instruction, out[3], out[2], out[1], out[0], QMval, QNval); \
-}
+} \
+/*{ \
+ unsigned int out[4]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %0, %4\n\t" \
+ "vldmia %0!, {" #QM "}\n\t" \
+ "vmov.i8 " #QD ", #0x55" "\n\t" \
+ "vdup." #QNtype " " #QN ", %3\n\t" \
+ instruction "\n\t" \
+ "vstmia %1, {" #QD "}\n\t" \
+ : "+r" (addr) \
+ : "r" (out), "r" (QMval), "r" (QNval), "r" (mem) \
+ : #QD, #QM, #QN, "memory" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x\n", \
+ instruction, out[3], out[2], out[1], out[0], QMval, QNval); \
+} */
#define TESTINSN_bin_f(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \
{ \
printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
" Qn (" #QNtype ")0x%08x\n", \
instruction, out[3], out[2], out[1], out[0], QMval, QNval); \
+} \
+{ \
+ unsigned int out[4]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "vdup.i32 " #QD ", %3\n\t" \
+ "mov %4, %5\n\t" \
+ "vldmia %4!, {" #QM "}\n\t" \
+ "vdup." #QNtype " " #QN ", %2\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ : \
+ : "r" (out), "r" (QMval), "r" (QNval), "r"(0x3f800000), "r" (addr), "r" (mem) \
+ : #QD, #QM, #QN, "memory" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x\n", \
+ instruction, out[3], out[2], out[1], out[0], QMval, QNval); \
}
#define TESTINSN_bin_q(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \
printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
" Qn (" #QNtype ")0x%08x fpscr: %08x\n", \
instruction, out[3], out[2], out[1], out[0], QMval, QNval, fpscr); \
+} \
+{ \
+ unsigned int out[4]; \
+ unsigned int fpscr; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "vmov.i8 " #QD ", #0x55" "\n\t" \
+ "mov r4, #0\n\t" \
+ MOVE_to_FPSCR_from_R4 \
+ "mov %4, %5\n\t" \
+ "vldmia %4!, {" #QM "}\n\t" \
+ "vdup." #QNtype " " #QN ", %3\n\t" \
+ instruction "\n\t" \
+ "vstmia %1, {" #QD "}\n\t" \
+ MOVE_to_R4_from_FPSCR \
+ "mov %0, r4" \
+ : "=r" (fpscr) \
+ : "r" (out), "r" (QMval), "r" (QNval), "r" (addr), "r" (mem) \
+ : #QD, #QM, #QN, "memory", "r4" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x fpscr: %08x\n", \
+ instruction, out[1], out[0], QMval, QNval, fpscr); \
+ printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x fpscr: %08x\n", \
+ instruction, out[3], out[2], out[1], out[0], QMval, QNval, fpscr); \
}
#define TESTINSN_dual(instruction, QM, QMtype, QMval, QN, QNtype, QNval) \
" Qm (" #QMtype ")0x%08x Qn (" #QNtype ")0x%08x\n", \
instruction, out1[3], out1[2], out1[1], out1[0], \
out2[3], out2[2], out2[1], out2[0], QMval, QNval); \
-}
-
-// Ditto TESTING_bin(), but in QD all zeros
-#define TESTINSN_bin_0s(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \
+} \
{ \
- unsigned int out[4]; \
-\
- __asm__ volatile( \
- "vmov.i8 " #QD ", #0x00" "\n\t" \
- "vdup." #QMtype " " #QM ", %1\n\t" \
- "vdup." #QNtype " " #QN ", %2\n\t" \
- instruction "\n\t" \
- "vstmia %0, {" #QD "}\n\t" \
- : \
- : "r" (out), "r" (QMval), "r" (QNval) \
- : #QD, #QM, #QN, "memory" \
- ); \
- printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
- " Qn (" #QNtype ")0x%08x\n", \
- instruction, out[3], out[2], out[1], out[0], QMval, QNval); \
+ unsigned int out1[4]; \
+ unsigned int out2[4]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %4, %5\n\t" \
+ "vldmia %4!, {" #QM "}\n\t" \
+ "vdup." #QNtype " " #QN ", %3\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QM "}\n\t" \
+ "vstmia %1, {" #QN "}\n\t" \
+ : \
+ : "r" (out1), "r" (out2), "r" (QMval), "r" (QNval), "r" (addr), "r" (mem) \
+ : #QM, #QN, "%4", "memory" \
+ ); \
+ printf("%s :: Qm 0x%08x 0x%08x 0x%08x 0x%08x Qn 0x%08x 0x%08x 0x%08x 0x%08x\nQm (" \
+#QMtype ")0x%08x" " Qn (" #QNtype ")0x%08x\n", \
+ instruction, out1[3], out1[2], out1[1], out1[0],\
+ out2[3], out2[2], out2[1], out2[0], QMval, QNval); \
}
#if 0
----- VMOV (immediate) -----
vmov.i32 q0, #0x7 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007
+vmov.i32 q0, #0x7 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007
+vmov.i16 q1, #0x7 :: Qd 0x00070007 0x00070007 0x00070007 0x00070007
vmov.i16 q1, #0x7 :: Qd 0x00070007 0x00070007 0x00070007 0x00070007
vmov.i8 q2, #0x7 :: Qd 0x07070707 0x07070707 0x07070707 0x07070707
+vmov.i8 q2, #0x7 :: Qd 0x07070707 0x07070707 0x07070707 0x07070707
vmov.i32 q5, #0x700 :: Qd 0x00000700 0x00000700 0x00000700 0x00000700
+vmov.i32 q5, #0x700 :: Qd 0x00000700 0x00000700 0x00000700 0x00000700
+vmov.i16 q7, #0x700 :: Qd 0x07000700 0x07000700 0x07000700 0x07000700
vmov.i16 q7, #0x700 :: Qd 0x07000700 0x07000700 0x07000700 0x07000700
vmov.i32 q10, #0x70000 :: Qd 0x00070000 0x00070000 0x00070000 0x00070000
+vmov.i32 q10, #0x70000 :: Qd 0x00070000 0x00070000 0x00070000 0x00070000
vmov.i32 q12, #0x7000000 :: Qd 0x07000000 0x07000000 0x07000000 0x07000000
+vmov.i32 q12, #0x7000000 :: Qd 0x07000000 0x07000000 0x07000000 0x07000000
+vmov.i32 q13, #0x7FF :: Qd 0x000007ff 0x000007ff 0x000007ff 0x000007ff
vmov.i32 q13, #0x7FF :: Qd 0x000007ff 0x000007ff 0x000007ff 0x000007ff
vmov.i32 q14, #0x7FFFF :: Qd 0x0007ffff 0x0007ffff 0x0007ffff 0x0007ffff
+vmov.i32 q14, #0x7FFFF :: Qd 0x0007ffff 0x0007ffff 0x0007ffff 0x0007ffff
+vmov.i64 q15, #0xFF0000FF00FFFF00 :: Qd 0xff0000ff 0x00ffff00 0xff0000ff 0x00ffff00
vmov.i64 q15, #0xFF0000FF00FFFF00 :: Qd 0xff0000ff 0x00ffff00 0xff0000ff 0x00ffff00
----- VMVN (immediate) -----
vmvn.i32 q0, #0x7 :: Qd 0xfffffff8 0xfffffff8 0xfffffff8 0xfffffff8
+vmvn.i32 q0, #0x7 :: Qd 0xfffffff8 0xfffffff8 0xfffffff8 0xfffffff8
vmvn.i16 q1, #0x7 :: Qd 0xfff8fff8 0xfff8fff8 0xfff8fff8 0xfff8fff8
+vmvn.i16 q1, #0x7 :: Qd 0xfff8fff8 0xfff8fff8 0xfff8fff8 0xfff8fff8
+vmvn.i8 q2, #0x7 :: Qd 0xf8f8f8f8 0xf8f8f8f8 0xf8f8f8f8 0xf8f8f8f8
vmvn.i8 q2, #0x7 :: Qd 0xf8f8f8f8 0xf8f8f8f8 0xf8f8f8f8 0xf8f8f8f8
vmvn.i32 q5, #0x700 :: Qd 0xfffff8ff 0xfffff8ff 0xfffff8ff 0xfffff8ff
+vmvn.i32 q5, #0x700 :: Qd 0xfffff8ff 0xfffff8ff 0xfffff8ff 0xfffff8ff
vmvn.i16 q7, #0x700 :: Qd 0xf8fff8ff 0xf8fff8ff 0xf8fff8ff 0xf8fff8ff
+vmvn.i16 q7, #0x700 :: Qd 0xf8fff8ff 0xf8fff8ff 0xf8fff8ff 0xf8fff8ff
+vmvn.i32 q10, #0x70000 :: Qd 0xfff8ffff 0xfff8ffff 0xfff8ffff 0xfff8ffff
vmvn.i32 q10, #0x70000 :: Qd 0xfff8ffff 0xfff8ffff 0xfff8ffff 0xfff8ffff
vmvn.i32 q13, #0x7000000 :: Qd 0xf8ffffff 0xf8ffffff 0xf8ffffff 0xf8ffffff
+vmvn.i32 q13, #0x7000000 :: Qd 0xf8ffffff 0xf8ffffff 0xf8ffffff 0xf8ffffff
+vmvn.i32 q11, #0x7FF :: Qd 0xfffff800 0xfffff800 0xfffff800 0xfffff800
vmvn.i32 q11, #0x7FF :: Qd 0xfffff800 0xfffff800 0xfffff800 0xfffff800
vmvn.i32 q14, #0x7FFFF :: Qd 0xfff80000 0xfff80000 0xfff80000 0xfff80000
+vmvn.i32 q14, #0x7FFFF :: Qd 0xfff80000 0xfff80000 0xfff80000 0xfff80000
+vmvn.i64 q15, #0xFF0000FF00FFFF00 :: Qd 0x00ffff00 0xff0000ff 0x00ffff00 0xff0000ff
vmvn.i64 q15, #0xFF0000FF00FFFF00 :: Qd 0x00ffff00 0xff0000ff 0x00ffff00 0xff0000ff
----- VORR (immediate) -----
vorr.i32 q0, #0x7 :: Qd 0x55555557 0x55555557 0x55555557 0x55555557
+vorr.i32 q0, #0x7 :: Qd 0x151d191f 0x141c1f1f 0x131b1a1f 0x121f1e1f
vorr.i16 q2, #0x7 :: Qd 0x55575557 0x55575557 0x55575557 0x55575557
+vorr.i16 q2, #0x7 :: Qd 0x151f191f 0x141f1f1f 0x131f1a1f 0x121f1e1f
vorr.i32 q8, #0x700 :: Qd 0x55555755 0x55555755 0x55555755 0x55555755
+vorr.i32 q8, #0x700 :: Qd 0x151d1f1d 0x141c1f1c 0x131b1f1b 0x121f1f1f
vorr.i16 q6, #0x700 :: Qd 0x57555755 0x57555755 0x57555755 0x57555755
+vorr.i16 q6, #0x700 :: Qd 0x171d1f1d 0x171c1f1c 0x171b1f1b 0x171f1f1f
vorr.i32 q14, #0x70000 :: Qd 0x55575555 0x55575555 0x55575555 0x55575555
+vorr.i32 q14, #0x70000 :: Qd 0x151f191d 0x141f1f1c 0x131f1a1b 0x121f1e1f
vorr.i32 q15, #0x7000000 :: Qd 0x57555555 0x57555555 0x57555555 0x57555555
+vorr.i32 q15, #0x7000000 :: Qd 0x171d191d 0x171c1f1c 0x171b1a1b 0x171f1e1f
----- VBIC (immediate) -----
vbic.i32 q0, #0x7 :: Qd 0x55555550 0x55555550 0x55555550 0x55555550
+vbic.i32 q0, #0x7 :: Qd 0x151d1918 0x141c1f18 0x131b1a18 0x121f1e18
vbic.i16 q3, #0x7 :: Qd 0x55505550 0x55505550 0x55505550 0x55505550
+vbic.i16 q3, #0x7 :: Qd 0x15181918 0x14181f18 0x13181a18 0x12181e18
vbic.i32 q5, #0x700 :: Qd 0x55555055 0x55555055 0x55555055 0x55555055
+vbic.i32 q5, #0x700 :: Qd 0x151d181d 0x141c181c 0x131b181b 0x121f181f
vbic.i16 q8, #0x700 :: Qd 0x50555055 0x50555055 0x50555055 0x50555055
+vbic.i16 q8, #0x700 :: Qd 0x101d181d 0x101c181c 0x101b181b 0x101f181f
vbic.i32 q10, #0x70000 :: Qd 0x55505555 0x55505555 0x55505555 0x55505555
+vbic.i32 q10, #0x70000 :: Qd 0x1518191d 0x14181f1c 0x13181a1b 0x12181e1f
vbic.i32 q15, #0x7000000 :: Qd 0x50555555 0x50555555 0x50555555 0x50555555
+vbic.i32 q15, #0x7000000 :: Qd 0x101d191d 0x101c1f1c 0x101b1a1b 0x101f1e1f
---- VMVN (register) ----
vmvn q0, q1 :: Qd 0xffffffe7 0xffffffe7 0xffffffe7 0xffffffe7 Qm (i32)0x00000018
+vmvn q0, q1 :: Qd 0xd9d2d2d5 0xdad5d1d4 0xdbd3d4d4 0xdcd0d1d0 Qm (i32)0x00000018
vmvn q10, q15 :: Qd 0xffffffe7 0xffffffe7 0xffffffe7 0xffffffe7 Qm (i32)0x00000018
+vmvn q10, q15 :: Qd 0xd9d2d2d5 0xdad5d1d4 0xdbd3d4d4 0xdcd0d1d0 Qm (i32)0x00000018
vmvn q0, q14 :: Qd 0xffffffe7 0xffffffe7 0xffffffe7 0xffffffe7 Qm (i32)0x00000018
+vmvn q0, q14 :: Qd 0xd9d2d2d5 0xdad5d1d4 0xdbd3d4d4 0xdcd0d1d0 Qm (i32)0x00000018
---- VMOV (register) ----
vmov q0, q1 :: Qd 0x00000018 0x00000018 0x00000018 0x00000018 Qm (i32)0x00000018
+vmov q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000018
vmov q10, q15 :: Qd 0x00000018 0x00000018 0x00000018 0x00000018 Qm (i32)0x00000018
+vmov q10, q15 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000018
vmov q0, q14 :: Qd 0x00000018 0x00000018 0x00000018 0x00000018 Qm (i32)0x00000018
+vmov q0, q14 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000018
---- VDUP (ARM core register) (tested indirectly) ----
vmov q0, q1 :: Qd 0x07070707 0x07070707 0x07070707 0x07070707 Qm (i8)0x00000007
+vmov q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i8)0x00000007
vmov q10, q11 :: Qd 0x00070007 0x00070007 0x00070007 0x00070007 Qm (i16)0x00000007
+vmov q10, q11 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i16)0x00000007
vmov q0, q15 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007 Qm (i32)0x00000007
+vmov q0, q15 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000007
---- VADD ----
vadd.i32 q0, q1, q2 :: Qd 0x00000090 0x00000090 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078
vadd.i64 q0, q1, q2 :: Qd 0x00000104 0x00000104 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078
vhsub.u32 q10, q11, q12 :: Qd 0xffffffd0 0xffffffd0 0xffffffd0 0xffffffd0 Qm (i32)0x00000018 Qn (i32)0x00000078
---- VQADD ----
vqadd.s32 q0, q1, q2 :: Qd 0x00000090 0x00000090 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 q0, q1, q2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 q0, q1, q2 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqadd.s32 q0, q1, q2 :: Qd 0x00000104 0x00000104 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 q0, q1, q2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 q0, q1, q2 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.s16 q0, q1, q2 :: Qd 0x00000104 0x00000104 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s16 q0, q1, q2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s16 q0, q1, q2 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.s8 q0, q1, q2 :: Qd 0x00000004 0x00000004 0x00000004 0x00000004 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s8 q0, q1, q2 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
+vqadd.s8 q0, q1, q2 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
vqadd.s8 q0, q1, q2 :: Qd 0x80000003 0x80000003 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.s8 q0, q1, q2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqadd.s8 q0, q1, q2 :: Qd 0x951d191f 0x941c1f1e 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.s16 q0, q1, q2 :: Qd 0x80000003 0x80000003 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.s16 q0, q1, q2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqadd.s16 q0, q1, q2 :: Qd 0x951d191f 0x941c1f1e 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.s32 q0, q1, q2 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.s32 q0, q1, q2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqadd.s32 q0, q1, q2 :: Qd 0x951d191f 0x941c1f1e 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.s32 q10, q11, q12 :: Qd 0x00000090 0x00000090 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 q10, q11, q12 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 q10, q11, q12 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqadd.u32 q0, q1, q2 :: Qd 0x00000090 0x00000090 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 q0, q1, q2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 q0, q1, q2 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqadd.u32 q0, q1, q2 :: Qd 0x00000104 0x00000104 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 q0, q1, q2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 q0, q1, q2 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.u16 q0, q1, q2 :: Qd 0x00000104 0x00000104 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u16 q0, q1, q2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u16 q0, q1, q2 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.u8 q0, q1, q2 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
+vqadd.u8 q0, q1, q2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u8 q0, q1, q2 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.u8 q0, q1, q2 :: Qd 0xff000003 0xff000003 0xff000003 0xff000003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.u8 q0, q1, q2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqadd.u8 q0, q1, q2 :: Qd 0x951d191f 0x941c1f1e 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.u16 q0, q1, q2 :: Qd 0xffff0003 0xffff0003 0xffff0003 0xffff0003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.u16 q0, q1, q2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqadd.u16 q0, q1, q2 :: Qd 0x951d191f 0x941c1f1e 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.u32 q0, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.u32 q0, q1, q2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqadd.u32 q0, q1, q2 :: Qd 0x951d191f 0x941c1f1e 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.u32 q10, q11, q12 :: Qd 0x00000090 0x00000090 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 q10, q11, q12 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 q10, q11, q12 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
---- VQSUB ----
vqsub.s32 q0, q1, q2 :: Qd 0xffffffa0 0xffffffa0 0xffffffa0 0xffffffa0 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 q0, q1, q2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 q0, q1, q2 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqsub.s32 q0, q1, q2 :: Qd 0x00000014 0x00000014 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 q0, q1, q2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 q0, q1, q2 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.s16 q0, q1, q2 :: Qd 0x00000014 0x00000014 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s16 q0, q1, q2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s16 q0, q1, q2 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.s8 q0, q1, q2 :: Qd 0x00000080 0x00000080 0x00000080 0x00000080 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
+vqsub.s8 q0, q1, q2 :: Qd 0x131b1aa3 0x121f1ea7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s8 q0, q1, q2 :: Qd 0x151d19a5 0x141c1fa4 0x131b1aa3 0x121f1ea7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.s8 q0, q1, q2 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqsub.s8 q0, q1, q2 :: Qd 0x7f1b1a19 0x7f1f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.s8 q0, q1, q2 :: Qd 0x7f1d191b 0x7f1c1f1a 0x7f1b1a19 0x7f1f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.s16 q0, q1, q2 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqsub.s16 q0, q1, q2 :: Qd 0x7fff1a19 0x7fff1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.s16 q0, q1, q2 :: Qd 0x7fff191b 0x7fff1f1a 0x7fff1a19 0x7fff1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.s32 q0, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqsub.s32 q0, q1, q2 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.s32 q0, q1, q2 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.s32 q10, q11, q12 :: Qd 0xffffffa0 0xffffffa0 0xffffffa0 0xffffffa0 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 q10, q11, q12 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 q10, q11, q12 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqsub.u32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqsub.u32 q0, q1, q2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u32 q0, q1, q2 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqsub.u32 q0, q1, q2 :: Qd 0x00000014 0x00000014 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u32 q0, q1, q2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u32 q0, q1, q2 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.u16 q0, q1, q2 :: Qd 0x00000014 0x00000014 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u16 q0, q1, q2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u16 q0, q1, q2 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.u8 q0, q1, q2 :: Qd 0x00000014 0x00000014 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u8 q0, q1, q2 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
+vqsub.u8 q0, q1, q2 :: Qd 0x151d1900 0x141c1f00 0x131b1a00 0x121f1e00 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
vqsub.u8 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u8 q0, q1, q2 :: Qd 0x001b1a19 0x001f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u8 q0, q1, q2 :: Qd 0x001d191b 0x001c1f1a 0x001b1a19 0x001f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.u16 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u16 q0, q1, q2 :: Qd 0x00001a19 0x00001e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u16 q0, q1, q2 :: Qd 0x0000191b 0x00001f1a 0x00001a19 0x00001e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u32 q0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.u32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.u32 q10, q11, q12 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqsub.u32 q10, q11, q12 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u32 q10, q11, q12 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
---- VRHADD ----
vrhadd.s32 q0, q1, q2 :: Qd 0x00000049 0x00000049 0x00000049 0x00000049 Qm (i32)0x00000019 Qn (i32)0x00000078
vrhadd.s32 q0, q1, q2 :: Qd 0x00000049 0x00000049 0x00000049 0x00000049 Qm (i32)0x00000019 Qn (i32)0x00000079
vshl.u64 q5, q12, q4 :: Qd 0x60000000 0x40000000 0x60000000 0x40000000 Qm (i32)0x80000001 Qn (i32)0x0000001e
---- VQSHL (register) ----
vqshl.s64 q0, q1, q2 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.s64 q0, q1, q2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.s64 q0, q1, q2 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqshl.s64 q3, q4, q5 :: Qd 0xffffff03 0xffffff02 0xffffff03 0xffffff02 Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.s64 q3, q4, q5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.s64 q3, q4, q5 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqshl.s64 q3, q4, q5 :: Qd 0xfffffff0 0x3ffffff0 0xfffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.s64 q3, q4, q5 :: Qd 0x02636343 0x6243e3c3 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.s64 q3, q4, q5 :: Qd 0x02a3a323 0xa28383e3 0x02636343 0x6243e3c3 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.s64 q0, q1, q2 :: Qd 0x00040000 0x00040000 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqshl.s64 q0, q1, q2 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
+vqshl.s64 q0, q1, q2 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqshl.s64 q13, q14, q15 :: Qd 0xffffffff 0xfffffbff 0xffffffff 0xfffffbff Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqshl.s64 q13, q14, q15 :: Qd 0x00000004 0xc6c686c4 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqshl.s64 q13, q14, q15 :: Qd 0x00000005 0x47464745 0x00000004 0xc6c686c4 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqshl.s64 q7, q8, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.s64 q7, q8, q2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.s64 q7, q8, q2 :: Qd 0x00000000 0x00000001 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.s32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
+vqshl.s32 q3, q4, q15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.s32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.s32 q2, q8, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqshl.s32 q2, q8, q4 :: Qd 0x0131b1a1 0x0121f1e1 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqshl.s32 q2, q8, q4 :: Qd 0x0151d191 0x0141c1f1 0x0131b1a1 0x0121f1e1 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqshl.s32 q12, q11, q13 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqshl.s32 q12, q11, q13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqshl.s32 q12, q11, q13 :: Qd 0x000a8e8c 0x000a0e0f 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqshl.s32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqshl.s32 q0, q1, q2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqshl.s32 q0, q1, q2 :: Qd 0x002a3a32 0x0028383e 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqshl.s32 q9, q10, q11 :: Qd 0xc0000004 0xc0000004 0xc0000004 0xc0000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.s32 q9, q10, q11 :: Qd 0x098d8d0d 0x090f8f0f Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.s32 q9, q10, q11 :: Qd 0x0a8e8c8e 0x0a0e0f8e 0x098d8d0d 0x090f8f0f Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqshl.s32 q13, q3, q5 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqshl.s32 q13, q3, q5 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 08000000
+vqshl.s32 q13, q3, q5 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 08000000
vqshl.s16 q11, q10, q2 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.s16 q11, q10, q2 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.s16 q11, q10, q2 :: Qd 0x0a8e0000 0x0a0e0000 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.s16 q3, q14, q7 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.s16 q3, q14, q7 :: Qd 0x098d0343 0x090f03c3 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.s16 q3, q14, q7 :: Qd 0x0a8e0323 0x0a0e03e3 0x098d0343 0x090f03c3 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.s16 q0, q11, q2 :: Qd 0xc0000080 0xc0000080 0xc0000080 0xc0000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.s16 q0, q11, q2 :: Qd 0x098d0d0d 0x090f0f0f Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.s16 q0, q11, q2 :: Qd 0x0a8e0c8e 0x0a0e0f8e 0x098d0d0d 0x090f0f0f Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqshl.s16 q1, q2, q3 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.s16 q1, q2, q3 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.s16 q1, q2, q3 :: Qd 0x0a8e0000 0x0a0e0000 0x098d0000 0x090f0000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.s16 q3, q4, q5 :: Qd 0xd0000000 0xd0000000 0xd0000000 0xd0000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqshl.s16 q3, q4, q5 :: Qd 0x098d0000 0x090f0000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqshl.s16 q3, q4, q5 :: Qd 0x0a8e0000 0x0a0e0000 0x098d0000 0x090f0000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqshl.s16 q0, q15, q2 :: Qd 0x00007fff 0x00007fff 0x00007fff 0x00007fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqshl.s16 q0, q15, q2 :: Qd 0x131b7fff 0x121f7fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqshl.s16 q0, q15, q2 :: Qd 0x151d7fff 0x141c7fff 0x131b7fff 0x121f7fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqshl.s8 q2, q7, q11 :: Qd 0xffffff80 0xffffff80 0xffffff80 0xffffff80 Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqshl.s8 q2, q7, q11 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqshl.s8 q2, q7, q11 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqshl.s8 q13, q1, q2 :: Qd 0xffffff80 0xffffff80 0xffffff80 0xffffff80 Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqshl.s8 q13, q1, q2 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqshl.s8 q13, q1, q2 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqshl.s8 q3, q7, q5 :: Qd 0x80000058 0x80000058 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqshl.s8 q3, q7, q5 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 08000000
+vqshl.s8 q3, q7, q5 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 08000000
vqshl.s8 q10, q11, q12 :: Qd 0x00010000 0x00010000 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqshl.s8 q10, q11, q12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
+vqshl.s8 q10, q11, q12 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqshl.s8 q6, q7, q8 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqshl.s8 q6, q7, q8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqshl.s8 q6, q7, q8 :: Qd 0x151d1974 0x141c1f70 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqshl.s8 q10, q11, q12 :: Qd 0x0000007f 0x0000007f 0x0000007f 0x0000007f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqshl.s8 q10, q11, q12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqshl.s8 q10, q11, q12 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
vqshl.u64 q0, q1, q2 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.u64 q0, q1, q2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.u64 q0, q1, q2 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqshl.u64 q3, q4, q5 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 08000000
+vqshl.u64 q3, q4, q5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.u64 q3, q4, q5 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqshl.u64 q3, q4, q5 :: Qd 0x1ffffff0 0x3ffffff0 0x1ffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.u64 q3, q4, q5 :: Qd 0x02636343 0x6243e3c3 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.u64 q3, q4, q5 :: Qd 0x02a3a323 0xa28383e3 0x02636343 0x6243e3c3 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.u64 q0, q1, q2 :: Qd 0x00040000 0x00040000 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqshl.u64 q0, q1, q2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
+vqshl.u64 q0, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqshl.u64 q13, q14, q15 :: Qd 0x0000003f 0xfffffbff 0x0000003f 0xfffffbff Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqshl.u64 q13, q14, q15 :: Qd 0x00000004 0xc6c686c4 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqshl.u64 q13, q14, q15 :: Qd 0x00000005 0x47464745 0x00000004 0xc6c686c4 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqshl.u64 q7, q8, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.u64 q7, q8, q2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.u64 q7, q8, q2 :: Qd 0x00000000 0x00000001 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.u32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
+vqshl.u32 q3, q4, q15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.u32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.u32 q2, q8, q4 :: Qd 0x0fffffff 0x0fffffff 0x0fffffff 0x0fffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqshl.u32 q2, q8, q4 :: Qd 0x0131b1a1 0x0121f1e1 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqshl.u32 q2, q8, q4 :: Qd 0x0151d191 0x0141c1f1 0x0131b1a1 0x0121f1e1 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqshl.u32 q12, q11, q13 :: Qd 0x007fffff 0x007fffff 0x007fffff 0x007fffff Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqshl.u32 q12, q11, q13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqshl.u32 q12, q11, q13 :: Qd 0x000a8e8c 0x000a0e0f 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqshl.u32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqshl.u32 q0, q1, q2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqshl.u32 q0, q1, q2 :: Qd 0x002a3a32 0x0028383e 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqshl.u32 q9, q10, q11 :: Qd 0x40000004 0x40000004 0x40000004 0x40000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.u32 q9, q10, q11 :: Qd 0x098d8d0d 0x090f8f0f Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.u32 q9, q10, q11 :: Qd 0x0a8e8c8e 0x0a0e0f8e 0x098d8d0d 0x090f8f0f Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqshl.u32 q13, q3, q5 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqshl.u32 q13, q3, q5 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqshl.u32 q13, q3, q5 :: Qd 0xa8e8c8e8 0xa0e0f8e0 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
vqshl.u16 q11, q10, q2 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.u16 q11, q10, q2 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.u16 q11, q10, q2 :: Qd 0x0a8e0000 0x0a0e0000 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.u16 q3, q14, q7 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.u16 q3, q14, q7 :: Qd 0x098d0343 0x090f03c3 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.u16 q3, q14, q7 :: Qd 0x0a8e0323 0x0a0e03e3 0x098d0343 0x090f03c3 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.u16 q0, q11, q2 :: Qd 0x40000080 0x40000080 0x40000080 0x40000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.u16 q0, q11, q2 :: Qd 0x098d0d0d 0x090f0f0f Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.u16 q0, q11, q2 :: Qd 0x0a8e0c8e 0x0a0e0f8e 0x098d0d0d 0x090f0f0f Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqshl.u16 q1, q2, q3 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.u16 q1, q2, q3 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.u16 q1, q2, q3 :: Qd 0x0a8e0000 0x0a0e0000 0x098d0000 0x090f0000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.u16 q3, q4, q5 :: Qd 0x50000000 0x50000000 0x50000000 0x50000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqshl.u16 q3, q4, q5 :: Qd 0x098d0000 0x090f0000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqshl.u16 q3, q4, q5 :: Qd 0x0a8e0000 0x0a0e0000 0x098d0000 0x090f0000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqshl.u16 q0, q15, q2 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqshl.u16 q0, q15, q2 :: Qd 0x131bffff 0x121fffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqshl.u16 q0, q15, q2 :: Qd 0x151dffff 0x141cffff 0x131bffff 0x121fffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqshl.u8 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqshl.u8 q2, q7, q11 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqshl.u8 q2, q7, q11 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqshl.u8 q13, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqshl.u8 q13, q1, q2 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqshl.u8 q13, q1, q2 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqshl.u8 q3, q7, q5 :: Qd 0x80000058 0x80000058 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqshl.u8 q3, q7, q5 :: Qd 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqshl.u8 q3, q7, q5 :: Qd 0x151d19e8 0x141c1fe0 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
vqshl.u8 q10, q11, q12 :: Qd 0x00010000 0x00010000 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqshl.u8 q10, q11, q12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
+vqshl.u8 q10, q11, q12 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqshl.u8 q6, q7, q8 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqshl.u8 q6, q7, q8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqshl.u8 q6, q7, q8 :: Qd 0x151d1974 0x141c1f70 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqshl.u8 q10, q11, q12 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqshl.u8 q10, q11, q12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqshl.u8 q10, q11, q12 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
---- VQSHL / VQSHLU (immediate) ----
vqshl.s64 q0, q1, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.s64 q0, q1, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.s64 q15, q14, #1 :: Qd 0xffffff03 0xffffff02 0xffffff03 0xffffff02 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s64 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.s64 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s64 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s64 q5, q4, #63 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s64 q5, q4, #63 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s64 q5, q4, #60 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s64 q5, q4, #60 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s64 q5, q4, #59 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s64 q5, q4, #59 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s64 q5, q4, #58 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s64 q5, q4, #58 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s64 q5, q4, #17 :: Qd 0x00200000 0x00200000 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.s64 q5, q4, #17 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s64 q5, q4, #63 :: Qd 0x80000000 0x00000000 0x80000000 0x00000000 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s64 q5, q4, #63 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.s64 q5, q4, #60 :: Qd 0xf0000000 0x00000000 0xf0000000 0x00000000 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s64 q5, q4, #60 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.s64 q5, q4, #7 :: Qd 0x80000000 0x00000000 0x80000000 0x00000000 Qm (i32)0x80000002 fpscr: 08000000
+vqshl.s64 q5, q4, #7 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshl.s32 q10, q11, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.s32 q10, q11, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.s32 q15, q14, #1 :: Qd 0xffffff02 0xffffff02 0xffffff02 0xffffff02 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s32 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.s32 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s32 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshl.s32 q5, q4, #31 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s32 q5, q4, #31 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s32 q5, q4, #28 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s32 q5, q4, #28 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s32 q5, q4, #27 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s32 q5, q4, #27 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s32 q5, q4, #26 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.s32 q5, q4, #26 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s32 q5, q4, #17 :: Qd 0x00200000 0x00200000 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.s32 q5, q4, #17 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s32 q5, q4, #31 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s32 q5, q4, #31 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.s32 q5, q4, #29 :: Qd 0xe0000000 0xe0000000 0xe0000000 0xe0000000 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s32 q5, q4, #29 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.s32 q5, q4, #7 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x80000002 fpscr: 08000000
+vqshl.s32 q5, q4, #7 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x80000002 fpscr: 08000000
vqshl.s16 q9, q8, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.s16 q9, q8, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.s16 q15, q14, #1 :: Qd 0xfffeff02 0xfffeff02 0xfffeff02 0xfffeff02 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s16 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.s16 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s16 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshl.s16 q9, q8, #15 :: Qd 0x00007fff 0x00007fff 0x00007fff 0x00007fff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s16 q9, q8, #15 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s16 q5, q4, #12 :: Qd 0x00007fff 0x00007fff 0x00007fff 0x00007fff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s16 q5, q4, #12 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s16 q5, q4, #11 :: Qd 0x00007fff 0x00007fff 0x00007fff 0x00007fff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s16 q5, q4, #11 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s16 q5, q4, #10 :: Qd 0x00004000 0x00004000 0x00004000 0x00004000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.s16 q5, q4, #10 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s16 q5, q4, #4 :: Qd 0x00000100 0x00000100 0x00000100 0x00000100 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.s16 q5, q4, #4 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s16 q5, q4, #15 :: Qd 0x80008000 0x80008000 0x80008000 0x80008000 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s16 q5, q4, #15 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff fpscr: 08000000
vqshl.s16 q5, q4, #12 :: Qd 0xf000f000 0xf000f000 0xf000f000 0xf000f000 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s16 q5, q4, #12 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff fpscr: 08000000
vqshl.s16 q5, q4, #7 :: Qd 0x80000100 0x80000100 0x80000100 0x80000100 Qm (i32)0x80000002 fpscr: 08000000
+vqshl.s16 q5, q4, #7 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0x80000002 fpscr: 08000000
vqshl.s8 q0, q1, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.s8 q0, q1, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.s8 q15, q14, #1 :: Qd 0xfefefe80 0xfefefe80 0xfefefe80 0xfefefe80 Qm (i32)0xffffff81 fpscr: 08000000
+vqshl.s8 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.s8 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s8 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshl.s8 q5, q4, #7 :: Qd 0x0000007f 0x0000007f 0x0000007f 0x0000007f Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s8 q5, q4, #7 :: Qd 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x00000010 fpscr: 08000000
vqshl.s8 q5, q4, #4 :: Qd 0x0000007f 0x0000007f 0x0000007f 0x0000007f Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s8 q5, q4, #4 :: Qd 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x00000010 fpscr: 08000000
vqshl.s8 q5, q4, #3 :: Qd 0x0000007f 0x0000007f 0x0000007f 0x0000007f Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s8 q5, q4, #3 :: Qd 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x00000010 fpscr: 08000000
vqshl.s8 q5, q4, #2 :: Qd 0x00000040 0x00000040 0x00000040 0x00000040 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.s8 q5, q4, #2 :: Qd 0x54746474 0x50707c70 0x4c6c686c 0x487c787c Qm (i32)0x00000010 fpscr: 00000000
vqshl.s8 q5, q4, #1 :: Qd 0x00000020 0x00000020 0x00000020 0x00000020 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.s8 q5, q4, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000010 fpscr: 00000000
vqshl.s8 q5, q4, #7 :: Qd 0x80808080 0x80808080 0x80808080 0x80808080 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s8 q5, q4, #7 :: Qd 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff fpscr: 08000000
vqshl.s8 q5, q4, #5 :: Qd 0xe0e0e0e0 0xe0e0e0e0 0xe0e0e0e0 0xe0e0e0e0 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s8 q5, q4, #5 :: Qd 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff fpscr: 08000000
vqshl.s8 q5, q4, #2 :: Qd 0x80000008 0x80000008 0x80000008 0x80000008 Qm (i32)0x80000002 fpscr: 08000000
+vqshl.s8 q5, q4, #2 :: Qd 0x54746474 0x50707c70 0x4c6c686c 0x487c787c Qm (i32)0x80000002 fpscr: 00000000
vqshl.u64 q0, q1, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.u64 q0, q1, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.u64 q15, q14, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr: 08000000
+vqshl.u64 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u64 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.u64 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u64 q5, q4, #63 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u64 q5, q4, #63 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u64 q5, q4, #60 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u64 q5, q4, #60 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u64 q5, q4, #59 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u64 q5, q4, #59 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u64 q5, q4, #58 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u64 q5, q4, #58 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u64 q5, q4, #17 :: Qd 0x00200000 0x00200000 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u64 q5, q4, #17 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u64 q5, q4, #63 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u64 q5, q4, #63 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u64 q5, q4, #60 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
+vqshl.u64 q5, q4, #60 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
+vqshl.u64 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshl.u64 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshl.u32 q10, q11, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.u32 q10, q11, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.u32 q15, q14, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr: 08000000
+vqshl.u32 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u32 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.u32 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u32 q5, q4, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u32 q5, q4, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u32 q5, q4, #28 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u32 q5, q4, #28 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u32 q5, q4, #27 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u32 q5, q4, #27 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u32 q5, q4, #26 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u32 q5, q4, #26 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u32 q5, q4, #17 :: Qd 0x00200000 0x00200000 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u32 q5, q4, #17 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u32 q5, q4, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u32 q5, q4, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u32 q5, q4, #29 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
+vqshl.u32 q5, q4, #29 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
+vqshl.u32 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshl.u32 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshl.u16 q9, q8, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.u16 q9, q8, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.u16 q15, q14, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr: 08000000
+vqshl.u16 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u16 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.u16 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u16 q9, q8, #15 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u16 q9, q8, #15 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u16 q5, q4, #12 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u16 q5, q4, #12 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u16 q5, q4, #11 :: Qd 0x00008000 0x00008000 0x00008000 0x00008000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u16 q5, q4, #11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u16 q5, q4, #10 :: Qd 0x00004000 0x00004000 0x00004000 0x00004000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u16 q5, q4, #10 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u16 q5, q4, #4 :: Qd 0x00000100 0x00000100 0x00000100 0x00000100 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u16 q5, q4, #4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u16 q5, q4, #15 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
+vqshl.u16 q5, q4, #15 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
+vqshl.u16 q5, q4, #12 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u16 q5, q4, #12 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u16 q5, q4, #7 :: Qd 0xffff0100 0xffff0100 0xffff0100 0xffff0100 Qm (i32)0x80000002 fpscr: 08000000
+vqshl.u16 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshl.u8 q0, q1, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.u8 q0, q1, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.u8 q15, q14, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr: 08000000
+vqshl.u8 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u8 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.u8 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u8 q5, q4, #7 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u8 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u8 q5, q4, #4 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u8 q5, q4, #4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u8 q5, q4, #3 :: Qd 0x00000080 0x00000080 0x00000080 0x00000080 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u8 q5, q4, #3 :: Qd 0xa8e8c8e8 0xa0e0f8e0 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x00000010 fpscr: 00000000
vqshl.u8 q5, q4, #2 :: Qd 0x00000040 0x00000040 0x00000040 0x00000040 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u8 q5, q4, #2 :: Qd 0x54746474 0x50707c70 0x4c6c686c 0x487c787c Qm (i32)0x00000010 fpscr: 00000000
vqshl.u8 q5, q4, #1 :: Qd 0x00000020 0x00000020 0x00000020 0x00000020 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u8 q5, q4, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u8 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u8 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u8 q5, q4, #5 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
+vqshl.u8 q5, q4, #5 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u8 q5, q4, #2 :: Qd 0xff000008 0xff000008 0xff000008 0xff000008 Qm (i32)0x80000002 fpscr: 08000000
+vqshl.u8 q5, q4, #2 :: Qd 0x54746474 0x50707c70 0x4c6c686c 0x487c787c Qm (i32)0x80000002 fpscr: 00000000
vqshlu.s64 q0, q1, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshlu.s64 q0, q1, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshlu.s64 q15, q14, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s64 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshlu.s64 q5, q4, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s64 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
+vqshlu.s64 q5, q4, #63 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s64 q5, q4, #63 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s64 q5, q4, #60 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s64 q5, q4, #60 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s64 q5, q4, #59 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s64 q5, q4, #59 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s64 q5, q4, #58 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s64 q5, q4, #58 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s64 q5, q4, #17 :: Qd 0x00200000 0x00200000 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s64 q5, q4, #17 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s64 q5, q4, #63 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s64 q5, q4, #63 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s64 q5, q4, #60 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s64 q5, q4, #60 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s64 q5, q4, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000002 fpscr: 08000000
+vqshlu.s64 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshlu.s32 q10, q11, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshlu.s32 q10, q11, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshlu.s32 q15, q14, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s32 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshlu.s32 q5, q4, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s32 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
+vqshlu.s32 q5, q4, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s32 q5, q4, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s32 q5, q4, #28 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s32 q5, q4, #28 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s32 q5, q4, #27 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s32 q5, q4, #27 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s32 q5, q4, #26 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s32 q5, q4, #26 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s32 q5, q4, #17 :: Qd 0x00200000 0x00200000 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s32 q5, q4, #17 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s32 q5, q4, #31 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s32 q5, q4, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s32 q5, q4, #29 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s32 q5, q4, #29 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s32 q5, q4, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000002 fpscr: 08000000
+vqshlu.s32 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshlu.s16 q9, q8, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshlu.s16 q9, q8, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshlu.s16 q15, q14, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s16 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshlu.s16 q5, q4, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s16 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshlu.s16 q9, q8, #15 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s16 q9, q8, #15 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s16 q5, q4, #12 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s16 q5, q4, #12 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s16 q5, q4, #11 :: Qd 0x00008000 0x00008000 0x00008000 0x00008000 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s16 q5, q4, #11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s16 q5, q4, #10 :: Qd 0x00004000 0x00004000 0x00004000 0x00004000 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s16 q5, q4, #10 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s16 q5, q4, #4 :: Qd 0x00000100 0x00000100 0x00000100 0x00000100 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s16 q5, q4, #4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s16 q5, q4, #15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s16 q5, q4, #15 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s16 q5, q4, #12 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s16 q5, q4, #12 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s16 q5, q4, #7 :: Qd 0x00000100 0x00000100 0x00000100 0x00000100 Qm (i32)0x80000002 fpscr: 08000000
+vqshlu.s16 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshlu.s8 q0, q1, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshlu.s8 q0, q1, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshlu.s8 q15, q14, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s8 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshlu.s8 q5, q4, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s8 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshlu.s8 q5, q4, #7 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s8 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s8 q5, q4, #4 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s8 q5, q4, #4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s8 q5, q4, #3 :: Qd 0x00000080 0x00000080 0x00000080 0x00000080 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s8 q5, q4, #3 :: Qd 0xa8e8c8e8 0xa0e0f8e0 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x00000010 fpscr: 00000000
vqshlu.s8 q5, q4, #2 :: Qd 0x00000040 0x00000040 0x00000040 0x00000040 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s8 q5, q4, #2 :: Qd 0x54746474 0x50707c70 0x4c6c686c 0x487c787c Qm (i32)0x00000010 fpscr: 00000000
vqshlu.s8 q5, q4, #1 :: Qd 0x00000020 0x00000020 0x00000020 0x00000020 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s8 q5, q4, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000010 fpscr: 00000000
vqshlu.s8 q5, q4, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s8 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s8 q5, q4, #5 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s8 q5, q4, #5 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s8 q5, q4, #2 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x80000002 fpscr: 08000000
+vqshlu.s8 q5, q4, #2 :: Qd 0x54746474 0x50707c70 0x4c6c686c 0x487c787c Qm (i32)0x80000002 fpscr: 00000000
---- VQRSHL (register) ----
vqrshl.s64 q0, q1, q2 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.s64 q0, q1, q2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.s64 q0, q1, q2 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.s64 q3, q4, q5 :: Qd 0xffffff03 0xffffff02 0xffffff03 0xffffff02 Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.s64 q3, q4, q5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.s64 q3, q4, q5 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.s64 q3, q4, q5 :: Qd 0xfffffff0 0x3ffffff0 0xfffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.s64 q3, q4, q5 :: Qd 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.s64 q3, q4, q5 :: Qd 0x02a3a323 0xa28383e4 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.s64 q0, q1, q2 :: Qd 0x00040000 0x00040000 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqrshl.s64 q0, q1, q2 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
+vqrshl.s64 q0, q1, q2 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqrshl.s64 q13, q14, q15 :: Qd 0xffffffff 0xfffffc00 0xffffffff 0xfffffc00 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqrshl.s64 q13, q14, q15 :: Qd 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqrshl.s64 q13, q14, q15 :: Qd 0x00000005 0x47464745 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqrshl.s64 q7, q8, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.s64 q7, q8, q2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.s64 q7, q8, q2 :: Qd 0x00000000 0x00000001 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.s32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
+vqrshl.s32 q3, q4, q15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.s32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.s32 q2, q8, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqrshl.s32 q2, q8, q4 :: Qd 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqrshl.s32 q2, q8, q4 :: Qd 0x0151d192 0x0141c1f2 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqrshl.s32 q12, q11, q13 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqrshl.s32 q12, q11, q13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqrshl.s32 q12, q11, q13 :: Qd 0x000a8e8d 0x000a0e10 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqrshl.s32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqrshl.s32 q0, q1, q2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqrshl.s32 q0, q1, q2 :: Qd 0x002a3a32 0x0028383e 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqrshl.s32 q9, q10, q11 :: Qd 0xc0000004 0xc0000004 0xc0000004 0xc0000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q9, q10, q11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q9, q10, q11 :: Qd 0x0a8e8c8f 0x0a0e0f8e 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 q13, q3, q5 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.s32 q13, q3, q5 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 08000000
+vqrshl.s32 q13, q3, q5 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 08000000
vqrshl.s16 q11, q10, q2 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.s16 q11, q10, q2 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.s16 q11, q10, q2 :: Qd 0x0a8f0000 0x0a0e0000 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.s16 q3, q14, q7 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.s16 q3, q14, q7 :: Qd 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.s16 q3, q14, q7 :: Qd 0x0a8f0324 0x0a0e03e4 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.s16 q0, q11, q2 :: Qd 0xc0000080 0xc0000080 0xc0000080 0xc0000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q0, q11, q2 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q0, q11, q2 :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 q1, q2, q3 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.s16 q1, q2, q3 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.s16 q1, q2, q3 :: Qd 0x0a8f0000 0x0a0e0000 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.s16 q3, q4, q5 :: Qd 0xd0000000 0xd0000000 0xd0000000 0xd0000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqrshl.s16 q3, q4, q5 :: Qd 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqrshl.s16 q3, q4, q5 :: Qd 0x0a8f0001 0x0a0e0001 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqrshl.s16 q0, q15, q2 :: Qd 0x00007fff 0x00007fff 0x00007fff 0x00007fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.s16 q0, q15, q2 :: Qd 0x131b7fff 0x121f7fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.s16 q0, q15, q2 :: Qd 0x151d7fff 0x141c7fff 0x131b7fff 0x121f7fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqrshl.s8 q2, q7, q11 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x0b0f0d0f 0x0a0e100e 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 q2, q7, q11 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 q2, q7, q11 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x0a8e8c8f 0x0a0e0f8e 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s8 q2, q7, q11 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x0b0f0d0f 0x0a0e100e 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 q2, q7, q11 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 q2, q7, q11 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x0a8e8c8f 0x0a0e0f8e 0x098d8d0e 0x090f8f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s8 q2, q7, q11 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x0b0f0d0f 0x0a0e100e 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 q2, q7, q11 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x0a8e8c8f 0x0a0e0f8e 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s8 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.s16 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.s32 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.s8 q2, q7, q11 :: Qd 0xffffff80 0xffffff80 0xffffff80 0xffffff80 Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqrshl.s8 q13, q1, q2 :: Qd 0xffffff80 0xffffff80 0xffffff80 0xffffff80 Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.s8 q13, q1, q2 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.s8 q13, q1, q2 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqrshl.s8 q3, q7, q5 :: Qd 0x80000058 0x80000058 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.s8 q3, q7, q5 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 08000000
+vqrshl.s8 q3, q7, q5 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 08000000
vqrshl.s8 q10, q11, q12 :: Qd 0x00010000 0x00010000 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqrshl.s8 q10, q11, q12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
+vqrshl.s8 q10, q11, q12 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqrshl.s8 q6, q7, q8 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqrshl.s8 q6, q7, q8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqrshl.s8 q6, q7, q8 :: Qd 0x151d1974 0x141c1f70 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqrshl.s8 q10, q11, q12 :: Qd 0x0000007f 0x0000007f 0x0000007f 0x0000007f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqrshl.s8 q10, q11, q12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqrshl.s8 q10, q11, q12 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
vqrshl.u64 q0, q1, q2 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.u64 q0, q1, q2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.u64 q0, q1, q2 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.u64 q3, q4, q5 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 08000000
+vqrshl.u64 q3, q4, q5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.u64 q3, q4, q5 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.u64 q3, q4, q5 :: Qd 0x1ffffff0 0x3ffffff0 0x1ffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.u64 q3, q4, q5 :: Qd 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.u64 q3, q4, q5 :: Qd 0x02a3a323 0xa28383e4 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.u64 q0, q1, q2 :: Qd 0x00040000 0x00040000 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqrshl.u64 q0, q1, q2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
+vqrshl.u64 q0, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqrshl.u64 q13, q14, q15 :: Qd 0x0000003f 0xfffffc00 0x0000003f 0xfffffc00 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqrshl.u64 q13, q14, q15 :: Qd 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqrshl.u64 q13, q14, q15 :: Qd 0x00000005 0x47464745 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqrshl.u64 q7, q8, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.u64 q7, q8, q2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.u64 q7, q8, q2 :: Qd 0x00000000 0x00000001 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.u32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
+vqrshl.u32 q3, q4, q15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.u32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.u32 q2, q8, q4 :: Qd 0x0fffffff 0x0fffffff 0x0fffffff 0x0fffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqrshl.u32 q2, q8, q4 :: Qd 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqrshl.u32 q2, q8, q4 :: Qd 0x0151d192 0x0141c1f2 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqrshl.u32 q12, q11, q13 :: Qd 0x00800000 0x00800000 0x00800000 0x00800000 Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqrshl.u32 q12, q11, q13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqrshl.u32 q12, q11, q13 :: Qd 0x000a8e8d 0x000a0e10 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqrshl.u32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqrshl.u32 q0, q1, q2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqrshl.u32 q0, q1, q2 :: Qd 0x002a3a32 0x0028383e 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqrshl.u32 q9, q10, q11 :: Qd 0x40000004 0x40000004 0x40000004 0x40000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 q9, q10, q11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 q9, q10, q11 :: Qd 0x0a8e8c8f 0x0a0e0f8e 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u32 q13, q3, q5 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.u32 q13, q3, q5 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.u32 q13, q3, q5 :: Qd 0xa8e8c8e8 0xa0e0f8e0 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
vqrshl.u16 q11, q10, q2 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.u16 q11, q10, q2 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.u16 q11, q10, q2 :: Qd 0x0a8f0000 0x0a0e0000 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.u16 q3, q14, q7 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.u16 q3, q14, q7 :: Qd 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.u16 q3, q14, q7 :: Qd 0x0a8f0324 0x0a0e03e4 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.u16 q0, q11, q2 :: Qd 0x40000080 0x40000080 0x40000080 0x40000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 q0, q11, q2 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 q0, q11, q2 :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u16 q1, q2, q3 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.u16 q1, q2, q3 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.u16 q1, q2, q3 :: Qd 0x0a8f0000 0x0a0e0000 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.u16 q3, q4, q5 :: Qd 0x50000000 0x50000000 0x50000000 0x50000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqrshl.u16 q3, q4, q5 :: Qd 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqrshl.u16 q3, q4, q5 :: Qd 0x0a8f0001 0x0a0e0001 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqrshl.u16 q0, q15, q2 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.u16 q0, q15, q2 :: Qd 0x131bffff 0x121fffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.u16 q0, q15, q2 :: Qd 0x151dffff 0x141cffff 0x131bffff 0x121fffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqrshl.u8 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqrshl.u8 q2, q7, q11 :: Qd 0x80808080 0x80808080 0x80808080 0x80808080 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x0b0f0d0f 0x0a0e100e 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u8 q2, q7, q11 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x0b0f0d0f 0x0a0e100e 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u16 q2, q7, q11 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 q2, q7, q11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 q2, q7, q11 :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u32 q2, q7, q11 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 q2, q7, q11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 q2, q7, q11 :: Qd 0x0a8e8c8f 0x0a0e0f8e 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u8 q2, q7, q11 :: Qd 0x8080807f 0x8080807f 0x8080807f 0x8080807f Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x0b0f0d0f 0x0a0e100e 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u16 q2, q7, q11 :: Qd 0x80007fff 0x80007fff 0x80007fff 0x80007fff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 q2, q7, q11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 q2, q7, q11 :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u32 q2, q7, q11 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 q2, q7, q11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 q2, q7, q11 :: Qd 0x0a8e8c8f 0x0a0e0f8e 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u8 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.u16 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u16 q2, q7, q11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u16 q2, q7, q11 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.u32 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u32 q2, q7, q11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u32 q2, q7, q11 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.u8 q13, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.u8 q13, q1, q2 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.u8 q13, q1, q2 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqrshl.u8 q3, q7, q5 :: Qd 0x80000058 0x80000058 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.u8 q3, q7, q5 :: Qd 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.u8 q3, q7, q5 :: Qd 0x151d19e8 0x141c1fe0 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
vqrshl.u8 q10, q11, q12 :: Qd 0x00010000 0x00010000 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqrshl.u8 q10, q11, q12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
+vqrshl.u8 q10, q11, q12 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqrshl.u8 q6, q7, q8 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqrshl.u8 q6, q7, q8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqrshl.u8 q6, q7, q8 :: Qd 0x151d1974 0x141c1f70 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqrshl.u8 q10, q11, q12 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqrshl.u8 q10, q11, q12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqrshl.u8 q10, q11, q12 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
---- VRSHL (register) ----
vrshl.s64 q0, q1, q2 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001
vrshl.s64 q3, q4, q5 :: Qd 0xffffff03 0xffffff02 0xffffff03 0xffffff02 Qm (i32)0xffffff81 Qn (i32)0x00000001
vmlsl.u32 q7, d7, d1[1] :: Qd 0x15555553 0xd5555553 0x15555553 0xd5555553 Qm (i32)0x80000001 Qn (i32)0x80000002
---- VRSHR ----
vrshr.s8 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vrshr.s8 q0, q1, #0 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xffffffff
vrshr.s8 q0, q1, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
+vrshr.s8 q0, q1, #1 :: Qd 0x13171715 0x13151716 0x12161616 0x12181718 Qm (i32)0xffffffff
vrshr.s16 q3, q4, #2 :: Qd 0x0000ffe1 0x0000ffe1 0x0000ffe1 0x0000ffe1 Qm (i32)0xffffff84
+vrshr.s16 q3, q4, #2 :: Qd 0x098b0b4b 0x094b0b8b 0x090b0acb 0x08cc0b8c Qm (i32)0xffffff84
+vrshr.s32 q2, q5, #31 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
vrshr.s32 q2, q5, #31 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
vrshr.s8 q6, q7, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000ffff
+vrshr.s8 q6, q7, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000ffff
vrshr.s16 q8, q9, #12 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xfffffff6
+vrshr.s16 q8, q9, #12 :: Qd 0x00020003 0x00020003 0x00020003 0x00020003 Qm (i32)0xfffffff6
vrshr.s32 q10, q11, #5 :: Qd 0x00000140 0x00000140 0x00000140 0x00000140 Qm (i32)0x000027fa
+vrshr.s32 q10, q11, #5 :: Qd 0x01316969 0x01295171 0x01216159 0x01197971 Qm (i32)0x000027fa
vrshr.u8 q12, q13, #1 :: Qd 0x80808080 0x80808080 0x80808080 0x80808080 Qm (i32)0xffffffff
+vrshr.u8 q12, q13, #1 :: Qd 0x13171715 0x13151716 0x12161616 0x12181718 Qm (i32)0xffffffff
vrshr.u16 q14, q15, #11 :: Qd 0x00200020 0x00200020 0x00200020 0x00200020 Qm (i32)0xffffffff
+vrshr.u16 q14, q15, #11 :: Qd 0x00050006 0x00050006 0x00050005 0x00040006 Qm (i32)0xffffffff
vrshr.u32 q10, q11, #9 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x000003e8
+vrshr.u32 q10, q11, #9 :: Qd 0x00131697 0x00129517 0x00121616 0x00119797 Qm (i32)0x000003e8
vrshr.u8 q7, q13, #7 :: Qd 0x02020202 0x02020202 0x02020202 0x02020202 Qm (i32)0xffffffff
+vrshr.u8 q7, q13, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
vrshr.u16 q8, q1, #5 :: Qd 0x0000055e 0x0000055e 0x0000055e 0x0000055e Qm (i32)0x0000abcf
+vrshr.u16 q8, q1, #5 :: Qd 0x01310169 0x01290171 0x01210159 0x01190171 Qm (i32)0x0000abcf
vrshr.u32 q12, q3, #15 :: Qd 0x00020000 0x00020000 0x00020000 0x00020000 Qm (i32)0xfffffe50
+vrshr.u32 q12, q3, #15 :: Qd 0x00004c5a 0x00004a54 0x00004858 0x0000465e Qm (i32)0xfffffe50
vrshr.u64 q0, q1, #42 :: Qd 0x00000000 0x00400000 0x00000000 0x00400000 Qm (i32)0xffffffff
+vrshr.u64 q0, q1, #42 :: Qd 0x00000000 0x00098b4b 0x00000000 0x00090b0b Qm (i32)0xffffffff
vrshr.s64 q6, q7, #12 :: Qd 0x00000000 0xfac00001 0x00000000 0xfac00001 Qm (i32)0x00000fac
+vrshr.s64 q6, q7, #12 :: Qd 0x000262d2 0xd2a252a3 0x000242c2 0xb2b232f3 Qm (i32)0x00000fac
vrshr.u64 q8, q4, #9 :: Qd 0x0000001a 0x7c00001a 0x0000001a 0x7c00001a Qm (i32)0x000034f8
+vrshr.u64 q8, q4, #9 :: Qd 0x00131696 0x95129517 0x00121615 0x95919797 Qm (i32)0x000034f8
vrshr.s64 q9, q12, #11 :: Qd 0x00000030 0x32c00030 0x00000030 0x32c00030 Qm (i32)0x00018196
+vrshr.s64 q9, q12, #11 :: Qd 0x0004c5a5 0xa544a546 0x00048585 0x656465e6 Qm (i32)0x00018196
---- VRSRA ----
vrsra.s8 q0, q1, #1 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0xffffffff
+vrsra.s8 q0, q1, #1 :: Qd 0x28343032 0x27313632 0x25313031 0x24373537 Qm (i32)0xffffffff
vrsra.s16 q3, q4, #2 :: Qd 0x55555536 0x55555536 0x55555536 0x55555536 Qm (i32)0xffffff84
+vrsra.s16 q3, q4, #2 :: Qd 0x1ea82468 0x1d672aa7 0x1c2624e6 0x1aeb29ab Qm (i32)0xffffff84
vrsra.s32 q2, q5, #31 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0xffffffff
+vrsra.s32 q2, q5, #31 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vrsra.s8 q6, q7, #7 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0x0000ffff
+vrsra.s8 q6, q7, #7 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x0000ffff
vrsra.s16 q8, q9, #12 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0xfffffff6
+vrsra.s16 q8, q9, #12 :: Qd 0x151f1920 0x141e1f1f 0x131d1a1e 0x12211e22 Qm (i32)0xfffffff6
vrsra.s32 q10, q11, #5 :: Qd 0x55555695 0x55555695 0x55555695 0x55555695 Qm (i32)0x000027fa
+vrsra.s32 q10, q11, #5 :: Qd 0x164e8286 0x1545708d 0x143c7b74 0x13389790 Qm (i32)0x000027fa
vrsra.u8 q12, q13, #1 :: Qd 0xd5d5d5d5 0xd5d5d5d5 0xd5d5d5d5 0xd5d5d5d5 Qm (i32)0xffffffff
+vrsra.u8 q12, q13, #1 :: Qd 0x28343032 0x27313632 0x25313031 0x24373537 Qm (i32)0xffffffff
vrsra.u16 q14, q15, #11 :: Qd 0x55755575 0x55755575 0x55755575 0x55755575 Qm (i32)0xffffffff
+vrsra.u16 q14, q15, #11 :: Qd 0x15221923 0x14211f22 0x13201a20 0x12231e25 Qm (i32)0xffffffff
vrsra.u32 q10, q11, #9 :: Qd 0x55555557 0x55555557 0x55555557 0x55555557 Qm (i32)0x000003e8
+vrsra.u32 q10, q11, #9 :: Qd 0x15302fb4 0x142eb433 0x132d3031 0x1230b5b6 Qm (i32)0x000003e8
vrsra.u8 q7, q13, #7 :: Qd 0x57575757 0x57575757 0x57575757 0x57575757 Qm (i32)0xffffffff
+vrsra.u8 q7, q13, #7 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vrsra.u16 q8, q1, #5 :: Qd 0x55555ab3 0x55555ab3 0x55555ab3 0x55555ab3 Qm (i32)0x0000abcf
+vrsra.u16 q8, q1, #5 :: Qd 0x164e1a86 0x1545208d 0x143c1b74 0x13381f90 Qm (i32)0x0000abcf
vrsra.u32 q12, q3, #15 :: Qd 0x55575555 0x55575555 0x55575555 0x55575555 Qm (i32)0xfffffe50
+vrsra.u32 q12, q3, #15 :: Qd 0x151d6577 0x141c6970 0x131b6273 0x121f647d Qm (i32)0xfffffe50
vrsra.u64 q0, q1, #42 :: Qd 0x55555555 0x55955555 0x55555555 0x55955555 Qm (i32)0xffffffff
+vrsra.u64 q0, q1, #42 :: Qd 0x151d191d 0x1425aa67 0x131b1a1b 0x1228292a Qm (i32)0xffffffff
vrsra.s64 q6, q7, #12 :: Qd 0x55555556 0x50155556 0x55555556 0x50155556 Qm (i32)0x00000fac
+vrsra.s64 q6, q7, #12 :: Qd 0x151f7bef 0xe6be71bf 0x131d5cdd 0xc4d15112 Qm (i32)0x00000fac
vrsra.u64 q8, q4, #9 :: Qd 0x5555556f 0xd155556f 0x5555556f 0xd155556f Qm (i32)0x000034f8
+vrsra.u64 q8, q4, #9 :: Qd 0x15302fb3 0xa92eb433 0x132d3030 0xa7b0b5b6 Qm (i32)0x000034f8
vrsra.s64 q9, q12, #11 :: Qd 0x55555585 0x88155585 0x55555585 0x88155585 Qm (i32)0x00018196
+vrsra.s64 q9, q12, #11 :: Qd 0x1521dec2 0xb960c462 0x131f9fa0 0x77838405 Qm (i32)0x00018196
---- VSHR ----
vshr.s8 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshr.s8 q0, q1, #0 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xffffffff
vshr.s8 q0, q1, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshr.s8 q0, q1, #1 :: Qd 0x13161615 0x12151715 0x12161515 0x11171717 Qm (i32)0xffffffff
vshr.s16 q3, q4, #2 :: Qd 0xffffffe1 0xffffffe1 0xffffffe1 0xffffffe1 Qm (i32)0xffffff84
+vshr.s16 q3, q4, #2 :: Qd 0x098b0b4a 0x094a0b8a 0x090b0aca 0x08cb0b8b Qm (i32)0xffffff84
vshr.s32 q2, q5, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshr.s32 q2, q5, #31 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
vshr.s8 q6, q7, #7 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x0000ffff
+vshr.s8 q6, q7, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000ffff
vshr.s16 q8, q9, #12 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xfffffff6
+vshr.s16 q8, q9, #12 :: Qd 0x00020002 0x00020002 0x00020002 0x00020002 Qm (i32)0xfffffff6
vshr.s32 q10, q11, #5 :: Qd 0x0000013f 0x0000013f 0x0000013f 0x0000013f Qm (i32)0x000027fa
+vshr.s32 q10, q11, #5 :: Qd 0x01316969 0x01295171 0x01216159 0x01197971 Qm (i32)0x000027fa
vshr.u8 q12, q13, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff
+vshr.u8 q12, q13, #1 :: Qd 0x13161615 0x12151715 0x12161515 0x11171717 Qm (i32)0xffffffff
vshr.u16 q14, q15, #11 :: Qd 0x001f001f 0x001f001f 0x001f001f 0x001f001f Qm (i32)0xffffffff
+vshr.u16 q14, q15, #11 :: Qd 0x00040005 0x00040005 0x00040005 0x00040005 Qm (i32)0xffffffff
vshr.u32 q10, q11, #9 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i32)0x000003e8
+vshr.u32 q10, q11, #9 :: Qd 0x00131696 0x00129517 0x00121615 0x00119797 Qm (i32)0x000003e8
vshr.u8 q7, q13, #7 :: Qd 0x01010101 0x01010101 0x01010101 0x01010101 Qm (i32)0xffffffff
+vshr.u8 q7, q13, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
vshr.u16 q8, q1, #5 :: Qd 0x0000055e 0x0000055e 0x0000055e 0x0000055e Qm (i32)0x0000abcf
+vshr.u16 q8, q1, #5 :: Qd 0x01310169 0x01290171 0x01210159 0x01190171 Qm (i32)0x0000abcf
vshr.u32 q12, q3, #15 :: Qd 0x0001ffff 0x0001ffff 0x0001ffff 0x0001ffff Qm (i32)0xfffffe50
+vshr.u32 q12, q3, #15 :: Qd 0x00004c5a 0x00004a54 0x00004858 0x0000465e Qm (i32)0xfffffe50
vshr.u64 q0, q1, #42 :: Qd 0x00000000 0x003fffff 0x00000000 0x003fffff Qm (i32)0xffffffff
+vshr.u64 q0, q1, #42 :: Qd 0x00000000 0x00098b4b 0x00000000 0x00090b0a Qm (i32)0xffffffff
vshr.s64 q6, q7, #12 :: Qd 0x00000000 0xfac00000 0x00000000 0xfac00000 Qm (i32)0x00000fac
+vshr.s64 q6, q7, #12 :: Qd 0x000262d2 0xd2a252a2 0x000242c2 0xb2b232f2 Qm (i32)0x00000fac
vshr.u64 q8, q4, #9 :: Qd 0x0000001a 0x7c00001a 0x0000001a 0x7c00001a Qm (i32)0x000034f8
+vshr.u64 q8, q4, #9 :: Qd 0x00131696 0x95129517 0x00121615 0x95919797 Qm (i32)0x000034f8
vshr.s64 q9, q12, #11 :: Qd 0x00000030 0x32c00030 0x00000030 0x32c00030 Qm (i32)0x00018196
+vshr.s64 q9, q12, #11 :: Qd 0x0004c5a5 0xa544a545 0x00048585 0x656465e5 Qm (i32)0x00018196
---- VSRA ----
vsra.s8 q0, q1, #1 :: Qd 0x54545454 0x54545454 0x54545454 0x54545454 Qm (i32)0xffffffff
+vsra.s8 q0, q1, #1 :: Qd 0x28332f32 0x26313631 0x25312f30 0x23363536 Qm (i32)0xffffffff
vsra.s16 q3, q4, #2 :: Qd 0x55545536 0x55545536 0x55545536 0x55545536 Qm (i32)0xffffff84
+vsra.s16 q3, q4, #2 :: Qd 0x1ea82467 0x1d662aa6 0x1c2624e5 0x1aea29aa Qm (i32)0xffffff84
vsra.s32 q2, q5, #31 :: Qd 0x55555554 0x55555554 0x55555554 0x55555554 Qm (i32)0xffffffff
+vsra.s32 q2, q5, #31 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vsra.s8 q6, q7, #7 :: Qd 0x55555454 0x55555454 0x55555454 0x55555454 Qm (i32)0x0000ffff
+vsra.s8 q6, q7, #7 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x0000ffff
vsra.s16 q8, q9, #12 :: Qd 0x55545554 0x55545554 0x55545554 0x55545554 Qm (i32)0xfffffff6
+vsra.s16 q8, q9, #12 :: Qd 0x151f191f 0x141e1f1e 0x131d1a1d 0x12211e21 Qm (i32)0xfffffff6
vsra.s32 q10, q11, #5 :: Qd 0x55555694 0x55555694 0x55555694 0x55555694 Qm (i32)0x000027fa
+vsra.s32 q10, q11, #5 :: Qd 0x164e8286 0x1545708d 0x143c7b74 0x13389790 Qm (i32)0x000027fa
vsra.u8 q12, q13, #1 :: Qd 0xd4d4d4d4 0xd4d4d4d4 0xd4d4d4d4 0xd4d4d4d4 Qm (i32)0xffffffff
+vsra.u8 q12, q13, #1 :: Qd 0x28332f32 0x26313631 0x25312f30 0x23363536 Qm (i32)0xffffffff
vsra.u16 q14, q15, #11 :: Qd 0x55745574 0x55745574 0x55745574 0x55745574 Qm (i32)0xffffffff
+vsra.u16 q14, q15, #11 :: Qd 0x15211922 0x14201f21 0x131f1a20 0x12231e24 Qm (i32)0xffffffff
vsra.u32 q10, q11, #9 :: Qd 0x55555556 0x55555556 0x55555556 0x55555556 Qm (i32)0x000003e8
+vsra.u32 q10, q11, #9 :: Qd 0x15302fb3 0x142eb433 0x132d3030 0x1230b5b6 Qm (i32)0x000003e8
vsra.u8 q7, q13, #7 :: Qd 0x56565656 0x56565656 0x56565656 0x56565656 Qm (i32)0xffffffff
+vsra.u8 q7, q13, #7 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vsra.u16 q8, q1, #5 :: Qd 0x55555ab3 0x55555ab3 0x55555ab3 0x55555ab3 Qm (i32)0x0000abcf
+vsra.u16 q8, q1, #5 :: Qd 0x164e1a86 0x1545208d 0x143c1b74 0x13381f90 Qm (i32)0x0000abcf
vsra.u32 q12, q3, #15 :: Qd 0x55575554 0x55575554 0x55575554 0x55575554 Qm (i32)0xfffffe50
+vsra.u32 q12, q3, #15 :: Qd 0x151d6577 0x141c6970 0x131b6273 0x121f647d Qm (i32)0xfffffe50
vsra.u64 q0, q1, #42 :: Qd 0x55555555 0x55955554 0x55555555 0x55955554 Qm (i32)0xffffffff
+vsra.u64 q0, q1, #42 :: Qd 0x151d191d 0x1425aa67 0x131b1a1b 0x12282929 Qm (i32)0xffffffff
vsra.s64 q6, q7, #12 :: Qd 0x55555556 0x50155555 0x55555556 0x50155555 Qm (i32)0x00000fac
+vsra.s64 q6, q7, #12 :: Qd 0x151f7bef 0xe6be71be 0x131d5cdd 0xc4d15111 Qm (i32)0x00000fac
vsra.u64 q8, q4, #9 :: Qd 0x5555556f 0xd155556f 0x5555556f 0xd155556f Qm (i32)0x000034f8
+vsra.u64 q8, q4, #9 :: Qd 0x15302fb3 0xa92eb433 0x132d3030 0xa7b0b5b6 Qm (i32)0x000034f8
vsra.s64 q9, q12, #11 :: Qd 0x55555585 0x88155585 0x55555585 0x88155585 Qm (i32)0x00018196
+vsra.s64 q9, q12, #11 :: Qd 0x1521dec2 0xb960c461 0x131f9fa0 0x77838404 Qm (i32)0x00018196
---- VSRI ----
vsri.16 q0, q1, #1 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff
+vsri.16 q0, q1, #1 :: Qd 0x13161695 0x12951715 0x12161595 0x11971717 Qm (i32)0xffffffff
vsri.16 q3, q4, #2 :: Qd 0x7fff7fe1 0x7fff7fe1 0x7fff7fe1 0x7fff7fe1 Qm (i32)0xffffff84
+vsri.16 q3, q4, #2 :: Qd 0x098b0b4a 0x094a0b8a 0x090b0aca 0x08cb0b8b Qm (i32)0xffffff84
vsri.32 q2, q5, #31 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0xffffffff
+vsri.32 q2, q5, #31 :: Qd 0x151d191c 0x141c1f1c 0x131b1a1a 0x121f1e1e Qm (i32)0xffffffff
vsri.8 q6, q7, #7 :: Qd 0x54545555 0x54545555 0x54545555 0x54545555 Qm (i32)0x0000ffff
+vsri.8 q6, q7, #7 :: Qd 0x141c181c 0x141c1e1c 0x121a1a1a 0x121e1e1e Qm (i32)0x0000ffff
vsri.16 q8, q9, #12 :: Qd 0x555f555f 0x555f555f 0x555f555f 0x555f555f Qm (i32)0xfffffff6
+vsri.16 q8, q9, #12 :: Qd 0x15121912 0x14121f12 0x13121a12 0x12121e12 Qm (i32)0xfffffff6
vsri.32 q10, q11, #5 :: Qd 0x5000013f 0x5000013f 0x5000013f 0x5000013f Qm (i32)0x000027fa
+vsri.32 q10, q11, #5 :: Qd 0x11316969 0x11295171 0x11216159 0x11197971 Qm (i32)0x000027fa
vsri.8 q12, q13, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff
+vsri.8 q12, q13, #1 :: Qd 0x13161615 0x12151715 0x12161515 0x11171717 Qm (i32)0xffffffff
vsri.16 q14, q15, #11 :: Qd 0x555f555f 0x555f555f 0x555f555f 0x555f555f Qm (i32)0xffffffff
+vsri.16 q14, q15, #11 :: Qd 0x15041905 0x14041f05 0x13041a05 0x12041e05 Qm (i32)0xffffffff
vsri.32 q10, q11, #9 :: Qd 0x55000001 0x55000001 0x55000001 0x55000001 Qm (i32)0x000003e8
+vsri.32 q10, q11, #9 :: Qd 0x15131696 0x14129517 0x13121615 0x12119797 Qm (i32)0x000003e8
vsri.8 q7, q13, #7 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0xffffffff
+vsri.8 q7, q13, #7 :: Qd 0x141c181c 0x141c1e1c 0x121a1a1a 0x121e1e1e Qm (i32)0xffffffff
vsri.16 q8, q1, #5 :: Qd 0x5000555e 0x5000555e 0x5000555e 0x5000555e Qm (i32)0x0000abcf
+vsri.16 q8, q1, #5 :: Qd 0x11311969 0x11291971 0x11211959 0x11191971 Qm (i32)0x0000abcf
vsri.32 q12, q3, #15 :: Qd 0x5555ffff 0x5555ffff 0x5555ffff 0x5555ffff Qm (i32)0xfffffe50
+vsri.32 q12, q3, #15 :: Qd 0x151c4c5a 0x141c4a54 0x131a4858 0x121e465e Qm (i32)0xfffffe50
vsri.64 q0, q1, #42 :: Qd 0x55555555 0x557fffff 0x55555555 0x557fffff Qm (i32)0xffffffff
+vsri.64 q0, q1, #42 :: Qd 0x151d191d 0x14098b4b 0x131b1a1b 0x12090b0a Qm (i32)0xffffffff
vsri.64 q6, q7, #12 :: Qd 0x55500000 0xfac00000 0x55500000 0xfac00000 Qm (i32)0x00000fac
+vsri.64 q6, q7, #12 :: Qd 0x151262d2 0xd2a252a2 0x131242c2 0xb2b232f2 Qm (i32)0x00000fac
vsri.64 q8, q4, #9 :: Qd 0x5500001a 0x7c00001a 0x5500001a 0x7c00001a Qm (i32)0x000034f8
+vsri.64 q8, q4, #9 :: Qd 0x15131696 0x95129517 0x13121615 0x95919797 Qm (i32)0x000034f8
vsri.64 q9, q12, #11 :: Qd 0x55400030 0x32c00030 0x55400030 0x32c00030 Qm (i32)0x00018196
+vsri.64 q9, q12, #11 :: Qd 0x1504c5a5 0xa544a545 0x13048585 0x656465e5 Qm (i32)0x00018196
---- VMOVL ----
vmovl.u32 q0, d2 :: Qd 0x00000000 0x00000042 0x00000000 0x00000042 Qm (i32)0x00000042
+vmovl.u32 q0, d2 :: Qd 0x00000000 0x242c2b2b 0x00000000 0x232f2e2f Qm (i32)0x00000042
vmovl.u16 q15, d2 :: Qd 0x00000000 0x00000042 0x00000000 0x00000042 Qm (i32)0x00000042
+vmovl.u16 q15, d2 :: Qd 0x0000242c 0x00002b2b 0x0000232f 0x00002e2f Qm (i32)0x00000042
vmovl.u8 q3, d31 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0x00000042
+vmovl.u8 q3, d31 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x00000042
vmovl.s32 q0, d2 :: Qd 0x00000000 0x00000042 0x00000000 0x00000042 Qm (i32)0x00000042
+vmovl.s32 q0, d2 :: Qd 0x00000000 0x242c2b2b 0x00000000 0x232f2e2f Qm (i32)0x00000042
vmovl.s16 q15, d2 :: Qd 0x00000000 0x00000042 0x00000000 0x00000042 Qm (i32)0x00000042
+vmovl.s16 q15, d2 :: Qd 0x0000242c 0x00002b2b 0x0000232f 0x00002e2f Qm (i32)0x00000042
vmovl.s8 q3, d31 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0x00000042
+vmovl.s8 q3, d31 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x00000042
vmovl.u32 q0, d2 :: Qd 0x00000000 0xedededed 0x00000000 0xedededed Qm (i8)0x000000ed
+vmovl.u32 q0, d2 :: Qd 0x00000000 0x242c2b2b 0x00000000 0x232f2e2f Qm (i8)0x000000ed
vmovl.u16 q15, d2 :: Qd 0x0000eded 0x0000eded 0x0000eded 0x0000eded Qm (i8)0x000000ed
+vmovl.u16 q15, d2 :: Qd 0x0000242c 0x00002b2b 0x0000232f 0x00002e2f Qm (i8)0x000000ed
vmovl.u8 q3, d31 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i8)0x000000ed
+vmovl.u8 q3, d31 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i8)0x000000ed
vmovl.s32 q0, d2 :: Qd 0xffffffff 0xedededed 0xffffffff 0xedededed Qm (i8)0x000000ed
+vmovl.s32 q0, d2 :: Qd 0x00000000 0x242c2b2b 0x00000000 0x232f2e2f Qm (i8)0x000000ed
vmovl.s16 q15, d2 :: Qd 0xffffeded 0xffffeded 0xffffeded 0xffffeded Qm (i8)0x000000ed
+vmovl.s16 q15, d2 :: Qd 0x0000242c 0x00002b2b 0x0000232f 0x00002e2f Qm (i8)0x000000ed
vmovl.s8 q3, d31 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i8)0x000000ed
+vmovl.s8 q3, d31 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i8)0x000000ed
---- VABS ----
vabs.s32 q0, q1 :: Qd 0x00000073 0x00000073 0x00000073 0x00000073 Qm (i32)0x00000073
+vabs.s32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000073
vabs.s16 q15, q4 :: Qd 0x00000073 0x00000073 0x00000073 0x00000073 Qm (i32)0x00000073
+vabs.s16 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000073
vabs.s8 q8, q7 :: Qd 0x00000073 0x00000073 0x00000073 0x00000073 Qm (i32)0x00000073
+vabs.s8 q8, q7 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000073
vabs.s32 q0, q1 :: Qd 0x000000fe 0x000000fe 0x000000fe 0x000000fe Qm (i32)0x000000fe
+vabs.s32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x000000fe
vabs.s16 q15, q4 :: Qd 0x000000ef 0x000000ef 0x000000ef 0x000000ef Qm (i32)0x000000ef
+vabs.s16 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x000000ef
vabs.s8 q8, q7 :: Qd 0x00000022 0x00000022 0x00000022 0x00000022 Qm (i32)0x000000de
+vabs.s8 q8, q7 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x000000de
vabs.s32 q0, q1 :: Qd 0x01f501f6 0x01f501f6 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a
+vabs.s32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i16)0x0000fe0a
vabs.s16 q15, q4 :: Qd 0x10f510f5 0x10f510f5 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b
+vabs.s16 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i16)0x0000ef0b
vabs.s8 q8, q7 :: Qd 0x220c220c 0x220c220c 0x220c220c 0x220c220c Qm (i16)0x0000de0c
+vabs.s8 q8, q7 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i16)0x0000de0c
---- VQABS ----
vqabs.s32 q0, q1 :: Qd 0x00000073 0x00000073 0x00000073 0x00000073 Qm (i32)0x00000073 fpscr: 00000000
+vqabs.s32 q0, q1 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x00000073 fpscr: 00000000
vqabs.s32 q0, q1 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x80000000 fpscr: 08000000
+vqabs.s32 q0, q1 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x80000000 fpscr: 00000000
vqabs.s16 q0, q1 :: Qd 0x7fff0000 0x7fff0000 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 fpscr: 08000000
+vqabs.s16 q0, q1 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x80000000 fpscr: 00000000
vqabs.s8 q0, q1 :: Qd 0x7f000000 0x7f000000 0x7f000000 0x7f000000 Qm (i32)0x80000000 fpscr: 08000000
+vqabs.s8 q0, q1 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x80000000 fpscr: 00000000
vqabs.s16 q15, q4 :: Qd 0x00000073 0x00000073 0x00000073 0x00000073 Qm (i32)0x00000073 fpscr: 00000000
+vqabs.s16 q15, q4 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x00000073 fpscr: 00000000
vqabs.s8 q8, q7 :: Qd 0x00000073 0x00000073 0x00000073 0x00000073 Qm (i32)0x00000073 fpscr: 00000000
+vqabs.s8 q8, q7 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x00000073 fpscr: 00000000
vqabs.s32 q0, q1 :: Qd 0x000000fe 0x000000fe 0x000000fe 0x000000fe Qm (i32)0x000000fe fpscr: 00000000
+vqabs.s32 q0, q1 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x000000fe fpscr: 00000000
vqabs.s16 q15, q4 :: Qd 0x000000ef 0x000000ef 0x000000ef 0x000000ef Qm (i32)0x000000ef fpscr: 00000000
+vqabs.s16 q15, q4 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x000000ef fpscr: 00000000
vqabs.s8 q8, q7 :: Qd 0x00000022 0x00000022 0x00000022 0x00000022 Qm (i32)0x000000de fpscr: 00000000
+vqabs.s8 q8, q7 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x000000de fpscr: 00000000
vqabs.s32 q0, q1 :: Qd 0x01f501f6 0x01f501f6 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a fpscr: 00000000
+vqabs.s32 q0, q1 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i16)0x0000fe0a fpscr: 00000000
vqabs.s16 q15, q4 :: Qd 0x10f510f5 0x10f510f5 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b fpscr: 00000000
+vqabs.s16 q15, q4 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i16)0x0000ef0b fpscr: 00000000
vqabs.s8 q8, q7 :: Qd 0x220c220c 0x220c220c 0x220c220c 0x220c220c Qm (i16)0x0000de0c fpscr: 00000000
+vqabs.s8 q8, q7 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i16)0x0000de0c fpscr: 00000000
---- VADDW ----
vaddw.s32 q0, q1, d4 :: Qd 0x00000073 0x12121285 0x00000073 0x12121285 Qm (i32)0x00000073 Qn (i8)0x00000012
vaddw.s16 q15, q14, d4 :: Qd 0x00001285 0x00001285 0x00001285 0x00001285 Qm (i32)0x00000073 Qn (i8)0x00000012
vsubl.u8 q0, d2, d4 :: Qd 0xffb1ffb1 0xffb1ffb1 0xffb1ffb1 0xffb1ffb1 Qm (i8)0x00000093 Qn (i8)0x000000e2
---- VCEQ #0 ----
vceq.i32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
+vceq.i32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vceq.i16 q2, q1, #0 :: Qd 0xffff0000 0xffff0000 0xffff0000 0xffff0000 Qm (i32)0x00000021
+vceq.i16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vceq.i8 q10, q11, #0 :: Qd 0xffffff00 0xffffff00 0xffffff00 0xffffff00 Qm (i32)0x00000021
+vceq.i8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vceq.i32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.i32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vceq.i16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.i16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vceq.i8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.i8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
---- VCGT #0 ----
vcgt.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcgt.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
vcgt.s16 q2, q1, #0 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x00000021
+vcgt.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
vcgt.s8 q10, q11, #0 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x00000021
+vcgt.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
vcgt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ef
+vcgt.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ef
vcgt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ed
+vcgt.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ed
vcgt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ae
+vcgt.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ae
---- VCGE #0 ----
vcge.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcge.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcge.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
vcge.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
vcge.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcge.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
vcge.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcge.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcge.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcge.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ef
+vcge.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ef
vcge.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ed
+vcge.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ed
vcge.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ae
+vcge.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ae
+vcge.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x000000ef
vcge.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x000000ef
vcge.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x000000ed
+vcge.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x000000ed
vcge.s8 q10, q11, #0 :: Qd 0xffffff00 0xffffff00 0xffffff00 0xffffff00 Qm (i32)0x000000ae
+vcge.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x000000ae
---- VCLE #0 ----
vcle.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
+vcle.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vcle.s16 q2, q1, #0 :: Qd 0xffff0000 0xffff0000 0xffff0000 0xffff0000 Qm (i32)0x00000021
+vcle.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vcle.s8 q10, q11, #0 :: Qd 0xffffff00 0xffffff00 0xffffff00 0xffffff00 Qm (i32)0x00000021
+vcle.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vcle.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcle.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcle.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcle.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ef
+vcle.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ef
vcle.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ed
+vcle.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ed
vcle.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ae
+vcle.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ae
---- VCLT #0 ----
vclt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
+vclt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vclt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
+vclt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
+vclt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vclt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vclt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ef
+vclt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ef
vclt.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ed
+vclt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ed
vclt.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ae
+vclt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ae
vclt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x000000ef
+vclt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x000000ef
+vclt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x000000ed
vclt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x000000ed
vclt.s8 q10, q11, #0 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x000000ae
+vclt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x000000ae
---- VCNT ----
vcnt.8 q0, q1 :: Qd 0x04050306 0x04050306 0x04050306 0x04050306 Qm (i32)0xac3d25eb
+vcnt.8 q0, q1 :: Qd 0x03040403 0x03030404 0x02030404 0x03050405 Qm (i32)0xac3d25eb
vcnt.8 q11, q14 :: Qd 0x04050306 0x04050306 0x04050306 0x04050306 Qm (i32)0xac3d25eb
+vcnt.8 q11, q14 :: Qd 0x03040403 0x03030404 0x02030404 0x03050405 Qm (i32)0xac3d25eb
vcnt.8 q6, q2 :: Qd 0x00020306 0x00020306 0x00020306 0x00020306 Qm (i32)0x000ad0eb
+vcnt.8 q6, q2 :: Qd 0x03040403 0x03030404 0x02030404 0x03050405 Qm (i32)0x000ad0eb
---- VCLS ----
vcls.s8 q0, q1 :: Qd 0x07070701 0x07070701 0x07070701 0x07070701 Qm (i32)0x00000021
+vcls.s8 q0, q1 :: Qd 0x01010101 0x01010101 0x01010101 0x01010101 Qm (i32)0x00000021
vcls.s8 q10, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x00000082
+vcls.s8 q10, q15 :: Qd 0x01010101 0x01010101 0x01010101 0x01010101 Qm (i8)0x00000082
vcls.s16 q0, q1 :: Qd 0x000f0009 0x000f0009 0x000f0009 0x000f0009 Qm (i32)0x00000021
+vcls.s16 q0, q1 :: Qd 0x00010001 0x00010001 0x00010001 0x00010001 Qm (i32)0x00000021
vcls.s16 q15, q10 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x00000082
+vcls.s16 q15, q10 :: Qd 0x00010001 0x00010001 0x00010001 0x00010001 Qm (i8)0x00000082
vcls.s32 q6, q1 :: Qd 0x00000019 0x00000019 0x00000019 0x00000019 Qm (i32)0x00000021
+vcls.s32 q6, q1 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i32)0x00000021
vcls.s32 q10, q5 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x00000082
+vcls.s32 q10, q5 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i8)0x00000082
vcls.s8 q2, q4 :: Qd 0x07070707 0x07070707 0x07070707 0x07070707 Qm (i8)0x000000ff
+vcls.s8 q2, q4 :: Qd 0x01010101 0x01010101 0x01010101 0x01010101 Qm (i8)0x000000ff
vcls.s16 q2, q4 :: Qd 0x000f000f 0x000f000f 0x000f000f 0x000f000f Qm (i8)0x000000ff
+vcls.s16 q2, q4 :: Qd 0x00010001 0x00010001 0x00010001 0x00010001 Qm (i8)0x000000ff
vcls.s32 q2, q4 :: Qd 0x0000001f 0x0000001f 0x0000001f 0x0000001f Qm (i8)0x000000ff
+vcls.s32 q2, q4 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i8)0x000000ff
vcls.s8 q2, q4 :: Qd 0x07020702 0x07020702 0x07020702 0x07020702 Qm (i16)0x0000ffef
+vcls.s8 q2, q4 :: Qd 0x01010101 0x01010101 0x01010101 0x01010101 Qm (i16)0x0000ffef
vcls.s16 q2, q4 :: Qd 0x000a000a 0x000a000a 0x000a000a 0x000a000a Qm (i16)0x0000ffef
+vcls.s16 q2, q4 :: Qd 0x00010001 0x00010001 0x00010001 0x00010001 Qm (i16)0x0000ffef
vcls.s32 q2, q4 :: Qd 0x0000000a 0x0000000a 0x0000000a 0x0000000a Qm (i16)0x0000ffef
+vcls.s32 q2, q4 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i16)0x0000ffef
vcls.s8 q2, q4 :: Qd 0x07070707 0x07070707 0x07070707 0x07070707 Qm (i8)0x00000000
+vcls.s8 q2, q4 :: Qd 0x01010101 0x01010101 0x01010101 0x01010101 Qm (i8)0x00000000
vcls.s16 q2, q4 :: Qd 0x000f000f 0x000f000f 0x000f000f 0x000f000f Qm (i8)0x00000000
+vcls.s16 q2, q4 :: Qd 0x00010001 0x00010001 0x00010001 0x00010001 Qm (i8)0x00000000
vcls.s32 q2, q4 :: Qd 0x0000001f 0x0000001f 0x0000001f 0x0000001f Qm (i8)0x00000000
+vcls.s32 q2, q4 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i8)0x00000000
vcls.s8 q2, q4 :: Qd 0x07020702 0x07020702 0x07020702 0x07020702 Qm (i16)0x000000ef
+vcls.s8 q2, q4 :: Qd 0x01010101 0x01010101 0x01010101 0x01010101 Qm (i16)0x000000ef
vcls.s16 q2, q4 :: Qd 0x00070007 0x00070007 0x00070007 0x00070007 Qm (i16)0x000000ef
+vcls.s16 q2, q4 :: Qd 0x00010001 0x00010001 0x00010001 0x00010001 Qm (i16)0x000000ef
vcls.s32 q2, q4 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007 Qm (i16)0x000000ef
+vcls.s32 q2, q4 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i16)0x000000ef
---- VCLZ ----
vclz.i8 q0, q1 :: Qd 0x08080802 0x08080802 0x08080802 0x08080802 Qm (i32)0x00000021
+vclz.i8 q0, q1 :: Qd 0x02020202 0x02020202 0x02020202 0x02020202 Qm (i32)0x00000021
vclz.i8 q10, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x00000082
+vclz.i8 q10, q15 :: Qd 0x02020202 0x02020202 0x02020202 0x02020202 Qm (i8)0x00000082
vclz.i16 q0, q1 :: Qd 0x0010000a 0x0010000a 0x0010000a 0x0010000a Qm (i32)0x00000021
+vclz.i16 q0, q1 :: Qd 0x00020002 0x00020002 0x00020002 0x00020002 Qm (i32)0x00000021
vclz.i16 q15, q10 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x00000082
+vclz.i16 q15, q10 :: Qd 0x00020002 0x00020002 0x00020002 0x00020002 Qm (i8)0x00000082
vclz.i32 q6, q1 :: Qd 0x0000001a 0x0000001a 0x0000001a 0x0000001a Qm (i32)0x00000021
+vclz.i32 q6, q1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000021
vclz.i32 q10, q5 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x00000082
+vclz.i32 q10, q5 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i8)0x00000082
vclz.i8 q2, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ff
+vclz.i8 q2, q4 :: Qd 0x02020202 0x02020202 0x02020202 0x02020202 Qm (i8)0x000000ff
vclz.i16 q2, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ff
+vclz.i16 q2, q4 :: Qd 0x00020002 0x00020002 0x00020002 0x00020002 Qm (i8)0x000000ff
vclz.i32 q2, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ff
+vclz.i32 q2, q4 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i8)0x000000ff
vclz.i8 q2, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i16)0x0000ffef
+vclz.i8 q2, q4 :: Qd 0x02020202 0x02020202 0x02020202 0x02020202 Qm (i16)0x0000ffef
vclz.i16 q2, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i16)0x0000ffef
+vclz.i16 q2, q4 :: Qd 0x00020002 0x00020002 0x00020002 0x00020002 Qm (i16)0x0000ffef
vclz.i32 q2, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i16)0x0000ffef
+vclz.i32 q2, q4 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i16)0x0000ffef
vclz.i8 q2, q4 :: Qd 0x08080808 0x08080808 0x08080808 0x08080808 Qm (i8)0x00000000
+vclz.i8 q2, q4 :: Qd 0x02020202 0x02020202 0x02020202 0x02020202 Qm (i8)0x00000000
vclz.i16 q2, q4 :: Qd 0x00100010 0x00100010 0x00100010 0x00100010 Qm (i8)0x00000000
+vclz.i16 q2, q4 :: Qd 0x00020002 0x00020002 0x00020002 0x00020002 Qm (i8)0x00000000
vclz.i32 q2, q4 :: Qd 0x00000020 0x00000020 0x00000020 0x00000020 Qm (i8)0x00000000
+vclz.i32 q2, q4 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i8)0x00000000
vclz.i8 q2, q4 :: Qd 0x08000800 0x08000800 0x08000800 0x08000800 Qm (i16)0x000000ef
+vclz.i8 q2, q4 :: Qd 0x02020202 0x02020202 0x02020202 0x02020202 Qm (i16)0x000000ef
vclz.i16 q2, q4 :: Qd 0x00080008 0x00080008 0x00080008 0x00080008 Qm (i16)0x000000ef
+vclz.i16 q2, q4 :: Qd 0x00020002 0x00020002 0x00020002 0x00020002 Qm (i16)0x000000ef
vclz.i32 q2, q4 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i16)0x000000ef
+vclz.i32 q2, q4 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i16)0x000000ef
---- VSLI ----
vsli.16 q0, q1, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vsli.16 q0, q1, #1 :: Qd 0x4c5b5a55 0x4a545c56 0x48595657 0x465f5c5f Qm (i32)0xffffffff
vsli.16 q3, q4, #2 :: Qd 0xfffdfe11 0xfffdfe11 0xfffdfe11 0xfffdfe11 Qm (i32)0xffffff84
+vsli.16 q3, q4, #2 :: Qd 0x98b5b4a9 0x94a8b8ac 0x90b3acaf 0x8cbfb8bf Qm (i32)0xffffff84
vsli.32 q2, q5, #31 :: Qd 0xd5555555 0xd5555555 0xd5555555 0xd5555555 Qm (i32)0xffffffff
+vsli.32 q2, q5, #31 :: Qd 0x151d191d 0x941c1f1c 0x931b1a1b 0x921f1e1f Qm (i32)0xffffffff
vsli.8 q6, q7, #7 :: Qd 0x5555d5d5 0x5555d5d5 0x5555d5d5 0x5555d5d5 Qm (i32)0x0000ffff
+vsli.8 q6, q7, #7 :: Qd 0x159d991d 0x941c1f9c 0x131b9a9b 0x929f1e9f Qm (i32)0x0000ffff
vsli.16 q8, q9, #12 :: Qd 0xf5556555 0xf5556555 0xf5556555 0xf5556555 Qm (i32)0xfffffff6
+vsli.16 q8, q9, #12 :: Qd 0xd51da91d 0xa41cbf1c 0xc31bba1b 0xf21ffe1f Qm (i32)0xfffffff6
vsli.32 q10, q11, #5 :: Qd 0x0004ff55 0x0004ff55 0x0004ff55 0x0004ff55 Qm (i32)0x000027fa
+vsli.32 q10, q11, #5 :: Qd 0xc5a5a55d 0xa545c57c 0x8585657b 0x65e5c5ff Qm (i32)0x000027fa
vsli.8 q12, q13, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vsli.8 q12, q13, #1 :: Qd 0x4d5b5b55 0x4a545d56 0x49595657 0x465f5c5f Qm (i32)0xffffffff
vsli.16 q14, q15, #11 :: Qd 0xfd55fd55 0xfd55fd55 0xfd55fd55 0xfd55fd55 Qm (i32)0xffffffff
+vsli.16 q14, q15, #11 :: Qd 0x6d1d511d 0x541c5f1c 0x631b5a1b 0x7a1f7e1f Qm (i32)0xffffffff
vsli.32 q10, q11, #9 :: Qd 0x0007d155 0x0007d155 0x0007d155 0x0007d155 Qm (i32)0x000003e8
+vsli.32 q10, q11, #9 :: Qd 0x5a5a551d 0x545c571c 0x5856561b 0x5e5c5e1f Qm (i32)0x000003e8
vsli.8 q7, q13, #7 :: Qd 0xd5d5d5d5 0xd5d5d5d5 0xd5d5d5d5 0xd5d5d5d5 Qm (i32)0xffffffff
+vsli.8 q7, q13, #7 :: Qd 0x159d991d 0x941c1f9c 0x131b9a9b 0x929f1e9f Qm (i32)0xffffffff
vsli.16 q8, q1, #1 :: Qd 0x0001579f 0x0001579f 0x0001579f 0x0001579f Qm (i32)0x0000abcf
+vsli.16 q8, q1, #1 :: Qd 0x4c5b5a55 0x4a545c56 0x48595657 0x465f5c5f Qm (i32)0x0000abcf
vsli.32 q12, q3, #15 :: Qd 0xff285555 0xff285555 0xff285555 0xff285555 Qm (i32)0xfffffe50
+vsli.32 q12, q3, #15 :: Qd 0x9695191d 0x17159f1c 0x15959a1b 0x97179e1f Qm (i32)0xfffffe50
vsli.64 q0, q1, #42 :: Qd 0xfffffd55 0x55555555 0xfffffd55 0x55555555 Qm (i32)0xffffffff
+vsli.64 q0, q1, #42 :: Qd 0xa8b8ad1d 0x141c1f1c 0xbcb8be1b 0x121f1e1f Qm (i32)0xffffffff
vsli.64 q6, q7, #12 :: Qd 0x00fac000 0x00fac555 0x00fac000 0x00fac555 Qm (i32)0x00000fac
+vsli.64 q6, q7, #12 :: Qd 0xd2d2a252 0xa2e2bf1c 0xc2b2b232 0xf2e2fe1f Qm (i32)0x00000fac
vsli.64 q8, q4, #9 :: Qd 0x0069f000 0x0069f155 0x0069f000 0x0069f155 Qm (i32)0x000034f8
+vsli.64 q8, q4, #9 :: Qd 0x5a5a544a 0x545c571c 0x58565646 0x5e5c5e1f Qm (i32)0x000034f8
vsli.64 q9, q12, #11 :: Qd 0x0c0cb000 0x0c0cb555 0x0c0cb000 0x0c0cb555 Qm (i32)0x00018196
+vsli.64 q9, q12, #11 :: Qd 0x69695129 0x51715f1c 0x61595919 0x79717e1f Qm (i32)0x00018196
---- VPADDL ----
vpaddl.u32 q0, q1 :: Qd 0x00000000 0x00000030 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.u32 q0, q1 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x00000018
vpaddl.u32 q0, q1 :: Qd 0x00000000 0x00000118 0x00000000 0x00000118 Qm (i32)0x0000008c
+vpaddl.u32 q0, q1 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x0000008c
vpaddl.u16 q0, q1 :: Qd 0x0000008c 0x0000008c 0x0000008c 0x0000008c Qm (i32)0x0000008c
+vpaddl.u16 q0, q1 :: Qd 0x00005357 0x00005355 0x00004f57 0x0000515e Qm (i32)0x0000008c
vpaddl.u8 q0, q1 :: Qd 0x0000008c 0x0000008c 0x0000008c 0x0000008c Qm (i32)0x0000008c
+vpaddl.u8 q0, q1 :: Qd 0x00530057 0x004f0059 0x00500056 0x0052005d Qm (i32)0x0000008c
vpaddl.u8 q0, q1 :: Qd 0x00800001 0x00800001 0x00800001 0x00800001 Qm (i32)0x80000001
+vpaddl.u8 q0, q1 :: Qd 0x00530057 0x004f0059 0x00500056 0x0052005d Qm (i32)0x80000001
vpaddl.u16 q0, q1 :: Qd 0x00008001 0x00008001 0x00008001 0x00008001 Qm (i32)0x80000001
+vpaddl.u16 q0, q1 :: Qd 0x00005357 0x00005355 0x00004f57 0x0000515e Qm (i32)0x80000001
vpaddl.u32 q0, q1 :: Qd 0x00000001 0x00000002 0x00000001 0x00000002 Qm (i32)0x80000001
+vpaddl.u32 q0, q1 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x80000001
vpaddl.u32 q10, q11 :: Qd 0x00000000 0x00000030 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.u32 q10, q11 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x00000018
vpaddl.s32 q0, q1 :: Qd 0x00000000 0x00000030 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.s32 q0, q1 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x00000018
vpaddl.s32 q0, q1 :: Qd 0x00000000 0x00000118 0x00000000 0x00000118 Qm (i32)0x0000008c
+vpaddl.s32 q0, q1 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x0000008c
vpaddl.s16 q0, q1 :: Qd 0x0000008c 0x0000008c 0x0000008c 0x0000008c Qm (i32)0x0000008c
+vpaddl.s16 q0, q1 :: Qd 0x00005357 0x00005355 0x00004f57 0x0000515e Qm (i32)0x0000008c
vpaddl.s8 q0, q1 :: Qd 0x0000ff8c 0x0000ff8c 0x0000ff8c 0x0000ff8c Qm (i32)0x0000008c
+vpaddl.s8 q0, q1 :: Qd 0x00530057 0x004f0059 0x00500056 0x0052005d Qm (i32)0x0000008c
vpaddl.s8 q0, q1 :: Qd 0xff800001 0xff800001 0xff800001 0xff800001 Qm (i32)0x80000001
+vpaddl.s8 q0, q1 :: Qd 0x00530057 0x004f0059 0x00500056 0x0052005d Qm (i32)0x80000001
vpaddl.s16 q0, q1 :: Qd 0xffff8001 0xffff8001 0xffff8001 0xffff8001 Qm (i32)0x80000001
+vpaddl.s16 q0, q1 :: Qd 0x00005357 0x00005355 0x00004f57 0x0000515e Qm (i32)0x80000001
vpaddl.s32 q0, q1 :: Qd 0xffffffff 0x00000002 0xffffffff 0x00000002 Qm (i32)0x80000001
+vpaddl.s32 q0, q1 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x80000001
vpaddl.s32 q10, q11 :: Qd 0x00000000 0x00000030 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.s32 q10, q11 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x00000018
---- VPADAL ----
vpadal.u32 q0, q1 :: Qd 0x55555555 0x55555585 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.u32 q0, q1 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x00000018
vpadal.u32 q0, q1 :: Qd 0x55555555 0x5555566d 0x55555555 0x5555566d Qm (i32)0x0000008c
+vpadal.u32 q0, q1 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x0000008c
vpadal.u16 q0, q1 :: Qd 0x555555e1 0x555555e1 0x555555e1 0x555555e1 Qm (i32)0x0000008c
+vpadal.u16 q0, q1 :: Qd 0x151d6c74 0x141c7271 0x131b6972 0x121f6f7d Qm (i32)0x0000008c
vpadal.u8 q0, q1 :: Qd 0x566d566d 0x566d566d 0x566d566d 0x566d566d Qm (i8)0x0000008c
+vpadal.u8 q0, q1 :: Qd 0x15701974 0x146b1f75 0x136b1a71 0x12711e7c Qm (i8)0x0000008c
vpadal.u8 q0, q1 :: Qd 0x55d55556 0x55d55556 0x55d55556 0x55d55556 Qm (i32)0x80000001
+vpadal.u8 q0, q1 :: Qd 0x15701974 0x146b1f75 0x136b1a71 0x12711e7c Qm (i32)0x80000001
vpadal.u16 q0, q1 :: Qd 0x5555d556 0x5555d556 0x5555d556 0x5555d556 Qm (i32)0x80000001
+vpadal.u16 q0, q1 :: Qd 0x151d6c74 0x141c7271 0x131b6972 0x121f6f7d Qm (i32)0x80000001
vpadal.u32 q0, q1 :: Qd 0x55555556 0x55555557 0x55555556 0x55555557 Qm (i32)0x80000001
+vpadal.u32 q0, q1 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x80000001
vpadal.u32 q10, q11 :: Qd 0x55555555 0x55555585 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.u32 q10, q11 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x00000018
vpadal.s32 q0, q1 :: Qd 0x55555555 0x55555585 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.s32 q0, q1 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x00000018
vpadal.s32 q0, q1 :: Qd 0x55555555 0x5555566d 0x55555555 0x5555566d Qm (i32)0x0000008c
+vpadal.s32 q0, q1 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x0000008c
vpadal.s16 q0, q1 :: Qd 0x555555e1 0x555555e1 0x555555e1 0x555555e1 Qm (i32)0x0000008c
+vpadal.s16 q0, q1 :: Qd 0x151d6c74 0x141c7271 0x131b6972 0x121f6f7d Qm (i32)0x0000008c
vpadal.s8 q0, q1 :: Qd 0x546d546d 0x546d546d 0x546d546d 0x546d546d Qm (i8)0x0000008c
+vpadal.s8 q0, q1 :: Qd 0x15701974 0x146b1f75 0x136b1a71 0x12711e7c Qm (i8)0x0000008c
vpadal.s8 q0, q1 :: Qd 0x54d55556 0x54d55556 0x54d55556 0x54d55556 Qm (i32)0x80000001
+vpadal.s8 q0, q1 :: Qd 0x15701974 0x146b1f75 0x136b1a71 0x12711e7c Qm (i32)0x80000001
vpadal.s16 q0, q1 :: Qd 0x5554d556 0x5554d556 0x5554d556 0x5554d556 Qm (i32)0x80000001
+vpadal.s16 q0, q1 :: Qd 0x151d6c74 0x141c7271 0x131b6972 0x121f6f7d Qm (i32)0x80000001
vpadal.s32 q0, q1 :: Qd 0x55555554 0x55555557 0x55555554 0x55555557 Qm (i32)0x80000001
+vpadal.s32 q0, q1 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x80000001
vpadal.s32 q10, q11 :: Qd 0x55555555 0x55555585 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.s32 q10, q11 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x00000018
---- VZIP ----
vzip.32 q0, q1 :: Qm 0x34343434 0x12121212 0x34343434 0x12121212 Qn 0x34343434 0x12121212 0x34343434 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.32 q0, q1 :: Qm 0x34343434 0x131b1a1b 0x34343434 0x121f1e1f Qn 0x34343434 0x151d191d 0x34343434 0x141c1f1c
+Qm (i8)0x00000012 Qn (i8)0x00000034
vzip.16 q1, q0 :: Qm 0x12123434 0x12123434 0x12123434 0x12123434 Qn 0x12123434 0x12123434 0x12123434 0x12123434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.16 q1, q0 :: Qm 0x151d3434 0x191d3434 0x141c3434 0x1f1c3434 Qn 0x131b3434 0x1a1b3434 0x121f3434 0x1e1f3434
+Qm (i8)0x00000012 Qn (i8)0x00000034
vzip.8 q10, q11 :: Qm 0x34123412 0x34123412 0x34123412 0x34123412 Qn 0x34123412 0x34123412 0x34123412 0x34123412 Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.8 q10, q11 :: Qm 0x3413341b 0x341a341b 0x3412341f 0x341e341f Qn 0x3415341d 0x3419341d 0x3414341c 0x341f341c
+Qm (i8)0x00000012 Qn (i8)0x00000034
vzip.32 q0, q1 :: Qm 0x0a0b0c0d 0x12345678 0x0a0b0c0d 0x12345678 Qn 0x0a0b0c0d 0x12345678 0x0a0b0c0d 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.32 q0, q1 :: Qm 0x0a0b0c0d 0x131b1a1b 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x151d191d 0x0a0b0c0d 0x141c1f1c
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vzip.16 q1, q0 :: Qm 0x12340a0b 0x56780c0d 0x12340a0b 0x56780c0d Qn 0x12340a0b 0x56780c0d 0x12340a0b 0x56780c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.16 q1, q0 :: Qm 0x151d0a0b 0x191d0c0d 0x141c0a0b 0x1f1c0c0d Qn 0x131b0a0b 0x1a1b0c0d 0x121f0a0b 0x1e1f0c0d
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vzip.8 q10, q11 :: Qm 0x0a120b34 0x0c560d78 0x0a120b34 0x0c560d78 Qn 0x0a120b34 0x0c560d78 0x0a120b34 0x0c560d78 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.8 q10, q11 :: Qm 0x0a130b1b 0x0c1a0d1b 0x0a120b1f 0x0c1e0d1f Qn 0x0a150b1d 0x0c190d1d 0x0a140b1c 0x0c1f0d1c
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VUZP ----
vuzp.32 q0, q1 :: Qm 0x34343434 0x34343434 0x12121212 0x12121212 Qn 0x34343434 0x34343434 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.32 q0, q1 :: Qm 0x34343434 0x34343434 0x141c1f1c 0x121f1e1f Qn 0x34343434 0x34343434 0x151d191d 0x131b1a1b
+Qm (i8)0x00000012 Qn (i8)0x00000034
vuzp.16 q1, q0 :: Qm 0x12121212 0x12121212 0x34343434 0x34343434 Qn 0x12121212 0x12121212 0x34343434 0x34343434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.16 q1, q0 :: Qm 0x151d141c 0x131b121f 0x34343434 0x34343434 Qn 0x191d1f1c 0x1a1b1e1f 0x34343434 0x34343434
+Qm (i8)0x00000012 Qn (i8)0x00000034
vuzp.8 q10, q11 :: Qm 0x34343434 0x34343434 0x12121212 0x12121212 Qn 0x34343434 0x34343434 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.8 q10, q11 :: Qm 0x34343434 0x34343434 0x1d1d1c1c 0x1b1b1f1f Qn 0x34343434 0x34343434 0x1519141f 0x131a121e
+Qm (i8)0x00000012 Qn (i8)0x00000034
vuzp.32 q0, q1 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x12345678 0x12345678 Qn 0x0a0b0c0d 0x0a0b0c0d 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.32 q0, q1 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x141c1f1c 0x121f1e1f Qn 0x0a0b0c0d 0x0a0b0c0d 0x151d191d 0x131b1a1b
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vuzp.16 q1, q0 :: Qm 0x12341234 0x12341234 0x0a0b0a0b 0x0a0b0a0b Qn 0x56785678 0x56785678 0x0c0d0c0d 0x0c0d0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.16 q1, q0 :: Qm 0x151d141c 0x131b121f 0x0a0b0a0b 0x0a0b0a0b Qn 0x191d1f1c 0x1a1b1e1f 0x0c0d0c0d 0x0c0d0c0d
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vuzp.8 q10, q11 :: Qm 0x0b0d0b0d 0x0b0d0b0d 0x34783478 0x34783478 Qn 0x0a0c0a0c 0x0a0c0a0c 0x12561256 0x12561256 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.8 q10, q11 :: Qm 0x0b0d0b0d 0x0b0d0b0d 0x1d1d1c1c 0x1b1b1f1f Qn 0x0a0c0a0c 0x0a0c0a0c 0x1519141f 0x131a121e
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VTRN ----
vtrn.32 q0, q1 :: Qm 0x34343434 0x12121212 0x34343434 0x12121212 Qn 0x34343434 0x12121212 0x34343434 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.32 q0, q1 :: Qm 0x34343434 0x141c1f1c 0x34343434 0x121f1e1f Qn 0x34343434 0x151d191d 0x34343434 0x131b1a1b
+Qm (i8)0x00000012 Qn (i8)0x00000034
vtrn.16 q1, q0 :: Qm 0x12123434 0x12123434 0x12123434 0x12123434 Qn 0x12123434 0x12123434 0x12123434 0x12123434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.16 q1, q0 :: Qm 0x151d3434 0x141c3434 0x131b3434 0x121f3434 Qn 0x191d3434 0x1f1c3434 0x1a1b3434 0x1e1f3434
+Qm (i8)0x00000012 Qn (i8)0x00000034
vtrn.8 q10, q11 :: Qm 0x34123412 0x34123412 0x34123412 0x34123412 Qn 0x34123412 0x34123412 0x34123412 0x34123412 Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.8 q10, q11 :: Qm 0x341d341d 0x341c341c 0x341b341b 0x341f341f Qn 0x34153419 0x3414341f 0x3413341a 0x3412341e
+Qm (i8)0x00000012 Qn (i8)0x00000034
vtrn.32 q0, q1 :: Qm 0x0a0b0c0d 0x12345678 0x0a0b0c0d 0x12345678 Qn 0x0a0b0c0d 0x12345678 0x0a0b0c0d 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.32 q0, q1 :: Qm 0x0a0b0c0d 0x141c1f1c 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x151d191d 0x0a0b0c0d 0x131b1a1b
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vtrn.16 q1, q0 :: Qm 0x12340a0b 0x12340a0b 0x12340a0b 0x12340a0b Qn 0x56780c0d 0x56780c0d 0x56780c0d 0x56780c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.16 q1, q0 :: Qm 0x151d0a0b 0x141c0a0b 0x131b0a0b 0x121f0a0b Qn 0x191d0c0d 0x1f1c0c0d 0x1a1b0c0d 0x1e1f0c0d
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vtrn.8 q10, q11 :: Qm 0x0b340d78 0x0b340d78 0x0b340d78 0x0b340d78 Qn 0x0a120c56 0x0a120c56 0x0a120c56 0x0a120c56 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.8 q10, q11 :: Qm 0x0b1d0d1d 0x0b1c0d1c 0x0b1b0d1b 0x0b1f0d1f Qn 0x0a150c19 0x0a140c1f 0x0a130c1a 0x0a120c1e
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VSWP ----
vswp q0, q1 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x12121212 0x12121212 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp q0, q1 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
+Qm (i8)0x00000012 Qn (i8)0x00000034
vswp q1, q0 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x12121212 0x12121212 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp q1, q0 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
+Qm (i8)0x00000012 Qn (i8)0x00000034
vswp q10, q11 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x12121212 0x12121212 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp q10, q11 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
+Qm (i8)0x00000012 Qn (i8)0x00000034
vswp q0, q1 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x12345678 0x12345678 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp q0, q1 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vswp q1, q0 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x12345678 0x12345678 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp q1, q0 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vswp q10, q11 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x12345678 0x12345678 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp q10, q11 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VDUP ----
vdup.8 q2, d2[0] :: Qd 0x57575757 0x57575757 0x57575757 0x57575757 Qm (i32)0x0abc4657
+vdup.8 q2, d2[0] :: Qd 0x2f2f2f2f 0x2f2f2f2f 0x2f2f2f2f 0x2f2f2f2f Qm (i32)0x0abc4657
vdup.8 q3, d3[2] :: Qd 0x07070707 0x07070707 0x07070707 0x07070707 Qm (i32)0x0007a1b3
+vdup.8 q3, d3[2] :: Qd 0x2f2f2f2f 0x2f2f2f2f 0x2f2f2f2f 0x2f2f2f2f Qm (i32)0x0007a1b3
vdup.8 q1, d0[7] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00713aaa
+vdup.8 q1, d0[7] :: Qd 0x24242424 0x24242424 0x24242424 0x24242424 Qm (i32)0x00713aaa
vdup.8 q0, d4[3] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x000aa713
+vdup.8 q0, d4[3] :: Qd 0x23232323 0x23232323 0x23232323 0x23232323 Qm (i32)0x000aa713
vdup.8 q4, d28[4] :: Qd 0xc3c3c3c3 0xc3c3c3c3 0xc3c3c3c3 0xc3c3c3c3 Qm (i32)0x0007b1c3
+vdup.8 q4, d28[4] :: Qd 0x2b2b2b2b 0x2b2b2b2b 0x2b2b2b2b 0x2b2b2b2b Qm (i32)0x0007b1c3
vdup.16 q7, d19[3] :: Qd 0x07130713 0x07130713 0x07130713 0x07130713 Qm (i32)0x0713ffff
+vdup.16 q7, d19[3] :: Qd 0x242c242c 0x242c242c 0x242c242c 0x242c242c Qm (i32)0x0713ffff
vdup.16 q15, d31[0] :: Qd 0x00fa00fa 0x00fa00fa 0x00fa00fa 0x00fa00fa Qm (i32)0x007f00fa
+vdup.16 q15, d31[0] :: Qd 0x2e2f2e2f 0x2e2f2e2f 0x2e2f2e2f 0x2e2f2e2f Qm (i32)0x007f00fa
vdup.16 q6, d2[0] :: Qd 0xbcdebcde 0xbcdebcde 0xbcdebcde 0xbcdebcde Qm (i32)0x0ffabcde
+vdup.16 q6, d2[0] :: Qd 0x2e2f2e2f 0x2e2f2e2f 0x2e2f2e2f 0x2e2f2e2f Qm (i32)0x0ffabcde
vdup.16 q8, d22[3] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000713
+vdup.16 q8, d22[3] :: Qd 0x242c242c 0x242c242c 0x242c242c 0x242c242c Qm (i32)0x00000713
vdup.16 q9, d2[0] :: Qd 0x07130713 0x07130713 0x07130713 0x07130713 Qm (i32)0x00000713
+vdup.16 q9, d2[0] :: Qd 0x2e2f2e2f 0x2e2f2e2f 0x2e2f2e2f 0x2e2f2e2f Qm (i32)0x00000713
vdup.32 q10, d17[1] :: Qd 0x00000713 0x00000713 0x00000713 0x00000713 Qm (i32)0x00000713
+vdup.32 q10, d17[1] :: Qd 0x242c2b2b 0x242c2b2b 0x242c2b2b 0x242c2b2b Qm (i32)0x00000713
vdup.32 q15, d11[0] :: Qd 0x00000003 0x00000003 0x00000003 0x00000003 Qm (i32)0x00000003
+vdup.32 q15, d11[0] :: Qd 0x232f2e2f 0x232f2e2f 0x232f2e2f 0x232f2e2f Qm (i32)0x00000003
vdup.32 q10, d29[1] :: Qd 0xf00000aa 0xf00000aa 0xf00000aa 0xf00000aa Qm (i32)0xf00000aa
+vdup.32 q10, d29[1] :: Qd 0x242c2b2b 0x242c2b2b 0x242c2b2b 0x242c2b2b Qm (i32)0xf00000aa
vdup.32 q12, d0[1] :: Qd 0x0000000f 0x0000000f 0x0000000f 0x0000000f Qm (i32)0x0000000f
+vdup.32 q12, d0[1] :: Qd 0x242c2b2b 0x242c2b2b 0x242c2b2b 0x242c2b2b Qm (i32)0x0000000f
vdup.32 q13, d13[0] :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vdup.32 q13, d13[0] :: Qd 0x232f2e2f 0x232f2e2f 0x232f2e2f 0x232f2e2f Qm (i32)0xffffffff
---- VQDMULL ----
vqdmull.s32 q0, d1, d2 :: Qd 0x00000000 0x00001680 0x00000000 0x00001680 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q0, d1, d2 :: Qd 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q0, d1, d2 :: Qd 0x00000011 0xe9687950 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmull.s32 q6, d7, d8 :: Qd 0xffffffff 0xffff7cc0 0xffffffff 0xffff7cc0 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmull.s32 q6, d7, d8 :: Qd 0xffffffef 0x02d3c2f0 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmull.s32 q6, d7, d8 :: Qd 0xffffffee 0x169786b0 0xffffffef 0x02d3c2f0 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmull.s16 q9, d11, d12 :: Qd 0x00000000 0x0002d000 0x00000000 0x0002d000 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmull.s16 q9, d11, d12 :: Qd 0x00000000 0x0043c5c0 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmull.s16 q9, d11, d12 :: Qd 0x00000000 0x003abcc0 0x00000000 0x0043c5c0 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x10014004 0x00000000 0x10014004 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x0788387c Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x0687286c 0x00000000 0x0788387c Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmull.s32 q7, d8, d9 :: Qd 0x7ffffffd 0x00000004 0x7ffffffd 0x00000004 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d9 :: Qd 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d9 :: Qd 0xece4e5e5 0x4c6c686c 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0xe50b10cc 0x00000000 0xe50b10cc Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x0788387c Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x0687286c 0x00000000 0x0788387c Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
vqdmull.s32 q7, d8, d9 :: Qd 0xfffffff4 0x00000000 0xfffffff4 0x00000000 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmull.s32 q7, d8, d9 :: Qd 0x00000001 0xb2ead2e8 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmull.s32 q7, d8, d9 :: Qd 0x00000001 0xca8a7288 0x00000001 0xb2ead2e8 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x003f83f8 0x00000000 0x003f83f8 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x0788387c Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x0687286c 0x00000000 0x0788387c Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmull.s32 q7, d8, d9 :: Qd 0x7ffffffd 0x00000004 0x7ffffffd 0x00000004 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d9 :: Qd 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d9 :: Qd 0xece4e5e5 0x4c6c686c 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmull.s32 q10, d11, d15 :: Qd 0x00000000 0x00001680 0x00000000 0x00001680 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q10, d11, d15 :: Qd 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q10, d11, d15 :: Qd 0x00000011 0xe9687950 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmull.s32 q10, d30, d31 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmull.s32 q10, d30, d31 :: Qd 0xede0e1e1 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s32 q10, d30, d31 :: Qd 0xece4e5e5 0x00000000 0xede0e1e1 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmull.s16 q10, d30, d31 :: Qd 0x7fffffff 0x00000000 0x7fffffff 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmull.s16 q10, d30, d31 :: Qd 0xede10000 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s16 q10, d30, d31 :: Qd 0xece50000 0x00000000 0xede10000 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmull.s32 q10, d30, d31 :: Qd 0xc0000000 0x00000000 0xc0000000 0x00000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s32 q10, d30, d31 :: Qd 0xede0e1e1 0x00000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s32 q10, d30, d31 :: Qd 0xece4e5e5 0x00000000 0xede0e1e1 0x00000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmull.s16 q10, d30, d31 :: Qd 0xc0000000 0x00000000 0xc0000000 0x00000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmull.s16 q10, d30, d31 :: Qd 0x090f8000 0x00000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmull.s16 q10, d30, d31 :: Qd 0x098d8000 0x00000000 0x090f8000 0x00000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMULL (by scalar) ----
vqdmull.s32 q0, d1, d7[0] :: Qd 0x00000000 0x00001680 0x00000000 0x00001680 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q0, d1, d7[0] :: Qd 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q0, d1, d7[0] :: Qd 0x00000011 0xe9687950 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmull.s32 q6, d7, d6[0] :: Qd 0xffffffff 0xffff7cc0 0xffffffff 0xffff7cc0 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmull.s32 q6, d7, d6[0] :: Qd 0xffffffef 0x02d3c2f0 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmull.s32 q6, d7, d6[0] :: Qd 0xffffffee 0x169786b0 0xffffffef 0x02d3c2f0 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmull.s16 q9, d11, d7[2] :: Qd 0x00000000 0x0002d000 0x00000000 0x0002d000 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmull.s16 q9, d11, d7[2] :: Qd 0x0028c5c0 0x0043c5c0 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmull.s16 q9, d11, d7[2] :: Qd 0x002afcc0 0x003abcc0 0x0028c5c0 0x0043c5c0 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmull.s16 q4, d5, d6[2] :: Qd 0x00000000 0x10014004 0x00000000 0x10014004 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6[2] :: Qd 0x0488087c 0x0788387c Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6[2] :: Qd 0x04c70c6c 0x0687286c 0x0488087c 0x0788387c Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmull.s32 q7, d8, d3[1] :: Qd 0x7ffffffd 0x00000004 0x7ffffffd 0x00000004 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d3[1] :: Qd 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d3[1] :: Qd 0xece4e5e5 0x4c6c686c 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmull.s16 q4, d5, d6[1] :: Qd 0xffffbffc 0xe50b10cc 0xffffbffc 0xe50b10cc Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6[1] :: Qd 0x0488087c 0x0788387c Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6[1] :: Qd 0x04c70c6c 0x0687286c 0x0488087c 0x0788387c Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
vqdmull.s32 q7, d8, d3[0] :: Qd 0xfffffff4 0x00000000 0xfffffff4 0x00000000 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmull.s32 q7, d8, d3[0] :: Qd 0x00000001 0xb2ead2e8 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmull.s32 q7, d8, d3[0] :: Qd 0x00000001 0xca8a7288 0x00000001 0xb2ead2e8 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmull.s16 q4, d5, d6[2] :: Qd 0x04004000 0x003f83f8 0x04004000 0x003f83f8 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6[2] :: Qd 0x0488087c 0x0788387c Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6[2] :: Qd 0x04c70c6c 0x0687286c 0x0488087c 0x0788387c Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmull.s32 q7, d8, d3[1] :: Qd 0x7ffffffd 0x00000004 0x7ffffffd 0x00000004 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d3[1] :: Qd 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d3[1] :: Qd 0xece4e5e5 0x4c6c686c 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmull.s32 q10, d11, d15[1] :: Qd 0x00000000 0x00001680 0x00000000 0x00001680 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q10, d11, d15[1] :: Qd 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q10, d11, d15[1] :: Qd 0x00000011 0xe9687950 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmull.s32 q10, d30, d1[0] :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmull.s32 q10, d30, d1[0] :: Qd 0xede0e1e1 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s32 q10, d30, d1[0] :: Qd 0xece4e5e5 0x00000000 0xede0e1e1 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmull.s16 q10, d30, d1[1] :: Qd 0x7fffffff 0x00000000 0x7fffffff 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmull.s16 q10, d30, d1[1] :: Qd 0xede10000 0xe1e10000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s16 q10, d30, d1[1] :: Qd 0xece50000 0xe5e50000 0xede10000 0xe1e10000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmull.s32 q10, d30, d1[1] :: Qd 0xc0000000 0x00000000 0xc0000000 0x00000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s32 q10, d30, d1[1] :: Qd 0xede0e1e1 0x00000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s32 q10, d30, d1[1] :: Qd 0xece4e5e5 0x00000000 0xede0e1e1 0x00000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmull.s16 q10, d30, d1[3] :: Qd 0xc0000000 0x00000000 0xc0000000 0x00000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmull.s16 q10, d30, d1[3] :: Qd 0x090f8000 0x0f0f8000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmull.s16 q10, d30, d1[3] :: Qd 0x098d8000 0x0d0d8000 0x090f8000 0x0f0f8000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMLSL ----
vqdmlsl.s32 q0, d1, d2 :: Qd 0x00000017 0xffffe998 0x55555555 0x55553ed5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q0, d1, d2 :: Qd 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q0, d1, d2 :: Qd 0x131b1a09 0x28b6a4cf 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlsl.s32 q6, d7, d8 :: Qd 0x55555555 0x5555d895 0x55555555 0x5555d895 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlsl.s32 q6, d7, d8 :: Qd 0x55555566 0x52819265 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlsl.s32 q6, d7, d8 :: Qd 0x55555567 0x3ebdcea5 0x55555566 0x52819265 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmlsl.s16 q9, d11, d12 :: Qd 0x55555555 0x55528555 0x55555555 0x55528555 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlsl.s16 q9, d11, d12 :: Qd 0x55555555 0x55118f95 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlsl.s16 q9, d11, d12 :: Qd 0x55555555 0x551a9895 0x55555555 0x55118f95 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x45541551 0x55555555 0x45541551 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x4dcd1cd9 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x4ece2ce9 0x55555555 0x4dcd1cd9 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmlsl.s32 q7, d8, d9 :: Qd 0xd5555558 0x55555551 0xd5555558 0x55555551 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d9 :: Qd 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d9 :: Qd 0x68706f70 0x08e8ece9 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x704a4489 0x55555555 0x704a4489 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x4dcd1cd9 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x4ece2ce9 0x55555555 0x4dcd1cd9 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
vqdmlsl.s32 q7, d8, d9 :: Qd 0x55555561 0x55555555 0x55555561 0x55555555 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlsl.s32 q7, d8, d9 :: Qd 0x55555553 0xa26a826d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlsl.s32 q7, d8, d9 :: Qd 0x55555553 0x8acae2cd 0x55555553 0xa26a826d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x5515d15d 0x55555555 0x5515d15d Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x4dcd1cd9 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x4ece2ce9 0x55555555 0x4dcd1cd9 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmlsl.s32 q7, d8, d9 :: Qd 0xd5555558 0x55555551 0xd5555558 0x55555551 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d9 :: Qd 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d9 :: Qd 0x68706f70 0x08e8ece9 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlsl.s32 q10, d11, d15 :: Qd 0x55555555 0x55553ed5 0x55555555 0x55553ed5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q10, d11, d15 :: Qd 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q10, d11, d15 :: Qd 0x55555543 0x6becdc05 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlsl.s32 q10, d30, d31 :: Qd 0xd5555555 0x55555556 0xd5555555 0x55555556 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlsl.s32 q10, d30, d31 :: Qd 0x67747374 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlsl.s32 q10, d30, d31 :: Qd 0x68706f70 0x55555555 0x67747374 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlsl.s16 q10, d30, d31 :: Qd 0xd5555556 0x55555555 0xd5555556 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlsl.s16 q10, d30, d31 :: Qd 0x67745555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlsl.s16 q10, d30, d31 :: Qd 0x68705555 0x55555555 0x67745555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlsl.s32 q10, d30, d31 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlsl.s32 q10, d30, d31 :: Qd 0x67747374 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlsl.s32 q10, d30, d31 :: Qd 0x68706f70 0x55555555 0x67747374 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlsl.s16 q10, d30, d31 :: Qd 0x7fffffff 0x55555555 0x7fffffff 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 08000000
+vqdmlsl.s16 q10, d30, d31 :: Qd 0x4c45d555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmlsl.s16 q10, d30, d31 :: Qd 0x4bc7d555 0x55555555 0x4c45d555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMLSL (by scalar) ----
vqdmlsl.s32 q0, d1, d7[0] :: Qd 0x00000017 0xffffe998 0x55555555 0x55553ed5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q0, d1, d7[0] :: Qd 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q0, d1, d7[0] :: Qd 0x131b1a09 0x28b6a4cf 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlsl.s32 q6, d7, d6[0] :: Qd 0x55555555 0x5555d895 0x55555555 0x5555d895 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlsl.s32 q6, d7, d6[0] :: Qd 0x55555566 0x52819265 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlsl.s32 q6, d7, d6[0] :: Qd 0x55555567 0x3ebdcea5 0x55555566 0x52819265 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmlsl.s16 q9, d11, d7[2] :: Qd 0x55555555 0x55528555 0x55555555 0x55528555 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlsl.s16 q9, d11, d7[2] :: Qd 0x552c8f95 0x55118f95 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlsl.s16 q9, d11, d7[2] :: Qd 0x552a5895 0x551a9895 0x552c8f95 0x55118f95 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmlsl.s16 q4, d5, d6[2] :: Qd 0x55555555 0x45541551 0x55555555 0x45541551 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6[2] :: Qd 0x50cd4cd9 0x4dcd1cd9 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6[2] :: Qd 0x508e48e9 0x4ece2ce9 0x50cd4cd9 0x4dcd1cd9 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmlsl.s32 q7, d8, d3[1] :: Qd 0xd5555558 0x55555551 0xd5555558 0x55555551 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d3[1] :: Qd 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d3[1] :: Qd 0x68706f70 0x08e8ece9 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlsl.s16 q4, d5, d6[1] :: Qd 0x55559559 0x704a4489 0x55559559 0x704a4489 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6[1] :: Qd 0x50cd4cd9 0x4dcd1cd9 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6[1] :: Qd 0x508e48e9 0x4ece2ce9 0x50cd4cd9 0x4dcd1cd9 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
vqdmlsl.s32 q7, d8, d3[0] :: Qd 0x55555561 0x55555555 0x55555561 0x55555555 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlsl.s32 q7, d8, d3[0] :: Qd 0x55555553 0xa26a826d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlsl.s32 q7, d8, d3[0] :: Qd 0x55555553 0x8acae2cd 0x55555553 0xa26a826d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmlsl.s16 q4, d5, d6[2] :: Qd 0x51551555 0x5515d15d 0x51551555 0x5515d15d Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6[2] :: Qd 0x50cd4cd9 0x4dcd1cd9 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6[2] :: Qd 0x508e48e9 0x4ece2ce9 0x50cd4cd9 0x4dcd1cd9 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmlsl.s32 q7, d8, d3[1] :: Qd 0xd5555558 0x55555551 0xd5555558 0x55555551 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d3[1] :: Qd 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d3[1] :: Qd 0x68706f70 0x08e8ece9 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlsl.s32 q10, d11, d15[1] :: Qd 0x55555555 0x55553ed5 0x55555555 0x55553ed5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q10, d11, d15[1] :: Qd 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q10, d11, d15[1] :: Qd 0x55555543 0x6becdc05 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlsl.s32 q10, d30, d1[0] :: Qd 0xd5555555 0x55555556 0xd5555555 0x55555556 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlsl.s32 q10, d30, d1[0] :: Qd 0x67747374 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlsl.s32 q10, d30, d1[0] :: Qd 0x68706f70 0x55555555 0x67747374 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlsl.s16 q10, d30, d1[1] :: Qd 0xd5555556 0x55555555 0xd5555556 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlsl.s16 q10, d30, d1[1] :: Qd 0x67745555 0x73745555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlsl.s16 q10, d30, d1[1] :: Qd 0x68705555 0x6f705555 0x67745555 0x73745555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlsl.s32 q10, d30, d1[1] :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlsl.s32 q10, d30, d1[1] :: Qd 0x67747374 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlsl.s32 q10, d30, d1[1] :: Qd 0x68706f70 0x55555555 0x67747374 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlsl.s16 q10, d30, d1[3] :: Qd 0x7fffffff 0x55555555 0x7fffffff 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 08000000
+vqdmlsl.s16 q10, d30, d1[3] :: Qd 0x4c45d555 0x4645d555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmlsl.s16 q10, d30, d1[3] :: Qd 0x4bc7d555 0x4847d555 0x4c45d555 0x4645d555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMLAL ----
vqdmlal.s32 q0, d1, d2 :: Qd 0x00000018 0x00001698 0x55555555 0x55556bd5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q0, d1, d2 :: Qd 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q0, d1, d2 :: Qd 0x131b1a2c 0xfb87976f 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlal.s32 q6, d7, d8 :: Qd 0x55555555 0x5554d215 0x55555555 0x5554d215 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlal.s32 q6, d7, d8 :: Qd 0x55555544 0x58291845 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlal.s32 q6, d7, d8 :: Qd 0x55555543 0x6becdc05 0x55555544 0x58291845 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmlal.s16 q9, d11, d12 :: Qd 0x55555555 0x55582555 0x55555555 0x55582555 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlal.s16 q9, d11, d12 :: Qd 0x55555555 0x55991b15 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlal.s16 q9, d11, d12 :: Qd 0x55555555 0x55901215 0x55555555 0x55991b15 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x65569559 0x55555555 0x65569559 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x5cdd8dd1 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x5bdc7dc1 0x55555555 0x5cdd8dd1 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmlal.s32 q7, d8, d9 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqdmlal.s32 q7, d8, d9 :: Qd 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlal.s32 q7, d8, d9 :: Qd 0x423a3b3a 0xa1c1bdc1 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x3a606621 0x55555555 0x3a606621 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x5cdd8dd1 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x5bdc7dc1 0x55555555 0x5cdd8dd1 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
vqdmlal.s32 q7, d8, d9 :: Qd 0x55555549 0x55555555 0x55555549 0x55555555 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlal.s32 q7, d8, d9 :: Qd 0x55555557 0x0840283d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlal.s32 q7, d8, d9 :: Qd 0x55555557 0x1fdfc7dd 0x55555557 0x0840283d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x5594d94d 0x55555555 0x5594d94d Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x5cdd8dd1 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x5bdc7dc1 0x55555555 0x5cdd8dd1 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmlal.s32 q7, d8, d9 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqdmlal.s32 q7, d8, d9 :: Qd 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlal.s32 q7, d8, d9 :: Qd 0x423a3b3a 0xa1c1bdc1 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlal.s32 q10, d11, d15 :: Qd 0x55555555 0x55556bd5 0x55555555 0x55556bd5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q10, d11, d15 :: Qd 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q10, d11, d15 :: Qd 0x55555567 0x3ebdcea5 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlal.s32 q10, d30, d31 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlal.s32 q10, d30, d31 :: Qd 0x43363736 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s32 q10, d30, d31 :: Qd 0x423a3b3a 0x55555555 0x43363736 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlal.s16 q10, d30, d31 :: Qd 0x7fffffff 0x55555555 0x7fffffff 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlal.s16 q10, d30, d31 :: Qd 0x43365555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s16 q10, d30, d31 :: Qd 0x423a5555 0x55555555 0x43365555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlal.s32 q10, d30, d31 :: Qd 0x15555555 0x55555555 0x15555555 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s32 q10, d30, d31 :: Qd 0x43363736 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s32 q10, d30, d31 :: Qd 0x423a3b3a 0x55555555 0x43363736 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlal.s16 q10, d30, d31 :: Qd 0x15555555 0x55555555 0x15555555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmlal.s16 q10, d30, d31 :: Qd 0x5e64d555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmlal.s16 q10, d30, d31 :: Qd 0x5ee2d555 0x55555555 0x5e64d555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMLAL (by scalar) ----
vqdmlal.s32 q0, d1, d7[0] :: Qd 0x00000018 0x00001698 0x55555555 0x55556bd5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q0, d1, d7[0] :: Qd 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q0, d1, d7[0] :: Qd 0x131b1a2c 0xfb87976f 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlal.s32 q6, d7, d6[0] :: Qd 0x55555555 0x5554d215 0x55555555 0x5554d215 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlal.s32 q6, d7, d6[0] :: Qd 0x55555544 0x58291845 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlal.s32 q6, d7, d6[0] :: Qd 0x55555543 0x6becdc05 0x55555544 0x58291845 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmlal.s16 q9, d11, d7[2] :: Qd 0x55555555 0x55582555 0x55555555 0x55582555 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlal.s16 q9, d11, d7[2] :: Qd 0x557e1b15 0x55991b15 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlal.s16 q9, d11, d7[2] :: Qd 0x55805215 0x55901215 0x557e1b15 0x55991b15 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmlal.s16 q4, d5, d6[2] :: Qd 0x55555555 0x65569559 0x55555555 0x65569559 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6[2] :: Qd 0x59dd5dd1 0x5cdd8dd1 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6[2] :: Qd 0x5a1c61c1 0x5bdc7dc1 0x59dd5dd1 0x5cdd8dd1 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmlal.s32 q7, d8, d3[1] :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqdmlal.s32 q7, d8, d3[1] :: Qd 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlal.s32 q7, d8, d3[1] :: Qd 0x423a3b3a 0xa1c1bdc1 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlal.s16 q4, d5, d6[1] :: Qd 0x55551551 0x3a606621 0x55551551 0x3a606621 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6[1] :: Qd 0x59dd5dd1 0x5cdd8dd1 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6[1] :: Qd 0x5a1c61c1 0x5bdc7dc1 0x59dd5dd1 0x5cdd8dd1 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
vqdmlal.s32 q7, d8, d3[0] :: Qd 0x55555549 0x55555555 0x55555549 0x55555555 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlal.s32 q7, d8, d3[0] :: Qd 0x55555557 0x0840283d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlal.s32 q7, d8, d3[0] :: Qd 0x55555557 0x1fdfc7dd 0x55555557 0x0840283d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmlal.s16 q4, d5, d6[2] :: Qd 0x59559555 0x5594d94d 0x59559555 0x5594d94d Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6[2] :: Qd 0x59dd5dd1 0x5cdd8dd1 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6[2] :: Qd 0x5a1c61c1 0x5bdc7dc1 0x59dd5dd1 0x5cdd8dd1 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmlal.s32 q7, d8, d3[1] :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqdmlal.s32 q7, d8, d3[1] :: Qd 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlal.s32 q7, d8, d3[1] :: Qd 0x423a3b3a 0xa1c1bdc1 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlal.s32 q10, d11, d15[1] :: Qd 0x55555555 0x55556bd5 0x55555555 0x55556bd5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q10, d11, d15[1] :: Qd 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q10, d11, d15[1] :: Qd 0x55555567 0x3ebdcea5 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlal.s32 q10, d30, d1[0] :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlal.s32 q10, d30, d1[0] :: Qd 0x43363736 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s32 q10, d30, d1[0] :: Qd 0x423a3b3a 0x55555555 0x43363736 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlal.s16 q10, d30, d1[1] :: Qd 0x7fffffff 0x55555555 0x7fffffff 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlal.s16 q10, d30, d1[1] :: Qd 0x43365555 0x37365555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s16 q10, d30, d1[1] :: Qd 0x423a5555 0x3b3a5555 0x43365555 0x37365555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlal.s32 q10, d30, d1[1] :: Qd 0x15555555 0x55555555 0x15555555 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s32 q10, d30, d1[1] :: Qd 0x43363736 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s32 q10, d30, d1[1] :: Qd 0x423a3b3a 0x55555555 0x43363736 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlal.s16 q10, d30, d1[3] :: Qd 0x15555555 0x55555555 0x15555555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmlal.s16 q10, d30, d1[3] :: Qd 0x5e64d555 0x6464d555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmlal.s16 q10, d30, d1[3] :: Qd 0x5ee2d555 0x6262d555 0x5e64d555 0x6464d555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMULH ----
vqdmulh.s32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q0, q1, q2 :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q0, q1, q2 :: Qd 0x00000013 0x00000012 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 q6, q7, q8 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmulh.s32 q6, q7, q8 :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmulh.s32 q6, q7, q8 :: Qd 0xffffffec 0xffffffed 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmulh.s16 q9, q11, q12 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmulh.s16 q9, q11, q12 :: Qd 0x0000003a 0x00000043 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmulh.s16 q9, q11, q12 :: Qd 0x00000038 0x00000045 0x0000003a 0x00000043 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmulh.s16 q4, q5, q6 :: Qd 0x00001001 0x00001001 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, q6 :: Qd 0x00000687 0x00000788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, q6 :: Qd 0x00000647 0x000007c7 0x00000687 0x00000788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 q7, q8, q9 :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, q9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, q9 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s16 q4, q5, q6 :: Qd 0x0000e50b 0x0000e50b 0x0000e50b 0x0000e50b Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, q6 :: Qd 0x00000687 0x00000788 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, q6 :: Qd 0x00000647 0x000007c7 0x00000687 0x00000788 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 q7, q8, q9 :: Qd 0xfffffff4 0xfffffff4 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmulh.s32 q7, q8, q9 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmulh.s32 q7, q8, q9 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmulh.s16 q4, q5, q6 :: Qd 0x0000003f 0x0000003f 0x0000003f 0x0000003f Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, q6 :: Qd 0x00000687 0x00000788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, q6 :: Qd 0x00000647 0x000007c7 0x00000687 0x00000788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 q7, q8, q9 :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, q9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, q9 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s32 q10, q11, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q10, q11, q15 :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q10, q11, q15 :: Qd 0x00000013 0x00000012 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 q10, q14, q15 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmulh.s32 q10, q14, q15 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 q10, q14, q15 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 q10, q14, q15 :: Qd 0x7fff0000 0x7fff0000 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmulh.s16 q10, q14, q15 :: Qd 0xece50000 0xede10000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s16 q10, q14, q15 :: Qd 0xeae30000 0xebe40000 0xece50000 0xede10000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s32 q10, q14, q15 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 q10, q14, q15 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 q10, q14, q15 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 q10, q14, q15 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmulh.s16 q10, q14, q15 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmulh.s16 q10, q14, q15 :: Qd 0x0a8e0000 0x0a0e0000 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMULH (by scalar) ----
vqdmulh.s32 q0, q1, d6[0] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q0, q1, d6[0] :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q0, q1, d6[0] :: Qd 0x00000013 0x00000012 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 q6, q7, d1[1] :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmulh.s32 q6, q7, d1[1] :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmulh.s32 q6, q7, d1[1] :: Qd 0xffffffec 0xffffffed 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmulh.s16 q9, q11, d7[0] :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmulh.s16 q9, q11, d7[0] :: Qd 0x002a003a 0x00280043 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmulh.s16 q9, q11, d7[0] :: Qd 0x002f0038 0x002d0045 0x002a003a 0x00280043 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmulh.s16 q4, q5, d6[0] :: Qd 0x00001001 0x00001001 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, d6[0] :: Qd 0x04c70687 0x04880788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, d6[0] :: Qd 0x05470647 0x050707c7 0x04c70687 0x04880788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 q7, q8, d9[1] :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, d9[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, d9[1] :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s16 q4, q5, d6[1] :: Qd 0xffffe50b 0xffffe50b 0xffffe50b 0xffffe50b Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, d6[1] :: Qd 0x04c70687 0x04880788 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, d6[1] :: Qd 0x05470647 0x050707c7 0x04c70687 0x04880788 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
vqdmulh.s32 q7, q8, d9[0] :: Qd 0xfffffff4 0xfffffff4 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmulh.s32 q7, q8, d9[0] :: Qd 0x00000001 0x00000001 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmulh.s32 q7, q8, d9[0] :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmulh.s16 q4, q5, d6[2] :: Qd 0x0400003f 0x0400003f 0x0400003f 0x0400003f Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, d6[2] :: Qd 0x04c70687 0x04880788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, d6[2] :: Qd 0x05470647 0x050707c7 0x04c70687 0x04880788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 q7, q8, d9[0] :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, d9[0] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, d9[0] :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s32 q10, q11, d15[0] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q10, q11, d15[0] :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q10, q11, d15[0] :: Qd 0x00000013 0x00000012 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 q10, q14, d15[1] :: Qd 0xffffff88 0xffffff88 0xffffff88 0xffffff88 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 q10, q14, d15[1] :: Qd 0x00000011 0x00000010 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 q10, q14, d15[1] :: Qd 0x00000013 0x00000012 0x00000011 0x00000010 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 q10, q14, d7[3] :: Qd 0x7fff0000 0x7fff0000 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmulh.s16 q10, q14, d7[3] :: Qd 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s16 q10, q14, d7[3] :: Qd 0xeae3e6e3 0xebe4e0e4 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s32 q10, q14, d15[1] :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 q10, q14, d15[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 q10, q14, d15[1] :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 q10, q14, d7[1] :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmulh.s16 q10, q14, d7[1] :: Qd 0x098d0d0d 0x090f0f0f Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmulh.s16 q10, q14, d7[1] :: Qd 0x0a8e0c8e 0x0a0e0f8e 0x098d0d0d 0x090f0f0f Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VSHL (immediate) ----
vshl.i64 q0, q1, #1 :: Qd 0x00000030 0x00000030 0x00000030 0x00000030 Qm (i32)0x00000018
+vshl.i64 q0, q1, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i32)0x00000018
vshl.i64 q5, q2, #1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i64 q5, q2, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i32)0x40000000
vshl.i64 q9, q12, #2 :: Qd 0x0000000a 0x00000008 0x0000000a 0x00000008 Qm (i32)0x80000002
+vshl.i64 q9, q12, #2 :: Qd 0x98b4b4a8 0x94a8b8ac 0x90b0acac 0x8cbcb8bc Qm (i32)0x80000002
vshl.i64 q11, q2, #12 :: Qd 0xffffffff 0xfffff000 0xffffffff 0xfffff000 Qm (i32)0xffffffff
+vshl.i64 q11, q2, #12 :: Qd 0xd2d2a252 0xa2e2b000 0xc2b2b232 0xf2e2f000 Qm (i32)0xffffffff
+vshl.i64 q15, q12, #63 :: Qd 0x80000000 0x00000000 0x80000000 0x00000000 Qm (i32)0x00000005
vshl.i64 q15, q12, #63 :: Qd 0x80000000 0x00000000 0x80000000 0x00000000 Qm (i32)0x00000005
vshl.i64 q5, q12, #62 :: Qd 0x40000000 0x00000000 0x40000000 0x00000000 Qm (i32)0x80000001
+vshl.i64 q5, q12, #62 :: Qd 0xc0000000 0x00000000 0xc0000000 0x00000000 Qm (i32)0x80000001
vshl.i32 q0, q1, #1 :: Qd 0x00000030 0x00000030 0x00000030 0x00000030 Qm (i32)0x00000018
+vshl.i32 q0, q1, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i32)0x00000018
vshl.i32 q5, q2, #1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i32 q5, q2, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i32)0x40000000
vshl.i32 q9, q12, #2 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x80000002
+vshl.i32 q9, q12, #2 :: Qd 0x98b4b4a8 0x94a8b8ac 0x90b0acac 0x8cbcb8bc Qm (i32)0x80000002
vshl.i32 q11, q2, #12 :: Qd 0xfffff000 0xfffff000 0xfffff000 0xfffff000 Qm (i32)0xffffffff
+vshl.i32 q11, q2, #12 :: Qd 0xd2d2a000 0xa2e2b000 0xc2b2b000 0xf2e2f000 Qm (i32)0xffffffff
vshl.i32 q15, q12, #20 :: Qd 0x00500000 0x00500000 0x00500000 0x00500000 Qm (i32)0x00000005
+vshl.i32 q15, q12, #20 :: Qd 0xd2a00000 0xe2b00000 0xb2b00000 0xe2f00000 Qm (i32)0x00000005
vshl.i32 q5, q12, #30 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x80000001
+vshl.i32 q5, q12, #30 :: Qd 0x80000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000001
vshl.i16 q0, q1, #1 :: Qd 0x00300030 0x00300030 0x00300030 0x00300030 Qm (i16)0x00000018
+vshl.i16 q0, q1, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i16)0x00000018
vshl.i16 q5, q2, #1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i16 q5, q2, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i32)0x40000000
vshl.i16 q9, q12, #2 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x80000002
+vshl.i16 q9, q12, #2 :: Qd 0x98b4b4a8 0x94a8b8ac 0x90b0acac 0x8cbcb8bc Qm (i32)0x80000002
vshl.i16 q11, q2, #12 :: Qd 0xf000f000 0xf000f000 0xf000f000 0xf000f000 Qm (i16)0xffffffff
+vshl.i16 q11, q2, #12 :: Qd 0xd000a000 0xa000b000 0xc000b000 0xf000f000 Qm (i16)0xffffffff
vshl.i16 q15, q12, #3 :: Qd 0x00280028 0x00280028 0x00280028 0x00280028 Qm (i16)0x00000005
+vshl.i16 q15, q12, #3 :: Qd 0x31686950 0x29507158 0x21605958 0x19787178 Qm (i16)0x00000005
vshl.i16 q5, q12, #14 :: Qd 0x00004000 0x00004000 0x00004000 0x00004000 Qm (i32)0x80000001
+vshl.i16 q5, q12, #14 :: Qd 0x40008000 0x8000c000 0x0000c000 0xc000c000 Qm (i32)0x80000001
vshl.i8 q0, q1, #1 :: Qd 0x30303030 0x30303030 0x30303030 0x30303030 Qm (i8)0x00000018
+vshl.i8 q0, q1, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i8)0x00000018
vshl.i8 q5, q2, #1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i8 q5, q2, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i32)0x40000000
vshl.i8 q9, q12, #2 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x80000002
+vshl.i8 q9, q12, #2 :: Qd 0x98b4b4a8 0x94a8b8ac 0x90b0acac 0x8cbcb8bc Qm (i32)0x80000002
vshl.i8 q11, q2, #7 :: Qd 0x80808080 0x80808080 0x80808080 0x80808080 Qm (i8)0xffffffff
+vshl.i8 q11, q2, #7 :: Qd 0x00808000 0x80000080 0x00008080 0x80800080 Qm (i8)0xffffffff
vshl.i8 q15, q12, #3 :: Qd 0x28282828 0x28282828 0x28282828 0x28282828 Qm (i8)0x00000005
+vshl.i8 q15, q12, #3 :: Qd 0x30686850 0x28507058 0x20605858 0x18787078 Qm (i8)0x00000005
vshl.i8 q5, q12, #6 :: Qd 0x00000040 0x00000040 0x00000040 0x00000040 Qm (i32)0x80000001
+vshl.i8 q5, q12, #6 :: Qd 0x80404080 0x408080c0 0x0000c0c0 0xc0c080c0 Qm (i32)0x80000001
---- VNEG ----
vneg.s32 q0, q1 :: Qd 0xffffff8d 0xffffff8d 0xffffff8d 0xffffff8d Qm (i32)0x00000073
+vneg.s32 q0, q1 :: Qd 0xd9d2d2d6 0xdad5d1d5 0xdbd3d4d5 0xdcd0d1d1 Qm (i32)0x00000073
vneg.s16 q15, q4 :: Qd 0x0000ff8d 0x0000ff8d 0x0000ff8d 0x0000ff8d Qm (i32)0x00000073
+vneg.s16 q15, q4 :: Qd 0xd9d3d2d6 0xdad6d1d5 0xdbd4d4d5 0xdcd1d1d1 Qm (i32)0x00000073
vneg.s8 q8, q7 :: Qd 0x0000008d 0x0000008d 0x0000008d 0x0000008d Qm (i32)0x00000073
+vneg.s8 q8, q7 :: Qd 0xdad3d3d6 0xdbd6d2d5 0xdcd4d5d5 0xddd1d2d1 Qm (i32)0x00000073
vneg.s32 q0, q1 :: Qd 0xffffff02 0xffffff02 0xffffff02 0xffffff02 Qm (i32)0x000000fe
+vneg.s32 q0, q1 :: Qd 0xd9d2d2d6 0xdad5d1d5 0xdbd3d4d5 0xdcd0d1d1 Qm (i32)0x000000fe
vneg.s16 q15, q4 :: Qd 0x0000ff11 0x0000ff11 0x0000ff11 0x0000ff11 Qm (i32)0x000000ef
+vneg.s16 q15, q4 :: Qd 0xd9d3d2d6 0xdad6d1d5 0xdbd4d4d5 0xdcd1d1d1 Qm (i32)0x000000ef
vneg.s8 q8, q7 :: Qd 0x00000022 0x00000022 0x00000022 0x00000022 Qm (i32)0x000000de
+vneg.s8 q8, q7 :: Qd 0xdad3d3d6 0xdbd6d2d5 0xdcd4d5d5 0xddd1d2d1 Qm (i32)0x000000de
vneg.s32 q0, q1 :: Qd 0x01f501f6 0x01f501f6 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a
+vneg.s32 q0, q1 :: Qd 0xd9d2d2d6 0xdad5d1d5 0xdbd3d4d5 0xdcd0d1d1 Qm (i16)0x0000fe0a
vneg.s16 q15, q4 :: Qd 0x10f510f5 0x10f510f5 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b
+vneg.s16 q15, q4 :: Qd 0xd9d3d2d6 0xdad6d1d5 0xdbd4d4d5 0xdcd1d1d1 Qm (i16)0x0000ef0b
vneg.s8 q8, q7 :: Qd 0x22f422f4 0x22f422f4 0x22f422f4 0x22f422f4 Qm (i16)0x0000de0c
+vneg.s8 q8, q7 :: Qd 0xdad3d3d6 0xdbd6d2d5 0xdcd4d5d5 0xddd1d2d1 Qm (i16)0x0000de0c
---- VQNEG ----
vqneg.s32 q0, q1 :: Qd 0xffffff8d 0xffffff8d 0xffffff8d 0xffffff8d Qm (i32)0x00000073 fpscr: 00000000
+vqneg.s32 q0, q1 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x00000073 fpscr: 00000000
vqneg.s32 q0, q1 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x80000000 fpscr: 08000000
+vqneg.s32 q0, q1 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 fpscr: 00000000
vqneg.s16 q0, q1 :: Qd 0x7fff0000 0x7fff0000 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 fpscr: 08000000
+vqneg.s16 q0, q1 :: Qd 0xeae3e6e3 0xebe4e0e4 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 fpscr: 00000000
vqneg.s8 q0, q1 :: Qd 0x7f000000 0x7f000000 0x7f000000 0x7f000000 Qm (i32)0x80000000 fpscr: 08000000
+vqneg.s8 q0, q1 :: Qd 0xebe3e7e3 0xece4e1e4 0xede5e6e5 0xeee1e2e1 Qm (i32)0x80000000 fpscr: 00000000
vqneg.s16 q15, q4 :: Qd 0x0000ff8d 0x0000ff8d 0x0000ff8d 0x0000ff8d Qm (i32)0x00000073 fpscr: 00000000
+vqneg.s16 q15, q4 :: Qd 0xeae3e6e3 0xebe4e0e4 0xece5e5e5 0xede1e1e1 Qm (i32)0x00000073 fpscr: 00000000
vqneg.s8 q8, q7 :: Qd 0x0000008d 0x0000008d 0x0000008d 0x0000008d Qm (i32)0x00000073 fpscr: 00000000
+vqneg.s8 q8, q7 :: Qd 0xebe3e7e3 0xece4e1e4 0xede5e6e5 0xeee1e2e1 Qm (i32)0x00000073 fpscr: 00000000
vqneg.s32 q0, q1 :: Qd 0xffffff02 0xffffff02 0xffffff02 0xffffff02 Qm (i32)0x000000fe fpscr: 00000000
+vqneg.s32 q0, q1 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x000000fe fpscr: 00000000
vqneg.s16 q15, q4 :: Qd 0x0000ff11 0x0000ff11 0x0000ff11 0x0000ff11 Qm (i32)0x000000ef fpscr: 00000000
+vqneg.s16 q15, q4 :: Qd 0xeae3e6e3 0xebe4e0e4 0xece5e5e5 0xede1e1e1 Qm (i32)0x000000ef fpscr: 00000000
vqneg.s8 q8, q7 :: Qd 0x00000022 0x00000022 0x00000022 0x00000022 Qm (i32)0x000000de fpscr: 00000000
+vqneg.s8 q8, q7 :: Qd 0xebe3e7e3 0xece4e1e4 0xede5e6e5 0xeee1e2e1 Qm (i32)0x000000de fpscr: 00000000
vqneg.s32 q0, q1 :: Qd 0x01f501f6 0x01f501f6 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a fpscr: 00000000
+vqneg.s32 q0, q1 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i16)0x0000fe0a fpscr: 00000000
vqneg.s16 q15, q4 :: Qd 0x10f510f5 0x10f510f5 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b fpscr: 00000000
+vqneg.s16 q15, q4 :: Qd 0xeae3e6e3 0xebe4e0e4 0xece5e5e5 0xede1e1e1 Qm (i16)0x0000ef0b fpscr: 00000000
vqneg.s8 q8, q7 :: Qd 0x22f422f4 0x22f422f4 0x22f422f4 0x22f422f4 Qm (i16)0x0000de0c fpscr: 00000000
+vqneg.s8 q8, q7 :: Qd 0xebe3e7e3 0xece4e1e4 0xede5e6e5 0xeee1e2e1 Qm (i16)0x0000de0c fpscr: 00000000
---- VREV ----
vrev64.8 q0, q1 :: Qd 0xddccbbaa 0xddccbbaa 0xddccbbaa 0xddccbbaa Qm (i32)0xaabbccdd
+vrev64.8 q0, q1 :: Qd 0x2b2e2a25 0x2a2d2d26 0x2f2e2f23 0x2b2b2c24 Qm (i32)0xaabbccdd
vrev64.16 q10, q15 :: Qd 0xccddaabb 0xccddaabb 0xccddaabb 0xccddaabb Qm (i32)0xaabbccdd
+vrev64.16 q10, q15 :: Qd 0x2e2b252a 0x2d2a262d 0x2e2f232f 0x2b2b242c Qm (i32)0xaabbccdd
vrev64.32 q1, q14 :: Qd 0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Qm (i32)0xaabbccdd
+vrev64.32 q1, q14 :: Qd 0x252a2e2b 0x262d2d2a 0x232f2e2f 0x242c2b2b Qm (i32)0xaabbccdd
vrev32.8 q0, q1 :: Qd 0xddccbbaa 0xddccbbaa 0xddccbbaa 0xddccbbaa Qm (i32)0xaabbccdd
+vrev32.8 q0, q1 :: Qd 0x2a2d2d26 0x2b2e2a25 0x2b2b2c24 0x2f2e2f23 Qm (i32)0xaabbccdd
vrev32.16 q10, q15 :: Qd 0xccddaabb 0xccddaabb 0xccddaabb 0xccddaabb Qm (i32)0xaabbccdd
+vrev32.16 q10, q15 :: Qd 0x2d2a262d 0x2e2b252a 0x2b2b242c 0x2e2f232f Qm (i32)0xaabbccdd
vrev16.8 q0, q1 :: Qd 0xbbaaddcc 0xbbaaddcc 0xbbaaddcc 0xbbaaddcc Qm (i32)0xaabbccdd
+vrev16.8 q0, q1 :: Qd 0x2d262a2d 0x2a252b2e 0x2c242b2b 0x2f232f2e Qm (i32)0xaabbccdd
---- VSHLL ----
vshll.s32 q0, d1, #1 :: Qd 0x00000000 0x00000030 0x00000000 0x00000030 Qm (i32)0x00000018
+vshll.s32 q0, d1, #1 :: Qd 0x00000000 0x48585656 0x00000000 0x465e5c5e Qm (i32)0x00000018
vshll.s32 q5, d2, #1 :: Qd 0x00000000 0x80000000 0x00000000 0x80000000 Qm (i32)0x40000000
+vshll.s32 q5, d2, #1 :: Qd 0x00000000 0x48585656 0x00000000 0x465e5c5e Qm (i32)0x40000000
vshll.s32 q9, d12, #2 :: Qd 0xfffffffe 0x00000008 0xfffffffe 0x00000008 Qm (i32)0x80000002
+vshll.s32 q9, d12, #2 :: Qd 0x00000000 0x90b0acac 0x00000000 0x8cbcb8bc Qm (i32)0x80000002
vshll.u32 q11, d2, #12 :: Qd 0x00000fff 0xfffff000 0x00000fff 0xfffff000 Qm (i32)0xffffffff
+vshll.u32 q11, d2, #12 :: Qd 0x00000242 0xc2b2b000 0x00000232 0xf2e2f000 Qm (i32)0xffffffff
vshll.u32 q15, d12, #20 :: Qd 0x00000000 0x00500000 0x00000000 0x00500000 Qm (i32)0x00000005
+vshll.u32 q15, d12, #20 :: Qd 0x000242c2 0xb2b00000 0x000232f2 0xe2f00000 Qm (i32)0x00000005
vshll.u32 q5, d22, #30 :: Qd 0x20000000 0x40000000 0x20000000 0x40000000 Qm (i32)0x80000001
+vshll.u32 q5, d22, #30 :: Qd 0x090b0aca 0xc0000000 0x08cbcb8b 0xc0000000 Qm (i32)0x80000001
vshll.s16 q0, d1, #1 :: Qd 0x00000030 0x00000030 0x00000030 0x00000030 Qm (i16)0x00000018
+vshll.s16 q0, d1, #1 :: Qd 0x00004858 0x00005656 0x0000465e 0x00005c5e Qm (i16)0x00000018
vshll.s16 q5, d2, #1 :: Qd 0x00008000 0x00000000 0x00008000 0x00000000 Qm (i32)0x40000000
+vshll.s16 q5, d2, #1 :: Qd 0x00004858 0x00005656 0x0000465e 0x00005c5e Qm (i32)0x40000000
vshll.s16 q9, d12, #2 :: Qd 0xfffe0000 0x00000008 0xfffe0000 0x00000008 Qm (i32)0x80000002
+vshll.s16 q9, d12, #2 :: Qd 0x000090b0 0x0000acac 0x00008cbc 0x0000b8bc Qm (i32)0x80000002
vshll.u16 q11, d2, #12 :: Qd 0x0ffff000 0x0ffff000 0x0ffff000 0x0ffff000 Qm (i16)0xffffffff
+vshll.u16 q11, d2, #12 :: Qd 0x0242c000 0x02b2b000 0x0232f000 0x02e2f000 Qm (i16)0xffffffff
vshll.u16 q15, d22, #3 :: Qd 0x00000028 0x00000028 0x00000028 0x00000028 Qm (i16)0x00000005
+vshll.u16 q15, d22, #3 :: Qd 0x00012160 0x00015958 0x00011978 0x00017178 Qm (i16)0x00000005
vshll.u16 q5, d12, #14 :: Qd 0x20000000 0x00004000 0x20000000 0x00004000 Qm (i32)0x80000001
+vshll.u16 q5, d12, #14 :: Qd 0x090b0000 0x0acac000 0x08cbc000 0x0b8bc000 Qm (i32)0x80000001
vshll.s8 q0, d1, #1 :: Qd 0x00300030 0x00300030 0x00300030 0x00300030 Qm (i8)0x00000018
+vshll.s8 q0, d1, #1 :: Qd 0x00480058 0x00560056 0x0046005e 0x005c005e Qm (i8)0x00000018
vshll.s8 q5, d2, #1 :: Qd 0x00800000 0x00000000 0x00800000 0x00000000 Qm (i32)0x40000000
+vshll.s8 q5, d2, #1 :: Qd 0x00480058 0x00560056 0x0046005e 0x005c005e Qm (i32)0x40000000
vshll.s8 q9, d12, #2 :: Qd 0xfe000000 0x00000008 0xfe000000 0x00000008 Qm (i32)0x80000002
+vshll.s8 q9, d12, #2 :: Qd 0x009000b0 0x00ac00ac 0x008c00bc 0x00b800bc Qm (i32)0x80000002
vshll.u8 q11, d2, #7 :: Qd 0x7f807f80 0x7f807f80 0x7f807f80 0x7f807f80 Qm (i8)0xffffffff
+vshll.u8 q11, d2, #7 :: Qd 0x12001600 0x15801580 0x11801780 0x17001780 Qm (i8)0xffffffff
vshll.u8 q15, d19, #3 :: Qd 0x00280028 0x00280028 0x00280028 0x00280028 Qm (i8)0x00000005
+vshll.u8 q15, d19, #3 :: Qd 0x01200160 0x01580158 0x01180178 0x01700178 Qm (i8)0x00000005
vshll.u8 q5, d12, #6 :: Qd 0x20000000 0x00000040 0x20000000 0x00000040 Qm (i32)0x80000001
+vshll.u8 q5, d12, #6 :: Qd 0x09000b00 0x0ac00ac0 0x08c00bc0 0x0b800bc0 Qm (i32)0x80000001
---- VSHLL (max shift) ----
vshll.i32 q0, d1, #32 :: Qd 0x00000018 0x00000000 0x00000018 0x00000000 Qm (i32)0x00000018
+vshll.i32 q0, d1, #32 :: Qd 0x242c2b2b 0x00000000 0x232f2e2f 0x00000000 Qm (i32)0x00000018
vshll.i32 q5, d2, #32 :: Qd 0x40000000 0x00000000 0x40000000 0x00000000 Qm (i32)0x40000000
+vshll.i32 q5, d2, #32 :: Qd 0x242c2b2b 0x00000000 0x232f2e2f 0x00000000 Qm (i32)0x40000000
vshll.i32 q11, d2, #32 :: Qd 0xffffffff 0x00000000 0xffffffff 0x00000000 Qm (i32)0xffffffff
+vshll.i32 q11, d2, #32 :: Qd 0x242c2b2b 0x00000000 0x232f2e2f 0x00000000 Qm (i32)0xffffffff
vshll.i32 q15, d12, #32 :: Qd 0x00000005 0x00000000 0x00000005 0x00000000 Qm (i32)0x00000005
+vshll.i32 q15, d12, #32 :: Qd 0x242c2b2b 0x00000000 0x232f2e2f 0x00000000 Qm (i32)0x00000005
vshll.i16 q0, d1, #16 :: Qd 0x00180000 0x00180000 0x00180000 0x00180000 Qm (i16)0x00000018
+vshll.i16 q0, d1, #16 :: Qd 0x242c0000 0x2b2b0000 0x232f0000 0x2e2f0000 Qm (i16)0x00000018
vshll.i16 q5, d2, #16 :: Qd 0x40000000 0x00000000 0x40000000 0x00000000 Qm (i32)0x40000000
+vshll.i16 q5, d2, #16 :: Qd 0x242c0000 0x2b2b0000 0x232f0000 0x2e2f0000 Qm (i32)0x40000000
vshll.i16 q11, d2, #16 :: Qd 0xffff0000 0xffff0000 0xffff0000 0xffff0000 Qm (i16)0xffffffff
+vshll.i16 q11, d2, #16 :: Qd 0x242c0000 0x2b2b0000 0x232f0000 0x2e2f0000 Qm (i16)0xffffffff
vshll.i16 q15, d22, #16 :: Qd 0x00050000 0x00050000 0x00050000 0x00050000 Qm (i16)0x00000005
+vshll.i16 q15, d22, #16 :: Qd 0x242c0000 0x2b2b0000 0x232f0000 0x2e2f0000 Qm (i16)0x00000005
vshll.i8 q0, d1, #8 :: Qd 0x18001800 0x18001800 0x18001800 0x18001800 Qm (i8)0x00000018
+vshll.i8 q0, d1, #8 :: Qd 0x24002c00 0x2b002b00 0x23002f00 0x2e002f00 Qm (i8)0x00000018
vshll.i8 q5, d2, #8 :: Qd 0x40000000 0x00000000 0x40000000 0x00000000 Qm (i32)0x40000000
+vshll.i8 q5, d2, #8 :: Qd 0x24002c00 0x2b002b00 0x23002f00 0x2e002f00 Qm (i32)0x40000000
vshll.i8 q11, d2, #8 :: Qd 0xff00ff00 0xff00ff00 0xff00ff00 0xff00ff00 Qm (i8)0xffffffff
+vshll.i8 q11, d2, #8 :: Qd 0x24002c00 0x2b002b00 0x23002f00 0x2e002f00 Qm (i8)0xffffffff
vshll.i8 q15, d19, #8 :: Qd 0x05000500 0x05000500 0x05000500 0x05000500 Qm (i8)0x00000005
+vshll.i8 q15, d19, #8 :: Qd 0x24002c00 0x2b002b00 0x23002f00 0x2e002f00 Qm (i8)0x00000005
---- VMULL ----
vmull.s8 q0, d1, d12 :: Qd 0x0000fe0c 0x01980d94 0x0000fe0c 0x01980d94 Qm (i32)0x000abcd4 Qn (i32)0x00cefab1
vmull.s8 q9, d11, d12 :: Qd 0x00000000 0x00010800 0x00000000 0x00010800 Qm (i32)0x00000140 Qn (i32)0x00000120
vmlsl.u32 q10, d30, d31 :: Qd 0x35555555 0x55555555 0x35555555 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000
---- VQRDMULH ----
vqrdmulh.s32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q0, q1, q2 :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q0, q1, q2 :: Qd 0x00000014 0x00000013 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 q6, q7, q8 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqrdmulh.s32 q6, q7, q8 :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqrdmulh.s32 q6, q7, q8 :: Qd 0xffffffec 0xffffffed 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqrdmulh.s16 q9, q11, q12 :: Qd 0x00000003 0x00000003 0x00000003 0x00000003 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqrdmulh.s16 q9, q11, q12 :: Qd 0x0000003b 0x00000044 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqrdmulh.s16 q9, q11, q12 :: Qd 0x00000039 0x00000046 0x0000003b 0x00000044 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqrdmulh.s16 q4, q5, q6 :: Qd 0x00001001 0x00001001 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, q6 :: Qd 0x00000687 0x00000788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, q6 :: Qd 0x00000648 0x000007c7 0x00000687 0x00000788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 q7, q8, q9 :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, q9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, q9 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s16 q4, q5, q6 :: Qd 0x0000e50b 0x0000e50b 0x0000e50b 0x0000e50b Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, q6 :: Qd 0x00000687 0x00000788 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, q6 :: Qd 0x00000648 0x000007c7 0x00000687 0x00000788 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 q7, q8, q9 :: Qd 0xfffffff4 0xfffffff4 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqrdmulh.s32 q7, q8, q9 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqrdmulh.s32 q7, q8, q9 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqrdmulh.s16 q4, q5, q6 :: Qd 0x00000040 0x00000040 0x00000040 0x00000040 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, q6 :: Qd 0x00000687 0x00000788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, q6 :: Qd 0x00000648 0x000007c7 0x00000687 0x00000788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 q7, q8, q9 :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, q9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, q9 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s32 q10, q11, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q10, q11, q15 :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q10, q11, q15 :: Qd 0x00000014 0x00000013 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 q10, q14, q15 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqrdmulh.s32 q10, q14, q15 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 q10, q14, q15 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s32 q10, q14, q15 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 00000000
+vqrdmulh.s32 q10, q14, q15 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 00000000
+vqrdmulh.s32 q10, q14, q15 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 00000000
vqrdmulh.s16 q10, q14, q15 :: Qd 0x7fff0000 0x7fff0000 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqrdmulh.s16 q10, q14, q15 :: Qd 0xece50000 0xede10000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s16 q10, q14, q15 :: Qd 0xeae30000 0xebe40000 0xece50000 0xede10000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s32 q10, q14, q15 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 q10, q14, q15 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 q10, q14, q15 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s16 q10, q14, q15 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqrdmulh.s16 q10, q14, q15 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqrdmulh.s16 q10, q14, q15 :: Qd 0x0a8f0000 0x0a0e0000 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQRDMULH (by scalar) ----
vqrdmulh.s32 q0, q1, d6[0] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q0, q1, d6[0] :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q0, q1, d6[0] :: Qd 0x00000014 0x00000013 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 q6, q7, d1[1] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqrdmulh.s32 q6, q7, d1[1] :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqrdmulh.s32 q6, q7, d1[1] :: Qd 0xffffffec 0xffffffed 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqrdmulh.s16 q9, q11, d7[0] :: Qd 0x00000003 0x00000003 0x00000003 0x00000003 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqrdmulh.s16 q9, q11, d7[0] :: Qd 0x002b003b 0x00290044 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqrdmulh.s16 q9, q11, d7[0] :: Qd 0x00300039 0x002d0046 0x002b003b 0x00290044 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqrdmulh.s16 q4, q5, d6[0] :: Qd 0x00001001 0x00001001 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, d6[0] :: Qd 0x04c70687 0x04880788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, d6[0] :: Qd 0x05480648 0x050707c7 0x04c70687 0x04880788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 q7, q8, d9[1] :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, d9[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, d9[1] :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s16 q4, q5, d6[1] :: Qd 0x0000e50b 0x0000e50b 0x0000e50b 0x0000e50b Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, d6[1] :: Qd 0x04c70687 0x04880788 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, d6[1] :: Qd 0x05480648 0x050707c7 0x04c70687 0x04880788 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
vqrdmulh.s32 q7, q8, d9[0] :: Qd 0xfffffff4 0xfffffff4 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqrdmulh.s32 q7, q8, d9[0] :: Qd 0x00000002 0x00000002 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqrdmulh.s32 q7, q8, d9[0] :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqrdmulh.s16 q4, q5, d6[2] :: Qd 0x04000040 0x04000040 0x04000040 0x04000040 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, d6[2] :: Qd 0x04c70687 0x04880788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, d6[2] :: Qd 0x05480648 0x050707c7 0x04c70687 0x04880788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 q7, q8, d9[0] :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, d9[0] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, d9[0] :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s32 q10, q11, d15[0] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q10, q11, d15[0] :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q10, q11, d15[0] :: Qd 0x00000014 0x00000013 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 q10, q14, d15[1] :: Qd 0xffffff88 0xffffff88 0xffffff88 0xffffff88 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 q10, q14, d15[1] :: Qd 0x00000012 0x00000011 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 q10, q14, d15[1] :: Qd 0x00000014 0x00000013 0x00000012 0x00000011 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s16 q10, q14, d7[3] :: Qd 0x7fff0000 0x7fff0000 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 08000000
+vqrdmulh.s16 q10, q14, d7[3] :: Qd 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 00000000
+vqrdmulh.s16 q10, q14, d7[3] :: Qd 0xeae3e6e3 0xebe4e0e4 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 00000000
vqrdmulh.s32 q10, q14, d15[1] :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 q10, q14, d15[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 q10, q14, d15[1] :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s16 q10, q14, d7[1] :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqrdmulh.s16 q10, q14, d7[1] :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqrdmulh.s16 q10, q14, d7[1] :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VADD (fp) ----
vadd.f32 q0, q5, q2 :: Qd 0xc1b43ac6 0xc1b43ac6 0xc1b43ac6 0xc1b43ac6 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vadd.f32 q3, q4, q5 :: Qd 0xc8a931cf 0xc8a931cf 0xc8a931cf 0xc8a931cf Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmul.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLA (fp) ----
vmla.f32 q0, q5, q2 :: Qd 0xc4831ce4 0xc4831ce4 0xc4831ce4 0xc4831ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmla.f32 q0, q5, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vmla.f32 q3, q4, q5 :: Qd 0xcddf4321 0xcddf4321 0xcddf4321 0xcddf4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vmla.f32 q3, q4, q5 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmla.f32 q10, q11, q2 :: Qd 0xcf050e7f 0xcf050e7f 0xcf050e7f 0xcf050e7f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vmla.f32 q10, q11, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmla.f32 q9, q5, q7 :: Qd 0x4ec3063f 0x4ec3063f 0x4ec3063f 0x4ec3063f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmla.f32 q9, q5, q7 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vmla.f32 q0, q5, q2 :: Qd 0x5029254c 0x5029254c 0x5029254c 0x5029254c Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vmla.f32 q0, q5, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vmla.f32 q3, q4, q5 :: Qd 0x46fc6200 0x46fc6200 0x46fc6200 0x46fc6200 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vmla.f32 q3, q4, q5 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vmla.f32 q10, q11, q2 :: Qd 0x4c4a89cd 0x4c4a89cd 0x4c4a89cd 0x4c4a89cd Qm (i32)0x473e7300 Qn (i32)0x44882000
+vmla.f32 q10, q11, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vmla.f32 q9, q5, q7 :: Qd 0x4db2c947 0x4db2c947 0x4db2c947 0x4db2c947 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vmla.f32 q9, q5, q7 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmla.f32 q0, q11, q12 :: Qd 0x4ef90536 0x4ef90536 0x4ef90536 0x4ef90536 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vmla.f32 q0, q11, q12 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vmla.f32 q7, q1, q6 :: Qd 0x3f8ab1f8 0x3f8ab1f8 0x3f8ab1f8 0x3f8ab1f8 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vmla.f32 q7, q1, q6 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vmla.f32 q0, q1, q2 :: Qd 0x488fe2e0 0x488fe2e0 0x488fe2e0 0x488fe2e0 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vmla.f32 q3, q4, q5 :: Qd 0x4993b8eb 0x4993b8eb 0x4993b8eb 0x4993b8eb Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vmla.f32 q3, q4, q5 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmla.f32 q10, q11, q2 :: Qd 0x474f9bfc 0x474f9bfc 0x474f9bfc 0x474f9bfc Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vmla.f32 q10, q11, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vmla.f32 q9, q5, q7 :: Qd 0x4a657ac4 0x4a657ac4 0x4a657ac4 0x4a657ac4 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vmla.f32 q9, q5, q7 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vmla.f32 q0, q11, q12 :: Qd 0x489eee3e 0x489eee3e 0x489eee3e 0x489eee3e Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmla.f32 q0, q11, q12 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vmla.f32 q7, q1, q6 :: Qd 0xc54ff239 0xc54ff239 0xc54ff239 0xc54ff239 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vmla.f32 q7, q1, q6 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmla.f32 q0, q5, q2 :: Qd 0xbfb8fa0e 0xbfb8fa0e 0xbfb8fa0e 0xbfb8fa0e Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmla.f32 q0, q5, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vmla.f32 q10, q13, q15 :: Qd 0x488666c6 0x488666c6 0x488666c6 0x488666c6 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vmla.f32 q10, q13, q15 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmla.f32 q10, q13, q15 :: Qd 0x4f115379 0x4f115379 0x4f115379 0x4f115379 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmla.f32 q10, q13, q15 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vmla.f32 q0, q1, q2 :: Qd 0x5d6e81fd 0x5d6e81fd 0x5d6e81fd 0x5d6e81fd Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vmla.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmla.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmla.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmla.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmla.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLA (fp by scalar) ----
vmla.f32 q0, q1, d4[0] :: Qd 0x45341000 0x45341000 0x45341000 0x45341000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
+vmla.f32 q0, q1, d4[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
vmla.f32 q15, q8, d7[1] :: Qd 0xc6833e00 0xc6833e00 0xc6833e00 0xc6833e00 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
+vmla.f32 q15, q8, d7[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
+vmla.f32 q4, q8, d15[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 q4, q8, d15[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmla.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmla.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 q7, q8, d1[0] :: Qd 0x447a3fff 0x447a3fff 0x447a3fff 0x447a3fff Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
+vmla.f32 q7, q8, d1[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
vmla.f32 q7, q8, d1[0] :: Qd 0x65a96816 0x65a96816 0x65a96816 0x65a96816 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmla.f32 q7, q8, d1[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x40000000 0x40000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x40000000 0x40000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x40000000 0x40000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x40000000 0x40000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vmla.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmla.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x40000000 0x40000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x40000000 0x40000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmla.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmla.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmla.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLS (fp) ----
vmls.f32 q0, q5, q2 :: Qd 0x44835ce4 0x44835ce4 0x44835ce4 0x44835ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmls.f32 q0, q5, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vmls.f32 q3, q4, q5 :: Qd 0x4ddf4321 0x4ddf4321 0x4ddf4321 0x4ddf4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vmls.f32 q3, q4, q5 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmls.f32 q10, q11, q2 :: Qd 0x4f050e7f 0x4f050e7f 0x4f050e7f 0x4f050e7f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vmls.f32 q10, q11, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmls.f32 q9, q5, q7 :: Qd 0xcec3063f 0xcec3063f 0xcec3063f 0xcec3063f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmls.f32 q9, q5, q7 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vmls.f32 q0, q5, q2 :: Qd 0xd029254c 0xd029254c 0xd029254c 0xd029254c Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vmls.f32 q0, q5, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vmls.f32 q3, q4, q5 :: Qd 0xc6fc5e00 0xc6fc5e00 0xc6fc5e00 0xc6fc5e00 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vmls.f32 q3, q4, q5 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vmls.f32 q10, q11, q2 :: Qd 0xcc4a89cd 0xcc4a89cd 0xcc4a89cd 0xcc4a89cd Qm (i32)0x473e7300 Qn (i32)0x44882000
+vmls.f32 q10, q11, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vmls.f32 q9, q5, q7 :: Qd 0xcdb2c947 0xcdb2c947 0xcdb2c947 0xcdb2c947 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vmls.f32 q9, q5, q7 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmls.f32 q0, q11, q12 :: Qd 0xcef90536 0xcef90536 0xcef90536 0xcef90536 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vmls.f32 q0, q11, q12 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vmls.f32 q7, q1, q6 :: Qd 0x3f6a9c11 0x3f6a9c11 0x3f6a9c11 0x3f6a9c11 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vmls.f32 q7, q1, q6 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vmls.f32 q0, q1, q2 :: Qd 0xc88fe2a0 0xc88fe2a0 0xc88fe2a0 0xc88fe2a0 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vmls.f32 q3, q4, q5 :: Qd 0xc993b8db 0xc993b8db 0xc993b8db 0xc993b8db Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vmls.f32 q3, q4, q5 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmls.f32 q10, q11, q2 :: Qd 0xc74f99fc 0xc74f99fc 0xc74f99fc 0xc74f99fc Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vmls.f32 q10, q11, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vmls.f32 q9, q5, q7 :: Qd 0xca657abc 0xca657abc 0xca657abc 0xca657abc Qm (i32)0x45062000 Qn (i32)0x44db0000
+vmls.f32 q9, q5, q7 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vmls.f32 q0, q11, q12 :: Qd 0xc89eedfe 0xc89eedfe 0xc89eedfe 0xc89eedfe Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmls.f32 q0, q11, q12 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vmls.f32 q7, q1, q6 :: Qd 0x45501239 0x45501239 0x45501239 0x45501239 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vmls.f32 q7, q1, q6 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmls.f32 q0, q5, q2 :: Qd 0x405c7d07 0x405c7d07 0x405c7d07 0x405c7d07 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmls.f32 q0, q5, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vmls.f32 q10, q13, q15 :: Qd 0xc8866686 0xc8866686 0xc8866686 0xc8866686 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vmls.f32 q10, q13, q15 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmls.f32 q10, q13, q15 :: Qd 0xcf115379 0xcf115379 0xcf115379 0xcf115379 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmls.f32 q10, q13, q15 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vmls.f32 q0, q1, q2 :: Qd 0xdd6e81fd 0xdd6e81fd 0xdd6e81fd 0xdd6e81fd Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmls.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmls.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmls.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmls.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmls.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmls.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmls.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmls.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmls.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmls.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmls.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLS (fp by scalar) ----
vmls.f32 q0, q1, d4[0] :: Qd 0xc533f000 0xc533f000 0xc533f000 0xc533f000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
+vmls.f32 q0, q1, d4[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
vmls.f32 q15, q8, d7[1] :: Qd 0x46834200 0x46834200 0x46834200 0x46834200 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
+vmls.f32 q15, q8, d7[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
+vmls.f32 q4, q8, d15[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.f32 q4, q8, d15[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmls.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmls.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.f32 q7, q8, d1[0] :: Qd 0xc479bfff 0xc479bfff 0xc479bfff 0xc479bfff Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
+vmls.f32 q7, q8, d1[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
vmls.f32 q7, q8, d1[0] :: Qd 0xe5a96816 0xe5a96816 0xe5a96816 0xe5a96816 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmls.f32 q7, q8, d1[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmls.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmls.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmls.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmls.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmls.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmls.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmls.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VCVT (integer <-> fp) ----
vcvt.u32.f32 q0, q1 :: Qd 0x00000003 0x00000003 0x00000003 0x00000003 Qm (i32)0x404ccccd
+vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.u32.f32 q10, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
+vcvt.u32.f32 q10, q11 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.u32.f32 q15, q4 :: Qd 0xb2d05e00 0xb2d05e00 0xb2d05e00 0xb2d05e00 Qm (i32)0x4f32d05e
+vcvt.u32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x4f32d05e
+vcvt.u32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.u32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.u32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0e33333
+vcvt.u32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.u32.f32 q12, q8 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007 Qm (i32)0x40fff800
+vcvt.u32.f32 q12, q8 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x40fff800
+vcvt.u32.f32 q12, q8 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.u32.f32 q12, q8 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.s32.f32 q0, q1 :: Qd 0x00000003 0x00000003 0x00000003 0x00000003 Qm (i32)0x404ccccd
+vcvt.s32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.s32.f32 q10, q11 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x64cb49b4
+vcvt.s32.f32 q10, q11 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.s32.f32 q15, q4 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x4f32d05e
+vcvt.s32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x4f32d05e
+vcvt.s32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.s32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.s32.f32 q15, q4 :: Qd 0xfffffff9 0xfffffff9 0xfffffff9 0xfffffff9 Qm (i32)0xc0e33333
+vcvt.s32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.s32.f32 q12, q8 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007 Qm (i32)0x40fff800
+vcvt.s32.f32 q12, q8 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x40fff800
vcvt.s32.f32 q12, q8 :: Qd 0xfffffff9 0xfffffff9 0xfffffff9 0xfffffff9 Qm (i32)0xc0fff800
+vcvt.s32.f32 q12, q8 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.f32.u32 q0, q1 :: Qd 0x40e00000 0x40e00000 0x40e00000 0x40e00000 Qm (i32)0x00000007
+vcvt.f32.u32 q0, q1 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x00000007
vcvt.f32.u32 q10, q11 :: Qd 0x4f000000 0x4f000000 0x4f000000 0x4f000000 Qm (i32)0x80000000
+vcvt.f32.u32 q10, q11 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x80000000
vcvt.f32.u32 q0, q1 :: Qd 0x4f000000 0x4f000000 0x4f000000 0x4f000000 Qm (i32)0x80000001
+vcvt.f32.u32 q0, q1 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x80000001
vcvt.f32.u32 q0, q1 :: Qd 0x4f000000 0x4f000000 0x4f000000 0x4f000000 Qm (i32)0x7fffffff
+vcvt.f32.u32 q0, q1 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x7fffffff
vcvt.f32.u32 q0, q14 :: Qd 0x4e4282f4 0x4e4282f4 0x4e4282f4 0x4e4282f4 Qm (i32)0x30a0bcef
+vcvt.f32.u32 q0, q14 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x30a0bcef
vcvt.f32.s32 q0, q1 :: Qd 0x40e00000 0x40e00000 0x40e00000 0x40e00000 Qm (i32)0x00000007
+vcvt.f32.s32 q0, q1 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x00000007
vcvt.f32.s32 q10, q11 :: Qd 0xcf000000 0xcf000000 0xcf000000 0xcf000000 Qm (i32)0x80000000
+vcvt.f32.s32 q10, q11 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x80000000
vcvt.f32.s32 q0, q1 :: Qd 0xcf000000 0xcf000000 0xcf000000 0xcf000000 Qm (i32)0x80000001
+vcvt.f32.s32 q0, q1 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x80000001
vcvt.f32.s32 q0, q1 :: Qd 0x4f000000 0x4f000000 0x4f000000 0x4f000000 Qm (i32)0x7fffffff
+vcvt.f32.s32 q0, q1 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x7fffffff
vcvt.f32.s32 q0, q14 :: Qd 0x4e4282f4 0x4e4282f4 0x4e4282f4 0x4e4282f4 Qm (i32)0x30a0bcef
+vcvt.f32.s32 q0, q14 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x30a0bcef
vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.u32.f32 q0, q1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7f800000
+vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
+vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
+vcvt.s32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.s32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.s32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcvt.s32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.s32.f32 q0, q1 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x7f800000
+vcvt.s32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vcvt.s32.f32 q0, q1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0xff800000
+vcvt.s32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
---- VCVT (fixed <-> fp) ----
vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000019 0x00000019 0x00000019 0x00000019 Qm (i32)0x404ccccd
+vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.u32.f32 q10, q11, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
+vcvt.u32.f32 q10, q11, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.u32.f32 q15, q4, #32 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
+vcvt.u32.f32 q15, q4, #32 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x4f32d05e
vcvt.u32.f32 q15, q4, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf000000
+vcvt.u32.f32 q15, q4, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf000000
+vcvt.u32.f32 q15, q4, #4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.u32.f32 q15, q4, #4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.u32.f32 q12, q8, #3 :: Qd 0x0000003f 0x0000003f 0x0000003f 0x0000003f Qm (i32)0x40fff800
+vcvt.u32.f32 q12, q8, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x40fff800
+vcvt.u32.f32 q12, q8, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.u32.f32 q12, q8, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.s32.f32 q0, q1, #5 :: Qd 0x00000066 0x00000066 0x00000066 0x00000066 Qm (i32)0x404ccccd
+vcvt.s32.f32 q0, q1, #5 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.s32.f32 q10, q11, #1 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x64cb49b4
+vcvt.s32.f32 q10, q11, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.s32.f32 q15, q4, #8 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x4f32d05e
+vcvt.s32.f32 q15, q4, #8 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x4f32d05e
vcvt.s32.f32 q15, q4, #2 :: Qd 0xfffffffe 0xfffffffe 0xfffffffe 0xfffffffe Qm (i32)0xbf000000
+vcvt.s32.f32 q15, q4, #2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.s32.f32 q15, q4, #1 :: Qd 0xfffffff2 0xfffffff2 0xfffffff2 0xfffffff2 Qm (i32)0xc0e33333
+vcvt.s32.f32 q15, q4, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.s32.f32 q12, q8, #2 :: Qd 0x0000001f 0x0000001f 0x0000001f 0x0000001f Qm (i32)0x40fff800
+vcvt.s32.f32 q12, q8, #2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x40fff800
vcvt.s32.f32 q12, q8, #2 :: Qd 0xffffffe1 0xffffffe1 0xffffffe1 0xffffffe1 Qm (i32)0xc0fff800
+vcvt.s32.f32 q12, q8, #2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.f32.u32 q0, q1, #5 :: Qd 0x3e600000 0x3e600000 0x3e600000 0x3e600000 Qm (i32)0x00000007
+vcvt.f32.u32 q0, q1, #5 :: Qd 0x4b98b4b5 0x4b94a8b9 0x4b90b0ad 0x4b8cbcb9 Qm (i32)0x00000007
vcvt.f32.u32 q10, q11, #9 :: Qd 0x4a800000 0x4a800000 0x4a800000 0x4a800000 Qm (i32)0x80000000
+vcvt.f32.u32 q10, q11, #9 :: Qd 0x4998b4b5 0x4994a8b9 0x4990b0ad 0x498cbcb9 Qm (i32)0x80000000
vcvt.f32.u32 q0, q1, #4 :: Qd 0x4d000000 0x4d000000 0x4d000000 0x4d000000 Qm (i32)0x80000001
+vcvt.f32.u32 q0, q1, #4 :: Qd 0x4c18b4b5 0x4c14a8b9 0x4c10b0ad 0x4c0cbcb9 Qm (i32)0x80000001
vcvt.f32.u32 q0, q1, #6 :: Qd 0x4c000000 0x4c000000 0x4c000000 0x4c000000 Qm (i32)0x7fffffff
+vcvt.f32.u32 q0, q1, #6 :: Qd 0x4b18b4b5 0x4b14a8b9 0x4b10b0ad 0x4b0cbcb9 Qm (i32)0x7fffffff
vcvt.f32.u32 q0, q14, #5 :: Qd 0x4bc282f4 0x4bc282f4 0x4bc282f4 0x4bc282f4 Qm (i32)0x30a0bcef
+vcvt.f32.u32 q0, q14, #5 :: Qd 0x4b98b4b5 0x4b94a8b9 0x4b90b0ad 0x4b8cbcb9 Qm (i32)0x30a0bcef
vcvt.f32.s32 q0, q1, #12 :: Qd 0x3ae00000 0x3ae00000 0x3ae00000 0x3ae00000 Qm (i32)0x00000007
+vcvt.f32.s32 q0, q1, #12 :: Qd 0x4818b4b5 0x4814a8b9 0x4810b0ad 0x480cbcb9 Qm (i32)0x00000007
vcvt.f32.s32 q10, q11, #8 :: Qd 0xcb000000 0xcb000000 0xcb000000 0xcb000000 Qm (i32)0x80000000
+vcvt.f32.s32 q10, q11, #8 :: Qd 0x4a18b4b5 0x4a14a8b9 0x4a10b0ad 0x4a0cbcb9 Qm (i32)0x80000000
vcvt.f32.s32 q0, q1, #2 :: Qd 0xce000000 0xce000000 0xce000000 0xce000000 Qm (i32)0x80000001
+vcvt.f32.s32 q0, q1, #2 :: Qd 0x4d18b4b5 0x4d14a8b9 0x4d10b0ad 0x4d0cbcb9 Qm (i32)0x80000001
vcvt.f32.s32 q0, q1, #1 :: Qd 0x4e800000 0x4e800000 0x4e800000 0x4e800000 Qm (i32)0x7fffffff
+vcvt.f32.s32 q0, q1, #1 :: Qd 0x4d98b4b5 0x4d94a8b9 0x4d90b0ad 0x4d8cbcb9 Qm (i32)0x7fffffff
vcvt.f32.s32 q0, q14, #6 :: Qd 0x4b4282f4 0x4b4282f4 0x4b4282f4 0x4b4282f4 Qm (i32)0x30a0bcef
+vcvt.f32.s32 q0, q14, #6 :: Qd 0x4b18b4b5 0x4b14a8b9 0x4b10b0ad 0x4b0cbcb9 Qm (i32)0x30a0bcef
+vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.u32.f32 q0, q1, #3 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7f800000
+vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
+vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
+vcvt.s32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.s32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.s32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcvt.s32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.s32.f32 q0, q1, #3 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x7f800000
+vcvt.s32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vcvt.s32.f32 q0, q1, #3 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0xff800000
+vcvt.s32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
---- VMAX (fp) ----
vmax.f32 q0, q5, q2 :: Qd 0x41b851ec 0x41b851ec 0x41b851ec 0x41b851ec Qm (i32)0x41b851ec Qn (i32)0xc2364659
vmax.f32 q3, q4, q5 :: Qd 0x44a84000 0x44a84000 0x44a84000 0x44a84000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmin.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VRECPE ----
vrecpe.u32 q0, q1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x404ccccd
+vrecpe.u32 q0, q1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x404ccccd
+vrecpe.u32 q10, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
vrecpe.u32 q10, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
vrecpe.u32 q15, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
+vrecpe.u32 q15, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
vrecpe.u32 q15, q4 :: Qd 0xab800000 0xab800000 0xab800000 0xab800000 Qm (i32)0xbf000000
+vrecpe.u32 q15, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xbf000000
vrecpe.u32 q15, q4 :: Qd 0xaa000000 0xaa000000 0xaa000000 0xaa000000 Qm (i32)0xc0e33333
+vrecpe.u32 q15, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xc0e33333
+vrecpe.u32 q12, q8 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x40fff800
vrecpe.u32 q12, q8 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x40fff800
vrecpe.u32 q12, q8 :: Qd 0xaa000000 0xaa000000 0xaa000000 0xaa000000 Qm (i32)0xc0fff800
+vrecpe.u32 q12, q8 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xc0fff800
+vrecpe.u32 q0, q1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x404ccccd
vrecpe.u32 q0, q1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x404ccccd
vrecpe.u32 q10, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
+vrecpe.u32 q10, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
+vrecpe.u32 q15, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
vrecpe.u32 q15, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
vrecpe.f32 q15, q4 :: Qd 0xbfff8000 0xbfff8000 0xbfff8000 0xbfff8000 Qm (i32)0xbf000000
+vrecpe.f32 q15, q4 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0xbf000000
vrecpe.f32 q15, q4 :: Qd 0xbe100000 0xbe100000 0xbe100000 0xbe100000 Qm (i32)0xc0e33333
+vrecpe.f32 q15, q4 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0xc0e33333
vrecpe.f32 q12, q8 :: Qd 0x3e000000 0x3e000000 0x3e000000 0x3e000000 Qm (i32)0x40fff800
+vrecpe.f32 q12, q8 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x40fff800
vrecpe.f32 q12, q8 :: Qd 0xbe000000 0xbe000000 0xbe000000 0xbe000000 Qm (i32)0xc0fff800
+vrecpe.f32 q12, q8 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0xc0fff800
vrecpe.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x00000007
vrecpe.f32 q10, q11 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000000
+vrecpe.f32 q10, q11 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x80000000
vrecpe.f32 q0, q1 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000001
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x80000001
vrecpe.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x7fffffff
vrecpe.f32 q0, q14 :: Qd 0x4e4c0000 0x4e4c0000 0x4e4c0000 0x4e4c0000 Qm (i32)0x30a0bcef
+vrecpe.f32 q0, q14 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x30a0bcef
vrecpe.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x00000007
vrecpe.f32 q10, q11 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000000
+vrecpe.f32 q10, q11 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x80000000
vrecpe.f32 q0, q1 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000001
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x80000001
vrecpe.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x7fffffff
vrecpe.f32 q0, q14 :: Qd 0x4e4c0000 0x4e4c0000 0x4e4c0000 0x4e4c0000 Qm (i32)0x30a0bcef
+vrecpe.f32 q0, q14 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x30a0bcef
vrecpe.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x7fc00000
vrecpe.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x00000000
vrecpe.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x7f800000
vrecpe.f32 q0, q1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0xff800000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0xff800000
vrecpe.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x7fc00000
vrecpe.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x00000000
vrecpe.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x7f800000
vrecpe.f32 q0, q1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0xff800000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0xff800000
---- VRECPS ----
vrecps.f32 q0, q5, q2 :: Qd 0x44837ce4 0x44837ce4 0x44837ce4 0x44837ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vrecps.f32 q3, q4, q5 :: Qd 0x4ddf4321 0x4ddf4321 0x4ddf4321 0x4ddf4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vrecps.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VABS (fp) ----
vabs.f32 q0, q1 :: Qd 0x404ccccd 0x404ccccd 0x404ccccd 0x404ccccd Qm (i32)0x404ccccd
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x404ccccd
vabs.f32 q10, q11 :: Qd 0x64cb49b4 0x64cb49b4 0x64cb49b4 0x64cb49b4 Qm (i32)0x64cb49b4
+vabs.f32 q10, q11 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x64cb49b4
vabs.f32 q15, q4 :: Qd 0x4f32d05e 0x4f32d05e 0x4f32d05e 0x4f32d05e Qm (i32)0x4f32d05e
+vabs.f32 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x4f32d05e
vabs.f32 q15, q4 :: Qd 0x3f000000 0x3f000000 0x3f000000 0x3f000000 Qm (i32)0xbf000000
+vabs.f32 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xbf000000
vabs.f32 q15, q4 :: Qd 0x40e33333 0x40e33333 0x40e33333 0x40e33333 Qm (i32)0xc0e33333
+vabs.f32 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xc0e33333
vabs.f32 q12, q8 :: Qd 0x40fff800 0x40fff800 0x40fff800 0x40fff800 Qm (i32)0x40fff800
+vabs.f32 q12, q8 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x40fff800
vabs.f32 q12, q8 :: Qd 0x40fff800 0x40fff800 0x40fff800 0x40fff800 Qm (i32)0xc0fff800
+vabs.f32 q12, q8 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xc0fff800
vabs.f32 q0, q1 :: Qd 0x404ccccd 0x404ccccd 0x404ccccd 0x404ccccd Qm (i32)0x404ccccd
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x404ccccd
vabs.f32 q10, q11 :: Qd 0x64cb49b4 0x64cb49b4 0x64cb49b4 0x64cb49b4 Qm (i32)0x64cb49b4
+vabs.f32 q10, q11 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x64cb49b4
vabs.f32 q15, q4 :: Qd 0x4f32d05e 0x4f32d05e 0x4f32d05e 0x4f32d05e Qm (i32)0x4f32d05e
+vabs.f32 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x4f32d05e
vabs.f32 q15, q4 :: Qd 0x3f000000 0x3f000000 0x3f000000 0x3f000000 Qm (i32)0xbf000000
+vabs.f32 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xbf000000
vabs.f32 q15, q4 :: Qd 0x40e33333 0x40e33333 0x40e33333 0x40e33333 Qm (i32)0xc0e33333
+vabs.f32 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xc0e33333
vabs.f32 q12, q8 :: Qd 0x40fff800 0x40fff800 0x40fff800 0x40fff800 Qm (i32)0x40fff800
+vabs.f32 q12, q8 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x40fff800
vabs.f32 q12, q8 :: Qd 0x40fff800 0x40fff800 0x40fff800 0x40fff800 Qm (i32)0xc0fff800
+vabs.f32 q12, q8 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xc0fff800
vabs.f32 q0, q1 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007 Qm (i32)0x00000007
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000007
vabs.f32 q10, q11 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
+vabs.f32 q10, q11 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x80000000
vabs.f32 q0, q1 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i32)0x80000001
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x80000001
vabs.f32 q0, q1 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x7fffffff
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x7fffffff
vabs.f32 q0, q14 :: Qd 0x30a0bcef 0x30a0bcef 0x30a0bcef 0x30a0bcef Qm (i32)0x30a0bcef
+vabs.f32 q0, q14 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x30a0bcef
vabs.f32 q0, q1 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007 Qm (i32)0x00000007
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000007
vabs.f32 q10, q11 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
+vabs.f32 q10, q11 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x80000000
vabs.f32 q0, q1 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i32)0x80000001
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x80000001
vabs.f32 q0, q1 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x7fffffff
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x7fffffff
vabs.f32 q0, q14 :: Qd 0x30a0bcef 0x30a0bcef 0x30a0bcef 0x30a0bcef Qm (i32)0x30a0bcef
+vabs.f32 q0, q14 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x30a0bcef
vabs.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x7fc00000
vabs.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000000
vabs.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x7f800000
vabs.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xff800000
vabs.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x7fc00000
vabs.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000000
vabs.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x7f800000
vabs.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xff800000
---- VCGT (fp) ----
vcgt.f32 q0, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x3f000000 Qn (i32)0xbf000000
vcgt.f32 q2, q15, q12 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vceq.f32 q0, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0xff800000
---- VCEQ (fp) #0 ----
vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x01000000
+vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x01000000
vceq.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000001
+vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000001
vceq.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000000
+vceq.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
vceq.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x41b851ec
+vceq.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x41b851ec
+vceq.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc1b851ec
vceq.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc1b851ec
vceq.f32 q10, q15, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.f32 q10, q15, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vceq.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
+vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
---- VCGT (fp) #0 ----
vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x01000000
+vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x01000000
vcgt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000001
+vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000001
vcgt.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
+vcgt.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000000
+vcgt.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x41b851ec
vcgt.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x41b851ec
vcgt.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc1b851ec
+vcgt.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
vcgt.f32 q10, q15, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.f32 q10, q15, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7fc00000
vcgt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7f800000
vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7f800000
vcgt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
+vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xff800000
---- VCLT (fp) #0 ----
vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x01000000
+vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x01000000
+vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000001
vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000001
vclt.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
+vclt.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
+vclt.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x41b851ec
vclt.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x41b851ec
vclt.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
+vclt.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc1b851ec
vclt.f32 q10, q15, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.f32 q10, q15, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vclt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xff800000
+vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
---- VCGE (fp) #0 ----
vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x01000000
+vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x01000000
vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000001
+vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000001
+vcge.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000000
vcge.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000000
vcge.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x41b851ec
+vcge.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x41b851ec
vcge.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc1b851ec
+vcge.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
+vcge.f32 q10, q15, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.f32 q10, q15, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7fc00000
+vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7f800000
+vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7f800000
vcge.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
+vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xff800000
---- VCLE (fp) #0 ----
vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x01000000
+vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x01000000
vcle.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000001
+vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000001
vcle.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000000
+vcle.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
+vcle.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x41b851ec
vcle.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x41b851ec
vcle.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
+vcle.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc1b851ec
vcle.f32 q10, q15, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.f32 q10, q15, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcle.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vcle.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xff800000
+vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
---- VNEG (fp) ----
vneg.f32 q0, q1 :: Qd 0x81000000 0x81000000 0x81000000 0x81000000 Qm (i32)0x01000000
+vneg.f32 q0, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x01000000
vneg.f32 q0, q1 :: Qd 0x80000001 0x80000001 0x80000001 0x80000001 Qm (i32)0x00000001
+vneg.f32 q0, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x00000001
vneg.f32 q2, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
+vneg.f32 q2, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x80000000
vneg.f32 q2, q1 :: Qd 0xc1b851ec 0xc1b851ec 0xc1b851ec 0xc1b851ec Qm (i32)0x41b851ec
+vneg.f32 q2, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x41b851ec
vneg.f32 q2, q1 :: Qd 0x41b851ec 0x41b851ec 0x41b851ec 0x41b851ec Qm (i32)0xc1b851ec
+vneg.f32 q2, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0xc1b851ec
vneg.f32 q10, q15 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x00000000
+vneg.f32 q10, q15 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x00000000
vneg.f32 q0, q1 :: Qd 0xffc00000 0xffc00000 0xffc00000 0xffc00000 Qm (i32)0x7fc00000
+vneg.f32 q0, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x7fc00000
vneg.f32 q0, q1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x00000000
+vneg.f32 q0, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x00000000
vneg.f32 q0, q1 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000
+vneg.f32 q0, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x7f800000
vneg.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000
+vneg.f32 q0, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0xff800000
---- VRSQRTS ----
vrsqrts.f32 q0, q5, q2 :: Qd 0x44039ce4 0x44039ce4 0x44039ce4 0x44039ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vrsqrts.f32 q3, q4, q5 :: Qd 0x4d5f4321 0x4d5f4321 0x4d5f4321 0x4d5f4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vrsqrts.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VRSQRTE (fp) ----
vrsqrte.f32 q0, q1 :: Qd 0x3f0f0000 0x3f0f0000 0x3f0f0000 0x3f0f0000 Qm (i32)0x404ccccd
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x404ccccd
vrsqrte.f32 q10, q11 :: Qd 0x2ccb0000 0x2ccb0000 0x2ccb0000 0x2ccb0000 Qm (i32)0x64cb49b4
+vrsqrte.f32 q10, q11 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x64cb49b4
vrsqrte.f32 q15, q4 :: Qd 0x37998000 0x37998000 0x37998000 0x37998000 Qm (i32)0x4f32d05e
+vrsqrte.f32 q15, q4 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x4f32d05e
vrsqrte.f32 q15, q4 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xbf000000
+vrsqrte.f32 q15, q4 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0xbf000000
vrsqrte.f32 q15, q4 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xc0e33333
+vrsqrte.f32 q15, q4 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0xc0e33333
vrsqrte.f32 q12, q8 :: Qd 0x3eb50000 0x3eb50000 0x3eb50000 0x3eb50000 Qm (i32)0x40fff800
+vrsqrte.f32 q12, q8 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x40fff800
vrsqrte.f32 q12, q8 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xc0fff800
+vrsqrte.f32 q12, q8 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0xc0fff800
vrsqrte.f32 q0, q1 :: Qd 0x3f0f0000 0x3f0f0000 0x3f0f0000 0x3f0f0000 Qm (i32)0x404ccccd
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x404ccccd
vrsqrte.f32 q10, q11 :: Qd 0x2ccb0000 0x2ccb0000 0x2ccb0000 0x2ccb0000 Qm (i32)0x64cb49b4
+vrsqrte.f32 q10, q11 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x64cb49b4
vrsqrte.f32 q15, q4 :: Qd 0x37998000 0x37998000 0x37998000 0x37998000 Qm (i32)0x4f32d05e
+vrsqrte.f32 q15, q4 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x4f32d05e
vrsqrte.f32 q15, q4 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xbf000000
+vrsqrte.f32 q15, q4 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0xbf000000
vrsqrte.f32 q15, q4 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xc0e33333
+vrsqrte.f32 q15, q4 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0xc0e33333
vrsqrte.f32 q12, q8 :: Qd 0x3eb50000 0x3eb50000 0x3eb50000 0x3eb50000 Qm (i32)0x40fff800
+vrsqrte.f32 q12, q8 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x40fff800
vrsqrte.f32 q12, q8 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xc0fff800
+vrsqrte.f32 q12, q8 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0xc0fff800
vrsqrte.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x00000007
vrsqrte.f32 q10, q11 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000000
+vrsqrte.f32 q10, q11 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x80000000
vrsqrte.f32 q0, q1 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000001
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x80000001
vrsqrte.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x7fffffff
vrsqrte.f32 q0, q14 :: Qd 0x46e48000 0x46e48000 0x46e48000 0x46e48000 Qm (i32)0x30a0bcef
+vrsqrte.f32 q0, q14 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x30a0bcef
vrsqrte.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x00000007
vrsqrte.f32 q10, q11 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000000
+vrsqrte.f32 q10, q11 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x80000000
vrsqrte.f32 q0, q1 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000001
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x80000001
vrsqrte.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x7fffffff
vrsqrte.f32 q0, q14 :: Qd 0x46e48000 0x46e48000 0x46e48000 0x46e48000 Qm (i32)0x30a0bcef
+vrsqrte.f32 q0, q14 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x30a0bcef
vrsqrte.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x7fc00000
vrsqrte.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000000
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x00000000
vrsqrte.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x7f800000
vrsqrte.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0xff800000
); \
printf("%s, #" #imm " :: Qd 0x%08x 0x%08x\n", \
instruction, out[1], out[0]); \
+} \
+{ \
+ unsigned int out[2]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %1, %2\n\t" \
+ "vldmia %1!, {" #QD "}\n\t" \
+ instruction ", #" #imm "\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ : \
+ : "r" (out), "r" (addr), "r" (mem) \
+ : #QD, "%2", "memory" \
+ ); \
+ printf("%s, #" #imm " :: Qd 0x%08x 0x%08x\n", \
+ instruction, out[1], out[0]); \
}
#define TESTINSN_un(instruction, QD, QM, QMtype, QMval) \
); \
printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x\n", \
instruction, out[1], out[0], QMval); \
+} \
+{ \
+ unsigned int out[2]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %2, %3\n\t" \
+ "vldmia %2!, {" #QD "}\n\t" \
+ "vldmia %2!, {" #QM "}\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ : \
+ : "r" (out), "r" (QMval), "r" (addr), "r" (mem) \
+ : #QD, #QM, "%2", "memory" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x\n", \
+ instruction, out[1], out[0], QMval ); \
}
#define TESTINSN_un_q(instruction, QD, QM, QMtype, QMval) \
); \
printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x fpscr %08x\n", \
instruction, out[1], out[0], QMval, fpscr); \
+} \
+{ \
+ unsigned int out[2]; \
+ unsigned int fpscr; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "vmov.i8 " #QD ", #0x55" "\n\t" \
+ "mov r4, #0\n\t" \
+ MOVE_to_FPSCR_from_R4 \
+ "mov %3, %4\n\t" \
+ "vldmia %3!, {" #QM "}\n\t" \
+ instruction "\n\t" \
+ "vstmia %1, {" #QD "}\n\t" \
+ MOVE_to_R4_from_FPSCR \
+ "mov %0, r4" \
+ : "=r" (fpscr) \
+ : "r" (out), "r" (QMval), "r" (addr), "r" (mem) \
+ : #QD, #QM, "memory", "r4" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x fpscr %08x\n", \
+ instruction, out[1], out[0], QMval, fpscr); \
}
#define TESTINSN_core_to_scalar(instruction, QD, QM, QMval) \
#define TESTINSN_VLDn_WB(instruction, QD1, QD2, QD3, QD4) \
{ \
- unsigned int out[9]; \
-\
- __asm__ volatile( \
- "vmov.i8 " #QD1 ", #0x55" "\n\t" \
- "vmov.i8 " #QD2 ", #0x55" "\n\t" \
- "vmov.i8 " #QD3 ", #0x55" "\n\t" \
- "vmov.i8 " #QD4 ", #0x55" "\n\t" \
- instruction ", [%1]!\n\t" \
- "mov r4, %0\n\t" \
- "vstmia %0!, {" #QD1 "}\n\t" \
- "vstmia %0!, {" #QD2 "}\n\t" \
- "vstmia %0!, {" #QD3 "}\n\t" \
- "vstmia %0!, {" #QD4 "}\n\t" \
- "str %1, [%2]\n\t" \
- "mov %0, r4\n\t" \
- : \
- : "r" (out), "r" (mem), "r"(&out[8]) \
- : #QD1, #QD2, #QD3, #QD4, "memory", "r4" \
- ); \
- printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
- "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
- instruction, out[0], out[1], out[2], out[3], out[4],\
- out[5], out[6], out[7], (int)out[8]-(int)mem); \
+ unsigned int out[9]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %0, %2\n\t" \
+ "vmov.i8 " #QD1 ", #0x55" "\n\t" \
+ "vmov.i8 " #QD2 ", #0x55" "\n\t" \
+ "vmov.i8 " #QD3 ", #0x55" "\n\t" \
+ "vmov.i8 " #QD4 ", #0x55" "\n\t" \
+ instruction ", [%0]!\n\t" \
+ "mov r4, %1\n\t" \
+ "vstmia %1!, {" #QD1 "}\n\t" \
+ "vstmia %1!, {" #QD2 "}\n\t" \
+ "vstmia %1!, {" #QD3 "}\n\t" \
+ "vstmia %1!, {" #QD4 "}\n\t" \
+ "str %0, [%3]\n\t" \
+ "mov %1, r4\n\t" \
+ : "+r" (addr) \
+ : "r" (out), "r" (mem), "r"(&out[8]) \
+ : #QD1, #QD2, #QD3, #QD4, "memory", "r4" \
+ ); \
+ printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
+ "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
+ instruction, out[0], out[1], out[2], out[3], out[4],\
+ out[5], out[6], out[7], (int)out[8]-(int)mem); \
}
#define TESTINSN_VSTn_WB(instruction, QD1, QD2, QD3, QD4) \
{ \
- unsigned int out[9]; \
-\
- memset(out, 0x55, 8 * (sizeof(unsigned int)));\
- __asm__ volatile( \
- "mov r4, %1\n\t" \
- "vldmia %1!, {" #QD1 "}\n\t" \
- "vldmia %1!, {" #QD2 "}\n\t" \
- "vldmia %1!, {" #QD3 "}\n\t" \
- "vldmia %1!, {" #QD4 "}\n\t" \
- "mov %1, r4\n\t" \
- instruction ", [%0]!\n\t" \
- "str %0, [%2]\n\t" \
- : \
- : "r" (out), "r" (mem), "r"(&out[8]) \
- : #QD1, #QD2, #QD3, #QD4, "memory", "r4" \
- ); \
- printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
- "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
- instruction, out[0], out[1], out[2], out[3], out[4],\
- out[5], out[6], out[7], (int)out[8]-(int)out); \
+ unsigned int out[9]; \
+ unsigned int addr = 0; \
+ \
+ memset(out, 0x55, 8 * (sizeof(unsigned int)));\
+ __asm__ volatile( \
+ "mov %0, %1\n\t" \
+ "mov r4, %2\n\t" \
+ "vldmia r4!, {" #QD1 "}\n\t" \
+ "vldmia r4!, {" #QD2 "}\n\t" \
+ "vldmia r4!, {" #QD3 "}\n\t" \
+ "vldmia r4!, {" #QD4 "}\n\t" \
+ instruction ", [%0]!\n\t" \
+ "str %0, [%3]\n\t" \
+ : "+r" (addr) \
+ : "r" (out), "r" (mem), "r"(&out[8]) \
+ : #QD1, #QD2, #QD3, #QD4, "memory", "r4", "0" \
+ ); \
+ printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
+ "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
+ instruction, out[0], out[1], out[2], out[3], out[4],\
+ out[5], out[6], out[7], (int)out[8]-(int)out); \
}
#define TESTINSN_VLDn_RI(instruction, QD1, QD2, QD3, QD4, RM, RMval) \
{ \
- unsigned int out[9]; \
-\
- __asm__ volatile( \
- "vmov.i8 " #QD1 ", #0x55" "\n\t" \
- "vmov.i8 " #QD2 ", #0x55" "\n\t" \
- "vmov.i8 " #QD3 ", #0x55" "\n\t" \
- "vmov.i8 " #QD4 ", #0x55" "\n\t" \
- "mov " #RM ", %3\n\t" \
- instruction ", [%1], " #RM "\n\t" \
- "mov r4, %0\n\t" \
- "vstmia %0!, {" #QD1 "}\n\t" \
- "vstmia %0!, {" #QD2 "}\n\t" \
- "vstmia %0!, {" #QD3 "}\n\t" \
- "vstmia %0!, {" #QD4 "}\n\t" \
- "str %1, [%2]\n\t" \
- "mov %0, r4\n\t" \
- : \
- : "r" (out), "r" (mem), "r"(&out[8]), "r"(RMval) \
- : #QD1, #QD2, #QD3, #QD4, "memory", "r4", #RM \
- ); \
- printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
- "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
- instruction, out[0], out[1], out[2], out[3], out[4],\
- out[5], out[6], out[7], (int)out[8]-(int)mem); \
+ unsigned int out[9]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %0, %2\n\t" \
+ "vmov.i8 " #QD1 ", #0x55" "\n\t" \
+ "vmov.i8 " #QD2 ", #0x55" "\n\t" \
+ "vmov.i8 " #QD3 ", #0x55" "\n\t" \
+ "vmov.i8 " #QD4 ", #0x55" "\n\t" \
+ "mov " #RM ", %4\n\t" \
+ instruction ", [%0], " #RM "\n\t" \
+ "mov r4, %1\n\t" \
+ "vstmia %1!, {" #QD1 "}\n\t" \
+ "vstmia %1!, {" #QD2 "}\n\t" \
+ "vstmia %1!, {" #QD3 "}\n\t" \
+ "vstmia %1!, {" #QD4 "}\n\t" \
+ "str %0, [%3]\n\t" \
+ "mov %1, r4\n\t" \
+ : "+r" (addr) \
+ : "r" (out), "r" (mem), "r"(&out[8]), "r"(RMval) \
+ : #QD1, #QD2, #QD3, #QD4, "memory", "r4", #RM \
+ ); \
+ printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
+ "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
+ instruction, out[0], out[1], out[2], out[3], out[4],\
+ out[5], out[6], out[7], (int)out[8]-(int)addr); \
}
+
#define TESTINSN_VSTn_RI(instruction, QD1, QD2, QD3, QD4, RM, RMval) \
{ \
- unsigned int out[9]; \
-\
- memset(out, 0x55, 8 * (sizeof(unsigned int)));\
- __asm__ volatile( \
- "mov r4, %1\n\t" \
- "vldmia %1!, {" #QD1 "}\n\t" \
- "vldmia %1!, {" #QD2 "}\n\t" \
- "vldmia %1!, {" #QD3 "}\n\t" \
- "vldmia %1!, {" #QD4 "}\n\t" \
- "mov %1, r4\n\t" \
- "mov " #RM ", %3\n\t" \
- instruction ", [%0], " #RM "\n\t" \
- "str %0, [%2]\n\t" \
- : \
- : "r" (out), "r" (mem), "r"(&out[8]), "r"(RMval) \
- : #QD1, #QD2, #QD3, #QD4, "memory", "r4", #RM \
- ); \
- printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
- "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
- instruction, out[0], out[1], out[2], out[3], out[4],\
- out[5], out[6], out[7], (int)out[8]-(int)out); \
+ unsigned int out[9]; \
+ unsigned int addr = 0; \
+ \
+ memset(out, 0x55, 8 * (sizeof(unsigned int)));\
+ __asm__ volatile( \
+ "mov %0, %1\n\t" \
+ "mov r4, %2\n\t" \
+ "vldmia r4!, {" #QD1 "}\n\t" \
+ "vldmia r4!, {" #QD2 "}\n\t" \
+ "vldmia r4!, {" #QD3 "}\n\t" \
+ "vldmia r4!, {" #QD4 "}\n\t" \
+ "mov " #RM ", %4\n\t" \
+ instruction ", [%0], " #RM "\n\t" \
+ "str %0, [%3]\n\t" \
+ : "+r" (addr) \
+ : "r" (out), "r" (mem), "r"(&out[8]), "r"(#RMval) \
+ : #QD1, #QD2, #QD3, #QD4, "memory", "r4", #RM \
+ ); \
+ printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
+ "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
+ instruction, out[0], out[1], out[2], out[3], out[4],\
+ out[5], out[6], out[7], (int)out[8]-(int)out); \
}
#define TESTINSN_bin(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \
printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
" Qn (" #QNtype ")0x%08x\n", \
instruction, out[1], out[0], QMval, QNval); \
+} \
+{ \
+ unsigned int out[2]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %0, %4\n\t" \
+ "vldmia %0!, {" #QM "}\n\t" \
+ "vmov.i8 " #QD ", #0x55" "\n\t" \
+ "vdup." #QNtype " " #QN ", %3\n\t" \
+ instruction "\n\t" \
+ "vstmia %1, {" #QD "}\n\t" \
+ : "+r" (addr) \
+ : "r" (out), "r" (QMval), "r" (QNval), "r" (mem) \
+ : #QD, #QM, #QN, "memory" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x\n", \
+ instruction, out[1], out[0], QMval, QNval); \
}
#define TESTINSN_bin_f(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \
printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
" Qn (" #QNtype ")0x%08x\n", \
instruction, out[1], out[0], QMval, QNval); \
+} \
+{ \
+ unsigned int out[2]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "vdup.i32 " #QD ", %3\n\t" \
+ "mov %4, %5\n\t" \
+ "vldmia %4!, {" #QM "}\n\t" \
+ "vdup." #QNtype " " #QN ", %2\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ : \
+ : "r" (out), "r" (QMval), "r" (QNval), "r"(0x3f800000), "r" (addr), "r" (mem) \
+ : #QD, #QM, #QN, "memory" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x\n", \
+ instruction, out[1], out[0], QMval, QNval); \
}
#define TESTINSN_tbl(instruction, QD, QM, QMtype, QMval, QN1, QN1type, QN1val, \
" Qn3 (" #QN3type ")0x%08x" \
" Qn4 (" #QN4type ")0x%08x\n", \
instruction, out[1], out[0], QMval, QN1val, QN2val, QN3val, QN4val); \
+} \
+{ \
+ unsigned int out[2]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %6, %7\n\t" \
+ "vmov.i8 " #QD ", #0x55" "\n\t" \
+ "vdup." #QMtype " " #QM ", %1\n\t" \
+ "vldmia %6!, {" #QN1 "}\n\t" \
+ "vdup." #QN2type " " #QN2 ", %3\n\t" \
+ "vldmia %6!, {" #QN3 "}\n\t" \
+ "vdup." #QN4type " " #QN4 ", %5\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ : \
+ : "r" (out), "r" (QMval), "r" (QN1val), "r" (QN2val), "r" (QN3val), \
+ "r" (QN4val), "r" (addr), "r" (mem) \
+ : #QD, #QM, #QN1, #QN2, #QN3, #QN4, "memory" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn1 (" #QN1type ")0x%08x" \
+ " Qn2 (" #QN2type ")0x%08x" \
+ " Qn3 (" #QN3type ")0x%08x" \
+ " Qn4 (" #QN4type ")0x%08x\n", \
+ instruction, out[1], out[0], QMval, QN1val, QN2val, QN3val, QN4val); \
}
+
#define TESTINSN_tbl_1(instruction, QD, QM, QMtype, QMval, QN1, QN1type, QN1val) \
TESTINSN_tbl(instruction, QD, QM, QMtype, QMval, QN1, QN1type, QN1val, \
QN1, QN1type, QN1val, QN1, QN1type, QN1val, QN1, QN1type, QN1val)
printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
" Qn (" #QNtype ")0x%08x fpscr: %08x\n", \
instruction, out[1], out[0], QMval, QNval, fpscr); \
+} \
+{ \
+ unsigned int out[2]; \
+ unsigned int fpscr; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "vmov.i8 " #QD ", #0x55" "\n\t" \
+ "mov r4, #0\n\t" \
+ MOVE_to_FPSCR_from_R4 \
+ "mov %4, %5\n\t" \
+ "vldmia %4!, {" #QM "}\n\t" \
+ "vdup." #QNtype " " #QN ", %3\n\t" \
+ instruction "\n\t" \
+ "vstmia %1, {" #QD "}\n\t" \
+ MOVE_to_R4_from_FPSCR \
+ "mov %0, r4" \
+ : "=r" (fpscr) \
+ : "r" (out), "r" (QMval), "r" (QNval), "r" (addr), "r" (mem) \
+ : #QD, #QM, #QN, "memory", "r4" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x fpscr: %08x\n", \
+ instruction, out[1], out[0], QMval, QNval, fpscr); \
}
#define TESTINSN_dual(instruction, QM, QMtype, QMval, QN, QNtype, QNval) \
{ \
- unsigned int out1[2]; \
- unsigned int out2[2]; \
-\
- __asm__ volatile( \
- "vdup." #QMtype " " #QM ", %2\n\t" \
- "vdup." #QNtype " " #QN ", %3\n\t" \
- instruction "\n\t" \
- "vstmia %0, {" #QM "}\n\t" \
- "vstmia %1, {" #QN "}\n\t" \
- : \
- : "r" (out1), "r" (out2), "r" (QMval), "r" (QNval) \
- : #QM, #QN, "memory" \
- ); \
- printf("%s :: Qm 0x%08x 0x%08x Qn 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
- " Qn (" #QNtype ")0x%08x\n", \
- instruction, out1[1], out1[0], out2[1], out2[0], QMval, QNval); \
-}
-
-// Ditto TESTING_bin(), but in QD all zeros
-#define TESTINSN_bin_0s(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \
+ unsigned int out1[2]; \
+ unsigned int out2[2]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %4, %5\n\t" \
+ "vldmia %4!, {" #QM "}\n\t" \
+ "vdup." #QNtype " " #QN ", %3\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QM "}\n\t" \
+ "vstmia %1, {" #QN "}\n\t" \
+ : \
+ : "r" (out1), "r" (out2), "r" (QMval), "r" (QNval), "r" (addr), "r" (mem) \
+ : #QM, #QN, "memory" \
+ ); \
+ printf("%s :: Qm 0x%08x 0x%08x Qn 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x\n", \
+ instruction, out1[1], out1[0], out2[1], out2[0], QMval, QNval); \
+} \
{ \
- unsigned int out[2]; \
-\
- __asm__ volatile( \
- "vmov.i8 " #QD ", #0x00" "\n\t" \
- "vdup." #QMtype " " #QM ", %1\n\t" \
- "vdup." #QNtype " " #QN ", %2\n\t" \
- instruction "\n\t" \
- "vstmia %0, {" #QD "}\n\t" \
- : \
- : "r" (out), "r" (QMval), "r" (QNval) \
- : #QD, #QM, #QN, "memory" \
- ); \
- printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
- " Qn (" #QNtype ")0x%08x\n", \
- instruction, out[1], out[0], QMval, QNval); \
+ unsigned int out1[2]; \
+ unsigned int out2[2]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %4, %5\n\t" \
+ "vldmia %4!, {" #QM "}\n\t" \
+ "vdup." #QNtype " " #QN ", %3\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QM "}\n\t" \
+ "vstmia %1, {" #QN "}\n\t" \
+ : \
+ : "r" (out1), "r" (out2), "r" (QMval), "r" (QNval), "r" (addr), "r" (mem) \
+ : #QM, #QN, "%4", "memory" \
+ ); \
+ printf("%s :: Qm 0x%08x 0x%08x Qn 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x\n", \
+ instruction, out1[1], out1[0], out2[1], out2[0], QMval, QNval); \
}
#if 0
----- VMOV (immediate) -----
vmov.i32 d0, #0x7 :: Qd 0x00000007 0x00000007
+vmov.i32 d0, #0x7 :: Qd 0x00000007 0x00000007
+vmov.i16 d1, #0x7 :: Qd 0x00070007 0x00070007
vmov.i16 d1, #0x7 :: Qd 0x00070007 0x00070007
vmov.i8 d2, #0x7 :: Qd 0x07070707 0x07070707
+vmov.i8 d2, #0x7 :: Qd 0x07070707 0x07070707
+vmov.i32 d5, #0x700 :: Qd 0x00000700 0x00000700
vmov.i32 d5, #0x700 :: Qd 0x00000700 0x00000700
vmov.i16 d7, #0x700 :: Qd 0x07000700 0x07000700
+vmov.i16 d7, #0x700 :: Qd 0x07000700 0x07000700
+vmov.i32 d10, #0x70000 :: Qd 0x00070000 0x00070000
vmov.i32 d10, #0x70000 :: Qd 0x00070000 0x00070000
vmov.i32 d12, #0x7000000 :: Qd 0x07000000 0x07000000
+vmov.i32 d12, #0x7000000 :: Qd 0x07000000 0x07000000
+vmov.i32 d13, #0x7FF :: Qd 0x000007ff 0x000007ff
vmov.i32 d13, #0x7FF :: Qd 0x000007ff 0x000007ff
vmov.i32 d14, #0x7FFFF :: Qd 0x0007ffff 0x0007ffff
+vmov.i32 d14, #0x7FFFF :: Qd 0x0007ffff 0x0007ffff
+vmov.i64 d15, #0xFF0000FF00FFFF00 :: Qd 0xff0000ff 0x00ffff00
vmov.i64 d15, #0xFF0000FF00FFFF00 :: Qd 0xff0000ff 0x00ffff00
----- VMVN (immediate) -----
vmvn.i32 d0, #0x7 :: Qd 0xfffffff8 0xfffffff8
+vmvn.i32 d0, #0x7 :: Qd 0xfffffff8 0xfffffff8
+vmvn.i16 d1, #0x7 :: Qd 0xfff8fff8 0xfff8fff8
vmvn.i16 d1, #0x7 :: Qd 0xfff8fff8 0xfff8fff8
vmvn.i8 d2, #0x7 :: Qd 0xf8f8f8f8 0xf8f8f8f8
+vmvn.i8 d2, #0x7 :: Qd 0xf8f8f8f8 0xf8f8f8f8
+vmvn.i32 d5, #0x700 :: Qd 0xfffff8ff 0xfffff8ff
vmvn.i32 d5, #0x700 :: Qd 0xfffff8ff 0xfffff8ff
vmvn.i16 d7, #0x700 :: Qd 0xf8fff8ff 0xf8fff8ff
+vmvn.i16 d7, #0x700 :: Qd 0xf8fff8ff 0xf8fff8ff
+vmvn.i32 d10, #0x70000 :: Qd 0xfff8ffff 0xfff8ffff
vmvn.i32 d10, #0x70000 :: Qd 0xfff8ffff 0xfff8ffff
vmvn.i32 d13, #0x7000000 :: Qd 0xf8ffffff 0xf8ffffff
+vmvn.i32 d13, #0x7000000 :: Qd 0xf8ffffff 0xf8ffffff
+vmvn.i32 d11, #0x7FF :: Qd 0xfffff800 0xfffff800
vmvn.i32 d11, #0x7FF :: Qd 0xfffff800 0xfffff800
vmvn.i32 d14, #0x7FFFF :: Qd 0xfff80000 0xfff80000
+vmvn.i32 d14, #0x7FFFF :: Qd 0xfff80000 0xfff80000
+vmvn.i64 d15, #0xFF0000FF00FFFF00 :: Qd 0x00ffff00 0xff0000ff
vmvn.i64 d15, #0xFF0000FF00FFFF00 :: Qd 0x00ffff00 0xff0000ff
----- VORR (immediate) -----
vorr.i32 d0, #0x7 :: Qd 0x55555557 0x55555557
+vorr.i32 d0, #0x7 :: Qd 0x131b1a1f 0x121f1e1f
vorr.i16 d2, #0x7 :: Qd 0x55575557 0x55575557
+vorr.i16 d2, #0x7 :: Qd 0x131f1a1f 0x121f1e1f
vorr.i32 d8, #0x700 :: Qd 0x55555755 0x55555755
+vorr.i32 d8, #0x700 :: Qd 0x131b1f1b 0x121f1f1f
vorr.i16 d6, #0x700 :: Qd 0x57555755 0x57555755
+vorr.i16 d6, #0x700 :: Qd 0x171b1f1b 0x171f1f1f
vorr.i32 d14, #0x70000 :: Qd 0x55575555 0x55575555
+vorr.i32 d14, #0x70000 :: Qd 0x131f1a1b 0x121f1e1f
vorr.i32 d15, #0x7000000 :: Qd 0x57555555 0x57555555
+vorr.i32 d15, #0x7000000 :: Qd 0x171b1a1b 0x171f1e1f
----- VBIC (immediate) -----
vbic.i32 d0, #0x7 :: Qd 0x55555550 0x55555550
+vbic.i32 d0, #0x7 :: Qd 0x131b1a18 0x121f1e18
vbic.i16 d3, #0x7 :: Qd 0x55505550 0x55505550
+vbic.i16 d3, #0x7 :: Qd 0x13181a18 0x12181e18
vbic.i32 d5, #0x700 :: Qd 0x55555055 0x55555055
+vbic.i32 d5, #0x700 :: Qd 0x131b181b 0x121f181f
vbic.i16 d8, #0x700 :: Qd 0x50555055 0x50555055
+vbic.i16 d8, #0x700 :: Qd 0x101b181b 0x101f181f
vbic.i32 d10, #0x70000 :: Qd 0x55505555 0x55505555
+vbic.i32 d10, #0x70000 :: Qd 0x13181a1b 0x12181e1f
vbic.i32 d15, #0x7000000 :: Qd 0x50555555 0x50555555
+vbic.i32 d15, #0x7000000 :: Qd 0x101b1a1b 0x101f1e1f
---- VMVN (register) ----
vmvn d0, d1 :: Qd 0xffffffe7 0xffffffe7 Qm (i32)0x00000018
+vmvn d0, d1 :: Qd 0xeae2e6e2 0xebe3e0e3 Qm (i32)0x00000018
vmvn d10, d15 :: Qd 0xffffffe7 0xffffffe7 Qm (i32)0x00000018
+vmvn d10, d15 :: Qd 0xeae2e6e2 0xebe3e0e3 Qm (i32)0x00000018
vmvn d0, d14 :: Qd 0xffffffe7 0xffffffe7 Qm (i32)0x00000018
+vmvn d0, d14 :: Qd 0xeae2e6e2 0xebe3e0e3 Qm (i32)0x00000018
---- VMOV (register) ----
vmov d0, d1 :: Qd 0x00000018 0x00000018 Qm (i32)0x00000018
+vmov d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000018
vmov d10, d15 :: Qd 0x00000018 0x00000018 Qm (i32)0x00000018
+vmov d10, d15 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000018
vmov d0, d14 :: Qd 0x00000018 0x00000018 Qm (i32)0x00000018
+vmov d0, d14 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000018
---- VDUP (ARM core register) (tested indirectly) ----
vmov d0, d1 :: Qd 0x07070707 0x07070707 Qm (i8)0x00000007
+vmov d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i8)0x00000007
vmov d10, d11 :: Qd 0x00070007 0x00070007 Qm (i16)0x00000007
+vmov d10, d11 :: Qd 0x151d191d 0x141c1f1c Qm (i16)0x00000007
vmov d0, d15 :: Qd 0x00000007 0x00000007 Qm (i32)0x00000007
+vmov d0, d15 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000007
---- VADD ----
vadd.i32 d0, d1, d2 :: Qd 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078
+vadd.i32 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078
vadd.i64 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078
+vadd.i64 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078
vadd.i32 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078
+vadd.i32 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078
vadd.i16 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078
+vadd.i16 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078
vadd.i8 d0, d1, d2 :: Qd 0x00000004 0x00000004 Qm (i32)0x0000008c Qn (i32)0x00000078
+vadd.i8 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078
vadd.i8 d0, d1, d2 :: Qd 0x00000003 0x00000003 Qm (i32)0x80000001 Qn (i32)0x80000002
+vadd.i8 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002
vadd.i16 d0, d1, d2 :: Qd 0x00000003 0x00000003 Qm (i32)0x80000001 Qn (i32)0x80000002
+vadd.i16 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002
vadd.i32 d0, d1, d2 :: Qd 0x00000003 0x00000003 Qm (i32)0x80000001 Qn (i32)0x80000002
+vadd.i32 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002
vadd.i64 d0, d1, d2 :: Qd 0x00000004 0x00000003 Qm (i32)0x80000001 Qn (i32)0x80000002
+vadd.i64 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002
vadd.i32 d10, d11, d12 :: Qd 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078
+vadd.i32 d10, d11, d12 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078
vadd.i64 d13, d14, d15 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078
+vadd.i64 d13, d14, d15 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078
---- VSUB ----
vsub.i32 d0, d1, d2 :: Qd 0xffffffa0 0xffffffa0 Qm (i32)0x00000018 Qn (i32)0x00000078
+vsub.i32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078
vsub.i64 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vsub.i64 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078
vsub.i32 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vsub.i32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078
vsub.i16 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vsub.i16 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078
vsub.i8 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vsub.i8 d0, d1, d2 :: Qd 0x131b1aa3 0x121f1ea7 Qm (i32)0x0000008c Qn (i32)0x00000078
vsub.i8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x80000002
+vsub.i8 d0, d1, d2 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vsub.i16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000002
+vsub.i16 d0, d1, d2 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vsub.i32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002
+vsub.i32 d0, d1, d2 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vsub.i64 d0, d1, d2 :: Qd 0xfffffffe 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002
+vsub.i64 d0, d1, d2 :: Qd 0x931b1a18 0x921f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vsub.i32 d10, d11, d12 :: Qd 0xffffffa0 0xffffffa0 Qm (i32)0x00000018 Qn (i32)0x00000078
+vsub.i32 d10, d11, d12 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078
vsub.i64 d13, d14, d15 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vsub.i64 d13, d14, d15 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078
---- VAND ----
vand d0, d1, d2 :: Qd 0x00240024 0x00240024 Qm (i8)0x00000024 Qn (i16)0x00000077
+vand d0, d1, d2 :: Qd 0x00130013 0x00170017 Qm (i8)0x00000024 Qn (i16)0x00000077
vand d4, d6, d5 :: Qd 0x00570057 0x00570057 Qm (i8)0x000000ff Qn (i16)0x00000057
+vand d4, d6, d5 :: Qd 0x00130013 0x00170017 Qm (i8)0x000000ff Qn (i16)0x00000057
vand d10, d11, d12 :: Qd 0xecececec 0xecececec Qm (i8)0x000000fe Qn (i8)0x000000ed
+vand d10, d11, d12 :: Qd 0x01090809 0x000d0c0d Qm (i8)0x000000fe Qn (i8)0x000000ed
+vand d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
vand d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
---- VBIC ----
vbic d0, d1, d2 :: Qd 0x24002400 0x24002400 Qm (i8)0x00000024 Qn (i16)0x00000077
+vbic d0, d1, d2 :: Qd 0x13081a08 0x12081e08 Qm (i8)0x00000024 Qn (i16)0x00000077
vbic d4, d6, d5 :: Qd 0xffa8ffa8 0xffa8ffa8 Qm (i8)0x000000ff Qn (i16)0x00000057
+vbic d4, d6, d5 :: Qd 0x13081a08 0x12081e08 Qm (i8)0x000000ff Qn (i16)0x00000057
+vbic d10, d11, d12 :: Qd 0x12121212 0x12121212 Qm (i8)0x000000fe Qn (i8)0x000000ed
vbic d10, d11, d12 :: Qd 0x12121212 0x12121212 Qm (i8)0x000000fe Qn (i8)0x000000ed
vbic d15, d15, d15 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff Qn (i8)0x000000ff
+vbic d15, d15, d15 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff Qn (i8)0x000000ff
---- VORR ----
vorr d0, d1, d2 :: Qd 0x24772477 0x24772477 Qm (i8)0x00000024 Qn (i16)0x00000073
+vorr d0, d1, d2 :: Qd 0x137b1a7b 0x127f1e7f Qm (i8)0x00000024 Qn (i16)0x00000073
vorr d7, d3, d0 :: Qd 0x24ff24ff 0x24ff24ff Qm (i8)0x00000024 Qn (i16)0x000000ff
+vorr d7, d3, d0 :: Qd 0x13ff1aff 0x12ff1eff Qm (i8)0x00000024 Qn (i16)0x000000ff
+vorr d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vorr d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vorr d2, d3, d15 :: Qd 0x0000003f 0x0000003f Qm (i32)0x00000024 Qn (i32)0x0000001f
+vorr d2, d3, d15 :: Qd 0x131b1a1f 0x121f1e1f Qm (i32)0x00000024 Qn (i32)0x0000001f
---- VORN ----
vorn d0, d1, d2 :: Qd 0xffacffac 0xffacffac Qm (i8)0x00000024 Qn (i16)0x00000073
+vorn d0, d1, d2 :: Qd 0xff9fff9f 0xff9fff9f Qm (i8)0x00000024 Qn (i16)0x00000073
vorn d7, d3, d0 :: Qd 0xff24ff24 0xff24ff24 Qm (i8)0x00000024 Qn (i16)0x000000ff
+vorn d7, d3, d0 :: Qd 0xff1bff1b 0xff1fff1f Qm (i8)0x00000024 Qn (i16)0x000000ff
+vorn d4, d4, d4 :: Qd 0xffffffff 0xffffffff Qm (i16)0x000000ff Qn (i16)0x000000ff
vorn d4, d4, d4 :: Qd 0xffffffff 0xffffffff Qm (i16)0x000000ff Qn (i16)0x000000ff
vorn d2, d3, d15 :: Qd 0xffffffe4 0xffffffe4 Qm (i32)0x00000024 Qn (i32)0x0000001f
+vorn d2, d3, d15 :: Qd 0xfffffffb 0xffffffff Qm (i32)0x00000024 Qn (i32)0x0000001f
---- VEOR ----
veor d0, d1, d2 :: Qd 0x24532453 0x24532453 Qm (i8)0x00000024 Qn (i16)0x00000077
+veor d0, d1, d2 :: Qd 0x136c1a6c 0x12681e68 Qm (i8)0x00000024 Qn (i16)0x00000077
veor d4, d6, d5 :: Qd 0xffa8ffa8 0xffa8ffa8 Qm (i8)0x000000ff Qn (i16)0x00000057
+veor d4, d6, d5 :: Qd 0x134c1a4c 0x12481e48 Qm (i8)0x000000ff Qn (i16)0x00000057
veor d10, d11, d12 :: Qd 0x13131313 0x13131313 Qm (i8)0x000000fe Qn (i8)0x000000ed
+veor d10, d11, d12 :: Qd 0xfef6f7f6 0xfff2f3f2 Qm (i8)0x000000fe Qn (i8)0x000000ed
+veor d15, d15, d15 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff Qn (i8)0x000000ff
veor d15, d15, d15 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff Qn (i8)0x000000ff
veor d0, d1, d2 :: Qd 0x24572457 0x24572457 Qm (i8)0x00000024 Qn (i16)0x00000073
+veor d0, d1, d2 :: Qd 0x13681a68 0x126c1e6c Qm (i8)0x00000024 Qn (i16)0x00000073
veor d7, d3, d0 :: Qd 0x24db24db 0x24db24db Qm (i8)0x00000024 Qn (i16)0x000000ff
+veor d7, d3, d0 :: Qd 0x13e41ae4 0x12e01ee0 Qm (i8)0x00000024 Qn (i16)0x000000ff
+veor d4, d4, d4 :: Qd 0x00000000 0x00000000 Qm (i16)0x000000ff Qn (i16)0x000000ff
veor d4, d4, d4 :: Qd 0x00000000 0x00000000 Qm (i16)0x000000ff Qn (i16)0x000000ff
veor d2, d3, d15 :: Qd 0x0000003b 0x0000003b Qm (i32)0x00000024 Qn (i32)0x0000001f
+veor d2, d3, d15 :: Qd 0x131b1a04 0x121f1e00 Qm (i32)0x00000024 Qn (i32)0x0000001f
---- VBSL ----
vbsl d0, d1, d2 :: Qd 0x04260426 0x04260426 Qm (i8)0x00000024 Qn (i16)0x00000077
+vbsl d0, d1, d2 :: Qd 0x11331033 0x10371437 Qm (i8)0x00000024 Qn (i16)0x00000077
vbsl d4, d6, d5 :: Qd 0x55575557 0x55575557 Qm (i8)0x000000ff Qn (i16)0x00000057
+vbsl d4, d6, d5 :: Qd 0x11131013 0x10171417 Qm (i8)0x000000ff Qn (i16)0x00000057
vbsl d10, d11, d12 :: Qd 0xfcfcfcfc 0xfcfcfcfc Qm (i8)0x000000fe Qn (i8)0x000000ed
+vbsl d10, d11, d12 :: Qd 0xb9b9b8b9 0xb8bdbcbd Qm (i8)0x000000fe Qn (i8)0x000000ed
+vbsl d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
vbsl d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
vbsl d0, d1, d2 :: Qd 0x04260426 0x04260426 Qm (i8)0x00000024 Qn (i16)0x00000073
+vbsl d0, d1, d2 :: Qd 0x11331033 0x10371437 Qm (i8)0x00000024 Qn (i16)0x00000073
vbsl d7, d3, d0 :: Qd 0x04ae04ae 0x04ae04ae Qm (i8)0x00000024 Qn (i16)0x000000ff
+vbsl d7, d3, d0 :: Qd 0x11bb10bb 0x10bf14bf Qm (i8)0x00000024 Qn (i16)0x000000ff
+vbsl d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vbsl d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vbsl d2, d3, d15 :: Qd 0x0000000e 0x0000000e Qm (i32)0x00000024 Qn (i32)0x0000001f
+vbsl d2, d3, d15 :: Qd 0x1111101b 0x1015141f Qm (i32)0x00000024 Qn (i32)0x0000001f
---- VBIT ----
vbit d0, d1, d2 :: Qd 0x55245524 0x55245524 Qm (i8)0x00000024 Qn (i16)0x00000077
+vbit d0, d1, d2 :: Qd 0x55135513 0x55175517 Qm (i8)0x00000024 Qn (i16)0x00000077
vbit d4, d6, d5 :: Qd 0x55575557 0x55575557 Qm (i8)0x000000ff Qn (i16)0x00000057
+vbit d4, d6, d5 :: Qd 0x55135513 0x55175517 Qm (i8)0x000000ff Qn (i16)0x00000057
vbit d10, d11, d12 :: Qd 0xfcfcfcfc 0xfcfcfcfc Qm (i8)0x000000fe Qn (i8)0x000000ed
+vbit d10, d11, d12 :: Qd 0x11191819 0x101d1c1d Qm (i8)0x000000fe Qn (i8)0x000000ed
+vbit d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
vbit d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
vbit d0, d1, d2 :: Qd 0x55245524 0x55245524 Qm (i8)0x00000024 Qn (i16)0x00000073
+vbit d0, d1, d2 :: Qd 0x55175517 0x55175517 Qm (i8)0x00000024 Qn (i16)0x00000073
vbit d7, d3, d0 :: Qd 0x55245524 0x55245524 Qm (i8)0x00000024 Qn (i16)0x000000ff
+vbit d7, d3, d0 :: Qd 0x551b551b 0x551f551f Qm (i8)0x00000024 Qn (i16)0x000000ff
+vbit d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vbit d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vbit d2, d3, d15 :: Qd 0x55555544 0x55555544 Qm (i32)0x00000024 Qn (i32)0x0000001f
+vbit d2, d3, d15 :: Qd 0x5555555b 0x5555555f Qm (i32)0x00000024 Qn (i32)0x0000001f
---- VBIF ----
vbif d0, d1, d2 :: Qd 0x24552455 0x24552455 Qm (i8)0x00000024 Qn (i16)0x00000077
+vbif d0, d1, d2 :: Qd 0x135d1a5d 0x125d1e5d Qm (i8)0x00000024 Qn (i16)0x00000077
vbif d4, d6, d5 :: Qd 0xfffdfffd 0xfffdfffd Qm (i8)0x000000ff Qn (i16)0x00000057
+vbif d4, d6, d5 :: Qd 0x135d1a5d 0x125d1e5d Qm (i8)0x000000ff Qn (i16)0x00000057
+vbif d10, d11, d12 :: Qd 0x57575757 0x57575757 Qm (i8)0x000000fe Qn (i8)0x000000ed
vbif d10, d11, d12 :: Qd 0x57575757 0x57575757 Qm (i8)0x000000fe Qn (i8)0x000000ed
vbif d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
+vbif d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
vbif d0, d1, d2 :: Qd 0x24552455 0x24552455 Qm (i8)0x00000024 Qn (i16)0x00000073
+vbif d0, d1, d2 :: Qd 0x13591a59 0x125d1e5d Qm (i8)0x00000024 Qn (i16)0x00000073
vbif d7, d3, d0 :: Qd 0x24552455 0x24552455 Qm (i8)0x00000024 Qn (i16)0x000000ff
+vbif d7, d3, d0 :: Qd 0x13551a55 0x12551e55 Qm (i8)0x00000024 Qn (i16)0x000000ff
+vbif d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vbif d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vbif d2, d3, d15 :: Qd 0x00000035 0x00000035 Qm (i32)0x00000024 Qn (i32)0x0000001f
+vbif d2, d3, d15 :: Qd 0x131b1a15 0x121f1e15 Qm (i32)0x00000024 Qn (i32)0x0000001f
---- VEXT ----
vext.8 d0, d1, d2, #0 :: Qd 0x77777777 0x77777777 Qm (i8)0x00000077 Qn (i8)0x000000ff
+vext.8 d0, d1, d2, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i8)0x00000077 Qn (i8)0x000000ff
vext.8 d0, d1, d2, #1 :: Qd 0xff777777 0x77777777 Qm (i8)0x00000077 Qn (i8)0x000000ff
+vext.8 d0, d1, d2, #1 :: Qd 0xff131b1a 0x1b121f1e Qm (i8)0x00000077 Qn (i8)0x000000ff
vext.8 d0, d1, d2, #7 :: Qd 0xffffffff 0xffffff77 Qm (i8)0x00000077 Qn (i8)0x000000ff
+vext.8 d0, d1, d2, #7 :: Qd 0xffffffff 0xffffff13 Qm (i8)0x00000077 Qn (i8)0x000000ff
vext.8 d0, d1, d2, #6 :: Qd 0xffffffff 0xffff7777 Qm (i8)0x00000077 Qn (i8)0x000000ff
+vext.8 d0, d1, d2, #6 :: Qd 0xffffffff 0xffff131b Qm (i8)0x00000077 Qn (i8)0x000000ff
vext.8 d10, d11, d12, #4 :: Qd 0xffffffff 0x77777777 Qm (i8)0x00000077 Qn (i8)0x000000ff
+vext.8 d10, d11, d12, #4 :: Qd 0xffffffff 0x131b1a1b Qm (i8)0x00000077 Qn (i8)0x000000ff
vext.8 d0, d5, d15, #5 :: Qd 0xffffffff 0xff777777 Qm (i8)0x00000077 Qn (i8)0x000000ff
+vext.8 d0, d5, d15, #5 :: Qd 0xffffffff 0xff131b1a Qm (i8)0x00000077 Qn (i8)0x000000ff
---- VHADD ----
vhadd.s32 d0, d1, d2 :: Qd 0x00000048 0x00000048 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhadd.s32 d0, d1, d2 :: Qd 0x098d8d49 0x090f8f4b Qm (i32)0x00000018 Qn (i32)0x00000078
vhadd.s32 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vhadd.s32 d0, d1, d2 :: Qd 0x098d8d49 0x090f8f4b Qm (i32)0x0000008c Qn (i32)0x00000078
vhadd.s16 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vhadd.s16 d0, d1, d2 :: Qd 0x098d0d49 0x090f0f4b Qm (i32)0x0000008c Qn (i32)0x00000078
vhadd.s8 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x0000008c Qn (i32)0x00000078
+vhadd.s8 d0, d1, d2 :: Qd 0x090d0d49 0x090f0f4b Qm (i32)0x0000008c Qn (i32)0x00000078
vhadd.s8 d0, d1, d2 :: Qd 0x03030303 0x03030303 Qm (i8)0x0000008d Qn (i8)0x00000079
+vhadd.s8 d0, d1, d2 :: Qd 0x464a494a 0x454c4b4c Qm (i8)0x0000008d Qn (i8)0x00000079
vhadd.s8 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vhadd.s8 d0, d1, d2 :: Qd 0xc90d0d0e 0xc90f0f10 Qm (i32)0x80000001 Qn (i32)0x80000002
vhadd.s16 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vhadd.s16 d0, d1, d2 :: Qd 0xc98d0d0e 0xc90f0f10 Qm (i32)0x80000001 Qn (i32)0x80000002
vhadd.s32 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vhadd.s32 d0, d1, d2 :: Qd 0xc98d8d0e 0xc90f8f10 Qm (i32)0x80000001 Qn (i32)0x80000002
vhadd.s32 d10, d11, d12 :: Qd 0x00000048 0x00000048 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhadd.s32 d10, d11, d12 :: Qd 0x098d8d49 0x090f8f4b Qm (i32)0x00000018 Qn (i32)0x00000078
vhadd.u32 d0, d1, d2 :: Qd 0x00000048 0x00000048 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhadd.u32 d0, d1, d2 :: Qd 0x098d8d49 0x090f8f4b Qm (i32)0x00000018 Qn (i32)0x00000078
vhadd.u32 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vhadd.u32 d0, d1, d2 :: Qd 0x098d8d49 0x090f8f4b Qm (i32)0x0000008c Qn (i32)0x00000078
vhadd.u16 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vhadd.u16 d0, d1, d2 :: Qd 0x098d0d49 0x090f0f4b Qm (i32)0x0000008c Qn (i32)0x00000078
vhadd.u8 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vhadd.u8 d0, d1, d2 :: Qd 0x090d0d49 0x090f0f4b Qm (i32)0x0000008c Qn (i32)0x00000078
vhadd.u8 d0, d1, d2 :: Qd 0x83838383 0x83838383 Qm (i8)0x0000008d Qn (i8)0x00000079
+vhadd.u8 d0, d1, d2 :: Qd 0x464a494a 0x454c4b4c Qm (i8)0x0000008d Qn (i8)0x00000079
vhadd.u8 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vhadd.u8 d0, d1, d2 :: Qd 0x490d0d0e 0x490f0f10 Qm (i32)0x80000001 Qn (i32)0x80000002
vhadd.u16 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vhadd.u16 d0, d1, d2 :: Qd 0x498d0d0e 0x490f0f10 Qm (i32)0x80000001 Qn (i32)0x80000002
vhadd.u32 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vhadd.u32 d0, d1, d2 :: Qd 0x498d8d0e 0x490f8f10 Qm (i32)0x80000001 Qn (i32)0x80000002
vhadd.u32 d10, d11, d12 :: Qd 0x00000048 0x00000048 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhadd.u32 d10, d11, d12 :: Qd 0x098d8d49 0x090f8f4b Qm (i32)0x00000018 Qn (i32)0x00000078
---- VHSUB ----
vhsub.s32 d0, d1, d2 :: Qd 0xffffffd0 0xffffffd0 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhsub.s32 d0, d1, d2 :: Qd 0x098d8cd1 0x090f8ed3 Qm (i32)0x00000018 Qn (i32)0x00000078
vhsub.s32 d0, d1, d2 :: Qd 0x0000000a 0x0000000a Qm (i32)0x0000008c Qn (i32)0x00000078
+vhsub.s32 d0, d1, d2 :: Qd 0x098d8cd1 0x090f8ed3 Qm (i32)0x0000008c Qn (i32)0x00000078
vhsub.s16 d0, d1, d2 :: Qd 0x0000000a 0x0000000a Qm (i32)0x0000008c Qn (i32)0x00000078
+vhsub.s16 d0, d1, d2 :: Qd 0x098d0cd1 0x090f0ed3 Qm (i32)0x0000008c Qn (i32)0x00000078
vhsub.s8 d0, d1, d2 :: Qd 0x0000008a 0x0000008a Qm (i32)0x0000008c Qn (i32)0x00000078
+vhsub.s8 d0, d1, d2 :: Qd 0x090d0dd1 0x090f0fd3 Qm (i32)0x0000008c Qn (i32)0x00000078
vhsub.s8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x80000002
+vhsub.s8 d0, d1, d2 :: Qd 0x490d0d0c 0x490f0f0e Qm (i32)0x80000001 Qn (i32)0x80000002
vhsub.s16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000002
+vhsub.s16 d0, d1, d2 :: Qd 0x498d0d0c 0x490f0f0e Qm (i32)0x80000001 Qn (i32)0x80000002
vhsub.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002
+vhsub.s32 d0, d1, d2 :: Qd 0x498d8d0c 0x490f8f0e Qm (i32)0x80000001 Qn (i32)0x80000002
vhsub.s32 d10, d11, d12 :: Qd 0xffffffd0 0xffffffd0 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhsub.s32 d10, d11, d12 :: Qd 0x098d8cd1 0x090f8ed3 Qm (i32)0x00000018 Qn (i32)0x00000078
vhsub.u32 d0, d1, d2 :: Qd 0xffffffd0 0xffffffd0 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhsub.u32 d0, d1, d2 :: Qd 0x098d8cd1 0x090f8ed3 Qm (i32)0x00000018 Qn (i32)0x00000078
vhsub.u32 d0, d1, d2 :: Qd 0x0000000a 0x0000000a Qm (i32)0x0000008c Qn (i32)0x00000078
+vhsub.u32 d0, d1, d2 :: Qd 0x098d8cd1 0x090f8ed3 Qm (i32)0x0000008c Qn (i32)0x00000078
vhsub.u16 d0, d1, d2 :: Qd 0x0000000a 0x0000000a Qm (i32)0x0000008c Qn (i32)0x00000078
+vhsub.u16 d0, d1, d2 :: Qd 0x098d0cd1 0x090f0ed3 Qm (i32)0x0000008c Qn (i32)0x00000078
vhsub.u8 d0, d1, d2 :: Qd 0x0000000a 0x0000000a Qm (i32)0x0000008c Qn (i32)0x00000078
+vhsub.u8 d0, d1, d2 :: Qd 0x090d0dd1 0x090f0fd3 Qm (i32)0x0000008c Qn (i32)0x00000078
vhsub.u8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x80000002
+vhsub.u8 d0, d1, d2 :: Qd 0xc90d0d0c 0xc90f0f0e Qm (i32)0x80000001 Qn (i32)0x80000002
vhsub.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000002
+vhsub.u16 d0, d1, d2 :: Qd 0xc98d0d0c 0xc90f0f0e Qm (i32)0x80000001 Qn (i32)0x80000002
vhsub.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002
+vhsub.u32 d0, d1, d2 :: Qd 0xc98d8d0c 0xc90f8f0e Qm (i32)0x80000001 Qn (i32)0x80000002
vhsub.u32 d10, d11, d12 :: Qd 0xffffffd0 0xffffffd0 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhsub.u32 d10, d11, d12 :: Qd 0x098d8cd1 0x090f8ed3 Qm (i32)0x00000018 Qn (i32)0x00000078
---- VQADD ----
vqadd.s32 d0, d1, d2 :: Qd 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqadd.s32 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.s16 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s16 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.s8 d0, d1, d2 :: Qd 0x00000004 0x00000004 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s8 d0, d1, d2 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
vqadd.s8 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.s8 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.s16 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.s16 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.s32 d0, d1, d2 :: Qd 0x80000000 0x80000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.s32 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.s32 d10, d11, d12 :: Qd 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 d10, d11, d12 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqadd.u32 d0, d1, d2 :: Qd 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqadd.u32 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.u16 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u16 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.u8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
+vqadd.u8 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.u8 d0, d1, d2 :: Qd 0xff000003 0xff000003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.u8 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.u16 d0, d1, d2 :: Qd 0xffff0003 0xffff0003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.u16 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.u32 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.u32 d10, d11, d12 :: Qd 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 d10, d11, d12 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
---- VQSUB ----
vqsub.s32 d0, d1, d2 :: Qd 0xffffffa0 0xffffffa0 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqsub.s32 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.s16 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s16 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.s8 d0, d1, d2 :: Qd 0x00000080 0x00000080 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
+vqsub.s8 d0, d1, d2 :: Qd 0x131b1aa3 0x121f1ea7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.s8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqsub.s8 d0, d1, d2 :: Qd 0x7f1b1a19 0x7f1f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.s16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqsub.s16 d0, d1, d2 :: Qd 0x7fff1a19 0x7fff1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqsub.s32 d0, d1, d2 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.s32 d10, d11, d12 :: Qd 0xffffffa0 0xffffffa0 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 d10, d11, d12 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqsub.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqsub.u32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqsub.u32 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.u16 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u16 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.u8 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u8 d0, d1, d2 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
vqsub.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u8 d0, d1, d2 :: Qd 0x001b1a19 0x001f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.u16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u16 d0, d1, d2 :: Qd 0x00001a19 0x00001e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.u32 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqsub.u32 d10, d11, d12 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
---- VRHADD ----
vrhadd.s32 d0, d1, d2 :: Qd 0x00000049 0x00000049 Qm (i32)0x00000019 Qn (i32)0x00000078
+vrhadd.s32 d0, d1, d2 :: Qd 0x098d8d4a 0x090f8f4c Qm (i32)0x00000019 Qn (i32)0x00000078
vrhadd.s32 d0, d1, d2 :: Qd 0x00000049 0x00000049 Qm (i32)0x00000019 Qn (i32)0x00000079
+vrhadd.s32 d0, d1, d2 :: Qd 0x098d8d4a 0x090f8f4c Qm (i32)0x00000019 Qn (i32)0x00000079
vrhadd.s32 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vrhadd.s32 d0, d1, d2 :: Qd 0x098d8d4a 0x090f8f4c Qm (i32)0x0000008c Qn (i32)0x00000078
vrhadd.s16 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vrhadd.s16 d0, d1, d2 :: Qd 0x098e0d4a 0x09100f4c Qm (i32)0x0000008c Qn (i32)0x00000078
vrhadd.s8 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x0000008c Qn (i32)0x00000078
+vrhadd.s8 d0, d1, d2 :: Qd 0x0a0e0d4a 0x09100f4c Qm (i32)0x0000008c Qn (i32)0x00000078
vrhadd.s8 d5, d7, d5 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vrhadd.s8 d5, d7, d5 :: Qd 0xca0e0d0f 0xc9100f11 Qm (i32)0x80000001 Qn (i32)0x80000002
vrhadd.s16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vrhadd.s16 d0, d1, d2 :: Qd 0xc98e0d0f 0xc9100f11 Qm (i32)0x80000001 Qn (i32)0x80000002
vrhadd.s32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vrhadd.s32 d0, d1, d2 :: Qd 0xc98d8d0f 0xc90f8f11 Qm (i32)0x80000001 Qn (i32)0x80000002
vrhadd.s8 d5, d7, d5 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vrhadd.s8 d5, d7, d5 :: Qd 0xca0e0d0f 0xc9100f11 Qm (i32)0x80000001 Qn (i32)0x80000003
vrhadd.s16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vrhadd.s16 d0, d1, d2 :: Qd 0xc98e0d0f 0xc9100f11 Qm (i32)0x80000001 Qn (i32)0x80000003
vrhadd.s32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vrhadd.s32 d0, d1, d2 :: Qd 0xc98d8d0f 0xc90f8f11 Qm (i32)0x80000001 Qn (i32)0x80000003
vrhadd.s8 d5, d7, d5 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000004 Qn (i32)0x80000002
+vrhadd.s8 d5, d7, d5 :: Qd 0xca0e0d0f 0xc9100f11 Qm (i32)0x80000004 Qn (i32)0x80000002
vrhadd.s16 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000004 Qn (i32)0x80000002
+vrhadd.s16 d0, d1, d2 :: Qd 0xc98e0d0f 0xc9100f11 Qm (i32)0x80000004 Qn (i32)0x80000002
vrhadd.s32 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000004 Qn (i32)0x80000002
+vrhadd.s32 d0, d1, d2 :: Qd 0xc98d8d0f 0xc90f8f11 Qm (i32)0x80000004 Qn (i32)0x80000002
vrhadd.s32 d10, d11, d12 :: Qd 0x00000048 0x00000048 Qm (i32)0x00000018 Qn (i32)0x00000078
+vrhadd.s32 d10, d11, d12 :: Qd 0x098d8d4a 0x090f8f4c Qm (i32)0x00000018 Qn (i32)0x00000078
vrhadd.u32 d0, d1, d2 :: Qd 0x00000049 0x00000049 Qm (i32)0x00000019 Qn (i32)0x00000078
+vrhadd.u32 d0, d1, d2 :: Qd 0x098d8d4a 0x090f8f4c Qm (i32)0x00000019 Qn (i32)0x00000078
vrhadd.u32 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vrhadd.u32 d0, d1, d2 :: Qd 0x098d8d4a 0x090f8f4c Qm (i32)0x0000008c Qn (i32)0x00000078
vrhadd.u16 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vrhadd.u16 d0, d1, d2 :: Qd 0x098e0d4a 0x09100f4c Qm (i32)0x0000008c Qn (i32)0x00000078
vrhadd.u8 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vrhadd.u8 d0, d1, d2 :: Qd 0x0a0e0d4a 0x09100f4c Qm (i32)0x0000008c Qn (i32)0x00000078
vrhadd.u8 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vrhadd.u8 d0, d1, d2 :: Qd 0x4a0e0d0f 0x49100f11 Qm (i32)0x80000001 Qn (i32)0x80000002
vrhadd.u16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vrhadd.u16 d0, d1, d2 :: Qd 0x498e0d0f 0x49100f11 Qm (i32)0x80000001 Qn (i32)0x80000002
vrhadd.u32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vrhadd.u32 d0, d1, d2 :: Qd 0x498d8d0f 0x490f8f11 Qm (i32)0x80000001 Qn (i32)0x80000002
vrhadd.u8 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vrhadd.u8 d0, d1, d2 :: Qd 0x4a0e0d0f 0x49100f11 Qm (i32)0x80000001 Qn (i32)0x80000003
vrhadd.u16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vrhadd.u16 d0, d1, d2 :: Qd 0x498e0d0f 0x49100f11 Qm (i32)0x80000001 Qn (i32)0x80000003
vrhadd.u32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vrhadd.u32 d0, d1, d2 :: Qd 0x498d8d0f 0x490f8f11 Qm (i32)0x80000001 Qn (i32)0x80000003
vrhadd.u8 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000004 Qn (i32)0x80000002
+vrhadd.u8 d0, d1, d2 :: Qd 0x4a0e0d0f 0x49100f11 Qm (i32)0x80000004 Qn (i32)0x80000002
vrhadd.u16 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000004 Qn (i32)0x80000002
+vrhadd.u16 d0, d1, d2 :: Qd 0x498e0d0f 0x49100f11 Qm (i32)0x80000004 Qn (i32)0x80000002
vrhadd.u32 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000004 Qn (i32)0x80000002
+vrhadd.u32 d0, d1, d2 :: Qd 0x498d8d0f 0x490f8f11 Qm (i32)0x80000004 Qn (i32)0x80000002
vrhadd.u32 d10, d11, d12 :: Qd 0x00000048 0x00000048 Qm (i32)0x00000018 Qn (i32)0x00000078
+vrhadd.u32 d10, d11, d12 :: Qd 0x098d8d4a 0x090f8f4c Qm (i32)0x00000018 Qn (i32)0x00000078
---- VCGT ----
vcgt.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000078
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000019 Qn (i32)0x00000078
vcgt.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000079
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000019 Qn (i32)0x00000079
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.s16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x0000008c Qn (i32)0x00000078
+vcgt.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.s8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x00000078
+vcgt.s8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcgt.s16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
+vcgt.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcgt.s8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
+vcgt.s8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x00000078 Qn (i32)0x00000078
vcgt.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x0000008c
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x0000008c
vcgt.s16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x0000008c
+vcgt.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x0000008c
vcgt.s8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000078 Qn (i32)0x0000008c
+vcgt.s8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x0000008c
vcgt.s8 d5, d7, d5 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcgt.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcgt.s16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcgt.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcgt.s8 d5, d7, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcgt.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcgt.s16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcgt.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcgt.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcgt.s8 d5, d7, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
+vcgt.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcgt.s16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
+vcgt.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcgt.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcgt.s32 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vcgt.s32 d10, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000078
+vcgt.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000019 Qn (i32)0x00000078
+vcgt.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x0000008c Qn (i32)0x00000078
+vcgt.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.u8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x0000008c Qn (i32)0x00000078
+vcgt.u8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
+vcgt.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcgt.u16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
+vcgt.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcgt.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
+vcgt.u8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x00000078 Qn (i32)0x00000078
vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x0000008c
+vcgt.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x0000008c
vcgt.u16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x0000008c
+vcgt.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x0000008c
vcgt.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x0000008c
+vcgt.u8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x0000008c
vcgt.u8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcgt.u8 d0, d1, d2 :: Qd 0x00ffffff 0x00ffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcgt.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcgt.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcgt.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000003 Qn (i32)0x80000002
vcgt.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcgt.u8 d0, d1, d2 :: Qd 0x00ffffff 0x00ffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcgt.u16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcgt.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000003
+vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
vcgt.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
+vcgt.u8 d0, d1, d2 :: Qd 0x00ffffff 0x00ffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcgt.u16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
+vcgt.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000002 Qn (i32)0x80000002
+vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
vcgt.u32 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vcgt.u32 d10, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
---- VCGE ----
vcge.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000078
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000019 Qn (i32)0x00000078
vcge.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000079
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000019 Qn (i32)0x00000079
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
+vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
+vcge.s8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x00000078
vcge.s8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x00000078
vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcge.s8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vcge.s8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x00000078 Qn (i32)0x00000078
vcge.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x0000008c
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x0000008c
vcge.s16 d0, d1, d2 :: Qd 0xffff0000 0xffff0000 Qm (i32)0x00000078 Qn (i32)0x0000008c
+vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x0000008c
vcge.s8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x0000008c
+vcge.s8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x0000008c
+vcge.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcge.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcge.s8 d5, d7, d5 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcge.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcge.s16 d0, d1, d2 :: Qd 0xffff0000 0xffff0000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcge.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcge.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
+vcge.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
+vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcge.s32 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vcge.s32 d10, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
vcge.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000078
+vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000019 Qn (i32)0x00000078
+vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
+vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcge.u8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
+vcge.u8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x00000078
+vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcge.u8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vcge.u8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x00000078 Qn (i32)0x00000078
+vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x0000008c
vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x0000008c
vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x0000008c
+vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x0000008c
vcge.u8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x0000008c
+vcge.u8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x0000008c
vcge.u8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcge.u8 d0, d1, d2 :: Qd 0x00ffffff 0x00ffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcge.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcge.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000003 Qn (i32)0x80000002
vcge.u8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcge.u8 d0, d1, d2 :: Qd 0x00ffffff 0x00ffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcge.u16 d0, d1, d2 :: Qd 0xffff0000 0xffff0000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcge.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000003
+vcge.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
vcge.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
vcge.u8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
+vcge.u8 d0, d1, d2 :: Qd 0x00ffffff 0x00ffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
+vcge.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
+vcge.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
vcge.u32 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vcge.u32 d10, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
---- VSHL (register) ----
vshl.s8 d0, d1, d2 :: Qd 0x00000030 0x00000030 Qm (i32)0x00000018 Qn (i32)0x00000001
+vshl.s8 d0, d1, d2 :: Qd 0x131b1a36 0x121f1e3e Qm (i32)0x00000018 Qn (i32)0x00000001
vshl.s8 d8, d1, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000008
+vshl.s8 d8, d1, d12 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x00000018 Qn (i32)0x00000008
vshl.s8 d10, d31, d7 :: Qd 0x00000080 0x00000080 Qm (i32)0x00000018 Qn (i32)0x00000004
+vshl.s8 d10, d31, d7 :: Qd 0x131b1ab0 0x121f1ef0 Qm (i32)0x00000018 Qn (i32)0x00000004
vshl.s16 d3, d8, d11 :: Qd 0x00000038 0x00000038 Qm (i32)0x0000000e Qn (i32)0x00000002
+vshl.s16 d3, d8, d11 :: Qd 0x131b686c 0x121f787c Qm (i32)0x0000000e Qn (i32)0x00000002
vshl.s16 d5, d12, d14 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000001
+vshl.s16 d5, d12, d14 :: Qd 0x131b3436 0x121f3c3e Qm (i32)0x40000000 Qn (i32)0x00000001
vshl.s16 d15, d2, d1 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x0000000b
+vshl.s16 d15, d2, d1 :: Qd 0x131bd800 0x121ff800 Qm (i32)0x40000000 Qn (i32)0x0000000b
vshl.s32 d9, d12, d19 :: Qd 0x00000008 0x00000008 Qm (i32)0x80000002 Qn (i32)0x00000002
+vshl.s32 d9, d12, d19 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x80000002 Qn (i32)0x00000002
vshl.s32 d11, d22, d0 :: Qd 0xfffff000 0xfffff000 Qm (i32)0xffffffff Qn (i32)0x0000000c
+vshl.s32 d11, d22, d0 :: Qd 0xb1a1b000 0xf1e1f000 Qm (i32)0xffffffff Qn (i32)0x0000000c
vshl.s32 d5, d2, d3 :: Qd 0x00000000 0x00000000 Qm (i32)0x40000000 Qn (i32)0x00000015
+vshl.s32 d5, d2, d3 :: Qd 0x43600000 0xc3e00000 Qm (i32)0x40000000 Qn (i32)0x00000015
vshl.s64 d15, d12, d4 :: Qd 0x00500000 0x00500000 Qm (i32)0x00000005 Qn (i32)0x00000014
+vshl.s64 d15, d12, d4 :: Qd 0xa1b121f1 0xe1f00000 Qm (i32)0x00000005 Qn (i32)0x00000014
vshl.s64 d8, d2, d4 :: Qd 0x000000f0 0x000000f0 Qm (i32)0x0000000f Qn (i32)0x00000004
+vshl.s64 d8, d2, d4 :: Qd 0x31b1a1b1 0x21f1e1f0 Qm (i32)0x0000000f Qn (i32)0x00000004
vshl.s64 d5, d12, d4 :: Qd 0x60000000 0x40000000 Qm (i32)0x80000001 Qn (i32)0x0000001e
+vshl.s64 d5, d12, d4 :: Qd 0xc487c787 0xc0000000 Qm (i32)0x80000001 Qn (i32)0x0000001e
vshl.s64 d15, d2, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffabcd59 Qn (i32)0xabcdefab
+vshl.s64 d15, d2, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xffabcd59 Qn (i32)0xabcdefab
+vshl.s64 d8, d2, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000000f Qn (i32)0x00400bb5
vshl.s64 d8, d2, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000000f Qn (i32)0x00400bb5
vshl.s64 d5, d12, d4 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000001 Qn (i32)0x030abcff
+vshl.s64 d5, d12, d4 :: Qd 0x098d8d0d 0x890f8f0f Qm (i32)0x80000001 Qn (i32)0x030abcff
vshl.u8 d0, d1, d2 :: Qd 0x00000030 0x00000030 Qm (i32)0x00000018 Qn (i32)0x00000001
+vshl.u8 d0, d1, d2 :: Qd 0x131b1a36 0x121f1e3e Qm (i32)0x00000018 Qn (i32)0x00000001
vshl.u8 d8, d1, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000008
+vshl.u8 d8, d1, d12 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x00000018 Qn (i32)0x00000008
vshl.u8 d10, d11, d7 :: Qd 0x00000080 0x00000080 Qm (i32)0x00000018 Qn (i32)0x00000004
+vshl.u8 d10, d11, d7 :: Qd 0x131b1ab0 0x121f1ef0 Qm (i32)0x00000018 Qn (i32)0x00000004
vshl.u16 d3, d8, d11 :: Qd 0x00000038 0x00000038 Qm (i32)0x0000000e Qn (i32)0x00000002
+vshl.u16 d3, d8, d11 :: Qd 0x131b686c 0x121f787c Qm (i32)0x0000000e Qn (i32)0x00000002
vshl.u16 d5, d12, d14 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000001
+vshl.u16 d5, d12, d14 :: Qd 0x131b3436 0x121f3c3e Qm (i32)0x40000000 Qn (i32)0x00000001
vshl.u16 d15, d2, d1 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x0000000b
+vshl.u16 d15, d2, d1 :: Qd 0x131bd800 0x121ff800 Qm (i32)0x40000000 Qn (i32)0x0000000b
vshl.u32 d9, d12, d15 :: Qd 0x00000008 0x00000008 Qm (i32)0x80000002 Qn (i32)0x00000002
+vshl.u32 d9, d12, d15 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x80000002 Qn (i32)0x00000002
vshl.u32 d11, d2, d0 :: Qd 0xfffff000 0xfffff000 Qm (i32)0xffffffff Qn (i32)0x0000000c
+vshl.u32 d11, d2, d0 :: Qd 0xb1a1b000 0xf1e1f000 Qm (i32)0xffffffff Qn (i32)0x0000000c
vshl.u32 d5, d2, d3 :: Qd 0x00000000 0x00000000 Qm (i32)0x40000000 Qn (i32)0x00000015
+vshl.u32 d5, d2, d3 :: Qd 0x43600000 0xc3e00000 Qm (i32)0x40000000 Qn (i32)0x00000015
vshl.u64 d15, d12, d4 :: Qd 0x00500000 0x00500000 Qm (i32)0x00000005 Qn (i32)0x00000014
+vshl.u64 d15, d12, d4 :: Qd 0xa1b121f1 0xe1f00000 Qm (i32)0x00000005 Qn (i32)0x00000014
vshl.u64 d8, d2, d4 :: Qd 0x000000f0 0x000000f0 Qm (i32)0x0000000f Qn (i32)0x00000004
+vshl.u64 d8, d2, d4 :: Qd 0x31b1a1b1 0x21f1e1f0 Qm (i32)0x0000000f Qn (i32)0x00000004
vshl.u64 d5, d12, d4 :: Qd 0x60000000 0x40000000 Qm (i32)0x80000001 Qn (i32)0x0000001e
+vshl.u64 d5, d12, d4 :: Qd 0xc487c787 0xc0000000 Qm (i32)0x80000001 Qn (i32)0x0000001e
+vshl.u64 d15, d2, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xffabcd59 Qn (i32)0xabcdefab
vshl.u64 d15, d2, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xffabcd59 Qn (i32)0xabcdefab
vshl.u64 d8, d2, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000000f Qn (i32)0x00400bb5
+vshl.u64 d8, d2, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000000f Qn (i32)0x00400bb5
vshl.u64 d5, d12, d4 :: Qd 0x40000000 0xc0000000 Qm (i32)0x80000001 Qn (i32)0x030abcff
+vshl.u64 d5, d12, d4 :: Qd 0x098d8d0d 0x890f8f0f Qm (i32)0x80000001 Qn (i32)0x030abcff
---- VQSHL (register) ----
vqshl.s64 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.s64 d0, d1, d2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqshl.s64 d3, d4, d5 :: Qd 0xffffff03 0xffffff02 Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.s64 d3, d4, d5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqshl.s64 d3, d4, d5 :: Qd 0xfffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.s64 d3, d4, d5 :: Qd 0x02636343 0x6243e3c3 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.s64 d0, d1, d2 :: Qd 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqshl.s64 d0, d1, d2 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqshl.s64 d13, d14, d31 :: Qd 0xffffffff 0xfffffbff Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqshl.s64 d13, d14, d31 :: Qd 0x00000004 0xc6c686c4 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqshl.s64 d7, d8, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.s64 d7, d8, d2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.s32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.s32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.s32 d2, d8, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqshl.s32 d2, d8, d4 :: Qd 0x0131b1a1 0x0121f1e1 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqshl.s32 d12, d11, d13 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqshl.s32 d12, d11, d13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqshl.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqshl.s32 d0, d1, d2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqshl.s32 d9, d30, d11 :: Qd 0xc0000004 0xc0000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.s32 d9, d30, d11 :: Qd 0x098d8d0d 0x090f8f0f Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqshl.s32 d13, d3, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqshl.s32 d13, d3, d5 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 08000000
vqshl.s16 d11, d10, d2 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.s16 d11, d10, d2 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.s16 d3, d14, d7 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.s16 d3, d14, d7 :: Qd 0x098d0343 0x090f03c3 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.s16 d0, d11, d2 :: Qd 0xc0000080 0xc0000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.s16 d0, d11, d2 :: Qd 0x098d0d0d 0x090f0f0f Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqshl.s16 d1, d2, d3 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.s16 d1, d2, d3 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.s16 d3, d4, d5 :: Qd 0xd0000000 0xd0000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqshl.s16 d3, d4, d5 :: Qd 0x098d0000 0x090f0000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqshl.s16 d0, d15, d2 :: Qd 0x00007fff 0x00007fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqshl.s16 d0, d15, d2 :: Qd 0x131b7fff 0x121f7fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqshl.s8 d2, d7, d11 :: Qd 0xffffff80 0xffffff80 Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqshl.s8 d2, d7, d11 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqshl.s8 d13, d1, d2 :: Qd 0xffffff80 0xffffff80 Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqshl.s8 d13, d1, d2 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqshl.s8 d3, d7, d5 :: Qd 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqshl.s8 d3, d7, d5 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 08000000
vqshl.s8 d10, d11, d12 :: Qd 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqshl.s8 d10, d11, d12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqshl.s8 d6, d7, d8 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqshl.s8 d6, d7, d8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqshl.s8 d10, d11, d12 :: Qd 0x0000007f 0x0000007f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqshl.s8 d10, d11, d12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
vqshl.u64 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.u64 d0, d1, d2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqshl.u64 d3, d4, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 08000000
+vqshl.u64 d3, d4, d5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqshl.u64 d3, d4, d5 :: Qd 0x1ffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.u64 d3, d4, d5 :: Qd 0x02636343 0x6243e3c3 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.u64 d0, d1, d2 :: Qd 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqshl.u64 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqshl.u64 d13, d14, d15 :: Qd 0x0000003f 0xfffffbff Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqshl.u64 d13, d14, d15 :: Qd 0x00000004 0xc6c686c4 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqshl.u64 d7, d8, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.u64 d7, d8, d2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.u32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.u32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.u32 d2, d8, d4 :: Qd 0x0fffffff 0x0fffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqshl.u32 d2, d8, d4 :: Qd 0x0131b1a1 0x0121f1e1 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqshl.u32 d12, d31, d13 :: Qd 0x007fffff 0x007fffff Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqshl.u32 d12, d31, d13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqshl.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqshl.u32 d0, d1, d2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqshl.u32 d9, d10, d11 :: Qd 0x40000004 0x40000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.u32 d9, d10, d11 :: Qd 0x098d8d0d 0x090f8f0f Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqshl.u32 d13, d3, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqshl.u32 d13, d3, d5 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
vqshl.u16 d11, d10, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.u16 d11, d10, d2 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.u16 d3, d14, d7 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.u16 d3, d14, d7 :: Qd 0x098d0343 0x090f03c3 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.u16 d0, d11, d2 :: Qd 0x40000080 0x40000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.u16 d0, d11, d2 :: Qd 0x098d0d0d 0x090f0f0f Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqshl.u16 d1, d2, d3 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.u16 d1, d2, d3 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.u16 d3, d4, d5 :: Qd 0x50000000 0x50000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqshl.u16 d3, d4, d5 :: Qd 0x098d0000 0x090f0000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqshl.u16 d0, d15, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqshl.u16 d0, d15, d2 :: Qd 0x131bffff 0x121fffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqshl.u8 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqshl.u8 d2, d7, d11 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqshl.u8 d13, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqshl.u8 d13, d1, d2 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqshl.u8 d3, d7, d5 :: Qd 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqshl.u8 d3, d7, d5 :: Qd 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
vqshl.u8 d10, d11, d12 :: Qd 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqshl.u8 d10, d11, d12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqshl.u8 d6, d7, d8 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqshl.u8 d6, d7, d8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqshl.u8 d10, d11, d12 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqshl.u8 d10, d11, d12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
---- VQSHL / VQSHLU (immediate) ----
vqshl.s64 d0, d1, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.s64 d0, d1, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.s64 d31, d30, #1 :: Qd 0xffffff03 0xffffff02 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s64 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.s64 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s64 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s64 d5, d4, #63 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s64 d5, d4, #63 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s64 d5, d4, #60 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s64 d5, d4, #60 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s64 d5, d4, #59 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s64 d5, d4, #59 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s64 d5, d4, #58 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s64 d5, d4, #58 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s64 d5, d4, #17 :: Qd 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.s64 d5, d4, #17 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s64 d5, d4, #63 :: Qd 0x80000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s64 d5, d4, #63 :: Qd 0x7fffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.s64 d5, d4, #60 :: Qd 0xf0000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s64 d5, d4, #60 :: Qd 0x7fffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.s64 d5, d4, #7 :: Qd 0x80000000 0x00000000 Qm (i32)0x80000002 fpscr 08000000
+vqshl.s64 d5, d4, #7 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshl.s32 d10, d11, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.s32 d10, d11, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.s32 d31, d30, #1 :: Qd 0xffffff02 0xffffff02 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s32 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.s32 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s32 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s32 d5, d4, #31 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s32 d5, d4, #31 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s32 d5, d4, #28 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s32 d5, d4, #28 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s32 d5, d4, #27 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s32 d5, d4, #27 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s32 d5, d4, #26 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.s32 d5, d4, #26 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s32 d5, d4, #17 :: Qd 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.s32 d5, d4, #17 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s32 d5, d4, #31 :: Qd 0x80000000 0x80000000 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s32 d5, d4, #31 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.s32 d5, d4, #29 :: Qd 0xe0000000 0xe0000000 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s32 d5, d4, #29 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.s32 d5, d4, #7 :: Qd 0x80000000 0x80000000 Qm (i32)0x80000002 fpscr 08000000
+vqshl.s32 d5, d4, #7 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x80000002 fpscr 08000000
vqshl.s16 d9, d8, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.s16 d9, d8, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.s16 d31, d30, #1 :: Qd 0xfffeff02 0xfffeff02 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s16 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.s16 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s16 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshl.s16 d9, d8, #15 :: Qd 0x00007fff 0x00007fff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s16 d9, d8, #15 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr 08000000
vqshl.s16 d5, d4, #12 :: Qd 0x00007fff 0x00007fff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s16 d5, d4, #12 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr 08000000
vqshl.s16 d5, d4, #11 :: Qd 0x00007fff 0x00007fff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s16 d5, d4, #11 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr 08000000
vqshl.s16 d5, d4, #10 :: Qd 0x00004000 0x00004000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.s16 d5, d4, #10 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr 08000000
vqshl.s16 d5, d4, #4 :: Qd 0x00000100 0x00000100 Qm (i32)0x00000010 fpscr 00000000
+vqshl.s16 d5, d4, #4 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr 08000000
vqshl.s16 d5, d4, #15 :: Qd 0x80008000 0x80008000 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s16 d5, d4, #15 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff fpscr 08000000
vqshl.s16 d5, d4, #12 :: Qd 0xf000f000 0xf000f000 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s16 d5, d4, #12 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff fpscr 08000000
vqshl.s16 d5, d4, #7 :: Qd 0x80000100 0x80000100 Qm (i32)0x80000002 fpscr 08000000
+vqshl.s16 d5, d4, #7 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x80000002 fpscr 08000000
vqshl.s8 d0, d1, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.s8 d0, d1, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.s8 d31, d30, #1 :: Qd 0xfefefe80 0xfefefe80 Qm (i32)0xffffff81 fpscr 08000000
+vqshl.s8 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.s8 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s8 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshl.s8 d5, d4, #7 :: Qd 0x0000007f 0x0000007f Qm (i32)0x00000010 fpscr 08000000
+vqshl.s8 d5, d4, #7 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x00000010 fpscr 08000000
vqshl.s8 d25, d4, #4 :: Qd 0x0000007f 0x0000007f Qm (i32)0x00000010 fpscr 08000000
+vqshl.s8 d25, d4, #4 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x00000010 fpscr 08000000
vqshl.s8 d5, d4, #3 :: Qd 0x0000007f 0x0000007f Qm (i32)0x00000010 fpscr 08000000
+vqshl.s8 d5, d4, #3 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x00000010 fpscr 08000000
vqshl.s8 d5, d4, #2 :: Qd 0x00000040 0x00000040 Qm (i32)0x00000010 fpscr 00000000
+vqshl.s8 d5, d4, #2 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x00000010 fpscr 00000000
vqshl.s8 d5, d4, #1 :: Qd 0x00000020 0x00000020 Qm (i32)0x00000010 fpscr 00000000
+vqshl.s8 d5, d4, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000010 fpscr 00000000
vqshl.s8 d5, d4, #7 :: Qd 0x80808080 0x80808080 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s8 d5, d4, #7 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff fpscr 08000000
vqshl.s8 d5, d4, #5 :: Qd 0xe0e0e0e0 0xe0e0e0e0 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s8 d5, d4, #5 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff fpscr 08000000
vqshl.s8 d5, d4, #2 :: Qd 0x80000008 0x80000008 Qm (i32)0x80000002 fpscr 08000000
+vqshl.s8 d5, d4, #2 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x80000002 fpscr 00000000
vqshl.u64 d0, d1, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.u64 d0, d1, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.u64 d31, d30, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr 08000000
+vqshl.u64 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.u64 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.u64 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshl.u64 d5, d4, #63 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u64 d5, d4, #63 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u64 d5, d4, #60 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u64 d5, d4, #60 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u64 d5, d4, #59 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u64 d5, d4, #59 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u64 d5, d4, #58 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u64 d5, d4, #58 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u64 d5, d4, #17 :: Qd 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u64 d5, d4, #17 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u64 d5, d4, #63 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u64 d5, d4, #63 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u64 d5, d4, #60 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u64 d5, d4, #60 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u64 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
+vqshl.u64 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshl.u32 d10, d11, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.u32 d10, d11, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.u32 d31, d30, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr 08000000
+vqshl.u32 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.u32 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.u32 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
+vqshl.u32 d5, d4, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u32 d5, d4, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u32 d5, d4, #28 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u32 d5, d4, #28 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u32 d5, d4, #27 :: Qd 0x80000000 0x80000000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u32 d5, d4, #27 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u32 d5, d4, #26 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u32 d5, d4, #26 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u32 d5, d4, #17 :: Qd 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u32 d5, d4, #17 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u32 d5, d4, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u32 d5, d4, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u32 d5, d4, #29 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u32 d5, d4, #29 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u32 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshl.u32 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshl.u16 d9, d8, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.u16 d9, d8, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.u16 d31, d30, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr 08000000
+vqshl.u16 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.u16 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.u16 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshl.u16 d9, d8, #15 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u16 d9, d8, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u16 d5, d4, #12 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u16 d5, d4, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u16 d5, d4, #11 :: Qd 0x00008000 0x00008000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u16 d5, d4, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u16 d5, d4, #10 :: Qd 0x00004000 0x00004000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u16 d5, d4, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u16 d5, d4, #4 :: Qd 0x00000100 0x00000100 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u16 d5, d4, #4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u16 d5, d4, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u16 d5, d4, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u16 d5, d4, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u16 d5, d4, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u16 d5, d4, #7 :: Qd 0xffff0100 0xffff0100 Qm (i32)0x80000002 fpscr 08000000
+vqshl.u16 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshl.u8 d0, d1, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.u8 d0, d1, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.u8 d31, d30, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr 08000000
+vqshl.u8 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.u8 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.u8 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshl.u8 d5, d4, #7 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u8 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u8 d5, d4, #4 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u8 d5, d4, #4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u8 d5, d4, #3 :: Qd 0x00000080 0x00000080 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u8 d5, d4, #3 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x00000010 fpscr 00000000
vqshl.u8 d5, d4, #2 :: Qd 0x00000040 0x00000040 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u8 d5, d4, #2 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x00000010 fpscr 00000000
vqshl.u8 d5, d4, #1 :: Qd 0x00000020 0x00000020 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u8 d5, d4, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000010 fpscr 00000000
vqshl.u8 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u8 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u8 d5, d4, #5 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u8 d5, d4, #5 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u8 d5, d4, #2 :: Qd 0xff000008 0xff000008 Qm (i32)0x80000002 fpscr 08000000
+vqshl.u8 d5, d4, #2 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x80000002 fpscr 00000000
vqshlu.s64 d0, d1, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshlu.s64 d0, d1, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshlu.s64 d31, d30, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s64 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s64 d5, d4, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s64 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s64 d5, d4, #63 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s64 d5, d4, #63 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s64 d5, d4, #60 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s64 d5, d4, #60 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s64 d5, d4, #59 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s64 d5, d4, #59 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s64 d5, d4, #58 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s64 d5, d4, #58 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s64 d5, d4, #17 :: Qd 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s64 d5, d4, #17 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s64 d5, d4, #63 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s64 d5, d4, #63 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s64 d5, d4, #60 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s64 d5, d4, #60 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s64 d5, d4, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 fpscr 08000000
+vqshlu.s64 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshlu.s32 d10, d11, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshlu.s32 d10, d11, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshlu.s32 d31, d30, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s32 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s32 d5, d4, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s32 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s32 d5, d4, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s32 d5, d4, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s32 d25, d24, #28 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s32 d25, d24, #28 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s32 d5, d4, #27 :: Qd 0x80000000 0x80000000 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s32 d5, d4, #27 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s32 d5, d4, #26 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s32 d5, d4, #26 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s32 d5, d4, #17 :: Qd 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s32 d5, d4, #17 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s32 d5, d24, #31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s32 d5, d24, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s32 d5, d4, #29 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s32 d5, d4, #29 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s32 d5, d4, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 fpscr 08000000
+vqshlu.s32 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshlu.s16 d9, d8, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshlu.s16 d9, d8, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshlu.s16 d31, d30, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s16 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s16 d5, d4, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s16 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s16 d9, d8, #15 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s16 d9, d8, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s16 d5, d4, #12 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s16 d5, d4, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s16 d5, d4, #11 :: Qd 0x00008000 0x00008000 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s16 d5, d4, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s16 d5, d4, #10 :: Qd 0x00004000 0x00004000 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s16 d5, d4, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s16 d5, d4, #4 :: Qd 0x00000100 0x00000100 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s16 d5, d4, #4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s16 d15, d14, #15 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s16 d15, d14, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s16 d5, d4, #12 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s16 d5, d4, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s16 d5, d4, #7 :: Qd 0x00000100 0x00000100 Qm (i32)0x80000002 fpscr 08000000
+vqshlu.s16 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshlu.s8 d0, d1, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshlu.s8 d0, d1, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshlu.s8 d31, d30, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s8 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s8 d5, d4, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s8 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s8 d5, d4, #7 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s8 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s8 d5, d4, #4 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s8 d5, d4, #4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s8 d5, d4, #3 :: Qd 0x00000080 0x00000080 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s8 d5, d4, #3 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x00000010 fpscr 00000000
vqshlu.s8 d5, d4, #2 :: Qd 0x00000040 0x00000040 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s8 d5, d4, #2 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x00000010 fpscr 00000000
vqshlu.s8 d5, d4, #1 :: Qd 0x00000020 0x00000020 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s8 d5, d4, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000010 fpscr 00000000
vqshlu.s8 d5, d4, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s8 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s8 d5, d4, #5 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s8 d5, d4, #5 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s8 d5, d4, #2 :: Qd 0x00000008 0x00000008 Qm (i32)0x80000002 fpscr 08000000
+vqshlu.s8 d5, d4, #2 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x80000002 fpscr 00000000
---- VQRSHL (register) ----
vqrshl.s64 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.s64 d0, d1, d2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.s64 d3, d4, d5 :: Qd 0xffffff03 0xffffff02 Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.s64 d3, d4, d5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.s64 d3, d4, d5 :: Qd 0xfffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.s64 d3, d4, d5 :: Qd 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.s64 d0, d1, d2 :: Qd 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqrshl.s64 d0, d1, d2 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqrshl.s64 d13, d14, d15 :: Qd 0xffffffff 0xfffffc00 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqrshl.s64 d13, d14, d15 :: Qd 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqrshl.s64 d7, d8, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.s64 d7, d8, d2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.s32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.s32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.s32 d2, d8, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqrshl.s32 d2, d8, d4 :: Qd 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqrshl.s32 d12, d11, d13 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqrshl.s32 d12, d11, d13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqrshl.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqrshl.s32 d0, d1, d2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqrshl.s32 d9, d10, d11 :: Qd 0xc0000004 0xc0000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 d9, d10, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 d13, d3, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.s32 d13, d3, d5 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 08000000
vqrshl.s16 d11, d10, d2 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.s16 d11, d10, d2 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.s16 d3, d14, d7 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.s16 d3, d14, d7 :: Qd 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.s16 d0, d31, d2 :: Qd 0xc0000080 0xc0000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 d0, d31, d2 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 d1, d2, d3 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.s16 d1, d2, d3 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.s16 d3, d4, d5 :: Qd 0xd0000000 0xd0000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqrshl.s16 d3, d4, d5 :: Qd 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqrshl.s16 d0, d15, d2 :: Qd 0x00007fff 0x00007fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.s16 d0, d15, d2 :: Qd 0x131b7fff 0x121f7fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqrshl.s8 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s8 d2, d7, d11 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 d2, d7, d11 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 d2, d7, d11 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s8 d2, d7, d11 :: Qd 0x000000ff 0x000000ff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 d2, d7, d11 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s8 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s8 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.s16 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s16 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.s32 d2, d7, d31 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s32 d2, d7, d31 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.s8 d2, d7, d11 :: Qd 0xffffff80 0xffffff80 Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqrshl.s8 d2, d7, d11 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqrshl.s8 d13, d1, d2 :: Qd 0xffffff80 0xffffff80 Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.s8 d13, d1, d2 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqrshl.s8 d3, d7, d5 :: Qd 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.s8 d3, d7, d5 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 08000000
vqrshl.s8 d10, d11, d12 :: Qd 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqrshl.s8 d10, d11, d12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqrshl.s8 d6, d7, d8 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqrshl.s8 d6, d7, d8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqrshl.s8 d10, d11, d12 :: Qd 0x0000007f 0x0000007f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqrshl.s8 d10, d11, d12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
vqrshl.u64 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.u64 d0, d1, d2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.u64 d3, d4, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 08000000
+vqrshl.u64 d3, d4, d5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.u64 d3, d4, d5 :: Qd 0x1ffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.u64 d3, d4, d5 :: Qd 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.u64 d0, d1, d2 :: Qd 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqrshl.u64 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqrshl.u64 d13, d14, d15 :: Qd 0x0000003f 0xfffffc00 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqrshl.u64 d13, d14, d15 :: Qd 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqrshl.u64 d7, d8, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.u64 d7, d8, d2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.u32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.u32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.u32 d2, d8, d4 :: Qd 0x0fffffff 0x0fffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqrshl.u32 d2, d8, d4 :: Qd 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqrshl.u32 d12, d11, d13 :: Qd 0x00800000 0x00800000 Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqrshl.u32 d12, d11, d13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqrshl.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqrshl.u32 d0, d1, d2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqrshl.u32 d9, d10, d11 :: Qd 0x40000004 0x40000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 d9, d10, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u32 d13, d3, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.u32 d13, d3, d5 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
vqrshl.u16 d11, d10, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.u16 d11, d10, d2 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.u16 d3, d14, d7 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.u16 d3, d14, d7 :: Qd 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.u16 d0, d31, d2 :: Qd 0x40000080 0x40000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 d0, d31, d2 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u16 d1, d2, d3 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.u16 d1, d2, d3 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.u16 d3, d4, d5 :: Qd 0x50000000 0x50000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqrshl.u16 d3, d4, d5 :: Qd 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqrshl.u16 d0, d15, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.u16 d0, d15, d2 :: Qd 0x131bffff 0x121fffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqrshl.u8 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqrshl.u8 d2, d7, d11 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqrshl.u8 d2, d7, d11 :: Qd 0x80808080 0x80808080 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u8 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u16 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u32 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u8 d2, d7, d11 :: Qd 0x8080807f 0x8080807f Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u16 d2, d7, d11 :: Qd 0x80007fff 0x80007fff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u32 d2, d7, d11 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u8 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u8 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.u16 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u16 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.u32 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u32 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.u8 d13, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.u8 d13, d1, d2 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqrshl.u8 d3, d7, d5 :: Qd 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.u8 d3, d7, d5 :: Qd 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
vqrshl.u8 d10, d11, d12 :: Qd 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqrshl.u8 d10, d11, d12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqrshl.u8 d6, d7, d8 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqrshl.u8 d6, d7, d8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqrshl.u8 d10, d11, d12 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqrshl.u8 d10, d11, d12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
---- VRSHL (register) ----
vrshl.s64 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001
+vrshl.s64 d0, d1, d2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001
vrshl.s64 d3, d4, d5 :: Qd 0xffffff03 0xffffff02 Qm (i32)0xffffff81 Qn (i32)0x00000001
+vrshl.s64 d3, d4, d5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001
vrshl.s64 d3, d4, d5 :: Qd 0xfffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd
+vrshl.s64 d3, d4, d5 :: Qd 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd
vrshl.s64 d0, d1, d2 :: Qd 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e
+vrshl.s64 d0, d1, d2 :: Qd 0xc686c487 0xc787c000 Qm (i32)0x00000010 Qn (i32)0x0000000e
vrshl.s64 d13, d14, d15 :: Qd 0xffffffff 0xfffffc00 Qm (i32)0xffffffef Qn (i32)0xffffffe6
+vrshl.s64 d13, d14, d15 :: Qd 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6
vrshl.s64 d7, d8, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4
+vrshl.s64 d7, d8, d2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4
+vrshl.s32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2
vrshl.s32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2
vrshl.s32 d2, d8, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc
+vrshl.s32 d2, d8, d4 :: Qd 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc
vrshl.s32 d12, d11, d13 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff88 Qn (i32)0xfffffff7
+vrshl.s32 d12, d11, d13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7
vrshl.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9
+vrshl.s32 d0, d1, d2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9
vrshl.s32 d9, d10, d11 :: Qd 0xc0000004 0xc0000004 Qm (i32)0x80000008 Qn (i32)0xffffffff
+vrshl.s32 d9, d10, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff
vrshl.s32 d13, d3, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003
+vrshl.s32 d13, d3, d5 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003
vrshl.s16 d11, d10, d2 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1
+vrshl.s16 d11, d10, d2 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1
vrshl.s16 d3, d14, d7 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd
+vrshl.s16 d3, d14, d7 :: Qd 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd
vrshl.s16 d0, d11, d2 :: Qd 0xc0000080 0xc0000080 Qm (i32)0x80000100 Qn (i32)0xffffffff
+vrshl.s16 d0, d11, d2 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff
vrshl.s16 d1, d2, d3 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1
+vrshl.s16 d1, d2, d3 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1
vrshl.s16 d3, d4, d5 :: Qd 0xd0000000 0xd0000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3
+vrshl.s16 d3, d4, d5 :: Qd 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3
vrshl.s16 d0, d15, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001 Qn (i32)0x0000001e
+vrshl.s16 d0, d15, d2 :: Qd 0x131b0000 0x121f0000 Qm (i32)0x00000001 Qn (i32)0x0000001e
vrshl.s8 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff
+vrshl.s8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff
vrshl.s16 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff
+vrshl.s16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff
vrshl.s32 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff
+vrshl.s32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff
vrshl.s8 d2, d7, d31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff
+vrshl.s8 d2, d7, d31 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff
vrshl.s16 d2, d7, d31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff
+vrshl.s16 d2, d7, d31 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff
vrshl.s32 d2, d7, d31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff
+vrshl.s32 d2, d7, d31 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xffffffff Qn (i32)0xffffffff
vrshl.s8 d2, d7, d11 :: Qd 0x000000ff 0x000000ff Qm (i32)0xfffffffe Qn (i32)0xffffffff
+vrshl.s8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff
vrshl.s16 d2, d7, d11 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0xfffffffe Qn (i32)0xffffffff
+vrshl.s16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff
vrshl.s32 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffffe Qn (i32)0xffffffff
+vrshl.s32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff
vrshl.s8 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000
+vrshl.s8 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000
vrshl.s16 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000
+vrshl.s16 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000
vrshl.s32 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000
+vrshl.s32 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000
vrshl.s8 d2, d7, d11 :: Qd 0xffffff00 0xffffff00 Qm (i32)0xffffffff Qn (i32)0x00000028
+vrshl.s8 d2, d7, d11 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0xffffffff Qn (i32)0x00000028
vrshl.s8 d13, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0xfffffffc Qn (i32)0x0000001e
+vrshl.s8 d13, d1, d2 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0xfffffffc Qn (i32)0x0000001e
vrshl.s8 d3, d7, d5 :: Qd 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003
+vrshl.s8 d3, d7, d5 :: Qd 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003
vrshl.s8 d10, d11, d12 :: Qd 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010
+vrshl.s8 d10, d11, d12 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x00010000 Qn (i32)0x00000010
vrshl.s8 d6, d7, d8 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002
+vrshl.s8 d6, d7, d8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002
vrshl.s8 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vrshl.s8 d10, d11, d12 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x00000018 Qn (i32)0x00000078
vrshl.u64 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001
+vrshl.u64 d0, d1, d2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001
vrshl.u64 d3, d4, d5 :: Qd 0xffffff03 0xffffff02 Qm (i32)0xffffff81 Qn (i32)0x00000001
+vrshl.u64 d3, d4, d5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001
vrshl.u64 d3, d4, d5 :: Qd 0x1ffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd
+vrshl.u64 d3, d4, d5 :: Qd 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd
vrshl.u64 d0, d1, d2 :: Qd 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e
+vrshl.u64 d0, d1, d2 :: Qd 0xc686c487 0xc787c000 Qm (i32)0x00000010 Qn (i32)0x0000000e
vrshl.u64 d13, d14, d15 :: Qd 0x0000003f 0xfffffc00 Qm (i32)0xffffffef Qn (i32)0xffffffe6
+vrshl.u64 d13, d14, d15 :: Qd 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6
vrshl.u64 d7, d8, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4
+vrshl.u64 d7, d8, d2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4
+vrshl.u32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2
vrshl.u32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2
vrshl.u32 d2, d8, d4 :: Qd 0x0fffffff 0x0fffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc
+vrshl.u32 d2, d8, d4 :: Qd 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc
vrshl.u32 d12, d11, d13 :: Qd 0x00800000 0x00800000 Qm (i32)0xffffff88 Qn (i32)0xfffffff7
+vrshl.u32 d12, d11, d13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7
vrshl.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9
+vrshl.u32 d0, d1, d2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9
vrshl.u32 d9, d10, d11 :: Qd 0x40000004 0x40000004 Qm (i32)0x80000008 Qn (i32)0xffffffff
+vrshl.u32 d9, d10, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff
vrshl.u32 d13, d3, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003
+vrshl.u32 d13, d3, d5 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003
vrshl.u16 d11, d10, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1
+vrshl.u16 d11, d10, d2 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1
vrshl.u16 d3, d14, d7 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd
+vrshl.u16 d3, d14, d7 :: Qd 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd
vrshl.u16 d0, d31, d2 :: Qd 0x40000080 0x40000080 Qm (i32)0x80000100 Qn (i32)0xffffffff
+vrshl.u16 d0, d31, d2 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff
vrshl.u16 d1, d2, d3 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1
+vrshl.u16 d1, d2, d3 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1
vrshl.u16 d3, d4, d5 :: Qd 0x50000000 0x50000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3
+vrshl.u16 d3, d4, d5 :: Qd 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3
vrshl.u16 d0, d15, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001 Qn (i32)0x0000001e
+vrshl.u16 d0, d15, d2 :: Qd 0x131b0000 0x121f0000 Qm (i32)0x00000001 Qn (i32)0x0000001e
vrshl.u8 d2, d7, d11 :: Qd 0xffffff00 0xffffff00 Qm (i32)0xffffffff Qn (i32)0x00000028
+vrshl.u8 d2, d7, d11 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0xffffffff Qn (i32)0x00000028
vrshl.u8 d2, d7, d11 :: Qd 0x80808080 0x80808080 Qm (i32)0xffffffff Qn (i32)0xffffffff
+vrshl.u8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff
vrshl.u8 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff
+vrshl.u8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff
vrshl.u16 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff
+vrshl.u16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff
vrshl.u32 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff
+vrshl.u32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff
vrshl.u8 d2, d7, d11 :: Qd 0x80808080 0x80808080 Qm (i32)0xffffffff Qn (i32)0xffffffff
+vrshl.u8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff
vrshl.u16 d2, d7, d11 :: Qd 0x80008000 0x80008000 Qm (i32)0xffffffff Qn (i32)0xffffffff
+vrshl.u16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff
vrshl.u32 d2, d7, d11 :: Qd 0x80000000 0x80000000 Qm (i32)0xffffffff Qn (i32)0xffffffff
+vrshl.u32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xffffffff Qn (i32)0xffffffff
vrshl.u8 d2, d7, d31 :: Qd 0x8080807f 0x8080807f Qm (i32)0xfffffffe Qn (i32)0xffffffff
+vrshl.u8 d2, d7, d31 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff
vrshl.u16 d2, d7, d31 :: Qd 0x80007fff 0x80007fff Qm (i32)0xfffffffe Qn (i32)0xffffffff
+vrshl.u16 d2, d7, d31 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff
vrshl.u32 d2, d7, d31 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xfffffffe Qn (i32)0xffffffff
+vrshl.u32 d2, d7, d31 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff
vrshl.u8 d13, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0xfffffffc Qn (i32)0x0000001e
+vrshl.u8 d13, d1, d2 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0xfffffffc Qn (i32)0x0000001e
vrshl.u8 d3, d7, d5 :: Qd 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003
+vrshl.u8 d3, d7, d5 :: Qd 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003
vrshl.u8 d10, d11, d12 :: Qd 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010
+vrshl.u8 d10, d11, d12 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x00010000 Qn (i32)0x00000010
vrshl.u8 d6, d7, d8 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002
+vrshl.u8 d6, d7, d8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002
vrshl.u8 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vrshl.u8 d10, d11, d12 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x00000018 Qn (i32)0x00000078
---- VMAX (integer) ----
vmax.s32 d0, d1, d2 :: Qd 0x00000079 0x00000079 Qm (i32)0x00000019 Qn (i32)0x00000079
+vmax.s32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000019 Qn (i32)0x00000079
vmax.s32 d0, d1, d2 :: Qd 0x000000fa 0x000000fa Qm (i32)0x000000fa Qn (i32)0x00000079
+vmax.s32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x000000fa Qn (i32)0x00000079
vmax.s32 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
+vmax.s32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x0000008c Qn (i32)0x0000008c
vmax.s16 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x00000078
+vmax.s16 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x0000008c Qn (i32)0x00000078
vmax.s8 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000078 Qn (i32)0x00000078
+vmax.s8 d0, d1, d2 :: Qd 0x131b1a78 0x121f1e78 Qm (i32)0x00000078 Qn (i32)0x00000078
vmax.s8 d5, d7, d5 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmax.s8 d5, d7, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vmax.s16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmax.s16 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vmax.s32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmax.s32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vmax.s8 d5, d7, d5 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmax.s8 d5, d7, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vmax.s16 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmax.s16 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vmax.s32 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmax.s32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vmax.s8 d5, d7, d5 :: Qd 0x80000004 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmax.s8 d5, d7, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vmax.s16 d0, d1, d2 :: Qd 0x80000004 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmax.s16 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vmax.s32 d0, d1, d2 :: Qd 0x80000004 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmax.s32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vmax.s32 d10, d11, d12 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmax.s32 d10, d11, d12 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000018 Qn (i32)0x00000078
vmax.u32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000019 Qn (i32)0x00000078
+vmax.u32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000019 Qn (i32)0x00000078
vmax.u32 d0, d1, d2 :: Qd 0x000000fa 0x000000fa Qm (i32)0x000000fa Qn (i32)0x00000078
+vmax.u32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x000000fa Qn (i32)0x00000078
vmax.u32 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
+vmax.u32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x0000008c Qn (i32)0x0000008c
vmax.u16 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x00000078
+vmax.u16 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x0000008c Qn (i32)0x00000078
vmax.u8 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000078 Qn (i32)0x00000078
+vmax.u8 d0, d1, d2 :: Qd 0x131b1a78 0x121f1e78 Qm (i32)0x00000078 Qn (i32)0x00000078
vmax.u8 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmax.u8 d0, d1, d2 :: Qd 0x801b1a1b 0x801f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vmax.u16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmax.u16 d0, d1, d2 :: Qd 0x80001a1b 0x80001e1f Qm (i32)0x80000001 Qn (i32)0x80000002
+vmax.u32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
vmax.u32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
vmax.u8 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmax.u8 d0, d1, d2 :: Qd 0x801b1a1b 0x801f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vmax.u16 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmax.u16 d0, d1, d2 :: Qd 0x80001a1b 0x80001e1f Qm (i32)0x80000001 Qn (i32)0x80000003
+vmax.u32 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
vmax.u32 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
vmax.u8 d0, d1, d2 :: Qd 0x80000004 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmax.u8 d0, d1, d2 :: Qd 0x801b1a1b 0x801f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vmax.u16 d0, d1, d2 :: Qd 0x80000004 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmax.u16 d0, d1, d2 :: Qd 0x80001a1b 0x80001e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vmax.u32 d0, d1, d2 :: Qd 0x80000004 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmax.u32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
vmax.u32 d10, d11, d12 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmax.u32 d10, d11, d12 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000018 Qn (i32)0x00000078
---- VMIN (integer) ----
vmin.s32 d0, d1, d2 :: Qd 0x00000019 0x00000019 Qm (i32)0x00000019 Qn (i32)0x00000079
+vmin.s32 d0, d1, d2 :: Qd 0x00000079 0x00000079 Qm (i32)0x00000019 Qn (i32)0x00000079
vmin.s32 d0, d1, d2 :: Qd 0x00000079 0x00000079 Qm (i32)0x000000fa Qn (i32)0x00000079
+vmin.s32 d0, d1, d2 :: Qd 0x00000079 0x00000079 Qm (i32)0x000000fa Qn (i32)0x00000079
+vmin.s32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x0000008c Qn (i32)0x00000078
vmin.s32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x0000008c Qn (i32)0x00000078
vmin.s16 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000078 Qn (i32)0x00000078
+vmin.s16 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000078 Qn (i32)0x00000078
+vmin.s8 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
vmin.s8 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
vmin.s8 d5, d7, d5 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmin.s8 d5, d7, d5 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
vmin.s16 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmin.s16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
vmin.s32 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmin.s32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
vmin.s8 d5, d7, d5 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmin.s8 d5, d7, d5 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
vmin.s16 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmin.s16 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
vmin.s32 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmin.s32 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
vmin.s8 d5, d7, d5 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmin.s8 d5, d7, d5 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmin.s16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
vmin.s16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
vmin.s32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmin.s32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
vmin.s32 d10, d11, d12 :: Qd 0x00000018 0x00000018 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmin.s32 d10, d11, d12 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000018 Qn (i32)0x00000078
vmin.u32 d0, d1, d2 :: Qd 0x00000019 0x00000019 Qm (i32)0x00000019 Qn (i32)0x00000078
+vmin.u32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000019 Qn (i32)0x00000078
+vmin.u32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x000000fa Qn (i32)0x00000078
vmin.u32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x000000fa Qn (i32)0x00000078
vmin.u32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x0000008c Qn (i32)0x00000078
+vmin.u32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x0000008c Qn (i32)0x00000078
+vmin.u16 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000078 Qn (i32)0x00000078
vmin.u16 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000078 Qn (i32)0x00000078
vmin.u8 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
+vmin.u8 d0, d1, d2 :: Qd 0x0000001b 0x0000001f Qm (i32)0x0000008c Qn (i32)0x0000008c
vmin.u8 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmin.u8 d0, d1, d2 :: Qd 0x13000002 0x12000002 Qm (i32)0x80000001 Qn (i32)0x80000002
vmin.u16 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmin.u16 d0, d1, d2 :: Qd 0x131b0002 0x121f0002 Qm (i32)0x80000001 Qn (i32)0x80000002
vmin.u32 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmin.u32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vmin.u8 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmin.u8 d0, d1, d2 :: Qd 0x13000003 0x12000003 Qm (i32)0x80000001 Qn (i32)0x80000003
vmin.u16 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmin.u16 d0, d1, d2 :: Qd 0x131b0003 0x121f0003 Qm (i32)0x80000001 Qn (i32)0x80000003
vmin.u32 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmin.u32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vmin.u8 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmin.u8 d0, d1, d2 :: Qd 0x13000002 0x12000002 Qm (i32)0x80000004 Qn (i32)0x80000002
vmin.u16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmin.u16 d0, d1, d2 :: Qd 0x131b0002 0x121f0002 Qm (i32)0x80000004 Qn (i32)0x80000002
vmin.u32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmin.u32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vmin.u32 d10, d11, d12 :: Qd 0x00000018 0x00000018 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmin.u32 d10, d11, d12 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000018 Qn (i32)0x00000078
---- VABD ----
vabd.s32 d0, d1, d2 :: Qd 0x0000005f 0x0000005f Qm (i32)0x00000019 Qn (i32)0x00000078
+vabd.s32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000019 Qn (i32)0x00000078
vabd.s32 d0, d1, d2 :: Qd 0x00000060 0x00000060 Qm (i32)0x00000019 Qn (i32)0x00000079
+vabd.s32 d0, d1, d2 :: Qd 0x131b19a2 0x121f1da6 Qm (i32)0x00000019 Qn (i32)0x00000079
vabd.s32 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vabd.s32 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0xffffff88
vabd.s16 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vabd.s16 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078
vabd.s8 d0, d1, d2 :: Qd 0x000000ec 0x000000ec Qm (i32)0x0000008c Qn (i32)0x00000078
+vabd.s8 d0, d1, d2 :: Qd 0x131b1a5d 0x121f1e59 Qm (i32)0x0000008c Qn (i32)0x00000078
vabd.s8 d5, d7, d5 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vabd.s8 d5, d7, d5 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vabd.s8 d5, d7, d5 :: Qd 0x7f010101 0x7f010101 Qm (i32)0xffffff01 Qn (i32)0x80000002
+vabd.s8 d5, d7, d5 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0xffffff01 Qn (i32)0x80000002
vabd.s8 d5, d7, d5 :: Qd 0x7f010137 0x7f010137 Qm (i32)0x80000001 Qn (i32)0xffffff38
+vabd.s8 d5, d7, d5 :: Qd 0x141c1b1d 0x13201f19 Qm (i32)0x80000001 Qn (i32)0xffffff38
vabd.s16 d0, d1, d2 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vabd.s16 d0, d1, d2 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vabd.s32 d0, d1, d2 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vabd.s32 d0, d1, d2 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vabd.s8 d5, d7, d5 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vabd.s8 d5, d7, d5 :: Qd 0x931b1a18 0x921f1e1c Qm (i32)0x80000001 Qn (i32)0x80000003
vabd.s16 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vabd.s16 d0, d1, d2 :: Qd 0x931b1a18 0x921f1e1c Qm (i32)0x80000001 Qn (i32)0x80000003
vabd.s32 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vabd.s32 d0, d1, d2 :: Qd 0x931b1a18 0x921f1e1c Qm (i32)0x80000001 Qn (i32)0x80000003
vabd.s8 d5, d7, d5 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vabd.s8 d5, d7, d5 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000004 Qn (i32)0x80000002
vabd.s16 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vabd.s16 d0, d1, d2 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000004 Qn (i32)0x80000002
vabd.s32 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vabd.s32 d0, d1, d2 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000004 Qn (i32)0x80000002
vabd.s32 d10, d11, d12 :: Qd 0x00000060 0x00000060 Qm (i32)0x00000018 Qn (i32)0x00000078
+vabd.s32 d10, d11, d12 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078
vabd.u32 d0, d1, d2 :: Qd 0x0000005f 0x0000005f Qm (i32)0x00000019 Qn (i32)0x00000078
+vabd.u32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000019 Qn (i32)0x00000078
vabd.u32 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vabd.u32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078
vabd.u16 d0, d1, d2 :: Qd 0xfffffefc 0xfffffefc Qm (i32)0xffffff74 Qn (i32)0x00000078
+vabd.u16 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0xffffff74 Qn (i32)0x00000078
vabd.u8 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vabd.u8 d0, d1, d2 :: Qd 0x131b1a5d 0x121f1e59 Qm (i32)0x0000008c Qn (i32)0x00000078
vabd.u8 d5, d7, d5 :: Qd 0x7fffff01 0x7fffff01 Qm (i32)0xffffff01 Qn (i32)0x80000002
+vabd.u8 d5, d7, d5 :: Qd 0x6d1b1a19 0x6e1f1e1d Qm (i32)0xffffff01 Qn (i32)0x80000002
vabd.u8 d5, d7, d5 :: Qd 0x7fffff37 0x7fffff37 Qm (i32)0x80000001 Qn (i32)0xffffff38
+vabd.u8 d5, d7, d5 :: Qd 0xece4e51d 0xede0e119 Qm (i32)0x80000001 Qn (i32)0xffffff38
vabd.u8 d0, d1, d2 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vabd.u8 d0, d1, d2 :: Qd 0x6d1b1a19 0x6e1f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vabd.u16 d0, d1, d2 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vabd.u16 d0, d1, d2 :: Qd 0x6ce51a19 0x6de11e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vabd.u32 d0, d1, d2 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vabd.u32 d0, d1, d2 :: Qd 0x6ce4e5e7 0x6de0e1e3 Qm (i32)0x80000001 Qn (i32)0x80000002
vabd.u8 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vabd.u8 d0, d1, d2 :: Qd 0x6d1b1a18 0x6e1f1e1c Qm (i32)0x80000001 Qn (i32)0x80000003
vabd.u16 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vabd.u16 d0, d1, d2 :: Qd 0x6ce51a18 0x6de11e1c Qm (i32)0x80000001 Qn (i32)0x80000003
vabd.u32 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vabd.u32 d0, d1, d2 :: Qd 0x6ce4e5e8 0x6de0e1e4 Qm (i32)0x80000001 Qn (i32)0x80000003
vabd.u8 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vabd.u8 d0, d1, d2 :: Qd 0x6d1b1a19 0x6e1f1e1d Qm (i32)0x80000004 Qn (i32)0x80000002
vabd.u16 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vabd.u16 d0, d1, d2 :: Qd 0x6ce51a19 0x6de11e1d Qm (i32)0x80000004 Qn (i32)0x80000002
vabd.u32 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vabd.u32 d0, d1, d2 :: Qd 0x6ce4e5e7 0x6de0e1e3 Qm (i32)0x80000004 Qn (i32)0x80000002
vabd.u32 d10, d11, d12 :: Qd 0x00000060 0x00000060 Qm (i32)0x00000018 Qn (i32)0x00000078
+vabd.u32 d10, d11, d12 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078
---- VABA ----
vaba.s32 d0, d1, d2 :: Qd 0x555555b4 0x555555b4 Qm (i32)0x00000019 Qn (i32)0x00000078
+vaba.s32 d0, d1, d2 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x00000019 Qn (i32)0x00000078
vaba.s32 d0, d1, d2 :: Qd 0x555555b5 0x555555b5 Qm (i32)0x00000019 Qn (i32)0x00000079
+vaba.s32 d0, d1, d2 :: Qd 0x68706ef7 0x677472fb Qm (i32)0x00000019 Qn (i32)0x00000079
vaba.s32 d0, d1, d2 :: Qd 0x55555569 0x55555569 Qm (i32)0x0000008c Qn (i32)0x00000078
+vaba.s32 d0, d1, d2 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x0000008c Qn (i32)0x00000078
vaba.s16 d0, d1, d2 :: Qd 0x55555569 0x55555569 Qm (i32)0x0000008c Qn (i32)0x00000078
+vaba.s16 d0, d1, d2 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x0000008c Qn (i32)0x00000078
vaba.s8 d0, d1, d2 :: Qd 0x55555541 0x55555541 Qm (i32)0x0000008c Qn (i32)0x00000078
+vaba.s8 d0, d1, d2 :: Qd 0x68706fb2 0x677473ae Qm (i32)0x0000008c Qn (i32)0x00000078
vaba.s8 d5, d7, d5 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000002
+vaba.s8 d5, d7, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vaba.s8 d5, d7, d5 :: Qd 0xff010103 0xff010103 Qm (i32)0xffffff01 Qn (i32)0x80000002
+vaba.s8 d5, d7, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff01 Qn (i32)0x80000002
vaba.s8 d5, d7, d5 :: Qd 0x7e00006f 0x7e00006f Qm (i32)0x80000001 Qn (i32)0xffffff38
+vaba.s8 d5, d7, d5 :: Qd 0x131b1a55 0x121f1e51 Qm (i32)0x80000001 Qn (i32)0xffffff38
vaba.s16 d0, d1, d2 :: Qd 0x55555556 0x55555556 Qm (i32)0x80000001 Qn (i32)0x80000002
+vaba.s16 d0, d1, d2 :: Qd 0xe8706f6e 0xe7747372 Qm (i32)0x80000001 Qn (i32)0x80000002
vaba.s32 d0, d1, d2 :: Qd 0x55555556 0x55555556 Qm (i32)0x80000001 Qn (i32)0x80000002
+vaba.s32 d0, d1, d2 :: Qd 0xe8706f6e 0xe7747372 Qm (i32)0x80000001 Qn (i32)0x80000002
vaba.s8 d5, d7, d5 :: Qd 0x80000005 0x80000005 Qm (i32)0x80000001 Qn (i32)0x80000003
+vaba.s8 d5, d7, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vaba.s16 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000001 Qn (i32)0x80000003
+vaba.s16 d0, d1, d2 :: Qd 0xe8706f6d 0xe7747371 Qm (i32)0x80000001 Qn (i32)0x80000003
vaba.s32 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000001 Qn (i32)0x80000003
+vaba.s32 d0, d1, d2 :: Qd 0xe8706f6d 0xe7747371 Qm (i32)0x80000001 Qn (i32)0x80000003
vaba.s8 d5, d7, d5 :: Qd 0x80000004 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vaba.s8 d5, d7, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vaba.s16 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000004 Qn (i32)0x80000002
+vaba.s16 d0, d1, d2 :: Qd 0xe8706f6e 0xe7747372 Qm (i32)0x80000004 Qn (i32)0x80000002
vaba.s32 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000004 Qn (i32)0x80000002
+vaba.s32 d0, d1, d2 :: Qd 0xe8706f6e 0xe7747372 Qm (i32)0x80000004 Qn (i32)0x80000002
vaba.s32 d10, d11, d12 :: Qd 0x555555b5 0x555555b5 Qm (i32)0x00000018 Qn (i32)0x00000078
+vaba.s32 d10, d11, d12 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x00000018 Qn (i32)0x00000078
vaba.u32 d0, d1, d2 :: Qd 0x555555b4 0x555555b4 Qm (i32)0x00000019 Qn (i32)0x00000078
+vaba.u32 d0, d1, d2 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x00000019 Qn (i32)0x00000078
vaba.u32 d0, d1, d2 :: Qd 0x55555569 0x55555569 Qm (i32)0x0000008c Qn (i32)0x00000078
+vaba.u32 d0, d1, d2 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x0000008c Qn (i32)0x00000078
vaba.u16 d0, d1, d2 :: Qd 0x55555569 0x55555569 Qm (i32)0x0000008c Qn (i32)0x00000078
+vaba.u16 d0, d1, d2 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x0000008c Qn (i32)0x00000078
vaba.u8 d0, d1, d2 :: Qd 0x55555569 0x55555569 Qm (i32)0x0000008c Qn (i32)0x00000078
+vaba.u8 d0, d1, d2 :: Qd 0x68706fb2 0x677473ae Qm (i32)0x0000008c Qn (i32)0x00000078
vaba.u8 d5, d7, d5 :: Qd 0xffffff03 0xffffff03 Qm (i32)0xffffff01 Qn (i32)0x80000002
+vaba.u8 d5, d7, d5 :: Qd 0xed1b1a1b 0xee1f1e1f Qm (i32)0xffffff01 Qn (i32)0x80000002
vaba.u8 d5, d7, d5 :: Qd 0x7efefe6f 0x7efefe6f Qm (i32)0x80000001 Qn (i32)0xffffff38
+vaba.u8 d5, d7, d5 :: Qd 0xebe3e455 0xecdfe051 Qm (i32)0x80000001 Qn (i32)0xffffff38
vaba.u8 d0, d1, d2 :: Qd 0x55555556 0x55555556 Qm (i32)0x80000001 Qn (i32)0x80000002
+vaba.u8 d0, d1, d2 :: Qd 0xc2706f6e 0xc3747372 Qm (i32)0x80000001 Qn (i32)0x80000002
vaba.u16 d0, d1, d2 :: Qd 0x55555556 0x55555556 Qm (i32)0x80000001 Qn (i32)0x80000002
+vaba.u16 d0, d1, d2 :: Qd 0xc23a6f6e 0xc3367372 Qm (i32)0x80000001 Qn (i32)0x80000002
vaba.u32 d0, d1, d2 :: Qd 0x55555556 0x55555556 Qm (i32)0x80000001 Qn (i32)0x80000002
+vaba.u32 d0, d1, d2 :: Qd 0xc23a3b3c 0xc3363738 Qm (i32)0x80000001 Qn (i32)0x80000002
vaba.u8 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000001 Qn (i32)0x80000003
+vaba.u8 d0, d1, d2 :: Qd 0xc2706f6d 0xc3747371 Qm (i32)0x80000001 Qn (i32)0x80000003
vaba.u16 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000001 Qn (i32)0x80000003
+vaba.u16 d0, d1, d2 :: Qd 0xc23a6f6d 0xc3367371 Qm (i32)0x80000001 Qn (i32)0x80000003
vaba.u32 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000001 Qn (i32)0x80000003
+vaba.u32 d0, d1, d2 :: Qd 0xc23a3b3d 0xc3363739 Qm (i32)0x80000001 Qn (i32)0x80000003
vaba.u8 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000004 Qn (i32)0x80000002
+vaba.u8 d0, d1, d2 :: Qd 0xc2706f6e 0xc3747372 Qm (i32)0x80000004 Qn (i32)0x80000002
vaba.u16 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000004 Qn (i32)0x80000002
+vaba.u16 d0, d1, d2 :: Qd 0xc23a6f6e 0xc3367372 Qm (i32)0x80000004 Qn (i32)0x80000002
vaba.u32 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000004 Qn (i32)0x80000002
+vaba.u32 d0, d1, d2 :: Qd 0xc23a3b3c 0xc3363738 Qm (i32)0x80000004 Qn (i32)0x80000002
vaba.u32 d10, d11, d12 :: Qd 0x555555b5 0x555555b5 Qm (i32)0x00000018 Qn (i32)0x00000078
+vaba.u32 d10, d11, d12 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x00000018 Qn (i32)0x00000078
---- VTST ----
vtst.32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
+vtst.32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
+vtst.32 d3, d4, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vtst.32 d3, d4, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vtst.16 d6, d7, d8 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vtst.16 d6, d7, d8 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vtst.8 d9, d10, d12 :: Qd 0x000000ff 0x000000ff Qm (i32)0x0000008c Qn (i32)0x00000078
vtst.8 d9, d10, d12 :: Qd 0x000000ff 0x000000ff Qm (i32)0x0000008c Qn (i32)0x00000078
vtst.8 d0, d1, d2 :: Qd 0xff000000 0xff000000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vtst.8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x80000002
vtst.16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00004001 Qn (i32)0x00004001
+vtst.16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00004001 Qn (i32)0x00004001
+vtst.32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002
vtst.32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002
vtst.8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x00000002
+vtst.8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x00000002
+vtst.16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00004001 Qn (i32)0x00004001
vtst.16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00004001 Qn (i32)0x00004001
vtst.32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001 Qn (i32)0x80000002
+vtst.32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000001 Qn (i32)0x80000002
+vtst.32 d10, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
vtst.32 d10, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
---- VCEQ ----
vceq.i32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vceq.i32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vceq.i32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x00000078
vceq.i32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x00000078
vceq.i16 d6, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vceq.i16 d6, d7, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
vceq.i8 d9, d10, d12 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x00000078
+vceq.i8 d9, d10, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x00000078
vceq.i8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x80000001 Qn (i32)0x80000002
+vceq.i8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002
vceq.i16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00004001 Qn (i32)0x00004001
+vceq.i16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00004001 Qn (i32)0x00004001
+vceq.i32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002
vceq.i32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002
vceq.i8 d0, d1, d2 :: Qd 0x00ffff00 0x00ffff00 Qm (i32)0x80000001 Qn (i32)0x00000002
+vceq.i8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x00000002
vceq.i16 d0, d1, d2 :: Qd 0xffff0000 0xffff0000 Qm (i32)0x00000001 Qn (i32)0x00004001
+vceq.i16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001 Qn (i32)0x00004001
+vceq.i32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001 Qn (i32)0x80000002
vceq.i32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001 Qn (i32)0x80000002
vceq.i32 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vceq.i32 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
---- VMLA ----
vmla.i32 d0, d1, d2 :: Qd 0x55554a15 0x55554a15 Qm (i32)0xffffffe8 Qn (i32)0x00000078
+vmla.i32 d0, d1, d2 :: Qd 0x4a0991fd 0xd3eb73dd Qm (i32)0xffffffe8 Qn (i32)0x00000078
vmla.i32 d6, d7, d8 :: Qd 0x555596f5 0x555596f5 Qm (i32)0x0000008c Qn (i32)0x00000078
+vmla.i32 d6, d7, d8 :: Qd 0x4a0991fd 0xd3eb73dd Qm (i32)0x0000008c Qn (i32)0x00000078
vmla.i16 d9, d11, d12 :: Qd 0x5555bd55 0x5555bd55 Qm (i32)0x00000140 Qn (i32)0x00000120
+vmla.i16 d9, d11, d12 :: Qd 0x5555b3b5 0x55553835 Qm (i32)0x00000140 Qn (i32)0x00000120
vmla.i8 d0, d1, d2 :: Qd 0x555555b5 0x555555b5 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmla.i8 d0, d1, d2 :: Qd 0x423a3bad 0x433637cd Qm (i32)0x0000008c Qn (i32)0xffffff88
vmla.i8 d10, d11, d12 :: Qd 0x5555559f 0x5555559f Qm (i32)0x00000021 Qn (i32)0x0000000a
+vmla.i8 d10, d11, d12 :: Qd 0x55555563 0x5555558b Qm (i32)0x00000021 Qn (i32)0x0000000a
vmla.i16 d4, d5, d6 :: Qd 0x5555f557 0x5555f557 Qm (i32)0x00004001 Qn (i32)0x00002002
+vmla.i16 d4, d5, d6 :: Qd 0x5555e98b 0x55557193 Qm (i32)0x00004001 Qn (i32)0x00002002
vmla.i32 d7, d8, d9 :: Qd 0xd5555557 0xd5555557 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmla.i32 d7, d8, d9 :: Qd 0xfb8b898b 0xf9939193 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.i8 d10, d13, d12 :: Qd 0x5555559f 0x5555559f Qm (i32)0x00000021 Qn (i32)0x0000000a
+vmla.i8 d10, d13, d12 :: Qd 0x55555563 0x5555558b Qm (i32)0x00000021 Qn (i32)0x0000000a
vmla.i16 d4, d5, d6 :: Qd 0x55551751 0x55551751 Qm (i32)0x100000fe Qn (i32)0x00002002
+vmla.i16 d4, d5, d6 :: Qd 0x5555e98b 0x55557193 Qm (i32)0x100000fe Qn (i32)0x00002002
vmla.i32 d7, d8, d9 :: Qd 0xd5555557 0xd5555557 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmla.i32 d7, d8, d9 :: Qd 0xfb8b898b 0xf9939193 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.i32 d10, d11, d15 :: Qd 0x55554a15 0x55554a15 Qm (i32)0x00000018 Qn (i32)0xffffff88
+vmla.i32 d10, d11, d15 :: Qd 0x60a118ad 0xd6bf36cd Qm (i32)0x00000018 Qn (i32)0xffffff88
---- VMLS ----
vmls.i32 d0, d1, d2 :: Qd 0x55556095 0x55556095 Qm (i32)0xffffffe8 Qn (i32)0x00000078
+vmls.i32 d0, d1, d2 :: Qd 0x60a118ad 0xd6bf36cd Qm (i32)0xffffffe8 Qn (i32)0x00000078
vmls.i32 d6, d7, d8 :: Qd 0x555596f5 0x555596f5 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmls.i32 d6, d7, d8 :: Qd 0x4a0991fd 0xd3eb73dd Qm (i32)0x0000008c Qn (i32)0xffffff88
vmls.i16 d9, d11, d12 :: Qd 0x5555ed55 0x5555ed55 Qm (i32)0x00000140 Qn (i32)0x00000120
+vmls.i16 d9, d11, d12 :: Qd 0x5555f6f5 0x55557275 Qm (i32)0x00000140 Qn (i32)0x00000120
vmls.i8 d0, d1, d2 :: Qd 0x555555b5 0x555555b5 Qm (i32)0x0000008c Qn (i32)0x00000078
+vmls.i8 d0, d1, d2 :: Qd 0x555555ad 0x555555cd Qm (i32)0x0000008c Qn (i32)0x00000078
vmls.i8 d10, d11, d12 :: Qd 0x5555550b 0x5555550b Qm (i32)0x00000021 Qn (i32)0x0000000a
+vmls.i8 d10, d11, d12 :: Qd 0x55555547 0x5555551f Qm (i32)0x00000021 Qn (i32)0x0000000a
vmls.i16 d4, d5, d6 :: Qd 0x5555b553 0x5555b553 Qm (i32)0x00004001 Qn (i32)0x00002002
+vmls.i16 d4, d5, d6 :: Qd 0x5555c11f 0x55553917 Qm (i32)0x00004001 Qn (i32)0x00002002
vmls.i32 d7, d8, d9 :: Qd 0xd5555553 0xd5555553 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmls.i32 d7, d8, d9 :: Qd 0xaf1f211f 0xb1171917 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.i8 d10, d13, d12 :: Qd 0x5555550b 0x5555550b Qm (i32)0x00000021 Qn (i32)0x0000000a
+vmls.i8 d10, d13, d12 :: Qd 0x55555547 0x5555551f Qm (i32)0x00000021 Qn (i32)0x0000000a
vmls.i16 d4, d5, d6 :: Qd 0x55559359 0x55559359 Qm (i32)0x100000fe Qn (i32)0x00002002
+vmls.i16 d4, d5, d6 :: Qd 0x5555c11f 0x55553917 Qm (i32)0x100000fe Qn (i32)0x00002002
vmls.i32 d7, d8, d9 :: Qd 0xd5555553 0xd5555553 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmls.i32 d7, d8, d9 :: Qd 0xaf1f211f 0xb1171917 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.i32 d10, d11, d15 :: Qd 0x55556095 0x55556095 Qm (i32)0xffffffe8 Qn (i32)0x00000078
+vmls.i32 d10, d11, d15 :: Qd 0x60a118ad 0xd6bf36cd Qm (i32)0xffffffe8 Qn (i32)0x00000078
---- VMUL ----
vmul.i32 d0, d1, d2 :: Qd 0x00000b40 0x00000b40 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmul.i32 d0, d1, d2 :: Qd 0xf4b43ca8 0x7e961e88 Qm (i32)0x00000018 Qn (i32)0x00000078
vmul.i32 d6, d7, d8 :: Qd 0xffffbe60 0xffffbe60 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmul.i32 d6, d7, d8 :: Qd 0x0b4bc358 0x8169e178 Qm (i32)0x0000008c Qn (i32)0xffffff88
vmul.i16 d9, d11, d12 :: Qd 0x00006800 0x00006800 Qm (i32)0x00000140 Qn (i32)0x00000120
+vmul.i16 d9, d11, d12 :: Qd 0x00005e60 0x0000e2e0 Qm (i32)0x00000140 Qn (i32)0x00000120
vmul.i8 d0, d1, d2 :: Qd 0x000000a0 0x000000a0 Qm (i32)0x0000008c Qn (i32)0x00000078
+vmul.i8 d0, d1, d2 :: Qd 0x000000a8 0x00000088 Qm (i32)0x0000008c Qn (i32)0x00000078
vmul.i8 d10, d11, d12 :: Qd 0x0000004a 0x0000004a Qm (i32)0x00000021 Qn (i32)0x0000000a
+vmul.i8 d10, d11, d12 :: Qd 0x0000000e 0x00000036 Qm (i32)0x00000021 Qn (i32)0x0000000a
vmul.i16 d4, d5, d6 :: Qd 0x0000a002 0x0000a002 Qm (i32)0x00004001 Qn (i32)0x00002002
+vmul.i16 d4, d5, d6 :: Qd 0x00009436 0x00001c3e Qm (i32)0x00004001 Qn (i32)0x00002002
vmul.i32 d7, d8, d9 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmul.i32 d7, d8, d9 :: Qd 0xa6363436 0xa43e3c3e Qm (i32)0x80000001 Qn (i32)0x80000002
vmul.i8 d10, d11, d12 :: Qd 0x0000c00e 0x0000c00e Qm (i32)0x0200feb2 Qn (i32)0x000020df
+vmul.i8 d10, d11, d12 :: Qd 0x00004085 0x0000c001 Qm (i32)0x0200feb2 Qn (i32)0x000020df
vmul.i16 d4, d5, d6 :: Qd 0x00008866 0x00008866 Qm (i32)0xffff9433 Qn (i32)0x00002002
+vmul.i16 d4, d5, d6 :: Qd 0x00009436 0x00001c3e Qm (i32)0xffff9433 Qn (i32)0x00002002
vmul.i32 d7, d8, d9 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000 Qn (i32)0x0000000c
+vmul.i32 d7, d8, d9 :: Qd 0xe5453944 0xd9756974 Qm (i32)0x80000000 Qn (i32)0x0000000c
vmul.i8 d10, d13, d12 :: Qd 0x0000004a 0x0000004a Qm (i32)0x00000021 Qn (i32)0x0000000a
+vmul.i8 d10, d13, d12 :: Qd 0x0000000e 0x00000036 Qm (i32)0x00000021 Qn (i32)0x0000000a
vmul.i16 d4, d5, d6 :: Qd 0x0000c1fc 0x0000c1fc Qm (i32)0x100000fe Qn (i32)0x00002002
+vmul.i16 d4, d5, d6 :: Qd 0x00009436 0x00001c3e Qm (i32)0x100000fe Qn (i32)0x00002002
vmul.i32 d7, d8, d9 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmul.i32 d7, d8, d9 :: Qd 0xa6363436 0xa43e3c3e Qm (i32)0x80000001 Qn (i32)0x80000002
vmul.i32 d10, d11, d15 :: Qd 0x00000b40 0x00000b40 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmul.i32 d10, d11, d15 :: Qd 0xf4b43ca8 0x7e961e88 Qm (i32)0x00000018 Qn (i32)0x00000078
vmul.p8 q0, q1, q2 :: Qd 0x00000005 0x00000005 Qm (i32)0x00000003 Qn (i32)0x00000003
+vmul.p8 q0, q1, q2 :: Qd 0x0000002d 0x00000021 Qm (i32)0x00000003 Qn (i32)0x00000003
vmul.p8 q0, q1, q2 :: Qd 0x00000044 0x00000044 Qm (i32)0x0000000c Qn (i8)0x0000000f
+vmul.p8 q0, q1, q2 :: Qd 0xe1999699 0xeea5aaa5 Qm (i32)0x0000000c Qn (i8)0x0000000f
---- VMUL (by scalar) ----
vmul.i32 d0, d1, d4[0] :: Qd 0x00000b40 0x00000b40 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmul.i32 d0, d1, d4[0] :: Qd 0xf4b43ca8 0x7e961e88 Qm (i32)0x00000018 Qn (i32)0x00000078
vmul.i32 d31, d8, d7[1] :: Qd 0xffffbe60 0xffffbe60 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmul.i32 d31, d8, d7[1] :: Qd 0x0b4bc358 0x8169e178 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmul.i16 d30, d9, d7[3] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000140 Qn (i32)0x00000120
vmul.i16 d30, d9, d7[3] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000140 Qn (i32)0x00000120
vmul.i16 d4, d5, d6[2] :: Qd 0x0000a002 0x0000a002 Qm (i32)0x00004001 Qn (i32)0x00002002
+vmul.i16 d4, d5, d6[2] :: Qd 0x86369436 0x043e1c3e Qm (i32)0x00004001 Qn (i32)0x00002002
vmul.i32 d4, d8, d15[1] :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmul.i32 d4, d8, d15[1] :: Qd 0xa6363436 0xa43e3c3e Qm (i32)0x80000001 Qn (i32)0x80000002
vmul.i16 d4, d5, d6[0] :: Qd 0xdffe8866 0xdffe8866 Qm (i32)0xffff9433 Qn (i32)0x00002002
+vmul.i16 d4, d5, d6[0] :: Qd 0x86369436 0x043e1c3e Qm (i32)0xffff9433 Qn (i32)0x00002002
vmul.i32 d7, d8, d1[1] :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmul.i32 d7, d8, d1[1] :: Qd 0x1e893944 0x42e96974 Qm (i32)0x80000000 Qn (i16)0x0000000c
vmul.i16 d4, d5, d6[0] :: Qd 0x2000c1fc 0x2000c1fc Qm (i32)0x100000fe Qn (i32)0x00002002
+vmul.i16 d4, d5, d6[0] :: Qd 0x86369436 0x043e1c3e Qm (i32)0x100000fe Qn (i32)0x00002002
vmul.i32 d7, d8, d1[1] :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmul.i32 d7, d8, d1[1] :: Qd 0xa6363436 0xa43e3c3e Qm (i32)0x80000001 Qn (i32)0x80000002
---- VMLA (by scalar) ----
vmla.i32 d0, d1, d4[0] :: Qd 0x55556095 0x55556095 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmla.i32 d0, d1, d4[0] :: Qd 0x4a0991fd 0xd3eb73dd Qm (i32)0x00000018 Qn (i32)0x00000078
vmla.i32 d31, d8, d7[1] :: Qd 0x555513b5 0x555513b5 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmla.i32 d31, d8, d7[1] :: Qd 0x60a118ad 0xd6bf36cd Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmla.i16 d30, d9, d7[3] :: Qd 0x55555555 0x55555555 Qm (i32)0x00000140 Qn (i32)0x00000120
vmla.i16 d30, d9, d7[3] :: Qd 0x55555555 0x55555555 Qm (i32)0x00000140 Qn (i32)0x00000120
vmla.i16 d4, d5, d6[2] :: Qd 0x5555f557 0x5555f557 Qm (i32)0x00004001 Qn (i32)0x00002002
+vmla.i16 d4, d5, d6[2] :: Qd 0xdb8be98b 0x59937193 Qm (i32)0x00004001 Qn (i32)0x00002002
vmla.i32 d4, d8, d15[1] :: Qd 0xd5555557 0xd5555557 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmla.i32 d4, d8, d15[1] :: Qd 0xfb8b898b 0xf9939193 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.i16 d4, d5, d6[0] :: Qd 0x3553ddbb 0x3553ddbb Qm (i32)0xffff9433 Qn (i32)0x00002002
+vmla.i16 d4, d5, d6[0] :: Qd 0xdb8be98b 0x59937193 Qm (i32)0xffff9433 Qn (i32)0x00002002
vmla.i32 d7, d8, d1[1] :: Qd 0x55555555 0x55555555 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmla.i32 d7, d8, d1[1] :: Qd 0x73de8e99 0x983ebec9 Qm (i32)0x80000000 Qn (i16)0x0000000c
vmla.i16 d4, d5, d6[0] :: Qd 0x75551751 0x75551751 Qm (i32)0x100000fe Qn (i32)0x00002002
+vmla.i16 d4, d5, d6[0] :: Qd 0xdb8be98b 0x59937193 Qm (i32)0x100000fe Qn (i32)0x00002002
vmla.i32 d7, d8, d1[1] :: Qd 0xd5555557 0xd5555557 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmla.i32 d7, d8, d1[1] :: Qd 0xfb8b898b 0xf9939193 Qm (i32)0x80000001 Qn (i32)0x80000002
---- VMLS (by scalar) ----
vmls.i32 d0, d1, d4[0] :: Qd 0x5555557d 0x5555557d Qm (i32)0x00000018 Qn (i32)0x00000078
+vmls.i32 d0, d1, d4[0] :: Qd 0x5555557d 0x5555557d Qm (i32)0x00000018 Qn (i32)0x00000078
vmls.i32 d31, d8, d7[1] :: Qd 0x555596f5 0x555596f5 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmls.i32 d31, d8, d7[1] :: Qd 0x4a0991fd 0xd3eb73dd Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmls.i16 d30, d9, d7[3] :: Qd 0x55555555 0x55555555 Qm (i32)0x00000140 Qn (i32)0x00000120
vmls.i16 d30, d9, d7[3] :: Qd 0x55555555 0x55555555 Qm (i32)0x00000140 Qn (i32)0x00000120
vmls.i16 d4, d5, d6[2] :: Qd 0x5555b553 0x5555b553 Qm (i32)0x00004001 Qn (i32)0x00002002
+vmls.i16 d4, d5, d6[2] :: Qd 0xcf1fc11f 0x51173917 Qm (i32)0x00004001 Qn (i32)0x00002002
vmls.i32 d4, d8, d15[1] :: Qd 0xd5555553 0xd5555553 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmls.i32 d4, d8, d15[1] :: Qd 0xaf1f211f 0xb1171917 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.i16 d4, d5, d6[0] :: Qd 0x7557ccef 0x7557ccef Qm (i32)0xffff9433 Qn (i32)0x00002002
+vmls.i16 d4, d5, d6[0] :: Qd 0xcf1fc11f 0x51173917 Qm (i32)0xffff9433 Qn (i32)0x00002002
vmls.i32 d7, d8, d1[1] :: Qd 0x55555555 0x55555555 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmls.i32 d7, d8, d1[1] :: Qd 0x36cc1c11 0x126bebe1 Qm (i32)0x80000000 Qn (i16)0x0000000c
vmls.i16 d4, d5, d6[0] :: Qd 0x35559359 0x35559359 Qm (i32)0x100000fe Qn (i32)0x00002002
+vmls.i16 d4, d5, d6[0] :: Qd 0xcf1fc11f 0x51173917 Qm (i32)0x100000fe Qn (i32)0x00002002
vmls.i32 d7, d8, d1[1] :: Qd 0xd5555553 0xd5555553 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmls.i32 d7, d8, d1[1] :: Qd 0xaf1f211f 0xb1171917 Qm (i32)0x80000001 Qn (i32)0x80000002
---- VRSHR ----
vrshr.s8 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vrshr.s8 d0, d1, #0 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xffffffff
vrshr.s8 d0, d1, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
+vrshr.s8 d0, d1, #1 :: Qd 0x0b0f0d0f 0x0a0e100e Qm (i32)0xffffffff
vrshr.s16 d3, d4, #2 :: Qd 0x0000ffe1 0x0000ffe1 Qm (i32)0xffffff84
+vrshr.s16 d3, d4, #2 :: Qd 0x05470647 0x050707c7 Qm (i32)0xffffff84
+vrshr.s32 d2, d5, #31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
vrshr.s32 d2, d5, #31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
vrshr.s8 d6, d7, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000ffff
+vrshr.s8 d6, d7, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000ffff
vrshr.s16 d8, d9, #12 :: Qd 0x00000000 0x00000000 Qm (i32)0xfffffff6
+vrshr.s16 d8, d9, #12 :: Qd 0x00010002 0x00010002 Qm (i32)0xfffffff6
vrshr.s32 d10, d11, #5 :: Qd 0x00000140 0x00000140 Qm (i32)0x000027fa
+vrshr.s32 d10, d11, #5 :: Qd 0x00a8e8c9 0x00a0e0f9 Qm (i32)0x000027fa
vrshr.u8 d12, d13, #1 :: Qd 0x80808080 0x80808080 Qm (i32)0xffffffff
+vrshr.u8 d12, d13, #1 :: Qd 0x0b0f0d0f 0x0a0e100e Qm (i32)0xffffffff
vrshr.u16 d14, d15, #11 :: Qd 0x00200020 0x00200020 Qm (i32)0xffffffff
+vrshr.u16 d14, d15, #11 :: Qd 0x00030003 0x00030004 Qm (i32)0xffffffff
vrshr.u32 d10, d11, #9 :: Qd 0x00000002 0x00000002 Qm (i32)0x000003e8
+vrshr.u32 d10, d11, #9 :: Qd 0x000a8e8d 0x000a0e10 Qm (i32)0x000003e8
vrshr.u8 d7, d13, #7 :: Qd 0x02020202 0x02020202 Qm (i32)0xffffffff
+vrshr.u8 d7, d13, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
vrshr.u16 d8, d1, #5 :: Qd 0x0000055e 0x0000055e Qm (i32)0x0000abcf
+vrshr.u16 d8, d1, #5 :: Qd 0x00a900c9 0x00a100f9 Qm (i32)0x0000abcf
vrshr.u32 d12, d3, #15 :: Qd 0x00020000 0x00020000 Qm (i32)0xfffffe50
+vrshr.u32 d12, d3, #15 :: Qd 0x00002a3a 0x00002838 Qm (i32)0xfffffe50
vrshr.u64 d0, d1, #42 :: Qd 0x00000000 0x00400000 Qm (i32)0xffffffff
+vrshr.u64 d0, d1, #42 :: Qd 0x00000000 0x00054746 Qm (i32)0xffffffff
vrshr.s64 d6, d7, #12 :: Qd 0x00000000 0xfac00001 Qm (i32)0x00000fac
+vrshr.s64 d6, d7, #12 :: Qd 0x000151d1 0x91d141c2 Qm (i32)0x00000fac
vrshr.u64 d8, d4, #9 :: Qd 0x0000001a 0x7c00001a Qm (i32)0x000034f8
+vrshr.u64 d8, d4, #9 :: Qd 0x000a8e8c 0x8e8a0e10 Qm (i32)0x000034f8
vrshr.s64 d9, d12, #11 :: Qd 0x00000030 0x32c00030 Qm (i32)0x00018196
+vrshr.s64 d9, d12, #11 :: Qd 0x0002a3a3 0x23a28384 Qm (i32)0x00018196
---- VRSRA ----
vrsra.s8 d0, d1, #1 :: Qd 0x55555555 0x55555555 Qm (i32)0xffffffff
+vrsra.s8 d0, d1, #1 :: Qd 0x1e2a272a 0x1c2d2e2d Qm (i32)0xffffffff
vrsra.s16 d3, d4, #2 :: Qd 0x55555536 0x55555536 Qm (i32)0xffffff84
+vrsra.s16 d3, d4, #2 :: Qd 0x18622062 0x172625e6 Qm (i32)0xffffff84
vrsra.s32 d2, d5, #31 :: Qd 0x55555555 0x55555555 Qm (i32)0xffffffff
+vrsra.s32 d2, d5, #31 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vrsra.s8 d6, d7, #7 :: Qd 0x55555555 0x55555555 Qm (i32)0x0000ffff
+vrsra.s8 d6, d7, #7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x0000ffff
vrsra.s16 d8, d9, #12 :: Qd 0x55555555 0x55555555 Qm (i32)0xfffffff6
+vrsra.s16 d8, d9, #12 :: Qd 0x131c1a1d 0x12201e21 Qm (i32)0xfffffff6
vrsra.s32 d10, d11, #5 :: Qd 0x55555695 0x55555695 Qm (i32)0x000027fa
+vrsra.s32 d10, d11, #5 :: Qd 0x13c402e4 0x12bfff18 Qm (i32)0x000027fa
vrsra.u8 d12, d13, #1 :: Qd 0xd5d5d5d5 0xd5d5d5d5 Qm (i32)0xffffffff
+vrsra.u8 d12, d13, #1 :: Qd 0x1e2a272a 0x1c2d2e2d Qm (i32)0xffffffff
vrsra.u16 d14, d15, #11 :: Qd 0x55755575 0x55755575 Qm (i32)0xffffffff
+vrsra.u16 d14, d15, #11 :: Qd 0x131e1a1e 0x12221e23 Qm (i32)0xffffffff
vrsra.u32 d10, d11, #9 :: Qd 0x55555557 0x55555557 Qm (i32)0x000003e8
+vrsra.u32 d10, d11, #9 :: Qd 0x1325a8a8 0x12292c2f Qm (i32)0x000003e8
vrsra.u8 d7, d13, #7 :: Qd 0x57575757 0x57575757 Qm (i32)0xffffffff
+vrsra.u8 d7, d13, #7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vrsra.u16 d8, d1, #5 :: Qd 0x55555ab3 0x55555ab3 Qm (i32)0x0000abcf
+vrsra.u16 d8, d1, #5 :: Qd 0x13c41ae4 0x12c01f18 Qm (i32)0x0000abcf
vrsra.u32 d12, d3, #15 :: Qd 0x55575555 0x55575555 Qm (i32)0xfffffe50
+vrsra.u32 d12, d3, #15 :: Qd 0x131b4455 0x121f4657 Qm (i32)0xfffffe50
vrsra.u64 d0, d1, #42 :: Qd 0x55555555 0x55955555 Qm (i32)0xffffffff
+vrsra.u64 d0, d1, #42 :: Qd 0x131b1a1b 0x12246565 Qm (i32)0xffffffff
vrsra.s64 d6, d7, #12 :: Qd 0x55555556 0x50155556 Qm (i32)0x00000fac
+vrsra.s64 d6, d7, #12 :: Qd 0x131c6bec 0xa3f05fe1 Qm (i32)0x00000fac
vrsra.u64 d8, d4, #9 :: Qd 0x5555556f 0xd155556f Qm (i32)0x000034f8
+vrsra.u64 d8, d4, #9 :: Qd 0x1325a8a7 0xa0a92c2f Qm (i32)0x000034f8
vrsra.s64 d9, d12, #11 :: Qd 0x55555585 0x88155585 Qm (i32)0x00018196
+vrsra.s64 d9, d12, #11 :: Qd 0x131dbdbe 0x35c1a1a3 Qm (i32)0x00018196
---- VSHR ----
vshr.s8 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshr.s8 d0, d1, #0 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xffffffff
vshr.s8 d0, d1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshr.s8 d0, d1, #1 :: Qd 0x0a0e0c0e 0x0a0e0f0e Qm (i32)0xffffffff
vshr.s16 d3, d4, #2 :: Qd 0xffffffe1 0xffffffe1 Qm (i32)0xffffff84
+vshr.s16 d3, d4, #2 :: Qd 0x05470647 0x050707c7 Qm (i32)0xffffff84
vshr.s32 d2, d5, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshr.s32 d2, d5, #31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
vshr.s8 d6, d7, #7 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x0000ffff
+vshr.s8 d6, d7, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000ffff
vshr.s16 d8, d9, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff6
+vshr.s16 d8, d9, #12 :: Qd 0x00010001 0x00010001 Qm (i32)0xfffffff6
vshr.s32 d10, d11, #5 :: Qd 0x0000013f 0x0000013f Qm (i32)0x000027fa
+vshr.s32 d10, d11, #5 :: Qd 0x00a8e8c8 0x00a0e0f8 Qm (i32)0x000027fa
vshr.u8 d12, d13, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff
+vshr.u8 d12, d13, #1 :: Qd 0x0a0e0c0e 0x0a0e0f0e Qm (i32)0xffffffff
vshr.u16 d14, d15, #11 :: Qd 0x001f001f 0x001f001f Qm (i32)0xffffffff
+vshr.u16 d14, d15, #11 :: Qd 0x00020003 0x00020003 Qm (i32)0xffffffff
vshr.u32 d10, d11, #9 :: Qd 0x00000001 0x00000001 Qm (i32)0x000003e8
+vshr.u32 d10, d11, #9 :: Qd 0x000a8e8c 0x000a0e0f Qm (i32)0x000003e8
vshr.u8 d7, d13, #7 :: Qd 0x01010101 0x01010101 Qm (i32)0xffffffff
+vshr.u8 d7, d13, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
vshr.u16 d8, d1, #5 :: Qd 0x0000055e 0x0000055e Qm (i32)0x0000abcf
+vshr.u16 d8, d1, #5 :: Qd 0x00a800c8 0x00a000f8 Qm (i32)0x0000abcf
vshr.u32 d12, d3, #15 :: Qd 0x0001ffff 0x0001ffff Qm (i32)0xfffffe50
+vshr.u32 d12, d3, #15 :: Qd 0x00002a3a 0x00002838 Qm (i32)0xfffffe50
vshr.u64 d0, d1, #42 :: Qd 0x00000000 0x003fffff Qm (i32)0xffffffff
+vshr.u64 d0, d1, #42 :: Qd 0x00000000 0x00054746 Qm (i32)0xffffffff
vshr.s64 d6, d7, #12 :: Qd 0x00000000 0xfac00000 Qm (i32)0x00000fac
+vshr.s64 d6, d7, #12 :: Qd 0x000151d1 0x91d141c1 Qm (i32)0x00000fac
vshr.u64 d8, d4, #9 :: Qd 0x0000001a 0x7c00001a Qm (i32)0x000034f8
+vshr.u64 d8, d4, #9 :: Qd 0x000a8e8c 0x8e8a0e0f Qm (i32)0x000034f8
vshr.s64 d9, d12, #11 :: Qd 0x00000030 0x32c00030 Qm (i32)0x00018196
+vshr.s64 d9, d12, #11 :: Qd 0x0002a3a3 0x23a28383 Qm (i32)0x00018196
---- VSRA ----
vsra.s8 d0, d1, #1 :: Qd 0x54545454 0x54545454 Qm (i32)0xffffffff
+vsra.s8 d0, d1, #1 :: Qd 0x1d292629 0x1c2d2d2d Qm (i32)0xffffffff
vsra.s16 d3, d4, #2 :: Qd 0x55545536 0x55545536 Qm (i32)0xffffff84
+vsra.s16 d3, d4, #2 :: Qd 0x18622062 0x172625e6 Qm (i32)0xffffff84
vsra.s32 d2, d5, #31 :: Qd 0x55555554 0x55555554 Qm (i32)0xffffffff
+vsra.s32 d2, d5, #31 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vsra.s8 d6, d7, #7 :: Qd 0x55555454 0x55555454 Qm (i32)0x0000ffff
+vsra.s8 d6, d7, #7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x0000ffff
vsra.s16 d8, d9, #12 :: Qd 0x55545554 0x55545554 Qm (i32)0xfffffff6
+vsra.s16 d8, d9, #12 :: Qd 0x131c1a1c 0x12201e20 Qm (i32)0xfffffff6
vsra.s32 d10, d11, #5 :: Qd 0x55555694 0x55555694 Qm (i32)0x000027fa
+vsra.s32 d10, d11, #5 :: Qd 0x13c402e3 0x12bfff17 Qm (i32)0x000027fa
vsra.u8 d12, d13, #1 :: Qd 0xd4d4d4d4 0xd4d4d4d4 Qm (i32)0xffffffff
+vsra.u8 d12, d13, #1 :: Qd 0x1d292629 0x1c2d2d2d Qm (i32)0xffffffff
vsra.u16 d14, d15, #11 :: Qd 0x55745574 0x55745574 Qm (i32)0xffffffff
+vsra.u16 d14, d15, #11 :: Qd 0x131d1a1e 0x12211e22 Qm (i32)0xffffffff
vsra.u32 d10, d11, #9 :: Qd 0x55555556 0x55555556 Qm (i32)0x000003e8
+vsra.u32 d10, d11, #9 :: Qd 0x1325a8a7 0x12292c2e Qm (i32)0x000003e8
vsra.u8 d7, d13, #7 :: Qd 0x56565656 0x56565656 Qm (i32)0xffffffff
+vsra.u8 d7, d13, #7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vsra.u16 d8, d1, #5 :: Qd 0x55555ab3 0x55555ab3 Qm (i32)0x0000abcf
+vsra.u16 d8, d1, #5 :: Qd 0x13c31ae3 0x12bf1f17 Qm (i32)0x0000abcf
vsra.u32 d12, d3, #15 :: Qd 0x55575554 0x55575554 Qm (i32)0xfffffe50
+vsra.u32 d12, d3, #15 :: Qd 0x131b4455 0x121f4657 Qm (i32)0xfffffe50
vsra.u64 d0, d1, #42 :: Qd 0x55555555 0x55955554 Qm (i32)0xffffffff
+vsra.u64 d0, d1, #42 :: Qd 0x131b1a1b 0x12246565 Qm (i32)0xffffffff
vsra.s64 d6, d7, #12 :: Qd 0x55555556 0x50155555 Qm (i32)0x00000fac
+vsra.s64 d6, d7, #12 :: Qd 0x131c6bec 0xa3f05fe0 Qm (i32)0x00000fac
vsra.u64 d8, d4, #9 :: Qd 0x5555556f 0xd155556f Qm (i32)0x000034f8
+vsra.u64 d8, d4, #9 :: Qd 0x1325a8a7 0xa0a92c2e Qm (i32)0x000034f8
vsra.s64 d9, d12, #11 :: Qd 0x55555585 0x88155585 Qm (i32)0x00018196
+vsra.s64 d9, d12, #11 :: Qd 0x131dbdbe 0x35c1a1a2 Qm (i32)0x00018196
---- VSRI ----
vsri.16 d0, d1, #1 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff
+vsri.16 d0, d1, #1 :: Qd 0x0a8e0c8e 0x0a0e0f8e Qm (i32)0xffffffff
vsri.16 d3, d4, #2 :: Qd 0x7fff7fe1 0x7fff7fe1 Qm (i32)0xffffff84
+vsri.16 d3, d4, #2 :: Qd 0x05470647 0x050707c7 Qm (i32)0xffffff84
vsri.32 d2, d5, #31 :: Qd 0x55555555 0x55555555 Qm (i32)0xffffffff
+vsri.32 d2, d5, #31 :: Qd 0x131b1a1a 0x121f1e1e Qm (i32)0xffffffff
vsri.8 d6, d7, #7 :: Qd 0x54545555 0x54545555 Qm (i32)0x0000ffff
+vsri.8 d6, d7, #7 :: Qd 0x121a1a1a 0x121e1e1e Qm (i32)0x0000ffff
vsri.16 d8, d9, #12 :: Qd 0x555f555f 0x555f555f Qm (i32)0xfffffff6
+vsri.16 d8, d9, #12 :: Qd 0x13111a11 0x12111e11 Qm (i32)0xfffffff6
vsri.32 d10, d11, #5 :: Qd 0x5000013f 0x5000013f Qm (i32)0x000027fa
+vsri.32 d10, d11, #5 :: Qd 0x10a8e8c8 0x10a0e0f8 Qm (i32)0x000027fa
vsri.8 d12, d13, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff
+vsri.8 d12, d13, #1 :: Qd 0x0a0e0c0e 0x0a0e0f0e Qm (i32)0xffffffff
vsri.16 d14, d15, #11 :: Qd 0x555f555f 0x555f555f Qm (i32)0xffffffff
+vsri.16 d14, d15, #11 :: Qd 0x13021a03 0x12021e03 Qm (i32)0xffffffff
vsri.32 d10, d11, #9 :: Qd 0x55000001 0x55000001 Qm (i32)0x000003e8
+vsri.32 d10, d11, #9 :: Qd 0x130a8e8c 0x120a0e0f Qm (i32)0x000003e8
vsri.8 d7, d13, #7 :: Qd 0x55555555 0x55555555 Qm (i32)0xffffffff
+vsri.8 d7, d13, #7 :: Qd 0x121a1a1a 0x121e1e1e Qm (i32)0xffffffff
vsri.16 d8, d1, #5 :: Qd 0x5000555e 0x5000555e Qm (i32)0x0000abcf
+vsri.16 d8, d1, #5 :: Qd 0x10a818c8 0x10a018f8 Qm (i32)0x0000abcf
vsri.32 d12, d3, #15 :: Qd 0x5555ffff 0x5555ffff Qm (i32)0xfffffe50
+vsri.32 d12, d3, #15 :: Qd 0x131a2a3a 0x121e2838 Qm (i32)0xfffffe50
vsri.64 d0, d1, #42 :: Qd 0x55555555 0x557fffff Qm (i32)0xffffffff
+vsri.64 d0, d1, #42 :: Qd 0x131b1a1b 0x12054746 Qm (i32)0xffffffff
vsri.64 d6, d7, #12 :: Qd 0x55500000 0xfac00000 Qm (i32)0x00000fac
+vsri.64 d6, d7, #12 :: Qd 0x131151d1 0x91d141c1 Qm (i32)0x00000fac
vsri.64 d8, d4, #9 :: Qd 0x5500001a 0x7c00001a Qm (i32)0x000034f8
+vsri.64 d8, d4, #9 :: Qd 0x130a8e8c 0x8e8a0e0f Qm (i32)0x000034f8
vsri.64 d9, d12, #11 :: Qd 0x55400030 0x32c00030 Qm (i32)0x00018196
+vsri.64 d9, d12, #11 :: Qd 0x1302a3a3 0x23a28383 Qm (i32)0x00018196
---- VMOV (ARM core register to scalar) ----
vmov.32 d0[0], r5 :: Qd 0x55555555 0x0000000d Qm 0x0000000d
vmov.32 d1[1], r3 :: Qd 0x0000000c 0x55555555 Qm 0x0000000c
vst4.8 {d17[1],d18[1],d19[1],d20[1]} :: Result 0x2e2e1f1e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 4
vst4.8 {d28[0],d29[0],d30[0],d31[0]} :: Result 0x2b2f1c1f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 4
---- VLD1 (multiple single elements) ----
-vld1.8 {d0} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 13
-vld1.16 {d0} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 13
-vld1.32 {d0} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 42
+vld1.8 {d0} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
+vld1.16 {d0} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
+vld1.32 {d0} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
vld1.64 {d0} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
-vld1.8 {d9} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 13
-vld1.16 {d17} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 13
-vld1.32 {d31} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta -3
-vld1.64 {d14} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 13
-vld1.8 {d0-d1} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 13
-vld1.16 {d0-d1} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 13
-vld1.32 {d5-d6} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 13
-vld1.64 {d30-d31} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 13
-vld1.8 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 13
-vld1.16 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 13
-vld1.32 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 13
-vld1.64 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 13
-vld1.8 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
-vld1.16 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
-vld1.32 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
-vld1.64 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
+vld1.8 {d9} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
+vld1.16 {d17} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
+vld1.32 {d31} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
+vld1.64 {d14} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
+vld1.8 {d0-d1} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 0
+vld1.16 {d0-d1} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 0
+vld1.32 {d5-d6} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 0
+vld1.64 {d30-d31} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 0
+vld1.8 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 0
+vld1.16 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 0
+vld1.32 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 0
+vld1.64 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 0
+vld1.8 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 0
+vld1.16 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 0
+vld1.32 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 0
+vld1.64 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 0
---- VLD1 (single element to one lane) ----
-vld1.32 {d0[0]} :: Result 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 delta 13
-vld1.32 {d0[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f delta 42
-vld1.16 {d1[0]} :: Result 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 delta 13
+vld1.32 {d0[0]} :: Result 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 delta 0
+vld1.32 {d0[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f delta 0
+vld1.16 {d1[0]} :: Result 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 delta 0
vld1.16 {d1[1]} :: Result 0x1e1f5555 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 0x55555555 delta 0
-vld1.16 {d1[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f delta -3
-vld1.16 {d1[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 delta 13
-vld1.8 {d0[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 delta 13
-vld1.8 {d1[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 delta 13
-vld1.8 {d0[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 delta 13
-vld1.8 {d0[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f delta 13
-vld1.8 {d20[3]} :: Result 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 delta 13
-vld1.8 {d0[2]} :: Result 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 delta 13
-vld1.8 {d17[1]} :: Result 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 delta 13
-vld1.8 {d30[0]} :: Result 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 delta 13
+vld1.16 {d1[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f delta 0
+vld1.16 {d1[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 delta 0
+vld1.8 {d0[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 delta 0
+vld1.8 {d1[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 delta 0
+vld1.8 {d0[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 delta 0
+vld1.8 {d0[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f delta 0
+vld1.8 {d20[3]} :: Result 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 delta 0
+vld1.8 {d0[2]} :: Result 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 delta 0
+vld1.8 {d17[1]} :: Result 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 delta 0
+vld1.8 {d30[0]} :: Result 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 delta 0
---- VLD1 (single element to all lanes) ----
-vld1.8 {d0[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f delta 13
-vld1.16 {d0[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f delta 42
+vld1.8 {d0[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f delta 0
+vld1.16 {d0[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f delta 0
vld1.32 {d0[]} :: Result 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f delta 0
-vld1.8 {d9[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f delta -3
-vld1.16 {d17[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f delta 13
-vld1.32 {d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f delta 13
-vld1.8 {d0[],d1[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f delta 13
-vld1.16 {d0[],d1[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f delta 13
-vld1.32 {d5[],d6[]} :: Result 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f delta 13
+vld1.8 {d9[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f delta 0
+vld1.16 {d17[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f delta 0
+vld1.32 {d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f delta 0
+vld1.8 {d0[],d1[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f delta 0
+vld1.16 {d0[],d1[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f delta 0
+vld1.32 {d5[],d6[]} :: Result 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f delta 0
---- VLD2 (multiple 2-elements) ----
-vld2.8 {d30-d31} :: Result 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f delta 13
-vld2.16 {d0-d1} :: Result 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c delta 42
+vld2.8 {d30-d31} :: Result 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f delta 0
+vld2.16 {d0-d1} :: Result 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c delta 0
vld2.32 {d0-d1} :: Result 0x121f1e1f 0x141c1f1c 0x131b1a1b 0x151d191d 0x121f1e1f 0x141c1f1c 0x131b1a1b 0x151d191d delta 0
-vld2.8 {d10,d12} :: Result 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f delta -3
-vld2.16 {d20,d22} :: Result 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c delta 13
-vld2.32 {d0,d2} :: Result 0x121f1e1f 0x141c1f1c 0x131b1a1b 0x151d191d 0x121f1e1f 0x141c1f1c 0x131b1a1b 0x151d191d delta 13
-vld2.8 {d0-d3} :: Result 0x1b1b1f1f 0x1d1d1c1c 0x2c2b2f2f 0x2d2a2a2b 0x131a121e 0x1519141f 0x242b232e 0x262d252e delta 13
-vld2.16 {d20-d23} :: Result 0x1a1b1e1f 0x191d1f1c 0x2b2b2e2f 0x2d2a2e2b 0x131b121f 0x151d141c 0x242c232f 0x262d252a delta 13
-vld2.32 {d0-d3} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a delta 13
+vld2.8 {d10,d12} :: Result 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f delta 0
+vld2.16 {d20,d22} :: Result 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c delta 0
+vld2.32 {d0,d2} :: Result 0x121f1e1f 0x141c1f1c 0x131b1a1b 0x151d191d 0x121f1e1f 0x141c1f1c 0x131b1a1b 0x151d191d delta 0
+vld2.8 {d0-d3} :: Result 0x1b1b1f1f 0x1d1d1c1c 0x2c2b2f2f 0x2d2a2a2b 0x131a121e 0x1519141f 0x242b232e 0x262d252e delta 0
+vld2.16 {d20-d23} :: Result 0x1a1b1e1f 0x191d1f1c 0x2b2b2e2f 0x2d2a2e2b 0x131b121f 0x151d141c 0x242c232f 0x262d252a delta 0
+vld2.32 {d0-d3} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a delta 0
---- VLD2 (single 2-element structure to one lane) ----
-vld2.32 {d0[0],d1[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 delta 13
-vld2.32 {d0[1],d1[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b delta 42
+vld2.32 {d0[0],d1[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 delta 0
+vld2.32 {d0[1],d1[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b delta 0
vld2.32 {d0[0],d2[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 delta 0
-vld2.32 {d0[1],d2[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b delta -3
-vld2.16 {d1[0],d2[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 delta 13
-vld2.16 {d1[1],d2[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 delta 13
-vld2.16 {d1[2],d2[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f delta 13
-vld2.16 {d1[3],d2[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 delta 13
-vld2.16 {d1[0],d3[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 delta 13
-vld2.16 {d1[1],d3[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 delta 13
-vld2.16 {d1[2],d3[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f delta 13
-vld2.16 {d1[3],d3[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 delta 13
-vld2.8 {d0[7],d1[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 delta 13
-vld2.8 {d1[6],d2[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 delta 13
-vld2.8 {d0[5],d1[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 delta 13
-vld2.8 {d0[4],d1[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551e delta 13
-vld2.8 {d20[3],d21[3]} :: Result 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 delta 13
-vld2.8 {d0[2],d1[2]} :: Result 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 delta 13
-vld2.8 {d17[1],d18[1]} :: Result 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 delta 13
-vld2.8 {d30[0],d31[0]} :: Result 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 delta 13
+vld2.32 {d0[1],d2[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b delta 0
+vld2.16 {d1[0],d2[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 delta 0
+vld2.16 {d1[1],d2[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 delta 0
+vld2.16 {d1[2],d2[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f delta 0
+vld2.16 {d1[3],d2[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 delta 0
+vld2.16 {d1[0],d3[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 delta 0
+vld2.16 {d1[1],d3[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 delta 0
+vld2.16 {d1[2],d3[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f delta 0
+vld2.16 {d1[3],d3[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 delta 0
+vld2.8 {d0[7],d1[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 delta 0
+vld2.8 {d1[6],d2[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 delta 0
+vld2.8 {d0[5],d1[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 delta 0
+vld2.8 {d0[4],d1[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551e delta 0
+vld2.8 {d20[3],d21[3]} :: Result 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 delta 0
+vld2.8 {d0[2],d1[2]} :: Result 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 delta 0
+vld2.8 {d17[1],d18[1]} :: Result 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 delta 0
+vld2.8 {d30[0],d31[0]} :: Result 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 delta 0
---- VLD2 (2-elements to all lanes) ----
-vld2.8 {d0[],d1[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 13
-vld2.16 {d0[],d1[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f delta 42
+vld2.8 {d0[],d1[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 0
+vld2.16 {d0[],d1[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f delta 0
vld2.32 {d0[],d1[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b delta 0
-vld2.8 {d9[],d11[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta -3
-vld2.16 {d17[],d18[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f delta 13
-vld2.32 {d30[],d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b delta 13
-vld2.8 {d0[],d2[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 13
-vld2.16 {d0[],d2[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f delta 13
-vld2.32 {d5[],d7[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b delta 13
+vld2.8 {d9[],d11[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 0
+vld2.16 {d17[],d18[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f delta 0
+vld2.32 {d30[],d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b delta 0
+vld2.8 {d0[],d2[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 0
+vld2.16 {d0[],d2[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f delta 0
+vld2.32 {d5[],d7[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b delta 0
---- VLD3 (multiple 3-elements) ----
-vld3.8 {d20-d22} :: Result 0x1f1b121f 0x2b2f151d 0x1c131b1e 0x2c232f19 0x141c1a1f 0x242b2e1d 0x1f1b121f 0x2b2f151d delta 13
-vld3.16 {d0-d2} :: Result 0x131b1e1f 0x232f191d 0x1f1c121f 0x2b2b151d 0x141c1a1b 0x242c2e2f 0x131b1e1f 0x232f191d delta 42
+vld3.8 {d20-d22} :: Result 0x1f1b121f 0x2b2f151d 0x1c131b1e 0x2c232f19 0x141c1a1f 0x242b2e1d 0x1f1b121f 0x2b2f151d delta 0
+vld3.16 {d0-d2} :: Result 0x131b1e1f 0x232f191d 0x1f1c121f 0x2b2b151d 0x141c1a1b 0x242c2e2f 0x131b1e1f 0x232f191d delta 0
vld3.32 {d0-d2} :: Result 0x121f1e1f 0x151d191d 0x131b1a1b 0x232f2e2f 0x141c1f1c 0x242c2b2b 0x121f1e1f 0x151d191d delta 0
-vld3.8 {d0,d2,d4} :: Result 0x1f1b121f 0x2b2f151d 0x1c131b1e 0x2c232f19 0x141c1a1f 0x242b2e1d 0x1f1b121f 0x2b2f151d delta -3
-vld3.16 {d20,d22,d24} :: Result 0x131b1e1f 0x232f191d 0x1f1c121f 0x2b2b151d 0x141c1a1b 0x242c2e2f 0x131b1e1f 0x232f191d delta 13
-vld3.32 {d0,d2,d4} :: Result 0x121f1e1f 0x151d191d 0x131b1a1b 0x232f2e2f 0x141c1f1c 0x242c2b2b 0x121f1e1f 0x151d191d delta 13
+vld3.8 {d0,d2,d4} :: Result 0x1f1b121f 0x2b2f151d 0x1c131b1e 0x2c232f19 0x141c1a1f 0x242b2e1d 0x1f1b121f 0x2b2f151d delta 0
+vld3.16 {d20,d22,d24} :: Result 0x131b1e1f 0x232f191d 0x1f1c121f 0x2b2b151d 0x141c1a1b 0x242c2e2f 0x131b1e1f 0x232f191d delta 0
+vld3.32 {d0,d2,d4} :: Result 0x121f1e1f 0x151d191d 0x131b1a1b 0x232f2e2f 0x141c1f1c 0x242c2b2b 0x121f1e1f 0x151d191d delta 0
---- VLD3 (single 3-element structure to one lane) ----
-vld3.32 {d0[0],d1[0],d2[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x131b1a1b 0x55555555 delta 13
-vld3.32 {d0[1],d1[1],d2[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x131b1a1b delta 42
+vld3.32 {d0[0],d1[0],d2[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x131b1a1b 0x55555555 delta 0
+vld3.32 {d0[1],d1[1],d2[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x131b1a1b delta 0
vld3.32 {d0[0],d2[0],d4[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x131b1a1b 0x55555555 delta 0
-vld3.32 {d0[1],d2[1],d4[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x131b1a1b delta -3
-vld3.16 {d1[0],d2[0],d3[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555121f 0x55555555 delta 13
-vld3.16 {d1[1],d2[1],d3[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x121f5555 0x55555555 delta 13
-vld3.16 {d1[2],d2[2],d3[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555121f delta 13
-vld3.16 {d1[3],d2[3],d3[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x121f5555 delta 13
-vld3.16 {d1[0],d3[0],d5[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 delta 13
-vld3.16 {d1[1],d3[1],d5[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 delta 13
-vld3.16 {d1[2],d3[2],d5[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x5555121f 0x55555555 0x55551a1b delta 13
-vld3.16 {d1[3],d3[3],d5[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 delta 13
-vld3.8 {d0[7],d1[7],d2[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 delta 13
-vld3.8 {d1[6],d2[6],d3[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 delta 13
-vld3.8 {d0[5],d1[5],d2[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 delta 13
-vld3.8 {d0[4],d1[4],d2[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551e delta 13
-vld3.8 {d20[3],d21[3],d22[3]} :: Result 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 delta 13
-vld3.8 {d0[2],d1[2],d2[2]} :: Result 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 delta 13
-vld3.8 {d17[1],d18[1],d19[1]} :: Result 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 delta 13
-vld3.8 {d29[0],d30[0],d31[0]} :: Result 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 delta 13
+vld3.32 {d0[1],d2[1],d4[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x131b1a1b delta 0
+vld3.16 {d1[0],d2[0],d3[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555121f 0x55555555 delta 0
+vld3.16 {d1[1],d2[1],d3[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x121f5555 0x55555555 delta 0
+vld3.16 {d1[2],d2[2],d3[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555121f delta 0
+vld3.16 {d1[3],d2[3],d3[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x121f5555 delta 0
+vld3.16 {d1[0],d3[0],d5[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 delta 0
+vld3.16 {d1[1],d3[1],d5[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 delta 0
+vld3.16 {d1[2],d3[2],d5[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x5555121f 0x55555555 0x55551a1b delta 0
+vld3.16 {d1[3],d3[3],d5[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 delta 0
+vld3.8 {d0[7],d1[7],d2[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 delta 0
+vld3.8 {d1[6],d2[6],d3[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 delta 0
+vld3.8 {d0[5],d1[5],d2[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 delta 0
+vld3.8 {d0[4],d1[4],d2[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551e delta 0
+vld3.8 {d20[3],d21[3],d22[3]} :: Result 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 delta 0
+vld3.8 {d0[2],d1[2],d2[2]} :: Result 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 delta 0
+vld3.8 {d17[1],d18[1],d19[1]} :: Result 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 delta 0
+vld3.8 {d29[0],d30[0],d31[0]} :: Result 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 delta 0
---- VLD3 (3-elements to all lanes) ----
-vld3.8 {d0[],d1[],d2[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 13
-vld3.16 {d0[],d1[],d2[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x121f121f 0x121f121f delta 42
+vld3.8 {d0[],d1[],d2[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 0
+vld3.16 {d0[],d1[],d2[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x121f121f 0x121f121f delta 0
vld3.32 {d0[],d1[],d2[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x131b1a1b 0x131b1a1b delta 0
-vld3.8 {d9[],d11[],d13[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta -3
-vld3.16 {d17[],d18[],d19[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x121f121f 0x121f121f delta 13
-vld3.32 {d29[],d30[],d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c delta 13
-vld3.8 {d0[],d2[],d4[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 13
-vld3.16 {d0[],d2[],d4[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x121f121f 0x121f121f delta 13
-vld3.32 {d5[],d7[],d9[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x131b1a1b 0x131b1a1b delta 13
+vld3.8 {d9[],d11[],d13[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 0
+vld3.16 {d17[],d18[],d19[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x121f121f 0x121f121f delta 0
+vld3.32 {d29[],d30[],d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c delta 0
+vld3.8 {d0[],d2[],d4[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 0
+vld3.16 {d0[],d2[],d4[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x121f121f 0x121f121f delta 0
+vld3.32 {d5[],d7[],d9[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x131b1a1b 0x131b1a1b delta 0
---- VLD4 (multiple 3-elements) ----
-vld4.8 {d0-d3} :: Result 0x1d1c1b1f 0x2a2b2b2f 0x191f1a1e 0x2d2e2b2e 0x1d1c1b1f 0x2d2a2c2f 0x15141312 0x26252423 delta 13
+vld4.8 {d0-d3} :: Result 0x1d1c1b1f 0x2a2b2b2f 0x191f1a1e 0x2d2e2b2e 0x1d1c1b1f 0x2d2a2c2f 0x15141312 0x26252423 delta 0
vld4.16 {d20-d23} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x141c121f 0x252a232f 0x191d1a1b 0x2d2a2b2b 0x151d131b 0x262d242c delta 0
-vld4.32 {d0-d3} :: Result 0x121f1e1f 0x232f2e2f 0x131b1a1b 0x242c2b2b 0x141c1f1c 0x252a2e2b 0x151d191d 0x262d2d2a delta 42
-vld4.8 {d0,d2,d4,d6} :: Result 0x1d1c1b1f 0x2a2b2b2f 0x191f1a1e 0x2d2e2b2e 0x1d1c1b1f 0x2d2a2c2f 0x15141312 0x26252423 delta -3
-vld4.16 {d1,d3,d5,d7} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x141c121f 0x252a232f 0x191d1a1b 0x2d2a2b2b 0x151d131b 0x262d242c delta 13
-vld4.32 {d20,d22,d24,d26} :: Result 0x121f1e1f 0x232f2e2f 0x131b1a1b 0x242c2b2b 0x141c1f1c 0x252a2e2b 0x151d191d 0x262d2d2a delta 13
+vld4.32 {d0-d3} :: Result 0x121f1e1f 0x232f2e2f 0x131b1a1b 0x242c2b2b 0x141c1f1c 0x252a2e2b 0x151d191d 0x262d2d2a delta 0
+vld4.8 {d0,d2,d4,d6} :: Result 0x1d1c1b1f 0x2a2b2b2f 0x191f1a1e 0x2d2e2b2e 0x1d1c1b1f 0x2d2a2c2f 0x15141312 0x26252423 delta 0
+vld4.16 {d1,d3,d5,d7} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x141c121f 0x252a232f 0x191d1a1b 0x2d2a2b2b 0x151d131b 0x262d242c delta 0
+vld4.32 {d20,d22,d24,d26} :: Result 0x121f1e1f 0x232f2e2f 0x131b1a1b 0x242c2b2b 0x141c1f1c 0x252a2e2b 0x151d191d 0x262d2d2a delta 0
---- VLD4 (single 4-element structure to one lane) ----
-vld4.32 {d0[0],d1[0],d2[0],d3[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x151d191d 0x55555555 delta 13
-vld4.32 {d0[1],d1[1],d2[1],d3[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x55555555 delta 42
+vld4.32 {d0[0],d1[0],d2[0],d3[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x151d191d 0x55555555 delta 0
+vld4.32 {d0[1],d1[1],d2[1],d3[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x55555555 delta 0
vld4.32 {d0[0],d2[0],d4[0],d6[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x151d191d 0x55555555 delta 0
-vld4.32 {d0[1],d2[1],d4[1],d6[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x151d191d delta -3
-vld4.16 {d1[0],d2[0],d3[0],d4[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b 0x55555555 delta 13
-vld4.16 {d1[1],d2[1],d3[1],d4[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 0x55555555 delta 13
-vld4.16 {d1[2],d2[2],d3[2],d4[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b delta 13
-vld4.16 {d1[3],d2[3],d3[3],d4[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 delta 13
-vld4.16 {d1[0],d3[0],d5[0],d7[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b 0x55555555 delta 13
-vld4.16 {d1[1],d3[1],d5[1],d7[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 0x55555555 delta 13
-vld4.16 {d1[2],d3[2],d5[2],d7[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b delta 13
-vld4.16 {d1[3],d3[3],d5[3],d7[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 delta 13
-vld4.8 {d0[7],d1[7],d2[7],d3[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x12555555 delta 13
-vld4.8 {d1[6],d2[6],d3[6],d4[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x55125555 delta 13
-vld4.8 {d0[5],d1[5],d2[5],d3[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551255 delta 13
-vld4.8 {d0[4],d1[4],d2[4],d3[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x55555512 delta 13
-vld4.8 {d20[3],d21[3],d22[3],d23[3]} :: Result 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x12555555 0x55555555 delta 13
-vld4.8 {d0[2],d1[2],d2[2],d3[2]} :: Result 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x55125555 0x55555555 delta 13
-vld4.8 {d17[1],d18[1],d19[1],d20[1]} :: Result 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551255 0x55555555 delta 13
-vld4.8 {d28[0],d29[0],d30[0],d31[0]} :: Result 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x55555512 0x55555555 delta 13
----- VLD4 (4-elements to all lanes) ----
-vld4.8 {d0[],d1[],d2[],d3[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x12121212 0x12121212 delta 13
-vld4.16 {d0[],d1[],d2[],d3[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x131b131b 0x131b131b delta 42
-vld4.32 {d0[],d1[],d2[],d3[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x151d191d 0x151d191d delta 0
-vld4.8 {d9[],d11[],d13[],d15[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x12121212 0x12121212 delta -3
-vld4.16 {d17[],d18[],d19[],d20[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x131b131b 0x131b131b delta 13
-vld4.32 {d28[],d29[],d30[],d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x151d191d 0x151d191d delta 13
-vld4.8 {d0[],d2[],d4[],d6[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x12121212 0x12121212 delta 13
-vld4.16 {d0[],d2[],d4[],d6[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x131b131b 0x131b131b delta 13
-vld4.32 {d5[],d7[],d9[],d11[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x151d191d 0x151d191d delta 13
----- VST1 (multiple single elements) ----
-vst1.8 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.16 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 42
-vst1.32 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 0
-vst1.64 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta -3
-vst1.8 {d9} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.16 {d17} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.32 {d31} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.64 {d14} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d0-d1} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.16 {d0-d1} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.32 {d5-d6} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.64 {d30-d31} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 13
-vst1.16 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 13
-vst1.32 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 13
-vst1.64 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 13
-vst1.8 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
-vst1.16 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
-vst1.32 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
-vst1.64 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
----- VST1 (single element from one lane) ----
-vst1.32 {d0[0]} :: Result 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.32 {d0[1]} :: Result 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 42
-vst1.16 {d1[0]} :: Result 0x55552e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 0
-vst1.16 {d1[1]} :: Result 0x5555252a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta -3
-vst1.16 {d1[2]} :: Result 0x55552d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.16 {d1[3]} :: Result 0x5555262d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d0[7]} :: Result 0x55555526 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d1[6]} :: Result 0x5555552d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d0[5]} :: Result 0x5555552d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d0[4]} :: Result 0x5555552a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d20[3]} :: Result 0x55555525 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d0[2]} :: Result 0x5555552a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d17[1]} :: Result 0x5555552e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d30[0]} :: Result 0x5555552b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
----- VST2 (multiple 2-elements) ----
-vst2.8 {d30-d31} :: Result 0x2e2e2b2f 0x25232a2f 0x2d2b2a2b 0x26242d2c 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d0-d1} :: Result 0x2e2b2e2f 0x252a232f 0x2d2a2b2b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 delta 42
-vst2.32 {d0-d1} :: Result 0x232f2e2f 0x252a2e2b 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 0
-vst2.8 {d10,d12} :: Result 0x2e2e2b2f 0x25232a2f 0x2d2b2a2b 0x26242d2c 0x55555555 0x55555555 0x55555555 0x55555555 delta -3
-vst2.16 {d20,d22} :: Result 0x2e2b2e2f 0x252a232f 0x2d2a2b2b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.32 {d0,d2} :: Result 0x232f2e2f 0x252a2e2b 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d0-d3} :: Result 0x2e1e2f1f 0x23122f1f 0x2b1a2b1b 0x24132c1b 0x2e1f2b1c 0x25142a1c 0x2d192a1d 0x26152d1d delta 13
-vst2.16 {d20-d23} :: Result 0x2e2f1e1f 0x232f121f 0x2b2b1a1b 0x242c131b 0x2e2b1f1c 0x252a141c 0x2d2a191d 0x262d151d delta 13
-vst2.32 {d0-d3} :: Result 0x121f1e1f 0x232f2e2f 0x131b1a1b 0x242c2b2b 0x141c1f1c 0x252a2e2b 0x151d191d 0x262d2d2a delta 13
----- VST2 (single 2-element structure from one lane) ----
-vst2.32 {d0[0],d1[0]} :: Result 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.32 {d0[1],d1[1]} :: Result 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 42
-vst2.32 {d0[0],d2[0]} :: Result 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 0
-vst2.32 {d0[1],d2[1]} :: Result 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta -3
-vst2.16 {d1[0],d2[0]} :: Result 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d1[1],d2[1]} :: Result 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d1[2],d2[2]} :: Result 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d1[3],d2[3]} :: Result 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d1[0],d3[0]} :: Result 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d1[1],d3[1]} :: Result 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d1[2],d3[2]} :: Result 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d1[3],d3[3]} :: Result 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d0[7],d1[7]} :: Result 0x55552624 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d1[6],d2[6]} :: Result 0x55552d2c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d0[5],d1[5]} :: Result 0x55552d2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d0[4],d1[4]} :: Result 0x55552a2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d20[3],d21[3]} :: Result 0x55552523 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d0[2],d1[2]} :: Result 0x55552a2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d17[1],d18[1]} :: Result 0x55552e2e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d30[0],d31[0]} :: Result 0x55552b2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
----- VST3 (multiple 3-elements) ----
-vst3.8 {d20-d22} :: Result 0x2e2f1c2b 0x1c2a2e1f 0x2314252f 0x2d2b1d2a 0x1d2d2b19 0x2415262c 0x55555555 0x55555555 delta 13
-vst3.16 {d0-d2} :: Result 0x1f1c2e2b 0x252a2e2f 0x232f141c 0x191d2d2a 0x262d2b2b 0x242c151d 0x55555555 0x55555555 delta 42
-vst3.32 {d0-d2} :: Result 0x252a2e2b 0x141c1f1c 0x232f2e2f 0x262d2d2a 0x151d191d 0x242c2b2b 0x55555555 0x55555555 delta 0
-vst3.8 {d0,d2,d4} :: Result 0x2e2f1c2b 0x1c2a2e1f 0x2314252f 0x2d2b1d2a 0x1d2d2b19 0x2415262c 0x55555555 0x55555555 delta -3
-vst3.16 {d20,d22,d24} :: Result 0x1f1c2e2b 0x252a2e2f 0x232f141c 0x191d2d2a 0x262d2b2b 0x242c151d 0x55555555 0x55555555 delta 13
-vst3.32 {d0,d2,d4} :: Result 0x252a2e2b 0x141c1f1c 0x232f2e2f 0x262d2d2a 0x151d191d 0x242c2b2b 0x55555555 0x55555555 delta 13
----- VST3 (single 3-element structure from one lane) ----
-vst3.32 {d0[0],d1[0],d2[0]} :: Result 0x121f1e1f 0x252a2e2b 0x232f2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.32 {d0[1],d1[1],d2[1]} :: Result 0x131b1a1b 0x262d2d2a 0x242c2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 42
-vst3.32 {d0[0],d2[0],d4[0]} :: Result 0x121f1e1f 0x252a2e2b 0x232f2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 0
-vst3.32 {d0[1],d2[1],d4[1]} :: Result 0x131b1a1b 0x262d2d2a 0x242c2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta -3
-vst3.16 {d1[0],d2[0],d3[0]} :: Result 0x2e2b1e1f 0x55552e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.16 {d1[1],d2[1],d3[1]} :: Result 0x252a121f 0x5555232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.16 {d1[2],d2[2],d3[2]} :: Result 0x2d2a1a1b 0x55552b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.16 {d1[3],d2[3],d3[3]} :: Result 0x262d131b 0x5555242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.16 {d1[0],d3[0],d5[0]} :: Result 0x2e2f1e1f 0x55552e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.16 {d1[1],d3[1],d5[1]} :: Result 0x232f121f 0x5555252a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.16 {d1[2],d3[2],d5[2]} :: Result 0x2b2b1a1b 0x55552d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.16 {d1[3],d3[3],d5[3]} :: Result 0x242c131b 0x5555262d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d0[7],d1[7],d2[7]} :: Result 0x55242613 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d1[6],d2[6],d3[6]} :: Result 0x552c2d1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d0[5],d1[5],d2[5]} :: Result 0x552b2d1a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d0[4],d1[4],d2[4]} :: Result 0x552b2a1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d20[3],d21[3],d22[3]} :: Result 0x55232512 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d0[2],d1[2],d2[2]} :: Result 0x552f2a1f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d17[1],d18[1],d19[1]} :: Result 0x552e2e1e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d29[0],d30[0],d31[0]} :: Result 0x552b1f2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
+vld4.32 {d0[1],d2[1],d4[1],d6[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x151d191d delta 0
+vld4.16 {d1[0],d2[0],d3[0],d4[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b 0x55555555 delta 0
+vld4.16 {d1[1],d2[1],d3[1],d4[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 0x55555555 delta 0
+vld4.16 {d1[2],d2[2],d3[2],d4[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b delta 0
+vld4.16 {d1[3],d2[3],d3[3],d4[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 delta 0
+vld4.16 {d1[0],d3[0],d5[0],d7[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b 0x55555555 delta 0
+vld4.16 {d1[1],d3[1],d5[1],d7[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 0x55555555 delta 0
+vld4.16 {d1[2],d3[2],d5[2],d7[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b delta 0
+vld4.16 {d1[3],d3[3],d5[3],d7[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 delta 0
+vld4.8 {d0[7],d1[7],d2[7],d3[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x12555555 delta 0
+vld4.8 {d1[6],d2[6],d3[6],d4[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x55125555 delta 0
+vld4.8 {d0[5],d1[5],d2[5],d3[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551255 delta 0
+vld4.8 {d0[4],d1[4],d2[4],d3[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x55555512 delta 0
+vld4.8 {d20[3],d21[3],d22[3],d23[3]} :: Result 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x12555555 0x55555555 delta 0
+vld4.8 {d0[2],d1[2],d2[2],d3[2]} :: Result 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x55125555 0x55555555 delta 0
+vld4.8 {d17[1],d18[1],d19[1],d20[1]} :: Result 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551255 0x55555555 delta 0
+vld4.8 {d28[0],d29[0],d30[0],d31[0]} :: Result 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x55555512 0x55555555 delta 0
+---- VLD4 (4-elements to all lanes) ----
+vld4.8 {d0[],d1[],d2[],d3[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x12121212 0x12121212 delta 0
+vld4.16 {d0[],d1[],d2[],d3[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x131b131b 0x131b131b delta 0
+vld4.32 {d0[],d1[],d2[],d3[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x151d191d 0x151d191d delta 0
+vld4.8 {d9[],d11[],d13[],d15[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x12121212 0x12121212 delta 0
+vld4.16 {d17[],d18[],d19[],d20[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x131b131b 0x131b131b delta 0
+vld4.32 {d28[],d29[],d30[],d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x151d191d 0x151d191d delta 0
+vld4.8 {d0[],d2[],d4[],d6[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x12121212 0x12121212 delta 0
+vld4.16 {d0[],d2[],d4[],d6[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x131b131b 0x131b131b delta 0
+vld4.32 {d5[],d7[],d9[],d11[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x151d191d 0x151d191d delta 0
+---- VST1 (multiple single elements) ----
+vst1.8 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.16 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069420
+vst1.32 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069424
+vst1.64 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069428
+vst1.8 {d9} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.16 {d17} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.32 {d31} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.64 {d14} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d0-d1} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.16 {d0-d1} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.32 {d5-d6} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.64 {d30-d31} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 1069416
+vst1.16 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 1069416
+vst1.32 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 1069416
+vst1.64 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 1069416
+vst1.8 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 1069416
+vst1.16 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 1069416
+vst1.32 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 1069416
+vst1.64 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 1069416
+---- VST1 (single element from one lane) ----
+vst1.32 {d0[0]} :: Result 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.32 {d0[1]} :: Result 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069420
+vst1.16 {d1[0]} :: Result 0x55552e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069424
+vst1.16 {d1[1]} :: Result 0x5555252a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069428
+vst1.16 {d1[2]} :: Result 0x55552d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.16 {d1[3]} :: Result 0x5555262d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d0[7]} :: Result 0x55555526 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d1[6]} :: Result 0x5555552d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d0[5]} :: Result 0x5555552d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d0[4]} :: Result 0x5555552a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d20[3]} :: Result 0x55555525 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d0[2]} :: Result 0x5555552a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d17[1]} :: Result 0x5555552e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d30[0]} :: Result 0x5555552b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+---- VST2 (multiple 2-elements) ----
+vst2.8 {d30-d31} :: Result 0x2e2e2b2f 0x25232a2f 0x2d2b2a2b 0x26242d2c 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d0-d1} :: Result 0x2e2b2e2f 0x252a232f 0x2d2a2b2b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069420
+vst2.32 {d0-d1} :: Result 0x232f2e2f 0x252a2e2b 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069424
+vst2.8 {d10,d12} :: Result 0x2e2e2b2f 0x25232a2f 0x2d2b2a2b 0x26242d2c 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069428
+vst2.16 {d20,d22} :: Result 0x2e2b2e2f 0x252a232f 0x2d2a2b2b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.32 {d0,d2} :: Result 0x232f2e2f 0x252a2e2b 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d0-d3} :: Result 0x2e1e2f1f 0x23122f1f 0x2b1a2b1b 0x24132c1b 0x2e1f2b1c 0x25142a1c 0x2d192a1d 0x26152d1d delta 1069416
+vst2.16 {d20-d23} :: Result 0x2e2f1e1f 0x232f121f 0x2b2b1a1b 0x242c131b 0x2e2b1f1c 0x252a141c 0x2d2a191d 0x262d151d delta 1069416
+vst2.32 {d0-d3} :: Result 0x121f1e1f 0x232f2e2f 0x131b1a1b 0x242c2b2b 0x141c1f1c 0x252a2e2b 0x151d191d 0x262d2d2a delta 1069416
+---- VST2 (single 2-element structure from one lane) ----
+vst2.32 {d0[0],d1[0]} :: Result 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.32 {d0[1],d1[1]} :: Result 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069420
+vst2.32 {d0[0],d2[0]} :: Result 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069424
+vst2.32 {d0[1],d2[1]} :: Result 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069428
+vst2.16 {d1[0],d2[0]} :: Result 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d1[1],d2[1]} :: Result 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d1[2],d2[2]} :: Result 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d1[3],d2[3]} :: Result 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d1[0],d3[0]} :: Result 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d1[1],d3[1]} :: Result 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d1[2],d3[2]} :: Result 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d1[3],d3[3]} :: Result 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d0[7],d1[7]} :: Result 0x55552624 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d1[6],d2[6]} :: Result 0x55552d2c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d0[5],d1[5]} :: Result 0x55552d2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d0[4],d1[4]} :: Result 0x55552a2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d20[3],d21[3]} :: Result 0x55552523 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d0[2],d1[2]} :: Result 0x55552a2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d17[1],d18[1]} :: Result 0x55552e2e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d30[0],d31[0]} :: Result 0x55552b2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+---- VST3 (multiple 3-elements) ----
+vst3.8 {d20-d22} :: Result 0x2e2f1c2b 0x1c2a2e1f 0x2314252f 0x2d2b1d2a 0x1d2d2b19 0x2415262c 0x55555555 0x55555555 delta 1069416
+vst3.16 {d0-d2} :: Result 0x1f1c2e2b 0x252a2e2f 0x232f141c 0x191d2d2a 0x262d2b2b 0x242c151d 0x55555555 0x55555555 delta 1069420
+vst3.32 {d0-d2} :: Result 0x252a2e2b 0x141c1f1c 0x232f2e2f 0x262d2d2a 0x151d191d 0x242c2b2b 0x55555555 0x55555555 delta 1069424
+vst3.8 {d0,d2,d4} :: Result 0x2e2f1c2b 0x1c2a2e1f 0x2314252f 0x2d2b1d2a 0x1d2d2b19 0x2415262c 0x55555555 0x55555555 delta 1069428
+vst3.16 {d20,d22,d24} :: Result 0x1f1c2e2b 0x252a2e2f 0x232f141c 0x191d2d2a 0x262d2b2b 0x242c151d 0x55555555 0x55555555 delta 1069416
+vst3.32 {d0,d2,d4} :: Result 0x252a2e2b 0x141c1f1c 0x232f2e2f 0x262d2d2a 0x151d191d 0x242c2b2b 0x55555555 0x55555555 delta 1069416
+---- VST3 (single 3-element structure from one lane) ----
+vst3.32 {d0[0],d1[0],d2[0]} :: Result 0x121f1e1f 0x252a2e2b 0x232f2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.32 {d0[1],d1[1],d2[1]} :: Result 0x131b1a1b 0x262d2d2a 0x242c2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069420
+vst3.32 {d0[0],d2[0],d4[0]} :: Result 0x121f1e1f 0x252a2e2b 0x232f2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069424
+vst3.32 {d0[1],d2[1],d4[1]} :: Result 0x131b1a1b 0x262d2d2a 0x242c2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069428
+vst3.16 {d1[0],d2[0],d3[0]} :: Result 0x2e2b1e1f 0x55552e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.16 {d1[1],d2[1],d3[1]} :: Result 0x252a121f 0x5555232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.16 {d1[2],d2[2],d3[2]} :: Result 0x2d2a1a1b 0x55552b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.16 {d1[3],d2[3],d3[3]} :: Result 0x262d131b 0x5555242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.16 {d1[0],d3[0],d5[0]} :: Result 0x2e2f1e1f 0x55552e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.16 {d1[1],d3[1],d5[1]} :: Result 0x232f121f 0x5555252a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.16 {d1[2],d3[2],d5[2]} :: Result 0x2b2b1a1b 0x55552d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.16 {d1[3],d3[3],d5[3]} :: Result 0x242c131b 0x5555262d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d0[7],d1[7],d2[7]} :: Result 0x55242613 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d1[6],d2[6],d3[6]} :: Result 0x552c2d1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d0[5],d1[5],d2[5]} :: Result 0x552b2d1a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d0[4],d1[4],d2[4]} :: Result 0x552b2a1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d20[3],d21[3],d22[3]} :: Result 0x55232512 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d0[2],d1[2],d2[2]} :: Result 0x552f2a1f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d17[1],d18[1],d19[1]} :: Result 0x552e2e1e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d29[0],d30[0],d31[0]} :: Result 0x552b1f2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
---- VST4 (multiple 4-elements) ----
-vst4.8 {d0-d3} :: Result 0x2b2f1c1f 0x2e2e1f1e 0x2a2f1c1f 0x25231412 0x2a2b1d1b 0x2d2b191a 0x2d2c1d1b 0x26241513 delta 13
-vst4.16 {d20-d23} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x141c121f 0x252a232f 0x191d1a1b 0x2d2a2b2b 0x151d131b 0x262d242c delta 42
-vst4.32 {d0-d3} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a delta 0
-vst4.8 {d0,d2,d4,d6} :: Result 0x2b2f1c1f 0x2e2e1f1e 0x2a2f1c1f 0x25231412 0x2a2b1d1b 0x2d2b191a 0x2d2c1d1b 0x26241513 delta -3
-vst4.16 {d1,d3,d5,d7} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x141c121f 0x252a232f 0x191d1a1b 0x2d2a2b2b 0x151d131b 0x262d242c delta 13
-vst4.32 {d20,d22,d24,d26} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a delta 13
+vst4.8 {d0-d3} :: Result 0x2b2f1c1f 0x2e2e1f1e 0x2a2f1c1f 0x25231412 0x2a2b1d1b 0x2d2b191a 0x2d2c1d1b 0x26241513 delta 1069416
+vst4.16 {d20-d23} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x141c121f 0x252a232f 0x191d1a1b 0x2d2a2b2b 0x151d131b 0x262d242c delta 1069420
+vst4.32 {d0-d3} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a delta 1069424
+vst4.8 {d0,d2,d4,d6} :: Result 0x2b2f1c1f 0x2e2e1f1e 0x2a2f1c1f 0x25231412 0x2a2b1d1b 0x2d2b191a 0x2d2c1d1b 0x26241513 delta 1069428
+vst4.16 {d1,d3,d5,d7} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x141c121f 0x252a232f 0x191d1a1b 0x2d2a2b2b 0x151d131b 0x262d242c delta 1069416
+vst4.32 {d20,d22,d24,d26} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a delta 1069416
---- VST4 (single 4-element structure from one lane) ----
-vst4.32 {d0[0],d1[0],d2[0],d3[0]} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.32 {d0[1],d1[1],d2[1],d3[1]} :: Result 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 42
-vst4.32 {d0[0],d2[0],d4[0],d6[0]} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 delta 0
-vst4.32 {d0[1],d2[1],d4[1],d6[1]} :: Result 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta -3
-vst4.16 {d1[0],d2[0],d3[0],d4[0]} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.16 {d1[1],d2[1],d3[1],d4[1]} :: Result 0x141c121f 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.16 {d1[2],d2[2],d3[2],d4[2]} :: Result 0x191d1a1b 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.16 {d1[3],d2[3],d3[3],d4[3]} :: Result 0x151d131b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.16 {d1[0],d3[0],d5[0],d7[0]} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.16 {d1[1],d3[1],d5[1],d7[1]} :: Result 0x141c121f 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.16 {d1[2],d3[2],d5[2],d7[2]} :: Result 0x191d1a1b 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.16 {d1[3],d3[3],d5[3],d7[3]} :: Result 0x151d131b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d0[7],d1[7],d2[7],d3[7]} :: Result 0x26241513 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d1[6],d2[6],d3[6],d4[6]} :: Result 0x2d2c1d1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d0[5],d1[5],d2[5],d3[5]} :: Result 0x2d2b191a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d0[4],d1[4],d2[4],d3[4]} :: Result 0x2a2b1d1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d20[3],d21[3],d22[3],d23[3]} :: Result 0x25231412 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d0[2],d1[2],d2[2],d3[2]} :: Result 0x2a2f1c1f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d17[1],d18[1],d19[1],d20[1]} :: Result 0x2e2e1f1e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d28[0],d29[0],d30[0],d31[0]} :: Result 0x2b2f1c1f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
+vst4.32 {d0[0],d1[0],d2[0],d3[0]} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.32 {d0[1],d1[1],d2[1],d3[1]} :: Result 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069420
+vst4.32 {d0[0],d2[0],d4[0],d6[0]} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069424
+vst4.32 {d0[1],d2[1],d4[1],d6[1]} :: Result 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069428
+vst4.16 {d1[0],d2[0],d3[0],d4[0]} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.16 {d1[1],d2[1],d3[1],d4[1]} :: Result 0x141c121f 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.16 {d1[2],d2[2],d3[2],d4[2]} :: Result 0x191d1a1b 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.16 {d1[3],d2[3],d3[3],d4[3]} :: Result 0x151d131b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.16 {d1[0],d3[0],d5[0],d7[0]} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.16 {d1[1],d3[1],d5[1],d7[1]} :: Result 0x141c121f 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.16 {d1[2],d3[2],d5[2],d7[2]} :: Result 0x191d1a1b 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.16 {d1[3],d3[3],d5[3],d7[3]} :: Result 0x151d131b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d0[7],d1[7],d2[7],d3[7]} :: Result 0x26241513 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d1[6],d2[6],d3[6],d4[6]} :: Result 0x2d2c1d1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d0[5],d1[5],d2[5],d3[5]} :: Result 0x2d2b191a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d0[4],d1[4],d2[4],d3[4]} :: Result 0x2a2b1d1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d20[3],d21[3],d22[3],d23[3]} :: Result 0x25231412 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d0[2],d1[2],d2[2],d3[2]} :: Result 0x2a2f1c1f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d17[1],d18[1],d19[1],d20[1]} :: Result 0x2e2e1f1e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d28[0],d29[0],d30[0],d31[0]} :: Result 0x2b2f1c1f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
---- VMOVN ----
vmovn.i32 d0, q0 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024
+vmovn.i32 d0, q0 :: Qd 0x00240024 0x55555555 Qm (i32)0x00000032 Qn (i32)0x00000024
vmovn.i16 d7, q5 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024
+vmovn.i16 d7, q5 :: Qd 0x00240024 0x1b1b1f1f Qm (i32)0x00000032 Qn (i32)0x00000024
vmovn.i64 d31, q0 :: Qd 0x00000024 0x00000032 Qm (i32)0x00000032 Qn (i32)0x00000024
+vmovn.i64 d31, q0 :: Qd 0x00000024 0x121f1e1f Qm (i32)0x00000032 Qn (i32)0x00000024
vmovn.i32 d0, q0 :: Qd 0xf0f0f0f0 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000f0
+vmovn.i32 d0, q0 :: Qd 0xf0f0f0f0 0x55555555 Qm (i8)0x000000ff Qn (i8)0x000000f0
vmovn.i16 d7, q5 :: Qd 0xefefefef 0xadadadad Qm (i16)0x0000dead Qn (i16)0x0000beef
+vmovn.i16 d7, q5 :: Qd 0xefefefef 0x1b1b1f1f Qm (i16)0x0000dead Qn (i16)0x0000beef
vmovn.i64 d31, q0 :: Qd 0x24242424 0xff00fe0f Qm (i32)0xff00fe0f Qn (i8)0x00000024
+vmovn.i64 d31, q0 :: Qd 0x24242424 0x121f1e1f Qm (i32)0xff00fe0f Qn (i8)0x00000024
---- VQMOVN ----
vqmovn.u32 d0, q0 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 00000000
+vqmovn.u32 d0, q0 :: Qd 0x00240024 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovn.u16 d7, q5 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 00000000
+vqmovn.u16 d7, q5 :: Qd 0x00240024 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
+vqmovn.u64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovn.u64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovn.u32 d0, q0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000f0 fpscr: 08000000
+vqmovn.u32 d0, q0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000f0 fpscr: 08000000
+vqmovn.u16 d7, q5 :: Qd 0xffffffff 0xffffffff Qm (i16)0x0000dead Qn (i16)0x0000beef fpscr: 08000000
vqmovn.u16 d7, q5 :: Qd 0xffffffff 0xffffffff Qm (i16)0x0000dead Qn (i16)0x0000beef fpscr: 08000000
vqmovn.u64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff00fe0f Qn (i8)0x00000024 fpscr: 08000000
+vqmovn.u64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff00fe0f Qn (i8)0x00000024 fpscr: 08000000
vqmovn.s32 d0, q0 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 00000000
+vqmovn.s32 d0, q0 :: Qd 0x00240024 0x7fff7fff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovn.s16 d7, q5 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 00000000
+vqmovn.s16 d7, q5 :: Qd 0x00240024 0x7f7f7f7f Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
+vqmovn.s64 d31, q0 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovn.s64 d31, q0 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovn.s32 d0, q0 :: Qd 0x80008000 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000f0 fpscr: 08000000
+vqmovn.s32 d0, q0 :: Qd 0x80008000 0x7fff7fff Qm (i8)0x000000ff Qn (i8)0x000000f0 fpscr: 08000000
vqmovn.s16 d7, q5 :: Qd 0x80808080 0x80808080 Qm (i16)0x0000dead Qn (i16)0x0000beef fpscr: 08000000
+vqmovn.s16 d7, q5 :: Qd 0x80808080 0x7f7f7f7f Qm (i16)0x0000dead Qn (i16)0x0000beef fpscr: 08000000
vqmovn.s64 d31, q0 :: Qd 0x7fffffff 0x80000000 Qm (i32)0xff00fe0f Qn (i8)0x00000024 fpscr: 08000000
+vqmovn.s64 d31, q0 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xff00fe0f Qn (i8)0x00000024 fpscr: 08000000
vqmovn.s32 d0, q0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 00000000
+vqmovn.s32 d0, q0 :: Qd 0xffffffff 0x7fff7fff Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 08000000
vqmovn.s16 d7, q5 :: Qd 0x7f7f7f7f 0xffffffff Qm (i8)0x000000ff Qn (i16)0x000000ff fpscr: 08000000
+vqmovn.s16 d7, q5 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i8)0x000000ff Qn (i16)0x000000ff fpscr: 08000000
vqmovn.s64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 00000000
+vqmovn.s64 d31, q0 :: Qd 0xffffffff 0x7fffffff Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 08000000
---- VQMOVN ----
vqmovun.s32 d0, q0 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 00000000
+vqmovun.s32 d0, q0 :: Qd 0x00240024 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovun.s16 d7, q5 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 00000000
+vqmovun.s16 d7, q5 :: Qd 0x00240024 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
+vqmovun.s64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovun.s64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovun.s32 d0, q0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff Qn (i8)0x000000f0 fpscr: 08000000
+vqmovun.s32 d0, q0 :: Qd 0x00000000 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000f0 fpscr: 08000000
vqmovun.s16 d7, q5 :: Qd 0x00000000 0x00000000 Qm (i16)0x0000dead Qn (i16)0x0000beef fpscr: 08000000
+vqmovun.s16 d7, q5 :: Qd 0x00000000 0xffffffff Qm (i16)0x0000dead Qn (i16)0x0000beef fpscr: 08000000
vqmovun.s64 d31, q0 :: Qd 0xffffffff 0x00000000 Qm (i32)0xff00fe0f Qn (i8)0x00000024 fpscr: 08000000
+vqmovun.s64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff00fe0f Qn (i8)0x00000024 fpscr: 08000000
vqmovun.s32 d0, q0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 08000000
+vqmovun.s32 d0, q0 :: Qd 0x00000000 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 08000000
vqmovun.s16 d7, q5 :: Qd 0xffffffff 0x00000000 Qm (i8)0x000000ff Qn (i16)0x000000ff fpscr: 08000000
+vqmovun.s16 d7, q5 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i16)0x000000ff fpscr: 08000000
vqmovun.s64 d31, q0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 08000000
+vqmovun.s64 d31, q0 :: Qd 0x00000000 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 08000000
---- VABS ----
vabs.s32 d0, d1 :: Qd 0x00000073 0x00000073 Qm (i32)0x00000073
+vabs.s32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000073
vabs.s16 d15, d4 :: Qd 0x00000073 0x00000073 Qm (i32)0x00000073
+vabs.s16 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000073
vabs.s8 d8, d7 :: Qd 0x00000073 0x00000073 Qm (i32)0x00000073
+vabs.s8 d8, d7 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000073
vabs.s32 d0, d1 :: Qd 0x000000fe 0x000000fe Qm (i32)0x000000fe
+vabs.s32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x000000fe
vabs.s16 d31, d4 :: Qd 0x000000ef 0x000000ef Qm (i32)0x000000ef
+vabs.s16 d31, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x000000ef
vabs.s8 d8, d7 :: Qd 0x00000022 0x00000022 Qm (i32)0x000000de
+vabs.s8 d8, d7 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x000000de
vabs.s32 d0, d1 :: Qd 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a
+vabs.s32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i16)0x0000fe0a
vabs.s16 d15, d4 :: Qd 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b
+vabs.s16 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i16)0x0000ef0b
vabs.s8 d8, d7 :: Qd 0x220c220c 0x220c220c Qm (i16)0x0000de0c
+vabs.s8 d8, d7 :: Qd 0x151d191d 0x141c1f1c Qm (i16)0x0000de0c
---- VQABS ----
vqabs.s32 d0, d1 :: Qd 0x00000073 0x00000073 Qm (i32)0x00000073 fpscr 00000000
+vqabs.s32 d0, d1 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000073 fpscr 00000000
vqabs.s32 d0, d1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x80000000 fpscr 08000000
+vqabs.s32 d0, d1 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000000 fpscr 00000000
vqabs.s16 d0, d1 :: Qd 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 fpscr 08000000
+vqabs.s16 d0, d1 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000000 fpscr 00000000
vqabs.s8 d0, d1 :: Qd 0x7f000000 0x7f000000 Qm (i32)0x80000000 fpscr 08000000
+vqabs.s8 d0, d1 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000000 fpscr 00000000
vqabs.s16 d15, d4 :: Qd 0x00000073 0x00000073 Qm (i32)0x00000073 fpscr 00000000
+vqabs.s16 d15, d4 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000073 fpscr 00000000
vqabs.s8 d8, d7 :: Qd 0x00000073 0x00000073 Qm (i32)0x00000073 fpscr 00000000
+vqabs.s8 d8, d7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000073 fpscr 00000000
vqabs.s32 d0, d1 :: Qd 0x000000fe 0x000000fe Qm (i32)0x000000fe fpscr 00000000
+vqabs.s32 d0, d1 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x000000fe fpscr 00000000
vqabs.s16 d31, d4 :: Qd 0x000000ef 0x000000ef Qm (i32)0x000000ef fpscr 00000000
+vqabs.s16 d31, d4 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x000000ef fpscr 00000000
vqabs.s8 d8, d7 :: Qd 0x00000022 0x00000022 Qm (i32)0x000000de fpscr 00000000
+vqabs.s8 d8, d7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x000000de fpscr 00000000
vqabs.s32 d0, d1 :: Qd 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a fpscr 00000000
+vqabs.s32 d0, d1 :: Qd 0x131b1a1b 0x121f1e1f Qm (i16)0x0000fe0a fpscr 00000000
vqabs.s16 d15, d4 :: Qd 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b fpscr 00000000
+vqabs.s16 d15, d4 :: Qd 0x131b1a1b 0x121f1e1f Qm (i16)0x0000ef0b fpscr 00000000
vqabs.s8 d8, d7 :: Qd 0x220c220c 0x220c220c Qm (i16)0x0000de0c fpscr 00000000
+vqabs.s8 d8, d7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i16)0x0000de0c fpscr 00000000
---- VADDHN ----
vaddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vaddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
vaddhn.i16 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vaddhn.i16 d0, q1, q2 :: Qd 0x1519141f 0x131a121e Qm (i32)0x00000073 Qn (i32)0x00000072
vaddhn.i32 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vaddhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i32)0x00000073 Qn (i32)0x00000072
vaddhn.i64 d0, q1, q2 :: Qd 0x000000e5 0x000000e5 Qm (i32)0x00000073 Qn (i32)0x00000072
+vaddhn.i64 d0, q1, q2 :: Qd 0x151d198f 0x131b1a8d Qm (i32)0x00000073 Qn (i32)0x00000072
vaddhn.i16 d0, q15, q2 :: Qd 0xeff0eff0 0xeff0eff0 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vaddhn.i16 d0, q15, q2 :: Qd 0x151a1420 0x131b121f Qm (i16)0x0000ef73 Qn (i32)0x00000172
vaddhn.i32 d31, q1, q2 :: Qd 0xef73ef73 0xef73ef73 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vaddhn.i32 d31, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i16)0x0000ef73 Qn (i32)0x00000172
vaddhn.i64 d0, q1, q8 :: Qd 0xef73f0e5 0xef73f0e5 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vaddhn.i64 d0, q1, q8 :: Qd 0x151d1a8f 0x131b1b8d Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vaddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vaddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vaddhn.i16 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000072
+vaddhn.i16 d0, q1, q2 :: Qd 0x1519141f 0x131a121e Qm (i8)0x00000073 Qn (i32)0x00000072
vaddhn.i32 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000072
+vaddhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i8)0x00000073 Qn (i32)0x00000072
vaddhn.i64 d0, q1, q2 :: Qd 0x737373e5 0x737373e5 Qm (i8)0x00000073 Qn (i32)0x00000072
+vaddhn.i64 d0, q1, q2 :: Qd 0x151d198f 0x131b1a8d Qm (i8)0x00000073 Qn (i32)0x00000072
---- VRADDHN ----
vraddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vraddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
vraddhn.i16 d0, q1, q2 :: Qd 0x00010001 0x00010001 Qm (i32)0x00000073 Qn (i32)0x00000072
+vraddhn.i16 d0, q1, q2 :: Qd 0x151a1420 0x131b121f Qm (i32)0x00000073 Qn (i32)0x00000072
vraddhn.i32 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vraddhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i32)0x00000073 Qn (i32)0x00000072
vraddhn.i64 d0, q1, q2 :: Qd 0x000000e5 0x000000e5 Qm (i32)0x00000073 Qn (i32)0x00000072
+vraddhn.i64 d0, q1, q2 :: Qd 0x151d198f 0x131b1a8d Qm (i32)0x00000073 Qn (i32)0x00000072
vraddhn.i16 d0, q15, q2 :: Qd 0xeff1eff1 0xeff1eff1 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vraddhn.i16 d0, q15, q2 :: Qd 0x151b1421 0x131c1220 Qm (i16)0x0000ef73 Qn (i32)0x00000172
vraddhn.i32 d31, q1, q2 :: Qd 0xef74ef74 0xef74ef74 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vraddhn.i32 d31, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i16)0x0000ef73 Qn (i32)0x00000172
vraddhn.i64 d0, q1, q8 :: Qd 0xef73f0e6 0xef73f0e6 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vraddhn.i64 d0, q1, q8 :: Qd 0x151d1a8f 0x131b1b8d Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vraddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vraddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vraddhn.i16 d0, q1, q2 :: Qd 0x73747374 0x73747374 Qm (i8)0x00000073 Qn (i32)0x00000072
+vraddhn.i16 d0, q1, q2 :: Qd 0x151a1420 0x131b121f Qm (i8)0x00000073 Qn (i32)0x00000072
vraddhn.i32 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000072
+vraddhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i8)0x00000073 Qn (i32)0x00000072
vraddhn.i64 d0, q1, q2 :: Qd 0x737373e5 0x737373e5 Qm (i8)0x00000073 Qn (i32)0x00000072
+vraddhn.i64 d0, q1, q2 :: Qd 0x151d198f 0x131b1a8d Qm (i8)0x00000073 Qn (i32)0x00000072
vraddhn.i16 d0, q15, q2 :: Qd 0xeff0eff0 0xeff0eff0 Qm (i16)0x0000ef73 Qn (i32)0x00000102
+vraddhn.i16 d0, q15, q2 :: Qd 0x151a1420 0x131b121f Qm (i16)0x0000ef73 Qn (i32)0x00000102
vraddhn.i32 d31, q1, q2 :: Qd 0xef74ef74 0xef74ef74 Qm (i16)0x0000ef73 Qn (i32)0x00000102
+vraddhn.i32 d31, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i16)0x0000ef73 Qn (i32)0x00000102
vraddhn.i64 d0, q1, q8 :: Qd 0xef73f076 0xef73f076 Qm (i16)0x0000ef73 Qn (i32)0x00000102
+vraddhn.i64 d0, q1, q8 :: Qd 0x151d1a1f 0x131b1b1d Qm (i16)0x0000ef73 Qn (i32)0x00000102
+vraddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000002
vraddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000002
vraddhn.i16 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000002
+vraddhn.i16 d0, q1, q2 :: Qd 0x1519141f 0x131a121e Qm (i8)0x00000073 Qn (i32)0x00000002
vraddhn.i32 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000002
+vraddhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i8)0x00000073 Qn (i32)0x00000002
vraddhn.i64 d0, q1, q2 :: Qd 0x73737375 0x73737375 Qm (i8)0x00000073 Qn (i32)0x00000002
+vraddhn.i64 d0, q1, q2 :: Qd 0x151d191f 0x131b1a1d Qm (i8)0x00000073 Qn (i32)0x00000002
---- VSUBHN ----
vsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
vsubhn.i16 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vsubhn.i16 d0, q1, q2 :: Qd 0x1518141e 0x1319121d Qm (i32)0x00000073 Qn (i32)0x00000072
vsubhn.i32 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vsubhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i32)0x00000073 Qn (i32)0x00000072
vsubhn.i64 d0, q1, q2 :: Qd 0x00000001 0x00000001 Qm (i32)0x00000073 Qn (i32)0x00000072
+vsubhn.i64 d0, q1, q2 :: Qd 0x151d18ab 0x131b19a9 Qm (i32)0x00000073 Qn (i32)0x00000072
vsubhn.i16 d0, q15, q2 :: Qd 0xefeeefee 0xefeeefee Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vsubhn.i16 d0, q15, q2 :: Qd 0x1517141d 0x1318121c Qm (i16)0x0000ef73 Qn (i32)0x00000172
vsubhn.i32 d31, q1, q2 :: Qd 0xef73ef73 0xef73ef73 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vsubhn.i32 d31, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i16)0x0000ef73 Qn (i32)0x00000172
vsubhn.i64 d0, q1, q8 :: Qd 0xef73ee01 0xef73ee01 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vsubhn.i64 d0, q1, q8 :: Qd 0x151d17ab 0x131b18a9 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vsubhn.i16 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000072
+vsubhn.i16 d0, q1, q2 :: Qd 0x1518141e 0x1319121d Qm (i8)0x00000073 Qn (i32)0x00000072
vsubhn.i32 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000072
+vsubhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i8)0x00000073 Qn (i32)0x00000072
vsubhn.i64 d0, q1, q2 :: Qd 0x73737301 0x73737301 Qm (i8)0x00000073 Qn (i32)0x00000072
+vsubhn.i64 d0, q1, q2 :: Qd 0x151d18ab 0x131b19a9 Qm (i8)0x00000073 Qn (i32)0x00000072
---- VRSUBHN ----
vrsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vrsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
vrsubhn.i16 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vrsubhn.i16 d0, q1, q2 :: Qd 0x1519141f 0x131a121e Qm (i32)0x00000073 Qn (i32)0x00000072
vrsubhn.i32 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vrsubhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i32)0x00000073 Qn (i32)0x00000072
vrsubhn.i64 d0, q1, q2 :: Qd 0x00000001 0x00000001 Qm (i32)0x00000073 Qn (i32)0x00000072
+vrsubhn.i64 d0, q1, q2 :: Qd 0x151d18ab 0x131b19a9 Qm (i32)0x00000073 Qn (i32)0x00000072
vrsubhn.i16 d0, q15, q2 :: Qd 0xefeeefee 0xefeeefee Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vrsubhn.i16 d0, q15, q2 :: Qd 0x1518141e 0x1319121d Qm (i16)0x0000ef73 Qn (i32)0x00000172
vrsubhn.i32 d31, q1, q2 :: Qd 0xef74ef74 0xef74ef74 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vrsubhn.i32 d31, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i16)0x0000ef73 Qn (i32)0x00000172
vrsubhn.i64 d0, q1, q8 :: Qd 0xef73ee02 0xef73ee02 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vrsubhn.i64 d0, q1, q8 :: Qd 0x151d17ab 0x131b18a9 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vrsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vrsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vrsubhn.i16 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000072
+vrsubhn.i16 d0, q1, q2 :: Qd 0x1519141f 0x131a121e Qm (i8)0x00000073 Qn (i32)0x00000072
vrsubhn.i32 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000072
+vrsubhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i8)0x00000073 Qn (i32)0x00000072
vrsubhn.i64 d0, q1, q2 :: Qd 0x73737301 0x73737301 Qm (i8)0x00000073 Qn (i32)0x00000072
+vrsubhn.i64 d0, q1, q2 :: Qd 0x151d18ab 0x131b19a9 Qm (i8)0x00000073 Qn (i32)0x00000072
vrsubhn.i16 d0, q15, q2 :: Qd 0xf0eff0ef 0xf0eff0ef Qm (i16)0x0000ef93 Qn (i32)0x00000102
+vrsubhn.i16 d0, q15, q2 :: Qd 0x1518141e 0x1319121d Qm (i16)0x0000ef93 Qn (i32)0x00000102
vrsubhn.i32 d31, q1, q2 :: Qd 0xef94ef94 0xef94ef94 Qm (i16)0x0000ef93 Qn (i32)0x00000102
+vrsubhn.i32 d31, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i16)0x0000ef93 Qn (i32)0x00000102
vrsubhn.i64 d0, q1, q8 :: Qd 0xef93ee92 0xef93ee92 Qm (i16)0x0000ef93 Qn (i32)0x00000102
+vrsubhn.i64 d0, q1, q8 :: Qd 0x151d181b 0x131b1919 Qm (i16)0x0000ef93 Qn (i32)0x00000102
+vrsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000093 Qn (i32)0x00000002
vrsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000093 Qn (i32)0x00000002
vrsubhn.i16 d0, q1, q2 :: Qd 0x94949494 0x94949494 Qm (i8)0x00000093 Qn (i32)0x00000002
+vrsubhn.i16 d0, q1, q2 :: Qd 0x1519141f 0x131a121e Qm (i8)0x00000093 Qn (i32)0x00000002
vrsubhn.i32 d0, q1, q2 :: Qd 0x93949394 0x93949394 Qm (i8)0x00000093 Qn (i32)0x00000002
+vrsubhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i8)0x00000093 Qn (i32)0x00000002
vrsubhn.i64 d0, q1, q2 :: Qd 0x93939392 0x93939392 Qm (i8)0x00000093 Qn (i32)0x00000002
+vrsubhn.i64 d0, q1, q2 :: Qd 0x151d191b 0x131b1a19 Qm (i8)0x00000093 Qn (i32)0x00000002
---- VCEQ #0 ----
vceq.i32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
+vceq.i32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vceq.i16 d2, d1, #0 :: Qd 0xffff0000 0xffff0000 Qm (i32)0x00000021
+vceq.i16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vceq.i8 d10, d11, #0 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x00000021
+vceq.i8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vceq.i32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.i32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vceq.i16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.i16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vceq.i8 d10, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.i8 d10, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
---- VCGT #0 ----
vcgt.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcgt.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
vcgt.s16 d2, d1, #0 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000021
+vcgt.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
vcgt.s8 d10, d31, #0 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000021
+vcgt.s8 d10, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
vcgt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.s8 d10, d11, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ef
+vcgt.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ef
vcgt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ed
+vcgt.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ed
vcgt.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ae
+vcgt.s8 d10, d11, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ae
---- VCGE #0 ----
vcge.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcge.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
vcge.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcge.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcge.s8 d10, d11, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
vcge.s8 d10, d11, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
vcge.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcge.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcge.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.s8 d10, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcge.s8 d10, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ef
+vcge.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ef
vcge.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ed
+vcge.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ed
vcge.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ae
+vcge.s8 d10, d11, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ae
+vcge.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000000ef
vcge.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000000ef
vcge.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000000ed
+vcge.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000000ed
vcge.s8 d10, d11, #0 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x000000ae
+vcge.s8 d10, d11, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000000ae
---- VCLE #0 ----
vcle.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
+vcle.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vcle.s16 d2, d1, #0 :: Qd 0xffff0000 0xffff0000 Qm (i32)0x00000021
+vcle.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vcle.s8 d10, d11, #0 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x00000021
+vcle.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vcle.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcle.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcle.s8 d10, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.s8 d10, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcle.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ef
+vcle.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ef
vcle.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ed
+vcle.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ed
vcle.s8 d10, d11, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ae
+vcle.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ae
---- VCLT #0 ----
vclt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
+vclt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vclt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
+vclt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
+vclt.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vclt.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vclt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ef
+vclt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ef
vclt.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ed
+vclt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ed
vclt.s8 d10, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ae
+vclt.s8 d10, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ae
+vclt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x000000ef
vclt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x000000ef
vclt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x000000ed
+vclt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x000000ed
vclt.s8 d10, d11, #0 :: Qd 0x000000ff 0x000000ff Qm (i32)0x000000ae
+vclt.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x000000ae
---- VCNT ----
vcnt.8 d0, d1 :: Qd 0x04050306 0x04050306 Qm (i32)0xac3d25eb
+vcnt.8 d0, d1 :: Qd 0x03040304 0x02030503 Qm (i32)0xac3d25eb
vcnt.8 d11, d14 :: Qd 0x04050306 0x04050306 Qm (i32)0xac3d25eb
+vcnt.8 d11, d14 :: Qd 0x03040304 0x02030503 Qm (i32)0xac3d25eb
vcnt.8 d6, d2 :: Qd 0x00020306 0x00020306 Qm (i32)0x000ad0eb
+vcnt.8 d6, d2 :: Qd 0x03040304 0x02030503 Qm (i32)0x000ad0eb
---- VCLS ----
vcls.s8 d0, d1 :: Qd 0x07070701 0x07070701 Qm (i32)0x00000021
+vcls.s8 d0, d1 :: Qd 0x02020202 0x02020202 Qm (i32)0x00000021
vcls.s8 d30, d31 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000082
+vcls.s8 d30, d31 :: Qd 0x02020202 0x02020202 Qm (i8)0x00000082
vcls.s16 d0, d1 :: Qd 0x000f0009 0x000f0009 Qm (i32)0x00000021
+vcls.s16 d0, d1 :: Qd 0x00020002 0x00020002 Qm (i32)0x00000021
vcls.s16 d31, d30 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000082
+vcls.s16 d31, d30 :: Qd 0x00020002 0x00020002 Qm (i8)0x00000082
vcls.s32 d6, d1 :: Qd 0x00000019 0x00000019 Qm (i32)0x00000021
+vcls.s32 d6, d1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000021
vcls.s32 d30, d5 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000082
+vcls.s32 d30, d5 :: Qd 0x00000002 0x00000002 Qm (i8)0x00000082
vcls.s8 d2, d4 :: Qd 0x07070707 0x07070707 Qm (i8)0x000000ff
+vcls.s8 d2, d4 :: Qd 0x02020202 0x02020202 Qm (i8)0x000000ff
vcls.s16 d2, d4 :: Qd 0x000f000f 0x000f000f Qm (i8)0x000000ff
+vcls.s16 d2, d4 :: Qd 0x00020002 0x00020002 Qm (i8)0x000000ff
vcls.s32 d2, d4 :: Qd 0x0000001f 0x0000001f Qm (i8)0x000000ff
+vcls.s32 d2, d4 :: Qd 0x00000002 0x00000002 Qm (i8)0x000000ff
vcls.s8 d2, d4 :: Qd 0x07020702 0x07020702 Qm (i16)0x0000ffef
+vcls.s8 d2, d4 :: Qd 0x02020202 0x02020202 Qm (i16)0x0000ffef
vcls.s16 d2, d4 :: Qd 0x000a000a 0x000a000a Qm (i16)0x0000ffef
+vcls.s16 d2, d4 :: Qd 0x00020002 0x00020002 Qm (i16)0x0000ffef
vcls.s32 d2, d4 :: Qd 0x0000000a 0x0000000a Qm (i16)0x0000ffef
+vcls.s32 d2, d4 :: Qd 0x00000002 0x00000002 Qm (i16)0x0000ffef
vcls.s8 d2, d4 :: Qd 0x07070707 0x07070707 Qm (i8)0x00000000
+vcls.s8 d2, d4 :: Qd 0x02020202 0x02020202 Qm (i8)0x00000000
vcls.s16 d2, d4 :: Qd 0x000f000f 0x000f000f Qm (i8)0x00000000
+vcls.s16 d2, d4 :: Qd 0x00020002 0x00020002 Qm (i8)0x00000000
vcls.s32 d2, d4 :: Qd 0x0000001f 0x0000001f Qm (i8)0x00000000
+vcls.s32 d2, d4 :: Qd 0x00000002 0x00000002 Qm (i8)0x00000000
vcls.s8 d2, d4 :: Qd 0x07020702 0x07020702 Qm (i16)0x000000ef
+vcls.s8 d2, d4 :: Qd 0x02020202 0x02020202 Qm (i16)0x000000ef
vcls.s16 d2, d4 :: Qd 0x00070007 0x00070007 Qm (i16)0x000000ef
+vcls.s16 d2, d4 :: Qd 0x00020002 0x00020002 Qm (i16)0x000000ef
vcls.s32 d2, d4 :: Qd 0x00000007 0x00000007 Qm (i16)0x000000ef
+vcls.s32 d2, d4 :: Qd 0x00000002 0x00000002 Qm (i16)0x000000ef
---- VCLZ ----
vclz.i8 d0, d1 :: Qd 0x08080802 0x08080802 Qm (i32)0x00000021
+vclz.i8 d0, d1 :: Qd 0x03030303 0x03030303 Qm (i32)0x00000021
vclz.i8 d30, d31 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000082
+vclz.i8 d30, d31 :: Qd 0x03030303 0x03030303 Qm (i8)0x00000082
vclz.i16 d0, d1 :: Qd 0x0010000a 0x0010000a Qm (i32)0x00000021
+vclz.i16 d0, d1 :: Qd 0x00030003 0x00030003 Qm (i32)0x00000021
vclz.i16 d31, d30 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000082
+vclz.i16 d31, d30 :: Qd 0x00030003 0x00030003 Qm (i8)0x00000082
vclz.i32 d6, d1 :: Qd 0x0000001a 0x0000001a Qm (i32)0x00000021
+vclz.i32 d6, d1 :: Qd 0x00000003 0x00000003 Qm (i32)0x00000021
vclz.i32 d30, d5 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000082
+vclz.i32 d30, d5 :: Qd 0x00000003 0x00000003 Qm (i8)0x00000082
vclz.i8 d2, d4 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff
+vclz.i8 d2, d4 :: Qd 0x03030303 0x03030303 Qm (i8)0x000000ff
vclz.i16 d2, d4 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff
+vclz.i16 d2, d4 :: Qd 0x00030003 0x00030003 Qm (i8)0x000000ff
vclz.i32 d2, d4 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff
+vclz.i32 d2, d4 :: Qd 0x00000003 0x00000003 Qm (i8)0x000000ff
vclz.i8 d2, d4 :: Qd 0x00000000 0x00000000 Qm (i16)0x0000ffef
+vclz.i8 d2, d4 :: Qd 0x03030303 0x03030303 Qm (i16)0x0000ffef
vclz.i16 d2, d4 :: Qd 0x00000000 0x00000000 Qm (i16)0x0000ffef
+vclz.i16 d2, d4 :: Qd 0x00030003 0x00030003 Qm (i16)0x0000ffef
vclz.i32 d2, d4 :: Qd 0x00000000 0x00000000 Qm (i16)0x0000ffef
+vclz.i32 d2, d4 :: Qd 0x00000003 0x00000003 Qm (i16)0x0000ffef
vclz.i8 d2, d4 :: Qd 0x08080808 0x08080808 Qm (i8)0x00000000
+vclz.i8 d2, d4 :: Qd 0x03030303 0x03030303 Qm (i8)0x00000000
vclz.i16 d2, d4 :: Qd 0x00100010 0x00100010 Qm (i8)0x00000000
+vclz.i16 d2, d4 :: Qd 0x00030003 0x00030003 Qm (i8)0x00000000
vclz.i32 d2, d4 :: Qd 0x00000020 0x00000020 Qm (i8)0x00000000
+vclz.i32 d2, d4 :: Qd 0x00000003 0x00000003 Qm (i8)0x00000000
vclz.i8 d2, d4 :: Qd 0x08000800 0x08000800 Qm (i16)0x000000ef
+vclz.i8 d2, d4 :: Qd 0x03030303 0x03030303 Qm (i16)0x000000ef
vclz.i16 d2, d4 :: Qd 0x00080008 0x00080008 Qm (i16)0x000000ef
+vclz.i16 d2, d4 :: Qd 0x00030003 0x00030003 Qm (i16)0x000000ef
vclz.i32 d2, d4 :: Qd 0x00000008 0x00000008 Qm (i16)0x000000ef
+vclz.i32 d2, d4 :: Qd 0x00000003 0x00000003 Qm (i16)0x000000ef
---- VSLI ----
vsli.16 d0, d1, #1 :: Qd 0x0001000f 0x0001000f Qm (i32)0x00000007
+vsli.16 d0, d1, #1 :: Qd 0x2a3b323b 0x28393e39 Qm (i32)0x00000007
vsli.16 d3, d4, #2 :: Qd 0xfffdfe11 0xfffdfe11 Qm (i32)0xffffff84
+vsli.16 d3, d4, #2 :: Qd 0x54776477 0x50737c73 Qm (i32)0xffffff84
vsli.32 d2, d5, #31 :: Qd 0xd5555555 0xd5555555 Qm (i32)0xffffffff
+vsli.32 d2, d5, #31 :: Qd 0x931b1a1b 0x121f1e1f Qm (i32)0xffffffff
vsli.8 d6, d7, #7 :: Qd 0x5555d5d5 0x5555d5d5 Qm (i32)0x0000ffff
+vsli.8 d6, d7, #7 :: Qd 0x939b9a9b 0x121f9e1f Qm (i32)0x0000ffff
vsli.16 d8, d9, #12 :: Qd 0xf5556555 0xf5556555 Qm (i32)0xfffffff6
+vsli.16 d8, d9, #12 :: Qd 0xd31bda1b 0xc21fce1f Qm (i32)0xfffffff6
vsli.32 d10, d11, #5 :: Qd 0x0004ff55 0x0004ff55 Qm (i32)0x000027fa
+vsli.32 d10, d11, #5 :: Qd 0xa3a323bb 0x8383e39f Qm (i32)0x000027fa
vsli.8 d12, d13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vsli.8 d12, d13, #1 :: Qd 0x2b3b323b 0x28393e39 Qm (i32)0xffffffff
vsli.16 d14, d15, #11 :: Qd 0xfd55fd55 0xfd55fd55 Qm (i32)0xffffffff
+vsli.16 d14, d15, #11 :: Qd 0xeb1bea1b 0xe21fe61f Qm (i32)0xffffffff
vsli.32 d10, d11, #9 :: Qd 0x0007d155 0x0007d155 Qm (i32)0x000003e8
+vsli.32 d10, d11, #9 :: Qd 0x3a323a1b 0x383e381f Qm (i32)0x000003e8
vsli.8 d7, d13, #7 :: Qd 0xd5d5d5d5 0xd5d5d5d5 Qm (i32)0xffffffff
+vsli.8 d7, d13, #7 :: Qd 0x939b9a9b 0x121f9e1f Qm (i32)0xffffffff
vsli.16 d8, d1, #1 :: Qd 0x0001579f 0x0001579f Qm (i32)0x0000abcf
+vsli.16 d8, d1, #1 :: Qd 0x2a3b323b 0x28393e39 Qm (i32)0x0000abcf
vsli.32 d12, d3, #15 :: Qd 0xff285555 0xff285555 Qm (i32)0xfffffe50
+vsli.32 d12, d3, #15 :: Qd 0x8c8e9a1b 0x0f8e1e1f Qm (i32)0xfffffe50
vsli.64 d0, d1, #42 :: Qd 0xfffffd55 0x55555555 Qm (i32)0xffffffff
+vsli.64 d0, d1, #42 :: Qd 0x707c721b 0x121f1e1f Qm (i32)0xffffffff
vsli.64 d6, d7, #12 :: Qd 0x00fac000 0x00fac555 Qm (i32)0x00000fac
+vsli.64 d6, d7, #12 :: Qd 0xd191d141 0xc1f1ce1f Qm (i32)0x00000fac
vsli.64 d8, d4, #9 :: Qd 0x0069f000 0x0069f155 Qm (i32)0x000034f8
+vsli.64 d8, d4, #9 :: Qd 0x3a323a28 0x383e381f Qm (i32)0x000034f8
vsli.64 d9, d12, #11 :: Qd 0x0c0cb000 0x0c0cb555 Qm (i32)0x00018196
+vsli.64 d9, d12, #11 :: Qd 0xe8c8e8a0 0xe0f8e61f Qm (i32)0x00018196
---- VPADD ----
vpadd.i32 d0, d1, d2 :: Qd 0x000000f0 0x00000030 Qm (i32)0x00000018 Qn (i32)0x00000078
+vpadd.i32 d0, d1, d2 :: Qd 0x000000f0 0x253a383a Qm (i32)0x00000018 Qn (i32)0x00000078
vpadd.i32 d0, d1, d2 :: Qd 0x000000f0 0x00000118 Qm (i32)0x0000008c Qn (i32)0x00000078
+vpadd.i32 d0, d1, d2 :: Qd 0x000000f0 0x253a383a Qm (i32)0x0000008c Qn (i32)0x00000078
vpadd.i16 d0, d1, d2 :: Qd 0x00780078 0x008c008c Qm (i32)0x0000008c Qn (i32)0x00000078
+vpadd.i16 d0, d1, d2 :: Qd 0x00780078 0x2d36303e Qm (i32)0x0000008c Qn (i32)0x00000078
vpadd.i8 d0, d1, d2 :: Qd 0x00780078 0x008c008c Qm (i32)0x0000008c Qn (i32)0x00000078
+vpadd.i8 d0, d1, d2 :: Qd 0x00780078 0x2e35313d Qm (i32)0x0000008c Qn (i32)0x00000078
vpadd.i8 d0, d1, d2 :: Qd 0x80028002 0x80018001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpadd.i8 d0, d1, d2 :: Qd 0x80028002 0x2e35313d Qm (i32)0x80000001 Qn (i32)0x80000002
vpadd.i16 d0, d1, d2 :: Qd 0x80028002 0x80018001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpadd.i16 d0, d1, d2 :: Qd 0x80028002 0x2d36303e Qm (i32)0x80000001 Qn (i32)0x80000002
vpadd.i32 d0, d1, d2 :: Qd 0x00000004 0x00000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpadd.i32 d0, d1, d2 :: Qd 0x00000004 0x253a383a Qm (i32)0x80000001 Qn (i32)0x80000002
vpadd.i32 d10, d11, d12 :: Qd 0x000000f0 0x00000030 Qm (i32)0x00000018 Qn (i32)0x00000078
+vpadd.i32 d10, d11, d12 :: Qd 0x000000f0 0x253a383a Qm (i32)0x00000018 Qn (i32)0x00000078
---- VPADDL ----
vpaddl.u32 d0, d1 :: Qd 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.u32 d0, d1 :: Qd 0x00000000 0x29393839 Qm (i32)0x00000018
vpaddl.u32 d0, d1 :: Qd 0x00000000 0x00000118 Qm (i32)0x0000008c
+vpaddl.u32 d0, d1 :: Qd 0x00000000 0x29393839 Qm (i32)0x0000008c
vpaddl.u16 d0, d1 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c
+vpaddl.u16 d0, d1 :: Qd 0x00002e3a 0x00003338 Qm (i32)0x0000008c
vpaddl.u8 d0, d1 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c
+vpaddl.u8 d0, d1 :: Qd 0x00320036 0x0030003b Qm (i32)0x0000008c
vpaddl.u8 d0, d1 :: Qd 0x00800001 0x00800001 Qm (i32)0x80000001
+vpaddl.u8 d0, d1 :: Qd 0x00320036 0x0030003b Qm (i32)0x80000001
vpaddl.u16 d0, d1 :: Qd 0x00008001 0x00008001 Qm (i32)0x80000001
+vpaddl.u16 d0, d1 :: Qd 0x00002e3a 0x00003338 Qm (i32)0x80000001
vpaddl.u32 d0, d1 :: Qd 0x00000001 0x00000002 Qm (i32)0x80000001
+vpaddl.u32 d0, d1 :: Qd 0x00000000 0x29393839 Qm (i32)0x80000001
vpaddl.u32 d10, d11 :: Qd 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.u32 d10, d11 :: Qd 0x00000000 0x29393839 Qm (i32)0x00000018
vpaddl.s32 d0, d1 :: Qd 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.s32 d0, d1 :: Qd 0x00000000 0x29393839 Qm (i32)0x00000018
vpaddl.s32 d0, d1 :: Qd 0x00000000 0x00000118 Qm (i32)0x0000008c
+vpaddl.s32 d0, d1 :: Qd 0x00000000 0x29393839 Qm (i32)0x0000008c
vpaddl.s16 d0, d1 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c
+vpaddl.s16 d0, d1 :: Qd 0x00002e3a 0x00003338 Qm (i32)0x0000008c
vpaddl.s8 d0, d1 :: Qd 0x0000ff8c 0x0000ff8c Qm (i32)0x0000008c
+vpaddl.s8 d0, d1 :: Qd 0x00320036 0x0030003b Qm (i32)0x0000008c
vpaddl.s8 d0, d1 :: Qd 0xff800001 0xff800001 Qm (i32)0x80000001
+vpaddl.s8 d0, d1 :: Qd 0x00320036 0x0030003b Qm (i32)0x80000001
vpaddl.s16 d0, d1 :: Qd 0xffff8001 0xffff8001 Qm (i32)0x80000001
+vpaddl.s16 d0, d1 :: Qd 0x00002e3a 0x00003338 Qm (i32)0x80000001
vpaddl.s32 d0, d1 :: Qd 0xffffffff 0x00000002 Qm (i32)0x80000001
+vpaddl.s32 d0, d1 :: Qd 0x00000000 0x29393839 Qm (i32)0x80000001
vpaddl.s32 d10, d11 :: Qd 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.s32 d10, d11 :: Qd 0x00000000 0x29393839 Qm (i32)0x00000018
---- VPADAL ----
vpadal.u32 d0, d1 :: Qd 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.u32 d0, d1 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x00000018
vpadal.u32 d0, d1 :: Qd 0x55555555 0x5555566d Qm (i32)0x0000008c
+vpadal.u32 d0, d1 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x0000008c
vpadal.u16 d0, d1 :: Qd 0x555555e1 0x555555e1 Qm (i32)0x0000008c
+vpadal.u16 d0, d1 :: Qd 0x131b4855 0x121f5157 Qm (i32)0x0000008c
vpadal.u8 d0, d1 :: Qd 0x566d566d 0x566d566d Qm (i8)0x0000008c
+vpadal.u8 d0, d1 :: Qd 0x134d1a51 0x124f1e5a Qm (i8)0x0000008c
vpadal.u8 d0, d1 :: Qd 0x55d55556 0x55d55556 Qm (i32)0x80000001
+vpadal.u8 d0, d1 :: Qd 0x134d1a51 0x124f1e5a Qm (i32)0x80000001
vpadal.u16 d0, d1 :: Qd 0x5555d556 0x5555d556 Qm (i32)0x80000001
+vpadal.u16 d0, d1 :: Qd 0x131b4855 0x121f5157 Qm (i32)0x80000001
vpadal.u32 d0, d1 :: Qd 0x55555556 0x55555557 Qm (i32)0x80000001
+vpadal.u32 d0, d1 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x80000001
vpadal.u32 d10, d11 :: Qd 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.u32 d10, d11 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x00000018
vpadal.s32 d0, d1 :: Qd 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.s32 d0, d1 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x00000018
vpadal.s32 d0, d1 :: Qd 0x55555555 0x5555566d Qm (i32)0x0000008c
+vpadal.s32 d0, d1 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x0000008c
vpadal.s16 d0, d1 :: Qd 0x555555e1 0x555555e1 Qm (i32)0x0000008c
+vpadal.s16 d0, d1 :: Qd 0x131b4855 0x121f5157 Qm (i32)0x0000008c
vpadal.s8 d0, d1 :: Qd 0x546d546d 0x546d546d Qm (i8)0x0000008c
+vpadal.s8 d0, d1 :: Qd 0x134d1a51 0x124f1e5a Qm (i8)0x0000008c
vpadal.s8 d0, d1 :: Qd 0x54d55556 0x54d55556 Qm (i32)0x80000001
+vpadal.s8 d0, d1 :: Qd 0x134d1a51 0x124f1e5a Qm (i32)0x80000001
vpadal.s16 d0, d1 :: Qd 0x5554d556 0x5554d556 Qm (i32)0x80000001
+vpadal.s16 d0, d1 :: Qd 0x131b4855 0x121f5157 Qm (i32)0x80000001
vpadal.s32 d0, d1 :: Qd 0x55555554 0x55555557 Qm (i32)0x80000001
+vpadal.s32 d0, d1 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x80000001
vpadal.s32 d10, d11 :: Qd 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.s32 d10, d11 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x00000018
---- VZIP ----
-vzip.32 d0, d1 :: Qm 0x34343434 0x12121212 Qn 0x34343434 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
-vzip.16 d1, d0 :: Qm 0x12123434 0x12123434 Qn 0x12123434 0x12123434 Qm (i8)0x00000012 Qn (i8)0x00000034
-vzip.8 d10, d11 :: Qm 0x34123412 0x34123412 Qn 0x34123412 0x34123412 Qm (i8)0x00000012 Qn (i8)0x00000034
-vzip.32 d0, d1 :: Qm 0x0a0b0c0d 0x12345678 Qn 0x0a0b0c0d 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vzip.16 d1, d0 :: Qm 0x12340a0b 0x56780c0d Qn 0x12340a0b 0x56780c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vzip.8 d30, d31 :: Qm 0x0a120b34 0x0c560d78 Qn 0x0a120b34 0x0c560d78 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.32 d0, d1 :: Qm 0x34343434 0x121f1e1f Qn 0x34343434 0x131b1a1b Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.32 d0, d1 :: Qm 0x34343434 0x121f1e1f Qn 0x34343434 0x131b1a1b Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.16 d1, d0 :: Qm 0x131b3434 0x1a1b3434 Qn 0x121f3434 0x1e1f3434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.16 d1, d0 :: Qm 0x131b3434 0x1a1b3434 Qn 0x121f3434 0x1e1f3434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.8 d10, d11 :: Qm 0x3412341f 0x341e341f Qn 0x3413341b 0x341a341b Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.8 d10, d11 :: Qm 0x3412341f 0x341e341f Qn 0x3413341b 0x341a341b Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.32 d0, d1 :: Qm 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x131b1a1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.32 d0, d1 :: Qm 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x131b1a1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.16 d1, d0 :: Qm 0x131b0a0b 0x1a1b0c0d Qn 0x121f0a0b 0x1e1f0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.16 d1, d0 :: Qm 0x131b0a0b 0x1a1b0c0d Qn 0x121f0a0b 0x1e1f0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.8 d30, d31 :: Qm 0x0a120b1f 0x0c1e0d1f Qn 0x0a130b1b 0x0c1a0d1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.8 d30, d31 :: Qm 0x0a120b1f 0x0c1e0d1f Qn 0x0a130b1b 0x0c1a0d1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VUZP ----
-vuzp.32 d0, d1 :: Qm 0x34343434 0x12121212 Qn 0x34343434 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
-vuzp.16 d1, d0 :: Qm 0x12121212 0x34343434 Qn 0x12121212 0x34343434 Qm (i8)0x00000012 Qn (i8)0x00000034
-vuzp.8 d10, d11 :: Qm 0x34343434 0x12121212 Qn 0x34343434 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
-vuzp.32 d0, d1 :: Qm 0x0a0b0c0d 0x12345678 Qn 0x0a0b0c0d 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vuzp.16 d1, d0 :: Qm 0x12341234 0x0a0b0a0b Qn 0x56785678 0x0c0d0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vuzp.8 d30, d31 :: Qm 0x0b0d0b0d 0x34783478 Qn 0x0a0c0a0c 0x12561256 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.32 d0, d1 :: Qm 0x34343434 0x121f1e1f Qn 0x34343434 0x131b1a1b Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.32 d0, d1 :: Qm 0x34343434 0x121f1e1f Qn 0x34343434 0x131b1a1b Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.16 d1, d0 :: Qm 0x131b121f 0x34343434 Qn 0x1a1b1e1f 0x34343434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.16 d1, d0 :: Qm 0x131b121f 0x34343434 Qn 0x1a1b1e1f 0x34343434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.8 d10, d11 :: Qm 0x34343434 0x1b1b1f1f Qn 0x34343434 0x131a121e Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.8 d10, d11 :: Qm 0x34343434 0x1b1b1f1f Qn 0x34343434 0x131a121e Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.32 d0, d1 :: Qm 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x131b1a1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.32 d0, d1 :: Qm 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x131b1a1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.16 d1, d0 :: Qm 0x131b121f 0x0a0b0a0b Qn 0x1a1b1e1f 0x0c0d0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.16 d1, d0 :: Qm 0x131b121f 0x0a0b0a0b Qn 0x1a1b1e1f 0x0c0d0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.8 d30, d31 :: Qm 0x0b0d0b0d 0x1b1b1f1f Qn 0x0a0c0a0c 0x131a121e Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.8 d30, d31 :: Qm 0x0b0d0b0d 0x1b1b1f1f Qn 0x0a0c0a0c 0x131a121e Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VTRN ----
-vtrn.32 d0, d1 :: Qm 0x34343434 0x12121212 Qn 0x34343434 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
-vtrn.16 d1, d0 :: Qm 0x12123434 0x12123434 Qn 0x12123434 0x12123434 Qm (i8)0x00000012 Qn (i8)0x00000034
-vtrn.8 d10, d11 :: Qm 0x34123412 0x34123412 Qn 0x34123412 0x34123412 Qm (i8)0x00000012 Qn (i8)0x00000034
-vtrn.32 d0, d1 :: Qm 0x0a0b0c0d 0x12345678 Qn 0x0a0b0c0d 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vtrn.16 d1, d0 :: Qm 0x12340a0b 0x12340a0b Qn 0x56780c0d 0x56780c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vtrn.8 d30, d31 :: Qm 0x0b340d78 0x0b340d78 Qn 0x0a120c56 0x0a120c56 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.32 d0, d1 :: Qm 0x34343434 0x121f1e1f Qn 0x34343434 0x131b1a1b Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.32 d0, d1 :: Qm 0x34343434 0x121f1e1f Qn 0x34343434 0x131b1a1b Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.16 d1, d0 :: Qm 0x131b3434 0x121f3434 Qn 0x1a1b3434 0x1e1f3434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.16 d1, d0 :: Qm 0x131b3434 0x121f3434 Qn 0x1a1b3434 0x1e1f3434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.8 d10, d11 :: Qm 0x341b341b 0x341f341f Qn 0x3413341a 0x3412341e Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.8 d10, d11 :: Qm 0x341b341b 0x341f341f Qn 0x3413341a 0x3412341e Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.32 d0, d1 :: Qm 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x131b1a1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.32 d0, d1 :: Qm 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x131b1a1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.16 d1, d0 :: Qm 0x131b0a0b 0x121f0a0b Qn 0x1a1b0c0d 0x1e1f0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.16 d1, d0 :: Qm 0x131b0a0b 0x121f0a0b Qn 0x1a1b0c0d 0x1e1f0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.8 d30, d31 :: Qm 0x0b1b0d1b 0x0b1f0d1f Qn 0x0a130c1a 0x0a120c1e Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.8 d30, d31 :: Qm 0x0b1b0d1b 0x0b1f0d1f Qn 0x0a130c1a 0x0a120c1e Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VSWP ----
-vswp d0, d1 :: Qm 0x34343434 0x34343434 Qn 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
-vswp d1, d0 :: Qm 0x34343434 0x34343434 Qn 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
-vswp d10, d11 :: Qm 0x34343434 0x34343434 Qn 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
-vswp d0, d1 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vswp d1, d0 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vswp d30, d31 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp d0, d1 :: Qm 0x34343434 0x34343434 Qn 0x131b1a1b 0x121f1e1f Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp d0, d1 :: Qm 0x34343434 0x34343434 Qn 0x131b1a1b 0x121f1e1f Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp d1, d0 :: Qm 0x34343434 0x34343434 Qn 0x131b1a1b 0x121f1e1f Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp d1, d0 :: Qm 0x34343434 0x34343434 Qn 0x131b1a1b 0x121f1e1f Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp d10, d11 :: Qm 0x34343434 0x34343434 Qn 0x131b1a1b 0x121f1e1f Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp d10, d11 :: Qm 0x34343434 0x34343434 Qn 0x131b1a1b 0x121f1e1f Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp d0, d1 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x131b1a1b 0x121f1e1f Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp d0, d1 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x131b1a1b 0x121f1e1f Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp d1, d0 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x131b1a1b 0x121f1e1f Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp d1, d0 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x131b1a1b 0x121f1e1f Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp d30, d31 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x131b1a1b 0x121f1e1f Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp d30, d31 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x131b1a1b 0x121f1e1f Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VSHRN ----
vshrn.i16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshrn.i16 d0, q1, #1 :: Qd 0x16959717 0x8e8e0e8e Qm (i32)0xffffffff
vshrn.i16 d3, q4, #2 :: Qd 0xffe1ffe1 0xffe1ffe1 Qm (i32)0xffffff84
+vshrn.i16 d3, q4, #2 :: Qd 0x0bcacb8b 0x474707c7 Qm (i32)0xffffff84
vshrn.i32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshrn.i32 d2, q5, #10 :: Qd 0x0b0acbcb 0x47460707 Qm (i32)0xffffffff
vshrn.i32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff
+vshrn.i32 d2, q5, #1 :: Qd 0x15959717 0x8c8e0f8e Qm (i32)0x7fffffff
vshrn.i64 d6, q7, #7 :: Qd 0xfe0001ff 0xfe0001ff Qm (i32)0x0000ffff
+vshrn.i64 d6, q7, #7 :: Qd 0x56465e5c 0x3a28383e Qm (i32)0x0000ffff
vshrn.i16 d8, q9, #8 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff6
+vshrn.i16 d8, q9, #8 :: Qd 0x242b232e 0x1519141f Qm (i32)0xfffffff6
vshrn.i32 d10, q11, #5 :: Qd 0x013f013f 0x013f013f Qm (i32)0x000027fa
+vshrn.i32 d10, q11, #5 :: Qd 0x61597971 0xe8c8e0f8 Qm (i32)0x000027fa
vshrn.i64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshrn.i64 d12, q13, #1 :: Qd 0x91979717 0x8a0e0f8e Qm (i32)0xffffffff
vshrn.i16 d14, q15, #6 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshrn.i16 d14, q15, #6 :: Qd 0x90ac8cb8 0x5464507c Qm (i32)0xffffffff
vshrn.i32 d10, q11, #9 :: Qd 0x00010001 0x00010001 Qm (i32)0x000003e8
+vshrn.i32 d10, q11, #9 :: Qd 0x16159797 0x8e8c0e0f Qm (i32)0x000003e8
vshrn.i64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshrn.i64 d7, q13, #7 :: Qd 0x56465e5c 0x3a28383e Qm (i32)0xffffffff
vshrn.i16 d8, q1, #1 :: Qd 0x00e700e7 0x00e700e7 Qm (i32)0x0000abcf
+vshrn.i16 d8, q1, #1 :: Qd 0x16959717 0x8e8e0e8e Qm (i32)0x0000abcf
vshrn.i32 d12, q3, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffe50
+vshrn.i32 d12, q3, #15 :: Qd 0x4858465e 0x2a3a2838 Qm (i32)0xfffffe50
vshrn.i64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshrn.i64 d0, q1, #22 :: Qd 0xb0acac8c 0x74647450 Qm (i32)0xffffffff
vshrn.i64 d6, q7, #12 :: Qd 0xfac00000 0xfac00000 Qm (i32)0x00000fac
+vshrn.i64 d6, q7, #12 :: Qd 0xb2b232f2 0x91d141c1 Qm (i32)0x00000fac
vshrn.i64 d8, q4, #9 :: Qd 0x7c00001a 0x7c00001a Qm (i32)0x000034f8
+vshrn.i64 d8, q4, #9 :: Qd 0x95919797 0x8e8a0e0f Qm (i32)0x000034f8
vshrn.i64 d9, q12, #11 :: Qd 0x32c00030 0x32c00030 Qm (i32)0x00018196
+vshrn.i64 d9, q12, #11 :: Qd 0x656465e5 0x23a28383 Qm (i32)0x00018196
---- VDUP ----
vdup.8 d12, d2[0] :: Qd 0x57575757 0x57575757 Qm (i32)0x0abc4657
+vdup.8 d12, d2[0] :: Qd 0x1c1c1c1c 0x1c1c1c1c Qm (i32)0x0abc4657
vdup.8 d0, d3[2] :: Qd 0x07070707 0x07070707 Qm (i32)0x0007a1b3
+vdup.8 d0, d3[2] :: Qd 0x1c1c1c1c 0x1c1c1c1c Qm (i32)0x0007a1b3
vdup.8 d1, d0[7] :: Qd 0x00000000 0x00000000 Qm (i32)0x00713aaa
+vdup.8 d1, d0[7] :: Qd 0x15151515 0x15151515 Qm (i32)0x00713aaa
vdup.8 d10, d4[3] :: Qd 0x00000000 0x00000000 Qm (i32)0x000aa713
+vdup.8 d10, d4[3] :: Qd 0x14141414 0x14141414 Qm (i32)0x000aa713
vdup.8 d4, d28[4] :: Qd 0xc3c3c3c3 0xc3c3c3c3 Qm (i32)0x0007b1c3
+vdup.8 d4, d28[4] :: Qd 0x1d1d1d1d 0x1d1d1d1d Qm (i32)0x0007b1c3
vdup.16 d17, d19[1] :: Qd 0x07130713 0x07130713 Qm (i32)0x0713ffff
+vdup.16 d17, d19[1] :: Qd 0x141c141c 0x141c141c Qm (i32)0x0713ffff
vdup.16 d15, d31[2] :: Qd 0x00fa00fa 0x00fa00fa Qm (i32)0x007f00fa
+vdup.16 d15, d31[2] :: Qd 0x191d191d 0x191d191d Qm (i32)0x007f00fa
vdup.16 d6, d2[0] :: Qd 0xbcdebcde 0xbcdebcde Qm (i32)0x0ffabcde
+vdup.16 d6, d2[0] :: Qd 0x1f1c1f1c 0x1f1c1f1c Qm (i32)0x0ffabcde
vdup.16 d8, d22[3] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000713
+vdup.16 d8, d22[3] :: Qd 0x151d151d 0x151d151d Qm (i32)0x00000713
vdup.16 d9, d2[0] :: Qd 0x07130713 0x07130713 Qm (i32)0x00000713
+vdup.16 d9, d2[0] :: Qd 0x1f1c1f1c 0x1f1c1f1c Qm (i32)0x00000713
vdup.32 d10, d17[1] :: Qd 0x00000713 0x00000713 Qm (i32)0x00000713
+vdup.32 d10, d17[1] :: Qd 0x151d191d 0x151d191d Qm (i32)0x00000713
vdup.32 d15, d11[0] :: Qd 0x00000003 0x00000003 Qm (i32)0x00000003
+vdup.32 d15, d11[0] :: Qd 0x141c1f1c 0x141c1f1c Qm (i32)0x00000003
vdup.32 d30, d29[1] :: Qd 0xf00000aa 0xf00000aa Qm (i32)0xf00000aa
+vdup.32 d30, d29[1] :: Qd 0x151d191d 0x151d191d Qm (i32)0xf00000aa
vdup.32 d22, d0[1] :: Qd 0x0000000f 0x0000000f Qm (i32)0x0000000f
+vdup.32 d22, d0[1] :: Qd 0x151d191d 0x151d191d Qm (i32)0x0000000f
vdup.32 d13, d13[0] :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vdup.32 d13, d13[0] :: Qd 0x141c1f1c 0x141c1f1c Qm (i32)0xffffffff
---- VQDMULH ----
vqdmulh.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 d0, d1, d2 :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 d6, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmulh.s32 d6, d7, d8 :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmulh.s16 d9, d11, d12 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmulh.s16 d9, d11, d12 :: Qd 0x0000003a 0x00000043 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmulh.s16 d4, d5, d6 :: Qd 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 d4, d5, d6 :: Qd 0x00000687 0x00000788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 d7, d8, d9 :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 d7, d8, d9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s16 d4, d5, d6 :: Qd 0x0000e50b 0x0000e50b Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 d4, d5, d6 :: Qd 0x00000687 0x00000788 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 d7, d8, d9 :: Qd 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmulh.s32 d7, d8, d9 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmulh.s16 d4, d5, d6 :: Qd 0x0000003f 0x0000003f Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 d4, d5, d6 :: Qd 0x00000687 0x00000788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 d7, d8, d9 :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 d7, d8, d9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s32 d10, d11, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 d10, d11, d15 :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 d10, d30, d31 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmulh.s32 d10, d30, d31 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 d10, d30, d31 :: Qd 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmulh.s16 d10, d30, d31 :: Qd 0xece50000 0xede10000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s32 d10, d30, d31 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 d10, d30, d31 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 d10, d30, d31 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmulh.s16 d10, d30, d31 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMULH (by scalar) ----
vqdmulh.s32 d0, d1, d6[0] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 d0, d1, d6[0] :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 d6, d7, d1[1] :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmulh.s32 d6, d7, d1[1] :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmulh.s16 d9, d11, d7[0] :: Qd 0x00000002 0x00000002 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmulh.s16 d9, d11, d7[0] :: Qd 0x002a003a 0x00280043 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmulh.s16 d4, d5, d6[0] :: Qd 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 d4, d5, d6[0] :: Qd 0x04c70687 0x04880788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 d7, d8, d9[1] :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 d7, d8, d9[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s16 d4, d5, d6[1] :: Qd 0xffffe50b 0xffffe50b Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmulh.s16 d4, d5, d6[1] :: Qd 0x04c70687 0x04880788 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
vqdmulh.s32 d7, d8, d9[0] :: Qd 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmulh.s32 d7, d8, d9[0] :: Qd 0x00000001 0x00000001 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmulh.s16 d4, d5, d6[2] :: Qd 0x0400003f 0x0400003f Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 d4, d5, d6[2] :: Qd 0x04c70687 0x04880788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 d7, d8, d9[0] :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 d7, d8, d9[0] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s32 d10, d31, d15[0] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 d10, d31, d15[0] :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 d10, d14, d15[1] :: Qd 0xffffff88 0xffffff88 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 d10, d14, d15[1] :: Qd 0x00000011 0x00000010 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 d10, d14, d7[3] :: Qd 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmulh.s16 d10, d14, d7[3] :: Qd 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s32 d10, d14, d15[1] :: Qd 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 d10, d14, d15[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 d31, d14, d7[1] :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmulh.s16 d31, d14, d7[1] :: Qd 0x098d0d0d 0x090f0f0f Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VSHRN ----
vshrn.i64 d2, q2, #1 :: Qd 0x855e232b 0x855e232b Qm (i32)0x0abc4657
+vshrn.i64 d2, q2, #1 :: Qd 0x91979717 0x8a0e0f8e Qm (i32)0x0abc4657
vshrn.i64 d3, q3, #0 :: Qd 0x0007a1b3 0x0007a1b3 Qm (i32)0x0007a1b3
+vshrn.i64 d3, q3, #0 :: Qd 0x232f2e2f 0x141c1f1c Qm (i32)0x0007a1b3
vshrn.i64 d1, q0, #3 :: Qd 0x400e2755 0x400e2755 Qm (i32)0x00713aaa
+vshrn.i64 d1, q0, #3 :: Qd 0x6465e5c5 0xa28383e3 Qm (i32)0x00713aaa
vshrn.i64 d0, q4, #5 :: Qd 0x98005538 0x98005538 Qm (i32)0x000aa713
+vshrn.i64 d0, q4, #5 :: Qd 0x59197971 0xe8a0e0f8 Qm (i32)0x000aa713
vshrn.i64 d4, q8, #11 :: Qd 0x386000f6 0x386000f6 Qm (i32)0x0007b1c3
+vshrn.i64 d4, q8, #11 :: Qd 0x656465e5 0x23a28383 Qm (i32)0x0007b1c3
vshrn.i16 d7, q12, #6 :: Qd 0x1cff1cff 0x1cff1cff Qm (i32)0x0713ffff
+vshrn.i16 d7, q12, #6 :: Qd 0x90ac8cb8 0x5464507c Qm (i32)0x0713ffff
vshrn.i16 d15, q11, #2 :: Qd 0x1f3e1f3e 0x1f3e1f3e Qm (i32)0x007f00fa
+vshrn.i16 d15, q11, #2 :: Qd 0x0bcacb8b 0x474707c7 Qm (i32)0x007f00fa
vshrn.i16 d6, q2, #4 :: Qd 0x00ab00ab 0x00ab00ab Qm (i32)0x000ffabc
+vshrn.i16 d6, q2, #4 :: Qd 0x42b232e2 0x519141f1 Qm (i32)0x000ffabc
vshrn.i16 d8, q12, #3 :: Qd 0x00e200e2 0x00e200e2 Qm (i32)0x00000713
+vshrn.i16 d8, q12, #3 :: Qd 0x856565c5 0xa32383e3 Qm (i32)0x00000713
vshrn.i16 d9, q2, #7 :: Qd 0x000e000e 0x000e000e Qm (i32)0x00000713
+vshrn.i16 d9, q2, #7 :: Qd 0x4856465c 0x2a32283e Qm (i32)0x00000713
vshrn.i32 d10, q13, #2 :: Qd 0x01c401c4 0x01c401c4 Qm (i32)0x00000713
+vshrn.i32 d10, q13, #2 :: Qd 0x0acacb8b 0x464707c7 Qm (i32)0x00000713
vshrn.i32 d15, q11, #1 :: Qd 0x00010001 0x00010001 Qm (i32)0x00000003
+vshrn.i32 d15, q11, #1 :: Qd 0x15959717 0x8c8e0f8e Qm (i32)0x00000003
vshrn.i32 d10, q9, #5 :: Qd 0x00050005 0x00050005 Qm (i32)0xf00000aa
+vshrn.i32 d10, q9, #5 :: Qd 0x61597971 0xe8c8e0f8 Qm (i32)0xf00000aa
vshrn.i32 d12, q0, #6 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000000f
+vshrn.i32 d12, q0, #6 :: Qd 0xb0acbcb8 0x7464707c Qm (i32)0x0000000f
vshrn.i32 d13, q13, #2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshrn.i32 d13, q13, #2 :: Qd 0x0acacb8b 0x464707c7 Qm (i32)0xffffffff
---- VQSHRN ----
vqshrn.s16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 00000000
+vqshrn.s16 d0, q1, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff fpscr 08000000
vqshrn.s16 d3, q4, #2 :: Qd 0xffe1ffe1 0xffe1ffe1 Qm (i32)0xffffff84 fpscr 00000000
+vqshrn.s16 d3, q4, #2 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffff84 fpscr 08000000
vqshrn.s32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 00000000
+vqshrn.s32 d2, q5, #10 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff fpscr 08000000
+vqshrn.s32 d2, q5, #1 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x7fffffff fpscr 08000000
vqshrn.s32 d2, q5, #1 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x7fffffff fpscr 08000000
vqshrn.s16 d2, q5, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i16)0x00007fff fpscr 08000000
+vqshrn.s16 d2, q5, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i16)0x00007fff fpscr 08000000
+vqshrn.s64 d6, q7, #7 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x0000ffff fpscr 08000000
vqshrn.s64 d6, q7, #7 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x0000ffff fpscr 08000000
vqshrn.s16 d8, q9, #8 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff6 fpscr 00000000
+vqshrn.s16 d8, q9, #8 :: Qd 0x1519141f 0x131a121e Qm (i32)0xfffffff6 fpscr 00000000
vqshrn.s32 d10, q11, #5 :: Qd 0x013f013f 0x013f013f Qm (i32)0x000027fa fpscr 00000000
+vqshrn.s32 d10, q11, #5 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x000027fa fpscr 08000000
vqshrn.s64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 00000000
+vqshrn.s64 d12, q13, #1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.s16 d14, q15, #6 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 00000000
+vqshrn.s16 d14, q15, #6 :: Qd 0x5464507c 0x4c684878 Qm (i32)0xffffffff fpscr 00000000
vqshrn.s32 d10, q11, #9 :: Qd 0x00010001 0x00010001 Qm (i32)0x000003e8 fpscr 00000000
+vqshrn.s32 d10, q11, #9 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x000003e8 fpscr 08000000
vqshrn.s64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 00000000
+vqshrn.s64 d7, q13, #7 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.s16 d8, q1, #1 :: Qd 0x00800080 0x00800080 Qm (i32)0x0000abcf fpscr 08000000
+vqshrn.s16 d8, q1, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x0000abcf fpscr 08000000
vqshrn.s32 d8, q1, #1 :: Qd 0x55e755e7 0x55e755e7 Qm (i32)0x0000abcf fpscr 00000000
+vqshrn.s32 d8, q1, #1 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x0000abcf fpscr 08000000
vqshrn.s32 d12, q3, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffe50 fpscr 00000000
+vqshrn.s32 d12, q3, #15 :: Qd 0x2a3a2838 0x2636243e Qm (i32)0xfffffe50 fpscr 00000000
vqshrn.s64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 00000000
+vqshrn.s64 d0, q1, #22 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.s64 d6, q7, #12 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000fac fpscr 08000000
+vqshrn.s64 d6, q7, #12 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000fac fpscr 08000000
+vqshrn.s64 d8, q4, #9 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x000034f8 fpscr 08000000
vqshrn.s64 d8, q4, #9 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x000034f8 fpscr 08000000
vqshrn.s64 d9, q12, #11 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00018196 fpscr 08000000
+vqshrn.s64 d9, q12, #11 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00018196 fpscr 08000000
+vqshrn.u16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u16 d3, q4, #2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff84 fpscr 08000000
+vqshrn.u16 d3, q4, #2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff84 fpscr 08000000
+vqshrn.u32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
+vqshrn.u32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
+vqshrn.u16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
vqshrn.u16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
vqshrn.u64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
+vqshrn.u64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
vqshrn.u16 d8, q9, #8 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff6 fpscr 00000000
+vqshrn.u16 d8, q9, #8 :: Qd 0x1519141f 0x131a121e Qm (i32)0xfffffff6 fpscr 00000000
vqshrn.u32 d10, q11, #5 :: Qd 0x013f013f 0x013f013f Qm (i32)0x000027fa fpscr 00000000
+vqshrn.u32 d10, q11, #5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000027fa fpscr 08000000
+vqshrn.u64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u16 d14, q15, #6 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshrn.u16 d14, q15, #6 :: Qd 0x5464507c 0x4c684878 Qm (i32)0xffffffff fpscr 00000000
vqshrn.u32 d10, q11, #9 :: Qd 0x00010001 0x00010001 Qm (i32)0x000003e8 fpscr 00000000
+vqshrn.u32 d10, q11, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000003e8 fpscr 08000000
+vqshrn.u64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u16 d8, q1, #1 :: Qd 0x00ff00ff 0x00ff00ff Qm (i32)0x0000abcf fpscr 08000000
+vqshrn.u16 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqshrn.u32 d8, q1, #1 :: Qd 0x55e755e7 0x55e755e7 Qm (i32)0x0000abcf fpscr 00000000
+vqshrn.u32 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqshrn.u32 d12, q3, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffe50 fpscr 08000000
+vqshrn.u32 d12, q3, #15 :: Qd 0x2a3a2838 0x2636243e Qm (i32)0xfffffe50 fpscr 00000000
+vqshrn.u64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u64 d6, q7, #12 :: Qd 0xfac00000 0xfac00000 Qm (i32)0x00000fac fpscr 00000000
+vqshrn.u64 d6, q7, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000fac fpscr 08000000
vqshrn.u64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
+vqshrn.u64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
+vqshrn.u64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
vqshrn.u64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
---- VQSHRUN ----
vqshrun.s16 d0, q1, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshrun.s16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrun.s16 d3, q4, #2 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff84 fpscr 08000000
+vqshrun.s16 d3, q4, #2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff84 fpscr 08000000
vqshrun.s32 d2, q5, #10 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshrun.s32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrun.s32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
+vqshrun.s32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
+vqshrun.s16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
vqshrun.s16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
vqshrun.s64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
+vqshrun.s64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
vqshrun.s16 d8, q9, #8 :: Qd 0x00000000 0x00000000 Qm (i32)0xfffffff6 fpscr 08000000
+vqshrun.s16 d8, q9, #8 :: Qd 0x1519141f 0x131a121e Qm (i32)0xfffffff6 fpscr 00000000
vqshrun.s32 d10, q11, #5 :: Qd 0x013f013f 0x013f013f Qm (i32)0x000027fa fpscr 00000000
+vqshrun.s32 d10, q11, #5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000027fa fpscr 08000000
vqshrun.s64 d12, q13, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshrun.s64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrun.s16 d14, q15, #6 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshrun.s16 d14, q15, #6 :: Qd 0x5464507c 0x4c684878 Qm (i32)0xffffffff fpscr 00000000
vqshrun.s32 d10, q11, #9 :: Qd 0x00010001 0x00010001 Qm (i32)0x000003e8 fpscr 00000000
+vqshrun.s32 d10, q11, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000003e8 fpscr 08000000
vqshrun.s64 d7, q13, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshrun.s64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrun.s16 d8, q1, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000abcf fpscr 08000000
+vqshrun.s16 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqshrun.s32 d8, q1, #1 :: Qd 0x55e755e7 0x55e755e7 Qm (i32)0x0000abcf fpscr 00000000
+vqshrun.s32 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqshrun.s32 d12, q3, #15 :: Qd 0x00000000 0x00000000 Qm (i32)0xfffffe50 fpscr 08000000
+vqshrun.s32 d12, q3, #15 :: Qd 0x2a3a2838 0x2636243e Qm (i32)0xfffffe50 fpscr 00000000
vqshrun.s64 d0, q1, #22 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshrun.s64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrun.s64 d6, q7, #12 :: Qd 0xfac00000 0xfac00000 Qm (i32)0x00000fac fpscr 00000000
+vqshrun.s64 d6, q7, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000fac fpscr 08000000
+vqshrun.s64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
vqshrun.s64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
vqshrun.s64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
+vqshrun.s64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
---- VQRSHRN ----
vqrshrn.s16 d0, q1, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrn.s16 d0, q1, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff fpscr 08000000
vqrshrn.s16 d3, q4, #2 :: Qd 0x00e100e1 0x00e100e1 Qm (i32)0xffffff84 fpscr 00000000
+vqrshrn.s16 d3, q4, #2 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffff84 fpscr 08000000
vqrshrn.s32 d2, q5, #10 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrn.s32 d2, q5, #10 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.s32 d2, q5, #1 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x7fffffff fpscr 08000000
+vqrshrn.s32 d2, q5, #1 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x7fffffff fpscr 08000000
+vqrshrn.s16 d2, q5, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i16)0x00007fff fpscr 08000000
vqrshrn.s16 d2, q5, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i16)0x00007fff fpscr 08000000
vqrshrn.s64 d6, q7, #7 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x0000ffff fpscr 08000000
+vqrshrn.s64 d6, q7, #7 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x0000ffff fpscr 08000000
vqrshrn.s16 d8, q9, #8 :: Qd 0x00000000 0x00000000 Qm (i32)0xfffffff6 fpscr 00000000
+vqrshrn.s16 d8, q9, #8 :: Qd 0x1519141f 0x131a121e Qm (i32)0xfffffff6 fpscr 00000000
vqrshrn.s32 d10, q11, #5 :: Qd 0x01400140 0x01400140 Qm (i32)0x000027fa fpscr 00000000
+vqrshrn.s32 d10, q11, #5 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x000027fa fpscr 08000000
vqrshrn.s64 d12, q13, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrn.s64 d12, q13, #1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.s16 d14, q15, #6 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrn.s16 d14, q15, #6 :: Qd 0x5464507c 0x4c684878 Qm (i32)0xffffffff fpscr 00000000
vqrshrn.s32 d10, q11, #9 :: Qd 0x00020002 0x00020002 Qm (i32)0x000003e8 fpscr 00000000
+vqrshrn.s32 d10, q11, #9 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x000003e8 fpscr 08000000
vqrshrn.s64 d7, q13, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrn.s64 d7, q13, #7 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.s16 d8, q1, #1 :: Qd 0x00800080 0x00800080 Qm (i32)0x0000abcf fpscr 08000000
+vqrshrn.s16 d8, q1, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x0000abcf fpscr 08000000
vqrshrn.s32 d8, q1, #1 :: Qd 0x55e855e8 0x55e855e8 Qm (i32)0x0000abcf fpscr 00000000
+vqrshrn.s32 d8, q1, #1 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x0000abcf fpscr 08000000
vqrshrn.s32 d12, q3, #15 :: Qd 0x00000000 0x00000000 Qm (i32)0xfffffe50 fpscr 00000000
+vqrshrn.s32 d12, q3, #15 :: Qd 0x2a3a2838 0x2636243e Qm (i32)0xfffffe50 fpscr 00000000
vqrshrn.s64 d0, q1, #22 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrn.s64 d0, q1, #22 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
+vqrshrn.s64 d6, q7, #12 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000fac fpscr 08000000
vqrshrn.s64 d6, q7, #12 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000fac fpscr 08000000
vqrshrn.s64 d8, q4, #9 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x000034f8 fpscr 08000000
+vqrshrn.s64 d8, q4, #9 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x000034f8 fpscr 08000000
+vqrshrn.s64 d9, q12, #11 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00018196 fpscr 08000000
vqrshrn.s64 d9, q12, #11 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00018196 fpscr 08000000
vqrshrn.u16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqrshrn.u16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqrshrn.u16 d3, q4, #2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff84 fpscr 08000000
vqrshrn.u16 d3, q4, #2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff84 fpscr 08000000
vqrshrn.u32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqrshrn.u32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqrshrn.u32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
vqrshrn.u32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
vqrshrn.u16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
+vqrshrn.u16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
+vqrshrn.u64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
vqrshrn.u64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
vqrshrn.u16 d8, q9, #8 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff6 fpscr 08000000
+vqrshrn.u16 d8, q9, #8 :: Qd 0x1519141f 0x131a121e Qm (i32)0xfffffff6 fpscr 00000000
vqrshrn.u32 d10, q11, #5 :: Qd 0x01400140 0x01400140 Qm (i32)0x000027fa fpscr 00000000
+vqrshrn.u32 d10, q11, #5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000027fa fpscr 08000000
+vqrshrn.u64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.u64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.u16 d14, q15, #6 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqrshrn.u16 d14, q15, #6 :: Qd 0x5464507c 0x4c684878 Qm (i32)0xffffffff fpscr 00000000
vqrshrn.u32 d10, q11, #9 :: Qd 0x00020002 0x00020002 Qm (i32)0x000003e8 fpscr 00000000
+vqrshrn.u32 d10, q11, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000003e8 fpscr 08000000
+vqrshrn.u64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.u64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.u16 d8, q1, #1 :: Qd 0x00ff00ff 0x00ff00ff Qm (i32)0x0000abcf fpscr 08000000
+vqrshrn.u16 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqrshrn.u32 d8, q1, #1 :: Qd 0x55e855e8 0x55e855e8 Qm (i32)0x0000abcf fpscr 00000000
+vqrshrn.u32 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqrshrn.u32 d12, q3, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffe50 fpscr 08000000
+vqrshrn.u32 d12, q3, #15 :: Qd 0x2a3a2838 0x2636243e Qm (i32)0xfffffe50 fpscr 00000000
+vqrshrn.u64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.u64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.u64 d6, q7, #12 :: Qd 0xfac00001 0xfac00001 Qm (i32)0x00000fac fpscr 00000000
+vqrshrn.u64 d6, q7, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000fac fpscr 08000000
vqrshrn.u64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
+vqrshrn.u64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
+vqrshrn.u64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
vqrshrn.u64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
---- VQRSHRUN ----
vqrshrun.s16 d0, q1, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrun.s16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrun.s16 d3, q4, #2 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff84 fpscr 08000000
+vqrshrun.s16 d3, q4, #2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff84 fpscr 08000000
vqrshrun.s32 d2, q5, #10 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrun.s32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrun.s32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
+vqrshrun.s32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
+vqrshrun.s16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
vqrshrun.s16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
vqrshrun.s64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
+vqrshrun.s64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
vqrshrun.s16 d8, q9, #8 :: Qd 0x00000000 0x00000000 Qm (i32)0xfffffff6 fpscr 00000000
+vqrshrun.s16 d8, q9, #8 :: Qd 0x1519141f 0x131a121e Qm (i32)0xfffffff6 fpscr 00000000
vqrshrun.s32 d10, q11, #5 :: Qd 0x01400140 0x01400140 Qm (i32)0x000027fa fpscr 00000000
+vqrshrun.s32 d10, q11, #5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000027fa fpscr 08000000
vqrshrun.s64 d12, q13, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrun.s64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrun.s16 d14, q15, #6 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrun.s16 d14, q15, #6 :: Qd 0x5464507c 0x4c684878 Qm (i32)0xffffffff fpscr 00000000
vqrshrun.s32 d10, q11, #9 :: Qd 0x00020002 0x00020002 Qm (i32)0x000003e8 fpscr 00000000
+vqrshrun.s32 d10, q11, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000003e8 fpscr 08000000
vqrshrun.s64 d7, q13, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrun.s64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrun.s16 d8, q1, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000abcf fpscr 08000000
+vqrshrun.s16 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqrshrun.s32 d8, q1, #1 :: Qd 0x55e855e8 0x55e855e8 Qm (i32)0x0000abcf fpscr 00000000
+vqrshrun.s32 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqrshrun.s32 d12, q3, #15 :: Qd 0x00000000 0x00000000 Qm (i32)0xfffffe50 fpscr 00000000
+vqrshrun.s32 d12, q3, #15 :: Qd 0x2a3a2838 0x2636243e Qm (i32)0xfffffe50 fpscr 00000000
vqrshrun.s64 d0, q1, #22 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrun.s64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrun.s64 d6, q7, #12 :: Qd 0xfac00001 0xfac00001 Qm (i32)0x00000fac fpscr 00000000
+vqrshrun.s64 d6, q7, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000fac fpscr 08000000
+vqrshrun.s64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
vqrshrun.s64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
vqrshrun.s64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
+vqrshrun.s64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
---- VRSHRN ----
vrshrn.i64 d2, q2, #1 :: Qd 0x855e232c 0x855e232c Qm (i32)0x0abc4657
+vrshrn.i64 d2, q2, #1 :: Qd 0x91979718 0x8a0e0f8e Qm (i32)0x0abc4657
vrshrn.i64 d3, q3, #0 :: Qd 0x0007a1b3 0x0007a1b3 Qm (i32)0x0007a1b3
+vrshrn.i64 d3, q3, #0 :: Qd 0x232f2e2f 0x141c1f1c Qm (i32)0x0007a1b3
vrshrn.i64 d1, q0, #3 :: Qd 0x400e2755 0x400e2755 Qm (i32)0x00713aaa
+vrshrn.i64 d1, q0, #3 :: Qd 0x6465e5c6 0xa28383e4 Qm (i32)0x00713aaa
vrshrn.i64 d0, q4, #5 :: Qd 0x98005539 0x98005539 Qm (i32)0x000aa713
+vrshrn.i64 d0, q4, #5 :: Qd 0x59197971 0xe8a0e0f9 Qm (i32)0x000aa713
vrshrn.i64 d4, q8, #11 :: Qd 0x386000f6 0x386000f6 Qm (i32)0x0007b1c3
+vrshrn.i64 d4, q8, #11 :: Qd 0x656465e6 0x23a28384 Qm (i32)0x0007b1c3
vrshrn.i16 d7, q12, #6 :: Qd 0x1c001c00 0x1c001c00 Qm (i32)0x0713ffff
+vrshrn.i16 d7, q12, #6 :: Qd 0x91ad8db9 0x5464507c Qm (i32)0x0713ffff
vrshrn.i16 d15, q11, #2 :: Qd 0x203f203f 0x203f203f Qm (i32)0x007f00fa
+vrshrn.i16 d15, q11, #2 :: Qd 0x0bcbcc8c 0x474707c7 Qm (i32)0x007f00fa
vrshrn.i16 d6, q2, #4 :: Qd 0x01ac01ac 0x01ac01ac Qm (i32)0x000ffabc
+vrshrn.i16 d6, q2, #4 :: Qd 0x43b333e3 0x529242f2 Qm (i32)0x000ffabc
vrshrn.i16 d8, q12, #3 :: Qd 0x00e200e2 0x00e200e2 Qm (i32)0x00000713
+vrshrn.i16 d8, q12, #3 :: Qd 0x866566c6 0xa42484e4 Qm (i32)0x00000713
vrshrn.i16 d9, q2, #7 :: Qd 0x000e000e 0x000e000e Qm (i32)0x00000713
+vrshrn.i16 d9, q2, #7 :: Qd 0x4856465c 0x2a32283e Qm (i32)0x00000713
vrshrn.i32 d10, q13, #2 :: Qd 0x01c501c5 0x01c501c5 Qm (i32)0x00000713
+vrshrn.i32 d10, q13, #2 :: Qd 0x0acbcb8c 0x464707c7 Qm (i32)0x00000713
vrshrn.i32 d15, q11, #1 :: Qd 0x00020002 0x00020002 Qm (i32)0x00000003
+vrshrn.i32 d15, q11, #1 :: Qd 0x15969718 0x8c8f0f8e Qm (i32)0x00000003
vrshrn.i32 d10, q9, #5 :: Qd 0x00050005 0x00050005 Qm (i32)0xf00000aa
+vrshrn.i32 d10, q9, #5 :: Qd 0x61597971 0xe8c9e0f9 Qm (i32)0xf00000aa
vrshrn.i32 d12, q0, #6 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000000f
+vrshrn.i32 d12, q0, #6 :: Qd 0xb0adbcb9 0x7464707c Qm (i32)0x0000000f
vrshrn.i32 d13, q13, #2 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
+vrshrn.i32 d13, q13, #2 :: Qd 0x0acbcb8c 0x464707c7 Qm (i32)0xffffffff
---- VSHL (immediate) ----
vshl.i64 d0, d1, #1 :: Qd 0x00000030 0x00000030 Qm (i32)0x00000018
+vshl.i64 d0, d1, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i32)0x00000018
vshl.i64 d5, d2, #1 :: Qd 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i64 d5, d2, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i32)0x40000000
vshl.i64 d9, d12, #2 :: Qd 0x0000000a 0x00000008 Qm (i32)0x80000002
+vshl.i64 d9, d12, #2 :: Qd 0x54746474 0x50707c70 Qm (i32)0x80000002
vshl.i64 d11, d2, #12 :: Qd 0xffffffff 0xfffff000 Qm (i32)0xffffffff
+vshl.i64 d11, d2, #12 :: Qd 0xd191d141 0xc1f1c000 Qm (i32)0xffffffff
vshl.i64 d15, d12, #63 :: Qd 0x80000000 0x00000000 Qm (i32)0x00000005
+vshl.i64 d15, d12, #63 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000005
vshl.i64 d5, d12, #62 :: Qd 0x40000000 0x00000000 Qm (i32)0x80000001
+vshl.i64 d5, d12, #62 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001
vshl.i32 d0, d1, #1 :: Qd 0x00000030 0x00000030 Qm (i32)0x00000018
+vshl.i32 d0, d1, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i32)0x00000018
vshl.i32 d5, d2, #1 :: Qd 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i32 d5, d2, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i32)0x40000000
vshl.i32 d9, d12, #2 :: Qd 0x00000008 0x00000008 Qm (i32)0x80000002
+vshl.i32 d9, d12, #2 :: Qd 0x54746474 0x50707c70 Qm (i32)0x80000002
vshl.i32 d11, d2, #12 :: Qd 0xfffff000 0xfffff000 Qm (i32)0xffffffff
+vshl.i32 d11, d2, #12 :: Qd 0xd191d000 0xc1f1c000 Qm (i32)0xffffffff
vshl.i32 d15, d12, #20 :: Qd 0x00500000 0x00500000 Qm (i32)0x00000005
+vshl.i32 d15, d12, #20 :: Qd 0x91d00000 0xf1c00000 Qm (i32)0x00000005
vshl.i32 d5, d12, #30 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000001
+vshl.i32 d5, d12, #30 :: Qd 0x40000000 0x00000000 Qm (i32)0x80000001
vshl.i16 d0, d1, #1 :: Qd 0x00300030 0x00300030 Qm (i16)0x00000018
+vshl.i16 d0, d1, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i16)0x00000018
vshl.i16 d5, d2, #1 :: Qd 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i16 d5, d2, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i32)0x40000000
vshl.i16 d9, d12, #2 :: Qd 0x00000008 0x00000008 Qm (i32)0x80000002
+vshl.i16 d9, d12, #2 :: Qd 0x54746474 0x50707c70 Qm (i32)0x80000002
vshl.i16 d11, d2, #12 :: Qd 0xf000f000 0xf000f000 Qm (i16)0xffffffff
+vshl.i16 d11, d2, #12 :: Qd 0xd000d000 0xc000c000 Qm (i16)0xffffffff
vshl.i16 d15, d12, #3 :: Qd 0x00280028 0x00280028 Qm (i16)0x00000005
+vshl.i16 d15, d12, #3 :: Qd 0xa8e8c8e8 0xa0e0f8e0 Qm (i16)0x00000005
vshl.i16 d5, d12, #14 :: Qd 0x00004000 0x00004000 Qm (i32)0x80000001
+vshl.i16 d5, d12, #14 :: Qd 0x40004000 0x00000000 Qm (i32)0x80000001
vshl.i8 d0, d1, #1 :: Qd 0x30303030 0x30303030 Qm (i8)0x00000018
+vshl.i8 d0, d1, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i8)0x00000018
vshl.i8 d5, d2, #1 :: Qd 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i8 d5, d2, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i32)0x40000000
vshl.i8 d9, d12, #2 :: Qd 0x00000008 0x00000008 Qm (i32)0x80000002
+vshl.i8 d9, d12, #2 :: Qd 0x54746474 0x50707c70 Qm (i32)0x80000002
vshl.i8 d11, d2, #7 :: Qd 0x80808080 0x80808080 Qm (i8)0xffffffff
+vshl.i8 d11, d2, #7 :: Qd 0x80808080 0x00008000 Qm (i8)0xffffffff
vshl.i8 d15, d12, #3 :: Qd 0x28282828 0x28282828 Qm (i8)0x00000005
+vshl.i8 d15, d12, #3 :: Qd 0xa8e8c8e8 0xa0e0f8e0 Qm (i8)0x00000005
vshl.i8 d5, d12, #6 :: Qd 0x00000040 0x00000040 Qm (i32)0x80000001
+vshl.i8 d5, d12, #6 :: Qd 0x40404040 0x0000c000 Qm (i32)0x80000001
---- VNEG ----
vneg.s32 d0, d1 :: Qd 0xffffff8d 0xffffff8d Qm (i32)0x00000073
+vneg.s32 d0, d1 :: Qd 0xeae2e6e3 0xebe3e0e4 Qm (i32)0x00000073
vneg.s16 d15, d4 :: Qd 0x0000ff8d 0x0000ff8d Qm (i32)0x00000073
+vneg.s16 d15, d4 :: Qd 0xeae3e6e3 0xebe4e0e4 Qm (i32)0x00000073
vneg.s8 d8, d7 :: Qd 0x0000008d 0x0000008d Qm (i32)0x00000073
+vneg.s8 d8, d7 :: Qd 0xebe3e7e3 0xece4e1e4 Qm (i32)0x00000073
vneg.s32 d0, d1 :: Qd 0xffffff02 0xffffff02 Qm (i32)0x000000fe
+vneg.s32 d0, d1 :: Qd 0xeae2e6e3 0xebe3e0e4 Qm (i32)0x000000fe
vneg.s16 d31, d4 :: Qd 0x0000ff11 0x0000ff11 Qm (i32)0x000000ef
+vneg.s16 d31, d4 :: Qd 0xeae3e6e3 0xebe4e0e4 Qm (i32)0x000000ef
vneg.s8 d8, d7 :: Qd 0x00000022 0x00000022 Qm (i32)0x000000de
+vneg.s8 d8, d7 :: Qd 0xebe3e7e3 0xece4e1e4 Qm (i32)0x000000de
vneg.s32 d0, d1 :: Qd 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a
+vneg.s32 d0, d1 :: Qd 0xeae2e6e3 0xebe3e0e4 Qm (i16)0x0000fe0a
vneg.s16 d15, d4 :: Qd 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b
+vneg.s16 d15, d4 :: Qd 0xeae3e6e3 0xebe4e0e4 Qm (i16)0x0000ef0b
vneg.s8 d8, d7 :: Qd 0x22f422f4 0x22f422f4 Qm (i16)0x0000de0c
+vneg.s8 d8, d7 :: Qd 0xebe3e7e3 0xece4e1e4 Qm (i16)0x0000de0c
---- VQNEG ----
vqneg.s32 d0, d1 :: Qd 0xffffff8d 0xffffff8d Qm (i32)0x00000073 fpscr 00000000
+vqneg.s32 d0, d1 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x00000073 fpscr 00000000
vqneg.s32 d0, d1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x80000000 fpscr 08000000
+vqneg.s32 d0, d1 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 fpscr 00000000
vqneg.s16 d0, d1 :: Qd 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 fpscr 08000000
+vqneg.s16 d0, d1 :: Qd 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 fpscr 00000000
vqneg.s8 d0, d1 :: Qd 0x7f000000 0x7f000000 Qm (i32)0x80000000 fpscr 08000000
+vqneg.s8 d0, d1 :: Qd 0xede5e6e5 0xeee1e2e1 Qm (i32)0x80000000 fpscr 00000000
vqneg.s16 d15, d4 :: Qd 0x0000ff8d 0x0000ff8d Qm (i32)0x00000073 fpscr 00000000
+vqneg.s16 d15, d4 :: Qd 0xece5e5e5 0xede1e1e1 Qm (i32)0x00000073 fpscr 00000000
vqneg.s8 d8, d7 :: Qd 0x0000008d 0x0000008d Qm (i32)0x00000073 fpscr 00000000
+vqneg.s8 d8, d7 :: Qd 0xede5e6e5 0xeee1e2e1 Qm (i32)0x00000073 fpscr 00000000
vqneg.s32 d0, d1 :: Qd 0xffffff02 0xffffff02 Qm (i32)0x000000fe fpscr 00000000
+vqneg.s32 d0, d1 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x000000fe fpscr 00000000
vqneg.s16 d31, d4 :: Qd 0x0000ff11 0x0000ff11 Qm (i32)0x000000ef fpscr 00000000
+vqneg.s16 d31, d4 :: Qd 0xece5e5e5 0xede1e1e1 Qm (i32)0x000000ef fpscr 00000000
vqneg.s8 d8, d7 :: Qd 0x00000022 0x00000022 Qm (i32)0x000000de fpscr 00000000
+vqneg.s8 d8, d7 :: Qd 0xede5e6e5 0xeee1e2e1 Qm (i32)0x000000de fpscr 00000000
vqneg.s32 d0, d1 :: Qd 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a fpscr 00000000
+vqneg.s32 d0, d1 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i16)0x0000fe0a fpscr 00000000
vqneg.s16 d15, d4 :: Qd 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b fpscr 00000000
+vqneg.s16 d15, d4 :: Qd 0xece5e5e5 0xede1e1e1 Qm (i16)0x0000ef0b fpscr 00000000
vqneg.s8 d8, d7 :: Qd 0x22f422f4 0x22f422f4 Qm (i16)0x0000de0c fpscr 00000000
+vqneg.s8 d8, d7 :: Qd 0xede5e6e5 0xeee1e2e1 Qm (i16)0x0000de0c fpscr 00000000
---- VREV ----
vrev64.8 d0, d1 :: Qd 0xddccbbaa 0xddccbbaa Qm (i32)0xaabbccdd
+vrev64.8 d0, d1 :: Qd 0x1c1f1c14 0x1d191d15 Qm (i32)0xaabbccdd
vrev64.16 d10, d31 :: Qd 0xccddaabb 0xccddaabb Qm (i32)0xaabbccdd
+vrev64.16 d10, d31 :: Qd 0x1f1c141c 0x191d151d Qm (i32)0xaabbccdd
vrev64.32 d1, d14 :: Qd 0xaabbccdd 0xaabbccdd Qm (i32)0xaabbccdd
+vrev64.32 d1, d14 :: Qd 0x141c1f1c 0x151d191d Qm (i32)0xaabbccdd
vrev32.8 d0, d1 :: Qd 0xddccbbaa 0xddccbbaa Qm (i32)0xaabbccdd
+vrev32.8 d0, d1 :: Qd 0x1d191d15 0x1c1f1c14 Qm (i32)0xaabbccdd
vrev32.16 d30, d15 :: Qd 0xccddaabb 0xccddaabb Qm (i32)0xaabbccdd
+vrev32.16 d30, d15 :: Qd 0x191d151d 0x1f1c141c Qm (i32)0xaabbccdd
vrev16.8 d0, d1 :: Qd 0xbbaaddcc 0xbbaaddcc Qm (i32)0xaabbccdd
+vrev16.8 d0, d1 :: Qd 0x1d151d19 0x1c141c1f Qm (i32)0xaabbccdd
---- VTBL ----
vtbl.8 d0, {d2}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d0, {d2}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d0, {d31}, d1 :: Qd 0x12121212 0x12121212 Qm (i8)0x00000007 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d0, {d31}, d1 :: Qd 0x12121212 0x12121212 Qm (i8)0x00000007 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d0, {d20}, d1 :: Qd 0x56565656 0x56565656 Qm (i8)0x00000001 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d0, {d20}, d1 :: Qd 0x56565656 0x56565656 Qm (i8)0x00000001 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d0, {d2}, d31 :: Qd 0x34343434 0x34343434 Qm (i8)0x00000002 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d0, {d2}, d31 :: Qd 0x34343434 0x34343434 Qm (i8)0x00000002 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d30, {d2}, d1 :: Qd 0x12125656 0x12125656 Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d30, {d2}, d1 :: Qd 0x12125656 0x12125656 Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d31, {d2}, d1 :: Qd 0x56785678 0x56785678 Qm (i16)0x00000104 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d31, {d2}, d1 :: Qd 0x56785678 0x56785678 Qm (i16)0x00000104 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d30, {d2}, d1 :: Qd 0x12005656 0x12005656 Qm (i32)0x07080501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d30, {d2}, d1 :: Qd 0x12005656 0x12005656 Qm (i32)0x07080501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d30, {d2}, d1 :: Qd 0x12005600 0x12005600 Qm (i32)0x07ed05ee Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d30, {d2}, d1 :: Qd 0x12005600 0x12005600 Qm (i32)0x07ed05ee Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d0, {d2-d3}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d2-d3}, d1 :: Qd 0x1c1c1c1c 0x1c1c1c1c Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d1-d2}, d3 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d1-d2}, d3 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d30-d31}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d30-d31}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d23}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d23}, d1 :: Qd 0x1d1d1d1d 0x1d1d1d1d Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000e Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000e Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d3}, d31 :: Qd 0x12125656 0x12125656 Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d3}, d31 :: Qd 0x1514191f 0x1514191f Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d3}, d31 :: Qd 0xa4a25656 0xa4a25656 Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d3}, d31 :: Qd 0xa4a2191f 0xa4a2191f Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d3}, d31 :: Qd 0x12a2a256 0x12a2a256 Qm (i32)0x070e0e01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d3}, d31 :: Qd 0x15a2a21f 0x15a2a21f Qm (i32)0x070e0e01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d3}, d31 :: Qd 0xa300a156 0xa300a156 Qm (i32)0x0d130f01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d3}, d31 :: Qd 0xa300a11f 0xa300a11f Qm (i32)0x0d130f01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d3}, d31 :: Qd 0x12125600 0x12125600 Qm (i32)0x07030511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d3}, d31 :: Qd 0x15141900 0x15141900 Qm (i32)0x07030511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d2-d4}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d2-d4}, d1 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d1-d3}, d10 :: Qd 0xcccccccc 0xcccccccc Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d1-d3}, d10 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d29-d31}, d1 :: Qd 0xcacacaca 0xcacacaca Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d29-d31}, d1 :: Qd 0x15151515 0x15151515 Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d24}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d24}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d24}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d24}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d24}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d24}, d1 :: Qd 0x1b1b1b1b 0x1b1b1b1b Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d24}, d1 :: Qd 0xcdcdcdcd 0xcdcdcdcd Qm (i8)0x00000010 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d24}, d1 :: Qd 0x1c1c1c1c 0x1c1c1c1c Qm (i8)0x00000010 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d24}, d1 :: Qd 0xcccccccc 0xcccccccc Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d24}, d1 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d4}, d31 :: Qd 0xa212cc78 0xa212cc78 Qm (i32)0x0a031504 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d4}, d31 :: Qd 0xa212191b 0xa212191b Qm (i32)0x0a031504 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d4}, d31 :: Qd 0xa4a25656 0xa4a25656 Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d4}, d31 :: Qd 0xa4a21a1e 0xa4a21a1e Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d4}, d31 :: Qd 0xcaa200a1 0xcaa200a1 Qm (i32)0x170efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d4}, d31 :: Qd 0x15a200a1 0x15a200a1 Qm (i32)0x170efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d4}, d31 :: Qd 0xa3caa1cc 0xa3caa1cc Qm (i32)0x0d130f11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d4}, d31 :: Qd 0xa314a11f 0xa314a11f Qm (i32)0x0d130f11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d4}, d31 :: Qd 0x12a1cccc 0x12a1cccc Qm (i32)0x070f1511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d4}, d31 :: Qd 0x13a1191f 0x13a1191f Qm (i32)0x070f1511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d2-d5}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d2-d5}, d1 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d0, {d1-d4}, d10 :: Qd 0xcccccccc 0xcccccccc Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d1-d4}, d10 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d0, {d28-d31}, d1 :: Qd 0xcacacaca 0xcacacaca Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d28-d31}, d1 :: Qd 0x15151515 0x15151515 Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d0, {d22-d25}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d22-d25}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d22-d25}, d1 :: Qd 0xfdfdfdfd 0xfdfdfdfd Qm (i8)0x0000001a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d0, {d22-d25}, d1 :: Qd 0xfdfdfdfd 0xfdfdfdfd Qm (i8)0x0000001a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d0, {d22-d25}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d22-d25}, d1 :: Qd 0x1b1b1b1b 0x1b1b1b1b Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d0, {d22-d25}, d1 :: Qd 0xcbcbcbcb 0xcbcbcbcb Qm (i8)0x00000016 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d22-d25}, d1 :: Qd 0x1d1d1d1d 0x1d1d1d1d Qm (i8)0x00000016 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d22-d25}, d1 :: Qd 0xfefefefe 0xfefefefe Qm (i8)0x0000001f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d0, {d22-d25}, d1 :: Qd 0xfefefefe 0xfefefefe Qm (i8)0x0000001f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d30, {d2-d5}, d31 :: Qd 0xfd12cc00 0xfd12cc00 Qm (i32)0x1a0315ff Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d30, {d2-d5}, d31 :: Qd 0xfd121900 0xfd121900 Qm (i32)0x1a0315ff Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d30, {d2-d5}, d31 :: Qd 0xa4a25656 0xa4a25656 Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d30, {d2-d5}, d31 :: Qd 0xa4a21a1e 0xa4a21a1e Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d30, {d2-d5}, d31 :: Qd 0xcafd00a1 0xcafd00a1 Qm (i32)0x171efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d30, {d2-d5}, d31 :: Qd 0x15fd00a1 0x15fd00a1 Qm (i32)0x171efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d30, {d2-d5}, d31 :: Qd 0xfccaa1fd 0xfccaa1fd Qm (i32)0x1d130f1a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d30, {d2-d5}, d31 :: Qd 0xfc14a1fd 0xfc14a1fd Qm (i32)0x1d130f1a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d30, {d2-d5}, d31 :: Qd 0xcacdfbcc 0xcacdfbcc Qm (i32)0x17101c11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d30, {d2-d5}, d31 :: Qd 0x151cfb1f 0x151cfb1f Qm (i32)0x17101c11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
---- VTBX ----
vtbx.8 d0, {d2}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d0, {d2}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d0, {d31}, d1 :: Qd 0x12121212 0x12121212 Qm (i8)0x00000007 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d0, {d31}, d1 :: Qd 0x12121212 0x12121212 Qm (i8)0x00000007 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d0, {d20}, d1 :: Qd 0x56565656 0x56565656 Qm (i8)0x00000001 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d0, {d20}, d1 :: Qd 0x56565656 0x56565656 Qm (i8)0x00000001 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d0, {d2}, d31 :: Qd 0x34343434 0x34343434 Qm (i8)0x00000002 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d0, {d2}, d31 :: Qd 0x34343434 0x34343434 Qm (i8)0x00000002 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d30, {d2}, d1 :: Qd 0x12125656 0x12125656 Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d30, {d2}, d1 :: Qd 0x12125656 0x12125656 Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d31, {d2}, d1 :: Qd 0x56785678 0x56785678 Qm (i16)0x00000104 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d31, {d2}, d1 :: Qd 0x56785678 0x56785678 Qm (i16)0x00000104 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d30, {d2}, d1 :: Qd 0x12555656 0x12555656 Qm (i32)0x07080501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d30, {d2}, d1 :: Qd 0x12555656 0x12555656 Qm (i32)0x07080501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d30, {d2}, d1 :: Qd 0x12555655 0x12555655 Qm (i32)0x07ed05ee Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d30, {d2}, d1 :: Qd 0x12555655 0x12555655 Qm (i32)0x07ed05ee Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d0, {d2-d3}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d2-d3}, d1 :: Qd 0x1c1c1c1c 0x1c1c1c1c Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d1-d2}, d3 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d1-d2}, d3 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d30-d31}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d30-d31}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d23}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d23}, d1 :: Qd 0x1d1d1d1d 0x1d1d1d1d Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000e Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000e Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d3}, d31 :: Qd 0x12125656 0x12125656 Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d3}, d31 :: Qd 0x1514191f 0x1514191f Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d3}, d31 :: Qd 0xa4a25656 0xa4a25656 Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d3}, d31 :: Qd 0xa4a2191f 0xa4a2191f Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d3}, d31 :: Qd 0x12a2a256 0x12a2a256 Qm (i32)0x070e0e01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d3}, d31 :: Qd 0x15a2a21f 0x15a2a21f Qm (i32)0x070e0e01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d3}, d31 :: Qd 0xa355a156 0xa355a156 Qm (i32)0x0d130f01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d3}, d31 :: Qd 0xa355a11f 0xa355a11f Qm (i32)0x0d130f01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d3}, d31 :: Qd 0x12125655 0x12125655 Qm (i32)0x07030511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d3}, d31 :: Qd 0x15141955 0x15141955 Qm (i32)0x07030511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d2-d4}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d2-d4}, d1 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d1-d3}, d10 :: Qd 0xcccccccc 0xcccccccc Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d1-d3}, d10 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d29-d31}, d1 :: Qd 0xcacacaca 0xcacacaca Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d29-d31}, d1 :: Qd 0x15151515 0x15151515 Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d24}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d24}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d24}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d24}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d24}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d24}, d1 :: Qd 0x1b1b1b1b 0x1b1b1b1b Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d24}, d1 :: Qd 0xcdcdcdcd 0xcdcdcdcd Qm (i8)0x00000010 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d24}, d1 :: Qd 0x1c1c1c1c 0x1c1c1c1c Qm (i8)0x00000010 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d24}, d1 :: Qd 0xcccccccc 0xcccccccc Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d24}, d1 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d4}, d31 :: Qd 0xa212cc78 0xa212cc78 Qm (i32)0x0a031504 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d4}, d31 :: Qd 0xa212191b 0xa212191b Qm (i32)0x0a031504 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d4}, d31 :: Qd 0xa4a25656 0xa4a25656 Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d4}, d31 :: Qd 0xa4a21a1e 0xa4a21a1e Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d4}, d31 :: Qd 0xcaa255a1 0xcaa255a1 Qm (i32)0x170efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d4}, d31 :: Qd 0x15a255a1 0x15a255a1 Qm (i32)0x170efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d4}, d31 :: Qd 0xa3caa1cc 0xa3caa1cc Qm (i32)0x0d130f11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d4}, d31 :: Qd 0xa314a11f 0xa314a11f Qm (i32)0x0d130f11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d4}, d31 :: Qd 0x12a1cccc 0x12a1cccc Qm (i32)0x070f1511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d4}, d31 :: Qd 0x13a1191f 0x13a1191f Qm (i32)0x070f1511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d2-d5}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d2-d5}, d1 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d0, {d1-d4}, d10 :: Qd 0xcccccccc 0xcccccccc Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d1-d4}, d10 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d0, {d28-d31}, d1 :: Qd 0xcacacaca 0xcacacaca Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d28-d31}, d1 :: Qd 0x15151515 0x15151515 Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d22-d25}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d0, {d22-d25}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d0, {d22-d25}, d1 :: Qd 0xfdfdfdfd 0xfdfdfdfd Qm (i8)0x0000001a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d22-d25}, d1 :: Qd 0xfdfdfdfd 0xfdfdfdfd Qm (i8)0x0000001a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d0, {d22-d25}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d22-d25}, d1 :: Qd 0x1b1b1b1b 0x1b1b1b1b Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d0, {d22-d25}, d1 :: Qd 0xcbcbcbcb 0xcbcbcbcb Qm (i8)0x00000016 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d22-d25}, d1 :: Qd 0x1d1d1d1d 0x1d1d1d1d Qm (i8)0x00000016 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d22-d25}, d1 :: Qd 0xfefefefe 0xfefefefe Qm (i8)0x0000001f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d0, {d22-d25}, d1 :: Qd 0xfefefefe 0xfefefefe Qm (i8)0x0000001f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d30, {d2-d5}, d31 :: Qd 0xfd12cc55 0xfd12cc55 Qm (i32)0x1a0315ff Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d30, {d2-d5}, d31 :: Qd 0xfd121955 0xfd121955 Qm (i32)0x1a0315ff Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d30, {d2-d5}, d31 :: Qd 0xa4a25656 0xa4a25656 Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d30, {d2-d5}, d31 :: Qd 0xa4a21a1e 0xa4a21a1e Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d30, {d2-d5}, d31 :: Qd 0xcafd55a1 0xcafd55a1 Qm (i32)0x171efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d30, {d2-d5}, d31 :: Qd 0x15fd55a1 0x15fd55a1 Qm (i32)0x171efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d30, {d2-d5}, d31 :: Qd 0xfccaa1fd 0xfccaa1fd Qm (i32)0x1d130f1a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d30, {d2-d5}, d31 :: Qd 0xfc14a1fd 0xfc14a1fd Qm (i32)0x1d130f1a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d30, {d2-d5}, d31 :: Qd 0xcacdfbcc 0xcacdfbcc Qm (i32)0x17101c11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d30, {d2-d5}, d31 :: Qd 0x151cfb1f 0x151cfb1f Qm (i32)0x17101c11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
---- VPMAX (integer) ----
vpmax.s32 d0, d1, d2 :: Qd 0x00000079 0x00000019 Qm (i32)0x00000019 Qn (i32)0x00000079
+vpmax.s32 d0, d1, d2 :: Qd 0x00000079 0x131b1a1b Qm (i32)0x00000019 Qn (i32)0x00000079
vpmax.s32 d0, d1, d2 :: Qd 0x00000079 0x000000fa Qm (i32)0x000000fa Qn (i32)0x00000079
+vpmax.s32 d0, d1, d2 :: Qd 0x00000079 0x131b1a1b Qm (i32)0x000000fa Qn (i32)0x00000079
vpmax.s32 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
+vpmax.s32 d0, d1, d2 :: Qd 0x0000008c 0x131b1a1b Qm (i32)0x0000008c Qn (i32)0x0000008c
vpmax.s16 d0, d1, d2 :: Qd 0x00780078 0x01400140 Qm (i32)0x01200140 Qn (i32)0x00000078
+vpmax.s16 d0, d1, d2 :: Qd 0x00780078 0x1a1b1e1f Qm (i32)0x01200140 Qn (i32)0x00000078
vpmax.s8 d0, d1, d2 :: Qd 0x00780078 0x00780078 Qm (i32)0x00000078 Qn (i32)0x00000078
+vpmax.s8 d0, d1, d2 :: Qd 0x00780078 0x1b1b1f1f Qm (i32)0x00000078 Qn (i32)0x00000078
vpmax.s8 d5, d7, d5 :: Qd 0x00020002 0x00010001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmax.s8 d5, d7, d5 :: Qd 0x00020002 0x1b1b1f1f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmax.s16 d0, d1, d2 :: Qd 0x00020002 0x00010001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmax.s16 d0, d1, d2 :: Qd 0x00020002 0x1a1b1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmax.s32 d0, d1, d2 :: Qd 0x80000002 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmax.s32 d0, d1, d2 :: Qd 0x80000002 0x131b1a1b Qm (i32)0x80000001 Qn (i32)0x80000002
vpmax.s8 d5, d7, d5 :: Qd 0x00030003 0x00010001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmax.s8 d5, d7, d5 :: Qd 0x00030003 0x1b1b1f1f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmax.s16 d0, d1, d2 :: Qd 0x00030003 0x00010001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmax.s16 d0, d1, d2 :: Qd 0x00030003 0x1a1b1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmax.s32 d0, d1, d2 :: Qd 0x80000003 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmax.s32 d0, d1, d2 :: Qd 0x80000003 0x131b1a1b Qm (i32)0x80000001 Qn (i32)0x80000003
vpmax.s8 d5, d7, d5 :: Qd 0x00020002 0x00040004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmax.s8 d5, d7, d5 :: Qd 0x00020002 0x1b1b1f1f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmax.s16 d0, d1, d2 :: Qd 0x00020002 0x00040004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmax.s16 d0, d1, d2 :: Qd 0x00020002 0x1a1b1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmax.s32 d0, d1, d2 :: Qd 0x80000002 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmax.s32 d0, d1, d2 :: Qd 0x80000002 0x131b1a1b Qm (i32)0x80000004 Qn (i32)0x80000002
vpmax.s32 d10, d11, d12 :: Qd 0x00000078 0x00000018 Qm (i32)0x00000018 Qn (i32)0x00000078
+vpmax.s32 d10, d11, d12 :: Qd 0x00000078 0x131b1a1b Qm (i32)0x00000018 Qn (i32)0x00000078
vpmax.u32 d0, d1, d2 :: Qd 0x00000078 0x00000019 Qm (i32)0x00000019 Qn (i32)0x00000078
+vpmax.u32 d0, d1, d2 :: Qd 0x00000078 0x131b1a1b Qm (i32)0x00000019 Qn (i32)0x00000078
vpmax.u32 d0, d1, d2 :: Qd 0x00000078 0x000000fa Qm (i32)0x000000fa Qn (i32)0x00000078
+vpmax.u32 d0, d1, d2 :: Qd 0x00000078 0x131b1a1b Qm (i32)0x000000fa Qn (i32)0x00000078
vpmax.u32 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
+vpmax.u32 d0, d1, d2 :: Qd 0x0000008c 0x131b1a1b Qm (i32)0x0000008c Qn (i32)0x0000008c
vpmax.u16 d0, d1, d2 :: Qd 0x00780078 0x01400140 Qm (i32)0x01200140 Qn (i32)0x00000078
+vpmax.u16 d0, d1, d2 :: Qd 0x00780078 0x1a1b1e1f Qm (i32)0x01200140 Qn (i32)0x00000078
vpmax.u8 d0, d1, d2 :: Qd 0x00780078 0x20212021 Qm (i32)0x01202120 Qn (i32)0x00000078
+vpmax.u8 d0, d1, d2 :: Qd 0x00780078 0x1b1b1f1f Qm (i32)0x01202120 Qn (i32)0x00000078
vpmax.u8 d0, d1, d2 :: Qd 0x80028002 0x80018001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmax.u8 d0, d1, d2 :: Qd 0x80028002 0x1b1b1f1f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmax.u16 d0, d1, d2 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmax.u16 d0, d1, d2 :: Qd 0x80008000 0x1a1b1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmax.u32 d0, d1, d2 :: Qd 0x80000002 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmax.u32 d0, d1, d2 :: Qd 0x80000002 0x131b1a1b Qm (i32)0x80000001 Qn (i32)0x80000002
vpmax.u8 d0, d1, d2 :: Qd 0x80038003 0x80018001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmax.u8 d0, d1, d2 :: Qd 0x80038003 0x1b1b1f1f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmax.u16 d0, d1, d2 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmax.u16 d0, d1, d2 :: Qd 0x80008000 0x1a1b1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmax.u32 d0, d1, d2 :: Qd 0x80000003 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmax.u32 d0, d1, d2 :: Qd 0x80000003 0x131b1a1b Qm (i32)0x80000001 Qn (i32)0x80000003
vpmax.u8 d0, d1, d2 :: Qd 0x80028002 0x80048004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmax.u8 d0, d1, d2 :: Qd 0x80028002 0x1b1b1f1f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmax.u16 d0, d1, d2 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmax.u16 d0, d1, d2 :: Qd 0x80008000 0x1a1b1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmax.u32 d0, d1, d2 :: Qd 0x80000002 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmax.u32 d0, d1, d2 :: Qd 0x80000002 0x131b1a1b Qm (i32)0x80000004 Qn (i32)0x80000002
vpmax.u32 d10, d11, d12 :: Qd 0x00000078 0x00000018 Qm (i32)0x00000018 Qn (i32)0x00000078
+vpmax.u32 d10, d11, d12 :: Qd 0x00000078 0x131b1a1b Qm (i32)0x00000018 Qn (i32)0x00000078
---- VPMIN (integer) ----
vpmin.s32 d0, d1, d2 :: Qd 0x00000079 0x00000019 Qm (i32)0x00000019 Qn (i32)0x00000079
+vpmin.s32 d0, d1, d2 :: Qd 0x00000079 0x121f1e1f Qm (i32)0x00000019 Qn (i32)0x00000079
vpmin.s32 d0, d1, d2 :: Qd 0x00000079 0x000000fa Qm (i32)0x000000fa Qn (i32)0x00000079
+vpmin.s32 d0, d1, d2 :: Qd 0x00000079 0x121f1e1f Qm (i32)0x000000fa Qn (i32)0x00000079
vpmin.s32 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
+vpmin.s32 d0, d1, d2 :: Qd 0x0000008c 0x121f1e1f Qm (i32)0x0000008c Qn (i32)0x0000008c
vpmin.s16 d0, d1, d2 :: Qd 0x00000000 0x01200120 Qm (i32)0x01200140 Qn (i32)0x00000078
+vpmin.s16 d0, d1, d2 :: Qd 0x00000000 0x131b121f Qm (i32)0x01200140 Qn (i32)0x00000078
vpmin.s8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
+vpmin.s8 d0, d1, d2 :: Qd 0x00000000 0x131a121e Qm (i32)0x00000078 Qn (i32)0x00000078
vpmin.s8 d5, d7, d5 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmin.s8 d5, d7, d5 :: Qd 0x80008000 0x131a121e Qm (i32)0x80000001 Qn (i32)0x80000002
vpmin.s16 d0, d1, d2 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmin.s16 d0, d1, d2 :: Qd 0x80008000 0x131b121f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmin.s32 d0, d1, d2 :: Qd 0x80000002 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmin.s32 d0, d1, d2 :: Qd 0x80000002 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmin.s8 d5, d7, d5 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmin.s8 d5, d7, d5 :: Qd 0x80008000 0x131a121e Qm (i32)0x80000001 Qn (i32)0x80000003
vpmin.s16 d0, d1, d2 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmin.s16 d0, d1, d2 :: Qd 0x80008000 0x131b121f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmin.s32 d0, d1, d2 :: Qd 0x80000003 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmin.s32 d0, d1, d2 :: Qd 0x80000003 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmin.s8 d5, d7, d5 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmin.s8 d5, d7, d5 :: Qd 0x80008000 0x131a121e Qm (i32)0x80000004 Qn (i32)0x80000002
vpmin.s16 d0, d1, d2 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmin.s16 d0, d1, d2 :: Qd 0x80008000 0x131b121f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmin.s32 d0, d1, d2 :: Qd 0x80000002 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmin.s32 d0, d1, d2 :: Qd 0x80000002 0x121f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmin.s32 d10, d11, d12 :: Qd 0x00000078 0x00000018 Qm (i32)0x00000018 Qn (i32)0x00000078
+vpmin.s32 d10, d11, d12 :: Qd 0x00000078 0x121f1e1f Qm (i32)0x00000018 Qn (i32)0x00000078
vpmin.u32 d0, d1, d2 :: Qd 0x00000078 0x00000019 Qm (i32)0x00000019 Qn (i32)0x00000078
+vpmin.u32 d0, d1, d2 :: Qd 0x00000078 0x121f1e1f Qm (i32)0x00000019 Qn (i32)0x00000078
vpmin.u32 d0, d1, d2 :: Qd 0x00000078 0x000000fa Qm (i32)0x000000fa Qn (i32)0x00000078
+vpmin.u32 d0, d1, d2 :: Qd 0x00000078 0x121f1e1f Qm (i32)0x000000fa Qn (i32)0x00000078
vpmin.u32 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
+vpmin.u32 d0, d1, d2 :: Qd 0x0000008c 0x121f1e1f Qm (i32)0x0000008c Qn (i32)0x0000008c
vpmin.u16 d0, d1, d2 :: Qd 0x00000000 0x01200120 Qm (i32)0x01200140 Qn (i32)0x00000078
+vpmin.u16 d0, d1, d2 :: Qd 0x00000000 0x131b121f Qm (i32)0x01200140 Qn (i32)0x00000078
vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x01200120 Qm (i32)0x01202120 Qn (i32)0x00000078
+vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x131a121e Qm (i32)0x01202120 Qn (i32)0x00000078
vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x131a121e Qm (i32)0x80000001 Qn (i32)0x80000002
vpmin.u16 d0, d1, d2 :: Qd 0x00020002 0x00010001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmin.u16 d0, d1, d2 :: Qd 0x00020002 0x131b121f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmin.u32 d0, d1, d2 :: Qd 0x80000002 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmin.u32 d0, d1, d2 :: Qd 0x80000002 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x131a121e Qm (i32)0x80000001 Qn (i32)0x80000003
vpmin.u16 d0, d1, d2 :: Qd 0x00030003 0x00010001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmin.u16 d0, d1, d2 :: Qd 0x00030003 0x131b121f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmin.u32 d0, d1, d2 :: Qd 0x80000003 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmin.u32 d0, d1, d2 :: Qd 0x80000003 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x131a121e Qm (i32)0x80000004 Qn (i32)0x80000002
vpmin.u16 d0, d1, d2 :: Qd 0x00020002 0x00040004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmin.u16 d0, d1, d2 :: Qd 0x00020002 0x131b121f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmin.u32 d0, d1, d2 :: Qd 0x80000002 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmin.u32 d0, d1, d2 :: Qd 0x80000002 0x121f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmin.u32 d10, d11, d12 :: Qd 0x00000078 0x00000018 Qm (i32)0x00000018 Qn (i32)0x00000078
+vpmin.u32 d10, d11, d12 :: Qd 0x00000078 0x121f1e1f Qm (i32)0x00000018 Qn (i32)0x00000078
---- VQRDMULH ----
vqrdmulh.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 d0, d1, d2 :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 d6, d7, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqrdmulh.s32 d6, d7, d8 :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqrdmulh.s16 d9, d11, d12 :: Qd 0x00000003 0x00000003 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqrdmulh.s16 d9, d11, d12 :: Qd 0x0000003b 0x00000044 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqrdmulh.s16 d4, d5, d6 :: Qd 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 d4, d5, d6 :: Qd 0x00000687 0x00000788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 d7, d8, d9 :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 d7, d8, d9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s16 d4, d5, d6 :: Qd 0x0000e50b 0x0000e50b Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 d4, d5, d6 :: Qd 0x00000687 0x00000788 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 d7, d8, d9 :: Qd 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqrdmulh.s32 d7, d8, d9 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqrdmulh.s16 d4, d5, d6 :: Qd 0x00000040 0x00000040 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 d4, d5, d6 :: Qd 0x00000687 0x00000788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 d7, d8, d9 :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 d7, d8, d9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s32 d10, d11, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 d10, d11, d15 :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 d10, d30, d31 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqrdmulh.s32 d10, d30, d31 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s16 d10, d30, d31 :: Qd 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 08000000
+vqrdmulh.s16 d10, d30, d31 :: Qd 0xece50000 0xede10000 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 00000000
vqrdmulh.s32 d10, d30, d31 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 d10, d30, d31 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s16 d10, d30, d31 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqrdmulh.s16 d10, d30, d31 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQRDMULH (by scalar) ----
vqrdmulh.s32 d0, d1, d6[0] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 d0, d1, d6[0] :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 d6, d7, d1[1] :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqrdmulh.s32 d6, d7, d1[1] :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqrdmulh.s16 d9, d11, d7[0] :: Qd 0x00000003 0x00000003 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqrdmulh.s16 d9, d11, d7[0] :: Qd 0x002b003b 0x00290044 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqrdmulh.s16 d4, d5, d6[0] :: Qd 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 d4, d5, d6[0] :: Qd 0x04c70687 0x04880788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 d7, d8, d9[1] :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 d7, d8, d9[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s16 d4, d5, d6[1] :: Qd 0x0000e50b 0x0000e50b Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqrdmulh.s16 d4, d5, d6[1] :: Qd 0x04c70687 0x04880788 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
vqrdmulh.s32 d7, d8, d9[0] :: Qd 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqrdmulh.s32 d7, d8, d9[0] :: Qd 0x00000002 0x00000002 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqrdmulh.s16 d4, d5, d6[2] :: Qd 0x04000040 0x04000040 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 d4, d5, d6[2] :: Qd 0x04c70687 0x04880788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 d7, d8, d9[0] :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 d7, d8, d9[0] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s32 d10, d31, d15[0] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 d10, d31, d15[0] :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 d10, d14, d15[1] :: Qd 0xffffff88 0xffffff88 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 d10, d14, d15[1] :: Qd 0x00000012 0x00000011 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s16 d10, d14, d7[3] :: Qd 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 08000000
+vqrdmulh.s16 d10, d14, d7[3] :: Qd 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 00000000
vqrdmulh.s32 d10, d14, d15[1] :: Qd 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 d10, d14, d15[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s16 d31, d14, d7[1] :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqrdmulh.s16 d31, d14, d7[1] :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VADD (fp) ----
vadd.f32 d0, d5, d2 :: Qd 0xc1b43ac6 0xc1b43ac6 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vadd.f32 d0, d5, d2 :: Qd 0xc2364659 0xc2364659 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vadd.f32 d3, d4, d5 :: Qd 0xc8a931cf 0xc8a931cf Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vadd.f32 d3, d4, d5 :: Qd 0x44a84000 0x44a84000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vadd.f32 d10, d11, d2 :: Qd 0x45398860 0x45398860 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vadd.f32 d10, d11, d2 :: Qd 0xc732da7a 0xc732da7a Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vadd.f32 d9, d5, d7 :: Qd 0x47dc9261 0x47dc9261 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vadd.f32 d9, d5, d7 :: Qd 0x46855200 0x46855200 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vadd.f32 d0, d5, d2 :: Qd 0xc88faac0 0xc88faac0 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vadd.f32 d0, d5, d2 :: Qd 0xc872bcb1 0xc872bcb1 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vadd.f32 d3, d4, d5 :: Qd 0x44ab5c08 0x44ab5c08 Qm (i32)0x41c70126 Qn (i32)0x44a84003
+vadd.f32 d3, d4, d5 :: Qd 0x44a84003 0x44a84003 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vadd.f32 d10, d11, d2 :: Qd 0x4742b4e6 0x4742b4e6 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vadd.f32 d10, d11, d2 :: Qd 0x44882666 0x44882666 Qm (i32)0x473e73b3 Qn (i32)0x44882666
vadd.f32 d9, d5, d7 :: Qd 0x49d5e6b8 0x49d5e6b8 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vadd.f32 d9, d5, d7 :: Qd 0x49d5e008 0x49d5e008 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vadd.f32 d0, d11, d12 :: Qd 0x48b0b752 0x48b0b752 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vadd.f32 d0, d11, d12 :: Qd 0x45b75812 0x45b75812 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vadd.f32 d7, d1, d6 :: Qd 0x420802fd 0x420802fd Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vadd.f32 d7, d1, d6 :: Qd 0x3b210e02 0x3b210e02 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vadd.f32 d0, d1, d2 :: Qd 0x4532d000 0x4532d000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vadd.f32 d0, d1, d2 :: Qd 0x42d60000 0x42d60000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vadd.f32 d3, d4, d5 :: Qd 0x450d299a 0x450d299a Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vadd.f32 d3, d4, d5 :: Qd 0x44ad1333 0x44ad1333 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vadd.f32 d10, d11, d2 :: Qd 0x44152592 0x44152592 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vadd.f32 d10, d11, d2 :: Qd 0x42da0000 0x42da0000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vadd.f32 d9, d5, d7 :: Qd 0x4573a000 0x4573a000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vadd.f32 d9, d5, d7 :: Qd 0x44db0000 0x44db0000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vadd.f32 d0, d11, d12 :: Qd 0xc5b695c3 0xc5b695c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vadd.f32 d0, d11, d12 :: Qd 0xc5b4d3c3 0xc5b4d3c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vadd.f32 d7, d1, d6 :: Qd 0x43e07a2a 0x43e07a2a Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vadd.f32 d7, d1, d6 :: Qd 0xc0e96d19 0xc0e96d19 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vadd.f32 d0, d5, d2 :: Qd 0x44053ee0 0x44053ee0 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vadd.f32 d0, d5, d2 :: Qd 0xbb965394 0xbb965394 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vadd.f32 d10, d13, d15 :: Qd 0xc4838fb4 0xc4838fb4 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vadd.f32 d10, d13, d15 :: Qd 0xc40dcfae 0xc40dcfae Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vadd.f32 d10, d13, d15 :: Qd 0x488c3d8e 0x488c3d8e Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vadd.f32 d10, d13, d15 :: Qd 0x4608d008 0x4608d008 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vadd.f32 d0, d1, d2 :: Qd 0x4efa8dc5 0x4efa8dc5 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vadd.f32 d0, d1, d2 :: Qd 0x4e920233 0x4e920233 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vadd.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vadd.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x00000000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vadd.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vadd.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vadd.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vadd.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x00000000
vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
+vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vadd.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vadd.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x00000000
+vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vadd.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vadd.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x00000000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VSUB (fp) ----
vsub.f32 d0, d5, d2 :: Qd 0x428937a8 0x428937a8 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vsub.f32 d0, d5, d2 :: Qd 0x42364659 0x42364659 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vsub.f32 d3, d4, d5 :: Qd 0xc8aa824f 0xc8aa824f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vsub.f32 d3, d4, d5 :: Qd 0xc4a84000 0xc4a84000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vsub.f32 d10, d11, d2 :: Qd 0x47b8a6bd 0x47b8a6bd Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vsub.f32 d10, d11, d2 :: Qd 0x4732da7a 0x4732da7a Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vsub.f32 d9, d5, d7 :: Qd 0x4799e961 0x4799e961 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vsub.f32 d9, d5, d7 :: Qd 0xc6855200 0xc6855200 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vsub.f32 d0, d5, d2 :: Qd 0x484623e2 0x484623e2 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vsub.f32 d0, d5, d2 :: Qd 0x4872bcb1 0x4872bcb1 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vsub.f32 d3, d4, d5 :: Qd 0xc4a54000 0xc4a54000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vsub.f32 d3, d4, d5 :: Qd 0xc4a84000 0xc4a84000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vsub.f32 d10, d11, d2 :: Qd 0x473a3200 0x473a3200 Qm (i32)0x473e7300 Qn (i32)0x44882000
+vsub.f32 d10, d11, d2 :: Qd 0xc4882000 0xc4882000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vsub.f32 d9, d5, d7 :: Qd 0xc9d5d958 0xc9d5d958 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vsub.f32 d9, d5, d7 :: Qd 0xc9d5e008 0xc9d5e008 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vsub.f32 d0, d11, d12 :: Qd 0x48aafc92 0x48aafc92 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vsub.f32 d0, d11, d12 :: Qd 0xc5b75812 0xc5b75812 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vsub.f32 d7, d1, d6 :: Qd 0x4207fdf5 0x4207fdf5 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vsub.f32 d7, d1, d6 :: Qd 0xbb210e02 0xbb210e02 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vsub.f32 d0, d1, d2 :: Qd 0x45257000 0x45257000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vsub.f32 d0, d1, d2 :: Qd 0xc2d60000 0xc2d60000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vsub.f32 d3, d4, d5 :: Qd 0xc3ff4ccc 0xc3ff4ccc Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vsub.f32 d3, d4, d5 :: Qd 0xc4ad1333 0xc4ad1333 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vsub.f32 d10, d11, d2 :: Qd 0x43bd4b23 0x43bd4b23 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vsub.f32 d10, d11, d2 :: Qd 0xc2da0000 0xc2da0000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vsub.f32 d9, d5, d7 :: Qd 0x43c50000 0x43c50000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vsub.f32 d9, d5, d7 :: Qd 0xc4db0000 0xc4db0000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vsub.f32 d0, d11, d12 :: Qd 0x45b311c3 0x45b311c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vsub.f32 d0, d11, d12 :: Qd 0x45b4d3c3 0x45b4d3c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vsub.f32 d7, d1, d6 :: Qd 0x43e7c592 0x43e7c592 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vsub.f32 d7, d1, d6 :: Qd 0x40e96d19 0x40e96d19 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vsub.f32 d0, d5, d2 :: Qd 0x44053f76 0x44053f76 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vsub.f32 d0, d5, d2 :: Qd 0x3b965394 0x3b965394 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vsub.f32 d10, d13, d15 :: Qd 0x42a3ffa4 0x42a3ffa4 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vsub.f32 d10, d13, d15 :: Qd 0x440dcfae 0x440dcfae Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vsub.f32 d10, d13, d15 :: Qd 0x4883b08e 0x4883b08e Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vsub.f32 d10, d13, d15 :: Qd 0xc608d008 0xc608d008 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vsub.f32 d0, d1, d2 :: Qd 0xcda5da84 0xcda5da84 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vsub.f32 d0, d1, d2 :: Qd 0xce920233 0xce920233 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vsub.f32 d0, d1, d2 :: Qd 0xbf800000 0xbf800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vsub.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x00000000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0xbf800000 0xbf800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vsub.f32 d0, d1, d2 :: Qd 0xbf800000 0xbf800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vsub.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vsub.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x00000000
+vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vsub.f32 d0, d1, d2 :: Qd 0xbf800000 0xbf800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vsub.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x00000000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vsub.f32 d0, d1, d2 :: Qd 0xbf800000 0xbf800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vsub.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x00000000
+vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMUL (fp) ----
vmul.f32 d0, d5, d2 :: Qd 0xc4833ce4 0xc4833ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmul.f32 d0, d5, d2 :: Qd 0x95dcde5d 0x94e29647 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vmul.f32 d3, d4, d5 :: Qd 0xcddf4321 0xcddf4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vmul.f32 d3, d4, d5 :: Qd 0x184bdfd0 0x17512718 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmul.f32 d10, d11, d2 :: Qd 0xcf050e7f 0xcf050e7f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vmul.f32 d10, d11, d2 :: Qd 0x9ad8b90a 0x99de557a Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmul.f32 d9, d5, d7 :: Qd 0x4ec3063f 0x4ec3063f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmul.f32 d9, d5, d7 :: Qd 0x1a218c7d 0x1925bb3c Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vmul.f32 d0, d5, d2 :: Qd 0x5029254c 0x5029254c Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vmul.f32 d0, d5, d2 :: Qd 0x9c131100 0x9b16dfc1 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vmul.f32 d3, d4, d5 :: Qd 0x46fc6000 0x46fc6000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vmul.f32 d3, d4, d5 :: Qd 0x184bdfd0 0x17512718 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vmul.f32 d10, d11, d2 :: Qd 0x4c4a89cd 0x4c4a89cd Qm (i32)0x473e7300 Qn (i32)0x44882000
+vmul.f32 d10, d11, d2 :: Qd 0x1824f283 0x172937c8 Qm (i32)0x473e7300 Qn (i32)0x44882000
vmul.f32 d9, d5, d7 :: Qd 0x4db2c947 0x4db2c947 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vmul.f32 d9, d5, d7 :: Qd 0x1d819474 0x1c84ef4f Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmul.f32 d0, d11, d12 :: Qd 0x4ef90536 0x4ef90536 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vmul.f32 d0, d11, d12 :: Qd 0x195e2a0a 0x1863ea8b Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vmul.f32 d7, d1, d6 :: Qd 0x3dab1f7a 0x3dab1f7a Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vmul.f32 d7, d1, d6 :: Qd 0x0ec327cf 0x0dc8354d Qm (i32)0x42080079 Qn (i32)0x3b210e02
vmul.f32 d0, d1, d2 :: Qd 0x488fe2c0 0x488fe2c0 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmul.f32 d0, d1, d2 :: Qd 0x1681a7d3 0x1585032e Qm (i32)0x452c2000 Qn (i32)0x42d60000
vmul.f32 d3, d4, d5 :: Qd 0x4993b8e3 0x4993b8e3 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vmul.f32 d3, d4, d5 :: Qd 0x1851b88c 0x17572694 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmul.f32 d10, d11, d2 :: Qd 0x474f9afc 0x474f9afc Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vmul.f32 d10, d11, d2 :: Qd 0x1684143b 0x15877fa6 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vmul.f32 d9, d5, d7 :: Qd 0x4a657ac0 0x4a657ac0 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vmul.f32 d9, d5, d7 :: Qd 0x1884af55 0x17881ec5 Qm (i32)0x45062000 Qn (i32)0x44db0000
vmul.f32 d0, d11, d12 :: Qd 0x489eee1e 0x489eee1e Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmul.f32 d0, d11, d12 :: Qd 0x995b1d4f 0x9860c99a Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vmul.f32 d7, d1, d6 :: Qd 0xc5500239 0xc5500239 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vmul.f32 d7, d1, d6 :: Qd 0x948d6cdc 0x9391163a Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmul.f32 d0, d5, d2 :: Qd 0xc01c7d07 0xc01c7d07 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmul.f32 d0, d5, d2 :: Qd 0x8f3627de 0x8e3adf32 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vmul.f32 d10, d13, d15 :: Qd 0x488666a6 0x488666a6 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vmul.f32 d10, d13, d15 :: Qd 0x97abd669 0x96b04959 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmul.f32 d10, d13, d15 :: Qd 0x4f115379 0x4f115379 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmul.f32 d10, d13, d15 :: Qd 0x19a5c7d1 0x18aa129c Qm (i32)0x4887f70e Qn (i32)0x4608d008
vmul.f32 d0, d1, d2 :: Qd 0x5d6e81fd 0x5d6e81fd Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmul.f32 d0, d1, d2 :: Qd 0x2230ec71 0x21358117 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmul.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmul.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmul.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmul.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmul.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmul.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmul.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmul.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x3f800000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmul.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLA (fp) ----
vmla.f32 d0, d5, d2 :: Qd 0xc4831ce4 0xc4831ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmla.f32 d0, d5, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vmla.f32 d3, d4, d5 :: Qd 0xcddf4321 0xcddf4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vmla.f32 d3, d4, d5 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmla.f32 d10, d11, d2 :: Qd 0xcf050e7f 0xcf050e7f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vmla.f32 d10, d11, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmla.f32 d9, d5, d7 :: Qd 0x4ec3063f 0x4ec3063f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmla.f32 d9, d5, d7 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vmla.f32 d0, d5, d2 :: Qd 0x5029254c 0x5029254c Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vmla.f32 d0, d5, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vmla.f32 d3, d4, d5 :: Qd 0x46fc6200 0x46fc6200 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vmla.f32 d3, d4, d5 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vmla.f32 d10, d11, d2 :: Qd 0x4c4a89cd 0x4c4a89cd Qm (i32)0x473e7300 Qn (i32)0x44882000
+vmla.f32 d10, d11, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vmla.f32 d9, d5, d7 :: Qd 0x4db2c947 0x4db2c947 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vmla.f32 d9, d5, d7 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmla.f32 d0, d11, d12 :: Qd 0x4ef90536 0x4ef90536 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vmla.f32 d0, d11, d12 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vmla.f32 d7, d1, d6 :: Qd 0x3f8ab1f8 0x3f8ab1f8 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vmla.f32 d7, d1, d6 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vmla.f32 d0, d1, d2 :: Qd 0x488fe2e0 0x488fe2e0 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vmla.f32 d3, d4, d5 :: Qd 0x4993b8eb 0x4993b8eb Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vmla.f32 d3, d4, d5 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmla.f32 d10, d11, d2 :: Qd 0x474f9bfc 0x474f9bfc Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vmla.f32 d10, d11, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vmla.f32 d9, d5, d7 :: Qd 0x4a657ac4 0x4a657ac4 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vmla.f32 d9, d5, d7 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vmla.f32 d0, d11, d12 :: Qd 0x489eee3e 0x489eee3e Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmla.f32 d0, d11, d12 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vmla.f32 d7, d1, d6 :: Qd 0xc54ff239 0xc54ff239 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vmla.f32 d7, d1, d6 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmla.f32 d0, d5, d2 :: Qd 0xbfb8fa0e 0xbfb8fa0e Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmla.f32 d0, d5, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vmla.f32 d10, d13, d15 :: Qd 0x488666c6 0x488666c6 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vmla.f32 d10, d13, d15 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmla.f32 d10, d13, d15 :: Qd 0x4f115379 0x4f115379 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmla.f32 d10, d13, d15 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vmla.f32 d0, d1, d2 :: Qd 0x5d6e81fd 0x5d6e81fd Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmla.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmla.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmla.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLA (fp by scalar) ----
vmla.f32 d0, d1, d4[0] :: Qd 0x45341000 0x45341000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
+vmla.f32 d0, d1, d4[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
vmla.f32 d31, d8, d7[1] :: Qd 0xc6833e00 0xc6833e00 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
+vmla.f32 d31, d8, d7[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
+vmla.f32 d4, d8, d15[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 d4, d8, d15[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 d7, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmla.f32 d7, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmla.f32 d17, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 d17, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 d7, d8, d1[0] :: Qd 0x447a3fff 0x447a3fff Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
+vmla.f32 d7, d8, d1[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
vmla.f32 d7, d24, d1[0] :: Qd 0x65a96816 0x65a96816 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmla.f32 d7, d24, d1[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLS (fp) ----
vmls.f32 d0, d5, d2 :: Qd 0x44835ce4 0x44835ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmls.f32 d0, d5, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vmls.f32 d3, d4, d5 :: Qd 0x4ddf4321 0x4ddf4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vmls.f32 d3, d4, d5 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmls.f32 d10, d11, d2 :: Qd 0x4f050e7f 0x4f050e7f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vmls.f32 d10, d11, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmls.f32 d9, d5, d7 :: Qd 0xcec3063f 0xcec3063f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmls.f32 d9, d5, d7 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vmls.f32 d0, d5, d2 :: Qd 0xd029254c 0xd029254c Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vmls.f32 d0, d5, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vmls.f32 d3, d4, d5 :: Qd 0xc6fc5e00 0xc6fc5e00 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vmls.f32 d3, d4, d5 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vmls.f32 d10, d11, d2 :: Qd 0xcc4a89cd 0xcc4a89cd Qm (i32)0x473e7300 Qn (i32)0x44882000
+vmls.f32 d10, d11, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vmls.f32 d9, d5, d7 :: Qd 0xcdb2c947 0xcdb2c947 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vmls.f32 d9, d5, d7 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmls.f32 d0, d11, d12 :: Qd 0xcef90536 0xcef90536 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vmls.f32 d0, d11, d12 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vmls.f32 d7, d1, d6 :: Qd 0x3f6a9c11 0x3f6a9c11 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vmls.f32 d7, d1, d6 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vmls.f32 d0, d1, d2 :: Qd 0xc88fe2a0 0xc88fe2a0 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vmls.f32 d3, d4, d5 :: Qd 0xc993b8db 0xc993b8db Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vmls.f32 d3, d4, d5 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmls.f32 d10, d11, d2 :: Qd 0xc74f99fc 0xc74f99fc Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vmls.f32 d10, d11, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vmls.f32 d9, d5, d7 :: Qd 0xca657abc 0xca657abc Qm (i32)0x45062000 Qn (i32)0x44db0000
+vmls.f32 d9, d5, d7 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vmls.f32 d0, d11, d12 :: Qd 0xc89eedfe 0xc89eedfe Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmls.f32 d0, d11, d12 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vmls.f32 d7, d1, d6 :: Qd 0x45501239 0x45501239 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vmls.f32 d7, d1, d6 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmls.f32 d0, d5, d2 :: Qd 0x405c7d07 0x405c7d07 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmls.f32 d0, d5, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vmls.f32 d10, d13, d15 :: Qd 0xc8866686 0xc8866686 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vmls.f32 d10, d13, d15 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmls.f32 d10, d13, d15 :: Qd 0xcf115379 0xcf115379 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmls.f32 d10, d13, d15 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vmls.f32 d0, d1, d2 :: Qd 0xdd6e81fd 0xdd6e81fd Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLS (fp by scalar) ----
vmls.f32 d0, d1, d4[0] :: Qd 0xc533f000 0xc533f000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
+vmls.f32 d0, d1, d4[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
vmls.f32 d31, d8, d7[1] :: Qd 0x46834200 0x46834200 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
+vmls.f32 d31, d8, d7[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
vmls.f32 d4, d8, d15[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmls.f32 d4, d8, d15[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmls.f32 d7, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
vmls.f32 d7, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
vmls.f32 d17, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmls.f32 d17, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.f32 d7, d8, d1[0] :: Qd 0xc479bfff 0xc479bfff Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
+vmls.f32 d7, d8, d1[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
vmls.f32 d7, d24, d1[0] :: Qd 0xe5a96816 0xe5a96816 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmls.f32 d7, d24, d1[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VABD (fp) ----
vabd.f32 d0, d5, d2 :: Qd 0x428937a8 0x428937a8 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vabd.f32 d0, d5, d2 :: Qd 0x42364659 0x42364659 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vabd.f32 d3, d4, d5 :: Qd 0x48aa824f 0x48aa824f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vabd.f32 d3, d4, d5 :: Qd 0x44a84000 0x44a84000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vabd.f32 d10, d11, d2 :: Qd 0x47b8a6bd 0x47b8a6bd Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vabd.f32 d10, d11, d2 :: Qd 0x4732da7a 0x4732da7a Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vabd.f32 d9, d5, d7 :: Qd 0x4799e961 0x4799e961 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vabd.f32 d9, d5, d7 :: Qd 0x46855200 0x46855200 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vabd.f32 d0, d5, d2 :: Qd 0x484623e2 0x484623e2 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vabd.f32 d0, d5, d2 :: Qd 0x4872bcb1 0x4872bcb1 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vabd.f32 d3, d4, d5 :: Qd 0x44a54000 0x44a54000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vabd.f32 d3, d4, d5 :: Qd 0x44a84000 0x44a84000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vabd.f32 d10, d11, d2 :: Qd 0x473a3200 0x473a3200 Qm (i32)0x473e7300 Qn (i32)0x44882000
+vabd.f32 d10, d11, d2 :: Qd 0x44882000 0x44882000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vabd.f32 d9, d5, d7 :: Qd 0x49d5d958 0x49d5d958 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vabd.f32 d9, d5, d7 :: Qd 0x49d5e008 0x49d5e008 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vabd.f32 d0, d11, d12 :: Qd 0x48aafc92 0x48aafc92 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vabd.f32 d0, d11, d12 :: Qd 0x45b75812 0x45b75812 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vabd.f32 d7, d1, d6 :: Qd 0x4207fdf5 0x4207fdf5 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vabd.f32 d7, d1, d6 :: Qd 0x3b210e02 0x3b210e02 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vabd.f32 d0, d1, d2 :: Qd 0x45257000 0x45257000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vabd.f32 d0, d1, d2 :: Qd 0x42d60000 0x42d60000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vabd.f32 d3, d4, d5 :: Qd 0x43ff4ccc 0x43ff4ccc Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vabd.f32 d3, d4, d5 :: Qd 0x44ad1333 0x44ad1333 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vabd.f32 d10, d11, d2 :: Qd 0x43bd4b23 0x43bd4b23 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vabd.f32 d10, d11, d2 :: Qd 0x42da0000 0x42da0000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vabd.f32 d9, d5, d7 :: Qd 0x43c50000 0x43c50000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vabd.f32 d9, d5, d7 :: Qd 0x44db0000 0x44db0000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vabd.f32 d0, d11, d12 :: Qd 0x45b311c3 0x45b311c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vabd.f32 d0, d11, d12 :: Qd 0x45b4d3c3 0x45b4d3c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vabd.f32 d7, d1, d6 :: Qd 0x43e7c592 0x43e7c592 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vabd.f32 d7, d1, d6 :: Qd 0x40e96d19 0x40e96d19 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vabd.f32 d0, d5, d2 :: Qd 0x44053f76 0x44053f76 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vabd.f32 d0, d5, d2 :: Qd 0x3b965394 0x3b965394 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vabd.f32 d10, d13, d15 :: Qd 0x42a3ffa4 0x42a3ffa4 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vabd.f32 d10, d13, d15 :: Qd 0x440dcfae 0x440dcfae Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vabd.f32 d10, d13, d15 :: Qd 0x4883b08e 0x4883b08e Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vabd.f32 d10, d13, d15 :: Qd 0x4608d008 0x4608d008 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vabd.f32 d0, d1, d2 :: Qd 0x4da5da84 0x4da5da84 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vabd.f32 d0, d1, d2 :: Qd 0x4e920233 0x4e920233 Qm (i32)0x4e511724 Qn (i32)0x4e920233
---- VPADD (fp) ----
vpadd.f32 d0, d5, d2 :: Qd 0xc2b64659 0x423851ec Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vpadd.f32 d0, d5, d2 :: Qd 0xc2b64659 0x1342e1a3 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vpadd.f32 d3, d4, d5 :: Qd 0x45284000 0xc929da0f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vpadd.f32 d3, d4, d5 :: Qd 0x45284000 0x1342e1a3 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vpadd.f32 d10, d11, d2 :: Qd 0xc7b2da7a 0x47be7300 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vpadd.f32 d10, d11, d2 :: Qd 0xc7b2da7a 0x1342e1a3 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vpadd.f32 d9, d5, d7 :: Qd 0x47055200 0x483b3de1 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vpadd.f32 d9, d5, d7 :: Qd 0x47055200 0x1342e1a3 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vpadd.f32 d0, d5, d2 :: Qd 0xc8f2bcb1 0xc7b2633d Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vpadd.f32 d0, d5, d2 :: Qd 0xc8f2bcb1 0x1342e1a3 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vpadd.f32 d3, d4, d5 :: Qd 0x45284000 0x42400000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vpadd.f32 d3, d4, d5 :: Qd 0x45284000 0x1342e1a3 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vpadd.f32 d10, d11, d2 :: Qd 0x45082000 0x47be7300 Qm (i32)0x473e7300 Qn (i32)0x44882000
+vpadd.f32 d10, d11, d2 :: Qd 0x45082000 0x1342e1a3 Qm (i32)0x473e7300 Qn (i32)0x44882000
vpadd.f32 d9, d5, d7 :: Qd 0x4a55e008 0x43d60000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vpadd.f32 d9, d5, d7 :: Qd 0x4a55e008 0x1342e1a3 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vpadd.f32 d0, d11, d12 :: Qd 0x46375812 0x492dd9f2 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vpadd.f32 d0, d11, d12 :: Qd 0x46375812 0x1342e1a3 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vpadd.f32 d7, d1, d6 :: Qd 0x3ba10e02 0x42880079 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vpadd.f32 d7, d1, d6 :: Qd 0x3ba10e02 0x1342e1a3 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vpadd.f32 d0, d1, d2 :: Qd 0x43560000 0x45ac2000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vpadd.f32 d0, d1, d2 :: Qd 0x43560000 0x1342e1a3 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vpadd.f32 d3, d4, d5 :: Qd 0x452d1333 0x44da8000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vpadd.f32 d3, d4, d5 :: Qd 0x452d1333 0x1342e1a3 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vpadd.f32 d10, d11, d2 :: Qd 0x435a0000 0x4473cb23 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vpadd.f32 d10, d11, d2 :: Qd 0x435a0000 0x1342e1a3 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vpadd.f32 d9, d5, d7 :: Qd 0x455b0000 0x45862000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vpadd.f32 d9, d5, d7 :: Qd 0x455b0000 0x1342e1a3 Qm (i32)0x45062000 Qn (i32)0x44db0000
vpadd.f32 d0, d11, d12 :: Qd 0xc634d3c3 0xc2e10000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vpadd.f32 d0, d11, d12 :: Qd 0xc634d3c3 0x1342e1a3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vpadd.f32 d7, d1, d6 :: Qd 0xc1696d19 0x44641fde Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vpadd.f32 d7, d1, d6 :: Qd 0xc1696d19 0x1342e1a3 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vpadd.f32 d0, d5, d2 :: Qd 0xbc165394 0x44853f2b Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vpadd.f32 d0, d5, d2 :: Qd 0xbc165394 0x1342e1a3 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vpadd.f32 d10, d13, d15 :: Qd 0xc48dcfae 0xc4729f73 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vpadd.f32 d10, d13, d15 :: Qd 0xc48dcfae 0x1342e1a3 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vpadd.f32 d10, d13, d15 :: Qd 0x4688d008 0x4907f70e Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vpadd.f32 d10, d13, d15 :: Qd 0x4688d008 0x1342e1a3 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vpadd.f32 d0, d1, d2 :: Qd 0x4f120233 0x4ed11724 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vpadd.f32 d0, d1, d2 :: Qd 0x4f120233 0x1342e1a3 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x1342e1a3 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0x1342e1a3 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0x1342e1a3 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x1342e1a3 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0x1342e1a3 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x1342e1a3 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0x1342e1a3 Qm (i32)0x00000000 Qn (i32)0x3f800000
vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0x1342e1a3 Qm (i32)0x00000000 Qn (i32)0x00000000
vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x1342e1a3 Qm (i32)0x00000000 Qn (i32)0x7f800000
vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0x1342e1a3 Qm (i32)0x00000000 Qn (i32)0xff800000
vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
+vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x1342e1a3 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0x1342e1a3 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0x1342e1a3 Qm (i32)0x7f800000 Qn (i32)0x00000000
vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x1342e1a3 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0x1342e1a3 Qm (i32)0x7f800000 Qn (i32)0xff800000
vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x1342e1a3 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0x1342e1a3 Qm (i32)0xff800000 Qn (i32)0x3f800000
vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0x1342e1a3 Qm (i32)0xff800000 Qn (i32)0x00000000
vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x1342e1a3 Qm (i32)0xff800000 Qn (i32)0x7f800000
vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0x1342e1a3 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VCVT (integer <-> fp) ----
vcvt.u32.f32 d0, d1 :: Qd 0x00000003 0x00000003 Qm (i32)0x404ccccd
+vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.u32.f32 d10, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
+vcvt.u32.f32 d10, d11 :: Qd 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.u32.f32 d15, d4 :: Qd 0xb2d05e00 0xb2d05e00 Qm (i32)0x4f32d05e
+vcvt.u32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0x4f32d05e
vcvt.u32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf000000
+vcvt.u32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf000000
+vcvt.u32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.u32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.u32.f32 d12, d8 :: Qd 0x00000007 0x00000007 Qm (i32)0x40fff800
+vcvt.u32.f32 d12, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0x40fff800
+vcvt.u32.f32 d12, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.u32.f32 d12, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.s32.f32 d0, d1 :: Qd 0x00000003 0x00000003 Qm (i32)0x404ccccd
+vcvt.s32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.s32.f32 d20, d21 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x64cb49b4
+vcvt.s32.f32 d20, d21 :: Qd 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.s32.f32 d15, d4 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x4f32d05e
+vcvt.s32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0x4f32d05e
+vcvt.s32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.s32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.s32.f32 d15, d4 :: Qd 0xfffffff9 0xfffffff9 Qm (i32)0xc0e33333
+vcvt.s32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.s32.f32 d12, d8 :: Qd 0x00000007 0x00000007 Qm (i32)0x40fff800
+vcvt.s32.f32 d12, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0x40fff800
vcvt.s32.f32 d12, d8 :: Qd 0xfffffff9 0xfffffff9 Qm (i32)0xc0fff800
+vcvt.s32.f32 d12, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.f32.u32 d0, d1 :: Qd 0x40e00000 0x40e00000 Qm (i32)0x00000007
+vcvt.f32.u32 d0, d1 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x00000007
vcvt.f32.u32 d10, d11 :: Qd 0x4f000000 0x4f000000 Qm (i32)0x80000000
+vcvt.f32.u32 d10, d11 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x80000000
vcvt.f32.u32 d0, d1 :: Qd 0x4f000000 0x4f000000 Qm (i32)0x80000001
+vcvt.f32.u32 d0, d1 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x80000001
vcvt.f32.u32 d24, d26 :: Qd 0x4f000000 0x4f000000 Qm (i32)0x7fffffff
+vcvt.f32.u32 d24, d26 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x7fffffff
vcvt.f32.u32 d0, d14 :: Qd 0x4e4282f4 0x4e4282f4 Qm (i32)0x30a0bcef
+vcvt.f32.u32 d0, d14 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x30a0bcef
vcvt.f32.s32 d0, d1 :: Qd 0x40e00000 0x40e00000 Qm (i32)0x00000007
+vcvt.f32.s32 d0, d1 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x00000007
vcvt.f32.s32 d30, d31 :: Qd 0xcf000000 0xcf000000 Qm (i32)0x80000000
+vcvt.f32.s32 d30, d31 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x80000000
vcvt.f32.s32 d0, d1 :: Qd 0xcf000000 0xcf000000 Qm (i32)0x80000001
+vcvt.f32.s32 d0, d1 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x80000001
vcvt.f32.s32 d0, d1 :: Qd 0x4f000000 0x4f000000 Qm (i32)0x7fffffff
+vcvt.f32.s32 d0, d1 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x7fffffff
vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.u32.f32 d0, d1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000
+vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
+vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
+vcvt.s32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.s32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.s32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcvt.s32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.s32.f32 d0, d1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x7f800000
+vcvt.s32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vcvt.s32.f32 d0, d1 :: Qd 0x80000000 0x80000000 Qm (i32)0xff800000
+vcvt.s32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
---- VCVT (fixed <-> fp) ----
vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000019 0x00000019 Qm (i32)0x404ccccd
+vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.u32.f32 d10, d11, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
+vcvt.u32.f32 d10, d11, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.u32.f32 d15, d4, #32 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
+vcvt.u32.f32 d15, d4, #32 :: Qd 0x00000000 0x00000000 Qm (i32)0x4f32d05e
+vcvt.u32.f32 d15, d4, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.u32.f32 d15, d4, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.u32.f32 d15, d4, #4 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0e33333
+vcvt.u32.f32 d15, d4, #4 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.u32.f32 d12, d8, #3 :: Qd 0x0000003f 0x0000003f Qm (i32)0x40fff800
+vcvt.u32.f32 d12, d8, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x40fff800
+vcvt.u32.f32 d12, d8, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.u32.f32 d12, d8, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.s32.f32 d0, d1, #5 :: Qd 0x00000066 0x00000066 Qm (i32)0x404ccccd
+vcvt.s32.f32 d0, d1, #5 :: Qd 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.s32.f32 d20, d21, #1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x64cb49b4
+vcvt.s32.f32 d20, d21, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.s32.f32 d15, d4, #8 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x4f32d05e
+vcvt.s32.f32 d15, d4, #8 :: Qd 0x00000000 0x00000000 Qm (i32)0x4f32d05e
vcvt.s32.f32 d15, d4, #2 :: Qd 0xfffffffe 0xfffffffe Qm (i32)0xbf000000
+vcvt.s32.f32 d15, d4, #2 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.s32.f32 d15, d4, #1 :: Qd 0xfffffff2 0xfffffff2 Qm (i32)0xc0e33333
+vcvt.s32.f32 d15, d4, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.s32.f32 d12, d8, #2 :: Qd 0x0000001f 0x0000001f Qm (i32)0x40fff800
+vcvt.s32.f32 d12, d8, #2 :: Qd 0x00000000 0x00000000 Qm (i32)0x40fff800
vcvt.s32.f32 d12, d8, #2 :: Qd 0xffffffe1 0xffffffe1 Qm (i32)0xc0fff800
+vcvt.s32.f32 d12, d8, #2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.f32.u32 d0, d1, #5 :: Qd 0x3e600000 0x3e600000 Qm (i32)0x00000007
+vcvt.f32.u32 d0, d1, #5 :: Qd 0x4b28e8c9 0x4b20e0f9 Qm (i32)0x00000007
vcvt.f32.u32 d10, d11, #9 :: Qd 0x4a800000 0x4a800000 Qm (i32)0x80000000
+vcvt.f32.u32 d10, d11, #9 :: Qd 0x4928e8c9 0x4920e0f9 Qm (i32)0x80000000
vcvt.f32.u32 d0, d1, #4 :: Qd 0x4d000000 0x4d000000 Qm (i32)0x80000001
+vcvt.f32.u32 d0, d1, #4 :: Qd 0x4ba8e8c9 0x4ba0e0f9 Qm (i32)0x80000001
vcvt.f32.u32 d24, d26, #6 :: Qd 0x4c000000 0x4c000000 Qm (i32)0x7fffffff
+vcvt.f32.u32 d24, d26, #6 :: Qd 0x4aa8e8c9 0x4aa0e0f9 Qm (i32)0x7fffffff
vcvt.f32.u32 d0, d14, #5 :: Qd 0x4bc282f4 0x4bc282f4 Qm (i32)0x30a0bcef
+vcvt.f32.u32 d0, d14, #5 :: Qd 0x4b28e8c9 0x4b20e0f9 Qm (i32)0x30a0bcef
vcvt.f32.s32 d0, d1, #12 :: Qd 0x3ae00000 0x3ae00000 Qm (i32)0x00000007
+vcvt.f32.s32 d0, d1, #12 :: Qd 0x47a8e8c9 0x47a0e0f9 Qm (i32)0x00000007
vcvt.f32.s32 d30, d31, #8 :: Qd 0xcb000000 0xcb000000 Qm (i32)0x80000000
+vcvt.f32.s32 d30, d31, #8 :: Qd 0x49a8e8c9 0x49a0e0f9 Qm (i32)0x80000000
vcvt.f32.s32 d0, d1, #1 :: Qd 0xce800000 0xce800000 Qm (i32)0x80000001
+vcvt.f32.s32 d0, d1, #1 :: Qd 0x4d28e8c9 0x4d20e0f9 Qm (i32)0x80000001
vcvt.f32.s32 d0, d1, #6 :: Qd 0x4c000000 0x4c000000 Qm (i32)0x7fffffff
+vcvt.f32.s32 d0, d1, #6 :: Qd 0x4aa8e8c9 0x4aa0e0f9 Qm (i32)0x7fffffff
vcvt.f32.s32 d0, d14, #2 :: Qd 0x4d4282f4 0x4d4282f4 Qm (i32)0x30a0bcef
+vcvt.f32.s32 d0, d14, #2 :: Qd 0x4ca8e8c9 0x4ca0e0f9 Qm (i32)0x30a0bcef
vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.u32.f32 d0, d1, #3 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000
+vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
+vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
vcvt.s32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.s32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.s32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.s32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.s32.f32 d0, d1, #3 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x7f800000
+vcvt.s32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vcvt.s32.f32 d0, d1, #3 :: Qd 0x80000000 0x80000000 Qm (i32)0xff800000
+vcvt.s32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
---- VMAX (fp) ----
vmax.f32 d0, d5, d2 :: Qd 0x41b851ec 0x41b851ec Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmax.f32 d0, d5, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmax.f32 d3, d4, d5 :: Qd 0x44a84000 0x44a84000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmax.f32 d3, d4, d5 :: Qd 0x44a84000 0x44a84000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmax.f32 d10, d11, d2 :: Qd 0x473e7300 0x473e7300 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vmax.f32 d10, d11, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmax.f32 d9, d5, d7 :: Qd 0x47bb3de1 0x47bb3de1 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmax.f32 d9, d5, d7 :: Qd 0x46855200 0x46855200 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vmax.f32 d0, d5, d2 :: Qd 0xc732633d 0xc732633d Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vmax.f32 d0, d5, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vmax.f32 d3, d4, d5 :: Qd 0x44a84003 0x44a84003 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vmax.f32 d3, d4, d5 :: Qd 0x44a84003 0x44a84003 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vmax.f32 d10, d11, d2 :: Qd 0x473e73b3 0x473e73b3 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vmax.f32 d10, d11, d2 :: Qd 0x44882666 0x44882666 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vmax.f32 d9, d5, d7 :: Qd 0x49d5e008 0x49d5e008 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmax.f32 d9, d5, d7 :: Qd 0x49d5e008 0x49d5e008 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmax.f32 d0, d11, d12 :: Qd 0x48add9f2 0x48add9f2 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vmax.f32 d0, d11, d12 :: Qd 0x45b75812 0x45b75812 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vmax.f32 d7, d1, d6 :: Qd 0x42080079 0x42080079 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vmax.f32 d7, d1, d6 :: Qd 0x3b210e02 0x3b210e02 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vmax.f32 d0, d1, d2 :: Qd 0x452c2000 0x452c2000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmax.f32 d0, d1, d2 :: Qd 0x42d60000 0x42d60000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmax.f32 d3, d4, d5 :: Qd 0x44ad1333 0x44ad1333 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmax.f32 d3, d4, d5 :: Qd 0x44ad1333 0x44ad1333 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmax.f32 d10, d11, d2 :: Qd 0x43f3cb23 0x43f3cb23 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vmax.f32 d10, d11, d2 :: Qd 0x42da0000 0x42da0000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vmax.f32 d9, d5, d7 :: Qd 0x45062000 0x45062000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vmax.f32 d9, d5, d7 :: Qd 0x44db0000 0x44db0000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vmax.f32 d0, d11, d12 :: Qd 0xc2610000 0xc2610000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmax.f32 d0, d11, d12 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vmax.f32 d7, d1, d6 :: Qd 0x43e41fde 0x43e41fde Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vmax.f32 d7, d1, d6 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmax.f32 d0, d5, d2 :: Qd 0x44053f2b 0x44053f2b Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmax.f32 d0, d5, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x44053f2b Qn (i32)0xbb965394
vmax.f32 d10, d13, d15 :: Qd 0xc3f29f73 0xc3f29f73 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vmax.f32 d10, d13, d15 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmax.f32 d10, d13, d15 :: Qd 0x4887f70e 0x4887f70e Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmax.f32 d10, d13, d15 :: Qd 0x4608d008 0x4608d008 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmax.f32 d0, d1, d2 :: Qd 0x4e920233 0x4e920233 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vmax.f32 d0, d1, d2 :: Qd 0x4e920233 0x4e920233 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vmax.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x00000000
vmax.f32 d0, d1, d2 :: Qd 0x3a800000 0x3a800000 Qm (i32)0x3a800000 Qn (i32)0xba800000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x3a800000 Qn (i32)0xba800000
+vmax.f32 d0, d1, d2 :: Qd 0x3a800000 0x3a800000 Qm (i32)0xba800000 Qn (i32)0x3a800000
vmax.f32 d0, d1, d2 :: Qd 0x3a800000 0x3a800000 Qm (i32)0xba800000 Qn (i32)0x3a800000
vmax.f32 d0, d1, d2 :: Qd 0x45126004 0x45126004 Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vmax.f32 d0, d1, d2 :: Qd 0x45125ffc 0x45125ffc Qm (i32)0x45126004 Qn (i32)0x45125ffc
vmax.f32 d0, d1, d2 :: Qd 0xc5125ffc 0xc5125ffc Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vmax.f32 d0, d1, d2 :: Qd 0x47bff200 0x47bff200 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vmax.f32 d0, d1, d2 :: Qd 0x47bff200 0x47bff200 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0xff800000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vmax.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmax.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0xff800000
+vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0xff800000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmax.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmax.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMIN (fp) ----
vmin.f32 d0, d5, d2 :: Qd 0xc2364659 0xc2364659 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmin.f32 d0, d5, d2 :: Qd 0xc2364659 0xc2364659 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vmin.f32 d3, d4, d5 :: Qd 0xc8a9da0f 0xc8a9da0f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vmin.f32 d3, d4, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vmin.f32 d10, d11, d2 :: Qd 0xc732da7a 0xc732da7a Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmin.f32 d10, d11, d2 :: Qd 0xc732da7a 0xc732da7a Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmin.f32 d9, d5, d7 :: Qd 0x46855200 0x46855200 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmin.f32 d9, d5, d7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmin.f32 d0, d5, d2 :: Qd 0xc872bcb1 0xc872bcb1 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vmin.f32 d0, d5, d2 :: Qd 0xc872bcb1 0xc872bcb1 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vmin.f32 d3, d4, d5 :: Qd 0x41c70126 0x41c70126 Qm (i32)0x41c70126 Qn (i32)0x44a84003
+vmin.f32 d3, d4, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x41c70126 Qn (i32)0x44a84003
vmin.f32 d10, d11, d2 :: Qd 0x44882666 0x44882666 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vmin.f32 d10, d11, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x473e73b3 Qn (i32)0x44882666
vmin.f32 d9, d5, d7 :: Qd 0x43560000 0x43560000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vmin.f32 d9, d5, d7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmin.f32 d0, d11, d12 :: Qd 0x45b75812 0x45b75812 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vmin.f32 d0, d11, d12 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vmin.f32 d7, d1, d6 :: Qd 0x3b210e02 0x3b210e02 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vmin.f32 d7, d1, d6 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x42080079 Qn (i32)0x3b210e02
vmin.f32 d0, d1, d2 :: Qd 0x42d60000 0x42d60000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x452c2000 Qn (i32)0x42d60000
vmin.f32 d3, d4, d5 :: Qd 0x445a8000 0x445a8000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vmin.f32 d3, d4, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmin.f32 d10, d11, d2 :: Qd 0x42da0000 0x42da0000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vmin.f32 d10, d11, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vmin.f32 d9, d5, d7 :: Qd 0x44db0000 0x44db0000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vmin.f32 d9, d5, d7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x45062000 Qn (i32)0x44db0000
vmin.f32 d0, d11, d12 :: Qd 0xc5b4d3c3 0xc5b4d3c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmin.f32 d0, d11, d12 :: Qd 0xc5b4d3c3 0xc5b4d3c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmin.f32 d7, d1, d6 :: Qd 0xc0e96d19 0xc0e96d19 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmin.f32 d7, d1, d6 :: Qd 0xc0e96d19 0xc0e96d19 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmin.f32 d0, d5, d2 :: Qd 0xbb965394 0xbb965394 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmin.f32 d0, d5, d2 :: Qd 0xbb965394 0xbb965394 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmin.f32 d10, d13, d15 :: Qd 0xc40dcfae 0xc40dcfae Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmin.f32 d10, d13, d15 :: Qd 0xc40dcfae 0xc40dcfae Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmin.f32 d10, d13, d15 :: Qd 0x4608d008 0x4608d008 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmin.f32 d10, d13, d15 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x4887f70e Qn (i32)0x4608d008
vmin.f32 d0, d1, d2 :: Qd 0x4e511724 0x4e511724 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x4e511724 Qn (i32)0x4e920233
vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vmin.f32 d0, d1, d2 :: Qd 0xba800000 0xba800000 Qm (i32)0x3a800000 Qn (i32)0xba800000
vmin.f32 d0, d1, d2 :: Qd 0xba800000 0xba800000 Qm (i32)0x3a800000 Qn (i32)0xba800000
vmin.f32 d0, d1, d2 :: Qd 0xba800000 0xba800000 Qm (i32)0xba800000 Qn (i32)0x3a800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xba800000 Qn (i32)0x3a800000
vmin.f32 d0, d1, d2 :: Qd 0x45125ffc 0x45125ffc Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vmin.f32 d0, d1, d2 :: Qd 0xc5126004 0xc5126004 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vmin.f32 d0, d1, d2 :: Qd 0xc5126004 0xc5126004 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vmin.f32 d0, d1, d2 :: Qd 0x47ae5e00 0x47ae5e00 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x7f800000
vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x3f800000
vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VPMAX (fp) ----
vpmax.f32 d0, d5, d2 :: Qd 0xc2364659 0x41b851ec Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vpmax.f32 d0, d5, d2 :: Qd 0xc2364659 0x131b1a1b Qm (i32)0x41b851ec Qn (i32)0xc2364659
vpmax.f32 d3, d4, d5 :: Qd 0x44a84000 0xc8a9da0f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vpmax.f32 d3, d4, d5 :: Qd 0x44a84000 0x131b1a1b Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vpmax.f32 d10, d11, d2 :: Qd 0xc732da7a 0x473e7300 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vpmax.f32 d10, d11, d2 :: Qd 0xc732da7a 0x131b1a1b Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vpmax.f32 d9, d5, d7 :: Qd 0x46855200 0x47bb3de1 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vpmax.f32 d9, d5, d7 :: Qd 0x46855200 0x131b1a1b Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vpmax.f32 d0, d5, d2 :: Qd 0xc872bcb1 0xc732633d Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vpmax.f32 d0, d5, d2 :: Qd 0xc872bcb1 0x131b1a1b Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vpmax.f32 d3, d4, d5 :: Qd 0x44a84003 0x41c70126 Qm (i32)0x41c70126 Qn (i32)0x44a84003
+vpmax.f32 d3, d4, d5 :: Qd 0x44a84003 0x131b1a1b Qm (i32)0x41c70126 Qn (i32)0x44a84003
vpmax.f32 d10, d11, d2 :: Qd 0x44882666 0x473e73b3 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vpmax.f32 d10, d11, d2 :: Qd 0x44882666 0x131b1a1b Qm (i32)0x473e73b3 Qn (i32)0x44882666
vpmax.f32 d9, d5, d7 :: Qd 0x49d5e008 0x43560000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vpmax.f32 d9, d5, d7 :: Qd 0x49d5e008 0x131b1a1b Qm (i32)0x43560000 Qn (i32)0x49d5e008
vpmax.f32 d0, d11, d12 :: Qd 0x45b75812 0x48add9f2 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vpmax.f32 d0, d11, d12 :: Qd 0x45b75812 0x131b1a1b Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vpmax.f32 d7, d1, d6 :: Qd 0x3b210e02 0x42080079 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vpmax.f32 d7, d1, d6 :: Qd 0x3b210e02 0x131b1a1b Qm (i32)0x42080079 Qn (i32)0x3b210e02
vpmax.f32 d0, d1, d2 :: Qd 0x42d60000 0x452c2000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vpmax.f32 d0, d1, d2 :: Qd 0x42d60000 0x131b1a1b Qm (i32)0x452c2000 Qn (i32)0x42d60000
vpmax.f32 d3, d4, d5 :: Qd 0x44ad1333 0x445a8000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vpmax.f32 d3, d4, d5 :: Qd 0x44ad1333 0x131b1a1b Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vpmax.f32 d10, d11, d2 :: Qd 0x42da0000 0x43f3cb23 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vpmax.f32 d10, d11, d2 :: Qd 0x42da0000 0x131b1a1b Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vpmax.f32 d9, d5, d7 :: Qd 0x44db0000 0x45062000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vpmax.f32 d9, d5, d7 :: Qd 0x44db0000 0x131b1a1b Qm (i32)0x45062000 Qn (i32)0x44db0000
vpmax.f32 d0, d11, d12 :: Qd 0xc5b4d3c3 0xc2610000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vpmax.f32 d0, d11, d12 :: Qd 0xc5b4d3c3 0x131b1a1b Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vpmax.f32 d7, d1, d6 :: Qd 0xc0e96d19 0x43e41fde Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vpmax.f32 d7, d1, d6 :: Qd 0xc0e96d19 0x131b1a1b Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vpmax.f32 d0, d5, d2 :: Qd 0xbb965394 0x44053f2b Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vpmax.f32 d0, d5, d2 :: Qd 0xbb965394 0x131b1a1b Qm (i32)0x44053f2b Qn (i32)0xbb965394
vpmax.f32 d10, d13, d15 :: Qd 0xc40dcfae 0xc3f29f73 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vpmax.f32 d10, d13, d15 :: Qd 0xc40dcfae 0x131b1a1b Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vpmax.f32 d10, d13, d15 :: Qd 0x4608d008 0x4887f70e Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vpmax.f32 d10, d13, d15 :: Qd 0x4608d008 0x131b1a1b Qm (i32)0x4887f70e Qn (i32)0x4608d008
vpmax.f32 d0, d1, d2 :: Qd 0x4e920233 0x4e511724 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vpmax.f32 d0, d1, d2 :: Qd 0x4e920233 0x131b1a1b Qm (i32)0x4e511724 Qn (i32)0x4e920233
vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x131b1a1b Qm (i32)0x00000000 Qn (i32)0x00000000
vpmax.f32 d0, d1, d2 :: Qd 0xba800000 0x3a800000 Qm (i32)0x3a800000 Qn (i32)0xba800000
+vpmax.f32 d0, d1, d2 :: Qd 0xba800000 0x131b1a1b Qm (i32)0x3a800000 Qn (i32)0xba800000
vpmax.f32 d0, d1, d2 :: Qd 0x3a800000 0xba800000 Qm (i32)0xba800000 Qn (i32)0x3a800000
+vpmax.f32 d0, d1, d2 :: Qd 0x3a800000 0x131b1a1b Qm (i32)0xba800000 Qn (i32)0x3a800000
vpmax.f32 d0, d1, d2 :: Qd 0x45125ffc 0x45126004 Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vpmax.f32 d0, d1, d2 :: Qd 0x45125ffc 0x131b1a1b Qm (i32)0x45126004 Qn (i32)0x45125ffc
vpmax.f32 d0, d1, d2 :: Qd 0xc5126004 0xc5125ffc Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vpmax.f32 d0, d1, d2 :: Qd 0xc5126004 0x131b1a1b Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vpmax.f32 d0, d1, d2 :: Qd 0x47bff200 0x47ae5e00 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vpmax.f32 d0, d1, d2 :: Qd 0x47bff200 0x131b1a1b Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x131b1a1b Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x131b1a1b Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x131b1a1b Qm (i32)0x7fc00000 Qn (i32)0x00000000
vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x131b1a1b Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0x131b1a1b Qm (i32)0x7fc00000 Qn (i32)0xff800000
vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x131b1a1b Qm (i32)0x00000000 Qn (i32)0x7fc00000
vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x131b1a1b Qm (i32)0x00000000 Qn (i32)0x3f800000
vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x131b1a1b Qm (i32)0x00000000 Qn (i32)0x00000000
vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x131b1a1b Qm (i32)0x00000000 Qn (i32)0x7f800000
vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0x131b1a1b Qm (i32)0x00000000 Qn (i32)0xff800000
vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
+vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x131b1a1b Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x131b1a1b Qm (i32)0x7f800000 Qn (i32)0x3f800000
vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x131b1a1b Qm (i32)0x7f800000 Qn (i32)0x00000000
vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x131b1a1b Qm (i32)0x7f800000 Qn (i32)0x7f800000
vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0x131b1a1b Qm (i32)0x7f800000 Qn (i32)0xff800000
vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x131b1a1b Qm (i32)0xff800000 Qn (i32)0x7fc00000
vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x131b1a1b Qm (i32)0xff800000 Qn (i32)0x3f800000
vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x131b1a1b Qm (i32)0xff800000 Qn (i32)0x00000000
vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x131b1a1b Qm (i32)0xff800000 Qn (i32)0x7f800000
vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0x131b1a1b Qm (i32)0xff800000 Qn (i32)0xff800000
---- VPMIN (fp) ----
vpmin.f32 d0, d5, d2 :: Qd 0xc2364659 0x41b851ec Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vpmin.f32 d0, d5, d2 :: Qd 0xc2364659 0x121f1e1f Qm (i32)0x41b851ec Qn (i32)0xc2364659
vpmin.f32 d3, d4, d5 :: Qd 0x44a84000 0xc8a9da0f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vpmin.f32 d3, d4, d5 :: Qd 0x44a84000 0x121f1e1f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vpmin.f32 d10, d11, d2 :: Qd 0xc732da7a 0x473e7300 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vpmin.f32 d10, d11, d2 :: Qd 0xc732da7a 0x121f1e1f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vpmin.f32 d9, d5, d7 :: Qd 0x46855200 0x47bb3de1 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vpmin.f32 d9, d5, d7 :: Qd 0x46855200 0x121f1e1f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vpmin.f32 d0, d5, d2 :: Qd 0xc872bcb1 0xc732633d Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vpmin.f32 d0, d5, d2 :: Qd 0xc872bcb1 0x121f1e1f Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vpmin.f32 d3, d4, d5 :: Qd 0x44a84003 0x41c70126 Qm (i32)0x41c70126 Qn (i32)0x44a84003
+vpmin.f32 d3, d4, d5 :: Qd 0x44a84003 0x121f1e1f Qm (i32)0x41c70126 Qn (i32)0x44a84003
vpmin.f32 d10, d11, d2 :: Qd 0x44882666 0x473e73b3 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vpmin.f32 d10, d11, d2 :: Qd 0x44882666 0x121f1e1f Qm (i32)0x473e73b3 Qn (i32)0x44882666
vpmin.f32 d9, d5, d7 :: Qd 0x49d5e008 0x43560000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vpmin.f32 d9, d5, d7 :: Qd 0x49d5e008 0x121f1e1f Qm (i32)0x43560000 Qn (i32)0x49d5e008
vpmin.f32 d0, d11, d12 :: Qd 0x45b75812 0x48add9f2 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vpmin.f32 d0, d11, d12 :: Qd 0x45b75812 0x121f1e1f Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vpmin.f32 d7, d1, d6 :: Qd 0x3b210e02 0x42080079 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vpmin.f32 d7, d1, d6 :: Qd 0x3b210e02 0x121f1e1f Qm (i32)0x42080079 Qn (i32)0x3b210e02
vpmin.f32 d0, d1, d2 :: Qd 0x42d60000 0x452c2000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vpmin.f32 d0, d1, d2 :: Qd 0x42d60000 0x121f1e1f Qm (i32)0x452c2000 Qn (i32)0x42d60000
vpmin.f32 d3, d4, d5 :: Qd 0x44ad1333 0x445a8000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vpmin.f32 d3, d4, d5 :: Qd 0x44ad1333 0x121f1e1f Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vpmin.f32 d10, d11, d2 :: Qd 0x42da0000 0x43f3cb23 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vpmin.f32 d10, d11, d2 :: Qd 0x42da0000 0x121f1e1f Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vpmin.f32 d9, d5, d7 :: Qd 0x44db0000 0x45062000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vpmin.f32 d9, d5, d7 :: Qd 0x44db0000 0x121f1e1f Qm (i32)0x45062000 Qn (i32)0x44db0000
vpmin.f32 d0, d11, d12 :: Qd 0xc5b4d3c3 0xc2610000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vpmin.f32 d0, d11, d12 :: Qd 0xc5b4d3c3 0x121f1e1f Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vpmin.f32 d7, d1, d6 :: Qd 0xc0e96d19 0x43e41fde Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vpmin.f32 d7, d1, d6 :: Qd 0xc0e96d19 0x121f1e1f Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vpmin.f32 d0, d5, d2 :: Qd 0xbb965394 0x44053f2b Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vpmin.f32 d0, d5, d2 :: Qd 0xbb965394 0x121f1e1f Qm (i32)0x44053f2b Qn (i32)0xbb965394
vpmin.f32 d10, d13, d15 :: Qd 0xc40dcfae 0xc3f29f73 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vpmin.f32 d10, d13, d15 :: Qd 0xc40dcfae 0x121f1e1f Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vpmin.f32 d10, d13, d15 :: Qd 0x4608d008 0x4887f70e Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vpmin.f32 d10, d13, d15 :: Qd 0x4608d008 0x121f1e1f Qm (i32)0x4887f70e Qn (i32)0x4608d008
vpmin.f32 d0, d1, d2 :: Qd 0x4e920233 0x4e511724 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vpmin.f32 d0, d1, d2 :: Qd 0x4e920233 0x121f1e1f Qm (i32)0x4e511724 Qn (i32)0x4e920233
vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x00000000
vpmin.f32 d0, d1, d2 :: Qd 0xba800000 0x3a800000 Qm (i32)0x3a800000 Qn (i32)0xba800000
+vpmin.f32 d0, d1, d2 :: Qd 0xba800000 0x121f1e1f Qm (i32)0x3a800000 Qn (i32)0xba800000
vpmin.f32 d0, d1, d2 :: Qd 0x3a800000 0xba800000 Qm (i32)0xba800000 Qn (i32)0x3a800000
+vpmin.f32 d0, d1, d2 :: Qd 0x3a800000 0x121f1e1f Qm (i32)0xba800000 Qn (i32)0x3a800000
vpmin.f32 d0, d1, d2 :: Qd 0x45125ffc 0x45126004 Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vpmin.f32 d0, d1, d2 :: Qd 0x45125ffc 0x121f1e1f Qm (i32)0x45126004 Qn (i32)0x45125ffc
vpmin.f32 d0, d1, d2 :: Qd 0xc5126004 0xc5125ffc Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vpmin.f32 d0, d1, d2 :: Qd 0xc5126004 0x121f1e1f Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vpmin.f32 d0, d1, d2 :: Qd 0x47bff200 0x47ae5e00 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vpmin.f32 d0, d1, d2 :: Qd 0x47bff200 0x121f1e1f Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x00000000
vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0xff800000
vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x7fc00000
vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x3f800000
vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x00000000
vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x7f800000
vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0xff800000
vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
+vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x3f800000
vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x00000000
vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x7f800000
vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0xff800000
vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x7fc00000
vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x3f800000
vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x00000000
vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x7f800000
vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0xff800000
---- VRECPE ----
vrecpe.u32 d0, d1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x404ccccd
+vrecpe.u32 d0, d1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x404ccccd
vrecpe.u32 d0, d1 :: Qd 0xa7000000 0xa7000000 Qm (i32)0xc4234ccd
+vrecpe.u32 d0, d1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc4234ccd
+vrecpe.u32 d10, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
vrecpe.u32 d10, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
vrecpe.u32 d15, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
+vrecpe.u32 d15, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
vrecpe.u32 d15, d4 :: Qd 0xab800000 0xab800000 Qm (i32)0xbf000000
+vrecpe.u32 d15, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0xbf000000
vrecpe.u32 d15, d4 :: Qd 0xaa000000 0xaa000000 Qm (i32)0xc0e33333
+vrecpe.u32 d15, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc0e33333
+vrecpe.u32 d12, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x40fff800
vrecpe.u32 d12, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x40fff800
vrecpe.u32 d12, d8 :: Qd 0xaa000000 0xaa000000 Qm (i32)0xc0fff800
+vrecpe.u32 d12, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc0fff800
vrecpe.u32 d0, d1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x404ccccd
+vrecpe.u32 d0, d1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x404ccccd
+vrecpe.u32 d10, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
vrecpe.u32 d10, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
vrecpe.u32 d15, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
+vrecpe.u32 d15, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
vrecpe.f32 d15, d4 :: Qd 0xbfff8000 0xbfff8000 Qm (i32)0xbf000000
+vrecpe.f32 d15, d4 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0xbf000000
vrecpe.f32 d15, d4 :: Qd 0xbe100000 0xbe100000 Qm (i32)0xc0e33333
+vrecpe.f32 d15, d4 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0xc0e33333
vrecpe.f32 d12, d8 :: Qd 0x3e000000 0x3e000000 Qm (i32)0x40fff800
+vrecpe.f32 d12, d8 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x40fff800
vrecpe.f32 d12, d8 :: Qd 0xbe000000 0xbe000000 Qm (i32)0xc0fff800
+vrecpe.f32 d12, d8 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0xc0fff800
vrecpe.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x00000007
vrecpe.f32 d10, d11 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000000
+vrecpe.f32 d10, d11 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x80000000
vrecpe.f32 d0, d1 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000001
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x80000001
vrecpe.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x7fffffff
vrecpe.f32 d0, d14 :: Qd 0x4e4c0000 0x4e4c0000 Qm (i32)0x30a0bcef
+vrecpe.f32 d0, d14 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x30a0bcef
vrecpe.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x00000007
vrecpe.f32 d10, d11 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000000
+vrecpe.f32 d10, d11 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x80000000
vrecpe.f32 d0, d1 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000001
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x80000001
vrecpe.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x7fffffff
vrecpe.f32 d0, d14 :: Qd 0x4e4c0000 0x4e4c0000 Qm (i32)0x30a0bcef
+vrecpe.f32 d0, d14 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x30a0bcef
vrecpe.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x7fc00000
vrecpe.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x00000000
vrecpe.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x7f800000
vrecpe.f32 d0, d1 :: Qd 0x80000000 0x80000000 Qm (i32)0xff800000
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0xff800000
---- VRECPS ----
vrecps.f32 d0, d5, d2 :: Qd 0x44837ce4 0x44837ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vrecps.f32 d0, d5, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vrecps.f32 d3, d4, d5 :: Qd 0x4ddf4321 0x4ddf4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vrecps.f32 d3, d4, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vrecps.f32 d10, d11, d2 :: Qd 0x4f050e7f 0x4f050e7f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vrecps.f32 d10, d11, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vrecps.f32 d9, d5, d7 :: Qd 0xcec3063f 0xcec3063f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vrecps.f32 d9, d5, d7 :: Qd 0x40000000 0x40000000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vrecps.f32 d0, d5, d2 :: Qd 0xd029254c 0xd029254c Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vrecps.f32 d0, d5, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vrecps.f32 d3, d4, d5 :: Qd 0xc6fc5c00 0xc6fc5c00 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vrecps.f32 d3, d4, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vrecps.f32 d10, d11, d2 :: Qd 0xcc4a89cc 0xcc4a89cc Qm (i32)0x473e7300 Qn (i32)0x44882000
+vrecps.f32 d10, d11, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vrecps.f32 d9, d5, d7 :: Qd 0xcdb2c947 0xcdb2c947 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vrecps.f32 d9, d5, d7 :: Qd 0x40000000 0x40000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vrecps.f32 d0, d11, d12 :: Qd 0xcef90536 0xcef90536 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vrecps.f32 d0, d11, d12 :: Qd 0x40000000 0x40000000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vrecps.f32 d7, d1, d6 :: Qd 0x3ff54e08 0x3ff54e08 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vrecps.f32 d7, d1, d6 :: Qd 0x40000000 0x40000000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vrecps.f32 d0, d1, d2 :: Qd 0xc88fe280 0xc88fe280 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vrecps.f32 d3, d4, d5 :: Qd 0xc993b8d3 0xc993b8d3 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vrecps.f32 d3, d4, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vrecps.f32 d10, d11, d2 :: Qd 0xc74f98fc 0xc74f98fc Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vrecps.f32 d10, d11, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vrecps.f32 d9, d5, d7 :: Qd 0xca657ab8 0xca657ab8 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vrecps.f32 d9, d5, d7 :: Qd 0x40000000 0x40000000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vrecps.f32 d0, d11, d12 :: Qd 0xc89eedde 0xc89eedde Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vrecps.f32 d0, d11, d12 :: Qd 0x40000000 0x40000000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vrecps.f32 d7, d1, d6 :: Qd 0x45502239 0x45502239 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vrecps.f32 d7, d1, d6 :: Qd 0x40000000 0x40000000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vrecps.f32 d0, d5, d2 :: Qd 0x408e3e84 0x408e3e84 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vrecps.f32 d0, d5, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vrecps.f32 d10, d13, d15 :: Qd 0xc8866666 0xc8866666 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vrecps.f32 d10, d13, d15 :: Qd 0x40000000 0x40000000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vrecps.f32 d10, d13, d15 :: Qd 0xcf115379 0xcf115379 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vrecps.f32 d10, d13, d15 :: Qd 0x40000000 0x40000000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vrecps.f32 d0, d1, d2 :: Qd 0xdd6e81fd 0xdd6e81fd Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vrecps.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vrecps.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0x00000000
vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0x00000000
vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vrecps.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vrecps.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vrecps.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vrecps.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vrecps.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vrecps.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vrecps.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0xff800000 Qn (i32)0x00000000
vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0xff800000 Qn (i32)0x00000000
vrecps.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vrecps.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vrecps.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vrecps.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VABS (fp) ----
vabs.f32 d0, d1 :: Qd 0x404ccccd 0x404ccccd Qm (i32)0x404ccccd
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x404ccccd
vabs.f32 d10, d11 :: Qd 0x64cb49b4 0x64cb49b4 Qm (i32)0x64cb49b4
+vabs.f32 d10, d11 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x64cb49b4
vabs.f32 d15, d4 :: Qd 0x4f32d05e 0x4f32d05e Qm (i32)0x4f32d05e
+vabs.f32 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x4f32d05e
vabs.f32 d15, d4 :: Qd 0x3f000000 0x3f000000 Qm (i32)0xbf000000
+vabs.f32 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xbf000000
vabs.f32 d15, d4 :: Qd 0x40e33333 0x40e33333 Qm (i32)0xc0e33333
+vabs.f32 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xc0e33333
vabs.f32 d12, d8 :: Qd 0x40fff800 0x40fff800 Qm (i32)0x40fff800
+vabs.f32 d12, d8 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x40fff800
vabs.f32 d12, d8 :: Qd 0x40fff800 0x40fff800 Qm (i32)0xc0fff800
+vabs.f32 d12, d8 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xc0fff800
vabs.f32 d0, d1 :: Qd 0x404ccccd 0x404ccccd Qm (i32)0x404ccccd
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x404ccccd
vabs.f32 d10, d11 :: Qd 0x64cb49b4 0x64cb49b4 Qm (i32)0x64cb49b4
+vabs.f32 d10, d11 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x64cb49b4
vabs.f32 d15, d4 :: Qd 0x4f32d05e 0x4f32d05e Qm (i32)0x4f32d05e
+vabs.f32 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x4f32d05e
vabs.f32 d15, d4 :: Qd 0x3f000000 0x3f000000 Qm (i32)0xbf000000
+vabs.f32 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xbf000000
vabs.f32 d15, d4 :: Qd 0x40e33333 0x40e33333 Qm (i32)0xc0e33333
+vabs.f32 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xc0e33333
vabs.f32 d12, d8 :: Qd 0x40fff800 0x40fff800 Qm (i32)0x40fff800
+vabs.f32 d12, d8 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x40fff800
vabs.f32 d12, d8 :: Qd 0x40fff800 0x40fff800 Qm (i32)0xc0fff800
+vabs.f32 d12, d8 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xc0fff800
vabs.f32 d0, d1 :: Qd 0x00000007 0x00000007 Qm (i32)0x00000007
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000007
vabs.f32 d10, d11 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
+vabs.f32 d10, d11 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x80000000
vabs.f32 d0, d1 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x80000001
vabs.f32 d0, d1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x7fffffff
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x7fffffff
vabs.f32 d0, d14 :: Qd 0x30a0bcef 0x30a0bcef Qm (i32)0x30a0bcef
+vabs.f32 d0, d14 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x30a0bcef
vabs.f32 d0, d1 :: Qd 0x00000007 0x00000007 Qm (i32)0x00000007
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000007
vabs.f32 d10, d11 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
+vabs.f32 d10, d11 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x80000000
vabs.f32 d0, d1 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x80000001
vabs.f32 d0, d1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x7fffffff
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x7fffffff
vabs.f32 d0, d14 :: Qd 0x30a0bcef 0x30a0bcef Qm (i32)0x30a0bcef
+vabs.f32 d0, d14 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x30a0bcef
vabs.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x7fc00000
vabs.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000000
vabs.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x7f800000
vabs.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xff800000
---- VCGT (fp) ----
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vcgt.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vcgt.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vcgt.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vcgt.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vcgt.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec Qn (i32)0xc2364659
vcgt.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec Qn (i32)0xc2364659
vcgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vcgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vcgt.f32 d10, d11, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vcgt.f32 d10, d11, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vcgt.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vcgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vcgt.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vcgt.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vcgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vcgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vcgt.f32 d10, d31, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vcgt.f32 d10, d31, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vcgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vcgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vcgt.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vcgt.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vcgt.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vcgt.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vcgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vcgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vcgt.f32 d20, d21, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vcgt.f32 d20, d21, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vcgt.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45062000 Qn (i32)0x44db0000
+vcgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vcgt.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vcgt.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vcgt.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vcgt.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vcgt.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vcgt.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vcgt.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vcgt.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vcgt.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vcgt.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3a800000 Qn (i32)0xba800000
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3a800000 Qn (i32)0xba800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0xff800000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0xff800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0xff800000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0xff800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0xff800000
---- VCGE (fp) ----
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vcge.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vcge.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vcge.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vcge.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vcge.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec Qn (i32)0xc2364659
vcge.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec Qn (i32)0xc2364659
vcge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vcge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vcge.f32 d10, d11, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vcge.f32 d10, d11, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vcge.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vcge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vcge.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vcge.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vcge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vcge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vcge.f32 d10, d31, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vcge.f32 d10, d31, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vcge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vcge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vcge.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vcge.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vcge.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vcge.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vcge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vcge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vcge.f32 d20, d21, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vcge.f32 d20, d21, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vcge.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45062000 Qn (i32)0x44db0000
+vcge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vcge.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vcge.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vcge.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vcge.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vcge.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vcge.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vcge.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vcge.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vcge.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vcge.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3a800000 Qn (i32)0xba800000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3a800000 Qn (i32)0xba800000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x45126004 Qn (i32)0x45125ffc
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fc00000 Qn (i32)0xff800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0xff800000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0xff800000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0xff800000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0xff800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x00000000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0xff800000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0xff800000
---- VACGT (fp) ----
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3f000000 Qn (i32)0xbf000000
vacgt.f32 d2, d15, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
+vacgt.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vacgt.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vacgt.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vacgt.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vacgt.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vacgt.f32 d3, d4, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vacgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vacgt.f32 d10, d11, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vacgt.f32 d10, d11, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vacgt.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vacgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vacgt.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vacgt.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vacgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vacgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vacgt.f32 d10, d31, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vacgt.f32 d10, d31, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vacgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vacgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vacgt.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vacgt.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vacgt.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vacgt.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vacgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vacgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vacgt.f32 d20, d21, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vacgt.f32 d20, d21, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vacgt.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45062000 Qn (i32)0x44db0000
+vacgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vacgt.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vacgt.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vacgt.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vacgt.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vacgt.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vacgt.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vacgt.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vacgt.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vacgt.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vacgt.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3a800000 Qn (i32)0xba800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3a800000 Qn (i32)0xba800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fc00000 Qn (i32)0x00000000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x3f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x00000000
vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x00000000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0xff800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VACGE (fp) ----
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3f000000 Qn (i32)0xbf000000
vacge.f32 d2, d15, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
+vacge.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vacge.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vacge.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vacge.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vacge.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vacge.f32 d3, d4, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vacge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vacge.f32 d10, d11, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vacge.f32 d10, d11, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vacge.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vacge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vacge.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vacge.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vacge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vacge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vacge.f32 d10, d31, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vacge.f32 d10, d31, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vacge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vacge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vacge.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vacge.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vacge.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vacge.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vacge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vacge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vacge.f32 d20, d21, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vacge.f32 d20, d21, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vacge.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45062000 Qn (i32)0x44db0000
+vacge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vacge.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vacge.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vacge.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vacge.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vacge.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vacge.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vacge.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vacge.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vacge.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vacge.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3a800000 Qn (i32)0xba800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3a800000 Qn (i32)0xba800000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xba800000 Qn (i32)0x3a800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x45126004 Qn (i32)0x45125ffc
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fc00000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0xff800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x3f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x7f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0xff800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VCEQ (fp) ----
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vceq.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vceq.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vceq.f32 d15, d7, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0x43677333 Qn (i32)0x43677333
+vceq.f32 d15, d7, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0x43677333 Qn (i32)0x43677333
+vceq.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vceq.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vceq.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vceq.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vceq.f32 d10, d11, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vceq.f32 d10, d11, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vceq.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vceq.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vceq.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vceq.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vceq.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vceq.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vceq.f32 d10, d31, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vceq.f32 d10, d31, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vceq.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vceq.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vceq.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vceq.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vceq.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vceq.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vceq.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vceq.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vceq.f32 d20, d21, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vceq.f32 d20, d21, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vceq.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vceq.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vceq.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vceq.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vceq.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vceq.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vceq.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vceq.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vceq.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vceq.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vceq.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vceq.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vceq.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3a800000 Qn (i32)0xba800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3a800000 Qn (i32)0xba800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x45126004 Qn (i32)0x45125ffc
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x45126004 Qn (i32)0x45125ffc
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vceq.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vceq.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vceq.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0xff800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VCEQ (fp) #0 ----
vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x01000000
+vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x01000000
vceq.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000001
+vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001
vceq.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000000
+vceq.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
vceq.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec
+vceq.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec
+vceq.f32 d2, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xc1b851ec
vceq.f32 d2, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xc1b851ec
vceq.f32 d30, d15, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.f32 d30, d15, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
vceq.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
+vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
---- VCGT (fp) #0 ----
vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x01000000
+vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x01000000
vcgt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001
+vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000001
vcgt.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
+vcgt.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000000
+vcgt.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec
vcgt.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec
vcgt.f32 d2, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xc1b851ec
+vcgt.f32 d2, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
vcgt.f32 d30, d15, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.f32 d30, d15, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fc00000
vcgt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000
vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000
vcgt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
+vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000
---- VCLT (fp) #0 ----
vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x01000000
+vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x01000000
vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001
+vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001
+vclt.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
vclt.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
vclt.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec
+vclt.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec
vclt.f32 d2, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
+vclt.f32 d2, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xc1b851ec
+vclt.f32 d30, d15, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.f32 d30, d15, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
+vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vclt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000
+vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
---- VCGE (fp) #0 ----
vcge.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x01000000
+vcge.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x01000000
vcge.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000001
+vcge.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000001
+vcge.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000000
vcge.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000000
vcge.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec
+vcge.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec
vcge.f32 d2, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xc1b851ec
+vcge.f32 d2, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
+vcge.f32 d30, d15, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.f32 d30, d15, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcle.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vcle.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
---- VCLE (fp) #0 ----
vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x01000000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x01000000
vcle.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000001
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001
vcle.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000000
+vcle.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
+vcle.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec
vcle.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec
vcle.f32 d2, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
+vcle.f32 d2, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xc1b851ec
vcle.f32 d30, d15, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.f32 d30, d15, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcle.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vcle.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
---- VNEG (fp) ----
vneg.f32 d0, d1 :: Qd 0x81000000 0x81000000 Qm (i32)0x01000000
+vneg.f32 d0, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x01000000
vneg.f32 d0, d1 :: Qd 0x80000001 0x80000001 Qm (i32)0x00000001
+vneg.f32 d0, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x00000001
vneg.f32 d2, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
+vneg.f32 d2, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x80000000
vneg.f32 d2, d1 :: Qd 0xc1b851ec 0xc1b851ec Qm (i32)0x41b851ec
+vneg.f32 d2, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x41b851ec
vneg.f32 d2, d31 :: Qd 0x41b851ec 0x41b851ec Qm (i32)0xc1b851ec
+vneg.f32 d2, d31 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0xc1b851ec
vneg.f32 d30, d15 :: Qd 0x80000000 0x80000000 Qm (i32)0x00000000
+vneg.f32 d30, d15 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x00000000
vneg.f32 d0, d1 :: Qd 0xffc00000 0xffc00000 Qm (i32)0x7fc00000
+vneg.f32 d0, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x7fc00000
vneg.f32 d0, d1 :: Qd 0x80000000 0x80000000 Qm (i32)0x00000000
+vneg.f32 d0, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x00000000
vneg.f32 d0, d1 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000
+vneg.f32 d0, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x7f800000
vneg.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000
+vneg.f32 d0, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0xff800000
---- VRSQRTS ----
vrsqrts.f32 d0, d5, d2 :: Qd 0x44039ce4 0x44039ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vrsqrts.f32 d0, d5, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vrsqrts.f32 d3, d4, d5 :: Qd 0x4d5f4321 0x4d5f4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vrsqrts.f32 d3, d4, d5 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vrsqrts.f32 d10, d11, d2 :: Qd 0x4e850e7f 0x4e850e7f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vrsqrts.f32 d10, d11, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vrsqrts.f32 d9, d5, d7 :: Qd 0xce43063f 0xce43063f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vrsqrts.f32 d9, d5, d7 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vrsqrts.f32 d0, d5, d2 :: Qd 0xcfa9254c 0xcfa9254c Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vrsqrts.f32 d0, d5, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vrsqrts.f32 d3, d4, d5 :: Qd 0xc67c5a00 0xc67c5a00 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vrsqrts.f32 d3, d4, d5 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vrsqrts.f32 d10, d11, d2 :: Qd 0xcbca89cc 0xcbca89cc Qm (i32)0x473e7300 Qn (i32)0x44882000
+vrsqrts.f32 d10, d11, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vrsqrts.f32 d9, d5, d7 :: Qd 0xcd32c947 0xcd32c947 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vrsqrts.f32 d9, d5, d7 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vrsqrts.f32 d0, d11, d12 :: Qd 0xce790536 0xce790536 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vrsqrts.f32 d0, d11, d12 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vrsqrts.f32 d7, d1, d6 :: Qd 0x3fbaa704 0x3fbaa704 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vrsqrts.f32 d7, d1, d6 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vrsqrts.f32 d0, d1, d2 :: Qd 0xc80fe260 0xc80fe260 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vrsqrts.f32 d3, d4, d5 :: Qd 0xc913b8cb 0xc913b8cb Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vrsqrts.f32 d3, d4, d5 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vrsqrts.f32 d10, d11, d2 :: Qd 0xc6cf97fc 0xc6cf97fc Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vrsqrts.f32 d10, d11, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vrsqrts.f32 d9, d5, d7 :: Qd 0xc9e57ab4 0xc9e57ab4 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vrsqrts.f32 d9, d5, d7 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vrsqrts.f32 d0, d11, d12 :: Qd 0xc81eedbe 0xc81eedbe Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vrsqrts.f32 d0, d11, d12 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vrsqrts.f32 d7, d1, d6 :: Qd 0x44d03239 0x44d03239 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vrsqrts.f32 d7, d1, d6 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vrsqrts.f32 d0, d5, d2 :: Qd 0x402e3e84 0x402e3e84 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vrsqrts.f32 d0, d5, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vrsqrts.f32 d10, d13, d15 :: Qd 0xc8066646 0xc8066646 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vrsqrts.f32 d10, d13, d15 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vrsqrts.f32 d10, d13, d15 :: Qd 0xce915379 0xce915379 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vrsqrts.f32 d10, d13, d15 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vrsqrts.f32 d0, d1, d2 :: Qd 0xdcee81fd 0xdcee81fd Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x00000000 Qn (i32)0x00000000
vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vrsqrts.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vrsqrts.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VRSQRTE (fp) ----
vrsqrte.f32 d0, d1 :: Qd 0x3f0f0000 0x3f0f0000 Qm (i32)0x404ccccd
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x404ccccd
vrsqrte.f32 d10, d11 :: Qd 0x2ccb0000 0x2ccb0000 Qm (i32)0x64cb49b4
+vrsqrte.f32 d10, d11 :: Qd 0x54a30000 0x55238000 Qm (i32)0x64cb49b4
vrsqrte.f32 d15, d4 :: Qd 0x37998000 0x37998000 Qm (i32)0x4f32d05e
+vrsqrte.f32 d15, d4 :: Qd 0x54a30000 0x55238000 Qm (i32)0x4f32d05e
vrsqrte.f32 d15, d4 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xbf000000
+vrsqrte.f32 d15, d4 :: Qd 0x54a30000 0x55238000 Qm (i32)0xbf000000
vrsqrte.f32 d15, d4 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xc0e33333
+vrsqrte.f32 d15, d4 :: Qd 0x54a30000 0x55238000 Qm (i32)0xc0e33333
vrsqrte.f32 d12, d8 :: Qd 0x3eb50000 0x3eb50000 Qm (i32)0x40fff800
+vrsqrte.f32 d12, d8 :: Qd 0x54a30000 0x55238000 Qm (i32)0x40fff800
vrsqrte.f32 d12, d8 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xc0fff800
+vrsqrte.f32 d12, d8 :: Qd 0x54a30000 0x55238000 Qm (i32)0xc0fff800
vrsqrte.f32 d0, d1 :: Qd 0x3f0f0000 0x3f0f0000 Qm (i32)0x404ccccd
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x404ccccd
vrsqrte.f32 d10, d11 :: Qd 0x2ccb0000 0x2ccb0000 Qm (i32)0x64cb49b4
+vrsqrte.f32 d10, d11 :: Qd 0x54a30000 0x55238000 Qm (i32)0x64cb49b4
vrsqrte.f32 d15, d4 :: Qd 0x37998000 0x37998000 Qm (i32)0x4f32d05e
+vrsqrte.f32 d15, d4 :: Qd 0x54a30000 0x55238000 Qm (i32)0x4f32d05e
vrsqrte.f32 d15, d4 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xbf000000
+vrsqrte.f32 d15, d4 :: Qd 0x54a30000 0x55238000 Qm (i32)0xbf000000
vrsqrte.f32 d15, d4 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xc0e33333
+vrsqrte.f32 d15, d4 :: Qd 0x54a30000 0x55238000 Qm (i32)0xc0e33333
vrsqrte.f32 d12, d8 :: Qd 0x3eb50000 0x3eb50000 Qm (i32)0x40fff800
+vrsqrte.f32 d12, d8 :: Qd 0x54a30000 0x55238000 Qm (i32)0x40fff800
vrsqrte.f32 d12, d8 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xc0fff800
+vrsqrte.f32 d12, d8 :: Qd 0x54a30000 0x55238000 Qm (i32)0xc0fff800
vrsqrte.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x00000007
vrsqrte.f32 d10, d11 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000000
+vrsqrte.f32 d10, d11 :: Qd 0x54a30000 0x55238000 Qm (i32)0x80000000
vrsqrte.f32 d0, d1 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000001
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x80000001
vrsqrte.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x7fffffff
vrsqrte.f32 d0, d14 :: Qd 0x46e48000 0x46e48000 Qm (i32)0x30a0bcef
+vrsqrte.f32 d0, d14 :: Qd 0x54a30000 0x55238000 Qm (i32)0x30a0bcef
vrsqrte.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x00000007
vrsqrte.f32 d10, d11 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000000
+vrsqrte.f32 d10, d11 :: Qd 0x54a30000 0x55238000 Qm (i32)0x80000000
vrsqrte.f32 d0, d1 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000001
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x80000001
vrsqrte.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x7fffffff
vrsqrte.f32 d0, d14 :: Qd 0x46e48000 0x46e48000 Qm (i32)0x30a0bcef
+vrsqrte.f32 d0, d14 :: Qd 0x54a30000 0x55238000 Qm (i32)0x30a0bcef
vrsqrte.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x7fc00000
vrsqrte.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x00000000
vrsqrte.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x7f800000
vrsqrte.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0xff800000
TESTINST2("rev16 r0, r1", 0xbb6d14ec, r0, r1, 0);
TESTINST2("rev16 r0, r1", 0x68983cc9, r0, r1, 0);
+ printf("------------ NOP (begin) ------------\n");
+ printf("nop\n");
+ __asm__ __volatile__("nop" ::: "memory","cc");
+ printf("nopeq\n");
+ __asm__ __volatile__("nopeq" ::: "memory","cc");
+ printf("nopne\n");
+ __asm__ __volatile__("nopne" ::: "memory","cc");
+ printf("------------ NOP (end) ------------\n");
+
return 0;
}
rev16 r0, r1 :: rd 0xb8e54b3d rm 0xe5b83d4b, carryin 0, cpsr 0x00000000
rev16 r0, r1 :: rd 0x6dbbec14 rm 0xbb6d14ec, carryin 0, cpsr 0x00000000
rev16 r0, r1 :: rd 0x9868c93c rm 0x68983cc9, carryin 0, cpsr 0x00000000
+------------ NOP (begin) ------------
+nop
+nopeq
+nopne
+------------ NOP (end) ------------
TESTINST2("rev16 r8, r9", 0xbb6d14ec, r8, r9, 0);
TESTINST2("rev16 r8, r9", 0x68983cc9, r8, r9, 0);
+ printf("------------ NOP (begin) ------------\n");
+ printf("nop\n");
+ __asm__ __volatile__("nop" ::: "memory","cc");
+ printf("nop.w\n");
+ __asm__ __volatile__("nop.w" ::: "memory","cc");
+ printf("------------ NOP (end) ------------\n");
+
// plus whatever stuff we can throw in from the old ARM test program
old_main();
rev16 r8, r9 :: rd 0xb8e54b3d rm 0xe5b83d4b, c:v-in 0, cpsr 0xc0000000 NZ
rev16 r8, r9 :: rd 0x6dbbec14 rm 0xbb6d14ec, c:v-in 0, cpsr 0xc0000000 NZ
rev16 r8, r9 :: rd 0x9868c93c rm 0x68983cc9, c:v-in 0, cpsr 0xc0000000 NZ
+------------ NOP (begin) ------------
+nop
+nop.w
+------------ NOP (end) ------------
MOV
mov r0, r1 :: rd 0x00000001 rm 0x00000001, c:v-in 0, cpsr 0xc0000000 NZ
cpy r0, r1 :: rd 0x00000001 rm 0x00000001, c:v-in 0, cpsr 0xc0000000 NZ
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# none/tests/arm/Makefile. Generated from Makefile.in by configure.
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+
+
+# This file is used for tool tests, and also in perf/Makefile.am.
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
+
+
+pkgdatadir = $(datadir)/valgrind
+pkglibdir = $(libdir)/valgrind
+pkgincludedir = $(includedir)/valgrind
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+install_sh_DATA = $(install_sh) -c -m 644
+install_sh_PROGRAM = $(install_sh) -c
+install_sh_SCRIPT = $(install_sh) -c
+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+build_triplet = arm-unknown-linux-gnueabi
+host_triplet = arm-unknown-linux-gnueabi
+DIST_COMMON = $(dist_noinst_SCRIPTS) $(srcdir)/Makefile.am \
+ $(srcdir)/Makefile.in $(top_srcdir)/Makefile.all.am \
+ $(top_srcdir)/Makefile.tool-tests.am
+check_PROGRAMS = neon128$(EXEEXT) neon64$(EXEEXT) v6intARM$(EXEEXT) \
+ v6intThumb$(EXEEXT) v6media$(EXEEXT) vfp$(EXEEXT)
+subdir = none/tests/arm
+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
+am__aclocal_m4_deps = $(top_srcdir)/configure.in
+am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
+ $(ACLOCAL_M4)
+mkinstalldirs = $(install_sh) -d
+CONFIG_HEADER = $(top_builddir)/config.h
+CONFIG_CLEAN_FILES =
+neon128_SOURCES = neon128.c
+neon128_OBJECTS = neon128-neon128.$(OBJEXT)
+neon128_LDADD = $(LDADD)
+neon128_LINK = $(CCLD) $(neon128_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
+ $(LDFLAGS) -o $@
+neon64_SOURCES = neon64.c
+neon64_OBJECTS = neon64-neon64.$(OBJEXT)
+neon64_LDADD = $(LDADD)
+neon64_LINK = $(CCLD) $(neon64_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
+ $(LDFLAGS) -o $@
+v6intARM_SOURCES = v6intARM.c
+v6intARM_OBJECTS = v6intARM-v6intARM.$(OBJEXT)
+v6intARM_LDADD = $(LDADD)
+v6intARM_LINK = $(CCLD) $(v6intARM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
+ $(LDFLAGS) -o $@
+v6intThumb_SOURCES = v6intThumb.c
+v6intThumb_OBJECTS = v6intThumb-v6intThumb.$(OBJEXT)
+v6intThumb_LDADD = $(LDADD)
+v6intThumb_LINK = $(CCLD) $(v6intThumb_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
+ $(LDFLAGS) -o $@
+v6media_SOURCES = v6media.c
+v6media_OBJECTS = v6media-v6media.$(OBJEXT)
+v6media_LDADD = $(LDADD)
+v6media_LINK = $(CCLD) $(v6media_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
+ $(LDFLAGS) -o $@
+vfp_SOURCES = vfp.c
+vfp_OBJECTS = vfp-vfp.$(OBJEXT)
+vfp_LDADD = $(LDADD)
+vfp_LINK = $(CCLD) $(vfp_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) -o \
+ $@
+SCRIPTS = $(dist_noinst_SCRIPTS)
+DEFAULT_INCLUDES = -I. -I$(top_builddir)
+depcomp = $(SHELL) $(top_srcdir)/depcomp
+am__depfiles_maybe = depfiles
+COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
+ $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
+CCLD = $(CC)
+LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) -o $@
+SOURCES = neon128.c neon64.c v6intARM.c v6intThumb.c v6media.c vfp.c
+DIST_SOURCES = neon128.c neon64.c v6intARM.c v6intThumb.c v6media.c \
+ vfp.c
+ETAGS = etags
+CTAGS = ctags
+DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST)
+ACLOCAL = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run aclocal-1.10
+AMTAR = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run tar
+AR = /scratchbox/compilers/bin/ar
+AUTOCONF = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run autoconf
+AUTOHEADER = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run autoheader
+AUTOMAKE = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run automake-1.10
+AWK = gawk
+BOOST_CFLAGS =
+BOOST_LIBS =
+CC = gcc
+CCAS = gcc
+CCASDEPMODE = depmode=gcc3
+CCASFLAGS = -Wno-long-long
+CCDEPMODE = depmode=gcc3
+CFLAGS = -Wno-long-long -Wno-pointer-sign -fno-stack-protector
+CPP = gcc -E
+CPPFLAGS =
+CXX = g++
+CXXDEPMODE = depmode=gcc3
+CXXFLAGS = -g -O2
+CYGPATH_W = echo
+DEFAULT_SUPP = exp-ptrcheck.supp xfree-3.supp xfree-4.supp glibc-2.X-drd.supp glibc-2.34567-NPTL-helgrind.supp glibc-2.X.supp
+DEFS = -DHAVE_CONFIG_H
+DEPDIR = .deps
+DIFF = diff -u
+ECHO_C =
+ECHO_N = -n
+ECHO_T =
+EGREP = /scratchbox/tools/bin/grep -E
+EXEEXT =
+FLAG_FNO_STACK_PROTECTOR = -fno-stack-protector
+FLAG_M32 =
+FLAG_M64 =
+FLAG_MAIX32 =
+FLAG_MAIX64 =
+FLAG_MMMX =
+FLAG_MSSE =
+FLAG_NO_BUILD_ID = -Wl,--build-id=none
+FLAG_UNLIMITED_INLINE_UNIT_GROWTH = --param inline-unit-growth=900
+FLAG_W_EXTRA = -Wextra
+FLAG_W_NO_EMPTY_BODY = -Wno-empty-body
+FLAG_W_NO_FORMAT_ZERO_LENGTH = -Wno-format-zero-length
+FLAG_W_NO_UNINITIALIZED = -Wno-uninitialized
+GDB = /targets/links/arch_tools/bin/gdb
+GLIBC_VERSION = 2.11
+GREP = /scratchbox/tools/bin/grep
+INSTALL = /scratchbox/tools/bin/install -c
+INSTALL_DATA = ${INSTALL} -m 644
+INSTALL_PROGRAM = ${INSTALL}
+INSTALL_SCRIPT = ${INSTALL}
+INSTALL_STRIP_PROGRAM = $(install_sh) -c -s
+LDFLAGS = -Wl,--hash-style=both
+LIBOBJS =
+LIBS =
+LN_S = ln -s
+LTLIBOBJS =
+MAINT = #
+MAKEINFO = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run makeinfo
+MKDIR_P = /scratchbox/tools/bin/mkdir -p
+MPI_CC = mpicc
+OBJEXT = o
+PACKAGE = valgrind
+PACKAGE_BUGREPORT = valgrind-users@lists.sourceforge.net
+PACKAGE_NAME = Valgrind
+PACKAGE_STRING = Valgrind 3.6.0.SVN
+PACKAGE_TARNAME = valgrind
+PACKAGE_VERSION = 3.6.0.SVN
+PATH_SEPARATOR = :
+PERL = /scratchbox/tools/bin/perl
+PKG_CONFIG = /scratchbox/tools/bin/pkg-config
+PREFERRED_STACK_BOUNDARY =
+QTCORE_CFLAGS =
+QTCORE_LIBS =
+RANLIB = ranlib
+SED = /scratchbox/tools/bin/sed
+SET_MAKE =
+SHELL = /bin/sh
+STRIP =
+VALT_LOAD_ADDRESS_PRI = 0x38000000
+VALT_LOAD_ADDRESS_SEC = 0xUNSET
+VERSION = 3.6.0.SVN
+VGCONF_ARCH_PRI = arm
+VGCONF_ARCH_SEC =
+VGCONF_OS = linux
+VGCONF_PLATFORM_PRI_CAPS = ARM_LINUX
+VGCONF_PLATFORM_SEC_CAPS =
+abs_builddir = /home/ubuntu/valgrind-3.5.0/none/tests/arm
+abs_srcdir = /home/ubuntu/valgrind-3.5.0/none/tests/arm
+abs_top_builddir = /home/ubuntu/valgrind-3.5.0
+abs_top_srcdir = /home/ubuntu/valgrind-3.5.0
+ac_ct_CC = gcc
+ac_ct_CXX = g++
+am__include = include
+am__leading_dot = .
+am__quote =
+am__tar = ${AMTAR} chof - "$$tardir"
+am__untar = ${AMTAR} xf -
+bindir = ${exec_prefix}/bin
+build = arm-unknown-linux-gnueabi
+build_alias =
+build_cpu = arm
+build_os = linux-gnueabi
+build_vendor = unknown
+builddir = .
+datadir = ${datarootdir}
+datarootdir = ${prefix}/share
+docdir = ${datarootdir}/doc/${PACKAGE_TARNAME}
+dvidir = ${docdir}
+exec_prefix = ${prefix}
+host = arm-unknown-linux-gnueabi
+host_alias =
+host_cpu = arm
+host_os = linux-gnueabi
+host_vendor = unknown
+htmldir = ${docdir}
+includedir = ${prefix}/include
+infodir = ${datarootdir}/info
+install_sh = $(SHELL) /home/ubuntu/valgrind-3.5.0/install-sh
+libdir = ${exec_prefix}/lib
+libexecdir = ${exec_prefix}/libexec
+localedir = ${datarootdir}/locale
+localstatedir = ${prefix}/var
+mandir = ${datarootdir}/man
+mkdir_p = /scratchbox/tools/bin/mkdir -p
+oldincludedir = /usr/include
+pdfdir = ${docdir}
+prefix = /usr
+program_transform_name = s,x,x,
+psdir = ${docdir}
+sbindir = ${exec_prefix}/sbin
+sharedstatedir = ${prefix}/com
+srcdir = .
+sysconfdir = ${prefix}/etc
+target_alias =
+top_builddir = ../../..
+top_srcdir = ../../..
+inplacedir = $(top_builddir)/.in_place
+
+#----------------------------------------------------------------------------
+# Flags
+#----------------------------------------------------------------------------
+
+# Baseline flags for all compilations. Aim here is to maximise
+# performance and get whatever useful warnings we can out of gcc.
+AM_CFLAGS_BASE = \
+ -O2 -g \
+ -Wall \
+ -Wmissing-prototypes \
+ -Wshadow \
+ -Wpointer-arith \
+ -Wstrict-prototypes \
+ -Wmissing-declarations \
+ -Wno-format-zero-length \
+ -fno-strict-aliasing
+
+AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+#AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+# -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
+# and so the CPPFLAGS are passed to the assembler. But this is not true for
+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
+# AM_CPPFLAGS_<PLATFORM> in each AM_CCASFLAGS_<PLATFORM> variable. This
+# means some of the flags are duplicated on systems with newer versions of
+# automake, but this does not really matter and seems hard to avoid.
+AM_CPPFLAGS_ARM_LINUX = \
+ -I$(top_srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_arm=1 \
+ -DVGO_linux=1 \
+ -DVGP_arm_linux=1
+
+#AM_CPPFLAGS_ = \
+# -I$(top_srcdir) \
+# -I$(top_srcdir)/include \
+# -I$(top_srcdir)/VEX/pub \
+# -DVGA_=1 \
+# -DVGO_linux=1 \
+# -DVGP__linux=1
+
+AM_FLAG_M3264_X86_LINUX =
+AM_CFLAGS_X86_LINUX = \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) -g
+AM_FLAG_M3264_AMD64_LINUX =
+AM_CFLAGS_AMD64_LINUX = -fomit-frame-pointer \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) -g
+AM_FLAG_M3264_PPC32_LINUX =
+AM_CFLAGS_PPC32_LINUX = $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_LINUX = $(AM_CPPFLAGS_PPC32_LINUX) -g
+AM_FLAG_M3264_PPC64_LINUX =
+AM_CFLAGS_PPC64_LINUX = $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_LINUX = $(AM_CPPFLAGS_PPC64_LINUX) -g
+AM_FLAG_M3264_ARM_LINUX =
+AM_CFLAGS_ARM_LINUX = \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) -g
+AM_FLAG_M3264_PPC32_AIX5 =
+AM_CFLAGS_PPC32_AIX5 = -mcpu=powerpc $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
+ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 =
+AM_CFLAGS_PPC64_AIX5 = -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 \
+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_ARM_LINUX)
+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_ARM_LINUX)
+AM_CFLAGS_PRI = $(AM_CFLAGS_ARM_LINUX)
+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_ARM_LINUX)
+AM_FLAG_M3264_SEC =
+#AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
+# as $(AM_FLAG_M3264_PRI).
+AM_CFLAGS = -Winline -Wall -Wshadow -g
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS)
+#noinst_DSYMS = $(check_PROGRAMS)
+dist_noinst_SCRIPTS = filter_stderr
+EXTRA_DIST = \
+ neon128.stdout.exp neon128.stderr.exp neon128.vgtest \
+ neon64.stdout.exp neon64.stderr.exp neon64.vgtest \
+ v6intARM.stdout.exp v6intARM.stderr.exp v6intARM.vgtest \
+ v6intThumb.stdout.exp v6intThumb.stderr.exp v6intThumb.vgtest \
+ v6media.stdout.exp v6media.stderr.exp v6media.vgtest \
+ vfp.stdout.exp vfp.stderr.exp vfp.vgtest
+
+
+# These two are specific to their ARM/Thumb respectively and so we
+# hardwire -marm/-mthumb. neon64 and neon128 are compilable on both,
+# however, ask for them to be compiled on thumb, as that looks
+# like that's going to be the more common use case. They also
+# need special helping w.r.t -mfpu and -mfloat-abi, though.
+# Also force -O0 since -O takes hundreds of MB of memory
+# for v6intThumb.c.
+v6intARM_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -marm
+v6intThumb_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -mthumb
+v6media_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -mthumb
+vfp_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 \
+ -mfpu=neon -mfloat-abi=softfp \
+ -mthumb
+
+neon128_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 \
+ -mfpu=neon -mfloat-abi=softfp \
+ -mthumb
+
+neon64_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 \
+ -mfpu=neon -mfloat-abi=softfp \
+ -mthumb
+
+all: all-am
+
+.SUFFIXES:
+.SUFFIXES: .c .o .obj
+$(srcdir)/Makefile.in: # $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/arm/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/arm/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: # $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): # $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
+ -test -z "$(check_PROGRAMS)" || rm -f $(check_PROGRAMS)
+neon128$(EXEEXT): $(neon128_OBJECTS) $(neon128_DEPENDENCIES)
+ @rm -f neon128$(EXEEXT)
+ $(neon128_LINK) $(neon128_OBJECTS) $(neon128_LDADD) $(LIBS)
+neon64$(EXEEXT): $(neon64_OBJECTS) $(neon64_DEPENDENCIES)
+ @rm -f neon64$(EXEEXT)
+ $(neon64_LINK) $(neon64_OBJECTS) $(neon64_LDADD) $(LIBS)
+v6intARM$(EXEEXT): $(v6intARM_OBJECTS) $(v6intARM_DEPENDENCIES)
+ @rm -f v6intARM$(EXEEXT)
+ $(v6intARM_LINK) $(v6intARM_OBJECTS) $(v6intARM_LDADD) $(LIBS)
+v6intThumb$(EXEEXT): $(v6intThumb_OBJECTS) $(v6intThumb_DEPENDENCIES)
+ @rm -f v6intThumb$(EXEEXT)
+ $(v6intThumb_LINK) $(v6intThumb_OBJECTS) $(v6intThumb_LDADD) $(LIBS)
+v6media$(EXEEXT): $(v6media_OBJECTS) $(v6media_DEPENDENCIES)
+ @rm -f v6media$(EXEEXT)
+ $(v6media_LINK) $(v6media_OBJECTS) $(v6media_LDADD) $(LIBS)
+vfp$(EXEEXT): $(vfp_OBJECTS) $(vfp_DEPENDENCIES)
+ @rm -f vfp$(EXEEXT)
+ $(vfp_LINK) $(vfp_OBJECTS) $(vfp_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+include ./$(DEPDIR)/neon128-neon128.Po
+include ./$(DEPDIR)/neon64-neon64.Po
+include ./$(DEPDIR)/v6intARM-v6intARM.Po
+include ./$(DEPDIR)/v6intThumb-v6intThumb.Po
+include ./$(DEPDIR)/v6media-v6media.Po
+include ./$(DEPDIR)/vfp-vfp.Po
+
+.c.o:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c $<
+
+.c.obj:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
+neon128-neon128.o: neon128.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon128_CFLAGS) $(CFLAGS) -MT neon128-neon128.o -MD -MP -MF $(DEPDIR)/neon128-neon128.Tpo -c -o neon128-neon128.o `test -f 'neon128.c' || echo '$(srcdir)/'`neon128.c
+ mv -f $(DEPDIR)/neon128-neon128.Tpo $(DEPDIR)/neon128-neon128.Po
+# source='neon128.c' object='neon128-neon128.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon128_CFLAGS) $(CFLAGS) -c -o neon128-neon128.o `test -f 'neon128.c' || echo '$(srcdir)/'`neon128.c
+
+neon128-neon128.obj: neon128.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon128_CFLAGS) $(CFLAGS) -MT neon128-neon128.obj -MD -MP -MF $(DEPDIR)/neon128-neon128.Tpo -c -o neon128-neon128.obj `if test -f 'neon128.c'; then $(CYGPATH_W) 'neon128.c'; else $(CYGPATH_W) '$(srcdir)/neon128.c'; fi`
+ mv -f $(DEPDIR)/neon128-neon128.Tpo $(DEPDIR)/neon128-neon128.Po
+# source='neon128.c' object='neon128-neon128.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon128_CFLAGS) $(CFLAGS) -c -o neon128-neon128.obj `if test -f 'neon128.c'; then $(CYGPATH_W) 'neon128.c'; else $(CYGPATH_W) '$(srcdir)/neon128.c'; fi`
+
+neon64-neon64.o: neon64.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon64_CFLAGS) $(CFLAGS) -MT neon64-neon64.o -MD -MP -MF $(DEPDIR)/neon64-neon64.Tpo -c -o neon64-neon64.o `test -f 'neon64.c' || echo '$(srcdir)/'`neon64.c
+ mv -f $(DEPDIR)/neon64-neon64.Tpo $(DEPDIR)/neon64-neon64.Po
+# source='neon64.c' object='neon64-neon64.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon64_CFLAGS) $(CFLAGS) -c -o neon64-neon64.o `test -f 'neon64.c' || echo '$(srcdir)/'`neon64.c
+
+neon64-neon64.obj: neon64.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon64_CFLAGS) $(CFLAGS) -MT neon64-neon64.obj -MD -MP -MF $(DEPDIR)/neon64-neon64.Tpo -c -o neon64-neon64.obj `if test -f 'neon64.c'; then $(CYGPATH_W) 'neon64.c'; else $(CYGPATH_W) '$(srcdir)/neon64.c'; fi`
+ mv -f $(DEPDIR)/neon64-neon64.Tpo $(DEPDIR)/neon64-neon64.Po
+# source='neon64.c' object='neon64-neon64.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon64_CFLAGS) $(CFLAGS) -c -o neon64-neon64.obj `if test -f 'neon64.c'; then $(CYGPATH_W) 'neon64.c'; else $(CYGPATH_W) '$(srcdir)/neon64.c'; fi`
+
+v6intARM-v6intARM.o: v6intARM.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intARM_CFLAGS) $(CFLAGS) -MT v6intARM-v6intARM.o -MD -MP -MF $(DEPDIR)/v6intARM-v6intARM.Tpo -c -o v6intARM-v6intARM.o `test -f 'v6intARM.c' || echo '$(srcdir)/'`v6intARM.c
+ mv -f $(DEPDIR)/v6intARM-v6intARM.Tpo $(DEPDIR)/v6intARM-v6intARM.Po
+# source='v6intARM.c' object='v6intARM-v6intARM.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intARM_CFLAGS) $(CFLAGS) -c -o v6intARM-v6intARM.o `test -f 'v6intARM.c' || echo '$(srcdir)/'`v6intARM.c
+
+v6intARM-v6intARM.obj: v6intARM.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intARM_CFLAGS) $(CFLAGS) -MT v6intARM-v6intARM.obj -MD -MP -MF $(DEPDIR)/v6intARM-v6intARM.Tpo -c -o v6intARM-v6intARM.obj `if test -f 'v6intARM.c'; then $(CYGPATH_W) 'v6intARM.c'; else $(CYGPATH_W) '$(srcdir)/v6intARM.c'; fi`
+ mv -f $(DEPDIR)/v6intARM-v6intARM.Tpo $(DEPDIR)/v6intARM-v6intARM.Po
+# source='v6intARM.c' object='v6intARM-v6intARM.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intARM_CFLAGS) $(CFLAGS) -c -o v6intARM-v6intARM.obj `if test -f 'v6intARM.c'; then $(CYGPATH_W) 'v6intARM.c'; else $(CYGPATH_W) '$(srcdir)/v6intARM.c'; fi`
+
+v6intThumb-v6intThumb.o: v6intThumb.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intThumb_CFLAGS) $(CFLAGS) -MT v6intThumb-v6intThumb.o -MD -MP -MF $(DEPDIR)/v6intThumb-v6intThumb.Tpo -c -o v6intThumb-v6intThumb.o `test -f 'v6intThumb.c' || echo '$(srcdir)/'`v6intThumb.c
+ mv -f $(DEPDIR)/v6intThumb-v6intThumb.Tpo $(DEPDIR)/v6intThumb-v6intThumb.Po
+# source='v6intThumb.c' object='v6intThumb-v6intThumb.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intThumb_CFLAGS) $(CFLAGS) -c -o v6intThumb-v6intThumb.o `test -f 'v6intThumb.c' || echo '$(srcdir)/'`v6intThumb.c
+
+v6intThumb-v6intThumb.obj: v6intThumb.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intThumb_CFLAGS) $(CFLAGS) -MT v6intThumb-v6intThumb.obj -MD -MP -MF $(DEPDIR)/v6intThumb-v6intThumb.Tpo -c -o v6intThumb-v6intThumb.obj `if test -f 'v6intThumb.c'; then $(CYGPATH_W) 'v6intThumb.c'; else $(CYGPATH_W) '$(srcdir)/v6intThumb.c'; fi`
+ mv -f $(DEPDIR)/v6intThumb-v6intThumb.Tpo $(DEPDIR)/v6intThumb-v6intThumb.Po
+# source='v6intThumb.c' object='v6intThumb-v6intThumb.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intThumb_CFLAGS) $(CFLAGS) -c -o v6intThumb-v6intThumb.obj `if test -f 'v6intThumb.c'; then $(CYGPATH_W) 'v6intThumb.c'; else $(CYGPATH_W) '$(srcdir)/v6intThumb.c'; fi`
+
+v6media-v6media.o: v6media.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6media_CFLAGS) $(CFLAGS) -MT v6media-v6media.o -MD -MP -MF $(DEPDIR)/v6media-v6media.Tpo -c -o v6media-v6media.o `test -f 'v6media.c' || echo '$(srcdir)/'`v6media.c
+ mv -f $(DEPDIR)/v6media-v6media.Tpo $(DEPDIR)/v6media-v6media.Po
+# source='v6media.c' object='v6media-v6media.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6media_CFLAGS) $(CFLAGS) -c -o v6media-v6media.o `test -f 'v6media.c' || echo '$(srcdir)/'`v6media.c
+
+v6media-v6media.obj: v6media.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6media_CFLAGS) $(CFLAGS) -MT v6media-v6media.obj -MD -MP -MF $(DEPDIR)/v6media-v6media.Tpo -c -o v6media-v6media.obj `if test -f 'v6media.c'; then $(CYGPATH_W) 'v6media.c'; else $(CYGPATH_W) '$(srcdir)/v6media.c'; fi`
+ mv -f $(DEPDIR)/v6media-v6media.Tpo $(DEPDIR)/v6media-v6media.Po
+# source='v6media.c' object='v6media-v6media.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6media_CFLAGS) $(CFLAGS) -c -o v6media-v6media.obj `if test -f 'v6media.c'; then $(CYGPATH_W) 'v6media.c'; else $(CYGPATH_W) '$(srcdir)/v6media.c'; fi`
+
+vfp-vfp.o: vfp.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(vfp_CFLAGS) $(CFLAGS) -MT vfp-vfp.o -MD -MP -MF $(DEPDIR)/vfp-vfp.Tpo -c -o vfp-vfp.o `test -f 'vfp.c' || echo '$(srcdir)/'`vfp.c
+ mv -f $(DEPDIR)/vfp-vfp.Tpo $(DEPDIR)/vfp-vfp.Po
+# source='vfp.c' object='vfp-vfp.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(vfp_CFLAGS) $(CFLAGS) -c -o vfp-vfp.o `test -f 'vfp.c' || echo '$(srcdir)/'`vfp.c
+
+vfp-vfp.obj: vfp.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(vfp_CFLAGS) $(CFLAGS) -MT vfp-vfp.obj -MD -MP -MF $(DEPDIR)/vfp-vfp.Tpo -c -o vfp-vfp.obj `if test -f 'vfp.c'; then $(CYGPATH_W) 'vfp.c'; else $(CYGPATH_W) '$(srcdir)/vfp.c'; fi`
+ mv -f $(DEPDIR)/vfp-vfp.Tpo $(DEPDIR)/vfp-vfp.Po
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+check-local: build-noinst_DSYMS
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--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
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+#----------------------------------------------------------------------------
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+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGP_@VGCONF_ARCH_SEC@_@VGCONF_OS@=1
+
+AM_FLAG_M3264_X86_LINUX = @FLAG_M32@
+AM_CFLAGS_X86_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_AMD64_LINUX = @FLAG_M64@
+AM_CFLAGS_AMD64_LINUX = @FLAG_M64@ -fomit-frame-pointer \
+ @PREFERRED_STACK_BOUNDARY@ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) @FLAG_M64@ -g
+AM_FLAG_M3264_PPC32_LINUX = @FLAG_M32@
+AM_CFLAGS_PPC32_LINUX = @FLAG_M32@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_LINUX = $(AM_CPPFLAGS_PPC32_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_PPC64_LINUX = @FLAG_M64@
+AM_CFLAGS_PPC64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_LINUX = $(AM_CPPFLAGS_PPC64_LINUX) @FLAG_M64@ -g
+AM_FLAG_M3264_ARM_LINUX = @FLAG_M32@
+AM_CFLAGS_ARM_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_PPC32_AIX5 = @FLAG_MAIX32@
+AM_CFLAGS_PPC32_AIX5 = @FLAG_MAIX32@ -mcpu=powerpc $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
+ @FLAG_MAIX32@ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 = @FLAG_MAIX64@
+AM_CFLAGS_PPC64_AIX5 = @FLAG_MAIX64@ -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ @FLAG_MAIX64@ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 \
+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CFLAGS_PRI = $(AM_CFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+@VGCONF_HAVE_PLATFORM_SEC_FALSE@AM_FLAG_M3264_SEC =
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_@VGCONF_PLATFORM_SEC_CAPS@)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX32@
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX64@
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
+# as $(AM_FLAG_M3264_PRI).
+AM_CFLAGS = -Winline -Wall -Wshadow -g @FLAG_M32@
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g @FLAG_M32@
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS) @FLAG_M32@
+@VGCONF_OS_IS_DARWIN_TRUE@noinst_DSYMS = $(check_PROGRAMS)
+dist_noinst_SCRIPTS = filter_stderr
+EXTRA_DIST = \
+ neon128.stdout.exp neon128.stderr.exp neon128.vgtest \
+ neon64.stdout.exp neon64.stderr.exp neon64.vgtest \
+ v6intARM.stdout.exp v6intARM.stderr.exp v6intARM.vgtest \
+ v6intThumb.stdout.exp v6intThumb.stderr.exp v6intThumb.vgtest \
+ v6media.stdout.exp v6media.stderr.exp v6media.vgtest \
+ vfp.stdout.exp vfp.stderr.exp vfp.vgtest
+
+
+# These two are specific to their ARM/Thumb respectively and so we
+# hardwire -marm/-mthumb. neon64 and neon128 are compilable on both,
+# however, ask for them to be compiled on thumb, as that looks
+# like that's going to be the more common use case. They also
+# need special helping w.r.t -mfpu and -mfloat-abi, though.
+# Also force -O0 since -O takes hundreds of MB of memory
+# for v6intThumb.c.
+v6intARM_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -marm
+v6intThumb_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -mthumb
+v6media_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -mthumb
+vfp_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 \
+ -mfpu=neon -mfloat-abi=softfp \
+ -mthumb
+
+neon128_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 \
+ -mfpu=neon -mfloat-abi=softfp \
+ -mthumb
+
+neon64_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 \
+ -mfpu=neon -mfloat-abi=softfp \
+ -mthumb
+
+all: all-am
+
+.SUFFIXES:
+.SUFFIXES: .c .o .obj
+$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/arm/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/arm/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
+ -test -z "$(check_PROGRAMS)" || rm -f $(check_PROGRAMS)
+neon128$(EXEEXT): $(neon128_OBJECTS) $(neon128_DEPENDENCIES)
+ @rm -f neon128$(EXEEXT)
+ $(neon128_LINK) $(neon128_OBJECTS) $(neon128_LDADD) $(LIBS)
+neon64$(EXEEXT): $(neon64_OBJECTS) $(neon64_DEPENDENCIES)
+ @rm -f neon64$(EXEEXT)
+ $(neon64_LINK) $(neon64_OBJECTS) $(neon64_LDADD) $(LIBS)
+v6intARM$(EXEEXT): $(v6intARM_OBJECTS) $(v6intARM_DEPENDENCIES)
+ @rm -f v6intARM$(EXEEXT)
+ $(v6intARM_LINK) $(v6intARM_OBJECTS) $(v6intARM_LDADD) $(LIBS)
+v6intThumb$(EXEEXT): $(v6intThumb_OBJECTS) $(v6intThumb_DEPENDENCIES)
+ @rm -f v6intThumb$(EXEEXT)
+ $(v6intThumb_LINK) $(v6intThumb_OBJECTS) $(v6intThumb_LDADD) $(LIBS)
+v6media$(EXEEXT): $(v6media_OBJECTS) $(v6media_DEPENDENCIES)
+ @rm -f v6media$(EXEEXT)
+ $(v6media_LINK) $(v6media_OBJECTS) $(v6media_LDADD) $(LIBS)
+vfp$(EXEEXT): $(vfp_OBJECTS) $(vfp_DEPENDENCIES)
+ @rm -f vfp$(EXEEXT)
+ $(vfp_LINK) $(vfp_OBJECTS) $(vfp_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/neon128-neon128.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/neon64-neon64.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/v6intARM-v6intARM.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/v6intThumb-v6intThumb.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/v6media-v6media.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vfp-vfp.Po@am__quote@
+
+.c.o:
+@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(COMPILE) -c $<
+
+.c.obj:
+@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
+neon128-neon128.o: neon128.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon128_CFLAGS) $(CFLAGS) -MT neon128-neon128.o -MD -MP -MF $(DEPDIR)/neon128-neon128.Tpo -c -o neon128-neon128.o `test -f 'neon128.c' || echo '$(srcdir)/'`neon128.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/neon128-neon128.Tpo $(DEPDIR)/neon128-neon128.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='neon128.c' object='neon128-neon128.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon128_CFLAGS) $(CFLAGS) -c -o neon128-neon128.o `test -f 'neon128.c' || echo '$(srcdir)/'`neon128.c
+
+neon128-neon128.obj: neon128.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon128_CFLAGS) $(CFLAGS) -MT neon128-neon128.obj -MD -MP -MF $(DEPDIR)/neon128-neon128.Tpo -c -o neon128-neon128.obj `if test -f 'neon128.c'; then $(CYGPATH_W) 'neon128.c'; else $(CYGPATH_W) '$(srcdir)/neon128.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/neon128-neon128.Tpo $(DEPDIR)/neon128-neon128.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='neon128.c' object='neon128-neon128.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon128_CFLAGS) $(CFLAGS) -c -o neon128-neon128.obj `if test -f 'neon128.c'; then $(CYGPATH_W) 'neon128.c'; else $(CYGPATH_W) '$(srcdir)/neon128.c'; fi`
+
+neon64-neon64.o: neon64.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon64_CFLAGS) $(CFLAGS) -MT neon64-neon64.o -MD -MP -MF $(DEPDIR)/neon64-neon64.Tpo -c -o neon64-neon64.o `test -f 'neon64.c' || echo '$(srcdir)/'`neon64.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/neon64-neon64.Tpo $(DEPDIR)/neon64-neon64.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='neon64.c' object='neon64-neon64.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon64_CFLAGS) $(CFLAGS) -c -o neon64-neon64.o `test -f 'neon64.c' || echo '$(srcdir)/'`neon64.c
+
+neon64-neon64.obj: neon64.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon64_CFLAGS) $(CFLAGS) -MT neon64-neon64.obj -MD -MP -MF $(DEPDIR)/neon64-neon64.Tpo -c -o neon64-neon64.obj `if test -f 'neon64.c'; then $(CYGPATH_W) 'neon64.c'; else $(CYGPATH_W) '$(srcdir)/neon64.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/neon64-neon64.Tpo $(DEPDIR)/neon64-neon64.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='neon64.c' object='neon64-neon64.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(neon64_CFLAGS) $(CFLAGS) -c -o neon64-neon64.obj `if test -f 'neon64.c'; then $(CYGPATH_W) 'neon64.c'; else $(CYGPATH_W) '$(srcdir)/neon64.c'; fi`
+
+v6intARM-v6intARM.o: v6intARM.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intARM_CFLAGS) $(CFLAGS) -MT v6intARM-v6intARM.o -MD -MP -MF $(DEPDIR)/v6intARM-v6intARM.Tpo -c -o v6intARM-v6intARM.o `test -f 'v6intARM.c' || echo '$(srcdir)/'`v6intARM.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/v6intARM-v6intARM.Tpo $(DEPDIR)/v6intARM-v6intARM.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='v6intARM.c' object='v6intARM-v6intARM.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intARM_CFLAGS) $(CFLAGS) -c -o v6intARM-v6intARM.o `test -f 'v6intARM.c' || echo '$(srcdir)/'`v6intARM.c
+
+v6intARM-v6intARM.obj: v6intARM.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intARM_CFLAGS) $(CFLAGS) -MT v6intARM-v6intARM.obj -MD -MP -MF $(DEPDIR)/v6intARM-v6intARM.Tpo -c -o v6intARM-v6intARM.obj `if test -f 'v6intARM.c'; then $(CYGPATH_W) 'v6intARM.c'; else $(CYGPATH_W) '$(srcdir)/v6intARM.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/v6intARM-v6intARM.Tpo $(DEPDIR)/v6intARM-v6intARM.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='v6intARM.c' object='v6intARM-v6intARM.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intARM_CFLAGS) $(CFLAGS) -c -o v6intARM-v6intARM.obj `if test -f 'v6intARM.c'; then $(CYGPATH_W) 'v6intARM.c'; else $(CYGPATH_W) '$(srcdir)/v6intARM.c'; fi`
+
+v6intThumb-v6intThumb.o: v6intThumb.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intThumb_CFLAGS) $(CFLAGS) -MT v6intThumb-v6intThumb.o -MD -MP -MF $(DEPDIR)/v6intThumb-v6intThumb.Tpo -c -o v6intThumb-v6intThumb.o `test -f 'v6intThumb.c' || echo '$(srcdir)/'`v6intThumb.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/v6intThumb-v6intThumb.Tpo $(DEPDIR)/v6intThumb-v6intThumb.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='v6intThumb.c' object='v6intThumb-v6intThumb.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intThumb_CFLAGS) $(CFLAGS) -c -o v6intThumb-v6intThumb.o `test -f 'v6intThumb.c' || echo '$(srcdir)/'`v6intThumb.c
+
+v6intThumb-v6intThumb.obj: v6intThumb.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intThumb_CFLAGS) $(CFLAGS) -MT v6intThumb-v6intThumb.obj -MD -MP -MF $(DEPDIR)/v6intThumb-v6intThumb.Tpo -c -o v6intThumb-v6intThumb.obj `if test -f 'v6intThumb.c'; then $(CYGPATH_W) 'v6intThumb.c'; else $(CYGPATH_W) '$(srcdir)/v6intThumb.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/v6intThumb-v6intThumb.Tpo $(DEPDIR)/v6intThumb-v6intThumb.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='v6intThumb.c' object='v6intThumb-v6intThumb.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6intThumb_CFLAGS) $(CFLAGS) -c -o v6intThumb-v6intThumb.obj `if test -f 'v6intThumb.c'; then $(CYGPATH_W) 'v6intThumb.c'; else $(CYGPATH_W) '$(srcdir)/v6intThumb.c'; fi`
+
+v6media-v6media.o: v6media.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6media_CFLAGS) $(CFLAGS) -MT v6media-v6media.o -MD -MP -MF $(DEPDIR)/v6media-v6media.Tpo -c -o v6media-v6media.o `test -f 'v6media.c' || echo '$(srcdir)/'`v6media.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/v6media-v6media.Tpo $(DEPDIR)/v6media-v6media.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='v6media.c' object='v6media-v6media.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6media_CFLAGS) $(CFLAGS) -c -o v6media-v6media.o `test -f 'v6media.c' || echo '$(srcdir)/'`v6media.c
+
+v6media-v6media.obj: v6media.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6media_CFLAGS) $(CFLAGS) -MT v6media-v6media.obj -MD -MP -MF $(DEPDIR)/v6media-v6media.Tpo -c -o v6media-v6media.obj `if test -f 'v6media.c'; then $(CYGPATH_W) 'v6media.c'; else $(CYGPATH_W) '$(srcdir)/v6media.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/v6media-v6media.Tpo $(DEPDIR)/v6media-v6media.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='v6media.c' object='v6media-v6media.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(v6media_CFLAGS) $(CFLAGS) -c -o v6media-v6media.obj `if test -f 'v6media.c'; then $(CYGPATH_W) 'v6media.c'; else $(CYGPATH_W) '$(srcdir)/v6media.c'; fi`
+
+vfp-vfp.o: vfp.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(vfp_CFLAGS) $(CFLAGS) -MT vfp-vfp.o -MD -MP -MF $(DEPDIR)/vfp-vfp.Tpo -c -o vfp-vfp.o `test -f 'vfp.c' || echo '$(srcdir)/'`vfp.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/vfp-vfp.Tpo $(DEPDIR)/vfp-vfp.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='vfp.c' object='vfp-vfp.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(vfp_CFLAGS) $(CFLAGS) -c -o vfp-vfp.o `test -f 'vfp.c' || echo '$(srcdir)/'`vfp.c
+
+vfp-vfp.obj: vfp.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(vfp_CFLAGS) $(CFLAGS) -MT vfp-vfp.obj -MD -MP -MF $(DEPDIR)/vfp-vfp.Tpo -c -o vfp-vfp.obj `if test -f 'vfp.c'; then $(CYGPATH_W) 'vfp.c'; else $(CYGPATH_W) '$(srcdir)/vfp.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/vfp-vfp.Tpo $(DEPDIR)/vfp-vfp.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='vfp.c' object='vfp-vfp.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(vfp_CFLAGS) $(CFLAGS) -c -o vfp-vfp.obj `if test -f 'vfp.c'; then $(CYGPATH_W) 'vfp.c'; else $(CYGPATH_W) '$(srcdir)/vfp.c'; fi`
+
+ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES)
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ mkid -fID $$unique
+tags: TAGS
+
+TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ here=`pwd`; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ if test -z "$(ETAGS_ARGS)$$tags$$unique"; then :; else \
+ test -n "$$unique" || unique=$$empty_fix; \
+ $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
+ $$tags $$unique; \
+ fi
+ctags: CTAGS
+CTAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ test -z "$(CTAGS_ARGS)$$tags$$unique" \
+ || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
+ $$tags $$unique
+
+GTAGS:
+ here=`$(am__cd) $(top_builddir) && pwd` \
+ && cd $(top_srcdir) \
+ && gtags -i $(GTAGS_ARGS) $$here
+
+distclean-tags:
+ -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
+
+distdir: $(DISTFILES)
+ @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ list='$(DISTFILES)'; \
+ dist_files=`for file in $$list; do echo $$file; done | \
+ sed -e "s|^$$srcdirstrip/||;t" \
+ -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \
+ case $$dist_files in \
+ */*) $(MKDIR_P) `echo "$$dist_files" | \
+ sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \
+ sort -u` ;; \
+ esac; \
+ for file in $$dist_files; do \
+ if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \
+ if test -d $$d/$$file; then \
+ dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \
+ if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \
+ cp -pR $(srcdir)/$$file $(distdir)$$dir || exit 1; \
+ fi; \
+ cp -pR $$d/$$file $(distdir)$$dir || exit 1; \
+ else \
+ test -f $(distdir)/$$file \
+ || cp -p $$d/$$file $(distdir)/$$file \
+ || exit 1; \
+ fi; \
+ done
+check-am: all-am
+ $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
+ $(MAKE) $(AM_MAKEFLAGS) check-local
+check: check-am
+all-am: Makefile $(SCRIPTS)
+installdirs:
+install: install-am
+install-exec: install-exec-am
+install-data: install-data-am
+uninstall: uninstall-am
+
+install-am: all-am
+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+
+installcheck: installcheck-am
+install-strip:
+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+ `test -z '$(STRIP)' || \
+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
+ @echo "This command is intended for maintainers to use"
+ @echo "it deletes files that may require special tools to rebuild."
+clean: clean-am
+
+clean-am: clean-checkPROGRAMS clean-generic clean-local mostlyclean-am
+
+distclean: distclean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+distclean-am: clean-am distclean-compile distclean-generic \
+ distclean-tags
+
+dvi: dvi-am
+
+dvi-am:
+
+html: html-am
+
+info: info-am
+
+info-am:
+
+install-data-am:
+
+install-dvi: install-dvi-am
+
+install-exec-am:
+
+install-html: install-html-am
+
+install-info: install-info-am
+
+install-man:
+
+install-pdf: install-pdf-am
+
+install-ps: install-ps-am
+
+installcheck-am:
+
+maintainer-clean: maintainer-clean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
+
+mostlyclean: mostlyclean-am
+
+mostlyclean-am: mostlyclean-compile mostlyclean-generic
+
+pdf: pdf-am
+
+pdf-am:
+
+ps: ps-am
+
+ps-am:
+
+uninstall-am:
+
+.MAKE: install-am install-strip
+
+.PHONY: CTAGS GTAGS all all-am check check-am check-local clean \
+ clean-checkPROGRAMS clean-generic clean-local ctags distclean \
+ distclean-compile distclean-generic distclean-tags distdir dvi \
+ dvi-am html html-am info info-am install install-am \
+ install-data install-data-am install-dvi install-dvi-am \
+ install-exec install-exec-am install-html install-html-am \
+ install-info install-info-am install-man install-pdf \
+ install-pdf-am install-ps install-ps-am install-strip \
+ installcheck installcheck-am installdirs maintainer-clean \
+ maintainer-clean-generic mostlyclean mostlyclean-compile \
+ mostlyclean-generic pdf pdf-am ps ps-am tags uninstall \
+ uninstall-am
+
+
+# This used to be required when Vex had a handwritten Makefile. It
+# shouldn't be needed any more, though.
+
+#----------------------------------------------------------------------------
+# noinst_PROGRAMS and noinst_DSYMS targets
+#----------------------------------------------------------------------------
+
+# On Darwin, for a program 'p', the DWARF debug info is stored in the
+# directory 'p.dSYM'. This must be generated after the executable is
+# created, with 'dsymutil p'. We could redefine LINK with a script that
+# executes 'dsymutil' after linking, but that's a pain. Instead we use this
+# hook so that every time "make check" is run, we subsequently invoke
+# 'dsymutil' on all the executables that lack a .dSYM directory, or that are
+# newer than their corresponding .dSYM directory.
+build-noinst_DSYMS: $(noinst_DSYMS)
+ for f in $(noinst_DSYMS); do \
+ if [ ! -e $$f.dSYM -o $$f -nt $$f.dSYM ] ; then \
+ echo "dsymutil $$f"; \
+ dsymutil $$f; \
+ fi; \
+ done
+
+# This is used by coregrind/Makefile.am and Makefile.tool.am for doing
+# "in-place" installs. It copies $(noinst_PROGRAMS) into $inplacedir.
+# It needs to be depended on by an 'all-local' rule.
+inplace-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_PROGRAMS) ; do \
+ rm -f $(inplacedir)/$$f; \
+ ln -f -s ../$(subdir)/$$f $(inplacedir); \
+ done
+
+# Similar to inplace-noinst_PROGRAMS
+inplace-noinst_DSYMS: build-noinst_DSYMS
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_DSYMS); do \
+ rm -f $(inplacedir)/$$f.dSYM; \
+ ln -f -s ../$(subdir)/$$f.dSYM $(inplacedir); \
+ done
+
+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
+# "make install". It copies $(noinst_PROGRAMS) into $prefix/lib/valgrind/.
+# It needs to be depended on by an 'install-exec-local' rule.
+install-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_PROGRAMS); do \
+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
+ done
+
+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
+# directories. XXX: not sure whether the resulting permissions will be
+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_DSYMS); do \
+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
+ done
+
+# This needs to be depended on by a 'clean-local' rule.
+clean-noinst_DSYMS:
+ for f in $(noinst_DSYMS); do \
+ rm -rf $$f.dSYM; \
+ done
+
+check-local: build-noinst_DSYMS
+
+clean-local: clean-noinst_DSYMS
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
/* test macros to generate and output the result of a single instruction */
+const unsigned int mem[] = {
+ 0x121f1e1f, 0x131b1a1b, 0x141c1f1c, 0x151d191d,
+ 0x232f2e2f, 0x242c2b2b, 0x252a2e2b, 0x262d2d2a,
+ 0x3f343f3e, 0x3e353d3c, 0x363a3c3b, 0x3b373b3a,
+ 0x454f4e45, 0x4e464d46, 0x474d474c, 0x4a484a4c
+};
+
#define TESTINSN_imm(instruction, QD, imm) \
{ \
unsigned int out[4]; \
); \
printf("%s, #" #imm " :: Qd 0x%08x 0x%08x 0x%08x 0x%08x\n", \
instruction, out[3], out[2], out[1], out[0]); \
+}\
+{ \
+ unsigned int out[4]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %1, %2\n\t" \
+ "vldmia %1!, {" #QD "}\n\t" \
+ instruction ", #" #imm "\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ : \
+ : "r" (out), "r" (addr), "r" (mem) \
+ : #QD, "%2", "memory" \
+ ); \
+ printf("%s, #" #imm " :: Qd 0x%08x 0x%08x 0x%08x 0x%08x\n", \
+ instruction, out[3], out[2], out[1], out[0]); \
}
#define TESTINSN_un(instruction, QD, QM, QMtype, QMval) \
); \
printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x\n", \
instruction, out[3], out[2], out[1], out[0], QMval); \
+} \
+{ \
+ unsigned int out[4]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %2, %3\n\t" \
+ "vldmia %2!, {" #QD "}\n\t" \
+ "vldmia %2!, {" #QM "}\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ : \
+ : "r" (out), "r" (QMval), "r" (addr), "r" (mem) \
+ : #QD, #QM, "%2", "memory" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x\n", \
+ instruction, out[3], out[2], out[1], out[0], QMval); \
}
+
#define TESTINSN_un_q(instruction, QD, QM, QMtype, QMval) \
{ \
unsigned int out[4]; \
printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
" fpscr: %08x\n", \
instruction, out[3], out[2], out[1], out[0], QMval, fpscr); \
+} \
+{ \
+ unsigned int out[4]; \
+ unsigned int fpscr; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "vmov.i8 " #QD ", #0x55" "\n\t" \
+ "mov r4, #0\n\t" \
+ MOVE_to_FPSCR_from_R4 \
+ "mov %3, %4\n\t" \
+ "vldmia %3!, {" #QM "}\n\t" \
+ instruction "\n\t" \
+ "vstmia %1, {" #QD "}\n\t" \
+ MOVE_to_R4_from_FPSCR \
+ "mov %0, r4" \
+ : "=r" (fpscr) \
+ : "r" (out), "r" (QMval), "r" (addr), "r" (mem) \
+ : #QD, #QM, "memory", "r4" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " fpscr: %08x\n", \
+ instruction, out[3], out[2], out[1], out[0], QMval, fpscr); \
}
#define TESTINSN_bin(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \
printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
" Qn (" #QNtype ")0x%08x\n", \
instruction, out[3], out[2], out[1], out[0], QMval, QNval); \
-}
+} \
+/*{ \
+ unsigned int out[4]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %0, %4\n\t" \
+ "vldmia %0!, {" #QM "}\n\t" \
+ "vmov.i8 " #QD ", #0x55" "\n\t" \
+ "vdup." #QNtype " " #QN ", %3\n\t" \
+ instruction "\n\t" \
+ "vstmia %1, {" #QD "}\n\t" \
+ : "+r" (addr) \
+ : "r" (out), "r" (QMval), "r" (QNval), "r" (mem) \
+ : #QD, #QM, #QN, "memory" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x\n", \
+ instruction, out[3], out[2], out[1], out[0], QMval, QNval); \
+} */
#define TESTINSN_bin_f(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \
{ \
printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
" Qn (" #QNtype ")0x%08x\n", \
instruction, out[3], out[2], out[1], out[0], QMval, QNval); \
+} \
+{ \
+ unsigned int out[4]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "vdup.i32 " #QD ", %3\n\t" \
+ "mov %4, %5\n\t" \
+ "vldmia %4!, {" #QM "}\n\t" \
+ "vdup." #QNtype " " #QN ", %2\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ : \
+ : "r" (out), "r" (QMval), "r" (QNval), "r"(0x3f800000), "r" (addr), "r" (mem) \
+ : #QD, #QM, #QN, "memory" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x\n", \
+ instruction, out[3], out[2], out[1], out[0], QMval, QNval); \
}
#define TESTINSN_bin_q(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \
printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
" Qn (" #QNtype ")0x%08x fpscr: %08x\n", \
instruction, out[3], out[2], out[1], out[0], QMval, QNval, fpscr); \
+} \
+{ \
+ unsigned int out[4]; \
+ unsigned int fpscr; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "vmov.i8 " #QD ", #0x55" "\n\t" \
+ "mov r4, #0\n\t" \
+ MOVE_to_FPSCR_from_R4 \
+ "mov %4, %5\n\t" \
+ "vldmia %4!, {" #QM "}\n\t" \
+ "vdup." #QNtype " " #QN ", %3\n\t" \
+ instruction "\n\t" \
+ "vstmia %1, {" #QD "}\n\t" \
+ MOVE_to_R4_from_FPSCR \
+ "mov %0, r4" \
+ : "=r" (fpscr) \
+ : "r" (out), "r" (QMval), "r" (QNval), "r" (addr), "r" (mem) \
+ : #QD, #QM, #QN, "memory", "r4" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x fpscr: %08x\n", \
+ instruction, out[1], out[0], QMval, QNval, fpscr); \
+ printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x fpscr: %08x\n", \
+ instruction, out[3], out[2], out[1], out[0], QMval, QNval, fpscr); \
}
#define TESTINSN_dual(instruction, QM, QMtype, QMval, QN, QNtype, QNval) \
" Qm (" #QMtype ")0x%08x Qn (" #QNtype ")0x%08x\n", \
instruction, out1[3], out1[2], out1[1], out1[0], \
out2[3], out2[2], out2[1], out2[0], QMval, QNval); \
-}
-
-// Ditto TESTING_bin(), but in QD all zeros
-#define TESTINSN_bin_0s(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \
+} \
{ \
- unsigned int out[4]; \
-\
- __asm__ volatile( \
- "vmov.i8 " #QD ", #0x00" "\n\t" \
- "vdup." #QMtype " " #QM ", %1\n\t" \
- "vdup." #QNtype " " #QN ", %2\n\t" \
- instruction "\n\t" \
- "vstmia %0, {" #QD "}\n\t" \
- : \
- : "r" (out), "r" (QMval), "r" (QNval) \
- : #QD, #QM, #QN, "memory" \
- ); \
- printf("%s :: Qd 0x%08x 0x%08x 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
- " Qn (" #QNtype ")0x%08x\n", \
- instruction, out[3], out[2], out[1], out[0], QMval, QNval); \
+ unsigned int out1[4]; \
+ unsigned int out2[4]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %4, %5\n\t" \
+ "vldmia %4!, {" #QM "}\n\t" \
+ "vdup." #QNtype " " #QN ", %3\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QM "}\n\t" \
+ "vstmia %1, {" #QN "}\n\t" \
+ : \
+ : "r" (out1), "r" (out2), "r" (QMval), "r" (QNval), "r" (addr), "r" (mem) \
+ : #QM, #QN, "%4", "memory" \
+ ); \
+ printf("%s :: Qm 0x%08x 0x%08x 0x%08x 0x%08x Qn 0x%08x 0x%08x 0x%08x 0x%08x\nQm (" \
+#QMtype ")0x%08x" " Qn (" #QNtype ")0x%08x\n", \
+ instruction, out1[3], out1[2], out1[1], out1[0],\
+ out2[3], out2[2], out2[1], out2[0], QMval, QNval); \
}
#if 0
----- VMOV (immediate) -----
vmov.i32 q0, #0x7 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007
+vmov.i32 q0, #0x7 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007
+vmov.i16 q1, #0x7 :: Qd 0x00070007 0x00070007 0x00070007 0x00070007
vmov.i16 q1, #0x7 :: Qd 0x00070007 0x00070007 0x00070007 0x00070007
vmov.i8 q2, #0x7 :: Qd 0x07070707 0x07070707 0x07070707 0x07070707
+vmov.i8 q2, #0x7 :: Qd 0x07070707 0x07070707 0x07070707 0x07070707
vmov.i32 q5, #0x700 :: Qd 0x00000700 0x00000700 0x00000700 0x00000700
+vmov.i32 q5, #0x700 :: Qd 0x00000700 0x00000700 0x00000700 0x00000700
+vmov.i16 q7, #0x700 :: Qd 0x07000700 0x07000700 0x07000700 0x07000700
vmov.i16 q7, #0x700 :: Qd 0x07000700 0x07000700 0x07000700 0x07000700
vmov.i32 q10, #0x70000 :: Qd 0x00070000 0x00070000 0x00070000 0x00070000
+vmov.i32 q10, #0x70000 :: Qd 0x00070000 0x00070000 0x00070000 0x00070000
vmov.i32 q12, #0x7000000 :: Qd 0x07000000 0x07000000 0x07000000 0x07000000
+vmov.i32 q12, #0x7000000 :: Qd 0x07000000 0x07000000 0x07000000 0x07000000
+vmov.i32 q13, #0x7FF :: Qd 0x000007ff 0x000007ff 0x000007ff 0x000007ff
vmov.i32 q13, #0x7FF :: Qd 0x000007ff 0x000007ff 0x000007ff 0x000007ff
vmov.i32 q14, #0x7FFFF :: Qd 0x0007ffff 0x0007ffff 0x0007ffff 0x0007ffff
+vmov.i32 q14, #0x7FFFF :: Qd 0x0007ffff 0x0007ffff 0x0007ffff 0x0007ffff
+vmov.i64 q15, #0xFF0000FF00FFFF00 :: Qd 0xff0000ff 0x00ffff00 0xff0000ff 0x00ffff00
vmov.i64 q15, #0xFF0000FF00FFFF00 :: Qd 0xff0000ff 0x00ffff00 0xff0000ff 0x00ffff00
----- VMVN (immediate) -----
vmvn.i32 q0, #0x7 :: Qd 0xfffffff8 0xfffffff8 0xfffffff8 0xfffffff8
+vmvn.i32 q0, #0x7 :: Qd 0xfffffff8 0xfffffff8 0xfffffff8 0xfffffff8
vmvn.i16 q1, #0x7 :: Qd 0xfff8fff8 0xfff8fff8 0xfff8fff8 0xfff8fff8
+vmvn.i16 q1, #0x7 :: Qd 0xfff8fff8 0xfff8fff8 0xfff8fff8 0xfff8fff8
+vmvn.i8 q2, #0x7 :: Qd 0xf8f8f8f8 0xf8f8f8f8 0xf8f8f8f8 0xf8f8f8f8
vmvn.i8 q2, #0x7 :: Qd 0xf8f8f8f8 0xf8f8f8f8 0xf8f8f8f8 0xf8f8f8f8
vmvn.i32 q5, #0x700 :: Qd 0xfffff8ff 0xfffff8ff 0xfffff8ff 0xfffff8ff
+vmvn.i32 q5, #0x700 :: Qd 0xfffff8ff 0xfffff8ff 0xfffff8ff 0xfffff8ff
vmvn.i16 q7, #0x700 :: Qd 0xf8fff8ff 0xf8fff8ff 0xf8fff8ff 0xf8fff8ff
+vmvn.i16 q7, #0x700 :: Qd 0xf8fff8ff 0xf8fff8ff 0xf8fff8ff 0xf8fff8ff
+vmvn.i32 q10, #0x70000 :: Qd 0xfff8ffff 0xfff8ffff 0xfff8ffff 0xfff8ffff
vmvn.i32 q10, #0x70000 :: Qd 0xfff8ffff 0xfff8ffff 0xfff8ffff 0xfff8ffff
vmvn.i32 q13, #0x7000000 :: Qd 0xf8ffffff 0xf8ffffff 0xf8ffffff 0xf8ffffff
+vmvn.i32 q13, #0x7000000 :: Qd 0xf8ffffff 0xf8ffffff 0xf8ffffff 0xf8ffffff
+vmvn.i32 q11, #0x7FF :: Qd 0xfffff800 0xfffff800 0xfffff800 0xfffff800
vmvn.i32 q11, #0x7FF :: Qd 0xfffff800 0xfffff800 0xfffff800 0xfffff800
vmvn.i32 q14, #0x7FFFF :: Qd 0xfff80000 0xfff80000 0xfff80000 0xfff80000
+vmvn.i32 q14, #0x7FFFF :: Qd 0xfff80000 0xfff80000 0xfff80000 0xfff80000
+vmvn.i64 q15, #0xFF0000FF00FFFF00 :: Qd 0x00ffff00 0xff0000ff 0x00ffff00 0xff0000ff
vmvn.i64 q15, #0xFF0000FF00FFFF00 :: Qd 0x00ffff00 0xff0000ff 0x00ffff00 0xff0000ff
----- VORR (immediate) -----
vorr.i32 q0, #0x7 :: Qd 0x55555557 0x55555557 0x55555557 0x55555557
+vorr.i32 q0, #0x7 :: Qd 0x151d191f 0x141c1f1f 0x131b1a1f 0x121f1e1f
vorr.i16 q2, #0x7 :: Qd 0x55575557 0x55575557 0x55575557 0x55575557
+vorr.i16 q2, #0x7 :: Qd 0x151f191f 0x141f1f1f 0x131f1a1f 0x121f1e1f
vorr.i32 q8, #0x700 :: Qd 0x55555755 0x55555755 0x55555755 0x55555755
+vorr.i32 q8, #0x700 :: Qd 0x151d1f1d 0x141c1f1c 0x131b1f1b 0x121f1f1f
vorr.i16 q6, #0x700 :: Qd 0x57555755 0x57555755 0x57555755 0x57555755
+vorr.i16 q6, #0x700 :: Qd 0x171d1f1d 0x171c1f1c 0x171b1f1b 0x171f1f1f
vorr.i32 q14, #0x70000 :: Qd 0x55575555 0x55575555 0x55575555 0x55575555
+vorr.i32 q14, #0x70000 :: Qd 0x151f191d 0x141f1f1c 0x131f1a1b 0x121f1e1f
vorr.i32 q15, #0x7000000 :: Qd 0x57555555 0x57555555 0x57555555 0x57555555
+vorr.i32 q15, #0x7000000 :: Qd 0x171d191d 0x171c1f1c 0x171b1a1b 0x171f1e1f
----- VBIC (immediate) -----
vbic.i32 q0, #0x7 :: Qd 0x55555550 0x55555550 0x55555550 0x55555550
+vbic.i32 q0, #0x7 :: Qd 0x151d1918 0x141c1f18 0x131b1a18 0x121f1e18
vbic.i16 q3, #0x7 :: Qd 0x55505550 0x55505550 0x55505550 0x55505550
+vbic.i16 q3, #0x7 :: Qd 0x15181918 0x14181f18 0x13181a18 0x12181e18
vbic.i32 q5, #0x700 :: Qd 0x55555055 0x55555055 0x55555055 0x55555055
+vbic.i32 q5, #0x700 :: Qd 0x151d181d 0x141c181c 0x131b181b 0x121f181f
vbic.i16 q8, #0x700 :: Qd 0x50555055 0x50555055 0x50555055 0x50555055
+vbic.i16 q8, #0x700 :: Qd 0x101d181d 0x101c181c 0x101b181b 0x101f181f
vbic.i32 q10, #0x70000 :: Qd 0x55505555 0x55505555 0x55505555 0x55505555
+vbic.i32 q10, #0x70000 :: Qd 0x1518191d 0x14181f1c 0x13181a1b 0x12181e1f
vbic.i32 q15, #0x7000000 :: Qd 0x50555555 0x50555555 0x50555555 0x50555555
+vbic.i32 q15, #0x7000000 :: Qd 0x101d191d 0x101c1f1c 0x101b1a1b 0x101f1e1f
---- VMVN (register) ----
vmvn q0, q1 :: Qd 0xffffffe7 0xffffffe7 0xffffffe7 0xffffffe7 Qm (i32)0x00000018
+vmvn q0, q1 :: Qd 0xd9d2d2d5 0xdad5d1d4 0xdbd3d4d4 0xdcd0d1d0 Qm (i32)0x00000018
vmvn q10, q15 :: Qd 0xffffffe7 0xffffffe7 0xffffffe7 0xffffffe7 Qm (i32)0x00000018
+vmvn q10, q15 :: Qd 0xd9d2d2d5 0xdad5d1d4 0xdbd3d4d4 0xdcd0d1d0 Qm (i32)0x00000018
vmvn q0, q14 :: Qd 0xffffffe7 0xffffffe7 0xffffffe7 0xffffffe7 Qm (i32)0x00000018
+vmvn q0, q14 :: Qd 0xd9d2d2d5 0xdad5d1d4 0xdbd3d4d4 0xdcd0d1d0 Qm (i32)0x00000018
---- VMOV (register) ----
vmov q0, q1 :: Qd 0x00000018 0x00000018 0x00000018 0x00000018 Qm (i32)0x00000018
+vmov q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000018
vmov q10, q15 :: Qd 0x00000018 0x00000018 0x00000018 0x00000018 Qm (i32)0x00000018
+vmov q10, q15 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000018
vmov q0, q14 :: Qd 0x00000018 0x00000018 0x00000018 0x00000018 Qm (i32)0x00000018
+vmov q0, q14 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000018
---- VDUP (ARM core register) (tested indirectly) ----
vmov q0, q1 :: Qd 0x07070707 0x07070707 0x07070707 0x07070707 Qm (i8)0x00000007
+vmov q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i8)0x00000007
vmov q10, q11 :: Qd 0x00070007 0x00070007 0x00070007 0x00070007 Qm (i16)0x00000007
+vmov q10, q11 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i16)0x00000007
vmov q0, q15 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007 Qm (i32)0x00000007
+vmov q0, q15 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000007
---- VADD ----
vadd.i32 q0, q1, q2 :: Qd 0x00000090 0x00000090 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078
vadd.i64 q0, q1, q2 :: Qd 0x00000104 0x00000104 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078
vhsub.u32 q10, q11, q12 :: Qd 0xffffffd0 0xffffffd0 0xffffffd0 0xffffffd0 Qm (i32)0x00000018 Qn (i32)0x00000078
---- VQADD ----
vqadd.s32 q0, q1, q2 :: Qd 0x00000090 0x00000090 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 q0, q1, q2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 q0, q1, q2 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqadd.s32 q0, q1, q2 :: Qd 0x00000104 0x00000104 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 q0, q1, q2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 q0, q1, q2 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.s16 q0, q1, q2 :: Qd 0x00000104 0x00000104 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s16 q0, q1, q2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s16 q0, q1, q2 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.s8 q0, q1, q2 :: Qd 0x00000004 0x00000004 0x00000004 0x00000004 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s8 q0, q1, q2 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
+vqadd.s8 q0, q1, q2 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
vqadd.s8 q0, q1, q2 :: Qd 0x80000003 0x80000003 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.s8 q0, q1, q2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqadd.s8 q0, q1, q2 :: Qd 0x951d191f 0x941c1f1e 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.s16 q0, q1, q2 :: Qd 0x80000003 0x80000003 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.s16 q0, q1, q2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqadd.s16 q0, q1, q2 :: Qd 0x951d191f 0x941c1f1e 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.s32 q0, q1, q2 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.s32 q0, q1, q2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqadd.s32 q0, q1, q2 :: Qd 0x951d191f 0x941c1f1e 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.s32 q10, q11, q12 :: Qd 0x00000090 0x00000090 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 q10, q11, q12 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 q10, q11, q12 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqadd.u32 q0, q1, q2 :: Qd 0x00000090 0x00000090 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 q0, q1, q2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 q0, q1, q2 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqadd.u32 q0, q1, q2 :: Qd 0x00000104 0x00000104 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 q0, q1, q2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 q0, q1, q2 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.u16 q0, q1, q2 :: Qd 0x00000104 0x00000104 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u16 q0, q1, q2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u16 q0, q1, q2 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.u8 q0, q1, q2 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
+vqadd.u8 q0, q1, q2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u8 q0, q1, q2 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.u8 q0, q1, q2 :: Qd 0xff000003 0xff000003 0xff000003 0xff000003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.u8 q0, q1, q2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqadd.u8 q0, q1, q2 :: Qd 0x951d191f 0x941c1f1e 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.u16 q0, q1, q2 :: Qd 0xffff0003 0xffff0003 0xffff0003 0xffff0003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.u16 q0, q1, q2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqadd.u16 q0, q1, q2 :: Qd 0x951d191f 0x941c1f1e 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.u32 q0, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.u32 q0, q1, q2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqadd.u32 q0, q1, q2 :: Qd 0x951d191f 0x941c1f1e 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.u32 q10, q11, q12 :: Qd 0x00000090 0x00000090 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 q10, q11, q12 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 q10, q11, q12 :: Qd 0x151d1995 0x141c1f94 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
---- VQSUB ----
vqsub.s32 q0, q1, q2 :: Qd 0xffffffa0 0xffffffa0 0xffffffa0 0xffffffa0 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 q0, q1, q2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 q0, q1, q2 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqsub.s32 q0, q1, q2 :: Qd 0x00000014 0x00000014 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 q0, q1, q2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 q0, q1, q2 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.s16 q0, q1, q2 :: Qd 0x00000014 0x00000014 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s16 q0, q1, q2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s16 q0, q1, q2 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.s8 q0, q1, q2 :: Qd 0x00000080 0x00000080 0x00000080 0x00000080 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
+vqsub.s8 q0, q1, q2 :: Qd 0x131b1aa3 0x121f1ea7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s8 q0, q1, q2 :: Qd 0x151d19a5 0x141c1fa4 0x131b1aa3 0x121f1ea7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.s8 q0, q1, q2 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqsub.s8 q0, q1, q2 :: Qd 0x7f1b1a19 0x7f1f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.s8 q0, q1, q2 :: Qd 0x7f1d191b 0x7f1c1f1a 0x7f1b1a19 0x7f1f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.s16 q0, q1, q2 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqsub.s16 q0, q1, q2 :: Qd 0x7fff1a19 0x7fff1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.s16 q0, q1, q2 :: Qd 0x7fff191b 0x7fff1f1a 0x7fff1a19 0x7fff1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.s32 q0, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqsub.s32 q0, q1, q2 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.s32 q0, q1, q2 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.s32 q10, q11, q12 :: Qd 0xffffffa0 0xffffffa0 0xffffffa0 0xffffffa0 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 q10, q11, q12 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 q10, q11, q12 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqsub.u32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqsub.u32 q0, q1, q2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u32 q0, q1, q2 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqsub.u32 q0, q1, q2 :: Qd 0x00000014 0x00000014 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u32 q0, q1, q2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u32 q0, q1, q2 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.u16 q0, q1, q2 :: Qd 0x00000014 0x00000014 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u16 q0, q1, q2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u16 q0, q1, q2 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.u8 q0, q1, q2 :: Qd 0x00000014 0x00000014 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u8 q0, q1, q2 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
+vqsub.u8 q0, q1, q2 :: Qd 0x151d1900 0x141c1f00 0x131b1a00 0x121f1e00 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
vqsub.u8 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u8 q0, q1, q2 :: Qd 0x001b1a19 0x001f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u8 q0, q1, q2 :: Qd 0x001d191b 0x001c1f1a 0x001b1a19 0x001f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.u16 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u16 q0, q1, q2 :: Qd 0x00001a19 0x00001e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u16 q0, q1, q2 :: Qd 0x0000191b 0x00001f1a 0x00001a19 0x00001e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u32 q0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.u32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.u32 q10, q11, q12 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqsub.u32 q10, q11, q12 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u32 q10, q11, q12 :: Qd 0x151d18a5 0x141c1ea4 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
---- VRHADD ----
vrhadd.s32 q0, q1, q2 :: Qd 0x00000049 0x00000049 0x00000049 0x00000049 Qm (i32)0x00000019 Qn (i32)0x00000078
vrhadd.s32 q0, q1, q2 :: Qd 0x00000049 0x00000049 0x00000049 0x00000049 Qm (i32)0x00000019 Qn (i32)0x00000079
vshl.u64 q5, q12, q4 :: Qd 0x60000000 0x40000000 0x60000000 0x40000000 Qm (i32)0x80000001 Qn (i32)0x0000001e
---- VQSHL (register) ----
vqshl.s64 q0, q1, q2 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.s64 q0, q1, q2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.s64 q0, q1, q2 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqshl.s64 q3, q4, q5 :: Qd 0xffffff03 0xffffff02 0xffffff03 0xffffff02 Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.s64 q3, q4, q5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.s64 q3, q4, q5 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqshl.s64 q3, q4, q5 :: Qd 0xfffffff0 0x3ffffff0 0xfffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.s64 q3, q4, q5 :: Qd 0x02636343 0x6243e3c3 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.s64 q3, q4, q5 :: Qd 0x02a3a323 0xa28383e3 0x02636343 0x6243e3c3 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.s64 q0, q1, q2 :: Qd 0x00040000 0x00040000 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqshl.s64 q0, q1, q2 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
+vqshl.s64 q0, q1, q2 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqshl.s64 q13, q14, q15 :: Qd 0xffffffff 0xfffffbff 0xffffffff 0xfffffbff Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqshl.s64 q13, q14, q15 :: Qd 0x00000004 0xc6c686c4 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqshl.s64 q13, q14, q15 :: Qd 0x00000005 0x47464745 0x00000004 0xc6c686c4 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqshl.s64 q7, q8, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.s64 q7, q8, q2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.s64 q7, q8, q2 :: Qd 0x00000000 0x00000001 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.s32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
+vqshl.s32 q3, q4, q15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.s32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.s32 q2, q8, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqshl.s32 q2, q8, q4 :: Qd 0x0131b1a1 0x0121f1e1 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqshl.s32 q2, q8, q4 :: Qd 0x0151d191 0x0141c1f1 0x0131b1a1 0x0121f1e1 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqshl.s32 q12, q11, q13 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqshl.s32 q12, q11, q13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqshl.s32 q12, q11, q13 :: Qd 0x000a8e8c 0x000a0e0f 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqshl.s32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqshl.s32 q0, q1, q2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqshl.s32 q0, q1, q2 :: Qd 0x002a3a32 0x0028383e 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqshl.s32 q9, q10, q11 :: Qd 0xc0000004 0xc0000004 0xc0000004 0xc0000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.s32 q9, q10, q11 :: Qd 0x098d8d0d 0x090f8f0f Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.s32 q9, q10, q11 :: Qd 0x0a8e8c8e 0x0a0e0f8e 0x098d8d0d 0x090f8f0f Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqshl.s32 q13, q3, q5 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqshl.s32 q13, q3, q5 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 08000000
+vqshl.s32 q13, q3, q5 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 08000000
vqshl.s16 q11, q10, q2 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.s16 q11, q10, q2 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.s16 q11, q10, q2 :: Qd 0x0a8e0000 0x0a0e0000 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.s16 q3, q14, q7 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.s16 q3, q14, q7 :: Qd 0x098d0343 0x090f03c3 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.s16 q3, q14, q7 :: Qd 0x0a8e0323 0x0a0e03e3 0x098d0343 0x090f03c3 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.s16 q0, q11, q2 :: Qd 0xc0000080 0xc0000080 0xc0000080 0xc0000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.s16 q0, q11, q2 :: Qd 0x098d0d0d 0x090f0f0f Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.s16 q0, q11, q2 :: Qd 0x0a8e0c8e 0x0a0e0f8e 0x098d0d0d 0x090f0f0f Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqshl.s16 q1, q2, q3 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.s16 q1, q2, q3 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.s16 q1, q2, q3 :: Qd 0x0a8e0000 0x0a0e0000 0x098d0000 0x090f0000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.s16 q3, q4, q5 :: Qd 0xd0000000 0xd0000000 0xd0000000 0xd0000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqshl.s16 q3, q4, q5 :: Qd 0x098d0000 0x090f0000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqshl.s16 q3, q4, q5 :: Qd 0x0a8e0000 0x0a0e0000 0x098d0000 0x090f0000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqshl.s16 q0, q15, q2 :: Qd 0x00007fff 0x00007fff 0x00007fff 0x00007fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqshl.s16 q0, q15, q2 :: Qd 0x131b7fff 0x121f7fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqshl.s16 q0, q15, q2 :: Qd 0x151d7fff 0x141c7fff 0x131b7fff 0x121f7fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqshl.s8 q2, q7, q11 :: Qd 0xffffff80 0xffffff80 0xffffff80 0xffffff80 Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqshl.s8 q2, q7, q11 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqshl.s8 q2, q7, q11 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqshl.s8 q13, q1, q2 :: Qd 0xffffff80 0xffffff80 0xffffff80 0xffffff80 Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqshl.s8 q13, q1, q2 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqshl.s8 q13, q1, q2 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqshl.s8 q3, q7, q5 :: Qd 0x80000058 0x80000058 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqshl.s8 q3, q7, q5 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 08000000
+vqshl.s8 q3, q7, q5 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 08000000
vqshl.s8 q10, q11, q12 :: Qd 0x00010000 0x00010000 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqshl.s8 q10, q11, q12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
+vqshl.s8 q10, q11, q12 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqshl.s8 q6, q7, q8 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqshl.s8 q6, q7, q8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqshl.s8 q6, q7, q8 :: Qd 0x151d1974 0x141c1f70 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqshl.s8 q10, q11, q12 :: Qd 0x0000007f 0x0000007f 0x0000007f 0x0000007f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqshl.s8 q10, q11, q12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqshl.s8 q10, q11, q12 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
vqshl.u64 q0, q1, q2 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.u64 q0, q1, q2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.u64 q0, q1, q2 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqshl.u64 q3, q4, q5 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 08000000
+vqshl.u64 q3, q4, q5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.u64 q3, q4, q5 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqshl.u64 q3, q4, q5 :: Qd 0x1ffffff0 0x3ffffff0 0x1ffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.u64 q3, q4, q5 :: Qd 0x02636343 0x6243e3c3 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.u64 q3, q4, q5 :: Qd 0x02a3a323 0xa28383e3 0x02636343 0x6243e3c3 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.u64 q0, q1, q2 :: Qd 0x00040000 0x00040000 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqshl.u64 q0, q1, q2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
+vqshl.u64 q0, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqshl.u64 q13, q14, q15 :: Qd 0x0000003f 0xfffffbff 0x0000003f 0xfffffbff Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqshl.u64 q13, q14, q15 :: Qd 0x00000004 0xc6c686c4 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqshl.u64 q13, q14, q15 :: Qd 0x00000005 0x47464745 0x00000004 0xc6c686c4 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqshl.u64 q7, q8, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.u64 q7, q8, q2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.u64 q7, q8, q2 :: Qd 0x00000000 0x00000001 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.u32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
+vqshl.u32 q3, q4, q15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.u32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.u32 q2, q8, q4 :: Qd 0x0fffffff 0x0fffffff 0x0fffffff 0x0fffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqshl.u32 q2, q8, q4 :: Qd 0x0131b1a1 0x0121f1e1 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqshl.u32 q2, q8, q4 :: Qd 0x0151d191 0x0141c1f1 0x0131b1a1 0x0121f1e1 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqshl.u32 q12, q11, q13 :: Qd 0x007fffff 0x007fffff 0x007fffff 0x007fffff Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqshl.u32 q12, q11, q13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqshl.u32 q12, q11, q13 :: Qd 0x000a8e8c 0x000a0e0f 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqshl.u32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqshl.u32 q0, q1, q2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqshl.u32 q0, q1, q2 :: Qd 0x002a3a32 0x0028383e 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqshl.u32 q9, q10, q11 :: Qd 0x40000004 0x40000004 0x40000004 0x40000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.u32 q9, q10, q11 :: Qd 0x098d8d0d 0x090f8f0f Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.u32 q9, q10, q11 :: Qd 0x0a8e8c8e 0x0a0e0f8e 0x098d8d0d 0x090f8f0f Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqshl.u32 q13, q3, q5 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqshl.u32 q13, q3, q5 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqshl.u32 q13, q3, q5 :: Qd 0xa8e8c8e8 0xa0e0f8e0 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
vqshl.u16 q11, q10, q2 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.u16 q11, q10, q2 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.u16 q11, q10, q2 :: Qd 0x0a8e0000 0x0a0e0000 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.u16 q3, q14, q7 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.u16 q3, q14, q7 :: Qd 0x098d0343 0x090f03c3 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.u16 q3, q14, q7 :: Qd 0x0a8e0323 0x0a0e03e3 0x098d0343 0x090f03c3 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.u16 q0, q11, q2 :: Qd 0x40000080 0x40000080 0x40000080 0x40000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.u16 q0, q11, q2 :: Qd 0x098d0d0d 0x090f0f0f Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.u16 q0, q11, q2 :: Qd 0x0a8e0c8e 0x0a0e0f8e 0x098d0d0d 0x090f0f0f Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqshl.u16 q1, q2, q3 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.u16 q1, q2, q3 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.u16 q1, q2, q3 :: Qd 0x0a8e0000 0x0a0e0000 0x098d0000 0x090f0000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.u16 q3, q4, q5 :: Qd 0x50000000 0x50000000 0x50000000 0x50000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqshl.u16 q3, q4, q5 :: Qd 0x098d0000 0x090f0000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqshl.u16 q3, q4, q5 :: Qd 0x0a8e0000 0x0a0e0000 0x098d0000 0x090f0000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqshl.u16 q0, q15, q2 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqshl.u16 q0, q15, q2 :: Qd 0x131bffff 0x121fffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqshl.u16 q0, q15, q2 :: Qd 0x151dffff 0x141cffff 0x131bffff 0x121fffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqshl.u8 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqshl.u8 q2, q7, q11 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqshl.u8 q2, q7, q11 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqshl.u8 q13, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqshl.u8 q13, q1, q2 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqshl.u8 q13, q1, q2 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqshl.u8 q3, q7, q5 :: Qd 0x80000058 0x80000058 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqshl.u8 q3, q7, q5 :: Qd 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqshl.u8 q3, q7, q5 :: Qd 0x151d19e8 0x141c1fe0 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
vqshl.u8 q10, q11, q12 :: Qd 0x00010000 0x00010000 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqshl.u8 q10, q11, q12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
+vqshl.u8 q10, q11, q12 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqshl.u8 q6, q7, q8 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqshl.u8 q6, q7, q8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqshl.u8 q6, q7, q8 :: Qd 0x151d1974 0x141c1f70 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqshl.u8 q10, q11, q12 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqshl.u8 q10, q11, q12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqshl.u8 q10, q11, q12 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
---- VQSHL / VQSHLU (immediate) ----
vqshl.s64 q0, q1, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.s64 q0, q1, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.s64 q15, q14, #1 :: Qd 0xffffff03 0xffffff02 0xffffff03 0xffffff02 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s64 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.s64 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s64 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s64 q5, q4, #63 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s64 q5, q4, #63 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s64 q5, q4, #60 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s64 q5, q4, #60 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s64 q5, q4, #59 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s64 q5, q4, #59 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s64 q5, q4, #58 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s64 q5, q4, #58 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s64 q5, q4, #17 :: Qd 0x00200000 0x00200000 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.s64 q5, q4, #17 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s64 q5, q4, #63 :: Qd 0x80000000 0x00000000 0x80000000 0x00000000 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s64 q5, q4, #63 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.s64 q5, q4, #60 :: Qd 0xf0000000 0x00000000 0xf0000000 0x00000000 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s64 q5, q4, #60 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.s64 q5, q4, #7 :: Qd 0x80000000 0x00000000 0x80000000 0x00000000 Qm (i32)0x80000002 fpscr: 08000000
+vqshl.s64 q5, q4, #7 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshl.s32 q10, q11, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.s32 q10, q11, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.s32 q15, q14, #1 :: Qd 0xffffff02 0xffffff02 0xffffff02 0xffffff02 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s32 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.s32 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s32 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshl.s32 q5, q4, #31 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s32 q5, q4, #31 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s32 q5, q4, #28 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s32 q5, q4, #28 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s32 q5, q4, #27 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s32 q5, q4, #27 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s32 q5, q4, #26 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.s32 q5, q4, #26 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s32 q5, q4, #17 :: Qd 0x00200000 0x00200000 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.s32 q5, q4, #17 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s32 q5, q4, #31 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s32 q5, q4, #31 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.s32 q5, q4, #29 :: Qd 0xe0000000 0xe0000000 0xe0000000 0xe0000000 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s32 q5, q4, #29 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.s32 q5, q4, #7 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x80000002 fpscr: 08000000
+vqshl.s32 q5, q4, #7 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x80000002 fpscr: 08000000
vqshl.s16 q9, q8, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.s16 q9, q8, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.s16 q15, q14, #1 :: Qd 0xfffeff02 0xfffeff02 0xfffeff02 0xfffeff02 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s16 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.s16 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s16 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshl.s16 q9, q8, #15 :: Qd 0x00007fff 0x00007fff 0x00007fff 0x00007fff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s16 q9, q8, #15 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s16 q5, q4, #12 :: Qd 0x00007fff 0x00007fff 0x00007fff 0x00007fff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s16 q5, q4, #12 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s16 q5, q4, #11 :: Qd 0x00007fff 0x00007fff 0x00007fff 0x00007fff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s16 q5, q4, #11 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s16 q5, q4, #10 :: Qd 0x00004000 0x00004000 0x00004000 0x00004000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.s16 q5, q4, #10 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s16 q5, q4, #4 :: Qd 0x00000100 0x00000100 0x00000100 0x00000100 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.s16 q5, q4, #4 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr: 08000000
vqshl.s16 q5, q4, #15 :: Qd 0x80008000 0x80008000 0x80008000 0x80008000 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s16 q5, q4, #15 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff fpscr: 08000000
vqshl.s16 q5, q4, #12 :: Qd 0xf000f000 0xf000f000 0xf000f000 0xf000f000 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s16 q5, q4, #12 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff fpscr: 08000000
vqshl.s16 q5, q4, #7 :: Qd 0x80000100 0x80000100 0x80000100 0x80000100 Qm (i32)0x80000002 fpscr: 08000000
+vqshl.s16 q5, q4, #7 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0x80000002 fpscr: 08000000
vqshl.s8 q0, q1, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.s8 q0, q1, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.s8 q15, q14, #1 :: Qd 0xfefefe80 0xfefefe80 0xfefefe80 0xfefefe80 Qm (i32)0xffffff81 fpscr: 08000000
+vqshl.s8 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.s8 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.s8 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshl.s8 q5, q4, #7 :: Qd 0x0000007f 0x0000007f 0x0000007f 0x0000007f Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s8 q5, q4, #7 :: Qd 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x00000010 fpscr: 08000000
vqshl.s8 q5, q4, #4 :: Qd 0x0000007f 0x0000007f 0x0000007f 0x0000007f Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s8 q5, q4, #4 :: Qd 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x00000010 fpscr: 08000000
vqshl.s8 q5, q4, #3 :: Qd 0x0000007f 0x0000007f 0x0000007f 0x0000007f Qm (i32)0x00000010 fpscr: 08000000
+vqshl.s8 q5, q4, #3 :: Qd 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x00000010 fpscr: 08000000
vqshl.s8 q5, q4, #2 :: Qd 0x00000040 0x00000040 0x00000040 0x00000040 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.s8 q5, q4, #2 :: Qd 0x54746474 0x50707c70 0x4c6c686c 0x487c787c Qm (i32)0x00000010 fpscr: 00000000
vqshl.s8 q5, q4, #1 :: Qd 0x00000020 0x00000020 0x00000020 0x00000020 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.s8 q5, q4, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000010 fpscr: 00000000
vqshl.s8 q5, q4, #7 :: Qd 0x80808080 0x80808080 0x80808080 0x80808080 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s8 q5, q4, #7 :: Qd 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff fpscr: 08000000
vqshl.s8 q5, q4, #5 :: Qd 0xe0e0e0e0 0xe0e0e0e0 0xe0e0e0e0 0xe0e0e0e0 Qm (i32)0xffffffff fpscr: 00000000
+vqshl.s8 q5, q4, #5 :: Qd 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff fpscr: 08000000
vqshl.s8 q5, q4, #2 :: Qd 0x80000008 0x80000008 0x80000008 0x80000008 Qm (i32)0x80000002 fpscr: 08000000
+vqshl.s8 q5, q4, #2 :: Qd 0x54746474 0x50707c70 0x4c6c686c 0x487c787c Qm (i32)0x80000002 fpscr: 00000000
vqshl.u64 q0, q1, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.u64 q0, q1, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.u64 q15, q14, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr: 08000000
+vqshl.u64 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u64 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.u64 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u64 q5, q4, #63 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u64 q5, q4, #63 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u64 q5, q4, #60 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u64 q5, q4, #60 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u64 q5, q4, #59 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u64 q5, q4, #59 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u64 q5, q4, #58 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u64 q5, q4, #58 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u64 q5, q4, #17 :: Qd 0x00200000 0x00200000 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u64 q5, q4, #17 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u64 q5, q4, #63 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u64 q5, q4, #63 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u64 q5, q4, #60 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
+vqshl.u64 q5, q4, #60 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
+vqshl.u64 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshl.u64 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshl.u32 q10, q11, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.u32 q10, q11, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.u32 q15, q14, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr: 08000000
+vqshl.u32 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u32 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.u32 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u32 q5, q4, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u32 q5, q4, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u32 q5, q4, #28 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u32 q5, q4, #28 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u32 q5, q4, #27 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u32 q5, q4, #27 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u32 q5, q4, #26 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u32 q5, q4, #26 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u32 q5, q4, #17 :: Qd 0x00200000 0x00200000 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u32 q5, q4, #17 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u32 q5, q4, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u32 q5, q4, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u32 q5, q4, #29 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
+vqshl.u32 q5, q4, #29 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
+vqshl.u32 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshl.u32 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshl.u16 q9, q8, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.u16 q9, q8, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.u16 q15, q14, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr: 08000000
+vqshl.u16 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u16 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.u16 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u16 q9, q8, #15 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u16 q9, q8, #15 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u16 q5, q4, #12 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u16 q5, q4, #12 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u16 q5, q4, #11 :: Qd 0x00008000 0x00008000 0x00008000 0x00008000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u16 q5, q4, #11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u16 q5, q4, #10 :: Qd 0x00004000 0x00004000 0x00004000 0x00004000 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u16 q5, q4, #10 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u16 q5, q4, #4 :: Qd 0x00000100 0x00000100 0x00000100 0x00000100 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u16 q5, q4, #4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u16 q5, q4, #15 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
+vqshl.u16 q5, q4, #15 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
+vqshl.u16 q5, q4, #12 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u16 q5, q4, #12 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u16 q5, q4, #7 :: Qd 0xffff0100 0xffff0100 0xffff0100 0xffff0100 Qm (i32)0x80000002 fpscr: 08000000
+vqshl.u16 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshl.u8 q0, q1, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshl.u8 q0, q1, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshl.u8 q15, q14, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr: 08000000
+vqshl.u8 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u8 q5, q4, #0 :: Qd 0xffffff81 0xffffff81 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr: 00000000
+vqshl.u8 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshl.u8 q5, q4, #7 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u8 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u8 q5, q4, #4 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr: 08000000
+vqshl.u8 q5, q4, #4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshl.u8 q5, q4, #3 :: Qd 0x00000080 0x00000080 0x00000080 0x00000080 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u8 q5, q4, #3 :: Qd 0xa8e8c8e8 0xa0e0f8e0 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x00000010 fpscr: 00000000
vqshl.u8 q5, q4, #2 :: Qd 0x00000040 0x00000040 0x00000040 0x00000040 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u8 q5, q4, #2 :: Qd 0x54746474 0x50707c70 0x4c6c686c 0x487c787c Qm (i32)0x00000010 fpscr: 00000000
vqshl.u8 q5, q4, #1 :: Qd 0x00000020 0x00000020 0x00000020 0x00000020 Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u8 q5, q4, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000010 fpscr: 00000000
+vqshl.u8 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u8 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u8 q5, q4, #5 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
+vqshl.u8 q5, q4, #5 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshl.u8 q5, q4, #2 :: Qd 0xff000008 0xff000008 0xff000008 0xff000008 Qm (i32)0x80000002 fpscr: 08000000
+vqshl.u8 q5, q4, #2 :: Qd 0x54746474 0x50707c70 0x4c6c686c 0x487c787c Qm (i32)0x80000002 fpscr: 00000000
vqshlu.s64 q0, q1, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshlu.s64 q0, q1, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshlu.s64 q15, q14, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s64 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshlu.s64 q5, q4, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s64 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
+vqshlu.s64 q5, q4, #63 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s64 q5, q4, #63 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s64 q5, q4, #60 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s64 q5, q4, #60 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s64 q5, q4, #59 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s64 q5, q4, #59 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s64 q5, q4, #58 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s64 q5, q4, #58 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s64 q5, q4, #17 :: Qd 0x00200000 0x00200000 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s64 q5, q4, #17 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s64 q5, q4, #63 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s64 q5, q4, #63 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s64 q5, q4, #60 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s64 q5, q4, #60 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s64 q5, q4, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000002 fpscr: 08000000
+vqshlu.s64 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshlu.s32 q10, q11, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshlu.s32 q10, q11, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshlu.s32 q15, q14, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s32 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshlu.s32 q5, q4, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s32 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
+vqshlu.s32 q5, q4, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s32 q5, q4, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s32 q5, q4, #28 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s32 q5, q4, #28 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s32 q5, q4, #27 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s32 q5, q4, #27 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s32 q5, q4, #26 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s32 q5, q4, #26 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s32 q5, q4, #17 :: Qd 0x00200000 0x00200000 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s32 q5, q4, #17 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s32 q5, q4, #31 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s32 q5, q4, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s32 q5, q4, #29 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s32 q5, q4, #29 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s32 q5, q4, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000002 fpscr: 08000000
+vqshlu.s32 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshlu.s16 q9, q8, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshlu.s16 q9, q8, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshlu.s16 q15, q14, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s16 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshlu.s16 q5, q4, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s16 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshlu.s16 q9, q8, #15 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s16 q9, q8, #15 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s16 q5, q4, #12 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s16 q5, q4, #12 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s16 q5, q4, #11 :: Qd 0x00008000 0x00008000 0x00008000 0x00008000 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s16 q5, q4, #11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s16 q5, q4, #10 :: Qd 0x00004000 0x00004000 0x00004000 0x00004000 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s16 q5, q4, #10 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s16 q5, q4, #4 :: Qd 0x00000100 0x00000100 0x00000100 0x00000100 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s16 q5, q4, #4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s16 q5, q4, #15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s16 q5, q4, #15 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s16 q5, q4, #12 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s16 q5, q4, #12 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s16 q5, q4, #7 :: Qd 0x00000100 0x00000100 0x00000100 0x00000100 Qm (i32)0x80000002 fpscr: 08000000
+vqshlu.s16 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr: 08000000
vqshlu.s8 q0, q1, #1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr: 00000000
+vqshlu.s8 q0, q1, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr: 00000000
vqshlu.s8 q15, q14, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s8 q15, q14, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr: 00000000
vqshlu.s8 q5, q4, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr: 08000000
+vqshlu.s8 q5, q4, #0 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr: 00000000
vqshlu.s8 q5, q4, #7 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s8 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s8 q5, q4, #4 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr: 08000000
+vqshlu.s8 q5, q4, #4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr: 08000000
vqshlu.s8 q5, q4, #3 :: Qd 0x00000080 0x00000080 0x00000080 0x00000080 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s8 q5, q4, #3 :: Qd 0xa8e8c8e8 0xa0e0f8e0 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x00000010 fpscr: 00000000
vqshlu.s8 q5, q4, #2 :: Qd 0x00000040 0x00000040 0x00000040 0x00000040 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s8 q5, q4, #2 :: Qd 0x54746474 0x50707c70 0x4c6c686c 0x487c787c Qm (i32)0x00000010 fpscr: 00000000
vqshlu.s8 q5, q4, #1 :: Qd 0x00000020 0x00000020 0x00000020 0x00000020 Qm (i32)0x00000010 fpscr: 00000000
+vqshlu.s8 q5, q4, #1 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000010 fpscr: 00000000
vqshlu.s8 q5, q4, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s8 q5, q4, #7 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s8 q5, q4, #5 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr: 08000000
+vqshlu.s8 q5, q4, #5 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr: 08000000
vqshlu.s8 q5, q4, #2 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x80000002 fpscr: 08000000
+vqshlu.s8 q5, q4, #2 :: Qd 0x54746474 0x50707c70 0x4c6c686c 0x487c787c Qm (i32)0x80000002 fpscr: 00000000
---- VQRSHL (register) ----
vqrshl.s64 q0, q1, q2 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.s64 q0, q1, q2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.s64 q0, q1, q2 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.s64 q3, q4, q5 :: Qd 0xffffff03 0xffffff02 0xffffff03 0xffffff02 Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.s64 q3, q4, q5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.s64 q3, q4, q5 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.s64 q3, q4, q5 :: Qd 0xfffffff0 0x3ffffff0 0xfffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.s64 q3, q4, q5 :: Qd 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.s64 q3, q4, q5 :: Qd 0x02a3a323 0xa28383e4 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.s64 q0, q1, q2 :: Qd 0x00040000 0x00040000 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqrshl.s64 q0, q1, q2 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
+vqrshl.s64 q0, q1, q2 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqrshl.s64 q13, q14, q15 :: Qd 0xffffffff 0xfffffc00 0xffffffff 0xfffffc00 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqrshl.s64 q13, q14, q15 :: Qd 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqrshl.s64 q13, q14, q15 :: Qd 0x00000005 0x47464745 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqrshl.s64 q7, q8, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.s64 q7, q8, q2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.s64 q7, q8, q2 :: Qd 0x00000000 0x00000001 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.s32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
+vqrshl.s32 q3, q4, q15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.s32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.s32 q2, q8, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqrshl.s32 q2, q8, q4 :: Qd 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqrshl.s32 q2, q8, q4 :: Qd 0x0151d192 0x0141c1f2 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqrshl.s32 q12, q11, q13 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqrshl.s32 q12, q11, q13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqrshl.s32 q12, q11, q13 :: Qd 0x000a8e8d 0x000a0e10 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqrshl.s32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqrshl.s32 q0, q1, q2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqrshl.s32 q0, q1, q2 :: Qd 0x002a3a32 0x0028383e 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqrshl.s32 q9, q10, q11 :: Qd 0xc0000004 0xc0000004 0xc0000004 0xc0000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q9, q10, q11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q9, q10, q11 :: Qd 0x0a8e8c8f 0x0a0e0f8e 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 q13, q3, q5 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.s32 q13, q3, q5 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 08000000
+vqrshl.s32 q13, q3, q5 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 08000000
vqrshl.s16 q11, q10, q2 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.s16 q11, q10, q2 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.s16 q11, q10, q2 :: Qd 0x0a8f0000 0x0a0e0000 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.s16 q3, q14, q7 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.s16 q3, q14, q7 :: Qd 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.s16 q3, q14, q7 :: Qd 0x0a8f0324 0x0a0e03e4 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.s16 q0, q11, q2 :: Qd 0xc0000080 0xc0000080 0xc0000080 0xc0000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q0, q11, q2 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q0, q11, q2 :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 q1, q2, q3 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.s16 q1, q2, q3 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.s16 q1, q2, q3 :: Qd 0x0a8f0000 0x0a0e0000 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.s16 q3, q4, q5 :: Qd 0xd0000000 0xd0000000 0xd0000000 0xd0000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqrshl.s16 q3, q4, q5 :: Qd 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqrshl.s16 q3, q4, q5 :: Qd 0x0a8f0001 0x0a0e0001 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqrshl.s16 q0, q15, q2 :: Qd 0x00007fff 0x00007fff 0x00007fff 0x00007fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.s16 q0, q15, q2 :: Qd 0x131b7fff 0x121f7fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.s16 q0, q15, q2 :: Qd 0x151d7fff 0x141c7fff 0x131b7fff 0x121f7fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqrshl.s8 q2, q7, q11 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x0b0f0d0f 0x0a0e100e 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 q2, q7, q11 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 q2, q7, q11 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x0a8e8c8f 0x0a0e0f8e 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s8 q2, q7, q11 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x0b0f0d0f 0x0a0e100e 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 q2, q7, q11 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 q2, q7, q11 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x0a8e8c8f 0x0a0e0f8e 0x098d8d0e 0x090f8f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s8 q2, q7, q11 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x0b0f0d0f 0x0a0e100e 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 q2, q7, q11 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x0a8e8c8f 0x0a0e0f8e 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s8 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.s16 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s16 q2, q7, q11 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.s32 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s32 q2, q7, q11 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.s8 q2, q7, q11 :: Qd 0xffffff80 0xffffff80 0xffffff80 0xffffff80 Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqrshl.s8 q2, q7, q11 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqrshl.s8 q13, q1, q2 :: Qd 0xffffff80 0xffffff80 0xffffff80 0xffffff80 Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.s8 q13, q1, q2 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.s8 q13, q1, q2 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqrshl.s8 q3, q7, q5 :: Qd 0x80000058 0x80000058 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.s8 q3, q7, q5 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 08000000
+vqrshl.s8 q3, q7, q5 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 08000000
vqrshl.s8 q10, q11, q12 :: Qd 0x00010000 0x00010000 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqrshl.s8 q10, q11, q12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
+vqrshl.s8 q10, q11, q12 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqrshl.s8 q6, q7, q8 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqrshl.s8 q6, q7, q8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqrshl.s8 q6, q7, q8 :: Qd 0x151d1974 0x141c1f70 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqrshl.s8 q10, q11, q12 :: Qd 0x0000007f 0x0000007f 0x0000007f 0x0000007f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqrshl.s8 q10, q11, q12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqrshl.s8 q10, q11, q12 :: Qd 0x151d197f 0x141c1f7f 0x131b1a7f 0x121f1e7f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
vqrshl.u64 q0, q1, q2 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.u64 q0, q1, q2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.u64 q0, q1, q2 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.u64 q3, q4, q5 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 08000000
+vqrshl.u64 q3, q4, q5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.u64 q3, q4, q5 :: Qd 0x2a3a323a 0x28383e38 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.u64 q3, q4, q5 :: Qd 0x1ffffff0 0x3ffffff0 0x1ffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.u64 q3, q4, q5 :: Qd 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.u64 q3, q4, q5 :: Qd 0x02a3a323 0xa28383e4 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.u64 q0, q1, q2 :: Qd 0x00040000 0x00040000 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqrshl.u64 q0, q1, q2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
+vqrshl.u64 q0, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqrshl.u64 q13, q14, q15 :: Qd 0x0000003f 0xfffffc00 0x0000003f 0xfffffc00 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqrshl.u64 q13, q14, q15 :: Qd 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqrshl.u64 q13, q14, q15 :: Qd 0x00000005 0x47464745 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqrshl.u64 q7, q8, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.u64 q7, q8, q2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.u64 q7, q8, q2 :: Qd 0x00000000 0x00000001 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.u32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
+vqrshl.u32 q3, q4, q15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.u32 q3, q4, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.u32 q2, q8, q4 :: Qd 0x0fffffff 0x0fffffff 0x0fffffff 0x0fffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqrshl.u32 q2, q8, q4 :: Qd 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqrshl.u32 q2, q8, q4 :: Qd 0x0151d192 0x0141c1f2 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqrshl.u32 q12, q11, q13 :: Qd 0x00800000 0x00800000 0x00800000 0x00800000 Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqrshl.u32 q12, q11, q13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqrshl.u32 q12, q11, q13 :: Qd 0x000a8e8d 0x000a0e10 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqrshl.u32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqrshl.u32 q0, q1, q2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqrshl.u32 q0, q1, q2 :: Qd 0x002a3a32 0x0028383e 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqrshl.u32 q9, q10, q11 :: Qd 0x40000004 0x40000004 0x40000004 0x40000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 q9, q10, q11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 q9, q10, q11 :: Qd 0x0a8e8c8f 0x0a0e0f8e 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u32 q13, q3, q5 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.u32 q13, q3, q5 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.u32 q13, q3, q5 :: Qd 0xa8e8c8e8 0xa0e0f8e0 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
vqrshl.u16 q11, q10, q2 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.u16 q11, q10, q2 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.u16 q11, q10, q2 :: Qd 0x0a8f0000 0x0a0e0000 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.u16 q3, q14, q7 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.u16 q3, q14, q7 :: Qd 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.u16 q3, q14, q7 :: Qd 0x0a8f0324 0x0a0e03e4 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.u16 q0, q11, q2 :: Qd 0x40000080 0x40000080 0x40000080 0x40000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 q0, q11, q2 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 q0, q11, q2 :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u16 q1, q2, q3 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.u16 q1, q2, q3 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.u16 q1, q2, q3 :: Qd 0x0a8f0000 0x0a0e0000 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.u16 q3, q4, q5 :: Qd 0x50000000 0x50000000 0x50000000 0x50000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqrshl.u16 q3, q4, q5 :: Qd 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqrshl.u16 q3, q4, q5 :: Qd 0x0a8f0001 0x0a0e0001 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqrshl.u16 q0, q15, q2 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.u16 q0, q15, q2 :: Qd 0x131bffff 0x121fffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.u16 q0, q15, q2 :: Qd 0x151dffff 0x141cffff 0x131bffff 0x121fffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqrshl.u8 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqrshl.u8 q2, q7, q11 :: Qd 0x80808080 0x80808080 0x80808080 0x80808080 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x0b0f0d0f 0x0a0e100e 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u8 q2, q7, q11 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x0b0f0d0f 0x0a0e100e 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u16 q2, q7, q11 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 q2, q7, q11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 q2, q7, q11 :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u32 q2, q7, q11 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 q2, q7, q11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 q2, q7, q11 :: Qd 0x0a8e8c8f 0x0a0e0f8e 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u8 q2, q7, q11 :: Qd 0x8080807f 0x8080807f 0x8080807f 0x8080807f Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x0b0f0d0f 0x0a0e100e 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u16 q2, q7, q11 :: Qd 0x80007fff 0x80007fff 0x80007fff 0x80007fff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 q2, q7, q11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 q2, q7, q11 :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u32 q2, q7, q11 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 q2, q7, q11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 q2, q7, q11 :: Qd 0x0a8e8c8f 0x0a0e0f8e 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u8 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u8 q2, q7, q11 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.u16 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u16 q2, q7, q11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u16 q2, q7, q11 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.u32 q2, q7, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u32 q2, q7, q11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u32 q2, q7, q11 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.u8 q13, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.u8 q13, q1, q2 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.u8 q13, q1, q2 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqrshl.u8 q3, q7, q5 :: Qd 0x80000058 0x80000058 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.u8 q3, q7, q5 :: Qd 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.u8 q3, q7, q5 :: Qd 0x151d19e8 0x141c1fe0 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
vqrshl.u8 q10, q11, q12 :: Qd 0x00010000 0x00010000 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqrshl.u8 q10, q11, q12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
+vqrshl.u8 q10, q11, q12 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqrshl.u8 q6, q7, q8 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqrshl.u8 q6, q7, q8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqrshl.u8 q6, q7, q8 :: Qd 0x151d1974 0x141c1f70 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqrshl.u8 q10, q11, q12 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqrshl.u8 q10, q11, q12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqrshl.u8 q10, q11, q12 :: Qd 0x151d19ff 0x141c1fff 0x131b1aff 0x121f1eff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
---- VRSHL (register) ----
vrshl.s64 q0, q1, q2 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001
vrshl.s64 q3, q4, q5 :: Qd 0xffffff03 0xffffff02 0xffffff03 0xffffff02 Qm (i32)0xffffff81 Qn (i32)0x00000001
vmlsl.u32 q7, d7, d1[1] :: Qd 0x15555553 0xd5555553 0x15555553 0xd5555553 Qm (i32)0x80000001 Qn (i32)0x80000002
---- VRSHR ----
vrshr.s8 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vrshr.s8 q0, q1, #0 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xffffffff
vrshr.s8 q0, q1, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
+vrshr.s8 q0, q1, #1 :: Qd 0x13171715 0x13151716 0x12161616 0x12181718 Qm (i32)0xffffffff
vrshr.s16 q3, q4, #2 :: Qd 0x0000ffe1 0x0000ffe1 0x0000ffe1 0x0000ffe1 Qm (i32)0xffffff84
+vrshr.s16 q3, q4, #2 :: Qd 0x098b0b4b 0x094b0b8b 0x090b0acb 0x08cc0b8c Qm (i32)0xffffff84
+vrshr.s32 q2, q5, #31 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
vrshr.s32 q2, q5, #31 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
vrshr.s8 q6, q7, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000ffff
+vrshr.s8 q6, q7, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000ffff
vrshr.s16 q8, q9, #12 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xfffffff6
+vrshr.s16 q8, q9, #12 :: Qd 0x00020003 0x00020003 0x00020003 0x00020003 Qm (i32)0xfffffff6
vrshr.s32 q10, q11, #5 :: Qd 0x00000140 0x00000140 0x00000140 0x00000140 Qm (i32)0x000027fa
+vrshr.s32 q10, q11, #5 :: Qd 0x01316969 0x01295171 0x01216159 0x01197971 Qm (i32)0x000027fa
vrshr.u8 q12, q13, #1 :: Qd 0x80808080 0x80808080 0x80808080 0x80808080 Qm (i32)0xffffffff
+vrshr.u8 q12, q13, #1 :: Qd 0x13171715 0x13151716 0x12161616 0x12181718 Qm (i32)0xffffffff
vrshr.u16 q14, q15, #11 :: Qd 0x00200020 0x00200020 0x00200020 0x00200020 Qm (i32)0xffffffff
+vrshr.u16 q14, q15, #11 :: Qd 0x00050006 0x00050006 0x00050005 0x00040006 Qm (i32)0xffffffff
vrshr.u32 q10, q11, #9 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x000003e8
+vrshr.u32 q10, q11, #9 :: Qd 0x00131697 0x00129517 0x00121616 0x00119797 Qm (i32)0x000003e8
vrshr.u8 q7, q13, #7 :: Qd 0x02020202 0x02020202 0x02020202 0x02020202 Qm (i32)0xffffffff
+vrshr.u8 q7, q13, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
vrshr.u16 q8, q1, #5 :: Qd 0x0000055e 0x0000055e 0x0000055e 0x0000055e Qm (i32)0x0000abcf
+vrshr.u16 q8, q1, #5 :: Qd 0x01310169 0x01290171 0x01210159 0x01190171 Qm (i32)0x0000abcf
vrshr.u32 q12, q3, #15 :: Qd 0x00020000 0x00020000 0x00020000 0x00020000 Qm (i32)0xfffffe50
+vrshr.u32 q12, q3, #15 :: Qd 0x00004c5a 0x00004a54 0x00004858 0x0000465e Qm (i32)0xfffffe50
vrshr.u64 q0, q1, #42 :: Qd 0x00000000 0x00400000 0x00000000 0x00400000 Qm (i32)0xffffffff
+vrshr.u64 q0, q1, #42 :: Qd 0x00000000 0x00098b4b 0x00000000 0x00090b0b Qm (i32)0xffffffff
vrshr.s64 q6, q7, #12 :: Qd 0x00000000 0xfac00001 0x00000000 0xfac00001 Qm (i32)0x00000fac
+vrshr.s64 q6, q7, #12 :: Qd 0x000262d2 0xd2a252a3 0x000242c2 0xb2b232f3 Qm (i32)0x00000fac
vrshr.u64 q8, q4, #9 :: Qd 0x0000001a 0x7c00001a 0x0000001a 0x7c00001a Qm (i32)0x000034f8
+vrshr.u64 q8, q4, #9 :: Qd 0x00131696 0x95129517 0x00121615 0x95919797 Qm (i32)0x000034f8
vrshr.s64 q9, q12, #11 :: Qd 0x00000030 0x32c00030 0x00000030 0x32c00030 Qm (i32)0x00018196
+vrshr.s64 q9, q12, #11 :: Qd 0x0004c5a5 0xa544a546 0x00048585 0x656465e6 Qm (i32)0x00018196
---- VRSRA ----
vrsra.s8 q0, q1, #1 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0xffffffff
+vrsra.s8 q0, q1, #1 :: Qd 0x28343032 0x27313632 0x25313031 0x24373537 Qm (i32)0xffffffff
vrsra.s16 q3, q4, #2 :: Qd 0x55555536 0x55555536 0x55555536 0x55555536 Qm (i32)0xffffff84
+vrsra.s16 q3, q4, #2 :: Qd 0x1ea82468 0x1d672aa7 0x1c2624e6 0x1aeb29ab Qm (i32)0xffffff84
vrsra.s32 q2, q5, #31 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0xffffffff
+vrsra.s32 q2, q5, #31 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vrsra.s8 q6, q7, #7 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0x0000ffff
+vrsra.s8 q6, q7, #7 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x0000ffff
vrsra.s16 q8, q9, #12 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0xfffffff6
+vrsra.s16 q8, q9, #12 :: Qd 0x151f1920 0x141e1f1f 0x131d1a1e 0x12211e22 Qm (i32)0xfffffff6
vrsra.s32 q10, q11, #5 :: Qd 0x55555695 0x55555695 0x55555695 0x55555695 Qm (i32)0x000027fa
+vrsra.s32 q10, q11, #5 :: Qd 0x164e8286 0x1545708d 0x143c7b74 0x13389790 Qm (i32)0x000027fa
vrsra.u8 q12, q13, #1 :: Qd 0xd5d5d5d5 0xd5d5d5d5 0xd5d5d5d5 0xd5d5d5d5 Qm (i32)0xffffffff
+vrsra.u8 q12, q13, #1 :: Qd 0x28343032 0x27313632 0x25313031 0x24373537 Qm (i32)0xffffffff
vrsra.u16 q14, q15, #11 :: Qd 0x55755575 0x55755575 0x55755575 0x55755575 Qm (i32)0xffffffff
+vrsra.u16 q14, q15, #11 :: Qd 0x15221923 0x14211f22 0x13201a20 0x12231e25 Qm (i32)0xffffffff
vrsra.u32 q10, q11, #9 :: Qd 0x55555557 0x55555557 0x55555557 0x55555557 Qm (i32)0x000003e8
+vrsra.u32 q10, q11, #9 :: Qd 0x15302fb4 0x142eb433 0x132d3031 0x1230b5b6 Qm (i32)0x000003e8
vrsra.u8 q7, q13, #7 :: Qd 0x57575757 0x57575757 0x57575757 0x57575757 Qm (i32)0xffffffff
+vrsra.u8 q7, q13, #7 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vrsra.u16 q8, q1, #5 :: Qd 0x55555ab3 0x55555ab3 0x55555ab3 0x55555ab3 Qm (i32)0x0000abcf
+vrsra.u16 q8, q1, #5 :: Qd 0x164e1a86 0x1545208d 0x143c1b74 0x13381f90 Qm (i32)0x0000abcf
vrsra.u32 q12, q3, #15 :: Qd 0x55575555 0x55575555 0x55575555 0x55575555 Qm (i32)0xfffffe50
+vrsra.u32 q12, q3, #15 :: Qd 0x151d6577 0x141c6970 0x131b6273 0x121f647d Qm (i32)0xfffffe50
vrsra.u64 q0, q1, #42 :: Qd 0x55555555 0x55955555 0x55555555 0x55955555 Qm (i32)0xffffffff
+vrsra.u64 q0, q1, #42 :: Qd 0x151d191d 0x1425aa67 0x131b1a1b 0x1228292a Qm (i32)0xffffffff
vrsra.s64 q6, q7, #12 :: Qd 0x55555556 0x50155556 0x55555556 0x50155556 Qm (i32)0x00000fac
+vrsra.s64 q6, q7, #12 :: Qd 0x151f7bef 0xe6be71bf 0x131d5cdd 0xc4d15112 Qm (i32)0x00000fac
vrsra.u64 q8, q4, #9 :: Qd 0x5555556f 0xd155556f 0x5555556f 0xd155556f Qm (i32)0x000034f8
+vrsra.u64 q8, q4, #9 :: Qd 0x15302fb3 0xa92eb433 0x132d3030 0xa7b0b5b6 Qm (i32)0x000034f8
vrsra.s64 q9, q12, #11 :: Qd 0x55555585 0x88155585 0x55555585 0x88155585 Qm (i32)0x00018196
+vrsra.s64 q9, q12, #11 :: Qd 0x1521dec2 0xb960c462 0x131f9fa0 0x77838405 Qm (i32)0x00018196
---- VSHR ----
vshr.s8 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshr.s8 q0, q1, #0 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xffffffff
vshr.s8 q0, q1, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshr.s8 q0, q1, #1 :: Qd 0x13161615 0x12151715 0x12161515 0x11171717 Qm (i32)0xffffffff
vshr.s16 q3, q4, #2 :: Qd 0xffffffe1 0xffffffe1 0xffffffe1 0xffffffe1 Qm (i32)0xffffff84
+vshr.s16 q3, q4, #2 :: Qd 0x098b0b4a 0x094a0b8a 0x090b0aca 0x08cb0b8b Qm (i32)0xffffff84
vshr.s32 q2, q5, #31 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshr.s32 q2, q5, #31 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
vshr.s8 q6, q7, #7 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x0000ffff
+vshr.s8 q6, q7, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000ffff
vshr.s16 q8, q9, #12 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xfffffff6
+vshr.s16 q8, q9, #12 :: Qd 0x00020002 0x00020002 0x00020002 0x00020002 Qm (i32)0xfffffff6
vshr.s32 q10, q11, #5 :: Qd 0x0000013f 0x0000013f 0x0000013f 0x0000013f Qm (i32)0x000027fa
+vshr.s32 q10, q11, #5 :: Qd 0x01316969 0x01295171 0x01216159 0x01197971 Qm (i32)0x000027fa
vshr.u8 q12, q13, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff
+vshr.u8 q12, q13, #1 :: Qd 0x13161615 0x12151715 0x12161515 0x11171717 Qm (i32)0xffffffff
vshr.u16 q14, q15, #11 :: Qd 0x001f001f 0x001f001f 0x001f001f 0x001f001f Qm (i32)0xffffffff
+vshr.u16 q14, q15, #11 :: Qd 0x00040005 0x00040005 0x00040005 0x00040005 Qm (i32)0xffffffff
vshr.u32 q10, q11, #9 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i32)0x000003e8
+vshr.u32 q10, q11, #9 :: Qd 0x00131696 0x00129517 0x00121615 0x00119797 Qm (i32)0x000003e8
vshr.u8 q7, q13, #7 :: Qd 0x01010101 0x01010101 0x01010101 0x01010101 Qm (i32)0xffffffff
+vshr.u8 q7, q13, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xffffffff
vshr.u16 q8, q1, #5 :: Qd 0x0000055e 0x0000055e 0x0000055e 0x0000055e Qm (i32)0x0000abcf
+vshr.u16 q8, q1, #5 :: Qd 0x01310169 0x01290171 0x01210159 0x01190171 Qm (i32)0x0000abcf
vshr.u32 q12, q3, #15 :: Qd 0x0001ffff 0x0001ffff 0x0001ffff 0x0001ffff Qm (i32)0xfffffe50
+vshr.u32 q12, q3, #15 :: Qd 0x00004c5a 0x00004a54 0x00004858 0x0000465e Qm (i32)0xfffffe50
vshr.u64 q0, q1, #42 :: Qd 0x00000000 0x003fffff 0x00000000 0x003fffff Qm (i32)0xffffffff
+vshr.u64 q0, q1, #42 :: Qd 0x00000000 0x00098b4b 0x00000000 0x00090b0a Qm (i32)0xffffffff
vshr.s64 q6, q7, #12 :: Qd 0x00000000 0xfac00000 0x00000000 0xfac00000 Qm (i32)0x00000fac
+vshr.s64 q6, q7, #12 :: Qd 0x000262d2 0xd2a252a2 0x000242c2 0xb2b232f2 Qm (i32)0x00000fac
vshr.u64 q8, q4, #9 :: Qd 0x0000001a 0x7c00001a 0x0000001a 0x7c00001a Qm (i32)0x000034f8
+vshr.u64 q8, q4, #9 :: Qd 0x00131696 0x95129517 0x00121615 0x95919797 Qm (i32)0x000034f8
vshr.s64 q9, q12, #11 :: Qd 0x00000030 0x32c00030 0x00000030 0x32c00030 Qm (i32)0x00018196
+vshr.s64 q9, q12, #11 :: Qd 0x0004c5a5 0xa544a545 0x00048585 0x656465e5 Qm (i32)0x00018196
---- VSRA ----
vsra.s8 q0, q1, #1 :: Qd 0x54545454 0x54545454 0x54545454 0x54545454 Qm (i32)0xffffffff
+vsra.s8 q0, q1, #1 :: Qd 0x28332f32 0x26313631 0x25312f30 0x23363536 Qm (i32)0xffffffff
vsra.s16 q3, q4, #2 :: Qd 0x55545536 0x55545536 0x55545536 0x55545536 Qm (i32)0xffffff84
+vsra.s16 q3, q4, #2 :: Qd 0x1ea82467 0x1d662aa6 0x1c2624e5 0x1aea29aa Qm (i32)0xffffff84
vsra.s32 q2, q5, #31 :: Qd 0x55555554 0x55555554 0x55555554 0x55555554 Qm (i32)0xffffffff
+vsra.s32 q2, q5, #31 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vsra.s8 q6, q7, #7 :: Qd 0x55555454 0x55555454 0x55555454 0x55555454 Qm (i32)0x0000ffff
+vsra.s8 q6, q7, #7 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x0000ffff
vsra.s16 q8, q9, #12 :: Qd 0x55545554 0x55545554 0x55545554 0x55545554 Qm (i32)0xfffffff6
+vsra.s16 q8, q9, #12 :: Qd 0x151f191f 0x141e1f1e 0x131d1a1d 0x12211e21 Qm (i32)0xfffffff6
vsra.s32 q10, q11, #5 :: Qd 0x55555694 0x55555694 0x55555694 0x55555694 Qm (i32)0x000027fa
+vsra.s32 q10, q11, #5 :: Qd 0x164e8286 0x1545708d 0x143c7b74 0x13389790 Qm (i32)0x000027fa
vsra.u8 q12, q13, #1 :: Qd 0xd4d4d4d4 0xd4d4d4d4 0xd4d4d4d4 0xd4d4d4d4 Qm (i32)0xffffffff
+vsra.u8 q12, q13, #1 :: Qd 0x28332f32 0x26313631 0x25312f30 0x23363536 Qm (i32)0xffffffff
vsra.u16 q14, q15, #11 :: Qd 0x55745574 0x55745574 0x55745574 0x55745574 Qm (i32)0xffffffff
+vsra.u16 q14, q15, #11 :: Qd 0x15211922 0x14201f21 0x131f1a20 0x12231e24 Qm (i32)0xffffffff
vsra.u32 q10, q11, #9 :: Qd 0x55555556 0x55555556 0x55555556 0x55555556 Qm (i32)0x000003e8
+vsra.u32 q10, q11, #9 :: Qd 0x15302fb3 0x142eb433 0x132d3030 0x1230b5b6 Qm (i32)0x000003e8
vsra.u8 q7, q13, #7 :: Qd 0x56565656 0x56565656 0x56565656 0x56565656 Qm (i32)0xffffffff
+vsra.u8 q7, q13, #7 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vsra.u16 q8, q1, #5 :: Qd 0x55555ab3 0x55555ab3 0x55555ab3 0x55555ab3 Qm (i32)0x0000abcf
+vsra.u16 q8, q1, #5 :: Qd 0x164e1a86 0x1545208d 0x143c1b74 0x13381f90 Qm (i32)0x0000abcf
vsra.u32 q12, q3, #15 :: Qd 0x55575554 0x55575554 0x55575554 0x55575554 Qm (i32)0xfffffe50
+vsra.u32 q12, q3, #15 :: Qd 0x151d6577 0x141c6970 0x131b6273 0x121f647d Qm (i32)0xfffffe50
vsra.u64 q0, q1, #42 :: Qd 0x55555555 0x55955554 0x55555555 0x55955554 Qm (i32)0xffffffff
+vsra.u64 q0, q1, #42 :: Qd 0x151d191d 0x1425aa67 0x131b1a1b 0x12282929 Qm (i32)0xffffffff
vsra.s64 q6, q7, #12 :: Qd 0x55555556 0x50155555 0x55555556 0x50155555 Qm (i32)0x00000fac
+vsra.s64 q6, q7, #12 :: Qd 0x151f7bef 0xe6be71be 0x131d5cdd 0xc4d15111 Qm (i32)0x00000fac
vsra.u64 q8, q4, #9 :: Qd 0x5555556f 0xd155556f 0x5555556f 0xd155556f Qm (i32)0x000034f8
+vsra.u64 q8, q4, #9 :: Qd 0x15302fb3 0xa92eb433 0x132d3030 0xa7b0b5b6 Qm (i32)0x000034f8
vsra.s64 q9, q12, #11 :: Qd 0x55555585 0x88155585 0x55555585 0x88155585 Qm (i32)0x00018196
+vsra.s64 q9, q12, #11 :: Qd 0x1521dec2 0xb960c461 0x131f9fa0 0x77838404 Qm (i32)0x00018196
---- VSRI ----
vsri.16 q0, q1, #1 :: Qd 0x7fff7fff 0x7fff7fff 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff
+vsri.16 q0, q1, #1 :: Qd 0x13161695 0x12951715 0x12161595 0x11971717 Qm (i32)0xffffffff
vsri.16 q3, q4, #2 :: Qd 0x7fff7fe1 0x7fff7fe1 0x7fff7fe1 0x7fff7fe1 Qm (i32)0xffffff84
+vsri.16 q3, q4, #2 :: Qd 0x098b0b4a 0x094a0b8a 0x090b0aca 0x08cb0b8b Qm (i32)0xffffff84
vsri.32 q2, q5, #31 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0xffffffff
+vsri.32 q2, q5, #31 :: Qd 0x151d191c 0x141c1f1c 0x131b1a1a 0x121f1e1e Qm (i32)0xffffffff
vsri.8 q6, q7, #7 :: Qd 0x54545555 0x54545555 0x54545555 0x54545555 Qm (i32)0x0000ffff
+vsri.8 q6, q7, #7 :: Qd 0x141c181c 0x141c1e1c 0x121a1a1a 0x121e1e1e Qm (i32)0x0000ffff
vsri.16 q8, q9, #12 :: Qd 0x555f555f 0x555f555f 0x555f555f 0x555f555f Qm (i32)0xfffffff6
+vsri.16 q8, q9, #12 :: Qd 0x15121912 0x14121f12 0x13121a12 0x12121e12 Qm (i32)0xfffffff6
vsri.32 q10, q11, #5 :: Qd 0x5000013f 0x5000013f 0x5000013f 0x5000013f Qm (i32)0x000027fa
+vsri.32 q10, q11, #5 :: Qd 0x11316969 0x11295171 0x11216159 0x11197971 Qm (i32)0x000027fa
vsri.8 q12, q13, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff
+vsri.8 q12, q13, #1 :: Qd 0x13161615 0x12151715 0x12161515 0x11171717 Qm (i32)0xffffffff
vsri.16 q14, q15, #11 :: Qd 0x555f555f 0x555f555f 0x555f555f 0x555f555f Qm (i32)0xffffffff
+vsri.16 q14, q15, #11 :: Qd 0x15041905 0x14041f05 0x13041a05 0x12041e05 Qm (i32)0xffffffff
vsri.32 q10, q11, #9 :: Qd 0x55000001 0x55000001 0x55000001 0x55000001 Qm (i32)0x000003e8
+vsri.32 q10, q11, #9 :: Qd 0x15131696 0x14129517 0x13121615 0x12119797 Qm (i32)0x000003e8
vsri.8 q7, q13, #7 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0xffffffff
+vsri.8 q7, q13, #7 :: Qd 0x141c181c 0x141c1e1c 0x121a1a1a 0x121e1e1e Qm (i32)0xffffffff
vsri.16 q8, q1, #5 :: Qd 0x5000555e 0x5000555e 0x5000555e 0x5000555e Qm (i32)0x0000abcf
+vsri.16 q8, q1, #5 :: Qd 0x11311969 0x11291971 0x11211959 0x11191971 Qm (i32)0x0000abcf
vsri.32 q12, q3, #15 :: Qd 0x5555ffff 0x5555ffff 0x5555ffff 0x5555ffff Qm (i32)0xfffffe50
+vsri.32 q12, q3, #15 :: Qd 0x151c4c5a 0x141c4a54 0x131a4858 0x121e465e Qm (i32)0xfffffe50
vsri.64 q0, q1, #42 :: Qd 0x55555555 0x557fffff 0x55555555 0x557fffff Qm (i32)0xffffffff
+vsri.64 q0, q1, #42 :: Qd 0x151d191d 0x14098b4b 0x131b1a1b 0x12090b0a Qm (i32)0xffffffff
vsri.64 q6, q7, #12 :: Qd 0x55500000 0xfac00000 0x55500000 0xfac00000 Qm (i32)0x00000fac
+vsri.64 q6, q7, #12 :: Qd 0x151262d2 0xd2a252a2 0x131242c2 0xb2b232f2 Qm (i32)0x00000fac
vsri.64 q8, q4, #9 :: Qd 0x5500001a 0x7c00001a 0x5500001a 0x7c00001a Qm (i32)0x000034f8
+vsri.64 q8, q4, #9 :: Qd 0x15131696 0x95129517 0x13121615 0x95919797 Qm (i32)0x000034f8
vsri.64 q9, q12, #11 :: Qd 0x55400030 0x32c00030 0x55400030 0x32c00030 Qm (i32)0x00018196
+vsri.64 q9, q12, #11 :: Qd 0x1504c5a5 0xa544a545 0x13048585 0x656465e5 Qm (i32)0x00018196
---- VMOVL ----
vmovl.u32 q0, d2 :: Qd 0x00000000 0x00000042 0x00000000 0x00000042 Qm (i32)0x00000042
+vmovl.u32 q0, d2 :: Qd 0x00000000 0x242c2b2b 0x00000000 0x232f2e2f Qm (i32)0x00000042
vmovl.u16 q15, d2 :: Qd 0x00000000 0x00000042 0x00000000 0x00000042 Qm (i32)0x00000042
+vmovl.u16 q15, d2 :: Qd 0x0000242c 0x00002b2b 0x0000232f 0x00002e2f Qm (i32)0x00000042
vmovl.u8 q3, d31 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0x00000042
+vmovl.u8 q3, d31 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x00000042
vmovl.s32 q0, d2 :: Qd 0x00000000 0x00000042 0x00000000 0x00000042 Qm (i32)0x00000042
+vmovl.s32 q0, d2 :: Qd 0x00000000 0x242c2b2b 0x00000000 0x232f2e2f Qm (i32)0x00000042
vmovl.s16 q15, d2 :: Qd 0x00000000 0x00000042 0x00000000 0x00000042 Qm (i32)0x00000042
+vmovl.s16 q15, d2 :: Qd 0x0000242c 0x00002b2b 0x0000232f 0x00002e2f Qm (i32)0x00000042
vmovl.s8 q3, d31 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i32)0x00000042
+vmovl.s8 q3, d31 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x00000042
vmovl.u32 q0, d2 :: Qd 0x00000000 0xedededed 0x00000000 0xedededed Qm (i8)0x000000ed
+vmovl.u32 q0, d2 :: Qd 0x00000000 0x242c2b2b 0x00000000 0x232f2e2f Qm (i8)0x000000ed
vmovl.u16 q15, d2 :: Qd 0x0000eded 0x0000eded 0x0000eded 0x0000eded Qm (i8)0x000000ed
+vmovl.u16 q15, d2 :: Qd 0x0000242c 0x00002b2b 0x0000232f 0x00002e2f Qm (i8)0x000000ed
vmovl.u8 q3, d31 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i8)0x000000ed
+vmovl.u8 q3, d31 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i8)0x000000ed
vmovl.s32 q0, d2 :: Qd 0xffffffff 0xedededed 0xffffffff 0xedededed Qm (i8)0x000000ed
+vmovl.s32 q0, d2 :: Qd 0x00000000 0x242c2b2b 0x00000000 0x232f2e2f Qm (i8)0x000000ed
vmovl.s16 q15, d2 :: Qd 0xffffeded 0xffffeded 0xffffeded 0xffffeded Qm (i8)0x000000ed
+vmovl.s16 q15, d2 :: Qd 0x0000242c 0x00002b2b 0x0000232f 0x00002e2f Qm (i8)0x000000ed
vmovl.s8 q3, d31 :: Qd 0x55555555 0x55555555 0x55555555 0x55555555 Qm (i8)0x000000ed
+vmovl.s8 q3, d31 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i8)0x000000ed
---- VABS ----
vabs.s32 q0, q1 :: Qd 0x00000073 0x00000073 0x00000073 0x00000073 Qm (i32)0x00000073
+vabs.s32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000073
vabs.s16 q15, q4 :: Qd 0x00000073 0x00000073 0x00000073 0x00000073 Qm (i32)0x00000073
+vabs.s16 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000073
vabs.s8 q8, q7 :: Qd 0x00000073 0x00000073 0x00000073 0x00000073 Qm (i32)0x00000073
+vabs.s8 q8, q7 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000073
vabs.s32 q0, q1 :: Qd 0x000000fe 0x000000fe 0x000000fe 0x000000fe Qm (i32)0x000000fe
+vabs.s32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x000000fe
vabs.s16 q15, q4 :: Qd 0x000000ef 0x000000ef 0x000000ef 0x000000ef Qm (i32)0x000000ef
+vabs.s16 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x000000ef
vabs.s8 q8, q7 :: Qd 0x00000022 0x00000022 0x00000022 0x00000022 Qm (i32)0x000000de
+vabs.s8 q8, q7 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x000000de
vabs.s32 q0, q1 :: Qd 0x01f501f6 0x01f501f6 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a
+vabs.s32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i16)0x0000fe0a
vabs.s16 q15, q4 :: Qd 0x10f510f5 0x10f510f5 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b
+vabs.s16 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i16)0x0000ef0b
vabs.s8 q8, q7 :: Qd 0x220c220c 0x220c220c 0x220c220c 0x220c220c Qm (i16)0x0000de0c
+vabs.s8 q8, q7 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i16)0x0000de0c
---- VQABS ----
vqabs.s32 q0, q1 :: Qd 0x00000073 0x00000073 0x00000073 0x00000073 Qm (i32)0x00000073 fpscr: 00000000
+vqabs.s32 q0, q1 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x00000073 fpscr: 00000000
vqabs.s32 q0, q1 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x80000000 fpscr: 08000000
+vqabs.s32 q0, q1 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x80000000 fpscr: 00000000
vqabs.s16 q0, q1 :: Qd 0x7fff0000 0x7fff0000 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 fpscr: 08000000
+vqabs.s16 q0, q1 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x80000000 fpscr: 00000000
vqabs.s8 q0, q1 :: Qd 0x7f000000 0x7f000000 0x7f000000 0x7f000000 Qm (i32)0x80000000 fpscr: 08000000
+vqabs.s8 q0, q1 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x80000000 fpscr: 00000000
vqabs.s16 q15, q4 :: Qd 0x00000073 0x00000073 0x00000073 0x00000073 Qm (i32)0x00000073 fpscr: 00000000
+vqabs.s16 q15, q4 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x00000073 fpscr: 00000000
vqabs.s8 q8, q7 :: Qd 0x00000073 0x00000073 0x00000073 0x00000073 Qm (i32)0x00000073 fpscr: 00000000
+vqabs.s8 q8, q7 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x00000073 fpscr: 00000000
vqabs.s32 q0, q1 :: Qd 0x000000fe 0x000000fe 0x000000fe 0x000000fe Qm (i32)0x000000fe fpscr: 00000000
+vqabs.s32 q0, q1 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x000000fe fpscr: 00000000
vqabs.s16 q15, q4 :: Qd 0x000000ef 0x000000ef 0x000000ef 0x000000ef Qm (i32)0x000000ef fpscr: 00000000
+vqabs.s16 q15, q4 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x000000ef fpscr: 00000000
vqabs.s8 q8, q7 :: Qd 0x00000022 0x00000022 0x00000022 0x00000022 Qm (i32)0x000000de fpscr: 00000000
+vqabs.s8 q8, q7 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i32)0x000000de fpscr: 00000000
vqabs.s32 q0, q1 :: Qd 0x01f501f6 0x01f501f6 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a fpscr: 00000000
+vqabs.s32 q0, q1 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i16)0x0000fe0a fpscr: 00000000
vqabs.s16 q15, q4 :: Qd 0x10f510f5 0x10f510f5 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b fpscr: 00000000
+vqabs.s16 q15, q4 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i16)0x0000ef0b fpscr: 00000000
vqabs.s8 q8, q7 :: Qd 0x220c220c 0x220c220c 0x220c220c 0x220c220c Qm (i16)0x0000de0c fpscr: 00000000
+vqabs.s8 q8, q7 :: Qd 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f Qm (i16)0x0000de0c fpscr: 00000000
---- VADDW ----
vaddw.s32 q0, q1, d4 :: Qd 0x00000073 0x12121285 0x00000073 0x12121285 Qm (i32)0x00000073 Qn (i8)0x00000012
vaddw.s16 q15, q14, d4 :: Qd 0x00001285 0x00001285 0x00001285 0x00001285 Qm (i32)0x00000073 Qn (i8)0x00000012
vsubl.u8 q0, d2, d4 :: Qd 0xffb1ffb1 0xffb1ffb1 0xffb1ffb1 0xffb1ffb1 Qm (i8)0x00000093 Qn (i8)0x000000e2
---- VCEQ #0 ----
vceq.i32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
+vceq.i32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vceq.i16 q2, q1, #0 :: Qd 0xffff0000 0xffff0000 0xffff0000 0xffff0000 Qm (i32)0x00000021
+vceq.i16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vceq.i8 q10, q11, #0 :: Qd 0xffffff00 0xffffff00 0xffffff00 0xffffff00 Qm (i32)0x00000021
+vceq.i8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vceq.i32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.i32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vceq.i16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.i16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vceq.i8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.i8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
---- VCGT #0 ----
vcgt.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcgt.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
vcgt.s16 q2, q1, #0 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x00000021
+vcgt.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
vcgt.s8 q10, q11, #0 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x00000021
+vcgt.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
vcgt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ef
+vcgt.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ef
vcgt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ed
+vcgt.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ed
vcgt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ae
+vcgt.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ae
---- VCGE #0 ----
vcge.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcge.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcge.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
vcge.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
vcge.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcge.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000021
vcge.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcge.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcge.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcge.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ef
+vcge.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ef
vcge.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ed
+vcge.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ed
vcge.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ae
+vcge.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ae
+vcge.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x000000ef
vcge.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x000000ef
vcge.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x000000ed
+vcge.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x000000ed
vcge.s8 q10, q11, #0 :: Qd 0xffffff00 0xffffff00 0xffffff00 0xffffff00 Qm (i32)0x000000ae
+vcge.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x000000ae
---- VCLE #0 ----
vcle.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
+vcle.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vcle.s16 q2, q1, #0 :: Qd 0xffff0000 0xffff0000 0xffff0000 0xffff0000 Qm (i32)0x00000021
+vcle.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vcle.s8 q10, q11, #0 :: Qd 0xffffff00 0xffffff00 0xffffff00 0xffffff00 Qm (i32)0x00000021
+vcle.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vcle.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcle.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcle.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcle.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ef
+vcle.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ef
vcle.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ed
+vcle.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ed
vcle.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ae
+vcle.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ae
---- VCLT #0 ----
vclt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
+vclt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vclt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
+vclt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
+vclt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vclt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000021
vclt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.s32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ef
+vclt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ef
vclt.s16 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ed
+vclt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ed
vclt.s8 q10, q11, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i8)0x000000ae
+vclt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ae
vclt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x000000ef
+vclt.s32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x000000ef
+vclt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x000000ed
vclt.s16 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x000000ed
vclt.s8 q10, q11, #0 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x000000ae
+vclt.s8 q10, q11, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x000000ae
---- VCNT ----
vcnt.8 q0, q1 :: Qd 0x04050306 0x04050306 0x04050306 0x04050306 Qm (i32)0xac3d25eb
+vcnt.8 q0, q1 :: Qd 0x03040403 0x03030404 0x02030404 0x03050405 Qm (i32)0xac3d25eb
vcnt.8 q11, q14 :: Qd 0x04050306 0x04050306 0x04050306 0x04050306 Qm (i32)0xac3d25eb
+vcnt.8 q11, q14 :: Qd 0x03040403 0x03030404 0x02030404 0x03050405 Qm (i32)0xac3d25eb
vcnt.8 q6, q2 :: Qd 0x00020306 0x00020306 0x00020306 0x00020306 Qm (i32)0x000ad0eb
+vcnt.8 q6, q2 :: Qd 0x03040403 0x03030404 0x02030404 0x03050405 Qm (i32)0x000ad0eb
---- VCLS ----
vcls.s8 q0, q1 :: Qd 0x07070701 0x07070701 0x07070701 0x07070701 Qm (i32)0x00000021
+vcls.s8 q0, q1 :: Qd 0x01010101 0x01010101 0x01010101 0x01010101 Qm (i32)0x00000021
vcls.s8 q10, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x00000082
+vcls.s8 q10, q15 :: Qd 0x01010101 0x01010101 0x01010101 0x01010101 Qm (i8)0x00000082
vcls.s16 q0, q1 :: Qd 0x000f0009 0x000f0009 0x000f0009 0x000f0009 Qm (i32)0x00000021
+vcls.s16 q0, q1 :: Qd 0x00010001 0x00010001 0x00010001 0x00010001 Qm (i32)0x00000021
vcls.s16 q15, q10 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x00000082
+vcls.s16 q15, q10 :: Qd 0x00010001 0x00010001 0x00010001 0x00010001 Qm (i8)0x00000082
vcls.s32 q6, q1 :: Qd 0x00000019 0x00000019 0x00000019 0x00000019 Qm (i32)0x00000021
+vcls.s32 q6, q1 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i32)0x00000021
vcls.s32 q10, q5 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x00000082
+vcls.s32 q10, q5 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i8)0x00000082
vcls.s8 q2, q4 :: Qd 0x07070707 0x07070707 0x07070707 0x07070707 Qm (i8)0x000000ff
+vcls.s8 q2, q4 :: Qd 0x01010101 0x01010101 0x01010101 0x01010101 Qm (i8)0x000000ff
vcls.s16 q2, q4 :: Qd 0x000f000f 0x000f000f 0x000f000f 0x000f000f Qm (i8)0x000000ff
+vcls.s16 q2, q4 :: Qd 0x00010001 0x00010001 0x00010001 0x00010001 Qm (i8)0x000000ff
vcls.s32 q2, q4 :: Qd 0x0000001f 0x0000001f 0x0000001f 0x0000001f Qm (i8)0x000000ff
+vcls.s32 q2, q4 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i8)0x000000ff
vcls.s8 q2, q4 :: Qd 0x07020702 0x07020702 0x07020702 0x07020702 Qm (i16)0x0000ffef
+vcls.s8 q2, q4 :: Qd 0x01010101 0x01010101 0x01010101 0x01010101 Qm (i16)0x0000ffef
vcls.s16 q2, q4 :: Qd 0x000a000a 0x000a000a 0x000a000a 0x000a000a Qm (i16)0x0000ffef
+vcls.s16 q2, q4 :: Qd 0x00010001 0x00010001 0x00010001 0x00010001 Qm (i16)0x0000ffef
vcls.s32 q2, q4 :: Qd 0x0000000a 0x0000000a 0x0000000a 0x0000000a Qm (i16)0x0000ffef
+vcls.s32 q2, q4 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i16)0x0000ffef
vcls.s8 q2, q4 :: Qd 0x07070707 0x07070707 0x07070707 0x07070707 Qm (i8)0x00000000
+vcls.s8 q2, q4 :: Qd 0x01010101 0x01010101 0x01010101 0x01010101 Qm (i8)0x00000000
vcls.s16 q2, q4 :: Qd 0x000f000f 0x000f000f 0x000f000f 0x000f000f Qm (i8)0x00000000
+vcls.s16 q2, q4 :: Qd 0x00010001 0x00010001 0x00010001 0x00010001 Qm (i8)0x00000000
vcls.s32 q2, q4 :: Qd 0x0000001f 0x0000001f 0x0000001f 0x0000001f Qm (i8)0x00000000
+vcls.s32 q2, q4 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i8)0x00000000
vcls.s8 q2, q4 :: Qd 0x07020702 0x07020702 0x07020702 0x07020702 Qm (i16)0x000000ef
+vcls.s8 q2, q4 :: Qd 0x01010101 0x01010101 0x01010101 0x01010101 Qm (i16)0x000000ef
vcls.s16 q2, q4 :: Qd 0x00070007 0x00070007 0x00070007 0x00070007 Qm (i16)0x000000ef
+vcls.s16 q2, q4 :: Qd 0x00010001 0x00010001 0x00010001 0x00010001 Qm (i16)0x000000ef
vcls.s32 q2, q4 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007 Qm (i16)0x000000ef
+vcls.s32 q2, q4 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i16)0x000000ef
---- VCLZ ----
vclz.i8 q0, q1 :: Qd 0x08080802 0x08080802 0x08080802 0x08080802 Qm (i32)0x00000021
+vclz.i8 q0, q1 :: Qd 0x02020202 0x02020202 0x02020202 0x02020202 Qm (i32)0x00000021
vclz.i8 q10, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x00000082
+vclz.i8 q10, q15 :: Qd 0x02020202 0x02020202 0x02020202 0x02020202 Qm (i8)0x00000082
vclz.i16 q0, q1 :: Qd 0x0010000a 0x0010000a 0x0010000a 0x0010000a Qm (i32)0x00000021
+vclz.i16 q0, q1 :: Qd 0x00020002 0x00020002 0x00020002 0x00020002 Qm (i32)0x00000021
vclz.i16 q15, q10 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x00000082
+vclz.i16 q15, q10 :: Qd 0x00020002 0x00020002 0x00020002 0x00020002 Qm (i8)0x00000082
vclz.i32 q6, q1 :: Qd 0x0000001a 0x0000001a 0x0000001a 0x0000001a Qm (i32)0x00000021
+vclz.i32 q6, q1 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000021
vclz.i32 q10, q5 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x00000082
+vclz.i32 q10, q5 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i8)0x00000082
vclz.i8 q2, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ff
+vclz.i8 q2, q4 :: Qd 0x02020202 0x02020202 0x02020202 0x02020202 Qm (i8)0x000000ff
vclz.i16 q2, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ff
+vclz.i16 q2, q4 :: Qd 0x00020002 0x00020002 0x00020002 0x00020002 Qm (i8)0x000000ff
vclz.i32 q2, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i8)0x000000ff
+vclz.i32 q2, q4 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i8)0x000000ff
vclz.i8 q2, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i16)0x0000ffef
+vclz.i8 q2, q4 :: Qd 0x02020202 0x02020202 0x02020202 0x02020202 Qm (i16)0x0000ffef
vclz.i16 q2, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i16)0x0000ffef
+vclz.i16 q2, q4 :: Qd 0x00020002 0x00020002 0x00020002 0x00020002 Qm (i16)0x0000ffef
vclz.i32 q2, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i16)0x0000ffef
+vclz.i32 q2, q4 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i16)0x0000ffef
vclz.i8 q2, q4 :: Qd 0x08080808 0x08080808 0x08080808 0x08080808 Qm (i8)0x00000000
+vclz.i8 q2, q4 :: Qd 0x02020202 0x02020202 0x02020202 0x02020202 Qm (i8)0x00000000
vclz.i16 q2, q4 :: Qd 0x00100010 0x00100010 0x00100010 0x00100010 Qm (i8)0x00000000
+vclz.i16 q2, q4 :: Qd 0x00020002 0x00020002 0x00020002 0x00020002 Qm (i8)0x00000000
vclz.i32 q2, q4 :: Qd 0x00000020 0x00000020 0x00000020 0x00000020 Qm (i8)0x00000000
+vclz.i32 q2, q4 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i8)0x00000000
vclz.i8 q2, q4 :: Qd 0x08000800 0x08000800 0x08000800 0x08000800 Qm (i16)0x000000ef
+vclz.i8 q2, q4 :: Qd 0x02020202 0x02020202 0x02020202 0x02020202 Qm (i16)0x000000ef
vclz.i16 q2, q4 :: Qd 0x00080008 0x00080008 0x00080008 0x00080008 Qm (i16)0x000000ef
+vclz.i16 q2, q4 :: Qd 0x00020002 0x00020002 0x00020002 0x00020002 Qm (i16)0x000000ef
vclz.i32 q2, q4 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i16)0x000000ef
+vclz.i32 q2, q4 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i16)0x000000ef
---- VSLI ----
vsli.16 q0, q1, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vsli.16 q0, q1, #1 :: Qd 0x4c5b5a55 0x4a545c56 0x48595657 0x465f5c5f Qm (i32)0xffffffff
vsli.16 q3, q4, #2 :: Qd 0xfffdfe11 0xfffdfe11 0xfffdfe11 0xfffdfe11 Qm (i32)0xffffff84
+vsli.16 q3, q4, #2 :: Qd 0x98b5b4a9 0x94a8b8ac 0x90b3acaf 0x8cbfb8bf Qm (i32)0xffffff84
vsli.32 q2, q5, #31 :: Qd 0xd5555555 0xd5555555 0xd5555555 0xd5555555 Qm (i32)0xffffffff
+vsli.32 q2, q5, #31 :: Qd 0x151d191d 0x941c1f1c 0x931b1a1b 0x921f1e1f Qm (i32)0xffffffff
vsli.8 q6, q7, #7 :: Qd 0x5555d5d5 0x5555d5d5 0x5555d5d5 0x5555d5d5 Qm (i32)0x0000ffff
+vsli.8 q6, q7, #7 :: Qd 0x159d991d 0x941c1f9c 0x131b9a9b 0x929f1e9f Qm (i32)0x0000ffff
vsli.16 q8, q9, #12 :: Qd 0xf5556555 0xf5556555 0xf5556555 0xf5556555 Qm (i32)0xfffffff6
+vsli.16 q8, q9, #12 :: Qd 0xd51da91d 0xa41cbf1c 0xc31bba1b 0xf21ffe1f Qm (i32)0xfffffff6
vsli.32 q10, q11, #5 :: Qd 0x0004ff55 0x0004ff55 0x0004ff55 0x0004ff55 Qm (i32)0x000027fa
+vsli.32 q10, q11, #5 :: Qd 0xc5a5a55d 0xa545c57c 0x8585657b 0x65e5c5ff Qm (i32)0x000027fa
vsli.8 q12, q13, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vsli.8 q12, q13, #1 :: Qd 0x4d5b5b55 0x4a545d56 0x49595657 0x465f5c5f Qm (i32)0xffffffff
vsli.16 q14, q15, #11 :: Qd 0xfd55fd55 0xfd55fd55 0xfd55fd55 0xfd55fd55 Qm (i32)0xffffffff
+vsli.16 q14, q15, #11 :: Qd 0x6d1d511d 0x541c5f1c 0x631b5a1b 0x7a1f7e1f Qm (i32)0xffffffff
vsli.32 q10, q11, #9 :: Qd 0x0007d155 0x0007d155 0x0007d155 0x0007d155 Qm (i32)0x000003e8
+vsli.32 q10, q11, #9 :: Qd 0x5a5a551d 0x545c571c 0x5856561b 0x5e5c5e1f Qm (i32)0x000003e8
vsli.8 q7, q13, #7 :: Qd 0xd5d5d5d5 0xd5d5d5d5 0xd5d5d5d5 0xd5d5d5d5 Qm (i32)0xffffffff
+vsli.8 q7, q13, #7 :: Qd 0x159d991d 0x941c1f9c 0x131b9a9b 0x929f1e9f Qm (i32)0xffffffff
vsli.16 q8, q1, #1 :: Qd 0x0001579f 0x0001579f 0x0001579f 0x0001579f Qm (i32)0x0000abcf
+vsli.16 q8, q1, #1 :: Qd 0x4c5b5a55 0x4a545c56 0x48595657 0x465f5c5f Qm (i32)0x0000abcf
vsli.32 q12, q3, #15 :: Qd 0xff285555 0xff285555 0xff285555 0xff285555 Qm (i32)0xfffffe50
+vsli.32 q12, q3, #15 :: Qd 0x9695191d 0x17159f1c 0x15959a1b 0x97179e1f Qm (i32)0xfffffe50
vsli.64 q0, q1, #42 :: Qd 0xfffffd55 0x55555555 0xfffffd55 0x55555555 Qm (i32)0xffffffff
+vsli.64 q0, q1, #42 :: Qd 0xa8b8ad1d 0x141c1f1c 0xbcb8be1b 0x121f1e1f Qm (i32)0xffffffff
vsli.64 q6, q7, #12 :: Qd 0x00fac000 0x00fac555 0x00fac000 0x00fac555 Qm (i32)0x00000fac
+vsli.64 q6, q7, #12 :: Qd 0xd2d2a252 0xa2e2bf1c 0xc2b2b232 0xf2e2fe1f Qm (i32)0x00000fac
vsli.64 q8, q4, #9 :: Qd 0x0069f000 0x0069f155 0x0069f000 0x0069f155 Qm (i32)0x000034f8
+vsli.64 q8, q4, #9 :: Qd 0x5a5a544a 0x545c571c 0x58565646 0x5e5c5e1f Qm (i32)0x000034f8
vsli.64 q9, q12, #11 :: Qd 0x0c0cb000 0x0c0cb555 0x0c0cb000 0x0c0cb555 Qm (i32)0x00018196
+vsli.64 q9, q12, #11 :: Qd 0x69695129 0x51715f1c 0x61595919 0x79717e1f Qm (i32)0x00018196
---- VPADDL ----
vpaddl.u32 q0, q1 :: Qd 0x00000000 0x00000030 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.u32 q0, q1 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x00000018
vpaddl.u32 q0, q1 :: Qd 0x00000000 0x00000118 0x00000000 0x00000118 Qm (i32)0x0000008c
+vpaddl.u32 q0, q1 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x0000008c
vpaddl.u16 q0, q1 :: Qd 0x0000008c 0x0000008c 0x0000008c 0x0000008c Qm (i32)0x0000008c
+vpaddl.u16 q0, q1 :: Qd 0x00005357 0x00005355 0x00004f57 0x0000515e Qm (i32)0x0000008c
vpaddl.u8 q0, q1 :: Qd 0x0000008c 0x0000008c 0x0000008c 0x0000008c Qm (i32)0x0000008c
+vpaddl.u8 q0, q1 :: Qd 0x00530057 0x004f0059 0x00500056 0x0052005d Qm (i32)0x0000008c
vpaddl.u8 q0, q1 :: Qd 0x00800001 0x00800001 0x00800001 0x00800001 Qm (i32)0x80000001
+vpaddl.u8 q0, q1 :: Qd 0x00530057 0x004f0059 0x00500056 0x0052005d Qm (i32)0x80000001
vpaddl.u16 q0, q1 :: Qd 0x00008001 0x00008001 0x00008001 0x00008001 Qm (i32)0x80000001
+vpaddl.u16 q0, q1 :: Qd 0x00005357 0x00005355 0x00004f57 0x0000515e Qm (i32)0x80000001
vpaddl.u32 q0, q1 :: Qd 0x00000001 0x00000002 0x00000001 0x00000002 Qm (i32)0x80000001
+vpaddl.u32 q0, q1 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x80000001
vpaddl.u32 q10, q11 :: Qd 0x00000000 0x00000030 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.u32 q10, q11 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x00000018
vpaddl.s32 q0, q1 :: Qd 0x00000000 0x00000030 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.s32 q0, q1 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x00000018
vpaddl.s32 q0, q1 :: Qd 0x00000000 0x00000118 0x00000000 0x00000118 Qm (i32)0x0000008c
+vpaddl.s32 q0, q1 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x0000008c
vpaddl.s16 q0, q1 :: Qd 0x0000008c 0x0000008c 0x0000008c 0x0000008c Qm (i32)0x0000008c
+vpaddl.s16 q0, q1 :: Qd 0x00005357 0x00005355 0x00004f57 0x0000515e Qm (i32)0x0000008c
vpaddl.s8 q0, q1 :: Qd 0x0000ff8c 0x0000ff8c 0x0000ff8c 0x0000ff8c Qm (i32)0x0000008c
+vpaddl.s8 q0, q1 :: Qd 0x00530057 0x004f0059 0x00500056 0x0052005d Qm (i32)0x0000008c
vpaddl.s8 q0, q1 :: Qd 0xff800001 0xff800001 0xff800001 0xff800001 Qm (i32)0x80000001
+vpaddl.s8 q0, q1 :: Qd 0x00530057 0x004f0059 0x00500056 0x0052005d Qm (i32)0x80000001
vpaddl.s16 q0, q1 :: Qd 0xffff8001 0xffff8001 0xffff8001 0xffff8001 Qm (i32)0x80000001
+vpaddl.s16 q0, q1 :: Qd 0x00005357 0x00005355 0x00004f57 0x0000515e Qm (i32)0x80000001
vpaddl.s32 q0, q1 :: Qd 0xffffffff 0x00000002 0xffffffff 0x00000002 Qm (i32)0x80000001
+vpaddl.s32 q0, q1 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x80000001
vpaddl.s32 q10, q11 :: Qd 0x00000000 0x00000030 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.s32 q10, q11 :: Qd 0x00000000 0x4b575b55 0x00000000 0x475b595a Qm (i32)0x00000018
---- VPADAL ----
vpadal.u32 q0, q1 :: Qd 0x55555555 0x55555585 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.u32 q0, q1 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x00000018
vpadal.u32 q0, q1 :: Qd 0x55555555 0x5555566d 0x55555555 0x5555566d Qm (i32)0x0000008c
+vpadal.u32 q0, q1 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x0000008c
vpadal.u16 q0, q1 :: Qd 0x555555e1 0x555555e1 0x555555e1 0x555555e1 Qm (i32)0x0000008c
+vpadal.u16 q0, q1 :: Qd 0x151d6c74 0x141c7271 0x131b6972 0x121f6f7d Qm (i32)0x0000008c
vpadal.u8 q0, q1 :: Qd 0x566d566d 0x566d566d 0x566d566d 0x566d566d Qm (i8)0x0000008c
+vpadal.u8 q0, q1 :: Qd 0x15701974 0x146b1f75 0x136b1a71 0x12711e7c Qm (i8)0x0000008c
vpadal.u8 q0, q1 :: Qd 0x55d55556 0x55d55556 0x55d55556 0x55d55556 Qm (i32)0x80000001
+vpadal.u8 q0, q1 :: Qd 0x15701974 0x146b1f75 0x136b1a71 0x12711e7c Qm (i32)0x80000001
vpadal.u16 q0, q1 :: Qd 0x5555d556 0x5555d556 0x5555d556 0x5555d556 Qm (i32)0x80000001
+vpadal.u16 q0, q1 :: Qd 0x151d6c74 0x141c7271 0x131b6972 0x121f6f7d Qm (i32)0x80000001
vpadal.u32 q0, q1 :: Qd 0x55555556 0x55555557 0x55555556 0x55555557 Qm (i32)0x80000001
+vpadal.u32 q0, q1 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x80000001
vpadal.u32 q10, q11 :: Qd 0x55555555 0x55555585 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.u32 q10, q11 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x00000018
vpadal.s32 q0, q1 :: Qd 0x55555555 0x55555585 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.s32 q0, q1 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x00000018
vpadal.s32 q0, q1 :: Qd 0x55555555 0x5555566d 0x55555555 0x5555566d Qm (i32)0x0000008c
+vpadal.s32 q0, q1 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x0000008c
vpadal.s16 q0, q1 :: Qd 0x555555e1 0x555555e1 0x555555e1 0x555555e1 Qm (i32)0x0000008c
+vpadal.s16 q0, q1 :: Qd 0x151d6c74 0x141c7271 0x131b6972 0x121f6f7d Qm (i32)0x0000008c
vpadal.s8 q0, q1 :: Qd 0x546d546d 0x546d546d 0x546d546d 0x546d546d Qm (i8)0x0000008c
+vpadal.s8 q0, q1 :: Qd 0x15701974 0x146b1f75 0x136b1a71 0x12711e7c Qm (i8)0x0000008c
vpadal.s8 q0, q1 :: Qd 0x54d55556 0x54d55556 0x54d55556 0x54d55556 Qm (i32)0x80000001
+vpadal.s8 q0, q1 :: Qd 0x15701974 0x146b1f75 0x136b1a71 0x12711e7c Qm (i32)0x80000001
vpadal.s16 q0, q1 :: Qd 0x5554d556 0x5554d556 0x5554d556 0x5554d556 Qm (i32)0x80000001
+vpadal.s16 q0, q1 :: Qd 0x151d6c74 0x141c7271 0x131b6972 0x121f6f7d Qm (i32)0x80000001
vpadal.s32 q0, q1 :: Qd 0x55555554 0x55555557 0x55555554 0x55555557 Qm (i32)0x80000001
+vpadal.s32 q0, q1 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x80000001
vpadal.s32 q10, q11 :: Qd 0x55555555 0x55555585 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.s32 q10, q11 :: Qd 0x151d191d 0x5f737a71 0x131b1a1b 0x597a7779 Qm (i32)0x00000018
---- VZIP ----
vzip.32 q0, q1 :: Qm 0x34343434 0x12121212 0x34343434 0x12121212 Qn 0x34343434 0x12121212 0x34343434 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.32 q0, q1 :: Qm 0x34343434 0x131b1a1b 0x34343434 0x121f1e1f Qn 0x34343434 0x151d191d 0x34343434 0x141c1f1c
+Qm (i8)0x00000012 Qn (i8)0x00000034
vzip.16 q1, q0 :: Qm 0x12123434 0x12123434 0x12123434 0x12123434 Qn 0x12123434 0x12123434 0x12123434 0x12123434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.16 q1, q0 :: Qm 0x151d3434 0x191d3434 0x141c3434 0x1f1c3434 Qn 0x131b3434 0x1a1b3434 0x121f3434 0x1e1f3434
+Qm (i8)0x00000012 Qn (i8)0x00000034
vzip.8 q10, q11 :: Qm 0x34123412 0x34123412 0x34123412 0x34123412 Qn 0x34123412 0x34123412 0x34123412 0x34123412 Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.8 q10, q11 :: Qm 0x3413341b 0x341a341b 0x3412341f 0x341e341f Qn 0x3415341d 0x3419341d 0x3414341c 0x341f341c
+Qm (i8)0x00000012 Qn (i8)0x00000034
vzip.32 q0, q1 :: Qm 0x0a0b0c0d 0x12345678 0x0a0b0c0d 0x12345678 Qn 0x0a0b0c0d 0x12345678 0x0a0b0c0d 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.32 q0, q1 :: Qm 0x0a0b0c0d 0x131b1a1b 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x151d191d 0x0a0b0c0d 0x141c1f1c
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vzip.16 q1, q0 :: Qm 0x12340a0b 0x56780c0d 0x12340a0b 0x56780c0d Qn 0x12340a0b 0x56780c0d 0x12340a0b 0x56780c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.16 q1, q0 :: Qm 0x151d0a0b 0x191d0c0d 0x141c0a0b 0x1f1c0c0d Qn 0x131b0a0b 0x1a1b0c0d 0x121f0a0b 0x1e1f0c0d
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vzip.8 q10, q11 :: Qm 0x0a120b34 0x0c560d78 0x0a120b34 0x0c560d78 Qn 0x0a120b34 0x0c560d78 0x0a120b34 0x0c560d78 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.8 q10, q11 :: Qm 0x0a130b1b 0x0c1a0d1b 0x0a120b1f 0x0c1e0d1f Qn 0x0a150b1d 0x0c190d1d 0x0a140b1c 0x0c1f0d1c
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VUZP ----
vuzp.32 q0, q1 :: Qm 0x34343434 0x34343434 0x12121212 0x12121212 Qn 0x34343434 0x34343434 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.32 q0, q1 :: Qm 0x34343434 0x34343434 0x141c1f1c 0x121f1e1f Qn 0x34343434 0x34343434 0x151d191d 0x131b1a1b
+Qm (i8)0x00000012 Qn (i8)0x00000034
vuzp.16 q1, q0 :: Qm 0x12121212 0x12121212 0x34343434 0x34343434 Qn 0x12121212 0x12121212 0x34343434 0x34343434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.16 q1, q0 :: Qm 0x151d141c 0x131b121f 0x34343434 0x34343434 Qn 0x191d1f1c 0x1a1b1e1f 0x34343434 0x34343434
+Qm (i8)0x00000012 Qn (i8)0x00000034
vuzp.8 q10, q11 :: Qm 0x34343434 0x34343434 0x12121212 0x12121212 Qn 0x34343434 0x34343434 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.8 q10, q11 :: Qm 0x34343434 0x34343434 0x1d1d1c1c 0x1b1b1f1f Qn 0x34343434 0x34343434 0x1519141f 0x131a121e
+Qm (i8)0x00000012 Qn (i8)0x00000034
vuzp.32 q0, q1 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x12345678 0x12345678 Qn 0x0a0b0c0d 0x0a0b0c0d 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.32 q0, q1 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x141c1f1c 0x121f1e1f Qn 0x0a0b0c0d 0x0a0b0c0d 0x151d191d 0x131b1a1b
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vuzp.16 q1, q0 :: Qm 0x12341234 0x12341234 0x0a0b0a0b 0x0a0b0a0b Qn 0x56785678 0x56785678 0x0c0d0c0d 0x0c0d0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.16 q1, q0 :: Qm 0x151d141c 0x131b121f 0x0a0b0a0b 0x0a0b0a0b Qn 0x191d1f1c 0x1a1b1e1f 0x0c0d0c0d 0x0c0d0c0d
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vuzp.8 q10, q11 :: Qm 0x0b0d0b0d 0x0b0d0b0d 0x34783478 0x34783478 Qn 0x0a0c0a0c 0x0a0c0a0c 0x12561256 0x12561256 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.8 q10, q11 :: Qm 0x0b0d0b0d 0x0b0d0b0d 0x1d1d1c1c 0x1b1b1f1f Qn 0x0a0c0a0c 0x0a0c0a0c 0x1519141f 0x131a121e
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VTRN ----
vtrn.32 q0, q1 :: Qm 0x34343434 0x12121212 0x34343434 0x12121212 Qn 0x34343434 0x12121212 0x34343434 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.32 q0, q1 :: Qm 0x34343434 0x141c1f1c 0x34343434 0x121f1e1f Qn 0x34343434 0x151d191d 0x34343434 0x131b1a1b
+Qm (i8)0x00000012 Qn (i8)0x00000034
vtrn.16 q1, q0 :: Qm 0x12123434 0x12123434 0x12123434 0x12123434 Qn 0x12123434 0x12123434 0x12123434 0x12123434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.16 q1, q0 :: Qm 0x151d3434 0x141c3434 0x131b3434 0x121f3434 Qn 0x191d3434 0x1f1c3434 0x1a1b3434 0x1e1f3434
+Qm (i8)0x00000012 Qn (i8)0x00000034
vtrn.8 q10, q11 :: Qm 0x34123412 0x34123412 0x34123412 0x34123412 Qn 0x34123412 0x34123412 0x34123412 0x34123412 Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.8 q10, q11 :: Qm 0x341d341d 0x341c341c 0x341b341b 0x341f341f Qn 0x34153419 0x3414341f 0x3413341a 0x3412341e
+Qm (i8)0x00000012 Qn (i8)0x00000034
vtrn.32 q0, q1 :: Qm 0x0a0b0c0d 0x12345678 0x0a0b0c0d 0x12345678 Qn 0x0a0b0c0d 0x12345678 0x0a0b0c0d 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.32 q0, q1 :: Qm 0x0a0b0c0d 0x141c1f1c 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x151d191d 0x0a0b0c0d 0x131b1a1b
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vtrn.16 q1, q0 :: Qm 0x12340a0b 0x12340a0b 0x12340a0b 0x12340a0b Qn 0x56780c0d 0x56780c0d 0x56780c0d 0x56780c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.16 q1, q0 :: Qm 0x151d0a0b 0x141c0a0b 0x131b0a0b 0x121f0a0b Qn 0x191d0c0d 0x1f1c0c0d 0x1a1b0c0d 0x1e1f0c0d
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vtrn.8 q10, q11 :: Qm 0x0b340d78 0x0b340d78 0x0b340d78 0x0b340d78 Qn 0x0a120c56 0x0a120c56 0x0a120c56 0x0a120c56 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.8 q10, q11 :: Qm 0x0b1d0d1d 0x0b1c0d1c 0x0b1b0d1b 0x0b1f0d1f Qn 0x0a150c19 0x0a140c1f 0x0a130c1a 0x0a120c1e
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VSWP ----
vswp q0, q1 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x12121212 0x12121212 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp q0, q1 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
+Qm (i8)0x00000012 Qn (i8)0x00000034
vswp q1, q0 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x12121212 0x12121212 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp q1, q0 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
+Qm (i8)0x00000012 Qn (i8)0x00000034
vswp q10, q11 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x12121212 0x12121212 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp q10, q11 :: Qm 0x34343434 0x34343434 0x34343434 0x34343434 Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
+Qm (i8)0x00000012 Qn (i8)0x00000034
vswp q0, q1 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x12345678 0x12345678 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp q0, q1 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vswp q1, q0 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x12345678 0x12345678 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp q1, q0 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
vswp q10, q11 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x12345678 0x12345678 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp q10, q11 :: Qm 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d 0x0a0b0c0d Qn 0x151d191d 0x141c1f1c 0x131b1a1b 0x121f1e1f
+Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VDUP ----
vdup.8 q2, d2[0] :: Qd 0x57575757 0x57575757 0x57575757 0x57575757 Qm (i32)0x0abc4657
+vdup.8 q2, d2[0] :: Qd 0x2f2f2f2f 0x2f2f2f2f 0x2f2f2f2f 0x2f2f2f2f Qm (i32)0x0abc4657
vdup.8 q3, d3[2] :: Qd 0x07070707 0x07070707 0x07070707 0x07070707 Qm (i32)0x0007a1b3
+vdup.8 q3, d3[2] :: Qd 0x2f2f2f2f 0x2f2f2f2f 0x2f2f2f2f 0x2f2f2f2f Qm (i32)0x0007a1b3
vdup.8 q1, d0[7] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00713aaa
+vdup.8 q1, d0[7] :: Qd 0x24242424 0x24242424 0x24242424 0x24242424 Qm (i32)0x00713aaa
vdup.8 q0, d4[3] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x000aa713
+vdup.8 q0, d4[3] :: Qd 0x23232323 0x23232323 0x23232323 0x23232323 Qm (i32)0x000aa713
vdup.8 q4, d28[4] :: Qd 0xc3c3c3c3 0xc3c3c3c3 0xc3c3c3c3 0xc3c3c3c3 Qm (i32)0x0007b1c3
+vdup.8 q4, d28[4] :: Qd 0x2b2b2b2b 0x2b2b2b2b 0x2b2b2b2b 0x2b2b2b2b Qm (i32)0x0007b1c3
vdup.16 q7, d19[3] :: Qd 0x07130713 0x07130713 0x07130713 0x07130713 Qm (i32)0x0713ffff
+vdup.16 q7, d19[3] :: Qd 0x242c242c 0x242c242c 0x242c242c 0x242c242c Qm (i32)0x0713ffff
vdup.16 q15, d31[0] :: Qd 0x00fa00fa 0x00fa00fa 0x00fa00fa 0x00fa00fa Qm (i32)0x007f00fa
+vdup.16 q15, d31[0] :: Qd 0x2e2f2e2f 0x2e2f2e2f 0x2e2f2e2f 0x2e2f2e2f Qm (i32)0x007f00fa
vdup.16 q6, d2[0] :: Qd 0xbcdebcde 0xbcdebcde 0xbcdebcde 0xbcdebcde Qm (i32)0x0ffabcde
+vdup.16 q6, d2[0] :: Qd 0x2e2f2e2f 0x2e2f2e2f 0x2e2f2e2f 0x2e2f2e2f Qm (i32)0x0ffabcde
vdup.16 q8, d22[3] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000713
+vdup.16 q8, d22[3] :: Qd 0x242c242c 0x242c242c 0x242c242c 0x242c242c Qm (i32)0x00000713
vdup.16 q9, d2[0] :: Qd 0x07130713 0x07130713 0x07130713 0x07130713 Qm (i32)0x00000713
+vdup.16 q9, d2[0] :: Qd 0x2e2f2e2f 0x2e2f2e2f 0x2e2f2e2f 0x2e2f2e2f Qm (i32)0x00000713
vdup.32 q10, d17[1] :: Qd 0x00000713 0x00000713 0x00000713 0x00000713 Qm (i32)0x00000713
+vdup.32 q10, d17[1] :: Qd 0x242c2b2b 0x242c2b2b 0x242c2b2b 0x242c2b2b Qm (i32)0x00000713
vdup.32 q15, d11[0] :: Qd 0x00000003 0x00000003 0x00000003 0x00000003 Qm (i32)0x00000003
+vdup.32 q15, d11[0] :: Qd 0x232f2e2f 0x232f2e2f 0x232f2e2f 0x232f2e2f Qm (i32)0x00000003
vdup.32 q10, d29[1] :: Qd 0xf00000aa 0xf00000aa 0xf00000aa 0xf00000aa Qm (i32)0xf00000aa
+vdup.32 q10, d29[1] :: Qd 0x242c2b2b 0x242c2b2b 0x242c2b2b 0x242c2b2b Qm (i32)0xf00000aa
vdup.32 q12, d0[1] :: Qd 0x0000000f 0x0000000f 0x0000000f 0x0000000f Qm (i32)0x0000000f
+vdup.32 q12, d0[1] :: Qd 0x242c2b2b 0x242c2b2b 0x242c2b2b 0x242c2b2b Qm (i32)0x0000000f
vdup.32 q13, d13[0] :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vdup.32 q13, d13[0] :: Qd 0x232f2e2f 0x232f2e2f 0x232f2e2f 0x232f2e2f Qm (i32)0xffffffff
---- VQDMULL ----
vqdmull.s32 q0, d1, d2 :: Qd 0x00000000 0x00001680 0x00000000 0x00001680 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q0, d1, d2 :: Qd 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q0, d1, d2 :: Qd 0x00000011 0xe9687950 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmull.s32 q6, d7, d8 :: Qd 0xffffffff 0xffff7cc0 0xffffffff 0xffff7cc0 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmull.s32 q6, d7, d8 :: Qd 0xffffffef 0x02d3c2f0 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmull.s32 q6, d7, d8 :: Qd 0xffffffee 0x169786b0 0xffffffef 0x02d3c2f0 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmull.s16 q9, d11, d12 :: Qd 0x00000000 0x0002d000 0x00000000 0x0002d000 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmull.s16 q9, d11, d12 :: Qd 0x00000000 0x0043c5c0 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmull.s16 q9, d11, d12 :: Qd 0x00000000 0x003abcc0 0x00000000 0x0043c5c0 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x10014004 0x00000000 0x10014004 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x0788387c Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x0687286c 0x00000000 0x0788387c Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmull.s32 q7, d8, d9 :: Qd 0x7ffffffd 0x00000004 0x7ffffffd 0x00000004 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d9 :: Qd 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d9 :: Qd 0xece4e5e5 0x4c6c686c 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0xe50b10cc 0x00000000 0xe50b10cc Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x0788387c Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x0687286c 0x00000000 0x0788387c Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
vqdmull.s32 q7, d8, d9 :: Qd 0xfffffff4 0x00000000 0xfffffff4 0x00000000 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmull.s32 q7, d8, d9 :: Qd 0x00000001 0xb2ead2e8 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmull.s32 q7, d8, d9 :: Qd 0x00000001 0xca8a7288 0x00000001 0xb2ead2e8 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x003f83f8 0x00000000 0x003f83f8 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x0788387c Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6 :: Qd 0x00000000 0x0687286c 0x00000000 0x0788387c Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmull.s32 q7, d8, d9 :: Qd 0x7ffffffd 0x00000004 0x7ffffffd 0x00000004 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d9 :: Qd 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d9 :: Qd 0xece4e5e5 0x4c6c686c 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmull.s32 q10, d11, d15 :: Qd 0x00000000 0x00001680 0x00000000 0x00001680 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q10, d11, d15 :: Qd 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q10, d11, d15 :: Qd 0x00000011 0xe9687950 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmull.s32 q10, d30, d31 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmull.s32 q10, d30, d31 :: Qd 0xede0e1e1 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s32 q10, d30, d31 :: Qd 0xece4e5e5 0x00000000 0xede0e1e1 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmull.s16 q10, d30, d31 :: Qd 0x7fffffff 0x00000000 0x7fffffff 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmull.s16 q10, d30, d31 :: Qd 0xede10000 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s16 q10, d30, d31 :: Qd 0xece50000 0x00000000 0xede10000 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmull.s32 q10, d30, d31 :: Qd 0xc0000000 0x00000000 0xc0000000 0x00000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s32 q10, d30, d31 :: Qd 0xede0e1e1 0x00000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s32 q10, d30, d31 :: Qd 0xece4e5e5 0x00000000 0xede0e1e1 0x00000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmull.s16 q10, d30, d31 :: Qd 0xc0000000 0x00000000 0xc0000000 0x00000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmull.s16 q10, d30, d31 :: Qd 0x090f8000 0x00000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmull.s16 q10, d30, d31 :: Qd 0x098d8000 0x00000000 0x090f8000 0x00000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMULL (by scalar) ----
vqdmull.s32 q0, d1, d7[0] :: Qd 0x00000000 0x00001680 0x00000000 0x00001680 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q0, d1, d7[0] :: Qd 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q0, d1, d7[0] :: Qd 0x00000011 0xe9687950 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmull.s32 q6, d7, d6[0] :: Qd 0xffffffff 0xffff7cc0 0xffffffff 0xffff7cc0 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmull.s32 q6, d7, d6[0] :: Qd 0xffffffef 0x02d3c2f0 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmull.s32 q6, d7, d6[0] :: Qd 0xffffffee 0x169786b0 0xffffffef 0x02d3c2f0 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmull.s16 q9, d11, d7[2] :: Qd 0x00000000 0x0002d000 0x00000000 0x0002d000 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmull.s16 q9, d11, d7[2] :: Qd 0x0028c5c0 0x0043c5c0 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmull.s16 q9, d11, d7[2] :: Qd 0x002afcc0 0x003abcc0 0x0028c5c0 0x0043c5c0 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmull.s16 q4, d5, d6[2] :: Qd 0x00000000 0x10014004 0x00000000 0x10014004 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6[2] :: Qd 0x0488087c 0x0788387c Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6[2] :: Qd 0x04c70c6c 0x0687286c 0x0488087c 0x0788387c Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmull.s32 q7, d8, d3[1] :: Qd 0x7ffffffd 0x00000004 0x7ffffffd 0x00000004 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d3[1] :: Qd 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d3[1] :: Qd 0xece4e5e5 0x4c6c686c 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmull.s16 q4, d5, d6[1] :: Qd 0xffffbffc 0xe50b10cc 0xffffbffc 0xe50b10cc Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6[1] :: Qd 0x0488087c 0x0788387c Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6[1] :: Qd 0x04c70c6c 0x0687286c 0x0488087c 0x0788387c Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
vqdmull.s32 q7, d8, d3[0] :: Qd 0xfffffff4 0x00000000 0xfffffff4 0x00000000 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmull.s32 q7, d8, d3[0] :: Qd 0x00000001 0xb2ead2e8 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmull.s32 q7, d8, d3[0] :: Qd 0x00000001 0xca8a7288 0x00000001 0xb2ead2e8 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmull.s16 q4, d5, d6[2] :: Qd 0x04004000 0x003f83f8 0x04004000 0x003f83f8 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6[2] :: Qd 0x0488087c 0x0788387c Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmull.s16 q4, d5, d6[2] :: Qd 0x04c70c6c 0x0687286c 0x0488087c 0x0788387c Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmull.s32 q7, d8, d3[1] :: Qd 0x7ffffffd 0x00000004 0x7ffffffd 0x00000004 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d3[1] :: Qd 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmull.s32 q7, d8, d3[1] :: Qd 0xece4e5e5 0x4c6c686c 0xede0e1e1 0x487c787c Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmull.s32 q10, d11, d15[1] :: Qd 0x00000000 0x00001680 0x00000000 0x00001680 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q10, d11, d15[1] :: Qd 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmull.s32 q10, d11, d15[1] :: Qd 0x00000011 0xe9687950 0x00000010 0xfd2c3d10 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmull.s32 q10, d30, d1[0] :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmull.s32 q10, d30, d1[0] :: Qd 0xede0e1e1 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s32 q10, d30, d1[0] :: Qd 0xece4e5e5 0x00000000 0xede0e1e1 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmull.s16 q10, d30, d1[1] :: Qd 0x7fffffff 0x00000000 0x7fffffff 0x00000000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmull.s16 q10, d30, d1[1] :: Qd 0xede10000 0xe1e10000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s16 q10, d30, d1[1] :: Qd 0xece50000 0xe5e50000 0xede10000 0xe1e10000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmull.s32 q10, d30, d1[1] :: Qd 0xc0000000 0x00000000 0xc0000000 0x00000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s32 q10, d30, d1[1] :: Qd 0xede0e1e1 0x00000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmull.s32 q10, d30, d1[1] :: Qd 0xece4e5e5 0x00000000 0xede0e1e1 0x00000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmull.s16 q10, d30, d1[3] :: Qd 0xc0000000 0x00000000 0xc0000000 0x00000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmull.s16 q10, d30, d1[3] :: Qd 0x090f8000 0x0f0f8000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmull.s16 q10, d30, d1[3] :: Qd 0x098d8000 0x0d0d8000 0x090f8000 0x0f0f8000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMLSL ----
vqdmlsl.s32 q0, d1, d2 :: Qd 0x00000017 0xffffe998 0x55555555 0x55553ed5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q0, d1, d2 :: Qd 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q0, d1, d2 :: Qd 0x131b1a09 0x28b6a4cf 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlsl.s32 q6, d7, d8 :: Qd 0x55555555 0x5555d895 0x55555555 0x5555d895 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlsl.s32 q6, d7, d8 :: Qd 0x55555566 0x52819265 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlsl.s32 q6, d7, d8 :: Qd 0x55555567 0x3ebdcea5 0x55555566 0x52819265 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmlsl.s16 q9, d11, d12 :: Qd 0x55555555 0x55528555 0x55555555 0x55528555 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlsl.s16 q9, d11, d12 :: Qd 0x55555555 0x55118f95 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlsl.s16 q9, d11, d12 :: Qd 0x55555555 0x551a9895 0x55555555 0x55118f95 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x45541551 0x55555555 0x45541551 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x4dcd1cd9 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x4ece2ce9 0x55555555 0x4dcd1cd9 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmlsl.s32 q7, d8, d9 :: Qd 0xd5555558 0x55555551 0xd5555558 0x55555551 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d9 :: Qd 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d9 :: Qd 0x68706f70 0x08e8ece9 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x704a4489 0x55555555 0x704a4489 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x4dcd1cd9 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x4ece2ce9 0x55555555 0x4dcd1cd9 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
vqdmlsl.s32 q7, d8, d9 :: Qd 0x55555561 0x55555555 0x55555561 0x55555555 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlsl.s32 q7, d8, d9 :: Qd 0x55555553 0xa26a826d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlsl.s32 q7, d8, d9 :: Qd 0x55555553 0x8acae2cd 0x55555553 0xa26a826d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x5515d15d 0x55555555 0x5515d15d Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x4dcd1cd9 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6 :: Qd 0x55555555 0x4ece2ce9 0x55555555 0x4dcd1cd9 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmlsl.s32 q7, d8, d9 :: Qd 0xd5555558 0x55555551 0xd5555558 0x55555551 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d9 :: Qd 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d9 :: Qd 0x68706f70 0x08e8ece9 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlsl.s32 q10, d11, d15 :: Qd 0x55555555 0x55553ed5 0x55555555 0x55553ed5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q10, d11, d15 :: Qd 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q10, d11, d15 :: Qd 0x55555543 0x6becdc05 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlsl.s32 q10, d30, d31 :: Qd 0xd5555555 0x55555556 0xd5555555 0x55555556 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlsl.s32 q10, d30, d31 :: Qd 0x67747374 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlsl.s32 q10, d30, d31 :: Qd 0x68706f70 0x55555555 0x67747374 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlsl.s16 q10, d30, d31 :: Qd 0xd5555556 0x55555555 0xd5555556 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlsl.s16 q10, d30, d31 :: Qd 0x67745555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlsl.s16 q10, d30, d31 :: Qd 0x68705555 0x55555555 0x67745555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlsl.s32 q10, d30, d31 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlsl.s32 q10, d30, d31 :: Qd 0x67747374 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlsl.s32 q10, d30, d31 :: Qd 0x68706f70 0x55555555 0x67747374 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlsl.s16 q10, d30, d31 :: Qd 0x7fffffff 0x55555555 0x7fffffff 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 08000000
+vqdmlsl.s16 q10, d30, d31 :: Qd 0x4c45d555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmlsl.s16 q10, d30, d31 :: Qd 0x4bc7d555 0x55555555 0x4c45d555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMLSL (by scalar) ----
vqdmlsl.s32 q0, d1, d7[0] :: Qd 0x00000017 0xffffe998 0x55555555 0x55553ed5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q0, d1, d7[0] :: Qd 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q0, d1, d7[0] :: Qd 0x131b1a09 0x28b6a4cf 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlsl.s32 q6, d7, d6[0] :: Qd 0x55555555 0x5555d895 0x55555555 0x5555d895 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlsl.s32 q6, d7, d6[0] :: Qd 0x55555566 0x52819265 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlsl.s32 q6, d7, d6[0] :: Qd 0x55555567 0x3ebdcea5 0x55555566 0x52819265 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmlsl.s16 q9, d11, d7[2] :: Qd 0x55555555 0x55528555 0x55555555 0x55528555 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlsl.s16 q9, d11, d7[2] :: Qd 0x552c8f95 0x55118f95 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlsl.s16 q9, d11, d7[2] :: Qd 0x552a5895 0x551a9895 0x552c8f95 0x55118f95 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmlsl.s16 q4, d5, d6[2] :: Qd 0x55555555 0x45541551 0x55555555 0x45541551 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6[2] :: Qd 0x50cd4cd9 0x4dcd1cd9 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6[2] :: Qd 0x508e48e9 0x4ece2ce9 0x50cd4cd9 0x4dcd1cd9 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmlsl.s32 q7, d8, d3[1] :: Qd 0xd5555558 0x55555551 0xd5555558 0x55555551 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d3[1] :: Qd 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d3[1] :: Qd 0x68706f70 0x08e8ece9 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlsl.s16 q4, d5, d6[1] :: Qd 0x55559559 0x704a4489 0x55559559 0x704a4489 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6[1] :: Qd 0x50cd4cd9 0x4dcd1cd9 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6[1] :: Qd 0x508e48e9 0x4ece2ce9 0x50cd4cd9 0x4dcd1cd9 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
vqdmlsl.s32 q7, d8, d3[0] :: Qd 0x55555561 0x55555555 0x55555561 0x55555555 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlsl.s32 q7, d8, d3[0] :: Qd 0x55555553 0xa26a826d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlsl.s32 q7, d8, d3[0] :: Qd 0x55555553 0x8acae2cd 0x55555553 0xa26a826d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmlsl.s16 q4, d5, d6[2] :: Qd 0x51551555 0x5515d15d 0x51551555 0x5515d15d Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6[2] :: Qd 0x50cd4cd9 0x4dcd1cd9 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlsl.s16 q4, d5, d6[2] :: Qd 0x508e48e9 0x4ece2ce9 0x50cd4cd9 0x4dcd1cd9 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmlsl.s32 q7, d8, d3[1] :: Qd 0xd5555558 0x55555551 0xd5555558 0x55555551 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d3[1] :: Qd 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlsl.s32 q7, d8, d3[1] :: Qd 0x68706f70 0x08e8ece9 0x67747374 0x0cd8dcd9 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlsl.s32 q10, d11, d15[1] :: Qd 0x55555555 0x55553ed5 0x55555555 0x55553ed5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q10, d11, d15[1] :: Qd 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlsl.s32 q10, d11, d15[1] :: Qd 0x55555543 0x6becdc05 0x55555544 0x58291845 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlsl.s32 q10, d30, d1[0] :: Qd 0xd5555555 0x55555556 0xd5555555 0x55555556 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlsl.s32 q10, d30, d1[0] :: Qd 0x67747374 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlsl.s32 q10, d30, d1[0] :: Qd 0x68706f70 0x55555555 0x67747374 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlsl.s16 q10, d30, d1[1] :: Qd 0xd5555556 0x55555555 0xd5555556 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlsl.s16 q10, d30, d1[1] :: Qd 0x67745555 0x73745555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlsl.s16 q10, d30, d1[1] :: Qd 0x68705555 0x6f705555 0x67745555 0x73745555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlsl.s32 q10, d30, d1[1] :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlsl.s32 q10, d30, d1[1] :: Qd 0x67747374 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlsl.s32 q10, d30, d1[1] :: Qd 0x68706f70 0x55555555 0x67747374 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlsl.s16 q10, d30, d1[3] :: Qd 0x7fffffff 0x55555555 0x7fffffff 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 08000000
+vqdmlsl.s16 q10, d30, d1[3] :: Qd 0x4c45d555 0x4645d555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmlsl.s16 q10, d30, d1[3] :: Qd 0x4bc7d555 0x4847d555 0x4c45d555 0x4645d555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMLAL ----
vqdmlal.s32 q0, d1, d2 :: Qd 0x00000018 0x00001698 0x55555555 0x55556bd5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q0, d1, d2 :: Qd 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q0, d1, d2 :: Qd 0x131b1a2c 0xfb87976f 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlal.s32 q6, d7, d8 :: Qd 0x55555555 0x5554d215 0x55555555 0x5554d215 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlal.s32 q6, d7, d8 :: Qd 0x55555544 0x58291845 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlal.s32 q6, d7, d8 :: Qd 0x55555543 0x6becdc05 0x55555544 0x58291845 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmlal.s16 q9, d11, d12 :: Qd 0x55555555 0x55582555 0x55555555 0x55582555 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlal.s16 q9, d11, d12 :: Qd 0x55555555 0x55991b15 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlal.s16 q9, d11, d12 :: Qd 0x55555555 0x55901215 0x55555555 0x55991b15 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x65569559 0x55555555 0x65569559 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x5cdd8dd1 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x5bdc7dc1 0x55555555 0x5cdd8dd1 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmlal.s32 q7, d8, d9 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqdmlal.s32 q7, d8, d9 :: Qd 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlal.s32 q7, d8, d9 :: Qd 0x423a3b3a 0xa1c1bdc1 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x3a606621 0x55555555 0x3a606621 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x5cdd8dd1 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x5bdc7dc1 0x55555555 0x5cdd8dd1 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
vqdmlal.s32 q7, d8, d9 :: Qd 0x55555549 0x55555555 0x55555549 0x55555555 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlal.s32 q7, d8, d9 :: Qd 0x55555557 0x0840283d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlal.s32 q7, d8, d9 :: Qd 0x55555557 0x1fdfc7dd 0x55555557 0x0840283d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x5594d94d 0x55555555 0x5594d94d Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x5cdd8dd1 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6 :: Qd 0x55555555 0x5bdc7dc1 0x55555555 0x5cdd8dd1 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmlal.s32 q7, d8, d9 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqdmlal.s32 q7, d8, d9 :: Qd 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlal.s32 q7, d8, d9 :: Qd 0x423a3b3a 0xa1c1bdc1 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlal.s32 q10, d11, d15 :: Qd 0x55555555 0x55556bd5 0x55555555 0x55556bd5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q10, d11, d15 :: Qd 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q10, d11, d15 :: Qd 0x55555567 0x3ebdcea5 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlal.s32 q10, d30, d31 :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlal.s32 q10, d30, d31 :: Qd 0x43363736 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s32 q10, d30, d31 :: Qd 0x423a3b3a 0x55555555 0x43363736 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlal.s16 q10, d30, d31 :: Qd 0x7fffffff 0x55555555 0x7fffffff 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlal.s16 q10, d30, d31 :: Qd 0x43365555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s16 q10, d30, d31 :: Qd 0x423a5555 0x55555555 0x43365555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlal.s32 q10, d30, d31 :: Qd 0x15555555 0x55555555 0x15555555 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s32 q10, d30, d31 :: Qd 0x43363736 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s32 q10, d30, d31 :: Qd 0x423a3b3a 0x55555555 0x43363736 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlal.s16 q10, d30, d31 :: Qd 0x15555555 0x55555555 0x15555555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmlal.s16 q10, d30, d31 :: Qd 0x5e64d555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmlal.s16 q10, d30, d31 :: Qd 0x5ee2d555 0x55555555 0x5e64d555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMLAL (by scalar) ----
vqdmlal.s32 q0, d1, d7[0] :: Qd 0x00000018 0x00001698 0x55555555 0x55556bd5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q0, d1, d7[0] :: Qd 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q0, d1, d7[0] :: Qd 0x131b1a2c 0xfb87976f 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlal.s32 q6, d7, d6[0] :: Qd 0x55555555 0x5554d215 0x55555555 0x5554d215 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlal.s32 q6, d7, d6[0] :: Qd 0x55555544 0x58291845 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmlal.s32 q6, d7, d6[0] :: Qd 0x55555543 0x6becdc05 0x55555544 0x58291845 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmlal.s16 q9, d11, d7[2] :: Qd 0x55555555 0x55582555 0x55555555 0x55582555 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlal.s16 q9, d11, d7[2] :: Qd 0x557e1b15 0x55991b15 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmlal.s16 q9, d11, d7[2] :: Qd 0x55805215 0x55901215 0x557e1b15 0x55991b15 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmlal.s16 q4, d5, d6[2] :: Qd 0x55555555 0x65569559 0x55555555 0x65569559 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6[2] :: Qd 0x59dd5dd1 0x5cdd8dd1 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6[2] :: Qd 0x5a1c61c1 0x5bdc7dc1 0x59dd5dd1 0x5cdd8dd1 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmlal.s32 q7, d8, d3[1] :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqdmlal.s32 q7, d8, d3[1] :: Qd 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlal.s32 q7, d8, d3[1] :: Qd 0x423a3b3a 0xa1c1bdc1 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlal.s16 q4, d5, d6[1] :: Qd 0x55551551 0x3a606621 0x55551551 0x3a606621 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6[1] :: Qd 0x59dd5dd1 0x5cdd8dd1 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6[1] :: Qd 0x5a1c61c1 0x5bdc7dc1 0x59dd5dd1 0x5cdd8dd1 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
vqdmlal.s32 q7, d8, d3[0] :: Qd 0x55555549 0x55555555 0x55555549 0x55555555 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlal.s32 q7, d8, d3[0] :: Qd 0x55555557 0x0840283d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmlal.s32 q7, d8, d3[0] :: Qd 0x55555557 0x1fdfc7dd 0x55555557 0x0840283d Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmlal.s16 q4, d5, d6[2] :: Qd 0x59559555 0x5594d94d 0x59559555 0x5594d94d Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6[2] :: Qd 0x59dd5dd1 0x5cdd8dd1 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmlal.s16 q4, d5, d6[2] :: Qd 0x5a1c61c1 0x5bdc7dc1 0x59dd5dd1 0x5cdd8dd1 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmlal.s32 q7, d8, d3[1] :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqdmlal.s32 q7, d8, d3[1] :: Qd 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmlal.s32 q7, d8, d3[1] :: Qd 0x423a3b3a 0xa1c1bdc1 0x43363736 0x9dd1cdd1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmlal.s32 q10, d11, d15[1] :: Qd 0x55555555 0x55556bd5 0x55555555 0x55556bd5 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q10, d11, d15[1] :: Qd 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmlal.s32 q10, d11, d15[1] :: Qd 0x55555567 0x3ebdcea5 0x55555566 0x52819265 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmlal.s32 q10, d30, d1[0] :: Qd 0x7fffffff 0xffffffff 0x7fffffff 0xffffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlal.s32 q10, d30, d1[0] :: Qd 0x43363736 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s32 q10, d30, d1[0] :: Qd 0x423a3b3a 0x55555555 0x43363736 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlal.s16 q10, d30, d1[1] :: Qd 0x7fffffff 0x55555555 0x7fffffff 0x55555555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmlal.s16 q10, d30, d1[1] :: Qd 0x43365555 0x37365555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s16 q10, d30, d1[1] :: Qd 0x423a5555 0x3b3a5555 0x43365555 0x37365555 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlal.s32 q10, d30, d1[1] :: Qd 0x15555555 0x55555555 0x15555555 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s32 q10, d30, d1[1] :: Qd 0x43363736 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmlal.s32 q10, d30, d1[1] :: Qd 0x423a3b3a 0x55555555 0x43363736 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmlal.s16 q10, d30, d1[3] :: Qd 0x15555555 0x55555555 0x15555555 0x55555555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmlal.s16 q10, d30, d1[3] :: Qd 0x5e64d555 0x6464d555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmlal.s16 q10, d30, d1[3] :: Qd 0x5ee2d555 0x6262d555 0x5e64d555 0x6464d555 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMULH ----
vqdmulh.s32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q0, q1, q2 :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q0, q1, q2 :: Qd 0x00000013 0x00000012 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 q6, q7, q8 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmulh.s32 q6, q7, q8 :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmulh.s32 q6, q7, q8 :: Qd 0xffffffec 0xffffffed 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmulh.s16 q9, q11, q12 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmulh.s16 q9, q11, q12 :: Qd 0x0000003a 0x00000043 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmulh.s16 q9, q11, q12 :: Qd 0x00000038 0x00000045 0x0000003a 0x00000043 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmulh.s16 q4, q5, q6 :: Qd 0x00001001 0x00001001 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, q6 :: Qd 0x00000687 0x00000788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, q6 :: Qd 0x00000647 0x000007c7 0x00000687 0x00000788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 q7, q8, q9 :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, q9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, q9 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s16 q4, q5, q6 :: Qd 0x0000e50b 0x0000e50b 0x0000e50b 0x0000e50b Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, q6 :: Qd 0x00000687 0x00000788 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, q6 :: Qd 0x00000647 0x000007c7 0x00000687 0x00000788 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 q7, q8, q9 :: Qd 0xfffffff4 0xfffffff4 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmulh.s32 q7, q8, q9 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmulh.s32 q7, q8, q9 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmulh.s16 q4, q5, q6 :: Qd 0x0000003f 0x0000003f 0x0000003f 0x0000003f Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, q6 :: Qd 0x00000687 0x00000788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, q6 :: Qd 0x00000647 0x000007c7 0x00000687 0x00000788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 q7, q8, q9 :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, q9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, q9 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s32 q10, q11, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q10, q11, q15 :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q10, q11, q15 :: Qd 0x00000013 0x00000012 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 q10, q14, q15 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmulh.s32 q10, q14, q15 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 q10, q14, q15 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 q10, q14, q15 :: Qd 0x7fff0000 0x7fff0000 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmulh.s16 q10, q14, q15 :: Qd 0xece50000 0xede10000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s16 q10, q14, q15 :: Qd 0xeae30000 0xebe40000 0xece50000 0xede10000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s32 q10, q14, q15 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 q10, q14, q15 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 q10, q14, q15 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 q10, q14, q15 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmulh.s16 q10, q14, q15 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmulh.s16 q10, q14, q15 :: Qd 0x0a8e0000 0x0a0e0000 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMULH (by scalar) ----
vqdmulh.s32 q0, q1, d6[0] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q0, q1, d6[0] :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q0, q1, d6[0] :: Qd 0x00000013 0x00000012 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 q6, q7, d1[1] :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmulh.s32 q6, q7, d1[1] :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmulh.s32 q6, q7, d1[1] :: Qd 0xffffffec 0xffffffed 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmulh.s16 q9, q11, d7[0] :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmulh.s16 q9, q11, d7[0] :: Qd 0x002a003a 0x00280043 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmulh.s16 q9, q11, d7[0] :: Qd 0x002f0038 0x002d0045 0x002a003a 0x00280043 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmulh.s16 q4, q5, d6[0] :: Qd 0x00001001 0x00001001 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, d6[0] :: Qd 0x04c70687 0x04880788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, d6[0] :: Qd 0x05470647 0x050707c7 0x04c70687 0x04880788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 q7, q8, d9[1] :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, d9[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, d9[1] :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s16 q4, q5, d6[1] :: Qd 0xffffe50b 0xffffe50b 0xffffe50b 0xffffe50b Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, d6[1] :: Qd 0x04c70687 0x04880788 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, d6[1] :: Qd 0x05470647 0x050707c7 0x04c70687 0x04880788 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
vqdmulh.s32 q7, q8, d9[0] :: Qd 0xfffffff4 0xfffffff4 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmulh.s32 q7, q8, d9[0] :: Qd 0x00000001 0x00000001 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmulh.s32 q7, q8, d9[0] :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmulh.s16 q4, q5, d6[2] :: Qd 0x0400003f 0x0400003f 0x0400003f 0x0400003f Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, d6[2] :: Qd 0x04c70687 0x04880788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 q4, q5, d6[2] :: Qd 0x05470647 0x050707c7 0x04c70687 0x04880788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 q7, q8, d9[0] :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, d9[0] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 q7, q8, d9[0] :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s32 q10, q11, d15[0] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q10, q11, d15[0] :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 q10, q11, d15[0] :: Qd 0x00000013 0x00000012 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 q10, q14, d15[1] :: Qd 0xffffff88 0xffffff88 0xffffff88 0xffffff88 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 q10, q14, d15[1] :: Qd 0x00000011 0x00000010 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 q10, q14, d15[1] :: Qd 0x00000013 0x00000012 0x00000011 0x00000010 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 q10, q14, d7[3] :: Qd 0x7fff0000 0x7fff0000 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmulh.s16 q10, q14, d7[3] :: Qd 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s16 q10, q14, d7[3] :: Qd 0xeae3e6e3 0xebe4e0e4 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s32 q10, q14, d15[1] :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 q10, q14, d15[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 q10, q14, d15[1] :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 q10, q14, d7[1] :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmulh.s16 q10, q14, d7[1] :: Qd 0x098d0d0d 0x090f0f0f Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmulh.s16 q10, q14, d7[1] :: Qd 0x0a8e0c8e 0x0a0e0f8e 0x098d0d0d 0x090f0f0f Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VSHL (immediate) ----
vshl.i64 q0, q1, #1 :: Qd 0x00000030 0x00000030 0x00000030 0x00000030 Qm (i32)0x00000018
+vshl.i64 q0, q1, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i32)0x00000018
vshl.i64 q5, q2, #1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i64 q5, q2, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i32)0x40000000
vshl.i64 q9, q12, #2 :: Qd 0x0000000a 0x00000008 0x0000000a 0x00000008 Qm (i32)0x80000002
+vshl.i64 q9, q12, #2 :: Qd 0x98b4b4a8 0x94a8b8ac 0x90b0acac 0x8cbcb8bc Qm (i32)0x80000002
vshl.i64 q11, q2, #12 :: Qd 0xffffffff 0xfffff000 0xffffffff 0xfffff000 Qm (i32)0xffffffff
+vshl.i64 q11, q2, #12 :: Qd 0xd2d2a252 0xa2e2b000 0xc2b2b232 0xf2e2f000 Qm (i32)0xffffffff
+vshl.i64 q15, q12, #63 :: Qd 0x80000000 0x00000000 0x80000000 0x00000000 Qm (i32)0x00000005
vshl.i64 q15, q12, #63 :: Qd 0x80000000 0x00000000 0x80000000 0x00000000 Qm (i32)0x00000005
vshl.i64 q5, q12, #62 :: Qd 0x40000000 0x00000000 0x40000000 0x00000000 Qm (i32)0x80000001
+vshl.i64 q5, q12, #62 :: Qd 0xc0000000 0x00000000 0xc0000000 0x00000000 Qm (i32)0x80000001
vshl.i32 q0, q1, #1 :: Qd 0x00000030 0x00000030 0x00000030 0x00000030 Qm (i32)0x00000018
+vshl.i32 q0, q1, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i32)0x00000018
vshl.i32 q5, q2, #1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i32 q5, q2, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i32)0x40000000
vshl.i32 q9, q12, #2 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x80000002
+vshl.i32 q9, q12, #2 :: Qd 0x98b4b4a8 0x94a8b8ac 0x90b0acac 0x8cbcb8bc Qm (i32)0x80000002
vshl.i32 q11, q2, #12 :: Qd 0xfffff000 0xfffff000 0xfffff000 0xfffff000 Qm (i32)0xffffffff
+vshl.i32 q11, q2, #12 :: Qd 0xd2d2a000 0xa2e2b000 0xc2b2b000 0xf2e2f000 Qm (i32)0xffffffff
vshl.i32 q15, q12, #20 :: Qd 0x00500000 0x00500000 0x00500000 0x00500000 Qm (i32)0x00000005
+vshl.i32 q15, q12, #20 :: Qd 0xd2a00000 0xe2b00000 0xb2b00000 0xe2f00000 Qm (i32)0x00000005
vshl.i32 q5, q12, #30 :: Qd 0x40000000 0x40000000 0x40000000 0x40000000 Qm (i32)0x80000001
+vshl.i32 q5, q12, #30 :: Qd 0x80000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000001
vshl.i16 q0, q1, #1 :: Qd 0x00300030 0x00300030 0x00300030 0x00300030 Qm (i16)0x00000018
+vshl.i16 q0, q1, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i16)0x00000018
vshl.i16 q5, q2, #1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i16 q5, q2, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i32)0x40000000
vshl.i16 q9, q12, #2 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x80000002
+vshl.i16 q9, q12, #2 :: Qd 0x98b4b4a8 0x94a8b8ac 0x90b0acac 0x8cbcb8bc Qm (i32)0x80000002
vshl.i16 q11, q2, #12 :: Qd 0xf000f000 0xf000f000 0xf000f000 0xf000f000 Qm (i16)0xffffffff
+vshl.i16 q11, q2, #12 :: Qd 0xd000a000 0xa000b000 0xc000b000 0xf000f000 Qm (i16)0xffffffff
vshl.i16 q15, q12, #3 :: Qd 0x00280028 0x00280028 0x00280028 0x00280028 Qm (i16)0x00000005
+vshl.i16 q15, q12, #3 :: Qd 0x31686950 0x29507158 0x21605958 0x19787178 Qm (i16)0x00000005
vshl.i16 q5, q12, #14 :: Qd 0x00004000 0x00004000 0x00004000 0x00004000 Qm (i32)0x80000001
+vshl.i16 q5, q12, #14 :: Qd 0x40008000 0x8000c000 0x0000c000 0xc000c000 Qm (i32)0x80000001
vshl.i8 q0, q1, #1 :: Qd 0x30303030 0x30303030 0x30303030 0x30303030 Qm (i8)0x00000018
+vshl.i8 q0, q1, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i8)0x00000018
vshl.i8 q5, q2, #1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i8 q5, q2, #1 :: Qd 0x4c5a5a54 0x4a545c56 0x48585656 0x465e5c5e Qm (i32)0x40000000
vshl.i8 q9, q12, #2 :: Qd 0x00000008 0x00000008 0x00000008 0x00000008 Qm (i32)0x80000002
+vshl.i8 q9, q12, #2 :: Qd 0x98b4b4a8 0x94a8b8ac 0x90b0acac 0x8cbcb8bc Qm (i32)0x80000002
vshl.i8 q11, q2, #7 :: Qd 0x80808080 0x80808080 0x80808080 0x80808080 Qm (i8)0xffffffff
+vshl.i8 q11, q2, #7 :: Qd 0x00808000 0x80000080 0x00008080 0x80800080 Qm (i8)0xffffffff
vshl.i8 q15, q12, #3 :: Qd 0x28282828 0x28282828 0x28282828 0x28282828 Qm (i8)0x00000005
+vshl.i8 q15, q12, #3 :: Qd 0x30686850 0x28507058 0x20605858 0x18787078 Qm (i8)0x00000005
vshl.i8 q5, q12, #6 :: Qd 0x00000040 0x00000040 0x00000040 0x00000040 Qm (i32)0x80000001
+vshl.i8 q5, q12, #6 :: Qd 0x80404080 0x408080c0 0x0000c0c0 0xc0c080c0 Qm (i32)0x80000001
---- VNEG ----
vneg.s32 q0, q1 :: Qd 0xffffff8d 0xffffff8d 0xffffff8d 0xffffff8d Qm (i32)0x00000073
+vneg.s32 q0, q1 :: Qd 0xd9d2d2d6 0xdad5d1d5 0xdbd3d4d5 0xdcd0d1d1 Qm (i32)0x00000073
vneg.s16 q15, q4 :: Qd 0x0000ff8d 0x0000ff8d 0x0000ff8d 0x0000ff8d Qm (i32)0x00000073
+vneg.s16 q15, q4 :: Qd 0xd9d3d2d6 0xdad6d1d5 0xdbd4d4d5 0xdcd1d1d1 Qm (i32)0x00000073
vneg.s8 q8, q7 :: Qd 0x0000008d 0x0000008d 0x0000008d 0x0000008d Qm (i32)0x00000073
+vneg.s8 q8, q7 :: Qd 0xdad3d3d6 0xdbd6d2d5 0xdcd4d5d5 0xddd1d2d1 Qm (i32)0x00000073
vneg.s32 q0, q1 :: Qd 0xffffff02 0xffffff02 0xffffff02 0xffffff02 Qm (i32)0x000000fe
+vneg.s32 q0, q1 :: Qd 0xd9d2d2d6 0xdad5d1d5 0xdbd3d4d5 0xdcd0d1d1 Qm (i32)0x000000fe
vneg.s16 q15, q4 :: Qd 0x0000ff11 0x0000ff11 0x0000ff11 0x0000ff11 Qm (i32)0x000000ef
+vneg.s16 q15, q4 :: Qd 0xd9d3d2d6 0xdad6d1d5 0xdbd4d4d5 0xdcd1d1d1 Qm (i32)0x000000ef
vneg.s8 q8, q7 :: Qd 0x00000022 0x00000022 0x00000022 0x00000022 Qm (i32)0x000000de
+vneg.s8 q8, q7 :: Qd 0xdad3d3d6 0xdbd6d2d5 0xdcd4d5d5 0xddd1d2d1 Qm (i32)0x000000de
vneg.s32 q0, q1 :: Qd 0x01f501f6 0x01f501f6 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a
+vneg.s32 q0, q1 :: Qd 0xd9d2d2d6 0xdad5d1d5 0xdbd3d4d5 0xdcd0d1d1 Qm (i16)0x0000fe0a
vneg.s16 q15, q4 :: Qd 0x10f510f5 0x10f510f5 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b
+vneg.s16 q15, q4 :: Qd 0xd9d3d2d6 0xdad6d1d5 0xdbd4d4d5 0xdcd1d1d1 Qm (i16)0x0000ef0b
vneg.s8 q8, q7 :: Qd 0x22f422f4 0x22f422f4 0x22f422f4 0x22f422f4 Qm (i16)0x0000de0c
+vneg.s8 q8, q7 :: Qd 0xdad3d3d6 0xdbd6d2d5 0xdcd4d5d5 0xddd1d2d1 Qm (i16)0x0000de0c
---- VQNEG ----
vqneg.s32 q0, q1 :: Qd 0xffffff8d 0xffffff8d 0xffffff8d 0xffffff8d Qm (i32)0x00000073 fpscr: 00000000
+vqneg.s32 q0, q1 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x00000073 fpscr: 00000000
vqneg.s32 q0, q1 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x80000000 fpscr: 08000000
+vqneg.s32 q0, q1 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 fpscr: 00000000
vqneg.s16 q0, q1 :: Qd 0x7fff0000 0x7fff0000 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 fpscr: 08000000
+vqneg.s16 q0, q1 :: Qd 0xeae3e6e3 0xebe4e0e4 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 fpscr: 00000000
vqneg.s8 q0, q1 :: Qd 0x7f000000 0x7f000000 0x7f000000 0x7f000000 Qm (i32)0x80000000 fpscr: 08000000
+vqneg.s8 q0, q1 :: Qd 0xebe3e7e3 0xece4e1e4 0xede5e6e5 0xeee1e2e1 Qm (i32)0x80000000 fpscr: 00000000
vqneg.s16 q15, q4 :: Qd 0x0000ff8d 0x0000ff8d 0x0000ff8d 0x0000ff8d Qm (i32)0x00000073 fpscr: 00000000
+vqneg.s16 q15, q4 :: Qd 0xeae3e6e3 0xebe4e0e4 0xece5e5e5 0xede1e1e1 Qm (i32)0x00000073 fpscr: 00000000
vqneg.s8 q8, q7 :: Qd 0x0000008d 0x0000008d 0x0000008d 0x0000008d Qm (i32)0x00000073 fpscr: 00000000
+vqneg.s8 q8, q7 :: Qd 0xebe3e7e3 0xece4e1e4 0xede5e6e5 0xeee1e2e1 Qm (i32)0x00000073 fpscr: 00000000
vqneg.s32 q0, q1 :: Qd 0xffffff02 0xffffff02 0xffffff02 0xffffff02 Qm (i32)0x000000fe fpscr: 00000000
+vqneg.s32 q0, q1 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x000000fe fpscr: 00000000
vqneg.s16 q15, q4 :: Qd 0x0000ff11 0x0000ff11 0x0000ff11 0x0000ff11 Qm (i32)0x000000ef fpscr: 00000000
+vqneg.s16 q15, q4 :: Qd 0xeae3e6e3 0xebe4e0e4 0xece5e5e5 0xede1e1e1 Qm (i32)0x000000ef fpscr: 00000000
vqneg.s8 q8, q7 :: Qd 0x00000022 0x00000022 0x00000022 0x00000022 Qm (i32)0x000000de fpscr: 00000000
+vqneg.s8 q8, q7 :: Qd 0xebe3e7e3 0xece4e1e4 0xede5e6e5 0xeee1e2e1 Qm (i32)0x000000de fpscr: 00000000
vqneg.s32 q0, q1 :: Qd 0x01f501f6 0x01f501f6 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a fpscr: 00000000
+vqneg.s32 q0, q1 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i16)0x0000fe0a fpscr: 00000000
vqneg.s16 q15, q4 :: Qd 0x10f510f5 0x10f510f5 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b fpscr: 00000000
+vqneg.s16 q15, q4 :: Qd 0xeae3e6e3 0xebe4e0e4 0xece5e5e5 0xede1e1e1 Qm (i16)0x0000ef0b fpscr: 00000000
vqneg.s8 q8, q7 :: Qd 0x22f422f4 0x22f422f4 0x22f422f4 0x22f422f4 Qm (i16)0x0000de0c fpscr: 00000000
+vqneg.s8 q8, q7 :: Qd 0xebe3e7e3 0xece4e1e4 0xede5e6e5 0xeee1e2e1 Qm (i16)0x0000de0c fpscr: 00000000
---- VREV ----
vrev64.8 q0, q1 :: Qd 0xddccbbaa 0xddccbbaa 0xddccbbaa 0xddccbbaa Qm (i32)0xaabbccdd
+vrev64.8 q0, q1 :: Qd 0x2b2e2a25 0x2a2d2d26 0x2f2e2f23 0x2b2b2c24 Qm (i32)0xaabbccdd
vrev64.16 q10, q15 :: Qd 0xccddaabb 0xccddaabb 0xccddaabb 0xccddaabb Qm (i32)0xaabbccdd
+vrev64.16 q10, q15 :: Qd 0x2e2b252a 0x2d2a262d 0x2e2f232f 0x2b2b242c Qm (i32)0xaabbccdd
vrev64.32 q1, q14 :: Qd 0xaabbccdd 0xaabbccdd 0xaabbccdd 0xaabbccdd Qm (i32)0xaabbccdd
+vrev64.32 q1, q14 :: Qd 0x252a2e2b 0x262d2d2a 0x232f2e2f 0x242c2b2b Qm (i32)0xaabbccdd
vrev32.8 q0, q1 :: Qd 0xddccbbaa 0xddccbbaa 0xddccbbaa 0xddccbbaa Qm (i32)0xaabbccdd
+vrev32.8 q0, q1 :: Qd 0x2a2d2d26 0x2b2e2a25 0x2b2b2c24 0x2f2e2f23 Qm (i32)0xaabbccdd
vrev32.16 q10, q15 :: Qd 0xccddaabb 0xccddaabb 0xccddaabb 0xccddaabb Qm (i32)0xaabbccdd
+vrev32.16 q10, q15 :: Qd 0x2d2a262d 0x2e2b252a 0x2b2b242c 0x2e2f232f Qm (i32)0xaabbccdd
vrev16.8 q0, q1 :: Qd 0xbbaaddcc 0xbbaaddcc 0xbbaaddcc 0xbbaaddcc Qm (i32)0xaabbccdd
+vrev16.8 q0, q1 :: Qd 0x2d262a2d 0x2a252b2e 0x2c242b2b 0x2f232f2e Qm (i32)0xaabbccdd
---- VSHLL ----
vshll.s32 q0, d1, #1 :: Qd 0x00000000 0x00000030 0x00000000 0x00000030 Qm (i32)0x00000018
+vshll.s32 q0, d1, #1 :: Qd 0x00000000 0x48585656 0x00000000 0x465e5c5e Qm (i32)0x00000018
vshll.s32 q5, d2, #1 :: Qd 0x00000000 0x80000000 0x00000000 0x80000000 Qm (i32)0x40000000
+vshll.s32 q5, d2, #1 :: Qd 0x00000000 0x48585656 0x00000000 0x465e5c5e Qm (i32)0x40000000
vshll.s32 q9, d12, #2 :: Qd 0xfffffffe 0x00000008 0xfffffffe 0x00000008 Qm (i32)0x80000002
+vshll.s32 q9, d12, #2 :: Qd 0x00000000 0x90b0acac 0x00000000 0x8cbcb8bc Qm (i32)0x80000002
vshll.u32 q11, d2, #12 :: Qd 0x00000fff 0xfffff000 0x00000fff 0xfffff000 Qm (i32)0xffffffff
+vshll.u32 q11, d2, #12 :: Qd 0x00000242 0xc2b2b000 0x00000232 0xf2e2f000 Qm (i32)0xffffffff
vshll.u32 q15, d12, #20 :: Qd 0x00000000 0x00500000 0x00000000 0x00500000 Qm (i32)0x00000005
+vshll.u32 q15, d12, #20 :: Qd 0x000242c2 0xb2b00000 0x000232f2 0xe2f00000 Qm (i32)0x00000005
vshll.u32 q5, d22, #30 :: Qd 0x20000000 0x40000000 0x20000000 0x40000000 Qm (i32)0x80000001
+vshll.u32 q5, d22, #30 :: Qd 0x090b0aca 0xc0000000 0x08cbcb8b 0xc0000000 Qm (i32)0x80000001
vshll.s16 q0, d1, #1 :: Qd 0x00000030 0x00000030 0x00000030 0x00000030 Qm (i16)0x00000018
+vshll.s16 q0, d1, #1 :: Qd 0x00004858 0x00005656 0x0000465e 0x00005c5e Qm (i16)0x00000018
vshll.s16 q5, d2, #1 :: Qd 0x00008000 0x00000000 0x00008000 0x00000000 Qm (i32)0x40000000
+vshll.s16 q5, d2, #1 :: Qd 0x00004858 0x00005656 0x0000465e 0x00005c5e Qm (i32)0x40000000
vshll.s16 q9, d12, #2 :: Qd 0xfffe0000 0x00000008 0xfffe0000 0x00000008 Qm (i32)0x80000002
+vshll.s16 q9, d12, #2 :: Qd 0x000090b0 0x0000acac 0x00008cbc 0x0000b8bc Qm (i32)0x80000002
vshll.u16 q11, d2, #12 :: Qd 0x0ffff000 0x0ffff000 0x0ffff000 0x0ffff000 Qm (i16)0xffffffff
+vshll.u16 q11, d2, #12 :: Qd 0x0242c000 0x02b2b000 0x0232f000 0x02e2f000 Qm (i16)0xffffffff
vshll.u16 q15, d22, #3 :: Qd 0x00000028 0x00000028 0x00000028 0x00000028 Qm (i16)0x00000005
+vshll.u16 q15, d22, #3 :: Qd 0x00012160 0x00015958 0x00011978 0x00017178 Qm (i16)0x00000005
vshll.u16 q5, d12, #14 :: Qd 0x20000000 0x00004000 0x20000000 0x00004000 Qm (i32)0x80000001
+vshll.u16 q5, d12, #14 :: Qd 0x090b0000 0x0acac000 0x08cbc000 0x0b8bc000 Qm (i32)0x80000001
vshll.s8 q0, d1, #1 :: Qd 0x00300030 0x00300030 0x00300030 0x00300030 Qm (i8)0x00000018
+vshll.s8 q0, d1, #1 :: Qd 0x00480058 0x00560056 0x0046005e 0x005c005e Qm (i8)0x00000018
vshll.s8 q5, d2, #1 :: Qd 0x00800000 0x00000000 0x00800000 0x00000000 Qm (i32)0x40000000
+vshll.s8 q5, d2, #1 :: Qd 0x00480058 0x00560056 0x0046005e 0x005c005e Qm (i32)0x40000000
vshll.s8 q9, d12, #2 :: Qd 0xfe000000 0x00000008 0xfe000000 0x00000008 Qm (i32)0x80000002
+vshll.s8 q9, d12, #2 :: Qd 0x009000b0 0x00ac00ac 0x008c00bc 0x00b800bc Qm (i32)0x80000002
vshll.u8 q11, d2, #7 :: Qd 0x7f807f80 0x7f807f80 0x7f807f80 0x7f807f80 Qm (i8)0xffffffff
+vshll.u8 q11, d2, #7 :: Qd 0x12001600 0x15801580 0x11801780 0x17001780 Qm (i8)0xffffffff
vshll.u8 q15, d19, #3 :: Qd 0x00280028 0x00280028 0x00280028 0x00280028 Qm (i8)0x00000005
+vshll.u8 q15, d19, #3 :: Qd 0x01200160 0x01580158 0x01180178 0x01700178 Qm (i8)0x00000005
vshll.u8 q5, d12, #6 :: Qd 0x20000000 0x00000040 0x20000000 0x00000040 Qm (i32)0x80000001
+vshll.u8 q5, d12, #6 :: Qd 0x09000b00 0x0ac00ac0 0x08c00bc0 0x0b800bc0 Qm (i32)0x80000001
---- VSHLL (max shift) ----
vshll.i32 q0, d1, #32 :: Qd 0x00000018 0x00000000 0x00000018 0x00000000 Qm (i32)0x00000018
+vshll.i32 q0, d1, #32 :: Qd 0x242c2b2b 0x00000000 0x232f2e2f 0x00000000 Qm (i32)0x00000018
vshll.i32 q5, d2, #32 :: Qd 0x40000000 0x00000000 0x40000000 0x00000000 Qm (i32)0x40000000
+vshll.i32 q5, d2, #32 :: Qd 0x242c2b2b 0x00000000 0x232f2e2f 0x00000000 Qm (i32)0x40000000
vshll.i32 q11, d2, #32 :: Qd 0xffffffff 0x00000000 0xffffffff 0x00000000 Qm (i32)0xffffffff
+vshll.i32 q11, d2, #32 :: Qd 0x242c2b2b 0x00000000 0x232f2e2f 0x00000000 Qm (i32)0xffffffff
vshll.i32 q15, d12, #32 :: Qd 0x00000005 0x00000000 0x00000005 0x00000000 Qm (i32)0x00000005
+vshll.i32 q15, d12, #32 :: Qd 0x242c2b2b 0x00000000 0x232f2e2f 0x00000000 Qm (i32)0x00000005
vshll.i16 q0, d1, #16 :: Qd 0x00180000 0x00180000 0x00180000 0x00180000 Qm (i16)0x00000018
+vshll.i16 q0, d1, #16 :: Qd 0x242c0000 0x2b2b0000 0x232f0000 0x2e2f0000 Qm (i16)0x00000018
vshll.i16 q5, d2, #16 :: Qd 0x40000000 0x00000000 0x40000000 0x00000000 Qm (i32)0x40000000
+vshll.i16 q5, d2, #16 :: Qd 0x242c0000 0x2b2b0000 0x232f0000 0x2e2f0000 Qm (i32)0x40000000
vshll.i16 q11, d2, #16 :: Qd 0xffff0000 0xffff0000 0xffff0000 0xffff0000 Qm (i16)0xffffffff
+vshll.i16 q11, d2, #16 :: Qd 0x242c0000 0x2b2b0000 0x232f0000 0x2e2f0000 Qm (i16)0xffffffff
vshll.i16 q15, d22, #16 :: Qd 0x00050000 0x00050000 0x00050000 0x00050000 Qm (i16)0x00000005
+vshll.i16 q15, d22, #16 :: Qd 0x242c0000 0x2b2b0000 0x232f0000 0x2e2f0000 Qm (i16)0x00000005
vshll.i8 q0, d1, #8 :: Qd 0x18001800 0x18001800 0x18001800 0x18001800 Qm (i8)0x00000018
+vshll.i8 q0, d1, #8 :: Qd 0x24002c00 0x2b002b00 0x23002f00 0x2e002f00 Qm (i8)0x00000018
vshll.i8 q5, d2, #8 :: Qd 0x40000000 0x00000000 0x40000000 0x00000000 Qm (i32)0x40000000
+vshll.i8 q5, d2, #8 :: Qd 0x24002c00 0x2b002b00 0x23002f00 0x2e002f00 Qm (i32)0x40000000
vshll.i8 q11, d2, #8 :: Qd 0xff00ff00 0xff00ff00 0xff00ff00 0xff00ff00 Qm (i8)0xffffffff
+vshll.i8 q11, d2, #8 :: Qd 0x24002c00 0x2b002b00 0x23002f00 0x2e002f00 Qm (i8)0xffffffff
vshll.i8 q15, d19, #8 :: Qd 0x05000500 0x05000500 0x05000500 0x05000500 Qm (i8)0x00000005
+vshll.i8 q15, d19, #8 :: Qd 0x24002c00 0x2b002b00 0x23002f00 0x2e002f00 Qm (i8)0x00000005
---- VMULL ----
vmull.s8 q0, d1, d12 :: Qd 0x0000fe0c 0x01980d94 0x0000fe0c 0x01980d94 Qm (i32)0x000abcd4 Qn (i32)0x00cefab1
vmull.s8 q9, d11, d12 :: Qd 0x00000000 0x00010800 0x00000000 0x00010800 Qm (i32)0x00000140 Qn (i32)0x00000120
vmlsl.u32 q10, d30, d31 :: Qd 0x35555555 0x55555555 0x35555555 0x55555555 Qm (i32)0x40000000 Qn (i32)0x80000000
---- VQRDMULH ----
vqrdmulh.s32 q0, q1, q2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q0, q1, q2 :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q0, q1, q2 :: Qd 0x00000014 0x00000013 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 q6, q7, q8 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqrdmulh.s32 q6, q7, q8 :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqrdmulh.s32 q6, q7, q8 :: Qd 0xffffffec 0xffffffed 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqrdmulh.s16 q9, q11, q12 :: Qd 0x00000003 0x00000003 0x00000003 0x00000003 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqrdmulh.s16 q9, q11, q12 :: Qd 0x0000003b 0x00000044 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqrdmulh.s16 q9, q11, q12 :: Qd 0x00000039 0x00000046 0x0000003b 0x00000044 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqrdmulh.s16 q4, q5, q6 :: Qd 0x00001001 0x00001001 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, q6 :: Qd 0x00000687 0x00000788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, q6 :: Qd 0x00000648 0x000007c7 0x00000687 0x00000788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 q7, q8, q9 :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, q9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, q9 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s16 q4, q5, q6 :: Qd 0x0000e50b 0x0000e50b 0x0000e50b 0x0000e50b Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, q6 :: Qd 0x00000687 0x00000788 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, q6 :: Qd 0x00000648 0x000007c7 0x00000687 0x00000788 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 q7, q8, q9 :: Qd 0xfffffff4 0xfffffff4 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqrdmulh.s32 q7, q8, q9 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqrdmulh.s32 q7, q8, q9 :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqrdmulh.s16 q4, q5, q6 :: Qd 0x00000040 0x00000040 0x00000040 0x00000040 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, q6 :: Qd 0x00000687 0x00000788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, q6 :: Qd 0x00000648 0x000007c7 0x00000687 0x00000788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 q7, q8, q9 :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, q9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, q9 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s32 q10, q11, q15 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q10, q11, q15 :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q10, q11, q15 :: Qd 0x00000014 0x00000013 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 q10, q14, q15 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqrdmulh.s32 q10, q14, q15 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 q10, q14, q15 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s32 q10, q14, q15 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 00000000
+vqrdmulh.s32 q10, q14, q15 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 00000000
+vqrdmulh.s32 q10, q14, q15 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 00000000
vqrdmulh.s16 q10, q14, q15 :: Qd 0x7fff0000 0x7fff0000 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqrdmulh.s16 q10, q14, q15 :: Qd 0xece50000 0xede10000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s16 q10, q14, q15 :: Qd 0xeae30000 0xebe40000 0xece50000 0xede10000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s32 q10, q14, q15 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 q10, q14, q15 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 q10, q14, q15 :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s16 q10, q14, q15 :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqrdmulh.s16 q10, q14, q15 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqrdmulh.s16 q10, q14, q15 :: Qd 0x0a8f0000 0x0a0e0000 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQRDMULH (by scalar) ----
vqrdmulh.s32 q0, q1, d6[0] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q0, q1, d6[0] :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q0, q1, d6[0] :: Qd 0x00000014 0x00000013 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 q6, q7, d1[1] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqrdmulh.s32 q6, q7, d1[1] :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqrdmulh.s32 q6, q7, d1[1] :: Qd 0xffffffec 0xffffffed 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqrdmulh.s16 q9, q11, d7[0] :: Qd 0x00000003 0x00000003 0x00000003 0x00000003 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqrdmulh.s16 q9, q11, d7[0] :: Qd 0x002b003b 0x00290044 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqrdmulh.s16 q9, q11, d7[0] :: Qd 0x00300039 0x002d0046 0x002b003b 0x00290044 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqrdmulh.s16 q4, q5, d6[0] :: Qd 0x00001001 0x00001001 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, d6[0] :: Qd 0x04c70687 0x04880788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, d6[0] :: Qd 0x05480648 0x050707c7 0x04c70687 0x04880788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 q7, q8, d9[1] :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, d9[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, d9[1] :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s16 q4, q5, d6[1] :: Qd 0x0000e50b 0x0000e50b 0x0000e50b 0x0000e50b Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, d6[1] :: Qd 0x04c70687 0x04880788 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, d6[1] :: Qd 0x05480648 0x050707c7 0x04c70687 0x04880788 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
vqrdmulh.s32 q7, q8, d9[0] :: Qd 0xfffffff4 0xfffffff4 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqrdmulh.s32 q7, q8, d9[0] :: Qd 0x00000002 0x00000002 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqrdmulh.s32 q7, q8, d9[0] :: Qd 0x00000002 0x00000002 0x00000002 0x00000002 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqrdmulh.s16 q4, q5, d6[2] :: Qd 0x04000040 0x04000040 0x04000040 0x04000040 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, d6[2] :: Qd 0x04c70687 0x04880788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 q4, q5, d6[2] :: Qd 0x05480648 0x050707c7 0x04c70687 0x04880788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 q7, q8, d9[0] :: Qd 0x7ffffffd 0x7ffffffd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, d9[0] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 q7, q8, d9[0] :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s32 q10, q11, d15[0] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q10, q11, d15[0] :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 q10, q11, d15[0] :: Qd 0x00000014 0x00000013 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 q10, q14, d15[1] :: Qd 0xffffff88 0xffffff88 0xffffff88 0xffffff88 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 q10, q14, d15[1] :: Qd 0x00000012 0x00000011 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 q10, q14, d15[1] :: Qd 0x00000014 0x00000013 0x00000012 0x00000011 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s16 q10, q14, d7[3] :: Qd 0x7fff0000 0x7fff0000 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 08000000
+vqrdmulh.s16 q10, q14, d7[3] :: Qd 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 00000000
+vqrdmulh.s16 q10, q14, d7[3] :: Qd 0xeae3e6e3 0xebe4e0e4 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 00000000
vqrdmulh.s32 q10, q14, d15[1] :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 q10, q14, d15[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 q10, q14, d15[1] :: Qd 0xeae2e6e3 0xebe3e0e4 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s16 q10, q14, d7[1] :: Qd 0xc0000000 0xc0000000 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqrdmulh.s16 q10, q14, d7[1] :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqrdmulh.s16 q10, q14, d7[1] :: Qd 0x0a8f0c8f 0x0a0e0f8e 0x098e0d0e 0x09100f10 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VADD (fp) ----
vadd.f32 q0, q5, q2 :: Qd 0xc1b43ac6 0xc1b43ac6 0xc1b43ac6 0xc1b43ac6 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vadd.f32 q3, q4, q5 :: Qd 0xc8a931cf 0xc8a931cf 0xc8a931cf 0xc8a931cf Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmul.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLA (fp) ----
vmla.f32 q0, q5, q2 :: Qd 0xc4831ce4 0xc4831ce4 0xc4831ce4 0xc4831ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmla.f32 q0, q5, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vmla.f32 q3, q4, q5 :: Qd 0xcddf4321 0xcddf4321 0xcddf4321 0xcddf4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vmla.f32 q3, q4, q5 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmla.f32 q10, q11, q2 :: Qd 0xcf050e7f 0xcf050e7f 0xcf050e7f 0xcf050e7f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vmla.f32 q10, q11, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmla.f32 q9, q5, q7 :: Qd 0x4ec3063f 0x4ec3063f 0x4ec3063f 0x4ec3063f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmla.f32 q9, q5, q7 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vmla.f32 q0, q5, q2 :: Qd 0x5029254c 0x5029254c 0x5029254c 0x5029254c Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vmla.f32 q0, q5, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vmla.f32 q3, q4, q5 :: Qd 0x46fc6200 0x46fc6200 0x46fc6200 0x46fc6200 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vmla.f32 q3, q4, q5 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vmla.f32 q10, q11, q2 :: Qd 0x4c4a89cd 0x4c4a89cd 0x4c4a89cd 0x4c4a89cd Qm (i32)0x473e7300 Qn (i32)0x44882000
+vmla.f32 q10, q11, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vmla.f32 q9, q5, q7 :: Qd 0x4db2c947 0x4db2c947 0x4db2c947 0x4db2c947 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vmla.f32 q9, q5, q7 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmla.f32 q0, q11, q12 :: Qd 0x4ef90536 0x4ef90536 0x4ef90536 0x4ef90536 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vmla.f32 q0, q11, q12 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vmla.f32 q7, q1, q6 :: Qd 0x3f8ab1f8 0x3f8ab1f8 0x3f8ab1f8 0x3f8ab1f8 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vmla.f32 q7, q1, q6 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vmla.f32 q0, q1, q2 :: Qd 0x488fe2e0 0x488fe2e0 0x488fe2e0 0x488fe2e0 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vmla.f32 q3, q4, q5 :: Qd 0x4993b8eb 0x4993b8eb 0x4993b8eb 0x4993b8eb Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vmla.f32 q3, q4, q5 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmla.f32 q10, q11, q2 :: Qd 0x474f9bfc 0x474f9bfc 0x474f9bfc 0x474f9bfc Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vmla.f32 q10, q11, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vmla.f32 q9, q5, q7 :: Qd 0x4a657ac4 0x4a657ac4 0x4a657ac4 0x4a657ac4 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vmla.f32 q9, q5, q7 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vmla.f32 q0, q11, q12 :: Qd 0x489eee3e 0x489eee3e 0x489eee3e 0x489eee3e Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmla.f32 q0, q11, q12 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vmla.f32 q7, q1, q6 :: Qd 0xc54ff239 0xc54ff239 0xc54ff239 0xc54ff239 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vmla.f32 q7, q1, q6 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmla.f32 q0, q5, q2 :: Qd 0xbfb8fa0e 0xbfb8fa0e 0xbfb8fa0e 0xbfb8fa0e Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmla.f32 q0, q5, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vmla.f32 q10, q13, q15 :: Qd 0x488666c6 0x488666c6 0x488666c6 0x488666c6 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vmla.f32 q10, q13, q15 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmla.f32 q10, q13, q15 :: Qd 0x4f115379 0x4f115379 0x4f115379 0x4f115379 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmla.f32 q10, q13, q15 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vmla.f32 q0, q1, q2 :: Qd 0x5d6e81fd 0x5d6e81fd 0x5d6e81fd 0x5d6e81fd Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vmla.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmla.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmla.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmla.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmla.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmla.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmla.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLA (fp by scalar) ----
vmla.f32 q0, q1, d4[0] :: Qd 0x45341000 0x45341000 0x45341000 0x45341000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
+vmla.f32 q0, q1, d4[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
vmla.f32 q15, q8, d7[1] :: Qd 0xc6833e00 0xc6833e00 0xc6833e00 0xc6833e00 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
+vmla.f32 q15, q8, d7[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
+vmla.f32 q4, q8, d15[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 q4, q8, d15[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmla.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmla.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 q7, q8, d1[0] :: Qd 0x447a3fff 0x447a3fff 0x447a3fff 0x447a3fff Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
+vmla.f32 q7, q8, d1[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
vmla.f32 q7, q8, d1[0] :: Qd 0x65a96816 0x65a96816 0x65a96816 0x65a96816 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmla.f32 q7, q8, d1[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x40000000 0x40000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x40000000 0x40000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x40000000 0x40000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x40000000 0x40000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vmla.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmla.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmla.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x40000000 0x40000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x40000000 0x40000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmla.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmla.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmla.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmla.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmla.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmla.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLS (fp) ----
vmls.f32 q0, q5, q2 :: Qd 0x44835ce4 0x44835ce4 0x44835ce4 0x44835ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmls.f32 q0, q5, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vmls.f32 q3, q4, q5 :: Qd 0x4ddf4321 0x4ddf4321 0x4ddf4321 0x4ddf4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vmls.f32 q3, q4, q5 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmls.f32 q10, q11, q2 :: Qd 0x4f050e7f 0x4f050e7f 0x4f050e7f 0x4f050e7f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vmls.f32 q10, q11, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmls.f32 q9, q5, q7 :: Qd 0xcec3063f 0xcec3063f 0xcec3063f 0xcec3063f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmls.f32 q9, q5, q7 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vmls.f32 q0, q5, q2 :: Qd 0xd029254c 0xd029254c 0xd029254c 0xd029254c Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vmls.f32 q0, q5, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vmls.f32 q3, q4, q5 :: Qd 0xc6fc5e00 0xc6fc5e00 0xc6fc5e00 0xc6fc5e00 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vmls.f32 q3, q4, q5 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vmls.f32 q10, q11, q2 :: Qd 0xcc4a89cd 0xcc4a89cd 0xcc4a89cd 0xcc4a89cd Qm (i32)0x473e7300 Qn (i32)0x44882000
+vmls.f32 q10, q11, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vmls.f32 q9, q5, q7 :: Qd 0xcdb2c947 0xcdb2c947 0xcdb2c947 0xcdb2c947 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vmls.f32 q9, q5, q7 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmls.f32 q0, q11, q12 :: Qd 0xcef90536 0xcef90536 0xcef90536 0xcef90536 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vmls.f32 q0, q11, q12 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vmls.f32 q7, q1, q6 :: Qd 0x3f6a9c11 0x3f6a9c11 0x3f6a9c11 0x3f6a9c11 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vmls.f32 q7, q1, q6 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vmls.f32 q0, q1, q2 :: Qd 0xc88fe2a0 0xc88fe2a0 0xc88fe2a0 0xc88fe2a0 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vmls.f32 q3, q4, q5 :: Qd 0xc993b8db 0xc993b8db 0xc993b8db 0xc993b8db Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vmls.f32 q3, q4, q5 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmls.f32 q10, q11, q2 :: Qd 0xc74f99fc 0xc74f99fc 0xc74f99fc 0xc74f99fc Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vmls.f32 q10, q11, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vmls.f32 q9, q5, q7 :: Qd 0xca657abc 0xca657abc 0xca657abc 0xca657abc Qm (i32)0x45062000 Qn (i32)0x44db0000
+vmls.f32 q9, q5, q7 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vmls.f32 q0, q11, q12 :: Qd 0xc89eedfe 0xc89eedfe 0xc89eedfe 0xc89eedfe Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmls.f32 q0, q11, q12 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vmls.f32 q7, q1, q6 :: Qd 0x45501239 0x45501239 0x45501239 0x45501239 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vmls.f32 q7, q1, q6 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmls.f32 q0, q5, q2 :: Qd 0x405c7d07 0x405c7d07 0x405c7d07 0x405c7d07 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmls.f32 q0, q5, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vmls.f32 q10, q13, q15 :: Qd 0xc8866686 0xc8866686 0xc8866686 0xc8866686 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vmls.f32 q10, q13, q15 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmls.f32 q10, q13, q15 :: Qd 0xcf115379 0xcf115379 0xcf115379 0xcf115379 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmls.f32 q10, q13, q15 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vmls.f32 q0, q1, q2 :: Qd 0xdd6e81fd 0xdd6e81fd 0xdd6e81fd 0xdd6e81fd Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmls.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmls.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmls.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmls.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmls.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmls.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmls.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmls.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmls.f32 q0, q1, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmls.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmls.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmls.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmls.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLS (fp by scalar) ----
vmls.f32 q0, q1, d4[0] :: Qd 0xc533f000 0xc533f000 0xc533f000 0xc533f000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
+vmls.f32 q0, q1, d4[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
vmls.f32 q15, q8, d7[1] :: Qd 0x46834200 0x46834200 0x46834200 0x46834200 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
+vmls.f32 q15, q8, d7[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
+vmls.f32 q4, q8, d15[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.f32 q4, q8, d15[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmls.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmls.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.f32 q7, q8, d1[1] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.f32 q7, q8, d1[0] :: Qd 0xc479bfff 0xc479bfff 0xc479bfff 0xc479bfff Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
+vmls.f32 q7, q8, d1[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
vmls.f32 q7, q8, d1[0] :: Qd 0xe5a96816 0xe5a96816 0xe5a96816 0xe5a96816 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmls.f32 q7, q8, d1[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmls.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmls.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmls.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmls.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmls.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmls.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmls.f32 q0, q1, d2[0] :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmls.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmls.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmls.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmls.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VCVT (integer <-> fp) ----
vcvt.u32.f32 q0, q1 :: Qd 0x00000003 0x00000003 0x00000003 0x00000003 Qm (i32)0x404ccccd
+vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.u32.f32 q10, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
+vcvt.u32.f32 q10, q11 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.u32.f32 q15, q4 :: Qd 0xb2d05e00 0xb2d05e00 0xb2d05e00 0xb2d05e00 Qm (i32)0x4f32d05e
+vcvt.u32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x4f32d05e
+vcvt.u32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.u32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.u32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0e33333
+vcvt.u32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.u32.f32 q12, q8 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007 Qm (i32)0x40fff800
+vcvt.u32.f32 q12, q8 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x40fff800
+vcvt.u32.f32 q12, q8 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.u32.f32 q12, q8 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.s32.f32 q0, q1 :: Qd 0x00000003 0x00000003 0x00000003 0x00000003 Qm (i32)0x404ccccd
+vcvt.s32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.s32.f32 q10, q11 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x64cb49b4
+vcvt.s32.f32 q10, q11 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.s32.f32 q15, q4 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x4f32d05e
+vcvt.s32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x4f32d05e
+vcvt.s32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.s32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.s32.f32 q15, q4 :: Qd 0xfffffff9 0xfffffff9 0xfffffff9 0xfffffff9 Qm (i32)0xc0e33333
+vcvt.s32.f32 q15, q4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.s32.f32 q12, q8 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007 Qm (i32)0x40fff800
+vcvt.s32.f32 q12, q8 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x40fff800
vcvt.s32.f32 q12, q8 :: Qd 0xfffffff9 0xfffffff9 0xfffffff9 0xfffffff9 Qm (i32)0xc0fff800
+vcvt.s32.f32 q12, q8 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.f32.u32 q0, q1 :: Qd 0x40e00000 0x40e00000 0x40e00000 0x40e00000 Qm (i32)0x00000007
+vcvt.f32.u32 q0, q1 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x00000007
vcvt.f32.u32 q10, q11 :: Qd 0x4f000000 0x4f000000 0x4f000000 0x4f000000 Qm (i32)0x80000000
+vcvt.f32.u32 q10, q11 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x80000000
vcvt.f32.u32 q0, q1 :: Qd 0x4f000000 0x4f000000 0x4f000000 0x4f000000 Qm (i32)0x80000001
+vcvt.f32.u32 q0, q1 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x80000001
vcvt.f32.u32 q0, q1 :: Qd 0x4f000000 0x4f000000 0x4f000000 0x4f000000 Qm (i32)0x7fffffff
+vcvt.f32.u32 q0, q1 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x7fffffff
vcvt.f32.u32 q0, q14 :: Qd 0x4e4282f4 0x4e4282f4 0x4e4282f4 0x4e4282f4 Qm (i32)0x30a0bcef
+vcvt.f32.u32 q0, q14 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x30a0bcef
vcvt.f32.s32 q0, q1 :: Qd 0x40e00000 0x40e00000 0x40e00000 0x40e00000 Qm (i32)0x00000007
+vcvt.f32.s32 q0, q1 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x00000007
vcvt.f32.s32 q10, q11 :: Qd 0xcf000000 0xcf000000 0xcf000000 0xcf000000 Qm (i32)0x80000000
+vcvt.f32.s32 q10, q11 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x80000000
vcvt.f32.s32 q0, q1 :: Qd 0xcf000000 0xcf000000 0xcf000000 0xcf000000 Qm (i32)0x80000001
+vcvt.f32.s32 q0, q1 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x80000001
vcvt.f32.s32 q0, q1 :: Qd 0x4f000000 0x4f000000 0x4f000000 0x4f000000 Qm (i32)0x7fffffff
+vcvt.f32.s32 q0, q1 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x7fffffff
vcvt.f32.s32 q0, q14 :: Qd 0x4e4282f4 0x4e4282f4 0x4e4282f4 0x4e4282f4 Qm (i32)0x30a0bcef
+vcvt.f32.s32 q0, q14 :: Qd 0x4e18b4b5 0x4e14a8b9 0x4e10b0ad 0x4e0cbcb9 Qm (i32)0x30a0bcef
vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.u32.f32 q0, q1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7f800000
+vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
+vcvt.u32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
+vcvt.s32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.s32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.s32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcvt.s32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.s32.f32 q0, q1 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x7f800000
+vcvt.s32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vcvt.s32.f32 q0, q1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0xff800000
+vcvt.s32.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
---- VCVT (fixed <-> fp) ----
vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000019 0x00000019 0x00000019 0x00000019 Qm (i32)0x404ccccd
+vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.u32.f32 q10, q11, #1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
+vcvt.u32.f32 q10, q11, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.u32.f32 q15, q4, #32 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
+vcvt.u32.f32 q15, q4, #32 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x4f32d05e
vcvt.u32.f32 q15, q4, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf000000
+vcvt.u32.f32 q15, q4, #7 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf000000
+vcvt.u32.f32 q15, q4, #4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.u32.f32 q15, q4, #4 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.u32.f32 q12, q8, #3 :: Qd 0x0000003f 0x0000003f 0x0000003f 0x0000003f Qm (i32)0x40fff800
+vcvt.u32.f32 q12, q8, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x40fff800
+vcvt.u32.f32 q12, q8, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.u32.f32 q12, q8, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.s32.f32 q0, q1, #5 :: Qd 0x00000066 0x00000066 0x00000066 0x00000066 Qm (i32)0x404ccccd
+vcvt.s32.f32 q0, q1, #5 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.s32.f32 q10, q11, #1 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x64cb49b4
+vcvt.s32.f32 q10, q11, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.s32.f32 q15, q4, #8 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x4f32d05e
+vcvt.s32.f32 q15, q4, #8 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x4f32d05e
vcvt.s32.f32 q15, q4, #2 :: Qd 0xfffffffe 0xfffffffe 0xfffffffe 0xfffffffe Qm (i32)0xbf000000
+vcvt.s32.f32 q15, q4, #2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.s32.f32 q15, q4, #1 :: Qd 0xfffffff2 0xfffffff2 0xfffffff2 0xfffffff2 Qm (i32)0xc0e33333
+vcvt.s32.f32 q15, q4, #1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.s32.f32 q12, q8, #2 :: Qd 0x0000001f 0x0000001f 0x0000001f 0x0000001f Qm (i32)0x40fff800
+vcvt.s32.f32 q12, q8, #2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x40fff800
vcvt.s32.f32 q12, q8, #2 :: Qd 0xffffffe1 0xffffffe1 0xffffffe1 0xffffffe1 Qm (i32)0xc0fff800
+vcvt.s32.f32 q12, q8, #2 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.f32.u32 q0, q1, #5 :: Qd 0x3e600000 0x3e600000 0x3e600000 0x3e600000 Qm (i32)0x00000007
+vcvt.f32.u32 q0, q1, #5 :: Qd 0x4b98b4b5 0x4b94a8b9 0x4b90b0ad 0x4b8cbcb9 Qm (i32)0x00000007
vcvt.f32.u32 q10, q11, #9 :: Qd 0x4a800000 0x4a800000 0x4a800000 0x4a800000 Qm (i32)0x80000000
+vcvt.f32.u32 q10, q11, #9 :: Qd 0x4998b4b5 0x4994a8b9 0x4990b0ad 0x498cbcb9 Qm (i32)0x80000000
vcvt.f32.u32 q0, q1, #4 :: Qd 0x4d000000 0x4d000000 0x4d000000 0x4d000000 Qm (i32)0x80000001
+vcvt.f32.u32 q0, q1, #4 :: Qd 0x4c18b4b5 0x4c14a8b9 0x4c10b0ad 0x4c0cbcb9 Qm (i32)0x80000001
vcvt.f32.u32 q0, q1, #6 :: Qd 0x4c000000 0x4c000000 0x4c000000 0x4c000000 Qm (i32)0x7fffffff
+vcvt.f32.u32 q0, q1, #6 :: Qd 0x4b18b4b5 0x4b14a8b9 0x4b10b0ad 0x4b0cbcb9 Qm (i32)0x7fffffff
vcvt.f32.u32 q0, q14, #5 :: Qd 0x4bc282f4 0x4bc282f4 0x4bc282f4 0x4bc282f4 Qm (i32)0x30a0bcef
+vcvt.f32.u32 q0, q14, #5 :: Qd 0x4b98b4b5 0x4b94a8b9 0x4b90b0ad 0x4b8cbcb9 Qm (i32)0x30a0bcef
vcvt.f32.s32 q0, q1, #12 :: Qd 0x3ae00000 0x3ae00000 0x3ae00000 0x3ae00000 Qm (i32)0x00000007
+vcvt.f32.s32 q0, q1, #12 :: Qd 0x4818b4b5 0x4814a8b9 0x4810b0ad 0x480cbcb9 Qm (i32)0x00000007
vcvt.f32.s32 q10, q11, #8 :: Qd 0xcb000000 0xcb000000 0xcb000000 0xcb000000 Qm (i32)0x80000000
+vcvt.f32.s32 q10, q11, #8 :: Qd 0x4a18b4b5 0x4a14a8b9 0x4a10b0ad 0x4a0cbcb9 Qm (i32)0x80000000
vcvt.f32.s32 q0, q1, #2 :: Qd 0xce000000 0xce000000 0xce000000 0xce000000 Qm (i32)0x80000001
+vcvt.f32.s32 q0, q1, #2 :: Qd 0x4d18b4b5 0x4d14a8b9 0x4d10b0ad 0x4d0cbcb9 Qm (i32)0x80000001
vcvt.f32.s32 q0, q1, #1 :: Qd 0x4e800000 0x4e800000 0x4e800000 0x4e800000 Qm (i32)0x7fffffff
+vcvt.f32.s32 q0, q1, #1 :: Qd 0x4d98b4b5 0x4d94a8b9 0x4d90b0ad 0x4d8cbcb9 Qm (i32)0x7fffffff
vcvt.f32.s32 q0, q14, #6 :: Qd 0x4b4282f4 0x4b4282f4 0x4b4282f4 0x4b4282f4 Qm (i32)0x30a0bcef
+vcvt.f32.s32 q0, q14, #6 :: Qd 0x4b18b4b5 0x4b14a8b9 0x4b10b0ad 0x4b0cbcb9 Qm (i32)0x30a0bcef
+vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.u32.f32 q0, q1, #3 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7f800000
+vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
+vcvt.u32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
+vcvt.s32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.s32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.s32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcvt.s32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.s32.f32 q0, q1, #3 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x7f800000
+vcvt.s32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vcvt.s32.f32 q0, q1, #3 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0xff800000
+vcvt.s32.f32 q0, q1, #3 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
---- VMAX (fp) ----
vmax.f32 q0, q5, q2 :: Qd 0x41b851ec 0x41b851ec 0x41b851ec 0x41b851ec Qm (i32)0x41b851ec Qn (i32)0xc2364659
vmax.f32 q3, q4, q5 :: Qd 0x44a84000 0x44a84000 0x44a84000 0x44a84000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmin.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VRECPE ----
vrecpe.u32 q0, q1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x404ccccd
+vrecpe.u32 q0, q1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x404ccccd
+vrecpe.u32 q10, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
vrecpe.u32 q10, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
vrecpe.u32 q15, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
+vrecpe.u32 q15, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
vrecpe.u32 q15, q4 :: Qd 0xab800000 0xab800000 0xab800000 0xab800000 Qm (i32)0xbf000000
+vrecpe.u32 q15, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xbf000000
vrecpe.u32 q15, q4 :: Qd 0xaa000000 0xaa000000 0xaa000000 0xaa000000 Qm (i32)0xc0e33333
+vrecpe.u32 q15, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xc0e33333
+vrecpe.u32 q12, q8 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x40fff800
vrecpe.u32 q12, q8 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x40fff800
vrecpe.u32 q12, q8 :: Qd 0xaa000000 0xaa000000 0xaa000000 0xaa000000 Qm (i32)0xc0fff800
+vrecpe.u32 q12, q8 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xc0fff800
+vrecpe.u32 q0, q1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x404ccccd
vrecpe.u32 q0, q1 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x404ccccd
vrecpe.u32 q10, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
+vrecpe.u32 q10, q11 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
+vrecpe.u32 q15, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
vrecpe.u32 q15, q4 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
vrecpe.f32 q15, q4 :: Qd 0xbfff8000 0xbfff8000 0xbfff8000 0xbfff8000 Qm (i32)0xbf000000
+vrecpe.f32 q15, q4 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0xbf000000
vrecpe.f32 q15, q4 :: Qd 0xbe100000 0xbe100000 0xbe100000 0xbe100000 Qm (i32)0xc0e33333
+vrecpe.f32 q15, q4 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0xc0e33333
vrecpe.f32 q12, q8 :: Qd 0x3e000000 0x3e000000 0x3e000000 0x3e000000 Qm (i32)0x40fff800
+vrecpe.f32 q12, q8 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x40fff800
vrecpe.f32 q12, q8 :: Qd 0xbe000000 0xbe000000 0xbe000000 0xbe000000 Qm (i32)0xc0fff800
+vrecpe.f32 q12, q8 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0xc0fff800
vrecpe.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x00000007
vrecpe.f32 q10, q11 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000000
+vrecpe.f32 q10, q11 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x80000000
vrecpe.f32 q0, q1 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000001
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x80000001
vrecpe.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x7fffffff
vrecpe.f32 q0, q14 :: Qd 0x4e4c0000 0x4e4c0000 0x4e4c0000 0x4e4c0000 Qm (i32)0x30a0bcef
+vrecpe.f32 q0, q14 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x30a0bcef
vrecpe.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x00000007
vrecpe.f32 q10, q11 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000000
+vrecpe.f32 q10, q11 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x80000000
vrecpe.f32 q0, q1 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000001
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x80000001
vrecpe.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x7fffffff
vrecpe.f32 q0, q14 :: Qd 0x4e4c0000 0x4e4c0000 0x4e4c0000 0x4e4c0000 Qm (i32)0x30a0bcef
+vrecpe.f32 q0, q14 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x30a0bcef
vrecpe.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x7fc00000
vrecpe.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x00000000
vrecpe.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x7f800000
vrecpe.f32 q0, q1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0xff800000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0xff800000
vrecpe.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x7fc00000
vrecpe.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x00000000
vrecpe.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0x7f800000
vrecpe.f32 q0, q1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0xff800000
+vrecpe.f32 q0, q1 :: Qd 0x58bd0000 0x59c08000 0x5abe0000 0x5bbb0000 Qm (i32)0xff800000
---- VRECPS ----
vrecps.f32 q0, q5, q2 :: Qd 0x44837ce4 0x44837ce4 0x44837ce4 0x44837ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vrecps.f32 q3, q4, q5 :: Qd 0x4ddf4321 0x4ddf4321 0x4ddf4321 0x4ddf4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vrecps.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VABS (fp) ----
vabs.f32 q0, q1 :: Qd 0x404ccccd 0x404ccccd 0x404ccccd 0x404ccccd Qm (i32)0x404ccccd
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x404ccccd
vabs.f32 q10, q11 :: Qd 0x64cb49b4 0x64cb49b4 0x64cb49b4 0x64cb49b4 Qm (i32)0x64cb49b4
+vabs.f32 q10, q11 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x64cb49b4
vabs.f32 q15, q4 :: Qd 0x4f32d05e 0x4f32d05e 0x4f32d05e 0x4f32d05e Qm (i32)0x4f32d05e
+vabs.f32 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x4f32d05e
vabs.f32 q15, q4 :: Qd 0x3f000000 0x3f000000 0x3f000000 0x3f000000 Qm (i32)0xbf000000
+vabs.f32 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xbf000000
vabs.f32 q15, q4 :: Qd 0x40e33333 0x40e33333 0x40e33333 0x40e33333 Qm (i32)0xc0e33333
+vabs.f32 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xc0e33333
vabs.f32 q12, q8 :: Qd 0x40fff800 0x40fff800 0x40fff800 0x40fff800 Qm (i32)0x40fff800
+vabs.f32 q12, q8 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x40fff800
vabs.f32 q12, q8 :: Qd 0x40fff800 0x40fff800 0x40fff800 0x40fff800 Qm (i32)0xc0fff800
+vabs.f32 q12, q8 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xc0fff800
vabs.f32 q0, q1 :: Qd 0x404ccccd 0x404ccccd 0x404ccccd 0x404ccccd Qm (i32)0x404ccccd
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x404ccccd
vabs.f32 q10, q11 :: Qd 0x64cb49b4 0x64cb49b4 0x64cb49b4 0x64cb49b4 Qm (i32)0x64cb49b4
+vabs.f32 q10, q11 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x64cb49b4
vabs.f32 q15, q4 :: Qd 0x4f32d05e 0x4f32d05e 0x4f32d05e 0x4f32d05e Qm (i32)0x4f32d05e
+vabs.f32 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x4f32d05e
vabs.f32 q15, q4 :: Qd 0x3f000000 0x3f000000 0x3f000000 0x3f000000 Qm (i32)0xbf000000
+vabs.f32 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xbf000000
vabs.f32 q15, q4 :: Qd 0x40e33333 0x40e33333 0x40e33333 0x40e33333 Qm (i32)0xc0e33333
+vabs.f32 q15, q4 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xc0e33333
vabs.f32 q12, q8 :: Qd 0x40fff800 0x40fff800 0x40fff800 0x40fff800 Qm (i32)0x40fff800
+vabs.f32 q12, q8 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x40fff800
vabs.f32 q12, q8 :: Qd 0x40fff800 0x40fff800 0x40fff800 0x40fff800 Qm (i32)0xc0fff800
+vabs.f32 q12, q8 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xc0fff800
vabs.f32 q0, q1 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007 Qm (i32)0x00000007
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000007
vabs.f32 q10, q11 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
+vabs.f32 q10, q11 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x80000000
vabs.f32 q0, q1 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i32)0x80000001
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x80000001
vabs.f32 q0, q1 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x7fffffff
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x7fffffff
vabs.f32 q0, q14 :: Qd 0x30a0bcef 0x30a0bcef 0x30a0bcef 0x30a0bcef Qm (i32)0x30a0bcef
+vabs.f32 q0, q14 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x30a0bcef
vabs.f32 q0, q1 :: Qd 0x00000007 0x00000007 0x00000007 0x00000007 Qm (i32)0x00000007
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000007
vabs.f32 q10, q11 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
+vabs.f32 q10, q11 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x80000000
vabs.f32 q0, q1 :: Qd 0x00000001 0x00000001 0x00000001 0x00000001 Qm (i32)0x80000001
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x80000001
vabs.f32 q0, q1 :: Qd 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff Qm (i32)0x7fffffff
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x7fffffff
vabs.f32 q0, q14 :: Qd 0x30a0bcef 0x30a0bcef 0x30a0bcef 0x30a0bcef Qm (i32)0x30a0bcef
+vabs.f32 q0, q14 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x30a0bcef
vabs.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x7fc00000
vabs.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000000
vabs.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x7f800000
vabs.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xff800000
vabs.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x7fc00000
vabs.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x00000000
vabs.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0x7f800000
vabs.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000
+vabs.f32 q0, q1 :: Qd 0x262d2d2a 0x252a2e2b 0x242c2b2b 0x232f2e2f Qm (i32)0xff800000
---- VCGT (fp) ----
vcgt.f32 q0, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x3f000000 Qn (i32)0xbf000000
vcgt.f32 q2, q15, q12 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vceq.f32 q0, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0xff800000
---- VCEQ (fp) #0 ----
vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x01000000
+vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x01000000
vceq.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000001
+vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000001
vceq.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000000
+vceq.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
vceq.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x41b851ec
+vceq.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x41b851ec
+vceq.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc1b851ec
vceq.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc1b851ec
vceq.f32 q10, q15, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.f32 q10, q15, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vceq.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
+vceq.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
---- VCGT (fp) #0 ----
vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x01000000
+vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x01000000
vcgt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000001
+vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000001
vcgt.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
+vcgt.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000000
+vcgt.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x41b851ec
vcgt.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x41b851ec
vcgt.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc1b851ec
+vcgt.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
vcgt.f32 q10, q15, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.f32 q10, q15, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7fc00000
vcgt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7f800000
vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7f800000
vcgt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
+vcgt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xff800000
---- VCLT (fp) #0 ----
vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x01000000
+vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x01000000
+vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000001
vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000001
vclt.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
+vclt.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
+vclt.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x41b851ec
vclt.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x41b851ec
vclt.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
+vclt.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc1b851ec
vclt.f32 q10, q15, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.f32 q10, q15, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vclt.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xff800000
+vclt.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
---- VCGE (fp) #0 ----
vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x01000000
+vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x01000000
vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000001
+vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000001
+vcge.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000000
vcge.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000000
vcge.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x41b851ec
+vcge.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x41b851ec
vcge.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc1b851ec
+vcge.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
+vcge.f32 q10, q15, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.f32 q10, q15, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7fc00000
+vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7f800000
+vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x7f800000
vcge.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
+vcge.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xff800000
---- VCLE (fp) #0 ----
vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x01000000
+vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x01000000
vcle.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000001
+vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000001
vcle.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000000
+vcle.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
+vcle.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x41b851ec
vcle.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x41b851ec
vcle.f32 q2, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
+vcle.f32 q2, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xc1b851ec
vcle.f32 q10, q15, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.f32 q10, q15, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcle.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000
+vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
vcle.f32 q0, q1, #0 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0xff800000
+vcle.f32 q0, q1, #0 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0xff800000
---- VNEG (fp) ----
vneg.f32 q0, q1 :: Qd 0x81000000 0x81000000 0x81000000 0x81000000 Qm (i32)0x01000000
+vneg.f32 q0, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x01000000
vneg.f32 q0, q1 :: Qd 0x80000001 0x80000001 0x80000001 0x80000001 Qm (i32)0x00000001
+vneg.f32 q0, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x00000001
vneg.f32 q2, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000000
+vneg.f32 q2, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x80000000
vneg.f32 q2, q1 :: Qd 0xc1b851ec 0xc1b851ec 0xc1b851ec 0xc1b851ec Qm (i32)0x41b851ec
+vneg.f32 q2, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x41b851ec
vneg.f32 q2, q1 :: Qd 0x41b851ec 0x41b851ec 0x41b851ec 0x41b851ec Qm (i32)0xc1b851ec
+vneg.f32 q2, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0xc1b851ec
vneg.f32 q10, q15 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x00000000
+vneg.f32 q10, q15 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x00000000
vneg.f32 q0, q1 :: Qd 0xffc00000 0xffc00000 0xffc00000 0xffc00000 Qm (i32)0x7fc00000
+vneg.f32 q0, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x7fc00000
vneg.f32 q0, q1 :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x00000000
+vneg.f32 q0, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x00000000
vneg.f32 q0, q1 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x7f800000
+vneg.f32 q0, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0x7f800000
vneg.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000
+vneg.f32 q0, q1 :: Qd 0xa62d2d2a 0xa52a2e2b 0xa42c2b2b 0xa32f2e2f Qm (i32)0xff800000
---- VRSQRTS ----
vrsqrts.f32 q0, q5, q2 :: Qd 0x44039ce4 0x44039ce4 0x44039ce4 0x44039ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vrsqrts.f32 q3, q4, q5 :: Qd 0x4d5f4321 0x4d5f4321 0x4d5f4321 0x4d5f4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vrsqrts.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VRSQRTE (fp) ----
vrsqrte.f32 q0, q1 :: Qd 0x3f0f0000 0x3f0f0000 0x3f0f0000 0x3f0f0000 Qm (i32)0x404ccccd
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x404ccccd
vrsqrte.f32 q10, q11 :: Qd 0x2ccb0000 0x2ccb0000 0x2ccb0000 0x2ccb0000 Qm (i32)0x64cb49b4
+vrsqrte.f32 q10, q11 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x64cb49b4
vrsqrte.f32 q15, q4 :: Qd 0x37998000 0x37998000 0x37998000 0x37998000 Qm (i32)0x4f32d05e
+vrsqrte.f32 q15, q4 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x4f32d05e
vrsqrte.f32 q15, q4 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xbf000000
+vrsqrte.f32 q15, q4 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0xbf000000
vrsqrte.f32 q15, q4 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xc0e33333
+vrsqrte.f32 q15, q4 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0xc0e33333
vrsqrte.f32 q12, q8 :: Qd 0x3eb50000 0x3eb50000 0x3eb50000 0x3eb50000 Qm (i32)0x40fff800
+vrsqrte.f32 q12, q8 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x40fff800
vrsqrte.f32 q12, q8 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xc0fff800
+vrsqrte.f32 q12, q8 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0xc0fff800
vrsqrte.f32 q0, q1 :: Qd 0x3f0f0000 0x3f0f0000 0x3f0f0000 0x3f0f0000 Qm (i32)0x404ccccd
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x404ccccd
vrsqrte.f32 q10, q11 :: Qd 0x2ccb0000 0x2ccb0000 0x2ccb0000 0x2ccb0000 Qm (i32)0x64cb49b4
+vrsqrte.f32 q10, q11 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x64cb49b4
vrsqrte.f32 q15, q4 :: Qd 0x37998000 0x37998000 0x37998000 0x37998000 Qm (i32)0x4f32d05e
+vrsqrte.f32 q15, q4 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x4f32d05e
vrsqrte.f32 q15, q4 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xbf000000
+vrsqrte.f32 q15, q4 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0xbf000000
vrsqrte.f32 q15, q4 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xc0e33333
+vrsqrte.f32 q15, q4 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0xc0e33333
vrsqrte.f32 q12, q8 :: Qd 0x3eb50000 0x3eb50000 0x3eb50000 0x3eb50000 Qm (i32)0x40fff800
+vrsqrte.f32 q12, q8 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x40fff800
vrsqrte.f32 q12, q8 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xc0fff800
+vrsqrte.f32 q12, q8 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0xc0fff800
vrsqrte.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x00000007
vrsqrte.f32 q10, q11 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000000
+vrsqrte.f32 q10, q11 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x80000000
vrsqrte.f32 q0, q1 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000001
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x80000001
vrsqrte.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x7fffffff
vrsqrte.f32 q0, q14 :: Qd 0x46e48000 0x46e48000 0x46e48000 0x46e48000 Qm (i32)0x30a0bcef
+vrsqrte.f32 q0, q14 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x30a0bcef
vrsqrte.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x00000007
vrsqrte.f32 q10, q11 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000000
+vrsqrte.f32 q10, q11 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x80000000
vrsqrte.f32 q0, q1 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0x80000001
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x80000001
vrsqrte.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x7fffffff
vrsqrte.f32 q0, q14 :: Qd 0x46e48000 0x46e48000 0x46e48000 0x46e48000 Qm (i32)0x30a0bcef
+vrsqrte.f32 q0, q14 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x30a0bcef
vrsqrte.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x7fc00000
vrsqrte.f32 q0, q1 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x00000000
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x00000000
vrsqrte.f32 q0, q1 :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x7f800000
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0x7f800000
vrsqrte.f32 q0, q1 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000
+vrsqrte.f32 q0, q1 :: Qd 0x4c1b8000 0x4c9d0000 0x4d1c0000 0x4d9a8000 Qm (i32)0xff800000
); \
printf("%s, #" #imm " :: Qd 0x%08x 0x%08x\n", \
instruction, out[1], out[0]); \
+} \
+{ \
+ unsigned int out[2]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %1, %2\n\t" \
+ "vldmia %1!, {" #QD "}\n\t" \
+ instruction ", #" #imm "\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ : \
+ : "r" (out), "r" (addr), "r" (mem) \
+ : #QD, "%2", "memory" \
+ ); \
+ printf("%s, #" #imm " :: Qd 0x%08x 0x%08x\n", \
+ instruction, out[1], out[0]); \
}
#define TESTINSN_un(instruction, QD, QM, QMtype, QMval) \
); \
printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x\n", \
instruction, out[1], out[0], QMval); \
+} \
+{ \
+ unsigned int out[2]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %2, %3\n\t" \
+ "vldmia %2!, {" #QD "}\n\t" \
+ "vldmia %2!, {" #QM "}\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ : \
+ : "r" (out), "r" (QMval), "r" (addr), "r" (mem) \
+ : #QD, #QM, "%2", "memory" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x\n", \
+ instruction, out[1], out[0], QMval ); \
}
#define TESTINSN_un_q(instruction, QD, QM, QMtype, QMval) \
); \
printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x fpscr %08x\n", \
instruction, out[1], out[0], QMval, fpscr); \
+} \
+{ \
+ unsigned int out[2]; \
+ unsigned int fpscr; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "vmov.i8 " #QD ", #0x55" "\n\t" \
+ "mov r4, #0\n\t" \
+ MOVE_to_FPSCR_from_R4 \
+ "mov %3, %4\n\t" \
+ "vldmia %3!, {" #QM "}\n\t" \
+ instruction "\n\t" \
+ "vstmia %1, {" #QD "}\n\t" \
+ MOVE_to_R4_from_FPSCR \
+ "mov %0, r4" \
+ : "=r" (fpscr) \
+ : "r" (out), "r" (QMval), "r" (addr), "r" (mem) \
+ : #QD, #QM, "memory", "r4" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x fpscr %08x\n", \
+ instruction, out[1], out[0], QMval, fpscr); \
}
#define TESTINSN_core_to_scalar(instruction, QD, QM, QMval) \
#define TESTINSN_VLDn_WB(instruction, QD1, QD2, QD3, QD4) \
{ \
- unsigned int out[9]; \
-\
- __asm__ volatile( \
- "vmov.i8 " #QD1 ", #0x55" "\n\t" \
- "vmov.i8 " #QD2 ", #0x55" "\n\t" \
- "vmov.i8 " #QD3 ", #0x55" "\n\t" \
- "vmov.i8 " #QD4 ", #0x55" "\n\t" \
- instruction ", [%1]!\n\t" \
- "mov r4, %0\n\t" \
- "vstmia %0!, {" #QD1 "}\n\t" \
- "vstmia %0!, {" #QD2 "}\n\t" \
- "vstmia %0!, {" #QD3 "}\n\t" \
- "vstmia %0!, {" #QD4 "}\n\t" \
- "str %1, [%2]\n\t" \
- "mov %0, r4\n\t" \
- : \
- : "r" (out), "r" (mem), "r"(&out[8]) \
- : #QD1, #QD2, #QD3, #QD4, "memory", "r4" \
- ); \
- printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
- "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
- instruction, out[0], out[1], out[2], out[3], out[4],\
- out[5], out[6], out[7], (int)out[8]-(int)mem); \
+ unsigned int out[9]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %0, %2\n\t" \
+ "vmov.i8 " #QD1 ", #0x55" "\n\t" \
+ "vmov.i8 " #QD2 ", #0x55" "\n\t" \
+ "vmov.i8 " #QD3 ", #0x55" "\n\t" \
+ "vmov.i8 " #QD4 ", #0x55" "\n\t" \
+ instruction ", [%0]!\n\t" \
+ "mov r4, %1\n\t" \
+ "vstmia %1!, {" #QD1 "}\n\t" \
+ "vstmia %1!, {" #QD2 "}\n\t" \
+ "vstmia %1!, {" #QD3 "}\n\t" \
+ "vstmia %1!, {" #QD4 "}\n\t" \
+ "str %0, [%3]\n\t" \
+ "mov %1, r4\n\t" \
+ : "+r" (addr) \
+ : "r" (out), "r" (mem), "r"(&out[8]) \
+ : #QD1, #QD2, #QD3, #QD4, "memory", "r4" \
+ ); \
+ printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
+ "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
+ instruction, out[0], out[1], out[2], out[3], out[4],\
+ out[5], out[6], out[7], (int)out[8]-(int)mem); \
}
#define TESTINSN_VSTn_WB(instruction, QD1, QD2, QD3, QD4) \
{ \
- unsigned int out[9]; \
-\
- memset(out, 0x55, 8 * (sizeof(unsigned int)));\
- __asm__ volatile( \
- "mov r4, %1\n\t" \
- "vldmia %1!, {" #QD1 "}\n\t" \
- "vldmia %1!, {" #QD2 "}\n\t" \
- "vldmia %1!, {" #QD3 "}\n\t" \
- "vldmia %1!, {" #QD4 "}\n\t" \
- "mov %1, r4\n\t" \
- instruction ", [%0]!\n\t" \
- "str %0, [%2]\n\t" \
- : \
- : "r" (out), "r" (mem), "r"(&out[8]) \
- : #QD1, #QD2, #QD3, #QD4, "memory", "r4" \
- ); \
- printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
- "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
- instruction, out[0], out[1], out[2], out[3], out[4],\
- out[5], out[6], out[7], (int)out[8]-(int)out); \
+ unsigned int out[9]; \
+ unsigned int addr = 0; \
+ \
+ memset(out, 0x55, 8 * (sizeof(unsigned int)));\
+ __asm__ volatile( \
+ "mov %0, %1\n\t" \
+ "mov r4, %2\n\t" \
+ "vldmia r4!, {" #QD1 "}\n\t" \
+ "vldmia r4!, {" #QD2 "}\n\t" \
+ "vldmia r4!, {" #QD3 "}\n\t" \
+ "vldmia r4!, {" #QD4 "}\n\t" \
+ instruction ", [%0]!\n\t" \
+ "str %0, [%3]\n\t" \
+ : "+r" (addr) \
+ : "r" (out), "r" (mem), "r"(&out[8]) \
+ : #QD1, #QD2, #QD3, #QD4, "memory", "r4", "0" \
+ ); \
+ printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
+ "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
+ instruction, out[0], out[1], out[2], out[3], out[4],\
+ out[5], out[6], out[7], (int)out[8]-(int)out); \
}
#define TESTINSN_VLDn_RI(instruction, QD1, QD2, QD3, QD4, RM, RMval) \
{ \
- unsigned int out[9]; \
-\
- __asm__ volatile( \
- "vmov.i8 " #QD1 ", #0x55" "\n\t" \
- "vmov.i8 " #QD2 ", #0x55" "\n\t" \
- "vmov.i8 " #QD3 ", #0x55" "\n\t" \
- "vmov.i8 " #QD4 ", #0x55" "\n\t" \
- "mov " #RM ", %3\n\t" \
- instruction ", [%1], " #RM "\n\t" \
- "mov r4, %0\n\t" \
- "vstmia %0!, {" #QD1 "}\n\t" \
- "vstmia %0!, {" #QD2 "}\n\t" \
- "vstmia %0!, {" #QD3 "}\n\t" \
- "vstmia %0!, {" #QD4 "}\n\t" \
- "str %1, [%2]\n\t" \
- "mov %0, r4\n\t" \
- : \
- : "r" (out), "r" (mem), "r"(&out[8]), "r"(RMval) \
- : #QD1, #QD2, #QD3, #QD4, "memory", "r4", #RM \
- ); \
- printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
- "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
- instruction, out[0], out[1], out[2], out[3], out[4],\
- out[5], out[6], out[7], (int)out[8]-(int)mem); \
+ unsigned int out[9]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %0, %2\n\t" \
+ "vmov.i8 " #QD1 ", #0x55" "\n\t" \
+ "vmov.i8 " #QD2 ", #0x55" "\n\t" \
+ "vmov.i8 " #QD3 ", #0x55" "\n\t" \
+ "vmov.i8 " #QD4 ", #0x55" "\n\t" \
+ "mov " #RM ", %4\n\t" \
+ instruction ", [%0], " #RM "\n\t" \
+ "mov r4, %1\n\t" \
+ "vstmia %1!, {" #QD1 "}\n\t" \
+ "vstmia %1!, {" #QD2 "}\n\t" \
+ "vstmia %1!, {" #QD3 "}\n\t" \
+ "vstmia %1!, {" #QD4 "}\n\t" \
+ "str %0, [%3]\n\t" \
+ "mov %1, r4\n\t" \
+ : "+r" (addr) \
+ : "r" (out), "r" (mem), "r"(&out[8]), "r"(RMval) \
+ : #QD1, #QD2, #QD3, #QD4, "memory", "r4", #RM \
+ ); \
+ printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
+ "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
+ instruction, out[0], out[1], out[2], out[3], out[4],\
+ out[5], out[6], out[7], (int)out[8]-(int)addr); \
}
+
#define TESTINSN_VSTn_RI(instruction, QD1, QD2, QD3, QD4, RM, RMval) \
{ \
- unsigned int out[9]; \
-\
- memset(out, 0x55, 8 * (sizeof(unsigned int)));\
- __asm__ volatile( \
- "mov r4, %1\n\t" \
- "vldmia %1!, {" #QD1 "}\n\t" \
- "vldmia %1!, {" #QD2 "}\n\t" \
- "vldmia %1!, {" #QD3 "}\n\t" \
- "vldmia %1!, {" #QD4 "}\n\t" \
- "mov %1, r4\n\t" \
- "mov " #RM ", %3\n\t" \
- instruction ", [%0], " #RM "\n\t" \
- "str %0, [%2]\n\t" \
- : \
- : "r" (out), "r" (mem), "r"(&out[8]), "r"(RMval) \
- : #QD1, #QD2, #QD3, #QD4, "memory", "r4", #RM \
- ); \
- printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
- "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
- instruction, out[0], out[1], out[2], out[3], out[4],\
- out[5], out[6], out[7], (int)out[8]-(int)out); \
+ unsigned int out[9]; \
+ unsigned int addr = 0; \
+ \
+ memset(out, 0x55, 8 * (sizeof(unsigned int)));\
+ __asm__ volatile( \
+ "mov %0, %1\n\t" \
+ "mov r4, %2\n\t" \
+ "vldmia r4!, {" #QD1 "}\n\t" \
+ "vldmia r4!, {" #QD2 "}\n\t" \
+ "vldmia r4!, {" #QD3 "}\n\t" \
+ "vldmia r4!, {" #QD4 "}\n\t" \
+ "mov " #RM ", %4\n\t" \
+ instruction ", [%0], " #RM "\n\t" \
+ "str %0, [%3]\n\t" \
+ : "+r" (addr) \
+ : "r" (out), "r" (mem), "r"(&out[8]), "r"(#RMval) \
+ : #QD1, #QD2, #QD3, #QD4, "memory", "r4", #RM \
+ ); \
+ printf("%s :: Result 0x%08x 0x%08x 0x%08x 0x%08x "\
+ "0x%08x 0x%08x 0x%08x 0x%08x delta %d\n", \
+ instruction, out[0], out[1], out[2], out[3], out[4],\
+ out[5], out[6], out[7], (int)out[8]-(int)out); \
}
#define TESTINSN_bin(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \
printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
" Qn (" #QNtype ")0x%08x\n", \
instruction, out[1], out[0], QMval, QNval); \
+} \
+{ \
+ unsigned int out[2]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %0, %4\n\t" \
+ "vldmia %0!, {" #QM "}\n\t" \
+ "vmov.i8 " #QD ", #0x55" "\n\t" \
+ "vdup." #QNtype " " #QN ", %3\n\t" \
+ instruction "\n\t" \
+ "vstmia %1, {" #QD "}\n\t" \
+ : "+r" (addr) \
+ : "r" (out), "r" (QMval), "r" (QNval), "r" (mem) \
+ : #QD, #QM, #QN, "memory" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x\n", \
+ instruction, out[1], out[0], QMval, QNval); \
}
#define TESTINSN_bin_f(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \
printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
" Qn (" #QNtype ")0x%08x\n", \
instruction, out[1], out[0], QMval, QNval); \
+} \
+{ \
+ unsigned int out[2]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "vdup.i32 " #QD ", %3\n\t" \
+ "mov %4, %5\n\t" \
+ "vldmia %4!, {" #QM "}\n\t" \
+ "vdup." #QNtype " " #QN ", %2\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ : \
+ : "r" (out), "r" (QMval), "r" (QNval), "r"(0x3f800000), "r" (addr), "r" (mem) \
+ : #QD, #QM, #QN, "memory" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x\n", \
+ instruction, out[1], out[0], QMval, QNval); \
}
#define TESTINSN_tbl(instruction, QD, QM, QMtype, QMval, QN1, QN1type, QN1val, \
" Qn3 (" #QN3type ")0x%08x" \
" Qn4 (" #QN4type ")0x%08x\n", \
instruction, out[1], out[0], QMval, QN1val, QN2val, QN3val, QN4val); \
+} \
+{ \
+ unsigned int out[2]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %6, %7\n\t" \
+ "vmov.i8 " #QD ", #0x55" "\n\t" \
+ "vdup." #QMtype " " #QM ", %1\n\t" \
+ "vldmia %6!, {" #QN1 "}\n\t" \
+ "vdup." #QN2type " " #QN2 ", %3\n\t" \
+ "vldmia %6!, {" #QN3 "}\n\t" \
+ "vdup." #QN4type " " #QN4 ", %5\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QD "}\n\t" \
+ : \
+ : "r" (out), "r" (QMval), "r" (QN1val), "r" (QN2val), "r" (QN3val), \
+ "r" (QN4val), "r" (addr), "r" (mem) \
+ : #QD, #QM, #QN1, #QN2, #QN3, #QN4, "memory" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn1 (" #QN1type ")0x%08x" \
+ " Qn2 (" #QN2type ")0x%08x" \
+ " Qn3 (" #QN3type ")0x%08x" \
+ " Qn4 (" #QN4type ")0x%08x\n", \
+ instruction, out[1], out[0], QMval, QN1val, QN2val, QN3val, QN4val); \
}
+
#define TESTINSN_tbl_1(instruction, QD, QM, QMtype, QMval, QN1, QN1type, QN1val) \
TESTINSN_tbl(instruction, QD, QM, QMtype, QMval, QN1, QN1type, QN1val, \
QN1, QN1type, QN1val, QN1, QN1type, QN1val, QN1, QN1type, QN1val)
printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
" Qn (" #QNtype ")0x%08x fpscr: %08x\n", \
instruction, out[1], out[0], QMval, QNval, fpscr); \
+} \
+{ \
+ unsigned int out[2]; \
+ unsigned int fpscr; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "vmov.i8 " #QD ", #0x55" "\n\t" \
+ "mov r4, #0\n\t" \
+ MOVE_to_FPSCR_from_R4 \
+ "mov %4, %5\n\t" \
+ "vldmia %4!, {" #QM "}\n\t" \
+ "vdup." #QNtype " " #QN ", %3\n\t" \
+ instruction "\n\t" \
+ "vstmia %1, {" #QD "}\n\t" \
+ MOVE_to_R4_from_FPSCR \
+ "mov %0, r4" \
+ : "=r" (fpscr) \
+ : "r" (out), "r" (QMval), "r" (QNval), "r" (addr), "r" (mem) \
+ : #QD, #QM, #QN, "memory", "r4" \
+ ); \
+ printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x fpscr: %08x\n", \
+ instruction, out[1], out[0], QMval, QNval, fpscr); \
}
#define TESTINSN_dual(instruction, QM, QMtype, QMval, QN, QNtype, QNval) \
{ \
- unsigned int out1[2]; \
- unsigned int out2[2]; \
-\
- __asm__ volatile( \
- "vdup." #QMtype " " #QM ", %2\n\t" \
- "vdup." #QNtype " " #QN ", %3\n\t" \
- instruction "\n\t" \
- "vstmia %0, {" #QM "}\n\t" \
- "vstmia %1, {" #QN "}\n\t" \
- : \
- : "r" (out1), "r" (out2), "r" (QMval), "r" (QNval) \
- : #QM, #QN, "memory" \
- ); \
- printf("%s :: Qm 0x%08x 0x%08x Qn 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
- " Qn (" #QNtype ")0x%08x\n", \
- instruction, out1[1], out1[0], out2[1], out2[0], QMval, QNval); \
-}
-
-// Ditto TESTING_bin(), but in QD all zeros
-#define TESTINSN_bin_0s(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \
+ unsigned int out1[2]; \
+ unsigned int out2[2]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %4, %5\n\t" \
+ "vldmia %4!, {" #QM "}\n\t" \
+ "vdup." #QNtype " " #QN ", %3\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QM "}\n\t" \
+ "vstmia %1, {" #QN "}\n\t" \
+ : \
+ : "r" (out1), "r" (out2), "r" (QMval), "r" (QNval), "r" (addr), "r" (mem) \
+ : #QM, #QN, "memory" \
+ ); \
+ printf("%s :: Qm 0x%08x 0x%08x Qn 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x\n", \
+ instruction, out1[1], out1[0], out2[1], out2[0], QMval, QNval); \
+} \
{ \
- unsigned int out[2]; \
-\
- __asm__ volatile( \
- "vmov.i8 " #QD ", #0x00" "\n\t" \
- "vdup." #QMtype " " #QM ", %1\n\t" \
- "vdup." #QNtype " " #QN ", %2\n\t" \
- instruction "\n\t" \
- "vstmia %0, {" #QD "}\n\t" \
- : \
- : "r" (out), "r" (QMval), "r" (QNval) \
- : #QD, #QM, #QN, "memory" \
- ); \
- printf("%s :: Qd 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
- " Qn (" #QNtype ")0x%08x\n", \
- instruction, out[1], out[0], QMval, QNval); \
+ unsigned int out1[2]; \
+ unsigned int out2[2]; \
+ unsigned int addr = 0; \
+ \
+ __asm__ volatile( \
+ "mov %4, %5\n\t" \
+ "vldmia %4!, {" #QM "}\n\t" \
+ "vdup." #QNtype " " #QN ", %3\n\t" \
+ instruction "\n\t" \
+ "vstmia %0, {" #QM "}\n\t" \
+ "vstmia %1, {" #QN "}\n\t" \
+ : \
+ : "r" (out1), "r" (out2), "r" (QMval), "r" (QNval), "r" (addr), "r" (mem) \
+ : #QM, #QN, "%4", "memory" \
+ ); \
+ printf("%s :: Qm 0x%08x 0x%08x Qn 0x%08x 0x%08x Qm (" #QMtype ")0x%08x" \
+ " Qn (" #QNtype ")0x%08x\n", \
+ instruction, out1[1], out1[0], out2[1], out2[0], QMval, QNval); \
}
#if 0
----- VMOV (immediate) -----
vmov.i32 d0, #0x7 :: Qd 0x00000007 0x00000007
+vmov.i32 d0, #0x7 :: Qd 0x00000007 0x00000007
+vmov.i16 d1, #0x7 :: Qd 0x00070007 0x00070007
vmov.i16 d1, #0x7 :: Qd 0x00070007 0x00070007
vmov.i8 d2, #0x7 :: Qd 0x07070707 0x07070707
+vmov.i8 d2, #0x7 :: Qd 0x07070707 0x07070707
+vmov.i32 d5, #0x700 :: Qd 0x00000700 0x00000700
vmov.i32 d5, #0x700 :: Qd 0x00000700 0x00000700
vmov.i16 d7, #0x700 :: Qd 0x07000700 0x07000700
+vmov.i16 d7, #0x700 :: Qd 0x07000700 0x07000700
+vmov.i32 d10, #0x70000 :: Qd 0x00070000 0x00070000
vmov.i32 d10, #0x70000 :: Qd 0x00070000 0x00070000
vmov.i32 d12, #0x7000000 :: Qd 0x07000000 0x07000000
+vmov.i32 d12, #0x7000000 :: Qd 0x07000000 0x07000000
+vmov.i32 d13, #0x7FF :: Qd 0x000007ff 0x000007ff
vmov.i32 d13, #0x7FF :: Qd 0x000007ff 0x000007ff
vmov.i32 d14, #0x7FFFF :: Qd 0x0007ffff 0x0007ffff
+vmov.i32 d14, #0x7FFFF :: Qd 0x0007ffff 0x0007ffff
+vmov.i64 d15, #0xFF0000FF00FFFF00 :: Qd 0xff0000ff 0x00ffff00
vmov.i64 d15, #0xFF0000FF00FFFF00 :: Qd 0xff0000ff 0x00ffff00
----- VMVN (immediate) -----
vmvn.i32 d0, #0x7 :: Qd 0xfffffff8 0xfffffff8
+vmvn.i32 d0, #0x7 :: Qd 0xfffffff8 0xfffffff8
+vmvn.i16 d1, #0x7 :: Qd 0xfff8fff8 0xfff8fff8
vmvn.i16 d1, #0x7 :: Qd 0xfff8fff8 0xfff8fff8
vmvn.i8 d2, #0x7 :: Qd 0xf8f8f8f8 0xf8f8f8f8
+vmvn.i8 d2, #0x7 :: Qd 0xf8f8f8f8 0xf8f8f8f8
+vmvn.i32 d5, #0x700 :: Qd 0xfffff8ff 0xfffff8ff
vmvn.i32 d5, #0x700 :: Qd 0xfffff8ff 0xfffff8ff
vmvn.i16 d7, #0x700 :: Qd 0xf8fff8ff 0xf8fff8ff
+vmvn.i16 d7, #0x700 :: Qd 0xf8fff8ff 0xf8fff8ff
+vmvn.i32 d10, #0x70000 :: Qd 0xfff8ffff 0xfff8ffff
vmvn.i32 d10, #0x70000 :: Qd 0xfff8ffff 0xfff8ffff
vmvn.i32 d13, #0x7000000 :: Qd 0xf8ffffff 0xf8ffffff
+vmvn.i32 d13, #0x7000000 :: Qd 0xf8ffffff 0xf8ffffff
+vmvn.i32 d11, #0x7FF :: Qd 0xfffff800 0xfffff800
vmvn.i32 d11, #0x7FF :: Qd 0xfffff800 0xfffff800
vmvn.i32 d14, #0x7FFFF :: Qd 0xfff80000 0xfff80000
+vmvn.i32 d14, #0x7FFFF :: Qd 0xfff80000 0xfff80000
+vmvn.i64 d15, #0xFF0000FF00FFFF00 :: Qd 0x00ffff00 0xff0000ff
vmvn.i64 d15, #0xFF0000FF00FFFF00 :: Qd 0x00ffff00 0xff0000ff
----- VORR (immediate) -----
vorr.i32 d0, #0x7 :: Qd 0x55555557 0x55555557
+vorr.i32 d0, #0x7 :: Qd 0x131b1a1f 0x121f1e1f
vorr.i16 d2, #0x7 :: Qd 0x55575557 0x55575557
+vorr.i16 d2, #0x7 :: Qd 0x131f1a1f 0x121f1e1f
vorr.i32 d8, #0x700 :: Qd 0x55555755 0x55555755
+vorr.i32 d8, #0x700 :: Qd 0x131b1f1b 0x121f1f1f
vorr.i16 d6, #0x700 :: Qd 0x57555755 0x57555755
+vorr.i16 d6, #0x700 :: Qd 0x171b1f1b 0x171f1f1f
vorr.i32 d14, #0x70000 :: Qd 0x55575555 0x55575555
+vorr.i32 d14, #0x70000 :: Qd 0x131f1a1b 0x121f1e1f
vorr.i32 d15, #0x7000000 :: Qd 0x57555555 0x57555555
+vorr.i32 d15, #0x7000000 :: Qd 0x171b1a1b 0x171f1e1f
----- VBIC (immediate) -----
vbic.i32 d0, #0x7 :: Qd 0x55555550 0x55555550
+vbic.i32 d0, #0x7 :: Qd 0x131b1a18 0x121f1e18
vbic.i16 d3, #0x7 :: Qd 0x55505550 0x55505550
+vbic.i16 d3, #0x7 :: Qd 0x13181a18 0x12181e18
vbic.i32 d5, #0x700 :: Qd 0x55555055 0x55555055
+vbic.i32 d5, #0x700 :: Qd 0x131b181b 0x121f181f
vbic.i16 d8, #0x700 :: Qd 0x50555055 0x50555055
+vbic.i16 d8, #0x700 :: Qd 0x101b181b 0x101f181f
vbic.i32 d10, #0x70000 :: Qd 0x55505555 0x55505555
+vbic.i32 d10, #0x70000 :: Qd 0x13181a1b 0x12181e1f
vbic.i32 d15, #0x7000000 :: Qd 0x50555555 0x50555555
+vbic.i32 d15, #0x7000000 :: Qd 0x101b1a1b 0x101f1e1f
---- VMVN (register) ----
vmvn d0, d1 :: Qd 0xffffffe7 0xffffffe7 Qm (i32)0x00000018
+vmvn d0, d1 :: Qd 0xeae2e6e2 0xebe3e0e3 Qm (i32)0x00000018
vmvn d10, d15 :: Qd 0xffffffe7 0xffffffe7 Qm (i32)0x00000018
+vmvn d10, d15 :: Qd 0xeae2e6e2 0xebe3e0e3 Qm (i32)0x00000018
vmvn d0, d14 :: Qd 0xffffffe7 0xffffffe7 Qm (i32)0x00000018
+vmvn d0, d14 :: Qd 0xeae2e6e2 0xebe3e0e3 Qm (i32)0x00000018
---- VMOV (register) ----
vmov d0, d1 :: Qd 0x00000018 0x00000018 Qm (i32)0x00000018
+vmov d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000018
vmov d10, d15 :: Qd 0x00000018 0x00000018 Qm (i32)0x00000018
+vmov d10, d15 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000018
vmov d0, d14 :: Qd 0x00000018 0x00000018 Qm (i32)0x00000018
+vmov d0, d14 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000018
---- VDUP (ARM core register) (tested indirectly) ----
vmov d0, d1 :: Qd 0x07070707 0x07070707 Qm (i8)0x00000007
+vmov d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i8)0x00000007
vmov d10, d11 :: Qd 0x00070007 0x00070007 Qm (i16)0x00000007
+vmov d10, d11 :: Qd 0x151d191d 0x141c1f1c Qm (i16)0x00000007
vmov d0, d15 :: Qd 0x00000007 0x00000007 Qm (i32)0x00000007
+vmov d0, d15 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000007
---- VADD ----
vadd.i32 d0, d1, d2 :: Qd 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078
+vadd.i32 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078
vadd.i64 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078
+vadd.i64 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078
vadd.i32 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078
+vadd.i32 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078
vadd.i16 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078
+vadd.i16 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078
vadd.i8 d0, d1, d2 :: Qd 0x00000004 0x00000004 Qm (i32)0x0000008c Qn (i32)0x00000078
+vadd.i8 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078
vadd.i8 d0, d1, d2 :: Qd 0x00000003 0x00000003 Qm (i32)0x80000001 Qn (i32)0x80000002
+vadd.i8 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002
vadd.i16 d0, d1, d2 :: Qd 0x00000003 0x00000003 Qm (i32)0x80000001 Qn (i32)0x80000002
+vadd.i16 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002
vadd.i32 d0, d1, d2 :: Qd 0x00000003 0x00000003 Qm (i32)0x80000001 Qn (i32)0x80000002
+vadd.i32 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002
vadd.i64 d0, d1, d2 :: Qd 0x00000004 0x00000003 Qm (i32)0x80000001 Qn (i32)0x80000002
+vadd.i64 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002
vadd.i32 d10, d11, d12 :: Qd 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078
+vadd.i32 d10, d11, d12 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078
vadd.i64 d13, d14, d15 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078
+vadd.i64 d13, d14, d15 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078
---- VSUB ----
vsub.i32 d0, d1, d2 :: Qd 0xffffffa0 0xffffffa0 Qm (i32)0x00000018 Qn (i32)0x00000078
+vsub.i32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078
vsub.i64 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vsub.i64 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078
vsub.i32 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vsub.i32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078
vsub.i16 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vsub.i16 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078
vsub.i8 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vsub.i8 d0, d1, d2 :: Qd 0x131b1aa3 0x121f1ea7 Qm (i32)0x0000008c Qn (i32)0x00000078
vsub.i8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x80000002
+vsub.i8 d0, d1, d2 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vsub.i16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000002
+vsub.i16 d0, d1, d2 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vsub.i32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002
+vsub.i32 d0, d1, d2 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vsub.i64 d0, d1, d2 :: Qd 0xfffffffe 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002
+vsub.i64 d0, d1, d2 :: Qd 0x931b1a18 0x921f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vsub.i32 d10, d11, d12 :: Qd 0xffffffa0 0xffffffa0 Qm (i32)0x00000018 Qn (i32)0x00000078
+vsub.i32 d10, d11, d12 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078
vsub.i64 d13, d14, d15 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vsub.i64 d13, d14, d15 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078
---- VAND ----
vand d0, d1, d2 :: Qd 0x00240024 0x00240024 Qm (i8)0x00000024 Qn (i16)0x00000077
+vand d0, d1, d2 :: Qd 0x00130013 0x00170017 Qm (i8)0x00000024 Qn (i16)0x00000077
vand d4, d6, d5 :: Qd 0x00570057 0x00570057 Qm (i8)0x000000ff Qn (i16)0x00000057
+vand d4, d6, d5 :: Qd 0x00130013 0x00170017 Qm (i8)0x000000ff Qn (i16)0x00000057
vand d10, d11, d12 :: Qd 0xecececec 0xecececec Qm (i8)0x000000fe Qn (i8)0x000000ed
+vand d10, d11, d12 :: Qd 0x01090809 0x000d0c0d Qm (i8)0x000000fe Qn (i8)0x000000ed
+vand d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
vand d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
---- VBIC ----
vbic d0, d1, d2 :: Qd 0x24002400 0x24002400 Qm (i8)0x00000024 Qn (i16)0x00000077
+vbic d0, d1, d2 :: Qd 0x13081a08 0x12081e08 Qm (i8)0x00000024 Qn (i16)0x00000077
vbic d4, d6, d5 :: Qd 0xffa8ffa8 0xffa8ffa8 Qm (i8)0x000000ff Qn (i16)0x00000057
+vbic d4, d6, d5 :: Qd 0x13081a08 0x12081e08 Qm (i8)0x000000ff Qn (i16)0x00000057
+vbic d10, d11, d12 :: Qd 0x12121212 0x12121212 Qm (i8)0x000000fe Qn (i8)0x000000ed
vbic d10, d11, d12 :: Qd 0x12121212 0x12121212 Qm (i8)0x000000fe Qn (i8)0x000000ed
vbic d15, d15, d15 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff Qn (i8)0x000000ff
+vbic d15, d15, d15 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff Qn (i8)0x000000ff
---- VORR ----
vorr d0, d1, d2 :: Qd 0x24772477 0x24772477 Qm (i8)0x00000024 Qn (i16)0x00000073
+vorr d0, d1, d2 :: Qd 0x137b1a7b 0x127f1e7f Qm (i8)0x00000024 Qn (i16)0x00000073
vorr d7, d3, d0 :: Qd 0x24ff24ff 0x24ff24ff Qm (i8)0x00000024 Qn (i16)0x000000ff
+vorr d7, d3, d0 :: Qd 0x13ff1aff 0x12ff1eff Qm (i8)0x00000024 Qn (i16)0x000000ff
+vorr d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vorr d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vorr d2, d3, d15 :: Qd 0x0000003f 0x0000003f Qm (i32)0x00000024 Qn (i32)0x0000001f
+vorr d2, d3, d15 :: Qd 0x131b1a1f 0x121f1e1f Qm (i32)0x00000024 Qn (i32)0x0000001f
---- VORN ----
vorn d0, d1, d2 :: Qd 0xffacffac 0xffacffac Qm (i8)0x00000024 Qn (i16)0x00000073
+vorn d0, d1, d2 :: Qd 0xff9fff9f 0xff9fff9f Qm (i8)0x00000024 Qn (i16)0x00000073
vorn d7, d3, d0 :: Qd 0xff24ff24 0xff24ff24 Qm (i8)0x00000024 Qn (i16)0x000000ff
+vorn d7, d3, d0 :: Qd 0xff1bff1b 0xff1fff1f Qm (i8)0x00000024 Qn (i16)0x000000ff
+vorn d4, d4, d4 :: Qd 0xffffffff 0xffffffff Qm (i16)0x000000ff Qn (i16)0x000000ff
vorn d4, d4, d4 :: Qd 0xffffffff 0xffffffff Qm (i16)0x000000ff Qn (i16)0x000000ff
vorn d2, d3, d15 :: Qd 0xffffffe4 0xffffffe4 Qm (i32)0x00000024 Qn (i32)0x0000001f
+vorn d2, d3, d15 :: Qd 0xfffffffb 0xffffffff Qm (i32)0x00000024 Qn (i32)0x0000001f
---- VEOR ----
veor d0, d1, d2 :: Qd 0x24532453 0x24532453 Qm (i8)0x00000024 Qn (i16)0x00000077
+veor d0, d1, d2 :: Qd 0x136c1a6c 0x12681e68 Qm (i8)0x00000024 Qn (i16)0x00000077
veor d4, d6, d5 :: Qd 0xffa8ffa8 0xffa8ffa8 Qm (i8)0x000000ff Qn (i16)0x00000057
+veor d4, d6, d5 :: Qd 0x134c1a4c 0x12481e48 Qm (i8)0x000000ff Qn (i16)0x00000057
veor d10, d11, d12 :: Qd 0x13131313 0x13131313 Qm (i8)0x000000fe Qn (i8)0x000000ed
+veor d10, d11, d12 :: Qd 0xfef6f7f6 0xfff2f3f2 Qm (i8)0x000000fe Qn (i8)0x000000ed
+veor d15, d15, d15 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff Qn (i8)0x000000ff
veor d15, d15, d15 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff Qn (i8)0x000000ff
veor d0, d1, d2 :: Qd 0x24572457 0x24572457 Qm (i8)0x00000024 Qn (i16)0x00000073
+veor d0, d1, d2 :: Qd 0x13681a68 0x126c1e6c Qm (i8)0x00000024 Qn (i16)0x00000073
veor d7, d3, d0 :: Qd 0x24db24db 0x24db24db Qm (i8)0x00000024 Qn (i16)0x000000ff
+veor d7, d3, d0 :: Qd 0x13e41ae4 0x12e01ee0 Qm (i8)0x00000024 Qn (i16)0x000000ff
+veor d4, d4, d4 :: Qd 0x00000000 0x00000000 Qm (i16)0x000000ff Qn (i16)0x000000ff
veor d4, d4, d4 :: Qd 0x00000000 0x00000000 Qm (i16)0x000000ff Qn (i16)0x000000ff
veor d2, d3, d15 :: Qd 0x0000003b 0x0000003b Qm (i32)0x00000024 Qn (i32)0x0000001f
+veor d2, d3, d15 :: Qd 0x131b1a04 0x121f1e00 Qm (i32)0x00000024 Qn (i32)0x0000001f
---- VBSL ----
vbsl d0, d1, d2 :: Qd 0x04260426 0x04260426 Qm (i8)0x00000024 Qn (i16)0x00000077
+vbsl d0, d1, d2 :: Qd 0x11331033 0x10371437 Qm (i8)0x00000024 Qn (i16)0x00000077
vbsl d4, d6, d5 :: Qd 0x55575557 0x55575557 Qm (i8)0x000000ff Qn (i16)0x00000057
+vbsl d4, d6, d5 :: Qd 0x11131013 0x10171417 Qm (i8)0x000000ff Qn (i16)0x00000057
vbsl d10, d11, d12 :: Qd 0xfcfcfcfc 0xfcfcfcfc Qm (i8)0x000000fe Qn (i8)0x000000ed
+vbsl d10, d11, d12 :: Qd 0xb9b9b8b9 0xb8bdbcbd Qm (i8)0x000000fe Qn (i8)0x000000ed
+vbsl d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
vbsl d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
vbsl d0, d1, d2 :: Qd 0x04260426 0x04260426 Qm (i8)0x00000024 Qn (i16)0x00000073
+vbsl d0, d1, d2 :: Qd 0x11331033 0x10371437 Qm (i8)0x00000024 Qn (i16)0x00000073
vbsl d7, d3, d0 :: Qd 0x04ae04ae 0x04ae04ae Qm (i8)0x00000024 Qn (i16)0x000000ff
+vbsl d7, d3, d0 :: Qd 0x11bb10bb 0x10bf14bf Qm (i8)0x00000024 Qn (i16)0x000000ff
+vbsl d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vbsl d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vbsl d2, d3, d15 :: Qd 0x0000000e 0x0000000e Qm (i32)0x00000024 Qn (i32)0x0000001f
+vbsl d2, d3, d15 :: Qd 0x1111101b 0x1015141f Qm (i32)0x00000024 Qn (i32)0x0000001f
---- VBIT ----
vbit d0, d1, d2 :: Qd 0x55245524 0x55245524 Qm (i8)0x00000024 Qn (i16)0x00000077
+vbit d0, d1, d2 :: Qd 0x55135513 0x55175517 Qm (i8)0x00000024 Qn (i16)0x00000077
vbit d4, d6, d5 :: Qd 0x55575557 0x55575557 Qm (i8)0x000000ff Qn (i16)0x00000057
+vbit d4, d6, d5 :: Qd 0x55135513 0x55175517 Qm (i8)0x000000ff Qn (i16)0x00000057
vbit d10, d11, d12 :: Qd 0xfcfcfcfc 0xfcfcfcfc Qm (i8)0x000000fe Qn (i8)0x000000ed
+vbit d10, d11, d12 :: Qd 0x11191819 0x101d1c1d Qm (i8)0x000000fe Qn (i8)0x000000ed
+vbit d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
vbit d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
vbit d0, d1, d2 :: Qd 0x55245524 0x55245524 Qm (i8)0x00000024 Qn (i16)0x00000073
+vbit d0, d1, d2 :: Qd 0x55175517 0x55175517 Qm (i8)0x00000024 Qn (i16)0x00000073
vbit d7, d3, d0 :: Qd 0x55245524 0x55245524 Qm (i8)0x00000024 Qn (i16)0x000000ff
+vbit d7, d3, d0 :: Qd 0x551b551b 0x551f551f Qm (i8)0x00000024 Qn (i16)0x000000ff
+vbit d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vbit d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vbit d2, d3, d15 :: Qd 0x55555544 0x55555544 Qm (i32)0x00000024 Qn (i32)0x0000001f
+vbit d2, d3, d15 :: Qd 0x5555555b 0x5555555f Qm (i32)0x00000024 Qn (i32)0x0000001f
---- VBIF ----
vbif d0, d1, d2 :: Qd 0x24552455 0x24552455 Qm (i8)0x00000024 Qn (i16)0x00000077
+vbif d0, d1, d2 :: Qd 0x135d1a5d 0x125d1e5d Qm (i8)0x00000024 Qn (i16)0x00000077
vbif d4, d6, d5 :: Qd 0xfffdfffd 0xfffdfffd Qm (i8)0x000000ff Qn (i16)0x00000057
+vbif d4, d6, d5 :: Qd 0x135d1a5d 0x125d1e5d Qm (i8)0x000000ff Qn (i16)0x00000057
+vbif d10, d11, d12 :: Qd 0x57575757 0x57575757 Qm (i8)0x000000fe Qn (i8)0x000000ed
vbif d10, d11, d12 :: Qd 0x57575757 0x57575757 Qm (i8)0x000000fe Qn (i8)0x000000ed
vbif d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
+vbif d15, d15, d15 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff
vbif d0, d1, d2 :: Qd 0x24552455 0x24552455 Qm (i8)0x00000024 Qn (i16)0x00000073
+vbif d0, d1, d2 :: Qd 0x13591a59 0x125d1e5d Qm (i8)0x00000024 Qn (i16)0x00000073
vbif d7, d3, d0 :: Qd 0x24552455 0x24552455 Qm (i8)0x00000024 Qn (i16)0x000000ff
+vbif d7, d3, d0 :: Qd 0x13551a55 0x12551e55 Qm (i8)0x00000024 Qn (i16)0x000000ff
+vbif d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vbif d4, d4, d4 :: Qd 0x00ff00ff 0x00ff00ff Qm (i16)0x000000ff Qn (i16)0x000000ff
vbif d2, d3, d15 :: Qd 0x00000035 0x00000035 Qm (i32)0x00000024 Qn (i32)0x0000001f
+vbif d2, d3, d15 :: Qd 0x131b1a15 0x121f1e15 Qm (i32)0x00000024 Qn (i32)0x0000001f
---- VEXT ----
vext.8 d0, d1, d2, #0 :: Qd 0x77777777 0x77777777 Qm (i8)0x00000077 Qn (i8)0x000000ff
+vext.8 d0, d1, d2, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i8)0x00000077 Qn (i8)0x000000ff
vext.8 d0, d1, d2, #1 :: Qd 0xff777777 0x77777777 Qm (i8)0x00000077 Qn (i8)0x000000ff
+vext.8 d0, d1, d2, #1 :: Qd 0xff131b1a 0x1b121f1e Qm (i8)0x00000077 Qn (i8)0x000000ff
vext.8 d0, d1, d2, #7 :: Qd 0xffffffff 0xffffff77 Qm (i8)0x00000077 Qn (i8)0x000000ff
+vext.8 d0, d1, d2, #7 :: Qd 0xffffffff 0xffffff13 Qm (i8)0x00000077 Qn (i8)0x000000ff
vext.8 d0, d1, d2, #6 :: Qd 0xffffffff 0xffff7777 Qm (i8)0x00000077 Qn (i8)0x000000ff
+vext.8 d0, d1, d2, #6 :: Qd 0xffffffff 0xffff131b Qm (i8)0x00000077 Qn (i8)0x000000ff
vext.8 d10, d11, d12, #4 :: Qd 0xffffffff 0x77777777 Qm (i8)0x00000077 Qn (i8)0x000000ff
+vext.8 d10, d11, d12, #4 :: Qd 0xffffffff 0x131b1a1b Qm (i8)0x00000077 Qn (i8)0x000000ff
vext.8 d0, d5, d15, #5 :: Qd 0xffffffff 0xff777777 Qm (i8)0x00000077 Qn (i8)0x000000ff
+vext.8 d0, d5, d15, #5 :: Qd 0xffffffff 0xff131b1a Qm (i8)0x00000077 Qn (i8)0x000000ff
---- VHADD ----
vhadd.s32 d0, d1, d2 :: Qd 0x00000048 0x00000048 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhadd.s32 d0, d1, d2 :: Qd 0x098d8d49 0x090f8f4b Qm (i32)0x00000018 Qn (i32)0x00000078
vhadd.s32 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vhadd.s32 d0, d1, d2 :: Qd 0x098d8d49 0x090f8f4b Qm (i32)0x0000008c Qn (i32)0x00000078
vhadd.s16 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vhadd.s16 d0, d1, d2 :: Qd 0x098d0d49 0x090f0f4b Qm (i32)0x0000008c Qn (i32)0x00000078
vhadd.s8 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x0000008c Qn (i32)0x00000078
+vhadd.s8 d0, d1, d2 :: Qd 0x090d0d49 0x090f0f4b Qm (i32)0x0000008c Qn (i32)0x00000078
vhadd.s8 d0, d1, d2 :: Qd 0x03030303 0x03030303 Qm (i8)0x0000008d Qn (i8)0x00000079
+vhadd.s8 d0, d1, d2 :: Qd 0x464a494a 0x454c4b4c Qm (i8)0x0000008d Qn (i8)0x00000079
vhadd.s8 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vhadd.s8 d0, d1, d2 :: Qd 0xc90d0d0e 0xc90f0f10 Qm (i32)0x80000001 Qn (i32)0x80000002
vhadd.s16 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vhadd.s16 d0, d1, d2 :: Qd 0xc98d0d0e 0xc90f0f10 Qm (i32)0x80000001 Qn (i32)0x80000002
vhadd.s32 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vhadd.s32 d0, d1, d2 :: Qd 0xc98d8d0e 0xc90f8f10 Qm (i32)0x80000001 Qn (i32)0x80000002
vhadd.s32 d10, d11, d12 :: Qd 0x00000048 0x00000048 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhadd.s32 d10, d11, d12 :: Qd 0x098d8d49 0x090f8f4b Qm (i32)0x00000018 Qn (i32)0x00000078
vhadd.u32 d0, d1, d2 :: Qd 0x00000048 0x00000048 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhadd.u32 d0, d1, d2 :: Qd 0x098d8d49 0x090f8f4b Qm (i32)0x00000018 Qn (i32)0x00000078
vhadd.u32 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vhadd.u32 d0, d1, d2 :: Qd 0x098d8d49 0x090f8f4b Qm (i32)0x0000008c Qn (i32)0x00000078
vhadd.u16 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vhadd.u16 d0, d1, d2 :: Qd 0x098d0d49 0x090f0f4b Qm (i32)0x0000008c Qn (i32)0x00000078
vhadd.u8 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vhadd.u8 d0, d1, d2 :: Qd 0x090d0d49 0x090f0f4b Qm (i32)0x0000008c Qn (i32)0x00000078
vhadd.u8 d0, d1, d2 :: Qd 0x83838383 0x83838383 Qm (i8)0x0000008d Qn (i8)0x00000079
+vhadd.u8 d0, d1, d2 :: Qd 0x464a494a 0x454c4b4c Qm (i8)0x0000008d Qn (i8)0x00000079
vhadd.u8 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vhadd.u8 d0, d1, d2 :: Qd 0x490d0d0e 0x490f0f10 Qm (i32)0x80000001 Qn (i32)0x80000002
vhadd.u16 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vhadd.u16 d0, d1, d2 :: Qd 0x498d0d0e 0x490f0f10 Qm (i32)0x80000001 Qn (i32)0x80000002
vhadd.u32 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vhadd.u32 d0, d1, d2 :: Qd 0x498d8d0e 0x490f8f10 Qm (i32)0x80000001 Qn (i32)0x80000002
vhadd.u32 d10, d11, d12 :: Qd 0x00000048 0x00000048 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhadd.u32 d10, d11, d12 :: Qd 0x098d8d49 0x090f8f4b Qm (i32)0x00000018 Qn (i32)0x00000078
---- VHSUB ----
vhsub.s32 d0, d1, d2 :: Qd 0xffffffd0 0xffffffd0 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhsub.s32 d0, d1, d2 :: Qd 0x098d8cd1 0x090f8ed3 Qm (i32)0x00000018 Qn (i32)0x00000078
vhsub.s32 d0, d1, d2 :: Qd 0x0000000a 0x0000000a Qm (i32)0x0000008c Qn (i32)0x00000078
+vhsub.s32 d0, d1, d2 :: Qd 0x098d8cd1 0x090f8ed3 Qm (i32)0x0000008c Qn (i32)0x00000078
vhsub.s16 d0, d1, d2 :: Qd 0x0000000a 0x0000000a Qm (i32)0x0000008c Qn (i32)0x00000078
+vhsub.s16 d0, d1, d2 :: Qd 0x098d0cd1 0x090f0ed3 Qm (i32)0x0000008c Qn (i32)0x00000078
vhsub.s8 d0, d1, d2 :: Qd 0x0000008a 0x0000008a Qm (i32)0x0000008c Qn (i32)0x00000078
+vhsub.s8 d0, d1, d2 :: Qd 0x090d0dd1 0x090f0fd3 Qm (i32)0x0000008c Qn (i32)0x00000078
vhsub.s8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x80000002
+vhsub.s8 d0, d1, d2 :: Qd 0x490d0d0c 0x490f0f0e Qm (i32)0x80000001 Qn (i32)0x80000002
vhsub.s16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000002
+vhsub.s16 d0, d1, d2 :: Qd 0x498d0d0c 0x490f0f0e Qm (i32)0x80000001 Qn (i32)0x80000002
vhsub.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002
+vhsub.s32 d0, d1, d2 :: Qd 0x498d8d0c 0x490f8f0e Qm (i32)0x80000001 Qn (i32)0x80000002
vhsub.s32 d10, d11, d12 :: Qd 0xffffffd0 0xffffffd0 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhsub.s32 d10, d11, d12 :: Qd 0x098d8cd1 0x090f8ed3 Qm (i32)0x00000018 Qn (i32)0x00000078
vhsub.u32 d0, d1, d2 :: Qd 0xffffffd0 0xffffffd0 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhsub.u32 d0, d1, d2 :: Qd 0x098d8cd1 0x090f8ed3 Qm (i32)0x00000018 Qn (i32)0x00000078
vhsub.u32 d0, d1, d2 :: Qd 0x0000000a 0x0000000a Qm (i32)0x0000008c Qn (i32)0x00000078
+vhsub.u32 d0, d1, d2 :: Qd 0x098d8cd1 0x090f8ed3 Qm (i32)0x0000008c Qn (i32)0x00000078
vhsub.u16 d0, d1, d2 :: Qd 0x0000000a 0x0000000a Qm (i32)0x0000008c Qn (i32)0x00000078
+vhsub.u16 d0, d1, d2 :: Qd 0x098d0cd1 0x090f0ed3 Qm (i32)0x0000008c Qn (i32)0x00000078
vhsub.u8 d0, d1, d2 :: Qd 0x0000000a 0x0000000a Qm (i32)0x0000008c Qn (i32)0x00000078
+vhsub.u8 d0, d1, d2 :: Qd 0x090d0dd1 0x090f0fd3 Qm (i32)0x0000008c Qn (i32)0x00000078
vhsub.u8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x80000002
+vhsub.u8 d0, d1, d2 :: Qd 0xc90d0d0c 0xc90f0f0e Qm (i32)0x80000001 Qn (i32)0x80000002
vhsub.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000002
+vhsub.u16 d0, d1, d2 :: Qd 0xc98d0d0c 0xc90f0f0e Qm (i32)0x80000001 Qn (i32)0x80000002
vhsub.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002
+vhsub.u32 d0, d1, d2 :: Qd 0xc98d8d0c 0xc90f8f0e Qm (i32)0x80000001 Qn (i32)0x80000002
vhsub.u32 d10, d11, d12 :: Qd 0xffffffd0 0xffffffd0 Qm (i32)0x00000018 Qn (i32)0x00000078
+vhsub.u32 d10, d11, d12 :: Qd 0x098d8cd1 0x090f8ed3 Qm (i32)0x00000018 Qn (i32)0x00000078
---- VQADD ----
vqadd.s32 d0, d1, d2 :: Qd 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqadd.s32 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.s16 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s16 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.s8 d0, d1, d2 :: Qd 0x00000004 0x00000004 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s8 d0, d1, d2 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
vqadd.s8 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.s8 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.s16 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.s16 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.s32 d0, d1, d2 :: Qd 0x80000000 0x80000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.s32 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.s32 d10, d11, d12 :: Qd 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.s32 d10, d11, d12 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqadd.u32 d0, d1, d2 :: Qd 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqadd.u32 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.u16 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u16 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.u8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
+vqadd.u8 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqadd.u8 d0, d1, d2 :: Qd 0xff000003 0xff000003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.u8 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.u16 d0, d1, d2 :: Qd 0xffff0003 0xffff0003 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.u16 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqadd.u32 d0, d1, d2 :: Qd 0x931b1a1d 0x921f1e21 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqadd.u32 d10, d11, d12 :: Qd 0x00000090 0x00000090 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqadd.u32 d10, d11, d12 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
---- VQSUB ----
vqsub.s32 d0, d1, d2 :: Qd 0xffffffa0 0xffffffa0 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqsub.s32 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.s16 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s16 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.s8 d0, d1, d2 :: Qd 0x00000080 0x00000080 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
+vqsub.s8 d0, d1, d2 :: Qd 0x131b1aa3 0x121f1ea7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.s8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqsub.s8 d0, d1, d2 :: Qd 0x7f1b1a19 0x7f1f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.s16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqsub.s16 d0, d1, d2 :: Qd 0x7fff1a19 0x7fff1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqsub.s32 d0, d1, d2 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.s32 d10, d11, d12 :: Qd 0xffffffa0 0xffffffa0 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqsub.s32 d10, d11, d12 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqsub.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqsub.u32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqsub.u32 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.u16 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u16 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
vqsub.u8 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 00000000
+vqsub.u8 d0, d1, d2 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x0000008c Qn (i32)0x00000078 fpscr: 08000000
vqsub.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u8 d0, d1, d2 :: Qd 0x001b1a19 0x001f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.u16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u16 d0, d1, d2 :: Qd 0x00001a19 0x00001e1d Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
+vqsub.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 08000000
vqsub.u32 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqsub.u32 d10, d11, d12 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
---- VRHADD ----
vrhadd.s32 d0, d1, d2 :: Qd 0x00000049 0x00000049 Qm (i32)0x00000019 Qn (i32)0x00000078
+vrhadd.s32 d0, d1, d2 :: Qd 0x098d8d4a 0x090f8f4c Qm (i32)0x00000019 Qn (i32)0x00000078
vrhadd.s32 d0, d1, d2 :: Qd 0x00000049 0x00000049 Qm (i32)0x00000019 Qn (i32)0x00000079
+vrhadd.s32 d0, d1, d2 :: Qd 0x098d8d4a 0x090f8f4c Qm (i32)0x00000019 Qn (i32)0x00000079
vrhadd.s32 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vrhadd.s32 d0, d1, d2 :: Qd 0x098d8d4a 0x090f8f4c Qm (i32)0x0000008c Qn (i32)0x00000078
vrhadd.s16 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vrhadd.s16 d0, d1, d2 :: Qd 0x098e0d4a 0x09100f4c Qm (i32)0x0000008c Qn (i32)0x00000078
vrhadd.s8 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x0000008c Qn (i32)0x00000078
+vrhadd.s8 d0, d1, d2 :: Qd 0x0a0e0d4a 0x09100f4c Qm (i32)0x0000008c Qn (i32)0x00000078
vrhadd.s8 d5, d7, d5 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vrhadd.s8 d5, d7, d5 :: Qd 0xca0e0d0f 0xc9100f11 Qm (i32)0x80000001 Qn (i32)0x80000002
vrhadd.s16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vrhadd.s16 d0, d1, d2 :: Qd 0xc98e0d0f 0xc9100f11 Qm (i32)0x80000001 Qn (i32)0x80000002
vrhadd.s32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vrhadd.s32 d0, d1, d2 :: Qd 0xc98d8d0f 0xc90f8f11 Qm (i32)0x80000001 Qn (i32)0x80000002
vrhadd.s8 d5, d7, d5 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vrhadd.s8 d5, d7, d5 :: Qd 0xca0e0d0f 0xc9100f11 Qm (i32)0x80000001 Qn (i32)0x80000003
vrhadd.s16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vrhadd.s16 d0, d1, d2 :: Qd 0xc98e0d0f 0xc9100f11 Qm (i32)0x80000001 Qn (i32)0x80000003
vrhadd.s32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vrhadd.s32 d0, d1, d2 :: Qd 0xc98d8d0f 0xc90f8f11 Qm (i32)0x80000001 Qn (i32)0x80000003
vrhadd.s8 d5, d7, d5 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000004 Qn (i32)0x80000002
+vrhadd.s8 d5, d7, d5 :: Qd 0xca0e0d0f 0xc9100f11 Qm (i32)0x80000004 Qn (i32)0x80000002
vrhadd.s16 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000004 Qn (i32)0x80000002
+vrhadd.s16 d0, d1, d2 :: Qd 0xc98e0d0f 0xc9100f11 Qm (i32)0x80000004 Qn (i32)0x80000002
vrhadd.s32 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000004 Qn (i32)0x80000002
+vrhadd.s32 d0, d1, d2 :: Qd 0xc98d8d0f 0xc90f8f11 Qm (i32)0x80000004 Qn (i32)0x80000002
vrhadd.s32 d10, d11, d12 :: Qd 0x00000048 0x00000048 Qm (i32)0x00000018 Qn (i32)0x00000078
+vrhadd.s32 d10, d11, d12 :: Qd 0x098d8d4a 0x090f8f4c Qm (i32)0x00000018 Qn (i32)0x00000078
vrhadd.u32 d0, d1, d2 :: Qd 0x00000049 0x00000049 Qm (i32)0x00000019 Qn (i32)0x00000078
+vrhadd.u32 d0, d1, d2 :: Qd 0x098d8d4a 0x090f8f4c Qm (i32)0x00000019 Qn (i32)0x00000078
vrhadd.u32 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vrhadd.u32 d0, d1, d2 :: Qd 0x098d8d4a 0x090f8f4c Qm (i32)0x0000008c Qn (i32)0x00000078
vrhadd.u16 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vrhadd.u16 d0, d1, d2 :: Qd 0x098e0d4a 0x09100f4c Qm (i32)0x0000008c Qn (i32)0x00000078
vrhadd.u8 d0, d1, d2 :: Qd 0x00000082 0x00000082 Qm (i32)0x0000008c Qn (i32)0x00000078
+vrhadd.u8 d0, d1, d2 :: Qd 0x0a0e0d4a 0x09100f4c Qm (i32)0x0000008c Qn (i32)0x00000078
vrhadd.u8 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vrhadd.u8 d0, d1, d2 :: Qd 0x4a0e0d0f 0x49100f11 Qm (i32)0x80000001 Qn (i32)0x80000002
vrhadd.u16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vrhadd.u16 d0, d1, d2 :: Qd 0x498e0d0f 0x49100f11 Qm (i32)0x80000001 Qn (i32)0x80000002
vrhadd.u32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vrhadd.u32 d0, d1, d2 :: Qd 0x498d8d0f 0x490f8f11 Qm (i32)0x80000001 Qn (i32)0x80000002
vrhadd.u8 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vrhadd.u8 d0, d1, d2 :: Qd 0x4a0e0d0f 0x49100f11 Qm (i32)0x80000001 Qn (i32)0x80000003
vrhadd.u16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vrhadd.u16 d0, d1, d2 :: Qd 0x498e0d0f 0x49100f11 Qm (i32)0x80000001 Qn (i32)0x80000003
vrhadd.u32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vrhadd.u32 d0, d1, d2 :: Qd 0x498d8d0f 0x490f8f11 Qm (i32)0x80000001 Qn (i32)0x80000003
vrhadd.u8 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000004 Qn (i32)0x80000002
+vrhadd.u8 d0, d1, d2 :: Qd 0x4a0e0d0f 0x49100f11 Qm (i32)0x80000004 Qn (i32)0x80000002
vrhadd.u16 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000004 Qn (i32)0x80000002
+vrhadd.u16 d0, d1, d2 :: Qd 0x498e0d0f 0x49100f11 Qm (i32)0x80000004 Qn (i32)0x80000002
vrhadd.u32 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000004 Qn (i32)0x80000002
+vrhadd.u32 d0, d1, d2 :: Qd 0x498d8d0f 0x490f8f11 Qm (i32)0x80000004 Qn (i32)0x80000002
vrhadd.u32 d10, d11, d12 :: Qd 0x00000048 0x00000048 Qm (i32)0x00000018 Qn (i32)0x00000078
+vrhadd.u32 d10, d11, d12 :: Qd 0x098d8d4a 0x090f8f4c Qm (i32)0x00000018 Qn (i32)0x00000078
---- VCGT ----
vcgt.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000078
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000019 Qn (i32)0x00000078
vcgt.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000079
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000019 Qn (i32)0x00000079
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.s16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x0000008c Qn (i32)0x00000078
+vcgt.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.s8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x00000078
+vcgt.s8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcgt.s16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
+vcgt.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcgt.s8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
+vcgt.s8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x00000078 Qn (i32)0x00000078
vcgt.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x0000008c
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x0000008c
vcgt.s16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x0000008c
+vcgt.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x0000008c
vcgt.s8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000078 Qn (i32)0x0000008c
+vcgt.s8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x0000008c
vcgt.s8 d5, d7, d5 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcgt.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcgt.s16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcgt.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcgt.s8 d5, d7, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcgt.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcgt.s16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcgt.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcgt.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcgt.s8 d5, d7, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
+vcgt.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcgt.s16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
+vcgt.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcgt.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
+vcgt.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcgt.s32 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vcgt.s32 d10, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000078
+vcgt.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000019 Qn (i32)0x00000078
+vcgt.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x0000008c Qn (i32)0x00000078
+vcgt.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.u8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x0000008c Qn (i32)0x00000078
+vcgt.u8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x00000078
vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
+vcgt.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcgt.u16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
+vcgt.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcgt.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
+vcgt.u8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x00000078 Qn (i32)0x00000078
vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x0000008c
+vcgt.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x0000008c
vcgt.u16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x0000008c
+vcgt.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x0000008c
vcgt.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x0000008c
+vcgt.u8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x0000008c
vcgt.u8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcgt.u8 d0, d1, d2 :: Qd 0x00ffffff 0x00ffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcgt.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcgt.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcgt.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000003 Qn (i32)0x80000002
vcgt.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcgt.u8 d0, d1, d2 :: Qd 0x00ffffff 0x00ffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcgt.u16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcgt.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000003
+vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
vcgt.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
+vcgt.u8 d0, d1, d2 :: Qd 0x00ffffff 0x00ffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcgt.u16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
+vcgt.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000002 Qn (i32)0x80000002
+vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
vcgt.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
vcgt.u32 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vcgt.u32 d10, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
---- VCGE ----
vcge.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000078
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000019 Qn (i32)0x00000078
vcge.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000079
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000019 Qn (i32)0x00000079
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
+vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
+vcge.s8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x00000078
vcge.s8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x00000078
vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcge.s8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vcge.s8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x00000078 Qn (i32)0x00000078
vcge.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x0000008c
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x0000008c
vcge.s16 d0, d1, d2 :: Qd 0xffff0000 0xffff0000 Qm (i32)0x00000078 Qn (i32)0x0000008c
+vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x0000008c
vcge.s8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x0000008c
+vcge.s8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x0000008c
+vcge.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcge.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcge.s8 d5, d7, d5 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcge.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcge.s16 d0, d1, d2 :: Qd 0xffff0000 0xffff0000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcge.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcge.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
+vcge.s8 d5, d7, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
+vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcge.s16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
+vcge.s32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcge.s32 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vcge.s32 d10, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
vcge.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000019 Qn (i32)0x00000078
+vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000019 Qn (i32)0x00000078
+vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
+vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vcge.u8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
+vcge.u8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x00000078
+vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
vcge.u8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vcge.u8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x00000078 Qn (i32)0x00000078
+vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x0000008c
vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x0000008c
vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x0000008c
+vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x0000008c
vcge.u8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x0000008c
+vcge.u8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x0000008c
vcge.u8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcge.u8 d0, d1, d2 :: Qd 0x00ffffff 0x00ffffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcge.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000003 Qn (i32)0x80000002
vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000003 Qn (i32)0x80000002
+vcge.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000003 Qn (i32)0x80000002
vcge.u8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcge.u8 d0, d1, d2 :: Qd 0x00ffffff 0x00ffffff Qm (i32)0x80000001 Qn (i32)0x80000003
vcge.u16 d0, d1, d2 :: Qd 0xffff0000 0xffff0000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vcge.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000003
+vcge.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
vcge.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
vcge.u8 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
+vcge.u8 d0, d1, d2 :: Qd 0x00ffffff 0x00ffffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcge.u16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
+vcge.u16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x80000002 Qn (i32)0x80000002
vcge.u32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 Qn (i32)0x80000002
+vcge.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 Qn (i32)0x80000002
vcge.u32 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vcge.u32 d10, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
---- VSHL (register) ----
vshl.s8 d0, d1, d2 :: Qd 0x00000030 0x00000030 Qm (i32)0x00000018 Qn (i32)0x00000001
+vshl.s8 d0, d1, d2 :: Qd 0x131b1a36 0x121f1e3e Qm (i32)0x00000018 Qn (i32)0x00000001
vshl.s8 d8, d1, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000008
+vshl.s8 d8, d1, d12 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x00000018 Qn (i32)0x00000008
vshl.s8 d10, d31, d7 :: Qd 0x00000080 0x00000080 Qm (i32)0x00000018 Qn (i32)0x00000004
+vshl.s8 d10, d31, d7 :: Qd 0x131b1ab0 0x121f1ef0 Qm (i32)0x00000018 Qn (i32)0x00000004
vshl.s16 d3, d8, d11 :: Qd 0x00000038 0x00000038 Qm (i32)0x0000000e Qn (i32)0x00000002
+vshl.s16 d3, d8, d11 :: Qd 0x131b686c 0x121f787c Qm (i32)0x0000000e Qn (i32)0x00000002
vshl.s16 d5, d12, d14 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000001
+vshl.s16 d5, d12, d14 :: Qd 0x131b3436 0x121f3c3e Qm (i32)0x40000000 Qn (i32)0x00000001
vshl.s16 d15, d2, d1 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x0000000b
+vshl.s16 d15, d2, d1 :: Qd 0x131bd800 0x121ff800 Qm (i32)0x40000000 Qn (i32)0x0000000b
vshl.s32 d9, d12, d19 :: Qd 0x00000008 0x00000008 Qm (i32)0x80000002 Qn (i32)0x00000002
+vshl.s32 d9, d12, d19 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x80000002 Qn (i32)0x00000002
vshl.s32 d11, d22, d0 :: Qd 0xfffff000 0xfffff000 Qm (i32)0xffffffff Qn (i32)0x0000000c
+vshl.s32 d11, d22, d0 :: Qd 0xb1a1b000 0xf1e1f000 Qm (i32)0xffffffff Qn (i32)0x0000000c
vshl.s32 d5, d2, d3 :: Qd 0x00000000 0x00000000 Qm (i32)0x40000000 Qn (i32)0x00000015
+vshl.s32 d5, d2, d3 :: Qd 0x43600000 0xc3e00000 Qm (i32)0x40000000 Qn (i32)0x00000015
vshl.s64 d15, d12, d4 :: Qd 0x00500000 0x00500000 Qm (i32)0x00000005 Qn (i32)0x00000014
+vshl.s64 d15, d12, d4 :: Qd 0xa1b121f1 0xe1f00000 Qm (i32)0x00000005 Qn (i32)0x00000014
vshl.s64 d8, d2, d4 :: Qd 0x000000f0 0x000000f0 Qm (i32)0x0000000f Qn (i32)0x00000004
+vshl.s64 d8, d2, d4 :: Qd 0x31b1a1b1 0x21f1e1f0 Qm (i32)0x0000000f Qn (i32)0x00000004
vshl.s64 d5, d12, d4 :: Qd 0x60000000 0x40000000 Qm (i32)0x80000001 Qn (i32)0x0000001e
+vshl.s64 d5, d12, d4 :: Qd 0xc487c787 0xc0000000 Qm (i32)0x80000001 Qn (i32)0x0000001e
vshl.s64 d15, d2, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffabcd59 Qn (i32)0xabcdefab
+vshl.s64 d15, d2, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xffabcd59 Qn (i32)0xabcdefab
+vshl.s64 d8, d2, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000000f Qn (i32)0x00400bb5
vshl.s64 d8, d2, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000000f Qn (i32)0x00400bb5
vshl.s64 d5, d12, d4 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000001 Qn (i32)0x030abcff
+vshl.s64 d5, d12, d4 :: Qd 0x098d8d0d 0x890f8f0f Qm (i32)0x80000001 Qn (i32)0x030abcff
vshl.u8 d0, d1, d2 :: Qd 0x00000030 0x00000030 Qm (i32)0x00000018 Qn (i32)0x00000001
+vshl.u8 d0, d1, d2 :: Qd 0x131b1a36 0x121f1e3e Qm (i32)0x00000018 Qn (i32)0x00000001
vshl.u8 d8, d1, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000008
+vshl.u8 d8, d1, d12 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x00000018 Qn (i32)0x00000008
vshl.u8 d10, d11, d7 :: Qd 0x00000080 0x00000080 Qm (i32)0x00000018 Qn (i32)0x00000004
+vshl.u8 d10, d11, d7 :: Qd 0x131b1ab0 0x121f1ef0 Qm (i32)0x00000018 Qn (i32)0x00000004
vshl.u16 d3, d8, d11 :: Qd 0x00000038 0x00000038 Qm (i32)0x0000000e Qn (i32)0x00000002
+vshl.u16 d3, d8, d11 :: Qd 0x131b686c 0x121f787c Qm (i32)0x0000000e Qn (i32)0x00000002
vshl.u16 d5, d12, d14 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000001
+vshl.u16 d5, d12, d14 :: Qd 0x131b3436 0x121f3c3e Qm (i32)0x40000000 Qn (i32)0x00000001
vshl.u16 d15, d2, d1 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x0000000b
+vshl.u16 d15, d2, d1 :: Qd 0x131bd800 0x121ff800 Qm (i32)0x40000000 Qn (i32)0x0000000b
vshl.u32 d9, d12, d15 :: Qd 0x00000008 0x00000008 Qm (i32)0x80000002 Qn (i32)0x00000002
+vshl.u32 d9, d12, d15 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x80000002 Qn (i32)0x00000002
vshl.u32 d11, d2, d0 :: Qd 0xfffff000 0xfffff000 Qm (i32)0xffffffff Qn (i32)0x0000000c
+vshl.u32 d11, d2, d0 :: Qd 0xb1a1b000 0xf1e1f000 Qm (i32)0xffffffff Qn (i32)0x0000000c
vshl.u32 d5, d2, d3 :: Qd 0x00000000 0x00000000 Qm (i32)0x40000000 Qn (i32)0x00000015
+vshl.u32 d5, d2, d3 :: Qd 0x43600000 0xc3e00000 Qm (i32)0x40000000 Qn (i32)0x00000015
vshl.u64 d15, d12, d4 :: Qd 0x00500000 0x00500000 Qm (i32)0x00000005 Qn (i32)0x00000014
+vshl.u64 d15, d12, d4 :: Qd 0xa1b121f1 0xe1f00000 Qm (i32)0x00000005 Qn (i32)0x00000014
vshl.u64 d8, d2, d4 :: Qd 0x000000f0 0x000000f0 Qm (i32)0x0000000f Qn (i32)0x00000004
+vshl.u64 d8, d2, d4 :: Qd 0x31b1a1b1 0x21f1e1f0 Qm (i32)0x0000000f Qn (i32)0x00000004
vshl.u64 d5, d12, d4 :: Qd 0x60000000 0x40000000 Qm (i32)0x80000001 Qn (i32)0x0000001e
+vshl.u64 d5, d12, d4 :: Qd 0xc487c787 0xc0000000 Qm (i32)0x80000001 Qn (i32)0x0000001e
+vshl.u64 d15, d2, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xffabcd59 Qn (i32)0xabcdefab
vshl.u64 d15, d2, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xffabcd59 Qn (i32)0xabcdefab
vshl.u64 d8, d2, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000000f Qn (i32)0x00400bb5
+vshl.u64 d8, d2, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000000f Qn (i32)0x00400bb5
vshl.u64 d5, d12, d4 :: Qd 0x40000000 0xc0000000 Qm (i32)0x80000001 Qn (i32)0x030abcff
+vshl.u64 d5, d12, d4 :: Qd 0x098d8d0d 0x890f8f0f Qm (i32)0x80000001 Qn (i32)0x030abcff
---- VQSHL (register) ----
vqshl.s64 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.s64 d0, d1, d2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqshl.s64 d3, d4, d5 :: Qd 0xffffff03 0xffffff02 Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.s64 d3, d4, d5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqshl.s64 d3, d4, d5 :: Qd 0xfffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.s64 d3, d4, d5 :: Qd 0x02636343 0x6243e3c3 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.s64 d0, d1, d2 :: Qd 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqshl.s64 d0, d1, d2 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqshl.s64 d13, d14, d31 :: Qd 0xffffffff 0xfffffbff Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqshl.s64 d13, d14, d31 :: Qd 0x00000004 0xc6c686c4 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqshl.s64 d7, d8, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.s64 d7, d8, d2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.s32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.s32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.s32 d2, d8, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqshl.s32 d2, d8, d4 :: Qd 0x0131b1a1 0x0121f1e1 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqshl.s32 d12, d11, d13 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqshl.s32 d12, d11, d13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqshl.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqshl.s32 d0, d1, d2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqshl.s32 d9, d30, d11 :: Qd 0xc0000004 0xc0000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.s32 d9, d30, d11 :: Qd 0x098d8d0d 0x090f8f0f Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqshl.s32 d13, d3, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqshl.s32 d13, d3, d5 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 08000000
vqshl.s16 d11, d10, d2 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.s16 d11, d10, d2 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.s16 d3, d14, d7 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.s16 d3, d14, d7 :: Qd 0x098d0343 0x090f03c3 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.s16 d0, d11, d2 :: Qd 0xc0000080 0xc0000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.s16 d0, d11, d2 :: Qd 0x098d0d0d 0x090f0f0f Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqshl.s16 d1, d2, d3 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.s16 d1, d2, d3 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.s16 d3, d4, d5 :: Qd 0xd0000000 0xd0000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqshl.s16 d3, d4, d5 :: Qd 0x098d0000 0x090f0000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqshl.s16 d0, d15, d2 :: Qd 0x00007fff 0x00007fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqshl.s16 d0, d15, d2 :: Qd 0x131b7fff 0x121f7fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqshl.s8 d2, d7, d11 :: Qd 0xffffff80 0xffffff80 Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqshl.s8 d2, d7, d11 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqshl.s8 d13, d1, d2 :: Qd 0xffffff80 0xffffff80 Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqshl.s8 d13, d1, d2 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqshl.s8 d3, d7, d5 :: Qd 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqshl.s8 d3, d7, d5 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 08000000
vqshl.s8 d10, d11, d12 :: Qd 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqshl.s8 d10, d11, d12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqshl.s8 d6, d7, d8 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqshl.s8 d6, d7, d8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqshl.s8 d10, d11, d12 :: Qd 0x0000007f 0x0000007f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqshl.s8 d10, d11, d12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
vqshl.u64 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqshl.u64 d0, d1, d2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqshl.u64 d3, d4, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 08000000
+vqshl.u64 d3, d4, d5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqshl.u64 d3, d4, d5 :: Qd 0x1ffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.u64 d3, d4, d5 :: Qd 0x02636343 0x6243e3c3 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.u64 d0, d1, d2 :: Qd 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqshl.u64 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqshl.u64 d13, d14, d15 :: Qd 0x0000003f 0xfffffbff Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqshl.u64 d13, d14, d15 :: Qd 0x00000004 0xc6c686c4 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqshl.u64 d7, d8, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.u64 d7, d8, d2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqshl.u32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.u32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqshl.u32 d2, d8, d4 :: Qd 0x0fffffff 0x0fffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqshl.u32 d2, d8, d4 :: Qd 0x0131b1a1 0x0121f1e1 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqshl.u32 d12, d31, d13 :: Qd 0x007fffff 0x007fffff Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqshl.u32 d12, d31, d13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqshl.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqshl.u32 d0, d1, d2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqshl.u32 d9, d10, d11 :: Qd 0x40000004 0x40000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.u32 d9, d10, d11 :: Qd 0x098d8d0d 0x090f8f0f Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqshl.u32 d13, d3, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqshl.u32 d13, d3, d5 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
vqshl.u16 d11, d10, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.u16 d11, d10, d2 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.u16 d3, d14, d7 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqshl.u16 d3, d14, d7 :: Qd 0x098d0343 0x090f03c3 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqshl.u16 d0, d11, d2 :: Qd 0x40000080 0x40000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqshl.u16 d0, d11, d2 :: Qd 0x098d0d0d 0x090f0f0f Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqshl.u16 d1, d2, d3 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqshl.u16 d1, d2, d3 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqshl.u16 d3, d4, d5 :: Qd 0x50000000 0x50000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqshl.u16 d3, d4, d5 :: Qd 0x098d0000 0x090f0000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqshl.u16 d0, d15, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqshl.u16 d0, d15, d2 :: Qd 0x131bffff 0x121fffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqshl.u8 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqshl.u8 d2, d7, d11 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqshl.u8 d13, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqshl.u8 d13, d1, d2 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqshl.u8 d3, d7, d5 :: Qd 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqshl.u8 d3, d7, d5 :: Qd 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
vqshl.u8 d10, d11, d12 :: Qd 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqshl.u8 d10, d11, d12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqshl.u8 d6, d7, d8 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqshl.u8 d6, d7, d8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqshl.u8 d10, d11, d12 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqshl.u8 d10, d11, d12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
---- VQSHL / VQSHLU (immediate) ----
vqshl.s64 d0, d1, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.s64 d0, d1, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.s64 d31, d30, #1 :: Qd 0xffffff03 0xffffff02 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s64 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.s64 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s64 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s64 d5, d4, #63 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s64 d5, d4, #63 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s64 d5, d4, #60 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s64 d5, d4, #60 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s64 d5, d4, #59 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s64 d5, d4, #59 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s64 d5, d4, #58 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s64 d5, d4, #58 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s64 d5, d4, #17 :: Qd 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.s64 d5, d4, #17 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s64 d5, d4, #63 :: Qd 0x80000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s64 d5, d4, #63 :: Qd 0x7fffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.s64 d5, d4, #60 :: Qd 0xf0000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s64 d5, d4, #60 :: Qd 0x7fffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.s64 d5, d4, #7 :: Qd 0x80000000 0x00000000 Qm (i32)0x80000002 fpscr 08000000
+vqshl.s64 d5, d4, #7 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshl.s32 d10, d11, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.s32 d10, d11, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.s32 d31, d30, #1 :: Qd 0xffffff02 0xffffff02 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s32 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.s32 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s32 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s32 d5, d4, #31 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s32 d5, d4, #31 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s32 d5, d4, #28 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s32 d5, d4, #28 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s32 d5, d4, #27 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s32 d5, d4, #27 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s32 d5, d4, #26 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.s32 d5, d4, #26 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s32 d5, d4, #17 :: Qd 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.s32 d5, d4, #17 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.s32 d5, d4, #31 :: Qd 0x80000000 0x80000000 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s32 d5, d4, #31 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.s32 d5, d4, #29 :: Qd 0xe0000000 0xe0000000 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s32 d5, d4, #29 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.s32 d5, d4, #7 :: Qd 0x80000000 0x80000000 Qm (i32)0x80000002 fpscr 08000000
+vqshl.s32 d5, d4, #7 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x80000002 fpscr 08000000
vqshl.s16 d9, d8, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.s16 d9, d8, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.s16 d31, d30, #1 :: Qd 0xfffeff02 0xfffeff02 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s16 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.s16 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s16 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshl.s16 d9, d8, #15 :: Qd 0x00007fff 0x00007fff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s16 d9, d8, #15 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr 08000000
vqshl.s16 d5, d4, #12 :: Qd 0x00007fff 0x00007fff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s16 d5, d4, #12 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr 08000000
vqshl.s16 d5, d4, #11 :: Qd 0x00007fff 0x00007fff Qm (i32)0x00000010 fpscr 08000000
+vqshl.s16 d5, d4, #11 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr 08000000
vqshl.s16 d5, d4, #10 :: Qd 0x00004000 0x00004000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.s16 d5, d4, #10 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr 08000000
vqshl.s16 d5, d4, #4 :: Qd 0x00000100 0x00000100 Qm (i32)0x00000010 fpscr 00000000
+vqshl.s16 d5, d4, #4 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x00000010 fpscr 08000000
vqshl.s16 d5, d4, #15 :: Qd 0x80008000 0x80008000 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s16 d5, d4, #15 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff fpscr 08000000
vqshl.s16 d5, d4, #12 :: Qd 0xf000f000 0xf000f000 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s16 d5, d4, #12 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff fpscr 08000000
vqshl.s16 d5, d4, #7 :: Qd 0x80000100 0x80000100 Qm (i32)0x80000002 fpscr 08000000
+vqshl.s16 d5, d4, #7 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x80000002 fpscr 08000000
vqshl.s8 d0, d1, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.s8 d0, d1, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.s8 d31, d30, #1 :: Qd 0xfefefe80 0xfefefe80 Qm (i32)0xffffff81 fpscr 08000000
+vqshl.s8 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.s8 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.s8 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshl.s8 d5, d4, #7 :: Qd 0x0000007f 0x0000007f Qm (i32)0x00000010 fpscr 08000000
+vqshl.s8 d5, d4, #7 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x00000010 fpscr 08000000
vqshl.s8 d25, d4, #4 :: Qd 0x0000007f 0x0000007f Qm (i32)0x00000010 fpscr 08000000
+vqshl.s8 d25, d4, #4 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x00000010 fpscr 08000000
vqshl.s8 d5, d4, #3 :: Qd 0x0000007f 0x0000007f Qm (i32)0x00000010 fpscr 08000000
+vqshl.s8 d5, d4, #3 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x00000010 fpscr 08000000
vqshl.s8 d5, d4, #2 :: Qd 0x00000040 0x00000040 Qm (i32)0x00000010 fpscr 00000000
+vqshl.s8 d5, d4, #2 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x00000010 fpscr 00000000
vqshl.s8 d5, d4, #1 :: Qd 0x00000020 0x00000020 Qm (i32)0x00000010 fpscr 00000000
+vqshl.s8 d5, d4, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000010 fpscr 00000000
vqshl.s8 d5, d4, #7 :: Qd 0x80808080 0x80808080 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s8 d5, d4, #7 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff fpscr 08000000
vqshl.s8 d5, d4, #5 :: Qd 0xe0e0e0e0 0xe0e0e0e0 Qm (i32)0xffffffff fpscr 00000000
+vqshl.s8 d5, d4, #5 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff fpscr 08000000
vqshl.s8 d5, d4, #2 :: Qd 0x80000008 0x80000008 Qm (i32)0x80000002 fpscr 08000000
+vqshl.s8 d5, d4, #2 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x80000002 fpscr 00000000
vqshl.u64 d0, d1, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.u64 d0, d1, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.u64 d31, d30, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr 08000000
+vqshl.u64 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.u64 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.u64 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshl.u64 d5, d4, #63 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u64 d5, d4, #63 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u64 d5, d4, #60 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u64 d5, d4, #60 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u64 d5, d4, #59 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u64 d5, d4, #59 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u64 d5, d4, #58 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u64 d5, d4, #58 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u64 d5, d4, #17 :: Qd 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u64 d5, d4, #17 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u64 d5, d4, #63 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u64 d5, d4, #63 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u64 d5, d4, #60 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u64 d5, d4, #60 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u64 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
+vqshl.u64 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshl.u32 d10, d11, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.u32 d10, d11, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.u32 d31, d30, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr 08000000
+vqshl.u32 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.u32 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.u32 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
+vqshl.u32 d5, d4, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u32 d5, d4, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u32 d5, d4, #28 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u32 d5, d4, #28 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u32 d5, d4, #27 :: Qd 0x80000000 0x80000000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u32 d5, d4, #27 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u32 d5, d4, #26 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u32 d5, d4, #26 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u32 d5, d4, #17 :: Qd 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u32 d5, d4, #17 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u32 d5, d4, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u32 d5, d4, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u32 d5, d4, #29 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u32 d5, d4, #29 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u32 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshl.u32 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshl.u16 d9, d8, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.u16 d9, d8, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.u16 d31, d30, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr 08000000
+vqshl.u16 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.u16 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.u16 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshl.u16 d9, d8, #15 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u16 d9, d8, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u16 d5, d4, #12 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u16 d5, d4, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u16 d5, d4, #11 :: Qd 0x00008000 0x00008000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u16 d5, d4, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u16 d5, d4, #10 :: Qd 0x00004000 0x00004000 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u16 d5, d4, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u16 d5, d4, #4 :: Qd 0x00000100 0x00000100 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u16 d5, d4, #4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u16 d5, d4, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u16 d5, d4, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u16 d5, d4, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u16 d5, d4, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u16 d5, d4, #7 :: Qd 0xffff0100 0xffff0100 Qm (i32)0x80000002 fpscr 08000000
+vqshl.u16 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshl.u8 d0, d1, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshl.u8 d0, d1, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshl.u8 d31, d30, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff81 fpscr 08000000
+vqshl.u8 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshl.u8 d5, d4, #0 :: Qd 0xffffff81 0xffffff81 Qm (i32)0xffffff81 fpscr 00000000
+vqshl.u8 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshl.u8 d5, d4, #7 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u8 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u8 d5, d4, #4 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr 08000000
+vqshl.u8 d5, d4, #4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshl.u8 d5, d4, #3 :: Qd 0x00000080 0x00000080 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u8 d5, d4, #3 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x00000010 fpscr 00000000
vqshl.u8 d5, d4, #2 :: Qd 0x00000040 0x00000040 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u8 d5, d4, #2 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x00000010 fpscr 00000000
vqshl.u8 d5, d4, #1 :: Qd 0x00000020 0x00000020 Qm (i32)0x00000010 fpscr 00000000
+vqshl.u8 d5, d4, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000010 fpscr 00000000
vqshl.u8 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u8 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshl.u8 d5, d4, #5 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u8 d5, d4, #5 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshl.u8 d5, d4, #2 :: Qd 0xff000008 0xff000008 Qm (i32)0x80000002 fpscr 08000000
+vqshl.u8 d5, d4, #2 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x80000002 fpscr 00000000
vqshlu.s64 d0, d1, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshlu.s64 d0, d1, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshlu.s64 d31, d30, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s64 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s64 d5, d4, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s64 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s64 d5, d4, #63 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s64 d5, d4, #63 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s64 d5, d4, #60 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s64 d5, d4, #60 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s64 d5, d4, #59 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s64 d5, d4, #59 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s64 d5, d4, #58 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s64 d5, d4, #58 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s64 d5, d4, #17 :: Qd 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s64 d5, d4, #17 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s64 d5, d4, #63 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s64 d5, d4, #63 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s64 d5, d4, #60 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s64 d5, d4, #60 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s64 d5, d4, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 fpscr 08000000
+vqshlu.s64 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshlu.s32 d10, d11, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshlu.s32 d10, d11, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshlu.s32 d31, d30, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s32 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s32 d5, d4, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s32 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s32 d5, d4, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s32 d5, d4, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s32 d25, d24, #28 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s32 d25, d24, #28 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s32 d5, d4, #27 :: Qd 0x80000000 0x80000000 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s32 d5, d4, #27 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s32 d5, d4, #26 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s32 d5, d4, #26 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s32 d5, d4, #17 :: Qd 0x00200000 0x00200000 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s32 d5, d4, #17 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s32 d5, d24, #31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s32 d5, d24, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s32 d5, d4, #29 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s32 d5, d4, #29 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s32 d5, d4, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000002 fpscr 08000000
+vqshlu.s32 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshlu.s16 d9, d8, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshlu.s16 d9, d8, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshlu.s16 d31, d30, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s16 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s16 d5, d4, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s16 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s16 d9, d8, #15 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s16 d9, d8, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s16 d5, d4, #12 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s16 d5, d4, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s16 d5, d4, #11 :: Qd 0x00008000 0x00008000 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s16 d5, d4, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s16 d5, d4, #10 :: Qd 0x00004000 0x00004000 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s16 d5, d4, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s16 d5, d4, #4 :: Qd 0x00000100 0x00000100 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s16 d5, d4, #4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s16 d15, d14, #15 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s16 d15, d14, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s16 d5, d4, #12 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s16 d5, d4, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s16 d5, d4, #7 :: Qd 0x00000100 0x00000100 Qm (i32)0x80000002 fpscr 08000000
+vqshlu.s16 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000002 fpscr 08000000
vqshlu.s8 d0, d1, #1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 fpscr 00000000
+vqshlu.s8 d0, d1, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 fpscr 00000000
vqshlu.s8 d31, d30, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s8 d31, d30, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s8 d5, d4, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff81 fpscr 08000000
+vqshlu.s8 d5, d4, #0 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff81 fpscr 00000000
vqshlu.s8 d5, d4, #7 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s8 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s8 d5, d4, #4 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000010 fpscr 08000000
+vqshlu.s8 d5, d4, #4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 fpscr 08000000
vqshlu.s8 d5, d4, #3 :: Qd 0x00000080 0x00000080 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s8 d5, d4, #3 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x00000010 fpscr 00000000
vqshlu.s8 d5, d4, #2 :: Qd 0x00000040 0x00000040 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s8 d5, d4, #2 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x00000010 fpscr 00000000
vqshlu.s8 d5, d4, #1 :: Qd 0x00000020 0x00000020 Qm (i32)0x00000010 fpscr 00000000
+vqshlu.s8 d5, d4, #1 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000010 fpscr 00000000
vqshlu.s8 d5, d4, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s8 d5, d4, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s8 d5, d4, #5 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshlu.s8 d5, d4, #5 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshlu.s8 d5, d4, #2 :: Qd 0x00000008 0x00000008 Qm (i32)0x80000002 fpscr 08000000
+vqshlu.s8 d5, d4, #2 :: Qd 0x4c6c686c 0x487c787c Qm (i32)0x80000002 fpscr 00000000
---- VQRSHL (register) ----
vqrshl.s64 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.s64 d0, d1, d2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.s64 d3, d4, d5 :: Qd 0xffffff03 0xffffff02 Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.s64 d3, d4, d5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.s64 d3, d4, d5 :: Qd 0xfffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.s64 d3, d4, d5 :: Qd 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.s64 d0, d1, d2 :: Qd 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqrshl.s64 d0, d1, d2 :: Qd 0x7fffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqrshl.s64 d13, d14, d15 :: Qd 0xffffffff 0xfffffc00 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqrshl.s64 d13, d14, d15 :: Qd 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqrshl.s64 d7, d8, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.s64 d7, d8, d2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.s32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.s32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.s32 d2, d8, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqrshl.s32 d2, d8, d4 :: Qd 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqrshl.s32 d12, d11, d13 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqrshl.s32 d12, d11, d13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqrshl.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqrshl.s32 d0, d1, d2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqrshl.s32 d9, d10, d11 :: Qd 0xc0000004 0xc0000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 d9, d10, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 d13, d3, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.s32 d13, d3, d5 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 08000000
vqrshl.s16 d11, d10, d2 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.s16 d11, d10, d2 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.s16 d3, d14, d7 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.s16 d3, d14, d7 :: Qd 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.s16 d0, d31, d2 :: Qd 0xc0000080 0xc0000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 d0, d31, d2 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 d1, d2, d3 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.s16 d1, d2, d3 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.s16 d3, d4, d5 :: Qd 0xd0000000 0xd0000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqrshl.s16 d3, d4, d5 :: Qd 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqrshl.s16 d0, d15, d2 :: Qd 0x00007fff 0x00007fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.s16 d0, d15, d2 :: Qd 0x131b7fff 0x121f7fff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqrshl.s8 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s8 d2, d7, d11 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 d2, d7, d11 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 d2, d7, d11 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s8 d2, d7, d11 :: Qd 0x000000ff 0x000000ff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s16 d2, d7, d11 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s32 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.s32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.s8 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s8 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.s16 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s16 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.s32 d2, d7, d31 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.s32 d2, d7, d31 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.s8 d2, d7, d11 :: Qd 0xffffff80 0xffffff80 Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqrshl.s8 d2, d7, d11 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqrshl.s8 d13, d1, d2 :: Qd 0xffffff80 0xffffff80 Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.s8 d13, d1, d2 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqrshl.s8 d3, d7, d5 :: Qd 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.s8 d3, d7, d5 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 08000000
vqrshl.s8 d10, d11, d12 :: Qd 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqrshl.s8 d10, d11, d12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqrshl.s8 d6, d7, d8 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqrshl.s8 d6, d7, d8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqrshl.s8 d10, d11, d12 :: Qd 0x0000007f 0x0000007f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqrshl.s8 d10, d11, d12 :: Qd 0x131b1a7f 0x121f1e7f Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
vqrshl.u64 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
+vqrshl.u64 d0, d1, d2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.u64 d3, d4, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 08000000
+vqrshl.u64 d3, d4, d5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001 fpscr: 00000000
vqrshl.u64 d3, d4, d5 :: Qd 0x1ffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.u64 d3, d4, d5 :: Qd 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.u64 d0, d1, d2 :: Qd 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 00000000
+vqrshl.u64 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000010 Qn (i32)0x0000000e fpscr: 08000000
vqrshl.u64 d13, d14, d15 :: Qd 0x0000003f 0xfffffc00 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
+vqrshl.u64 d13, d14, d15 :: Qd 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6 fpscr: 00000000
vqrshl.u64 d7, d8, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.u64 d7, d8, d2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4 fpscr: 00000000
+vqrshl.u32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.u32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2 fpscr: 00000000
vqrshl.u32 d2, d8, d4 :: Qd 0x0fffffff 0x0fffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
+vqrshl.u32 d2, d8, d4 :: Qd 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc fpscr: 00000000
vqrshl.u32 d12, d11, d13 :: Qd 0x00800000 0x00800000 Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
+vqrshl.u32 d12, d11, d13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7 fpscr: 00000000
vqrshl.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
+vqrshl.u32 d0, d1, d2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9 fpscr: 00000000
vqrshl.u32 d9, d10, d11 :: Qd 0x40000004 0x40000004 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 d9, d10, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u32 d13, d3, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.u32 d13, d3, d5 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003 fpscr: 00000000
vqrshl.u16 d11, d10, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.u16 d11, d10, d2 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.u16 d3, d14, d7 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
+vqrshl.u16 d3, d14, d7 :: Qd 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd fpscr: 00000000
vqrshl.u16 d0, d31, d2 :: Qd 0x40000080 0x40000080 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 d0, d31, d2 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u16 d1, d2, d3 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
+vqrshl.u16 d1, d2, d3 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1 fpscr: 00000000
vqrshl.u16 d3, d4, d5 :: Qd 0x50000000 0x50000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
+vqrshl.u16 d3, d4, d5 :: Qd 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3 fpscr: 00000000
vqrshl.u16 d0, d15, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.u16 d0, d15, d2 :: Qd 0x131bffff 0x121fffff Qm (i32)0x00000001 Qn (i32)0x0000001e fpscr: 08000000
vqrshl.u8 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
+vqrshl.u8 d2, d7, d11 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xffffffff Qn (i32)0x00000028 fpscr: 08000000
vqrshl.u8 d2, d7, d11 :: Qd 0x80808080 0x80808080 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u8 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u16 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u32 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u8 d2, d7, d11 :: Qd 0x8080807f 0x8080807f Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u16 d2, d7, d11 :: Qd 0x80007fff 0x80007fff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u32 d2, d7, d11 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
+vqrshl.u32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff fpscr: 00000000
vqrshl.u8 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u8 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.u16 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u16 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.u32 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
+vqrshl.u32 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000 fpscr: 00000000
vqrshl.u8 d13, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
+vqrshl.u8 d13, d1, d2 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0xfffffffc Qn (i32)0x0000001e fpscr: 08000000
vqrshl.u8 d3, d7, d5 :: Qd 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
+vqrshl.u8 d3, d7, d5 :: Qd 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003 fpscr: 00000000
vqrshl.u8 d10, d11, d12 :: Qd 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 00000000
+vqrshl.u8 d10, d11, d12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00010000 Qn (i32)0x00000010 fpscr: 08000000
vqrshl.u8 d6, d7, d8 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
+vqrshl.u8 d6, d7, d8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002 fpscr: 00000000
vqrshl.u8 d10, d11, d12 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
+vqrshl.u8 d10, d11, d12 :: Qd 0x131b1aff 0x121f1eff Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 08000000
---- VRSHL (register) ----
vrshl.s64 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001
+vrshl.s64 d0, d1, d2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001
vrshl.s64 d3, d4, d5 :: Qd 0xffffff03 0xffffff02 Qm (i32)0xffffff81 Qn (i32)0x00000001
+vrshl.s64 d3, d4, d5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001
vrshl.s64 d3, d4, d5 :: Qd 0xfffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd
+vrshl.s64 d3, d4, d5 :: Qd 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd
vrshl.s64 d0, d1, d2 :: Qd 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e
+vrshl.s64 d0, d1, d2 :: Qd 0xc686c487 0xc787c000 Qm (i32)0x00000010 Qn (i32)0x0000000e
vrshl.s64 d13, d14, d15 :: Qd 0xffffffff 0xfffffc00 Qm (i32)0xffffffef Qn (i32)0xffffffe6
+vrshl.s64 d13, d14, d15 :: Qd 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6
vrshl.s64 d7, d8, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4
+vrshl.s64 d7, d8, d2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4
+vrshl.s32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2
vrshl.s32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2
vrshl.s32 d2, d8, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc
+vrshl.s32 d2, d8, d4 :: Qd 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc
vrshl.s32 d12, d11, d13 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff88 Qn (i32)0xfffffff7
+vrshl.s32 d12, d11, d13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7
vrshl.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9
+vrshl.s32 d0, d1, d2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9
vrshl.s32 d9, d10, d11 :: Qd 0xc0000004 0xc0000004 Qm (i32)0x80000008 Qn (i32)0xffffffff
+vrshl.s32 d9, d10, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff
vrshl.s32 d13, d3, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003
+vrshl.s32 d13, d3, d5 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003
vrshl.s16 d11, d10, d2 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1
+vrshl.s16 d11, d10, d2 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1
vrshl.s16 d3, d14, d7 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd
+vrshl.s16 d3, d14, d7 :: Qd 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd
vrshl.s16 d0, d11, d2 :: Qd 0xc0000080 0xc0000080 Qm (i32)0x80000100 Qn (i32)0xffffffff
+vrshl.s16 d0, d11, d2 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff
vrshl.s16 d1, d2, d3 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1
+vrshl.s16 d1, d2, d3 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1
vrshl.s16 d3, d4, d5 :: Qd 0xd0000000 0xd0000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3
+vrshl.s16 d3, d4, d5 :: Qd 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3
vrshl.s16 d0, d15, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001 Qn (i32)0x0000001e
+vrshl.s16 d0, d15, d2 :: Qd 0x131b0000 0x121f0000 Qm (i32)0x00000001 Qn (i32)0x0000001e
vrshl.s8 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff
+vrshl.s8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff
vrshl.s16 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff
+vrshl.s16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff
vrshl.s32 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff
+vrshl.s32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff
vrshl.s8 d2, d7, d31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff
+vrshl.s8 d2, d7, d31 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff
vrshl.s16 d2, d7, d31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff
+vrshl.s16 d2, d7, d31 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff
vrshl.s32 d2, d7, d31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff Qn (i32)0xffffffff
+vrshl.s32 d2, d7, d31 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xffffffff Qn (i32)0xffffffff
vrshl.s8 d2, d7, d11 :: Qd 0x000000ff 0x000000ff Qm (i32)0xfffffffe Qn (i32)0xffffffff
+vrshl.s8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff
vrshl.s16 d2, d7, d11 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0xfffffffe Qn (i32)0xffffffff
+vrshl.s16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff
vrshl.s32 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffffe Qn (i32)0xffffffff
+vrshl.s32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff
vrshl.s8 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000
+vrshl.s8 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000
vrshl.s16 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000
+vrshl.s16 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000
vrshl.s32 d2, d7, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff Qn (i32)0x00000000
+vrshl.s32 d2, d7, d11 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff Qn (i32)0x00000000
vrshl.s8 d2, d7, d11 :: Qd 0xffffff00 0xffffff00 Qm (i32)0xffffffff Qn (i32)0x00000028
+vrshl.s8 d2, d7, d11 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0xffffffff Qn (i32)0x00000028
vrshl.s8 d13, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0xfffffffc Qn (i32)0x0000001e
+vrshl.s8 d13, d1, d2 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0xfffffffc Qn (i32)0x0000001e
vrshl.s8 d3, d7, d5 :: Qd 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003
+vrshl.s8 d3, d7, d5 :: Qd 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003
vrshl.s8 d10, d11, d12 :: Qd 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010
+vrshl.s8 d10, d11, d12 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x00010000 Qn (i32)0x00000010
vrshl.s8 d6, d7, d8 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002
+vrshl.s8 d6, d7, d8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002
vrshl.s8 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vrshl.s8 d10, d11, d12 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x00000018 Qn (i32)0x00000078
vrshl.u64 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000001 Qn (i32)0x00000001
+vrshl.u64 d0, d1, d2 :: Qd 0x26363436 0x243e3c3e Qm (i32)0x00000001 Qn (i32)0x00000001
vrshl.u64 d3, d4, d5 :: Qd 0xffffff03 0xffffff02 Qm (i32)0xffffff81 Qn (i32)0x00000001
+vrshl.u64 d3, d4, d5 :: Qd 0x26363436 0x243e3c3e Qm (i32)0xffffff81 Qn (i32)0x00000001
vrshl.u64 d3, d4, d5 :: Qd 0x1ffffff0 0x3ffffff0 Qm (i32)0xffffff81 Qn (i32)0xfffffffd
+vrshl.u64 d3, d4, d5 :: Qd 0x02636343 0x6243e3c4 Qm (i32)0xffffff81 Qn (i32)0xfffffffd
vrshl.u64 d0, d1, d2 :: Qd 0x00040000 0x00040000 Qm (i32)0x00000010 Qn (i32)0x0000000e
+vrshl.u64 d0, d1, d2 :: Qd 0xc686c487 0xc787c000 Qm (i32)0x00000010 Qn (i32)0x0000000e
vrshl.u64 d13, d14, d15 :: Qd 0x0000003f 0xfffffc00 Qm (i32)0xffffffef Qn (i32)0xffffffe6
+vrshl.u64 d13, d14, d15 :: Qd 0x00000004 0xc6c686c5 Qm (i32)0xffffffef Qn (i32)0xffffffe6
vrshl.u64 d7, d8, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0xffffffc4
+vrshl.u64 d7, d8, d2 :: Qd 0x00000000 0x00000001 Qm (i32)0x00000018 Qn (i32)0xffffffc4
+vrshl.u32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2
vrshl.u32 d3, d4, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000007f Qn (i32)0xffffffe2
vrshl.u32 d2, d8, d4 :: Qd 0x0fffffff 0x0fffffff Qm (i32)0xfffffff5 Qn (i32)0xfffffffc
+vrshl.u32 d2, d8, d4 :: Qd 0x0131b1a2 0x0121f1e2 Qm (i32)0xfffffff5 Qn (i32)0xfffffffc
vrshl.u32 d12, d11, d13 :: Qd 0x00800000 0x00800000 Qm (i32)0xffffff88 Qn (i32)0xfffffff7
+vrshl.u32 d12, d11, d13 :: Qd 0x00098d8d 0x00090f8f Qm (i32)0xffffff88 Qn (i32)0xfffffff7
vrshl.u32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000022 Qn (i32)0xfffffff9
+vrshl.u32 d0, d1, d2 :: Qd 0x00263634 0x00243e3c Qm (i32)0x00000022 Qn (i32)0xfffffff9
vrshl.u32 d9, d10, d11 :: Qd 0x40000004 0x40000004 Qm (i32)0x80000008 Qn (i32)0xffffffff
+vrshl.u32 d9, d10, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x80000008 Qn (i32)0xffffffff
vrshl.u32 d13, d3, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x08000000 Qn (i32)0x00000003
+vrshl.u32 d13, d3, d5 :: Qd 0x98d8d0d8 0x90f8f0f8 Qm (i32)0x08000000 Qn (i32)0x00000003
vrshl.u16 d11, d10, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xffffffe1
+vrshl.u16 d11, d10, d2 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0xffffffe1
vrshl.u16 d3, d14, d7 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000000 Qn (i32)0xfffffffd
+vrshl.u16 d3, d14, d7 :: Qd 0x098e0343 0x091003c4 Qm (i32)0x80000000 Qn (i32)0xfffffffd
vrshl.u16 d0, d31, d2 :: Qd 0x40000080 0x40000080 Qm (i32)0x80000100 Qn (i32)0xffffffff
+vrshl.u16 d0, d31, d2 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000100 Qn (i32)0xffffffff
vrshl.u16 d1, d2, d3 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000100 Qn (i32)0xffffffe1
+vrshl.u16 d1, d2, d3 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000100 Qn (i32)0xffffffe1
vrshl.u16 d3, d4, d5 :: Qd 0x50000000 0x50000000 Qm (i32)0xa0000000 Qn (i32)0xfffffff3
+vrshl.u16 d3, d4, d5 :: Qd 0x098e0001 0x09100001 Qm (i32)0xa0000000 Qn (i32)0xfffffff3
vrshl.u16 d0, d15, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001 Qn (i32)0x0000001e
+vrshl.u16 d0, d15, d2 :: Qd 0x131b0000 0x121f0000 Qm (i32)0x00000001 Qn (i32)0x0000001e
vrshl.u8 d2, d7, d11 :: Qd 0xffffff00 0xffffff00 Qm (i32)0xffffffff Qn (i32)0x00000028
+vrshl.u8 d2, d7, d11 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0xffffffff Qn (i32)0x00000028
vrshl.u8 d2, d7, d11 :: Qd 0x80808080 0x80808080 Qm (i32)0xffffffff Qn (i32)0xffffffff
+vrshl.u8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff
vrshl.u8 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff
+vrshl.u8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff
vrshl.u16 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff
+vrshl.u16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x0000000f Qn (i32)0xffffffff
vrshl.u32 d2, d7, d11 :: Qd 0x00000008 0x00000008 Qm (i32)0x0000000f Qn (i32)0xffffffff
+vrshl.u32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0x0000000f Qn (i32)0xffffffff
vrshl.u8 d2, d7, d11 :: Qd 0x80808080 0x80808080 Qm (i32)0xffffffff Qn (i32)0xffffffff
+vrshl.u8 d2, d7, d11 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff
vrshl.u16 d2, d7, d11 :: Qd 0x80008000 0x80008000 Qm (i32)0xffffffff Qn (i32)0xffffffff
+vrshl.u16 d2, d7, d11 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xffffffff Qn (i32)0xffffffff
vrshl.u32 d2, d7, d11 :: Qd 0x80000000 0x80000000 Qm (i32)0xffffffff Qn (i32)0xffffffff
+vrshl.u32 d2, d7, d11 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xffffffff Qn (i32)0xffffffff
vrshl.u8 d2, d7, d31 :: Qd 0x8080807f 0x8080807f Qm (i32)0xfffffffe Qn (i32)0xffffffff
+vrshl.u8 d2, d7, d31 :: Qd 0x0a0e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff
vrshl.u16 d2, d7, d31 :: Qd 0x80007fff 0x80007fff Qm (i32)0xfffffffe Qn (i32)0xffffffff
+vrshl.u16 d2, d7, d31 :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff
vrshl.u32 d2, d7, d31 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xfffffffe Qn (i32)0xffffffff
+vrshl.u32 d2, d7, d31 :: Qd 0x098d8d0e 0x090f8f10 Qm (i32)0xfffffffe Qn (i32)0xffffffff
vrshl.u8 d13, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0xfffffffc Qn (i32)0x0000001e
+vrshl.u8 d13, d1, d2 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0xfffffffc Qn (i32)0x0000001e
vrshl.u8 d3, d7, d5 :: Qd 0x80000058 0x80000058 Qm (i32)0x8000000b Qn (i32)0x00000003
+vrshl.u8 d3, d7, d5 :: Qd 0x131b1ad8 0x121f1ef8 Qm (i32)0x8000000b Qn (i32)0x00000003
vrshl.u8 d10, d11, d12 :: Qd 0x00010000 0x00010000 Qm (i32)0x00010000 Qn (i32)0x00000010
+vrshl.u8 d10, d11, d12 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x00010000 Qn (i32)0x00000010
vrshl.u8 d6, d7, d8 :: Qd 0x40000000 0x40000000 Qm (i32)0x40000000 Qn (i32)0x00000002
+vrshl.u8 d6, d7, d8 :: Qd 0x131b1a6c 0x121f1e7c Qm (i32)0x40000000 Qn (i32)0x00000002
vrshl.u8 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vrshl.u8 d10, d11, d12 :: Qd 0x131b1a00 0x121f1e00 Qm (i32)0x00000018 Qn (i32)0x00000078
---- VMAX (integer) ----
vmax.s32 d0, d1, d2 :: Qd 0x00000079 0x00000079 Qm (i32)0x00000019 Qn (i32)0x00000079
+vmax.s32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000019 Qn (i32)0x00000079
vmax.s32 d0, d1, d2 :: Qd 0x000000fa 0x000000fa Qm (i32)0x000000fa Qn (i32)0x00000079
+vmax.s32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x000000fa Qn (i32)0x00000079
vmax.s32 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
+vmax.s32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x0000008c Qn (i32)0x0000008c
vmax.s16 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x00000078
+vmax.s16 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x0000008c Qn (i32)0x00000078
vmax.s8 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000078 Qn (i32)0x00000078
+vmax.s8 d0, d1, d2 :: Qd 0x131b1a78 0x121f1e78 Qm (i32)0x00000078 Qn (i32)0x00000078
vmax.s8 d5, d7, d5 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmax.s8 d5, d7, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vmax.s16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmax.s16 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vmax.s32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmax.s32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vmax.s8 d5, d7, d5 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmax.s8 d5, d7, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vmax.s16 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmax.s16 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vmax.s32 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmax.s32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vmax.s8 d5, d7, d5 :: Qd 0x80000004 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmax.s8 d5, d7, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vmax.s16 d0, d1, d2 :: Qd 0x80000004 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmax.s16 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vmax.s32 d0, d1, d2 :: Qd 0x80000004 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmax.s32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vmax.s32 d10, d11, d12 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmax.s32 d10, d11, d12 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000018 Qn (i32)0x00000078
vmax.u32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000019 Qn (i32)0x00000078
+vmax.u32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000019 Qn (i32)0x00000078
vmax.u32 d0, d1, d2 :: Qd 0x000000fa 0x000000fa Qm (i32)0x000000fa Qn (i32)0x00000078
+vmax.u32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x000000fa Qn (i32)0x00000078
vmax.u32 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
+vmax.u32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x0000008c Qn (i32)0x0000008c
vmax.u16 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x00000078
+vmax.u16 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x0000008c Qn (i32)0x00000078
vmax.u8 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000078 Qn (i32)0x00000078
+vmax.u8 d0, d1, d2 :: Qd 0x131b1a78 0x121f1e78 Qm (i32)0x00000078 Qn (i32)0x00000078
vmax.u8 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmax.u8 d0, d1, d2 :: Qd 0x801b1a1b 0x801f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vmax.u16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmax.u16 d0, d1, d2 :: Qd 0x80001a1b 0x80001e1f Qm (i32)0x80000001 Qn (i32)0x80000002
+vmax.u32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
vmax.u32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
vmax.u8 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmax.u8 d0, d1, d2 :: Qd 0x801b1a1b 0x801f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vmax.u16 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmax.u16 d0, d1, d2 :: Qd 0x80001a1b 0x80001e1f Qm (i32)0x80000001 Qn (i32)0x80000003
+vmax.u32 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
vmax.u32 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
vmax.u8 d0, d1, d2 :: Qd 0x80000004 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmax.u8 d0, d1, d2 :: Qd 0x801b1a1b 0x801f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vmax.u16 d0, d1, d2 :: Qd 0x80000004 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmax.u16 d0, d1, d2 :: Qd 0x80001a1b 0x80001e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vmax.u32 d0, d1, d2 :: Qd 0x80000004 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmax.u32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
vmax.u32 d10, d11, d12 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmax.u32 d10, d11, d12 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000018 Qn (i32)0x00000078
---- VMIN (integer) ----
vmin.s32 d0, d1, d2 :: Qd 0x00000019 0x00000019 Qm (i32)0x00000019 Qn (i32)0x00000079
+vmin.s32 d0, d1, d2 :: Qd 0x00000079 0x00000079 Qm (i32)0x00000019 Qn (i32)0x00000079
vmin.s32 d0, d1, d2 :: Qd 0x00000079 0x00000079 Qm (i32)0x000000fa Qn (i32)0x00000079
+vmin.s32 d0, d1, d2 :: Qd 0x00000079 0x00000079 Qm (i32)0x000000fa Qn (i32)0x00000079
+vmin.s32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x0000008c Qn (i32)0x00000078
vmin.s32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x0000008c Qn (i32)0x00000078
vmin.s16 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000078 Qn (i32)0x00000078
+vmin.s16 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000078 Qn (i32)0x00000078
+vmin.s8 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
vmin.s8 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
vmin.s8 d5, d7, d5 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmin.s8 d5, d7, d5 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
vmin.s16 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmin.s16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
vmin.s32 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmin.s32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
vmin.s8 d5, d7, d5 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmin.s8 d5, d7, d5 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
vmin.s16 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmin.s16 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
vmin.s32 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmin.s32 d0, d1, d2 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000003
vmin.s8 d5, d7, d5 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmin.s8 d5, d7, d5 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmin.s16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
vmin.s16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
vmin.s32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmin.s32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
vmin.s32 d10, d11, d12 :: Qd 0x00000018 0x00000018 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmin.s32 d10, d11, d12 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000018 Qn (i32)0x00000078
vmin.u32 d0, d1, d2 :: Qd 0x00000019 0x00000019 Qm (i32)0x00000019 Qn (i32)0x00000078
+vmin.u32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000019 Qn (i32)0x00000078
+vmin.u32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x000000fa Qn (i32)0x00000078
vmin.u32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x000000fa Qn (i32)0x00000078
vmin.u32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x0000008c Qn (i32)0x00000078
+vmin.u32 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x0000008c Qn (i32)0x00000078
+vmin.u16 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000078 Qn (i32)0x00000078
vmin.u16 d0, d1, d2 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000078 Qn (i32)0x00000078
vmin.u8 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
+vmin.u8 d0, d1, d2 :: Qd 0x0000001b 0x0000001f Qm (i32)0x0000008c Qn (i32)0x0000008c
vmin.u8 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmin.u8 d0, d1, d2 :: Qd 0x13000002 0x12000002 Qm (i32)0x80000001 Qn (i32)0x80000002
vmin.u16 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmin.u16 d0, d1, d2 :: Qd 0x131b0002 0x121f0002 Qm (i32)0x80000001 Qn (i32)0x80000002
vmin.u32 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmin.u32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vmin.u8 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmin.u8 d0, d1, d2 :: Qd 0x13000003 0x12000003 Qm (i32)0x80000001 Qn (i32)0x80000003
vmin.u16 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmin.u16 d0, d1, d2 :: Qd 0x131b0003 0x121f0003 Qm (i32)0x80000001 Qn (i32)0x80000003
vmin.u32 d0, d1, d2 :: Qd 0x80000001 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vmin.u32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vmin.u8 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmin.u8 d0, d1, d2 :: Qd 0x13000002 0x12000002 Qm (i32)0x80000004 Qn (i32)0x80000002
vmin.u16 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmin.u16 d0, d1, d2 :: Qd 0x131b0002 0x121f0002 Qm (i32)0x80000004 Qn (i32)0x80000002
vmin.u32 d0, d1, d2 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vmin.u32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vmin.u32 d10, d11, d12 :: Qd 0x00000018 0x00000018 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmin.u32 d10, d11, d12 :: Qd 0x00000078 0x00000078 Qm (i32)0x00000018 Qn (i32)0x00000078
---- VABD ----
vabd.s32 d0, d1, d2 :: Qd 0x0000005f 0x0000005f Qm (i32)0x00000019 Qn (i32)0x00000078
+vabd.s32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000019 Qn (i32)0x00000078
vabd.s32 d0, d1, d2 :: Qd 0x00000060 0x00000060 Qm (i32)0x00000019 Qn (i32)0x00000079
+vabd.s32 d0, d1, d2 :: Qd 0x131b19a2 0x121f1da6 Qm (i32)0x00000019 Qn (i32)0x00000079
vabd.s32 d0, d1, d2 :: Qd 0x00000104 0x00000104 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vabd.s32 d0, d1, d2 :: Qd 0x131b1a93 0x121f1e97 Qm (i32)0x0000008c Qn (i32)0xffffff88
vabd.s16 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vabd.s16 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078
vabd.s8 d0, d1, d2 :: Qd 0x000000ec 0x000000ec Qm (i32)0x0000008c Qn (i32)0x00000078
+vabd.s8 d0, d1, d2 :: Qd 0x131b1a5d 0x121f1e59 Qm (i32)0x0000008c Qn (i32)0x00000078
vabd.s8 d5, d7, d5 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vabd.s8 d5, d7, d5 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vabd.s8 d5, d7, d5 :: Qd 0x7f010101 0x7f010101 Qm (i32)0xffffff01 Qn (i32)0x80000002
+vabd.s8 d5, d7, d5 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0xffffff01 Qn (i32)0x80000002
vabd.s8 d5, d7, d5 :: Qd 0x7f010137 0x7f010137 Qm (i32)0x80000001 Qn (i32)0xffffff38
+vabd.s8 d5, d7, d5 :: Qd 0x141c1b1d 0x13201f19 Qm (i32)0x80000001 Qn (i32)0xffffff38
vabd.s16 d0, d1, d2 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vabd.s16 d0, d1, d2 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vabd.s32 d0, d1, d2 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vabd.s32 d0, d1, d2 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vabd.s8 d5, d7, d5 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vabd.s8 d5, d7, d5 :: Qd 0x931b1a18 0x921f1e1c Qm (i32)0x80000001 Qn (i32)0x80000003
vabd.s16 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vabd.s16 d0, d1, d2 :: Qd 0x931b1a18 0x921f1e1c Qm (i32)0x80000001 Qn (i32)0x80000003
vabd.s32 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vabd.s32 d0, d1, d2 :: Qd 0x931b1a18 0x921f1e1c Qm (i32)0x80000001 Qn (i32)0x80000003
vabd.s8 d5, d7, d5 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vabd.s8 d5, d7, d5 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000004 Qn (i32)0x80000002
vabd.s16 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vabd.s16 d0, d1, d2 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000004 Qn (i32)0x80000002
vabd.s32 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vabd.s32 d0, d1, d2 :: Qd 0x931b1a19 0x921f1e1d Qm (i32)0x80000004 Qn (i32)0x80000002
vabd.s32 d10, d11, d12 :: Qd 0x00000060 0x00000060 Qm (i32)0x00000018 Qn (i32)0x00000078
+vabd.s32 d10, d11, d12 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078
vabd.u32 d0, d1, d2 :: Qd 0x0000005f 0x0000005f Qm (i32)0x00000019 Qn (i32)0x00000078
+vabd.u32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000019 Qn (i32)0x00000078
vabd.u32 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vabd.u32 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x0000008c Qn (i32)0x00000078
vabd.u16 d0, d1, d2 :: Qd 0xfffffefc 0xfffffefc Qm (i32)0xffffff74 Qn (i32)0x00000078
+vabd.u16 d0, d1, d2 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0xffffff74 Qn (i32)0x00000078
vabd.u8 d0, d1, d2 :: Qd 0x00000014 0x00000014 Qm (i32)0x0000008c Qn (i32)0x00000078
+vabd.u8 d0, d1, d2 :: Qd 0x131b1a5d 0x121f1e59 Qm (i32)0x0000008c Qn (i32)0x00000078
vabd.u8 d5, d7, d5 :: Qd 0x7fffff01 0x7fffff01 Qm (i32)0xffffff01 Qn (i32)0x80000002
+vabd.u8 d5, d7, d5 :: Qd 0x6d1b1a19 0x6e1f1e1d Qm (i32)0xffffff01 Qn (i32)0x80000002
vabd.u8 d5, d7, d5 :: Qd 0x7fffff37 0x7fffff37 Qm (i32)0x80000001 Qn (i32)0xffffff38
+vabd.u8 d5, d7, d5 :: Qd 0xece4e51d 0xede0e119 Qm (i32)0x80000001 Qn (i32)0xffffff38
vabd.u8 d0, d1, d2 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vabd.u8 d0, d1, d2 :: Qd 0x6d1b1a19 0x6e1f1e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vabd.u16 d0, d1, d2 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vabd.u16 d0, d1, d2 :: Qd 0x6ce51a19 0x6de11e1d Qm (i32)0x80000001 Qn (i32)0x80000002
vabd.u32 d0, d1, d2 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vabd.u32 d0, d1, d2 :: Qd 0x6ce4e5e7 0x6de0e1e3 Qm (i32)0x80000001 Qn (i32)0x80000002
vabd.u8 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vabd.u8 d0, d1, d2 :: Qd 0x6d1b1a18 0x6e1f1e1c Qm (i32)0x80000001 Qn (i32)0x80000003
vabd.u16 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vabd.u16 d0, d1, d2 :: Qd 0x6ce51a18 0x6de11e1c Qm (i32)0x80000001 Qn (i32)0x80000003
vabd.u32 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000001 Qn (i32)0x80000003
+vabd.u32 d0, d1, d2 :: Qd 0x6ce4e5e8 0x6de0e1e4 Qm (i32)0x80000001 Qn (i32)0x80000003
vabd.u8 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vabd.u8 d0, d1, d2 :: Qd 0x6d1b1a19 0x6e1f1e1d Qm (i32)0x80000004 Qn (i32)0x80000002
vabd.u16 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vabd.u16 d0, d1, d2 :: Qd 0x6ce51a19 0x6de11e1d Qm (i32)0x80000004 Qn (i32)0x80000002
vabd.u32 d0, d1, d2 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000004 Qn (i32)0x80000002
+vabd.u32 d0, d1, d2 :: Qd 0x6ce4e5e7 0x6de0e1e3 Qm (i32)0x80000004 Qn (i32)0x80000002
vabd.u32 d10, d11, d12 :: Qd 0x00000060 0x00000060 Qm (i32)0x00000018 Qn (i32)0x00000078
+vabd.u32 d10, d11, d12 :: Qd 0x131b19a3 0x121f1da7 Qm (i32)0x00000018 Qn (i32)0x00000078
---- VABA ----
vaba.s32 d0, d1, d2 :: Qd 0x555555b4 0x555555b4 Qm (i32)0x00000019 Qn (i32)0x00000078
+vaba.s32 d0, d1, d2 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x00000019 Qn (i32)0x00000078
vaba.s32 d0, d1, d2 :: Qd 0x555555b5 0x555555b5 Qm (i32)0x00000019 Qn (i32)0x00000079
+vaba.s32 d0, d1, d2 :: Qd 0x68706ef7 0x677472fb Qm (i32)0x00000019 Qn (i32)0x00000079
vaba.s32 d0, d1, d2 :: Qd 0x55555569 0x55555569 Qm (i32)0x0000008c Qn (i32)0x00000078
+vaba.s32 d0, d1, d2 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x0000008c Qn (i32)0x00000078
vaba.s16 d0, d1, d2 :: Qd 0x55555569 0x55555569 Qm (i32)0x0000008c Qn (i32)0x00000078
+vaba.s16 d0, d1, d2 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x0000008c Qn (i32)0x00000078
vaba.s8 d0, d1, d2 :: Qd 0x55555541 0x55555541 Qm (i32)0x0000008c Qn (i32)0x00000078
+vaba.s8 d0, d1, d2 :: Qd 0x68706fb2 0x677473ae Qm (i32)0x0000008c Qn (i32)0x00000078
vaba.s8 d5, d7, d5 :: Qd 0x80000003 0x80000003 Qm (i32)0x80000001 Qn (i32)0x80000002
+vaba.s8 d5, d7, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vaba.s8 d5, d7, d5 :: Qd 0xff010103 0xff010103 Qm (i32)0xffffff01 Qn (i32)0x80000002
+vaba.s8 d5, d7, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffff01 Qn (i32)0x80000002
vaba.s8 d5, d7, d5 :: Qd 0x7e00006f 0x7e00006f Qm (i32)0x80000001 Qn (i32)0xffffff38
+vaba.s8 d5, d7, d5 :: Qd 0x131b1a55 0x121f1e51 Qm (i32)0x80000001 Qn (i32)0xffffff38
vaba.s16 d0, d1, d2 :: Qd 0x55555556 0x55555556 Qm (i32)0x80000001 Qn (i32)0x80000002
+vaba.s16 d0, d1, d2 :: Qd 0xe8706f6e 0xe7747372 Qm (i32)0x80000001 Qn (i32)0x80000002
vaba.s32 d0, d1, d2 :: Qd 0x55555556 0x55555556 Qm (i32)0x80000001 Qn (i32)0x80000002
+vaba.s32 d0, d1, d2 :: Qd 0xe8706f6e 0xe7747372 Qm (i32)0x80000001 Qn (i32)0x80000002
vaba.s8 d5, d7, d5 :: Qd 0x80000005 0x80000005 Qm (i32)0x80000001 Qn (i32)0x80000003
+vaba.s8 d5, d7, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vaba.s16 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000001 Qn (i32)0x80000003
+vaba.s16 d0, d1, d2 :: Qd 0xe8706f6d 0xe7747371 Qm (i32)0x80000001 Qn (i32)0x80000003
vaba.s32 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000001 Qn (i32)0x80000003
+vaba.s32 d0, d1, d2 :: Qd 0xe8706f6d 0xe7747371 Qm (i32)0x80000001 Qn (i32)0x80000003
vaba.s8 d5, d7, d5 :: Qd 0x80000004 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vaba.s8 d5, d7, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vaba.s16 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000004 Qn (i32)0x80000002
+vaba.s16 d0, d1, d2 :: Qd 0xe8706f6e 0xe7747372 Qm (i32)0x80000004 Qn (i32)0x80000002
vaba.s32 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000004 Qn (i32)0x80000002
+vaba.s32 d0, d1, d2 :: Qd 0xe8706f6e 0xe7747372 Qm (i32)0x80000004 Qn (i32)0x80000002
vaba.s32 d10, d11, d12 :: Qd 0x555555b5 0x555555b5 Qm (i32)0x00000018 Qn (i32)0x00000078
+vaba.s32 d10, d11, d12 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x00000018 Qn (i32)0x00000078
vaba.u32 d0, d1, d2 :: Qd 0x555555b4 0x555555b4 Qm (i32)0x00000019 Qn (i32)0x00000078
+vaba.u32 d0, d1, d2 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x00000019 Qn (i32)0x00000078
vaba.u32 d0, d1, d2 :: Qd 0x55555569 0x55555569 Qm (i32)0x0000008c Qn (i32)0x00000078
+vaba.u32 d0, d1, d2 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x0000008c Qn (i32)0x00000078
vaba.u16 d0, d1, d2 :: Qd 0x55555569 0x55555569 Qm (i32)0x0000008c Qn (i32)0x00000078
+vaba.u16 d0, d1, d2 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x0000008c Qn (i32)0x00000078
vaba.u8 d0, d1, d2 :: Qd 0x55555569 0x55555569 Qm (i32)0x0000008c Qn (i32)0x00000078
+vaba.u8 d0, d1, d2 :: Qd 0x68706fb2 0x677473ae Qm (i32)0x0000008c Qn (i32)0x00000078
vaba.u8 d5, d7, d5 :: Qd 0xffffff03 0xffffff03 Qm (i32)0xffffff01 Qn (i32)0x80000002
+vaba.u8 d5, d7, d5 :: Qd 0xed1b1a1b 0xee1f1e1f Qm (i32)0xffffff01 Qn (i32)0x80000002
vaba.u8 d5, d7, d5 :: Qd 0x7efefe6f 0x7efefe6f Qm (i32)0x80000001 Qn (i32)0xffffff38
+vaba.u8 d5, d7, d5 :: Qd 0xebe3e455 0xecdfe051 Qm (i32)0x80000001 Qn (i32)0xffffff38
vaba.u8 d0, d1, d2 :: Qd 0x55555556 0x55555556 Qm (i32)0x80000001 Qn (i32)0x80000002
+vaba.u8 d0, d1, d2 :: Qd 0xc2706f6e 0xc3747372 Qm (i32)0x80000001 Qn (i32)0x80000002
vaba.u16 d0, d1, d2 :: Qd 0x55555556 0x55555556 Qm (i32)0x80000001 Qn (i32)0x80000002
+vaba.u16 d0, d1, d2 :: Qd 0xc23a6f6e 0xc3367372 Qm (i32)0x80000001 Qn (i32)0x80000002
vaba.u32 d0, d1, d2 :: Qd 0x55555556 0x55555556 Qm (i32)0x80000001 Qn (i32)0x80000002
+vaba.u32 d0, d1, d2 :: Qd 0xc23a3b3c 0xc3363738 Qm (i32)0x80000001 Qn (i32)0x80000002
vaba.u8 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000001 Qn (i32)0x80000003
+vaba.u8 d0, d1, d2 :: Qd 0xc2706f6d 0xc3747371 Qm (i32)0x80000001 Qn (i32)0x80000003
vaba.u16 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000001 Qn (i32)0x80000003
+vaba.u16 d0, d1, d2 :: Qd 0xc23a6f6d 0xc3367371 Qm (i32)0x80000001 Qn (i32)0x80000003
vaba.u32 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000001 Qn (i32)0x80000003
+vaba.u32 d0, d1, d2 :: Qd 0xc23a3b3d 0xc3363739 Qm (i32)0x80000001 Qn (i32)0x80000003
vaba.u8 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000004 Qn (i32)0x80000002
+vaba.u8 d0, d1, d2 :: Qd 0xc2706f6e 0xc3747372 Qm (i32)0x80000004 Qn (i32)0x80000002
vaba.u16 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000004 Qn (i32)0x80000002
+vaba.u16 d0, d1, d2 :: Qd 0xc23a6f6e 0xc3367372 Qm (i32)0x80000004 Qn (i32)0x80000002
vaba.u32 d0, d1, d2 :: Qd 0x55555557 0x55555557 Qm (i32)0x80000004 Qn (i32)0x80000002
+vaba.u32 d0, d1, d2 :: Qd 0xc23a3b3c 0xc3363738 Qm (i32)0x80000004 Qn (i32)0x80000002
vaba.u32 d10, d11, d12 :: Qd 0x555555b5 0x555555b5 Qm (i32)0x00000018 Qn (i32)0x00000078
+vaba.u32 d10, d11, d12 :: Qd 0x68706ef8 0x677472fc Qm (i32)0x00000018 Qn (i32)0x00000078
---- VTST ----
vtst.32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
+vtst.32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
+vtst.32 d3, d4, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vtst.32 d3, d4, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0x00000078
vtst.16 d6, d7, d8 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vtst.16 d6, d7, d8 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vtst.8 d9, d10, d12 :: Qd 0x000000ff 0x000000ff Qm (i32)0x0000008c Qn (i32)0x00000078
vtst.8 d9, d10, d12 :: Qd 0x000000ff 0x000000ff Qm (i32)0x0000008c Qn (i32)0x00000078
vtst.8 d0, d1, d2 :: Qd 0xff000000 0xff000000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vtst.8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x80000002
vtst.16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00004001 Qn (i32)0x00004001
+vtst.16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00004001 Qn (i32)0x00004001
+vtst.32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002
vtst.32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002
vtst.8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x00000002
+vtst.8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x00000002
+vtst.16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00004001 Qn (i32)0x00004001
vtst.16 d0, d1, d2 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00004001 Qn (i32)0x00004001
vtst.32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001 Qn (i32)0x80000002
+vtst.32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000001 Qn (i32)0x80000002
+vtst.32 d10, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
vtst.32 d10, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000018 Qn (i32)0x00000078
---- VCEQ ----
vceq.i32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vceq.i32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vceq.i32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x00000078
vceq.i32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x00000078
vceq.i16 d6, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000078 Qn (i32)0x00000078
+vceq.i16 d6, d7, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
vceq.i8 d9, d10, d12 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x0000008c Qn (i32)0x00000078
+vceq.i8 d9, d10, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0x00000078
vceq.i8 d0, d1, d2 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x80000001 Qn (i32)0x80000002
+vceq.i8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002
vceq.i16 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00004001 Qn (i32)0x00004001
+vceq.i16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00004001 Qn (i32)0x00004001
+vceq.i32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002
vceq.i32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002
vceq.i8 d0, d1, d2 :: Qd 0x00ffff00 0x00ffff00 Qm (i32)0x80000001 Qn (i32)0x00000002
+vceq.i8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x00000002
vceq.i16 d0, d1, d2 :: Qd 0xffff0000 0xffff0000 Qm (i32)0x00000001 Qn (i32)0x00004001
+vceq.i16 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001 Qn (i32)0x00004001
+vceq.i32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001 Qn (i32)0x80000002
vceq.i32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001 Qn (i32)0x80000002
vceq.i32 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
+vceq.i32 d10, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078
---- VMLA ----
vmla.i32 d0, d1, d2 :: Qd 0x55554a15 0x55554a15 Qm (i32)0xffffffe8 Qn (i32)0x00000078
+vmla.i32 d0, d1, d2 :: Qd 0x4a0991fd 0xd3eb73dd Qm (i32)0xffffffe8 Qn (i32)0x00000078
vmla.i32 d6, d7, d8 :: Qd 0x555596f5 0x555596f5 Qm (i32)0x0000008c Qn (i32)0x00000078
+vmla.i32 d6, d7, d8 :: Qd 0x4a0991fd 0xd3eb73dd Qm (i32)0x0000008c Qn (i32)0x00000078
vmla.i16 d9, d11, d12 :: Qd 0x5555bd55 0x5555bd55 Qm (i32)0x00000140 Qn (i32)0x00000120
+vmla.i16 d9, d11, d12 :: Qd 0x5555b3b5 0x55553835 Qm (i32)0x00000140 Qn (i32)0x00000120
vmla.i8 d0, d1, d2 :: Qd 0x555555b5 0x555555b5 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmla.i8 d0, d1, d2 :: Qd 0x423a3bad 0x433637cd Qm (i32)0x0000008c Qn (i32)0xffffff88
vmla.i8 d10, d11, d12 :: Qd 0x5555559f 0x5555559f Qm (i32)0x00000021 Qn (i32)0x0000000a
+vmla.i8 d10, d11, d12 :: Qd 0x55555563 0x5555558b Qm (i32)0x00000021 Qn (i32)0x0000000a
vmla.i16 d4, d5, d6 :: Qd 0x5555f557 0x5555f557 Qm (i32)0x00004001 Qn (i32)0x00002002
+vmla.i16 d4, d5, d6 :: Qd 0x5555e98b 0x55557193 Qm (i32)0x00004001 Qn (i32)0x00002002
vmla.i32 d7, d8, d9 :: Qd 0xd5555557 0xd5555557 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmla.i32 d7, d8, d9 :: Qd 0xfb8b898b 0xf9939193 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.i8 d10, d13, d12 :: Qd 0x5555559f 0x5555559f Qm (i32)0x00000021 Qn (i32)0x0000000a
+vmla.i8 d10, d13, d12 :: Qd 0x55555563 0x5555558b Qm (i32)0x00000021 Qn (i32)0x0000000a
vmla.i16 d4, d5, d6 :: Qd 0x55551751 0x55551751 Qm (i32)0x100000fe Qn (i32)0x00002002
+vmla.i16 d4, d5, d6 :: Qd 0x5555e98b 0x55557193 Qm (i32)0x100000fe Qn (i32)0x00002002
vmla.i32 d7, d8, d9 :: Qd 0xd5555557 0xd5555557 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmla.i32 d7, d8, d9 :: Qd 0xfb8b898b 0xf9939193 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.i32 d10, d11, d15 :: Qd 0x55554a15 0x55554a15 Qm (i32)0x00000018 Qn (i32)0xffffff88
+vmla.i32 d10, d11, d15 :: Qd 0x60a118ad 0xd6bf36cd Qm (i32)0x00000018 Qn (i32)0xffffff88
---- VMLS ----
vmls.i32 d0, d1, d2 :: Qd 0x55556095 0x55556095 Qm (i32)0xffffffe8 Qn (i32)0x00000078
+vmls.i32 d0, d1, d2 :: Qd 0x60a118ad 0xd6bf36cd Qm (i32)0xffffffe8 Qn (i32)0x00000078
vmls.i32 d6, d7, d8 :: Qd 0x555596f5 0x555596f5 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmls.i32 d6, d7, d8 :: Qd 0x4a0991fd 0xd3eb73dd Qm (i32)0x0000008c Qn (i32)0xffffff88
vmls.i16 d9, d11, d12 :: Qd 0x5555ed55 0x5555ed55 Qm (i32)0x00000140 Qn (i32)0x00000120
+vmls.i16 d9, d11, d12 :: Qd 0x5555f6f5 0x55557275 Qm (i32)0x00000140 Qn (i32)0x00000120
vmls.i8 d0, d1, d2 :: Qd 0x555555b5 0x555555b5 Qm (i32)0x0000008c Qn (i32)0x00000078
+vmls.i8 d0, d1, d2 :: Qd 0x555555ad 0x555555cd Qm (i32)0x0000008c Qn (i32)0x00000078
vmls.i8 d10, d11, d12 :: Qd 0x5555550b 0x5555550b Qm (i32)0x00000021 Qn (i32)0x0000000a
+vmls.i8 d10, d11, d12 :: Qd 0x55555547 0x5555551f Qm (i32)0x00000021 Qn (i32)0x0000000a
vmls.i16 d4, d5, d6 :: Qd 0x5555b553 0x5555b553 Qm (i32)0x00004001 Qn (i32)0x00002002
+vmls.i16 d4, d5, d6 :: Qd 0x5555c11f 0x55553917 Qm (i32)0x00004001 Qn (i32)0x00002002
vmls.i32 d7, d8, d9 :: Qd 0xd5555553 0xd5555553 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmls.i32 d7, d8, d9 :: Qd 0xaf1f211f 0xb1171917 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.i8 d10, d13, d12 :: Qd 0x5555550b 0x5555550b Qm (i32)0x00000021 Qn (i32)0x0000000a
+vmls.i8 d10, d13, d12 :: Qd 0x55555547 0x5555551f Qm (i32)0x00000021 Qn (i32)0x0000000a
vmls.i16 d4, d5, d6 :: Qd 0x55559359 0x55559359 Qm (i32)0x100000fe Qn (i32)0x00002002
+vmls.i16 d4, d5, d6 :: Qd 0x5555c11f 0x55553917 Qm (i32)0x100000fe Qn (i32)0x00002002
vmls.i32 d7, d8, d9 :: Qd 0xd5555553 0xd5555553 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmls.i32 d7, d8, d9 :: Qd 0xaf1f211f 0xb1171917 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.i32 d10, d11, d15 :: Qd 0x55556095 0x55556095 Qm (i32)0xffffffe8 Qn (i32)0x00000078
+vmls.i32 d10, d11, d15 :: Qd 0x60a118ad 0xd6bf36cd Qm (i32)0xffffffe8 Qn (i32)0x00000078
---- VMUL ----
vmul.i32 d0, d1, d2 :: Qd 0x00000b40 0x00000b40 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmul.i32 d0, d1, d2 :: Qd 0xf4b43ca8 0x7e961e88 Qm (i32)0x00000018 Qn (i32)0x00000078
vmul.i32 d6, d7, d8 :: Qd 0xffffbe60 0xffffbe60 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmul.i32 d6, d7, d8 :: Qd 0x0b4bc358 0x8169e178 Qm (i32)0x0000008c Qn (i32)0xffffff88
vmul.i16 d9, d11, d12 :: Qd 0x00006800 0x00006800 Qm (i32)0x00000140 Qn (i32)0x00000120
+vmul.i16 d9, d11, d12 :: Qd 0x00005e60 0x0000e2e0 Qm (i32)0x00000140 Qn (i32)0x00000120
vmul.i8 d0, d1, d2 :: Qd 0x000000a0 0x000000a0 Qm (i32)0x0000008c Qn (i32)0x00000078
+vmul.i8 d0, d1, d2 :: Qd 0x000000a8 0x00000088 Qm (i32)0x0000008c Qn (i32)0x00000078
vmul.i8 d10, d11, d12 :: Qd 0x0000004a 0x0000004a Qm (i32)0x00000021 Qn (i32)0x0000000a
+vmul.i8 d10, d11, d12 :: Qd 0x0000000e 0x00000036 Qm (i32)0x00000021 Qn (i32)0x0000000a
vmul.i16 d4, d5, d6 :: Qd 0x0000a002 0x0000a002 Qm (i32)0x00004001 Qn (i32)0x00002002
+vmul.i16 d4, d5, d6 :: Qd 0x00009436 0x00001c3e Qm (i32)0x00004001 Qn (i32)0x00002002
vmul.i32 d7, d8, d9 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmul.i32 d7, d8, d9 :: Qd 0xa6363436 0xa43e3c3e Qm (i32)0x80000001 Qn (i32)0x80000002
vmul.i8 d10, d11, d12 :: Qd 0x0000c00e 0x0000c00e Qm (i32)0x0200feb2 Qn (i32)0x000020df
+vmul.i8 d10, d11, d12 :: Qd 0x00004085 0x0000c001 Qm (i32)0x0200feb2 Qn (i32)0x000020df
vmul.i16 d4, d5, d6 :: Qd 0x00008866 0x00008866 Qm (i32)0xffff9433 Qn (i32)0x00002002
+vmul.i16 d4, d5, d6 :: Qd 0x00009436 0x00001c3e Qm (i32)0xffff9433 Qn (i32)0x00002002
vmul.i32 d7, d8, d9 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000 Qn (i32)0x0000000c
+vmul.i32 d7, d8, d9 :: Qd 0xe5453944 0xd9756974 Qm (i32)0x80000000 Qn (i32)0x0000000c
vmul.i8 d10, d13, d12 :: Qd 0x0000004a 0x0000004a Qm (i32)0x00000021 Qn (i32)0x0000000a
+vmul.i8 d10, d13, d12 :: Qd 0x0000000e 0x00000036 Qm (i32)0x00000021 Qn (i32)0x0000000a
vmul.i16 d4, d5, d6 :: Qd 0x0000c1fc 0x0000c1fc Qm (i32)0x100000fe Qn (i32)0x00002002
+vmul.i16 d4, d5, d6 :: Qd 0x00009436 0x00001c3e Qm (i32)0x100000fe Qn (i32)0x00002002
vmul.i32 d7, d8, d9 :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmul.i32 d7, d8, d9 :: Qd 0xa6363436 0xa43e3c3e Qm (i32)0x80000001 Qn (i32)0x80000002
vmul.i32 d10, d11, d15 :: Qd 0x00000b40 0x00000b40 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmul.i32 d10, d11, d15 :: Qd 0xf4b43ca8 0x7e961e88 Qm (i32)0x00000018 Qn (i32)0x00000078
vmul.p8 q0, q1, q2 :: Qd 0x00000005 0x00000005 Qm (i32)0x00000003 Qn (i32)0x00000003
+vmul.p8 q0, q1, q2 :: Qd 0x0000002d 0x00000021 Qm (i32)0x00000003 Qn (i32)0x00000003
vmul.p8 q0, q1, q2 :: Qd 0x00000044 0x00000044 Qm (i32)0x0000000c Qn (i8)0x0000000f
+vmul.p8 q0, q1, q2 :: Qd 0xe1999699 0xeea5aaa5 Qm (i32)0x0000000c Qn (i8)0x0000000f
---- VMUL (by scalar) ----
vmul.i32 d0, d1, d4[0] :: Qd 0x00000b40 0x00000b40 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmul.i32 d0, d1, d4[0] :: Qd 0xf4b43ca8 0x7e961e88 Qm (i32)0x00000018 Qn (i32)0x00000078
vmul.i32 d31, d8, d7[1] :: Qd 0xffffbe60 0xffffbe60 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmul.i32 d31, d8, d7[1] :: Qd 0x0b4bc358 0x8169e178 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmul.i16 d30, d9, d7[3] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000140 Qn (i32)0x00000120
vmul.i16 d30, d9, d7[3] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000140 Qn (i32)0x00000120
vmul.i16 d4, d5, d6[2] :: Qd 0x0000a002 0x0000a002 Qm (i32)0x00004001 Qn (i32)0x00002002
+vmul.i16 d4, d5, d6[2] :: Qd 0x86369436 0x043e1c3e Qm (i32)0x00004001 Qn (i32)0x00002002
vmul.i32 d4, d8, d15[1] :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmul.i32 d4, d8, d15[1] :: Qd 0xa6363436 0xa43e3c3e Qm (i32)0x80000001 Qn (i32)0x80000002
vmul.i16 d4, d5, d6[0] :: Qd 0xdffe8866 0xdffe8866 Qm (i32)0xffff9433 Qn (i32)0x00002002
+vmul.i16 d4, d5, d6[0] :: Qd 0x86369436 0x043e1c3e Qm (i32)0xffff9433 Qn (i32)0x00002002
vmul.i32 d7, d8, d1[1] :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmul.i32 d7, d8, d1[1] :: Qd 0x1e893944 0x42e96974 Qm (i32)0x80000000 Qn (i16)0x0000000c
vmul.i16 d4, d5, d6[0] :: Qd 0x2000c1fc 0x2000c1fc Qm (i32)0x100000fe Qn (i32)0x00002002
+vmul.i16 d4, d5, d6[0] :: Qd 0x86369436 0x043e1c3e Qm (i32)0x100000fe Qn (i32)0x00002002
vmul.i32 d7, d8, d1[1] :: Qd 0x80000002 0x80000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmul.i32 d7, d8, d1[1] :: Qd 0xa6363436 0xa43e3c3e Qm (i32)0x80000001 Qn (i32)0x80000002
---- VMLA (by scalar) ----
vmla.i32 d0, d1, d4[0] :: Qd 0x55556095 0x55556095 Qm (i32)0x00000018 Qn (i32)0x00000078
+vmla.i32 d0, d1, d4[0] :: Qd 0x4a0991fd 0xd3eb73dd Qm (i32)0x00000018 Qn (i32)0x00000078
vmla.i32 d31, d8, d7[1] :: Qd 0x555513b5 0x555513b5 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmla.i32 d31, d8, d7[1] :: Qd 0x60a118ad 0xd6bf36cd Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmla.i16 d30, d9, d7[3] :: Qd 0x55555555 0x55555555 Qm (i32)0x00000140 Qn (i32)0x00000120
vmla.i16 d30, d9, d7[3] :: Qd 0x55555555 0x55555555 Qm (i32)0x00000140 Qn (i32)0x00000120
vmla.i16 d4, d5, d6[2] :: Qd 0x5555f557 0x5555f557 Qm (i32)0x00004001 Qn (i32)0x00002002
+vmla.i16 d4, d5, d6[2] :: Qd 0xdb8be98b 0x59937193 Qm (i32)0x00004001 Qn (i32)0x00002002
vmla.i32 d4, d8, d15[1] :: Qd 0xd5555557 0xd5555557 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmla.i32 d4, d8, d15[1] :: Qd 0xfb8b898b 0xf9939193 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.i16 d4, d5, d6[0] :: Qd 0x3553ddbb 0x3553ddbb Qm (i32)0xffff9433 Qn (i32)0x00002002
+vmla.i16 d4, d5, d6[0] :: Qd 0xdb8be98b 0x59937193 Qm (i32)0xffff9433 Qn (i32)0x00002002
vmla.i32 d7, d8, d1[1] :: Qd 0x55555555 0x55555555 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmla.i32 d7, d8, d1[1] :: Qd 0x73de8e99 0x983ebec9 Qm (i32)0x80000000 Qn (i16)0x0000000c
vmla.i16 d4, d5, d6[0] :: Qd 0x75551751 0x75551751 Qm (i32)0x100000fe Qn (i32)0x00002002
+vmla.i16 d4, d5, d6[0] :: Qd 0xdb8be98b 0x59937193 Qm (i32)0x100000fe Qn (i32)0x00002002
vmla.i32 d7, d8, d1[1] :: Qd 0xd5555557 0xd5555557 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmla.i32 d7, d8, d1[1] :: Qd 0xfb8b898b 0xf9939193 Qm (i32)0x80000001 Qn (i32)0x80000002
---- VMLS (by scalar) ----
vmls.i32 d0, d1, d4[0] :: Qd 0x5555557d 0x5555557d Qm (i32)0x00000018 Qn (i32)0x00000078
+vmls.i32 d0, d1, d4[0] :: Qd 0x5555557d 0x5555557d Qm (i32)0x00000018 Qn (i32)0x00000078
vmls.i32 d31, d8, d7[1] :: Qd 0x555596f5 0x555596f5 Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmls.i32 d31, d8, d7[1] :: Qd 0x4a0991fd 0xd3eb73dd Qm (i32)0x0000008c Qn (i32)0xffffff88
+vmls.i16 d30, d9, d7[3] :: Qd 0x55555555 0x55555555 Qm (i32)0x00000140 Qn (i32)0x00000120
vmls.i16 d30, d9, d7[3] :: Qd 0x55555555 0x55555555 Qm (i32)0x00000140 Qn (i32)0x00000120
vmls.i16 d4, d5, d6[2] :: Qd 0x5555b553 0x5555b553 Qm (i32)0x00004001 Qn (i32)0x00002002
+vmls.i16 d4, d5, d6[2] :: Qd 0xcf1fc11f 0x51173917 Qm (i32)0x00004001 Qn (i32)0x00002002
vmls.i32 d4, d8, d15[1] :: Qd 0xd5555553 0xd5555553 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmls.i32 d4, d8, d15[1] :: Qd 0xaf1f211f 0xb1171917 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.i16 d4, d5, d6[0] :: Qd 0x7557ccef 0x7557ccef Qm (i32)0xffff9433 Qn (i32)0x00002002
+vmls.i16 d4, d5, d6[0] :: Qd 0xcf1fc11f 0x51173917 Qm (i32)0xffff9433 Qn (i32)0x00002002
vmls.i32 d7, d8, d1[1] :: Qd 0x55555555 0x55555555 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmls.i32 d7, d8, d1[1] :: Qd 0x36cc1c11 0x126bebe1 Qm (i32)0x80000000 Qn (i16)0x0000000c
vmls.i16 d4, d5, d6[0] :: Qd 0x35559359 0x35559359 Qm (i32)0x100000fe Qn (i32)0x00002002
+vmls.i16 d4, d5, d6[0] :: Qd 0xcf1fc11f 0x51173917 Qm (i32)0x100000fe Qn (i32)0x00002002
vmls.i32 d7, d8, d1[1] :: Qd 0xd5555553 0xd5555553 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmls.i32 d7, d8, d1[1] :: Qd 0xaf1f211f 0xb1171917 Qm (i32)0x80000001 Qn (i32)0x80000002
---- VRSHR ----
vrshr.s8 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vrshr.s8 d0, d1, #0 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xffffffff
vrshr.s8 d0, d1, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
+vrshr.s8 d0, d1, #1 :: Qd 0x0b0f0d0f 0x0a0e100e Qm (i32)0xffffffff
vrshr.s16 d3, d4, #2 :: Qd 0x0000ffe1 0x0000ffe1 Qm (i32)0xffffff84
+vrshr.s16 d3, d4, #2 :: Qd 0x05470647 0x050707c7 Qm (i32)0xffffff84
+vrshr.s32 d2, d5, #31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
vrshr.s32 d2, d5, #31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
vrshr.s8 d6, d7, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000ffff
+vrshr.s8 d6, d7, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000ffff
vrshr.s16 d8, d9, #12 :: Qd 0x00000000 0x00000000 Qm (i32)0xfffffff6
+vrshr.s16 d8, d9, #12 :: Qd 0x00010002 0x00010002 Qm (i32)0xfffffff6
vrshr.s32 d10, d11, #5 :: Qd 0x00000140 0x00000140 Qm (i32)0x000027fa
+vrshr.s32 d10, d11, #5 :: Qd 0x00a8e8c9 0x00a0e0f9 Qm (i32)0x000027fa
vrshr.u8 d12, d13, #1 :: Qd 0x80808080 0x80808080 Qm (i32)0xffffffff
+vrshr.u8 d12, d13, #1 :: Qd 0x0b0f0d0f 0x0a0e100e Qm (i32)0xffffffff
vrshr.u16 d14, d15, #11 :: Qd 0x00200020 0x00200020 Qm (i32)0xffffffff
+vrshr.u16 d14, d15, #11 :: Qd 0x00030003 0x00030004 Qm (i32)0xffffffff
vrshr.u32 d10, d11, #9 :: Qd 0x00000002 0x00000002 Qm (i32)0x000003e8
+vrshr.u32 d10, d11, #9 :: Qd 0x000a8e8d 0x000a0e10 Qm (i32)0x000003e8
vrshr.u8 d7, d13, #7 :: Qd 0x02020202 0x02020202 Qm (i32)0xffffffff
+vrshr.u8 d7, d13, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
vrshr.u16 d8, d1, #5 :: Qd 0x0000055e 0x0000055e Qm (i32)0x0000abcf
+vrshr.u16 d8, d1, #5 :: Qd 0x00a900c9 0x00a100f9 Qm (i32)0x0000abcf
vrshr.u32 d12, d3, #15 :: Qd 0x00020000 0x00020000 Qm (i32)0xfffffe50
+vrshr.u32 d12, d3, #15 :: Qd 0x00002a3a 0x00002838 Qm (i32)0xfffffe50
vrshr.u64 d0, d1, #42 :: Qd 0x00000000 0x00400000 Qm (i32)0xffffffff
+vrshr.u64 d0, d1, #42 :: Qd 0x00000000 0x00054746 Qm (i32)0xffffffff
vrshr.s64 d6, d7, #12 :: Qd 0x00000000 0xfac00001 Qm (i32)0x00000fac
+vrshr.s64 d6, d7, #12 :: Qd 0x000151d1 0x91d141c2 Qm (i32)0x00000fac
vrshr.u64 d8, d4, #9 :: Qd 0x0000001a 0x7c00001a Qm (i32)0x000034f8
+vrshr.u64 d8, d4, #9 :: Qd 0x000a8e8c 0x8e8a0e10 Qm (i32)0x000034f8
vrshr.s64 d9, d12, #11 :: Qd 0x00000030 0x32c00030 Qm (i32)0x00018196
+vrshr.s64 d9, d12, #11 :: Qd 0x0002a3a3 0x23a28384 Qm (i32)0x00018196
---- VRSRA ----
vrsra.s8 d0, d1, #1 :: Qd 0x55555555 0x55555555 Qm (i32)0xffffffff
+vrsra.s8 d0, d1, #1 :: Qd 0x1e2a272a 0x1c2d2e2d Qm (i32)0xffffffff
vrsra.s16 d3, d4, #2 :: Qd 0x55555536 0x55555536 Qm (i32)0xffffff84
+vrsra.s16 d3, d4, #2 :: Qd 0x18622062 0x172625e6 Qm (i32)0xffffff84
vrsra.s32 d2, d5, #31 :: Qd 0x55555555 0x55555555 Qm (i32)0xffffffff
+vrsra.s32 d2, d5, #31 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vrsra.s8 d6, d7, #7 :: Qd 0x55555555 0x55555555 Qm (i32)0x0000ffff
+vrsra.s8 d6, d7, #7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x0000ffff
vrsra.s16 d8, d9, #12 :: Qd 0x55555555 0x55555555 Qm (i32)0xfffffff6
+vrsra.s16 d8, d9, #12 :: Qd 0x131c1a1d 0x12201e21 Qm (i32)0xfffffff6
vrsra.s32 d10, d11, #5 :: Qd 0x55555695 0x55555695 Qm (i32)0x000027fa
+vrsra.s32 d10, d11, #5 :: Qd 0x13c402e4 0x12bfff18 Qm (i32)0x000027fa
vrsra.u8 d12, d13, #1 :: Qd 0xd5d5d5d5 0xd5d5d5d5 Qm (i32)0xffffffff
+vrsra.u8 d12, d13, #1 :: Qd 0x1e2a272a 0x1c2d2e2d Qm (i32)0xffffffff
vrsra.u16 d14, d15, #11 :: Qd 0x55755575 0x55755575 Qm (i32)0xffffffff
+vrsra.u16 d14, d15, #11 :: Qd 0x131e1a1e 0x12221e23 Qm (i32)0xffffffff
vrsra.u32 d10, d11, #9 :: Qd 0x55555557 0x55555557 Qm (i32)0x000003e8
+vrsra.u32 d10, d11, #9 :: Qd 0x1325a8a8 0x12292c2f Qm (i32)0x000003e8
vrsra.u8 d7, d13, #7 :: Qd 0x57575757 0x57575757 Qm (i32)0xffffffff
+vrsra.u8 d7, d13, #7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vrsra.u16 d8, d1, #5 :: Qd 0x55555ab3 0x55555ab3 Qm (i32)0x0000abcf
+vrsra.u16 d8, d1, #5 :: Qd 0x13c41ae4 0x12c01f18 Qm (i32)0x0000abcf
vrsra.u32 d12, d3, #15 :: Qd 0x55575555 0x55575555 Qm (i32)0xfffffe50
+vrsra.u32 d12, d3, #15 :: Qd 0x131b4455 0x121f4657 Qm (i32)0xfffffe50
vrsra.u64 d0, d1, #42 :: Qd 0x55555555 0x55955555 Qm (i32)0xffffffff
+vrsra.u64 d0, d1, #42 :: Qd 0x131b1a1b 0x12246565 Qm (i32)0xffffffff
vrsra.s64 d6, d7, #12 :: Qd 0x55555556 0x50155556 Qm (i32)0x00000fac
+vrsra.s64 d6, d7, #12 :: Qd 0x131c6bec 0xa3f05fe1 Qm (i32)0x00000fac
vrsra.u64 d8, d4, #9 :: Qd 0x5555556f 0xd155556f Qm (i32)0x000034f8
+vrsra.u64 d8, d4, #9 :: Qd 0x1325a8a7 0xa0a92c2f Qm (i32)0x000034f8
vrsra.s64 d9, d12, #11 :: Qd 0x55555585 0x88155585 Qm (i32)0x00018196
+vrsra.s64 d9, d12, #11 :: Qd 0x131dbdbe 0x35c1a1a3 Qm (i32)0x00018196
---- VSHR ----
vshr.s8 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshr.s8 d0, d1, #0 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xffffffff
vshr.s8 d0, d1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshr.s8 d0, d1, #1 :: Qd 0x0a0e0c0e 0x0a0e0f0e Qm (i32)0xffffffff
vshr.s16 d3, d4, #2 :: Qd 0xffffffe1 0xffffffe1 Qm (i32)0xffffff84
+vshr.s16 d3, d4, #2 :: Qd 0x05470647 0x050707c7 Qm (i32)0xffffff84
vshr.s32 d2, d5, #31 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshr.s32 d2, d5, #31 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
vshr.s8 d6, d7, #7 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x0000ffff
+vshr.s8 d6, d7, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000ffff
vshr.s16 d8, d9, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff6
+vshr.s16 d8, d9, #12 :: Qd 0x00010001 0x00010001 Qm (i32)0xfffffff6
vshr.s32 d10, d11, #5 :: Qd 0x0000013f 0x0000013f Qm (i32)0x000027fa
+vshr.s32 d10, d11, #5 :: Qd 0x00a8e8c8 0x00a0e0f8 Qm (i32)0x000027fa
vshr.u8 d12, d13, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff
+vshr.u8 d12, d13, #1 :: Qd 0x0a0e0c0e 0x0a0e0f0e Qm (i32)0xffffffff
vshr.u16 d14, d15, #11 :: Qd 0x001f001f 0x001f001f Qm (i32)0xffffffff
+vshr.u16 d14, d15, #11 :: Qd 0x00020003 0x00020003 Qm (i32)0xffffffff
vshr.u32 d10, d11, #9 :: Qd 0x00000001 0x00000001 Qm (i32)0x000003e8
+vshr.u32 d10, d11, #9 :: Qd 0x000a8e8c 0x000a0e0f Qm (i32)0x000003e8
vshr.u8 d7, d13, #7 :: Qd 0x01010101 0x01010101 Qm (i32)0xffffffff
+vshr.u8 d7, d13, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
vshr.u16 d8, d1, #5 :: Qd 0x0000055e 0x0000055e Qm (i32)0x0000abcf
+vshr.u16 d8, d1, #5 :: Qd 0x00a800c8 0x00a000f8 Qm (i32)0x0000abcf
vshr.u32 d12, d3, #15 :: Qd 0x0001ffff 0x0001ffff Qm (i32)0xfffffe50
+vshr.u32 d12, d3, #15 :: Qd 0x00002a3a 0x00002838 Qm (i32)0xfffffe50
vshr.u64 d0, d1, #42 :: Qd 0x00000000 0x003fffff Qm (i32)0xffffffff
+vshr.u64 d0, d1, #42 :: Qd 0x00000000 0x00054746 Qm (i32)0xffffffff
vshr.s64 d6, d7, #12 :: Qd 0x00000000 0xfac00000 Qm (i32)0x00000fac
+vshr.s64 d6, d7, #12 :: Qd 0x000151d1 0x91d141c1 Qm (i32)0x00000fac
vshr.u64 d8, d4, #9 :: Qd 0x0000001a 0x7c00001a Qm (i32)0x000034f8
+vshr.u64 d8, d4, #9 :: Qd 0x000a8e8c 0x8e8a0e0f Qm (i32)0x000034f8
vshr.s64 d9, d12, #11 :: Qd 0x00000030 0x32c00030 Qm (i32)0x00018196
+vshr.s64 d9, d12, #11 :: Qd 0x0002a3a3 0x23a28383 Qm (i32)0x00018196
---- VSRA ----
vsra.s8 d0, d1, #1 :: Qd 0x54545454 0x54545454 Qm (i32)0xffffffff
+vsra.s8 d0, d1, #1 :: Qd 0x1d292629 0x1c2d2d2d Qm (i32)0xffffffff
vsra.s16 d3, d4, #2 :: Qd 0x55545536 0x55545536 Qm (i32)0xffffff84
+vsra.s16 d3, d4, #2 :: Qd 0x18622062 0x172625e6 Qm (i32)0xffffff84
vsra.s32 d2, d5, #31 :: Qd 0x55555554 0x55555554 Qm (i32)0xffffffff
+vsra.s32 d2, d5, #31 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vsra.s8 d6, d7, #7 :: Qd 0x55555454 0x55555454 Qm (i32)0x0000ffff
+vsra.s8 d6, d7, #7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x0000ffff
vsra.s16 d8, d9, #12 :: Qd 0x55545554 0x55545554 Qm (i32)0xfffffff6
+vsra.s16 d8, d9, #12 :: Qd 0x131c1a1c 0x12201e20 Qm (i32)0xfffffff6
vsra.s32 d10, d11, #5 :: Qd 0x55555694 0x55555694 Qm (i32)0x000027fa
+vsra.s32 d10, d11, #5 :: Qd 0x13c402e3 0x12bfff17 Qm (i32)0x000027fa
vsra.u8 d12, d13, #1 :: Qd 0xd4d4d4d4 0xd4d4d4d4 Qm (i32)0xffffffff
+vsra.u8 d12, d13, #1 :: Qd 0x1d292629 0x1c2d2d2d Qm (i32)0xffffffff
vsra.u16 d14, d15, #11 :: Qd 0x55745574 0x55745574 Qm (i32)0xffffffff
+vsra.u16 d14, d15, #11 :: Qd 0x131d1a1e 0x12211e22 Qm (i32)0xffffffff
vsra.u32 d10, d11, #9 :: Qd 0x55555556 0x55555556 Qm (i32)0x000003e8
+vsra.u32 d10, d11, #9 :: Qd 0x1325a8a7 0x12292c2e Qm (i32)0x000003e8
vsra.u8 d7, d13, #7 :: Qd 0x56565656 0x56565656 Qm (i32)0xffffffff
+vsra.u8 d7, d13, #7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xffffffff
vsra.u16 d8, d1, #5 :: Qd 0x55555ab3 0x55555ab3 Qm (i32)0x0000abcf
+vsra.u16 d8, d1, #5 :: Qd 0x13c31ae3 0x12bf1f17 Qm (i32)0x0000abcf
vsra.u32 d12, d3, #15 :: Qd 0x55575554 0x55575554 Qm (i32)0xfffffe50
+vsra.u32 d12, d3, #15 :: Qd 0x131b4455 0x121f4657 Qm (i32)0xfffffe50
vsra.u64 d0, d1, #42 :: Qd 0x55555555 0x55955554 Qm (i32)0xffffffff
+vsra.u64 d0, d1, #42 :: Qd 0x131b1a1b 0x12246565 Qm (i32)0xffffffff
vsra.s64 d6, d7, #12 :: Qd 0x55555556 0x50155555 Qm (i32)0x00000fac
+vsra.s64 d6, d7, #12 :: Qd 0x131c6bec 0xa3f05fe0 Qm (i32)0x00000fac
vsra.u64 d8, d4, #9 :: Qd 0x5555556f 0xd155556f Qm (i32)0x000034f8
+vsra.u64 d8, d4, #9 :: Qd 0x1325a8a7 0xa0a92c2e Qm (i32)0x000034f8
vsra.s64 d9, d12, #11 :: Qd 0x55555585 0x88155585 Qm (i32)0x00018196
+vsra.s64 d9, d12, #11 :: Qd 0x131dbdbe 0x35c1a1a2 Qm (i32)0x00018196
---- VSRI ----
vsri.16 d0, d1, #1 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff
+vsri.16 d0, d1, #1 :: Qd 0x0a8e0c8e 0x0a0e0f8e Qm (i32)0xffffffff
vsri.16 d3, d4, #2 :: Qd 0x7fff7fe1 0x7fff7fe1 Qm (i32)0xffffff84
+vsri.16 d3, d4, #2 :: Qd 0x05470647 0x050707c7 Qm (i32)0xffffff84
vsri.32 d2, d5, #31 :: Qd 0x55555555 0x55555555 Qm (i32)0xffffffff
+vsri.32 d2, d5, #31 :: Qd 0x131b1a1a 0x121f1e1e Qm (i32)0xffffffff
vsri.8 d6, d7, #7 :: Qd 0x54545555 0x54545555 Qm (i32)0x0000ffff
+vsri.8 d6, d7, #7 :: Qd 0x121a1a1a 0x121e1e1e Qm (i32)0x0000ffff
vsri.16 d8, d9, #12 :: Qd 0x555f555f 0x555f555f Qm (i32)0xfffffff6
+vsri.16 d8, d9, #12 :: Qd 0x13111a11 0x12111e11 Qm (i32)0xfffffff6
vsri.32 d10, d11, #5 :: Qd 0x5000013f 0x5000013f Qm (i32)0x000027fa
+vsri.32 d10, d11, #5 :: Qd 0x10a8e8c8 0x10a0e0f8 Qm (i32)0x000027fa
vsri.8 d12, d13, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff
+vsri.8 d12, d13, #1 :: Qd 0x0a0e0c0e 0x0a0e0f0e Qm (i32)0xffffffff
vsri.16 d14, d15, #11 :: Qd 0x555f555f 0x555f555f Qm (i32)0xffffffff
+vsri.16 d14, d15, #11 :: Qd 0x13021a03 0x12021e03 Qm (i32)0xffffffff
vsri.32 d10, d11, #9 :: Qd 0x55000001 0x55000001 Qm (i32)0x000003e8
+vsri.32 d10, d11, #9 :: Qd 0x130a8e8c 0x120a0e0f Qm (i32)0x000003e8
vsri.8 d7, d13, #7 :: Qd 0x55555555 0x55555555 Qm (i32)0xffffffff
+vsri.8 d7, d13, #7 :: Qd 0x121a1a1a 0x121e1e1e Qm (i32)0xffffffff
vsri.16 d8, d1, #5 :: Qd 0x5000555e 0x5000555e Qm (i32)0x0000abcf
+vsri.16 d8, d1, #5 :: Qd 0x10a818c8 0x10a018f8 Qm (i32)0x0000abcf
vsri.32 d12, d3, #15 :: Qd 0x5555ffff 0x5555ffff Qm (i32)0xfffffe50
+vsri.32 d12, d3, #15 :: Qd 0x131a2a3a 0x121e2838 Qm (i32)0xfffffe50
vsri.64 d0, d1, #42 :: Qd 0x55555555 0x557fffff Qm (i32)0xffffffff
+vsri.64 d0, d1, #42 :: Qd 0x131b1a1b 0x12054746 Qm (i32)0xffffffff
vsri.64 d6, d7, #12 :: Qd 0x55500000 0xfac00000 Qm (i32)0x00000fac
+vsri.64 d6, d7, #12 :: Qd 0x131151d1 0x91d141c1 Qm (i32)0x00000fac
vsri.64 d8, d4, #9 :: Qd 0x5500001a 0x7c00001a Qm (i32)0x000034f8
+vsri.64 d8, d4, #9 :: Qd 0x130a8e8c 0x8e8a0e0f Qm (i32)0x000034f8
vsri.64 d9, d12, #11 :: Qd 0x55400030 0x32c00030 Qm (i32)0x00018196
+vsri.64 d9, d12, #11 :: Qd 0x1302a3a3 0x23a28383 Qm (i32)0x00018196
---- VMOV (ARM core register to scalar) ----
vmov.32 d0[0], r5 :: Qd 0x55555555 0x0000000d Qm 0x0000000d
vmov.32 d1[1], r3 :: Qd 0x0000000c 0x55555555 Qm 0x0000000c
vst4.8 {d17[1],d18[1],d19[1],d20[1]} :: Result 0x2e2e1f1e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 4
vst4.8 {d28[0],d29[0],d30[0],d31[0]} :: Result 0x2b2f1c1f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 4
---- VLD1 (multiple single elements) ----
-vld1.8 {d0} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 13
-vld1.16 {d0} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 13
-vld1.32 {d0} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 42
+vld1.8 {d0} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
+vld1.16 {d0} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
+vld1.32 {d0} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
vld1.64 {d0} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
-vld1.8 {d9} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 13
-vld1.16 {d17} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 13
-vld1.32 {d31} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta -3
-vld1.64 {d14} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 13
-vld1.8 {d0-d1} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 13
-vld1.16 {d0-d1} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 13
-vld1.32 {d5-d6} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 13
-vld1.64 {d30-d31} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 13
-vld1.8 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 13
-vld1.16 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 13
-vld1.32 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 13
-vld1.64 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 13
-vld1.8 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
-vld1.16 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
-vld1.32 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
-vld1.64 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
+vld1.8 {d9} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
+vld1.16 {d17} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
+vld1.32 {d31} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
+vld1.64 {d14} :: Result 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b 0x121f1e1f 0x131b1a1b delta 0
+vld1.8 {d0-d1} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 0
+vld1.16 {d0-d1} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 0
+vld1.32 {d5-d6} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 0
+vld1.64 {d30-d31} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d delta 0
+vld1.8 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 0
+vld1.16 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 0
+vld1.32 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 0
+vld1.64 {d0-d2} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x121f1e1f 0x131b1a1b delta 0
+vld1.8 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 0
+vld1.16 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 0
+vld1.32 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 0
+vld1.64 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 0
---- VLD1 (single element to one lane) ----
-vld1.32 {d0[0]} :: Result 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 delta 13
-vld1.32 {d0[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f delta 42
-vld1.16 {d1[0]} :: Result 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 delta 13
+vld1.32 {d0[0]} :: Result 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 delta 0
+vld1.32 {d0[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f 0x55555555 0x121f1e1f delta 0
+vld1.16 {d1[0]} :: Result 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 delta 0
vld1.16 {d1[1]} :: Result 0x1e1f5555 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 0x55555555 delta 0
-vld1.16 {d1[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f delta -3
-vld1.16 {d1[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 delta 13
-vld1.8 {d0[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 delta 13
-vld1.8 {d1[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 delta 13
-vld1.8 {d0[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 delta 13
-vld1.8 {d0[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f delta 13
-vld1.8 {d20[3]} :: Result 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 delta 13
-vld1.8 {d0[2]} :: Result 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 delta 13
-vld1.8 {d17[1]} :: Result 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 delta 13
-vld1.8 {d30[0]} :: Result 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 delta 13
+vld1.16 {d1[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f 0x55555555 0x55551e1f delta 0
+vld1.16 {d1[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 0x55555555 0x1e1f5555 delta 0
+vld1.8 {d0[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 delta 0
+vld1.8 {d1[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 delta 0
+vld1.8 {d0[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 delta 0
+vld1.8 {d0[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f delta 0
+vld1.8 {d20[3]} :: Result 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 0x1f555555 0x55555555 delta 0
+vld1.8 {d0[2]} :: Result 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 0x551f5555 0x55555555 delta 0
+vld1.8 {d17[1]} :: Result 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 0x55551f55 0x55555555 delta 0
+vld1.8 {d30[0]} :: Result 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 delta 0
---- VLD1 (single element to all lanes) ----
-vld1.8 {d0[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f delta 13
-vld1.16 {d0[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f delta 42
+vld1.8 {d0[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f delta 0
+vld1.16 {d0[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f delta 0
vld1.32 {d0[]} :: Result 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f delta 0
-vld1.8 {d9[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f delta -3
-vld1.16 {d17[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f delta 13
-vld1.32 {d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f delta 13
-vld1.8 {d0[],d1[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f delta 13
-vld1.16 {d0[],d1[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f delta 13
-vld1.32 {d5[],d6[]} :: Result 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f delta 13
+vld1.8 {d9[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f delta 0
+vld1.16 {d17[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f delta 0
+vld1.32 {d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f delta 0
+vld1.8 {d0[],d1[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f 0x1f1f1f1f delta 0
+vld1.16 {d0[],d1[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f 0x1e1f1e1f delta 0
+vld1.32 {d5[],d6[]} :: Result 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f 0x121f1e1f delta 0
---- VLD2 (multiple 2-elements) ----
-vld2.8 {d30-d31} :: Result 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f delta 13
-vld2.16 {d0-d1} :: Result 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c delta 42
+vld2.8 {d30-d31} :: Result 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f delta 0
+vld2.16 {d0-d1} :: Result 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c delta 0
vld2.32 {d0-d1} :: Result 0x121f1e1f 0x141c1f1c 0x131b1a1b 0x151d191d 0x121f1e1f 0x141c1f1c 0x131b1a1b 0x151d191d delta 0
-vld2.8 {d10,d12} :: Result 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f delta -3
-vld2.16 {d20,d22} :: Result 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c delta 13
-vld2.32 {d0,d2} :: Result 0x121f1e1f 0x141c1f1c 0x131b1a1b 0x151d191d 0x121f1e1f 0x141c1f1c 0x131b1a1b 0x151d191d delta 13
-vld2.8 {d0-d3} :: Result 0x1b1b1f1f 0x1d1d1c1c 0x2c2b2f2f 0x2d2a2a2b 0x131a121e 0x1519141f 0x242b232e 0x262d252e delta 13
-vld2.16 {d20-d23} :: Result 0x1a1b1e1f 0x191d1f1c 0x2b2b2e2f 0x2d2a2e2b 0x131b121f 0x151d141c 0x242c232f 0x262d252a delta 13
-vld2.32 {d0-d3} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a delta 13
+vld2.8 {d10,d12} :: Result 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f 0x1b1b1f1f 0x1d1d1c1c 0x131a121e 0x1519141f delta 0
+vld2.16 {d20,d22} :: Result 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c 0x1a1b1e1f 0x191d1f1c 0x131b121f 0x151d141c delta 0
+vld2.32 {d0,d2} :: Result 0x121f1e1f 0x141c1f1c 0x131b1a1b 0x151d191d 0x121f1e1f 0x141c1f1c 0x131b1a1b 0x151d191d delta 0
+vld2.8 {d0-d3} :: Result 0x1b1b1f1f 0x1d1d1c1c 0x2c2b2f2f 0x2d2a2a2b 0x131a121e 0x1519141f 0x242b232e 0x262d252e delta 0
+vld2.16 {d20-d23} :: Result 0x1a1b1e1f 0x191d1f1c 0x2b2b2e2f 0x2d2a2e2b 0x131b121f 0x151d141c 0x242c232f 0x262d252a delta 0
+vld2.32 {d0-d3} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a delta 0
---- VLD2 (single 2-element structure to one lane) ----
-vld2.32 {d0[0],d1[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 delta 13
-vld2.32 {d0[1],d1[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b delta 42
+vld2.32 {d0[0],d1[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 delta 0
+vld2.32 {d0[1],d1[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b delta 0
vld2.32 {d0[0],d2[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 delta 0
-vld2.32 {d0[1],d2[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b delta -3
-vld2.16 {d1[0],d2[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 delta 13
-vld2.16 {d1[1],d2[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 delta 13
-vld2.16 {d1[2],d2[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f delta 13
-vld2.16 {d1[3],d2[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 delta 13
-vld2.16 {d1[0],d3[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 delta 13
-vld2.16 {d1[1],d3[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 delta 13
-vld2.16 {d1[2],d3[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f delta 13
-vld2.16 {d1[3],d3[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 delta 13
-vld2.8 {d0[7],d1[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 delta 13
-vld2.8 {d1[6],d2[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 delta 13
-vld2.8 {d0[5],d1[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 delta 13
-vld2.8 {d0[4],d1[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551e delta 13
-vld2.8 {d20[3],d21[3]} :: Result 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 delta 13
-vld2.8 {d0[2],d1[2]} :: Result 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 delta 13
-vld2.8 {d17[1],d18[1]} :: Result 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 delta 13
-vld2.8 {d30[0],d31[0]} :: Result 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 delta 13
+vld2.32 {d0[1],d2[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b delta 0
+vld2.16 {d1[0],d2[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 delta 0
+vld2.16 {d1[1],d2[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 delta 0
+vld2.16 {d1[2],d2[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f delta 0
+vld2.16 {d1[3],d2[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 delta 0
+vld2.16 {d1[0],d3[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 delta 0
+vld2.16 {d1[1],d3[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 delta 0
+vld2.16 {d1[2],d3[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551e1f 0x55555555 0x5555121f delta 0
+vld2.16 {d1[3],d3[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1e1f5555 0x55555555 0x121f5555 delta 0
+vld2.8 {d0[7],d1[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 delta 0
+vld2.8 {d1[6],d2[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 delta 0
+vld2.8 {d0[5],d1[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 delta 0
+vld2.8 {d0[4],d1[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551e delta 0
+vld2.8 {d20[3],d21[3]} :: Result 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 delta 0
+vld2.8 {d0[2],d1[2]} :: Result 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 delta 0
+vld2.8 {d17[1],d18[1]} :: Result 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 delta 0
+vld2.8 {d30[0],d31[0]} :: Result 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 delta 0
---- VLD2 (2-elements to all lanes) ----
-vld2.8 {d0[],d1[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 13
-vld2.16 {d0[],d1[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f delta 42
+vld2.8 {d0[],d1[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 0
+vld2.16 {d0[],d1[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f delta 0
vld2.32 {d0[],d1[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b delta 0
-vld2.8 {d9[],d11[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta -3
-vld2.16 {d17[],d18[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f delta 13
-vld2.32 {d30[],d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b delta 13
-vld2.8 {d0[],d2[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 13
-vld2.16 {d0[],d2[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f delta 13
-vld2.32 {d5[],d7[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b delta 13
+vld2.8 {d9[],d11[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 0
+vld2.16 {d17[],d18[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f delta 0
+vld2.32 {d30[],d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b delta 0
+vld2.8 {d0[],d2[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 0
+vld2.16 {d0[],d2[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f delta 0
+vld2.32 {d5[],d7[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b delta 0
---- VLD3 (multiple 3-elements) ----
-vld3.8 {d20-d22} :: Result 0x1f1b121f 0x2b2f151d 0x1c131b1e 0x2c232f19 0x141c1a1f 0x242b2e1d 0x1f1b121f 0x2b2f151d delta 13
-vld3.16 {d0-d2} :: Result 0x131b1e1f 0x232f191d 0x1f1c121f 0x2b2b151d 0x141c1a1b 0x242c2e2f 0x131b1e1f 0x232f191d delta 42
+vld3.8 {d20-d22} :: Result 0x1f1b121f 0x2b2f151d 0x1c131b1e 0x2c232f19 0x141c1a1f 0x242b2e1d 0x1f1b121f 0x2b2f151d delta 0
+vld3.16 {d0-d2} :: Result 0x131b1e1f 0x232f191d 0x1f1c121f 0x2b2b151d 0x141c1a1b 0x242c2e2f 0x131b1e1f 0x232f191d delta 0
vld3.32 {d0-d2} :: Result 0x121f1e1f 0x151d191d 0x131b1a1b 0x232f2e2f 0x141c1f1c 0x242c2b2b 0x121f1e1f 0x151d191d delta 0
-vld3.8 {d0,d2,d4} :: Result 0x1f1b121f 0x2b2f151d 0x1c131b1e 0x2c232f19 0x141c1a1f 0x242b2e1d 0x1f1b121f 0x2b2f151d delta -3
-vld3.16 {d20,d22,d24} :: Result 0x131b1e1f 0x232f191d 0x1f1c121f 0x2b2b151d 0x141c1a1b 0x242c2e2f 0x131b1e1f 0x232f191d delta 13
-vld3.32 {d0,d2,d4} :: Result 0x121f1e1f 0x151d191d 0x131b1a1b 0x232f2e2f 0x141c1f1c 0x242c2b2b 0x121f1e1f 0x151d191d delta 13
+vld3.8 {d0,d2,d4} :: Result 0x1f1b121f 0x2b2f151d 0x1c131b1e 0x2c232f19 0x141c1a1f 0x242b2e1d 0x1f1b121f 0x2b2f151d delta 0
+vld3.16 {d20,d22,d24} :: Result 0x131b1e1f 0x232f191d 0x1f1c121f 0x2b2b151d 0x141c1a1b 0x242c2e2f 0x131b1e1f 0x232f191d delta 0
+vld3.32 {d0,d2,d4} :: Result 0x121f1e1f 0x151d191d 0x131b1a1b 0x232f2e2f 0x141c1f1c 0x242c2b2b 0x121f1e1f 0x151d191d delta 0
---- VLD3 (single 3-element structure to one lane) ----
-vld3.32 {d0[0],d1[0],d2[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x131b1a1b 0x55555555 delta 13
-vld3.32 {d0[1],d1[1],d2[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x131b1a1b delta 42
+vld3.32 {d0[0],d1[0],d2[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x131b1a1b 0x55555555 delta 0
+vld3.32 {d0[1],d1[1],d2[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x131b1a1b delta 0
vld3.32 {d0[0],d2[0],d4[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x131b1a1b 0x55555555 delta 0
-vld3.32 {d0[1],d2[1],d4[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x131b1a1b delta -3
-vld3.16 {d1[0],d2[0],d3[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555121f 0x55555555 delta 13
-vld3.16 {d1[1],d2[1],d3[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x121f5555 0x55555555 delta 13
-vld3.16 {d1[2],d2[2],d3[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555121f delta 13
-vld3.16 {d1[3],d2[3],d3[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x121f5555 delta 13
-vld3.16 {d1[0],d3[0],d5[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 delta 13
-vld3.16 {d1[1],d3[1],d5[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 delta 13
-vld3.16 {d1[2],d3[2],d5[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x5555121f 0x55555555 0x55551a1b delta 13
-vld3.16 {d1[3],d3[3],d5[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 delta 13
-vld3.8 {d0[7],d1[7],d2[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 delta 13
-vld3.8 {d1[6],d2[6],d3[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 delta 13
-vld3.8 {d0[5],d1[5],d2[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 delta 13
-vld3.8 {d0[4],d1[4],d2[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551e delta 13
-vld3.8 {d20[3],d21[3],d22[3]} :: Result 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 delta 13
-vld3.8 {d0[2],d1[2],d2[2]} :: Result 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 delta 13
-vld3.8 {d17[1],d18[1],d19[1]} :: Result 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 delta 13
-vld3.8 {d29[0],d30[0],d31[0]} :: Result 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 delta 13
+vld3.32 {d0[1],d2[1],d4[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x131b1a1b delta 0
+vld3.16 {d1[0],d2[0],d3[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555121f 0x55555555 delta 0
+vld3.16 {d1[1],d2[1],d3[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x121f5555 0x55555555 delta 0
+vld3.16 {d1[2],d2[2],d3[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555121f delta 0
+vld3.16 {d1[3],d2[3],d3[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x121f5555 delta 0
+vld3.16 {d1[0],d3[0],d5[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 delta 0
+vld3.16 {d1[1],d3[1],d5[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 delta 0
+vld3.16 {d1[2],d3[2],d5[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x5555121f 0x55555555 0x55551a1b delta 0
+vld3.16 {d1[3],d3[3],d5[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 delta 0
+vld3.8 {d0[7],d1[7],d2[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 delta 0
+vld3.8 {d1[6],d2[6],d3[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 delta 0
+vld3.8 {d0[5],d1[5],d2[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 delta 0
+vld3.8 {d0[4],d1[4],d2[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551e delta 0
+vld3.8 {d20[3],d21[3],d22[3]} :: Result 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 delta 0
+vld3.8 {d0[2],d1[2],d2[2]} :: Result 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 delta 0
+vld3.8 {d17[1],d18[1],d19[1]} :: Result 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 delta 0
+vld3.8 {d29[0],d30[0],d31[0]} :: Result 0x5555551e 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 0x5555551f 0x55555555 delta 0
---- VLD3 (3-elements to all lanes) ----
-vld3.8 {d0[],d1[],d2[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 13
-vld3.16 {d0[],d1[],d2[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x121f121f 0x121f121f delta 42
+vld3.8 {d0[],d1[],d2[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 0
+vld3.16 {d0[],d1[],d2[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x121f121f 0x121f121f delta 0
vld3.32 {d0[],d1[],d2[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x131b1a1b 0x131b1a1b delta 0
-vld3.8 {d9[],d11[],d13[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta -3
-vld3.16 {d17[],d18[],d19[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x121f121f 0x121f121f delta 13
-vld3.32 {d29[],d30[],d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c delta 13
-vld3.8 {d0[],d2[],d4[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 13
-vld3.16 {d0[],d2[],d4[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x121f121f 0x121f121f delta 13
-vld3.32 {d5[],d7[],d9[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x131b1a1b 0x131b1a1b delta 13
+vld3.8 {d9[],d11[],d13[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 0
+vld3.16 {d17[],d18[],d19[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x121f121f 0x121f121f delta 0
+vld3.32 {d29[],d30[],d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c delta 0
+vld3.8 {d0[],d2[],d4[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e delta 0
+vld3.16 {d0[],d2[],d4[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x121f121f 0x121f121f delta 0
+vld3.32 {d5[],d7[],d9[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x131b1a1b 0x131b1a1b delta 0
---- VLD4 (multiple 3-elements) ----
-vld4.8 {d0-d3} :: Result 0x1d1c1b1f 0x2a2b2b2f 0x191f1a1e 0x2d2e2b2e 0x1d1c1b1f 0x2d2a2c2f 0x15141312 0x26252423 delta 13
+vld4.8 {d0-d3} :: Result 0x1d1c1b1f 0x2a2b2b2f 0x191f1a1e 0x2d2e2b2e 0x1d1c1b1f 0x2d2a2c2f 0x15141312 0x26252423 delta 0
vld4.16 {d20-d23} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x141c121f 0x252a232f 0x191d1a1b 0x2d2a2b2b 0x151d131b 0x262d242c delta 0
-vld4.32 {d0-d3} :: Result 0x121f1e1f 0x232f2e2f 0x131b1a1b 0x242c2b2b 0x141c1f1c 0x252a2e2b 0x151d191d 0x262d2d2a delta 42
-vld4.8 {d0,d2,d4,d6} :: Result 0x1d1c1b1f 0x2a2b2b2f 0x191f1a1e 0x2d2e2b2e 0x1d1c1b1f 0x2d2a2c2f 0x15141312 0x26252423 delta -3
-vld4.16 {d1,d3,d5,d7} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x141c121f 0x252a232f 0x191d1a1b 0x2d2a2b2b 0x151d131b 0x262d242c delta 13
-vld4.32 {d20,d22,d24,d26} :: Result 0x121f1e1f 0x232f2e2f 0x131b1a1b 0x242c2b2b 0x141c1f1c 0x252a2e2b 0x151d191d 0x262d2d2a delta 13
+vld4.32 {d0-d3} :: Result 0x121f1e1f 0x232f2e2f 0x131b1a1b 0x242c2b2b 0x141c1f1c 0x252a2e2b 0x151d191d 0x262d2d2a delta 0
+vld4.8 {d0,d2,d4,d6} :: Result 0x1d1c1b1f 0x2a2b2b2f 0x191f1a1e 0x2d2e2b2e 0x1d1c1b1f 0x2d2a2c2f 0x15141312 0x26252423 delta 0
+vld4.16 {d1,d3,d5,d7} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x141c121f 0x252a232f 0x191d1a1b 0x2d2a2b2b 0x151d131b 0x262d242c delta 0
+vld4.32 {d20,d22,d24,d26} :: Result 0x121f1e1f 0x232f2e2f 0x131b1a1b 0x242c2b2b 0x141c1f1c 0x252a2e2b 0x151d191d 0x262d2d2a delta 0
---- VLD4 (single 4-element structure to one lane) ----
-vld4.32 {d0[0],d1[0],d2[0],d3[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x151d191d 0x55555555 delta 13
-vld4.32 {d0[1],d1[1],d2[1],d3[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x55555555 delta 42
+vld4.32 {d0[0],d1[0],d2[0],d3[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x151d191d 0x55555555 delta 0
+vld4.32 {d0[1],d1[1],d2[1],d3[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x55555555 delta 0
vld4.32 {d0[0],d2[0],d4[0],d6[0]} :: Result 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x151d191d 0x55555555 delta 0
-vld4.32 {d0[1],d2[1],d4[1],d6[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x151d191d delta -3
-vld4.16 {d1[0],d2[0],d3[0],d4[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b 0x55555555 delta 13
-vld4.16 {d1[1],d2[1],d3[1],d4[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 0x55555555 delta 13
-vld4.16 {d1[2],d2[2],d3[2],d4[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b delta 13
-vld4.16 {d1[3],d2[3],d3[3],d4[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 delta 13
-vld4.16 {d1[0],d3[0],d5[0],d7[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b 0x55555555 delta 13
-vld4.16 {d1[1],d3[1],d5[1],d7[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 0x55555555 delta 13
-vld4.16 {d1[2],d3[2],d5[2],d7[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b delta 13
-vld4.16 {d1[3],d3[3],d5[3],d7[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 delta 13
-vld4.8 {d0[7],d1[7],d2[7],d3[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x12555555 delta 13
-vld4.8 {d1[6],d2[6],d3[6],d4[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x55125555 delta 13
-vld4.8 {d0[5],d1[5],d2[5],d3[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551255 delta 13
-vld4.8 {d0[4],d1[4],d2[4],d3[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x55555512 delta 13
-vld4.8 {d20[3],d21[3],d22[3],d23[3]} :: Result 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x12555555 0x55555555 delta 13
-vld4.8 {d0[2],d1[2],d2[2],d3[2]} :: Result 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x55125555 0x55555555 delta 13
-vld4.8 {d17[1],d18[1],d19[1],d20[1]} :: Result 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551255 0x55555555 delta 13
-vld4.8 {d28[0],d29[0],d30[0],d31[0]} :: Result 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x55555512 0x55555555 delta 13
----- VLD4 (4-elements to all lanes) ----
-vld4.8 {d0[],d1[],d2[],d3[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x12121212 0x12121212 delta 13
-vld4.16 {d0[],d1[],d2[],d3[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x131b131b 0x131b131b delta 42
-vld4.32 {d0[],d1[],d2[],d3[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x151d191d 0x151d191d delta 0
-vld4.8 {d9[],d11[],d13[],d15[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x12121212 0x12121212 delta -3
-vld4.16 {d17[],d18[],d19[],d20[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x131b131b 0x131b131b delta 13
-vld4.32 {d28[],d29[],d30[],d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x151d191d 0x151d191d delta 13
-vld4.8 {d0[],d2[],d4[],d6[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x12121212 0x12121212 delta 13
-vld4.16 {d0[],d2[],d4[],d6[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x131b131b 0x131b131b delta 13
-vld4.32 {d5[],d7[],d9[],d11[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x151d191d 0x151d191d delta 13
----- VST1 (multiple single elements) ----
-vst1.8 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.16 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 42
-vst1.32 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 0
-vst1.64 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta -3
-vst1.8 {d9} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.16 {d17} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.32 {d31} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.64 {d14} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d0-d1} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.16 {d0-d1} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.32 {d5-d6} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.64 {d30-d31} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 13
-vst1.16 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 13
-vst1.32 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 13
-vst1.64 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 13
-vst1.8 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
-vst1.16 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
-vst1.32 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
-vst1.64 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 13
----- VST1 (single element from one lane) ----
-vst1.32 {d0[0]} :: Result 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.32 {d0[1]} :: Result 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 42
-vst1.16 {d1[0]} :: Result 0x55552e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 0
-vst1.16 {d1[1]} :: Result 0x5555252a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta -3
-vst1.16 {d1[2]} :: Result 0x55552d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.16 {d1[3]} :: Result 0x5555262d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d0[7]} :: Result 0x55555526 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d1[6]} :: Result 0x5555552d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d0[5]} :: Result 0x5555552d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d0[4]} :: Result 0x5555552a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d20[3]} :: Result 0x55555525 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d0[2]} :: Result 0x5555552a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d17[1]} :: Result 0x5555552e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst1.8 {d30[0]} :: Result 0x5555552b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
----- VST2 (multiple 2-elements) ----
-vst2.8 {d30-d31} :: Result 0x2e2e2b2f 0x25232a2f 0x2d2b2a2b 0x26242d2c 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d0-d1} :: Result 0x2e2b2e2f 0x252a232f 0x2d2a2b2b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 delta 42
-vst2.32 {d0-d1} :: Result 0x232f2e2f 0x252a2e2b 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 0
-vst2.8 {d10,d12} :: Result 0x2e2e2b2f 0x25232a2f 0x2d2b2a2b 0x26242d2c 0x55555555 0x55555555 0x55555555 0x55555555 delta -3
-vst2.16 {d20,d22} :: Result 0x2e2b2e2f 0x252a232f 0x2d2a2b2b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.32 {d0,d2} :: Result 0x232f2e2f 0x252a2e2b 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d0-d3} :: Result 0x2e1e2f1f 0x23122f1f 0x2b1a2b1b 0x24132c1b 0x2e1f2b1c 0x25142a1c 0x2d192a1d 0x26152d1d delta 13
-vst2.16 {d20-d23} :: Result 0x2e2f1e1f 0x232f121f 0x2b2b1a1b 0x242c131b 0x2e2b1f1c 0x252a141c 0x2d2a191d 0x262d151d delta 13
-vst2.32 {d0-d3} :: Result 0x121f1e1f 0x232f2e2f 0x131b1a1b 0x242c2b2b 0x141c1f1c 0x252a2e2b 0x151d191d 0x262d2d2a delta 13
----- VST2 (single 2-element structure from one lane) ----
-vst2.32 {d0[0],d1[0]} :: Result 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.32 {d0[1],d1[1]} :: Result 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 42
-vst2.32 {d0[0],d2[0]} :: Result 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 0
-vst2.32 {d0[1],d2[1]} :: Result 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta -3
-vst2.16 {d1[0],d2[0]} :: Result 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d1[1],d2[1]} :: Result 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d1[2],d2[2]} :: Result 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d1[3],d2[3]} :: Result 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d1[0],d3[0]} :: Result 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d1[1],d3[1]} :: Result 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d1[2],d3[2]} :: Result 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.16 {d1[3],d3[3]} :: Result 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d0[7],d1[7]} :: Result 0x55552624 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d1[6],d2[6]} :: Result 0x55552d2c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d0[5],d1[5]} :: Result 0x55552d2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d0[4],d1[4]} :: Result 0x55552a2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d20[3],d21[3]} :: Result 0x55552523 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d0[2],d1[2]} :: Result 0x55552a2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d17[1],d18[1]} :: Result 0x55552e2e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst2.8 {d30[0],d31[0]} :: Result 0x55552b2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
----- VST3 (multiple 3-elements) ----
-vst3.8 {d20-d22} :: Result 0x2e2f1c2b 0x1c2a2e1f 0x2314252f 0x2d2b1d2a 0x1d2d2b19 0x2415262c 0x55555555 0x55555555 delta 13
-vst3.16 {d0-d2} :: Result 0x1f1c2e2b 0x252a2e2f 0x232f141c 0x191d2d2a 0x262d2b2b 0x242c151d 0x55555555 0x55555555 delta 42
-vst3.32 {d0-d2} :: Result 0x252a2e2b 0x141c1f1c 0x232f2e2f 0x262d2d2a 0x151d191d 0x242c2b2b 0x55555555 0x55555555 delta 0
-vst3.8 {d0,d2,d4} :: Result 0x2e2f1c2b 0x1c2a2e1f 0x2314252f 0x2d2b1d2a 0x1d2d2b19 0x2415262c 0x55555555 0x55555555 delta -3
-vst3.16 {d20,d22,d24} :: Result 0x1f1c2e2b 0x252a2e2f 0x232f141c 0x191d2d2a 0x262d2b2b 0x242c151d 0x55555555 0x55555555 delta 13
-vst3.32 {d0,d2,d4} :: Result 0x252a2e2b 0x141c1f1c 0x232f2e2f 0x262d2d2a 0x151d191d 0x242c2b2b 0x55555555 0x55555555 delta 13
----- VST3 (single 3-element structure from one lane) ----
-vst3.32 {d0[0],d1[0],d2[0]} :: Result 0x121f1e1f 0x252a2e2b 0x232f2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.32 {d0[1],d1[1],d2[1]} :: Result 0x131b1a1b 0x262d2d2a 0x242c2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 42
-vst3.32 {d0[0],d2[0],d4[0]} :: Result 0x121f1e1f 0x252a2e2b 0x232f2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 0
-vst3.32 {d0[1],d2[1],d4[1]} :: Result 0x131b1a1b 0x262d2d2a 0x242c2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta -3
-vst3.16 {d1[0],d2[0],d3[0]} :: Result 0x2e2b1e1f 0x55552e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.16 {d1[1],d2[1],d3[1]} :: Result 0x252a121f 0x5555232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.16 {d1[2],d2[2],d3[2]} :: Result 0x2d2a1a1b 0x55552b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.16 {d1[3],d2[3],d3[3]} :: Result 0x262d131b 0x5555242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.16 {d1[0],d3[0],d5[0]} :: Result 0x2e2f1e1f 0x55552e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.16 {d1[1],d3[1],d5[1]} :: Result 0x232f121f 0x5555252a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.16 {d1[2],d3[2],d5[2]} :: Result 0x2b2b1a1b 0x55552d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.16 {d1[3],d3[3],d5[3]} :: Result 0x242c131b 0x5555262d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d0[7],d1[7],d2[7]} :: Result 0x55242613 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d1[6],d2[6],d3[6]} :: Result 0x552c2d1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d0[5],d1[5],d2[5]} :: Result 0x552b2d1a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d0[4],d1[4],d2[4]} :: Result 0x552b2a1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d20[3],d21[3],d22[3]} :: Result 0x55232512 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d0[2],d1[2],d2[2]} :: Result 0x552f2a1f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d17[1],d18[1],d19[1]} :: Result 0x552e2e1e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst3.8 {d29[0],d30[0],d31[0]} :: Result 0x552b1f2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
+vld4.32 {d0[1],d2[1],d4[1],d6[1]} :: Result 0x55555555 0x121f1e1f 0x55555555 0x131b1a1b 0x55555555 0x141c1f1c 0x55555555 0x151d191d delta 0
+vld4.16 {d1[0],d2[0],d3[0],d4[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b 0x55555555 delta 0
+vld4.16 {d1[1],d2[1],d3[1],d4[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 0x55555555 delta 0
+vld4.16 {d1[2],d2[2],d3[2],d4[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b delta 0
+vld4.16 {d1[3],d2[3],d3[3],d4[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 delta 0
+vld4.16 {d1[0],d3[0],d5[0],d7[0]} :: Result 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b 0x55555555 delta 0
+vld4.16 {d1[1],d3[1],d5[1],d7[1]} :: Result 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 0x55555555 delta 0
+vld4.16 {d1[2],d3[2],d5[2],d7[2]} :: Result 0x55555555 0x55551e1f 0x55555555 0x5555121f 0x55555555 0x55551a1b 0x55555555 0x5555131b delta 0
+vld4.16 {d1[3],d3[3],d5[3],d7[3]} :: Result 0x55555555 0x1e1f5555 0x55555555 0x121f5555 0x55555555 0x1a1b5555 0x55555555 0x131b5555 delta 0
+vld4.8 {d0[7],d1[7],d2[7],d3[7]} :: Result 0x55555555 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x12555555 delta 0
+vld4.8 {d1[6],d2[6],d3[6],d4[6]} :: Result 0x55555555 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x55125555 delta 0
+vld4.8 {d0[5],d1[5],d2[5],d3[5]} :: Result 0x55555555 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551255 delta 0
+vld4.8 {d0[4],d1[4],d2[4],d3[4]} :: Result 0x55555555 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x55555512 delta 0
+vld4.8 {d20[3],d21[3],d22[3],d23[3]} :: Result 0x1f555555 0x55555555 0x1e555555 0x55555555 0x1f555555 0x55555555 0x12555555 0x55555555 delta 0
+vld4.8 {d0[2],d1[2],d2[2],d3[2]} :: Result 0x551f5555 0x55555555 0x551e5555 0x55555555 0x551f5555 0x55555555 0x55125555 0x55555555 delta 0
+vld4.8 {d17[1],d18[1],d19[1],d20[1]} :: Result 0x55551f55 0x55555555 0x55551e55 0x55555555 0x55551f55 0x55555555 0x55551255 0x55555555 delta 0
+vld4.8 {d28[0],d29[0],d30[0],d31[0]} :: Result 0x5555551f 0x55555555 0x5555551e 0x55555555 0x5555551f 0x55555555 0x55555512 0x55555555 delta 0
+---- VLD4 (4-elements to all lanes) ----
+vld4.8 {d0[],d1[],d2[],d3[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x12121212 0x12121212 delta 0
+vld4.16 {d0[],d1[],d2[],d3[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x131b131b 0x131b131b delta 0
+vld4.32 {d0[],d1[],d2[],d3[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x151d191d 0x151d191d delta 0
+vld4.8 {d9[],d11[],d13[],d15[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x12121212 0x12121212 delta 0
+vld4.16 {d17[],d18[],d19[],d20[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x131b131b 0x131b131b delta 0
+vld4.32 {d28[],d29[],d30[],d31[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x151d191d 0x151d191d delta 0
+vld4.8 {d0[],d2[],d4[],d6[]} :: Result 0x1f1f1f1f 0x1f1f1f1f 0x1e1e1e1e 0x1e1e1e1e 0x1f1f1f1f 0x1f1f1f1f 0x12121212 0x12121212 delta 0
+vld4.16 {d0[],d2[],d4[],d6[]} :: Result 0x1e1f1e1f 0x1e1f1e1f 0x121f121f 0x121f121f 0x1a1b1a1b 0x1a1b1a1b 0x131b131b 0x131b131b delta 0
+vld4.32 {d5[],d7[],d9[],d11[]} :: Result 0x121f1e1f 0x121f1e1f 0x131b1a1b 0x131b1a1b 0x141c1f1c 0x141c1f1c 0x151d191d 0x151d191d delta 0
+---- VST1 (multiple single elements) ----
+vst1.8 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.16 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069420
+vst1.32 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069424
+vst1.64 {d0} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069428
+vst1.8 {d9} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.16 {d17} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.32 {d31} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.64 {d14} :: Result 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d0-d1} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.16 {d0-d1} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.32 {d5-d6} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.64 {d30-d31} :: Result 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 1069416
+vst1.16 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 1069416
+vst1.32 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 1069416
+vst1.64 {d0-d2} :: Result 0x252a2e2b 0x262d2d2a 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x55555555 0x55555555 delta 1069416
+vst1.8 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 1069416
+vst1.16 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 1069416
+vst1.32 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 1069416
+vst1.64 {d0-d3} :: Result 0x121f1e1f 0x131b1a1b 0x141c1f1c 0x151d191d 0x232f2e2f 0x242c2b2b 0x252a2e2b 0x262d2d2a delta 1069416
+---- VST1 (single element from one lane) ----
+vst1.32 {d0[0]} :: Result 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.32 {d0[1]} :: Result 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069420
+vst1.16 {d1[0]} :: Result 0x55552e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069424
+vst1.16 {d1[1]} :: Result 0x5555252a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069428
+vst1.16 {d1[2]} :: Result 0x55552d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.16 {d1[3]} :: Result 0x5555262d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d0[7]} :: Result 0x55555526 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d1[6]} :: Result 0x5555552d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d0[5]} :: Result 0x5555552d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d0[4]} :: Result 0x5555552a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d20[3]} :: Result 0x55555525 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d0[2]} :: Result 0x5555552a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d17[1]} :: Result 0x5555552e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst1.8 {d30[0]} :: Result 0x5555552b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+---- VST2 (multiple 2-elements) ----
+vst2.8 {d30-d31} :: Result 0x2e2e2b2f 0x25232a2f 0x2d2b2a2b 0x26242d2c 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d0-d1} :: Result 0x2e2b2e2f 0x252a232f 0x2d2a2b2b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069420
+vst2.32 {d0-d1} :: Result 0x232f2e2f 0x252a2e2b 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069424
+vst2.8 {d10,d12} :: Result 0x2e2e2b2f 0x25232a2f 0x2d2b2a2b 0x26242d2c 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069428
+vst2.16 {d20,d22} :: Result 0x2e2b2e2f 0x252a232f 0x2d2a2b2b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.32 {d0,d2} :: Result 0x232f2e2f 0x252a2e2b 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d0-d3} :: Result 0x2e1e2f1f 0x23122f1f 0x2b1a2b1b 0x24132c1b 0x2e1f2b1c 0x25142a1c 0x2d192a1d 0x26152d1d delta 1069416
+vst2.16 {d20-d23} :: Result 0x2e2f1e1f 0x232f121f 0x2b2b1a1b 0x242c131b 0x2e2b1f1c 0x252a141c 0x2d2a191d 0x262d151d delta 1069416
+vst2.32 {d0-d3} :: Result 0x121f1e1f 0x232f2e2f 0x131b1a1b 0x242c2b2b 0x141c1f1c 0x252a2e2b 0x151d191d 0x262d2d2a delta 1069416
+---- VST2 (single 2-element structure from one lane) ----
+vst2.32 {d0[0],d1[0]} :: Result 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.32 {d0[1],d1[1]} :: Result 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069420
+vst2.32 {d0[0],d2[0]} :: Result 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069424
+vst2.32 {d0[1],d2[1]} :: Result 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069428
+vst2.16 {d1[0],d2[0]} :: Result 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d1[1],d2[1]} :: Result 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d1[2],d2[2]} :: Result 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d1[3],d2[3]} :: Result 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d1[0],d3[0]} :: Result 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d1[1],d3[1]} :: Result 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d1[2],d3[2]} :: Result 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.16 {d1[3],d3[3]} :: Result 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d0[7],d1[7]} :: Result 0x55552624 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d1[6],d2[6]} :: Result 0x55552d2c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d0[5],d1[5]} :: Result 0x55552d2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d0[4],d1[4]} :: Result 0x55552a2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d20[3],d21[3]} :: Result 0x55552523 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d0[2],d1[2]} :: Result 0x55552a2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d17[1],d18[1]} :: Result 0x55552e2e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst2.8 {d30[0],d31[0]} :: Result 0x55552b2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+---- VST3 (multiple 3-elements) ----
+vst3.8 {d20-d22} :: Result 0x2e2f1c2b 0x1c2a2e1f 0x2314252f 0x2d2b1d2a 0x1d2d2b19 0x2415262c 0x55555555 0x55555555 delta 1069416
+vst3.16 {d0-d2} :: Result 0x1f1c2e2b 0x252a2e2f 0x232f141c 0x191d2d2a 0x262d2b2b 0x242c151d 0x55555555 0x55555555 delta 1069420
+vst3.32 {d0-d2} :: Result 0x252a2e2b 0x141c1f1c 0x232f2e2f 0x262d2d2a 0x151d191d 0x242c2b2b 0x55555555 0x55555555 delta 1069424
+vst3.8 {d0,d2,d4} :: Result 0x2e2f1c2b 0x1c2a2e1f 0x2314252f 0x2d2b1d2a 0x1d2d2b19 0x2415262c 0x55555555 0x55555555 delta 1069428
+vst3.16 {d20,d22,d24} :: Result 0x1f1c2e2b 0x252a2e2f 0x232f141c 0x191d2d2a 0x262d2b2b 0x242c151d 0x55555555 0x55555555 delta 1069416
+vst3.32 {d0,d2,d4} :: Result 0x252a2e2b 0x141c1f1c 0x232f2e2f 0x262d2d2a 0x151d191d 0x242c2b2b 0x55555555 0x55555555 delta 1069416
+---- VST3 (single 3-element structure from one lane) ----
+vst3.32 {d0[0],d1[0],d2[0]} :: Result 0x121f1e1f 0x252a2e2b 0x232f2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.32 {d0[1],d1[1],d2[1]} :: Result 0x131b1a1b 0x262d2d2a 0x242c2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069420
+vst3.32 {d0[0],d2[0],d4[0]} :: Result 0x121f1e1f 0x252a2e2b 0x232f2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069424
+vst3.32 {d0[1],d2[1],d4[1]} :: Result 0x131b1a1b 0x262d2d2a 0x242c2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069428
+vst3.16 {d1[0],d2[0],d3[0]} :: Result 0x2e2b1e1f 0x55552e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.16 {d1[1],d2[1],d3[1]} :: Result 0x252a121f 0x5555232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.16 {d1[2],d2[2],d3[2]} :: Result 0x2d2a1a1b 0x55552b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.16 {d1[3],d2[3],d3[3]} :: Result 0x262d131b 0x5555242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.16 {d1[0],d3[0],d5[0]} :: Result 0x2e2f1e1f 0x55552e2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.16 {d1[1],d3[1],d5[1]} :: Result 0x232f121f 0x5555252a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.16 {d1[2],d3[2],d5[2]} :: Result 0x2b2b1a1b 0x55552d2a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.16 {d1[3],d3[3],d5[3]} :: Result 0x242c131b 0x5555262d 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d0[7],d1[7],d2[7]} :: Result 0x55242613 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d1[6],d2[6],d3[6]} :: Result 0x552c2d1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d0[5],d1[5],d2[5]} :: Result 0x552b2d1a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d0[4],d1[4],d2[4]} :: Result 0x552b2a1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d20[3],d21[3],d22[3]} :: Result 0x55232512 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d0[2],d1[2],d2[2]} :: Result 0x552f2a1f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d17[1],d18[1],d19[1]} :: Result 0x552e2e1e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst3.8 {d29[0],d30[0],d31[0]} :: Result 0x552b1f2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
---- VST4 (multiple 4-elements) ----
-vst4.8 {d0-d3} :: Result 0x2b2f1c1f 0x2e2e1f1e 0x2a2f1c1f 0x25231412 0x2a2b1d1b 0x2d2b191a 0x2d2c1d1b 0x26241513 delta 13
-vst4.16 {d20-d23} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x141c121f 0x252a232f 0x191d1a1b 0x2d2a2b2b 0x151d131b 0x262d242c delta 42
-vst4.32 {d0-d3} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a delta 0
-vst4.8 {d0,d2,d4,d6} :: Result 0x2b2f1c1f 0x2e2e1f1e 0x2a2f1c1f 0x25231412 0x2a2b1d1b 0x2d2b191a 0x2d2c1d1b 0x26241513 delta -3
-vst4.16 {d1,d3,d5,d7} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x141c121f 0x252a232f 0x191d1a1b 0x2d2a2b2b 0x151d131b 0x262d242c delta 13
-vst4.32 {d20,d22,d24,d26} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a delta 13
+vst4.8 {d0-d3} :: Result 0x2b2f1c1f 0x2e2e1f1e 0x2a2f1c1f 0x25231412 0x2a2b1d1b 0x2d2b191a 0x2d2c1d1b 0x26241513 delta 1069416
+vst4.16 {d20-d23} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x141c121f 0x252a232f 0x191d1a1b 0x2d2a2b2b 0x151d131b 0x262d242c delta 1069420
+vst4.32 {d0-d3} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a delta 1069424
+vst4.8 {d0,d2,d4,d6} :: Result 0x2b2f1c1f 0x2e2e1f1e 0x2a2f1c1f 0x25231412 0x2a2b1d1b 0x2d2b191a 0x2d2c1d1b 0x26241513 delta 1069428
+vst4.16 {d1,d3,d5,d7} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x141c121f 0x252a232f 0x191d1a1b 0x2d2a2b2b 0x151d131b 0x262d242c delta 1069416
+vst4.32 {d20,d22,d24,d26} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a delta 1069416
---- VST4 (single 4-element structure from one lane) ----
-vst4.32 {d0[0],d1[0],d2[0],d3[0]} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.32 {d0[1],d1[1],d2[1],d3[1]} :: Result 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 42
-vst4.32 {d0[0],d2[0],d4[0],d6[0]} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 delta 0
-vst4.32 {d0[1],d2[1],d4[1],d6[1]} :: Result 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta -3
-vst4.16 {d1[0],d2[0],d3[0],d4[0]} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.16 {d1[1],d2[1],d3[1],d4[1]} :: Result 0x141c121f 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.16 {d1[2],d2[2],d3[2],d4[2]} :: Result 0x191d1a1b 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.16 {d1[3],d2[3],d3[3],d4[3]} :: Result 0x151d131b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.16 {d1[0],d3[0],d5[0],d7[0]} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.16 {d1[1],d3[1],d5[1],d7[1]} :: Result 0x141c121f 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.16 {d1[2],d3[2],d5[2],d7[2]} :: Result 0x191d1a1b 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.16 {d1[3],d3[3],d5[3],d7[3]} :: Result 0x151d131b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d0[7],d1[7],d2[7],d3[7]} :: Result 0x26241513 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d1[6],d2[6],d3[6],d4[6]} :: Result 0x2d2c1d1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d0[5],d1[5],d2[5],d3[5]} :: Result 0x2d2b191a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d0[4],d1[4],d2[4],d3[4]} :: Result 0x2a2b1d1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d20[3],d21[3],d22[3],d23[3]} :: Result 0x25231412 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d0[2],d1[2],d2[2],d3[2]} :: Result 0x2a2f1c1f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d17[1],d18[1],d19[1],d20[1]} :: Result 0x2e2e1f1e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
-vst4.8 {d28[0],d29[0],d30[0],d31[0]} :: Result 0x2b2f1c1f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 13
+vst4.32 {d0[0],d1[0],d2[0],d3[0]} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.32 {d0[1],d1[1],d2[1],d3[1]} :: Result 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069420
+vst4.32 {d0[0],d2[0],d4[0],d6[0]} :: Result 0x121f1e1f 0x141c1f1c 0x232f2e2f 0x252a2e2b 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069424
+vst4.32 {d0[1],d2[1],d4[1],d6[1]} :: Result 0x131b1a1b 0x151d191d 0x242c2b2b 0x262d2d2a 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069428
+vst4.16 {d1[0],d2[0],d3[0],d4[0]} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.16 {d1[1],d2[1],d3[1],d4[1]} :: Result 0x141c121f 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.16 {d1[2],d2[2],d3[2],d4[2]} :: Result 0x191d1a1b 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.16 {d1[3],d2[3],d3[3],d4[3]} :: Result 0x151d131b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.16 {d1[0],d3[0],d5[0],d7[0]} :: Result 0x1f1c1e1f 0x2e2b2e2f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.16 {d1[1],d3[1],d5[1],d7[1]} :: Result 0x141c121f 0x252a232f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.16 {d1[2],d3[2],d5[2],d7[2]} :: Result 0x191d1a1b 0x2d2a2b2b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.16 {d1[3],d3[3],d5[3],d7[3]} :: Result 0x151d131b 0x262d242c 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d0[7],d1[7],d2[7],d3[7]} :: Result 0x26241513 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d1[6],d2[6],d3[6],d4[6]} :: Result 0x2d2c1d1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d0[5],d1[5],d2[5],d3[5]} :: Result 0x2d2b191a 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d0[4],d1[4],d2[4],d3[4]} :: Result 0x2a2b1d1b 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d20[3],d21[3],d22[3],d23[3]} :: Result 0x25231412 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d0[2],d1[2],d2[2],d3[2]} :: Result 0x2a2f1c1f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d17[1],d18[1],d19[1],d20[1]} :: Result 0x2e2e1f1e 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
+vst4.8 {d28[0],d29[0],d30[0],d31[0]} :: Result 0x2b2f1c1f 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 0x55555555 delta 1069416
---- VMOVN ----
vmovn.i32 d0, q0 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024
+vmovn.i32 d0, q0 :: Qd 0x00240024 0x55555555 Qm (i32)0x00000032 Qn (i32)0x00000024
vmovn.i16 d7, q5 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024
+vmovn.i16 d7, q5 :: Qd 0x00240024 0x1b1b1f1f Qm (i32)0x00000032 Qn (i32)0x00000024
vmovn.i64 d31, q0 :: Qd 0x00000024 0x00000032 Qm (i32)0x00000032 Qn (i32)0x00000024
+vmovn.i64 d31, q0 :: Qd 0x00000024 0x121f1e1f Qm (i32)0x00000032 Qn (i32)0x00000024
vmovn.i32 d0, q0 :: Qd 0xf0f0f0f0 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000f0
+vmovn.i32 d0, q0 :: Qd 0xf0f0f0f0 0x55555555 Qm (i8)0x000000ff Qn (i8)0x000000f0
vmovn.i16 d7, q5 :: Qd 0xefefefef 0xadadadad Qm (i16)0x0000dead Qn (i16)0x0000beef
+vmovn.i16 d7, q5 :: Qd 0xefefefef 0x1b1b1f1f Qm (i16)0x0000dead Qn (i16)0x0000beef
vmovn.i64 d31, q0 :: Qd 0x24242424 0xff00fe0f Qm (i32)0xff00fe0f Qn (i8)0x00000024
+vmovn.i64 d31, q0 :: Qd 0x24242424 0x121f1e1f Qm (i32)0xff00fe0f Qn (i8)0x00000024
---- VQMOVN ----
vqmovn.u32 d0, q0 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 00000000
+vqmovn.u32 d0, q0 :: Qd 0x00240024 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovn.u16 d7, q5 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 00000000
+vqmovn.u16 d7, q5 :: Qd 0x00240024 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
+vqmovn.u64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovn.u64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovn.u32 d0, q0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000f0 fpscr: 08000000
+vqmovn.u32 d0, q0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000f0 fpscr: 08000000
+vqmovn.u16 d7, q5 :: Qd 0xffffffff 0xffffffff Qm (i16)0x0000dead Qn (i16)0x0000beef fpscr: 08000000
vqmovn.u16 d7, q5 :: Qd 0xffffffff 0xffffffff Qm (i16)0x0000dead Qn (i16)0x0000beef fpscr: 08000000
vqmovn.u64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff00fe0f Qn (i8)0x00000024 fpscr: 08000000
+vqmovn.u64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff00fe0f Qn (i8)0x00000024 fpscr: 08000000
vqmovn.s32 d0, q0 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 00000000
+vqmovn.s32 d0, q0 :: Qd 0x00240024 0x7fff7fff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovn.s16 d7, q5 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 00000000
+vqmovn.s16 d7, q5 :: Qd 0x00240024 0x7f7f7f7f Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
+vqmovn.s64 d31, q0 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovn.s64 d31, q0 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovn.s32 d0, q0 :: Qd 0x80008000 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000f0 fpscr: 08000000
+vqmovn.s32 d0, q0 :: Qd 0x80008000 0x7fff7fff Qm (i8)0x000000ff Qn (i8)0x000000f0 fpscr: 08000000
vqmovn.s16 d7, q5 :: Qd 0x80808080 0x80808080 Qm (i16)0x0000dead Qn (i16)0x0000beef fpscr: 08000000
+vqmovn.s16 d7, q5 :: Qd 0x80808080 0x7f7f7f7f Qm (i16)0x0000dead Qn (i16)0x0000beef fpscr: 08000000
vqmovn.s64 d31, q0 :: Qd 0x7fffffff 0x80000000 Qm (i32)0xff00fe0f Qn (i8)0x00000024 fpscr: 08000000
+vqmovn.s64 d31, q0 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xff00fe0f Qn (i8)0x00000024 fpscr: 08000000
vqmovn.s32 d0, q0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 00000000
+vqmovn.s32 d0, q0 :: Qd 0xffffffff 0x7fff7fff Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 08000000
vqmovn.s16 d7, q5 :: Qd 0x7f7f7f7f 0xffffffff Qm (i8)0x000000ff Qn (i16)0x000000ff fpscr: 08000000
+vqmovn.s16 d7, q5 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i8)0x000000ff Qn (i16)0x000000ff fpscr: 08000000
vqmovn.s64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 00000000
+vqmovn.s64 d31, q0 :: Qd 0xffffffff 0x7fffffff Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 08000000
---- VQMOVN ----
vqmovun.s32 d0, q0 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 00000000
+vqmovun.s32 d0, q0 :: Qd 0x00240024 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovun.s16 d7, q5 :: Qd 0x00240024 0x00320032 Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 00000000
+vqmovun.s16 d7, q5 :: Qd 0x00240024 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
+vqmovun.s64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovun.s64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000032 Qn (i32)0x00000024 fpscr: 08000000
vqmovun.s32 d0, q0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff Qn (i8)0x000000f0 fpscr: 08000000
+vqmovun.s32 d0, q0 :: Qd 0x00000000 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000f0 fpscr: 08000000
vqmovun.s16 d7, q5 :: Qd 0x00000000 0x00000000 Qm (i16)0x0000dead Qn (i16)0x0000beef fpscr: 08000000
+vqmovun.s16 d7, q5 :: Qd 0x00000000 0xffffffff Qm (i16)0x0000dead Qn (i16)0x0000beef fpscr: 08000000
vqmovun.s64 d31, q0 :: Qd 0xffffffff 0x00000000 Qm (i32)0xff00fe0f Qn (i8)0x00000024 fpscr: 08000000
+vqmovun.s64 d31, q0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff00fe0f Qn (i8)0x00000024 fpscr: 08000000
vqmovun.s32 d0, q0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 08000000
+vqmovun.s32 d0, q0 :: Qd 0x00000000 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 08000000
vqmovun.s16 d7, q5 :: Qd 0xffffffff 0x00000000 Qm (i8)0x000000ff Qn (i16)0x000000ff fpscr: 08000000
+vqmovun.s16 d7, q5 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ff Qn (i16)0x000000ff fpscr: 08000000
vqmovun.s64 d31, q0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 08000000
+vqmovun.s64 d31, q0 :: Qd 0x00000000 0xffffffff Qm (i8)0x000000ff Qn (i8)0x000000ff fpscr: 08000000
---- VABS ----
vabs.s32 d0, d1 :: Qd 0x00000073 0x00000073 Qm (i32)0x00000073
+vabs.s32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000073
vabs.s16 d15, d4 :: Qd 0x00000073 0x00000073 Qm (i32)0x00000073
+vabs.s16 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000073
vabs.s8 d8, d7 :: Qd 0x00000073 0x00000073 Qm (i32)0x00000073
+vabs.s8 d8, d7 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000073
vabs.s32 d0, d1 :: Qd 0x000000fe 0x000000fe Qm (i32)0x000000fe
+vabs.s32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x000000fe
vabs.s16 d31, d4 :: Qd 0x000000ef 0x000000ef Qm (i32)0x000000ef
+vabs.s16 d31, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x000000ef
vabs.s8 d8, d7 :: Qd 0x00000022 0x00000022 Qm (i32)0x000000de
+vabs.s8 d8, d7 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x000000de
vabs.s32 d0, d1 :: Qd 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a
+vabs.s32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i16)0x0000fe0a
vabs.s16 d15, d4 :: Qd 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b
+vabs.s16 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i16)0x0000ef0b
vabs.s8 d8, d7 :: Qd 0x220c220c 0x220c220c Qm (i16)0x0000de0c
+vabs.s8 d8, d7 :: Qd 0x151d191d 0x141c1f1c Qm (i16)0x0000de0c
---- VQABS ----
vqabs.s32 d0, d1 :: Qd 0x00000073 0x00000073 Qm (i32)0x00000073 fpscr 00000000
+vqabs.s32 d0, d1 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000073 fpscr 00000000
vqabs.s32 d0, d1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x80000000 fpscr 08000000
+vqabs.s32 d0, d1 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000000 fpscr 00000000
vqabs.s16 d0, d1 :: Qd 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 fpscr 08000000
+vqabs.s16 d0, d1 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000000 fpscr 00000000
vqabs.s8 d0, d1 :: Qd 0x7f000000 0x7f000000 Qm (i32)0x80000000 fpscr 08000000
+vqabs.s8 d0, d1 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x80000000 fpscr 00000000
vqabs.s16 d15, d4 :: Qd 0x00000073 0x00000073 Qm (i32)0x00000073 fpscr 00000000
+vqabs.s16 d15, d4 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000073 fpscr 00000000
vqabs.s8 d8, d7 :: Qd 0x00000073 0x00000073 Qm (i32)0x00000073 fpscr 00000000
+vqabs.s8 d8, d7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000073 fpscr 00000000
vqabs.s32 d0, d1 :: Qd 0x000000fe 0x000000fe Qm (i32)0x000000fe fpscr 00000000
+vqabs.s32 d0, d1 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x000000fe fpscr 00000000
vqabs.s16 d31, d4 :: Qd 0x000000ef 0x000000ef Qm (i32)0x000000ef fpscr 00000000
+vqabs.s16 d31, d4 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x000000ef fpscr 00000000
vqabs.s8 d8, d7 :: Qd 0x00000022 0x00000022 Qm (i32)0x000000de fpscr 00000000
+vqabs.s8 d8, d7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x000000de fpscr 00000000
vqabs.s32 d0, d1 :: Qd 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a fpscr 00000000
+vqabs.s32 d0, d1 :: Qd 0x131b1a1b 0x121f1e1f Qm (i16)0x0000fe0a fpscr 00000000
vqabs.s16 d15, d4 :: Qd 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b fpscr 00000000
+vqabs.s16 d15, d4 :: Qd 0x131b1a1b 0x121f1e1f Qm (i16)0x0000ef0b fpscr 00000000
vqabs.s8 d8, d7 :: Qd 0x220c220c 0x220c220c Qm (i16)0x0000de0c fpscr 00000000
+vqabs.s8 d8, d7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i16)0x0000de0c fpscr 00000000
---- VADDHN ----
vaddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vaddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
vaddhn.i16 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vaddhn.i16 d0, q1, q2 :: Qd 0x1519141f 0x131a121e Qm (i32)0x00000073 Qn (i32)0x00000072
vaddhn.i32 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vaddhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i32)0x00000073 Qn (i32)0x00000072
vaddhn.i64 d0, q1, q2 :: Qd 0x000000e5 0x000000e5 Qm (i32)0x00000073 Qn (i32)0x00000072
+vaddhn.i64 d0, q1, q2 :: Qd 0x151d198f 0x131b1a8d Qm (i32)0x00000073 Qn (i32)0x00000072
vaddhn.i16 d0, q15, q2 :: Qd 0xeff0eff0 0xeff0eff0 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vaddhn.i16 d0, q15, q2 :: Qd 0x151a1420 0x131b121f Qm (i16)0x0000ef73 Qn (i32)0x00000172
vaddhn.i32 d31, q1, q2 :: Qd 0xef73ef73 0xef73ef73 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vaddhn.i32 d31, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i16)0x0000ef73 Qn (i32)0x00000172
vaddhn.i64 d0, q1, q8 :: Qd 0xef73f0e5 0xef73f0e5 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vaddhn.i64 d0, q1, q8 :: Qd 0x151d1a8f 0x131b1b8d Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vaddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vaddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vaddhn.i16 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000072
+vaddhn.i16 d0, q1, q2 :: Qd 0x1519141f 0x131a121e Qm (i8)0x00000073 Qn (i32)0x00000072
vaddhn.i32 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000072
+vaddhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i8)0x00000073 Qn (i32)0x00000072
vaddhn.i64 d0, q1, q2 :: Qd 0x737373e5 0x737373e5 Qm (i8)0x00000073 Qn (i32)0x00000072
+vaddhn.i64 d0, q1, q2 :: Qd 0x151d198f 0x131b1a8d Qm (i8)0x00000073 Qn (i32)0x00000072
---- VRADDHN ----
vraddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vraddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
vraddhn.i16 d0, q1, q2 :: Qd 0x00010001 0x00010001 Qm (i32)0x00000073 Qn (i32)0x00000072
+vraddhn.i16 d0, q1, q2 :: Qd 0x151a1420 0x131b121f Qm (i32)0x00000073 Qn (i32)0x00000072
vraddhn.i32 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vraddhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i32)0x00000073 Qn (i32)0x00000072
vraddhn.i64 d0, q1, q2 :: Qd 0x000000e5 0x000000e5 Qm (i32)0x00000073 Qn (i32)0x00000072
+vraddhn.i64 d0, q1, q2 :: Qd 0x151d198f 0x131b1a8d Qm (i32)0x00000073 Qn (i32)0x00000072
vraddhn.i16 d0, q15, q2 :: Qd 0xeff1eff1 0xeff1eff1 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vraddhn.i16 d0, q15, q2 :: Qd 0x151b1421 0x131c1220 Qm (i16)0x0000ef73 Qn (i32)0x00000172
vraddhn.i32 d31, q1, q2 :: Qd 0xef74ef74 0xef74ef74 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vraddhn.i32 d31, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i16)0x0000ef73 Qn (i32)0x00000172
vraddhn.i64 d0, q1, q8 :: Qd 0xef73f0e6 0xef73f0e6 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vraddhn.i64 d0, q1, q8 :: Qd 0x151d1a8f 0x131b1b8d Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vraddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vraddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vraddhn.i16 d0, q1, q2 :: Qd 0x73747374 0x73747374 Qm (i8)0x00000073 Qn (i32)0x00000072
+vraddhn.i16 d0, q1, q2 :: Qd 0x151a1420 0x131b121f Qm (i8)0x00000073 Qn (i32)0x00000072
vraddhn.i32 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000072
+vraddhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i8)0x00000073 Qn (i32)0x00000072
vraddhn.i64 d0, q1, q2 :: Qd 0x737373e5 0x737373e5 Qm (i8)0x00000073 Qn (i32)0x00000072
+vraddhn.i64 d0, q1, q2 :: Qd 0x151d198f 0x131b1a8d Qm (i8)0x00000073 Qn (i32)0x00000072
vraddhn.i16 d0, q15, q2 :: Qd 0xeff0eff0 0xeff0eff0 Qm (i16)0x0000ef73 Qn (i32)0x00000102
+vraddhn.i16 d0, q15, q2 :: Qd 0x151a1420 0x131b121f Qm (i16)0x0000ef73 Qn (i32)0x00000102
vraddhn.i32 d31, q1, q2 :: Qd 0xef74ef74 0xef74ef74 Qm (i16)0x0000ef73 Qn (i32)0x00000102
+vraddhn.i32 d31, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i16)0x0000ef73 Qn (i32)0x00000102
vraddhn.i64 d0, q1, q8 :: Qd 0xef73f076 0xef73f076 Qm (i16)0x0000ef73 Qn (i32)0x00000102
+vraddhn.i64 d0, q1, q8 :: Qd 0x151d1a1f 0x131b1b1d Qm (i16)0x0000ef73 Qn (i32)0x00000102
+vraddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000002
vraddhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000002
vraddhn.i16 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000002
+vraddhn.i16 d0, q1, q2 :: Qd 0x1519141f 0x131a121e Qm (i8)0x00000073 Qn (i32)0x00000002
vraddhn.i32 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000002
+vraddhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i8)0x00000073 Qn (i32)0x00000002
vraddhn.i64 d0, q1, q2 :: Qd 0x73737375 0x73737375 Qm (i8)0x00000073 Qn (i32)0x00000002
+vraddhn.i64 d0, q1, q2 :: Qd 0x151d191f 0x131b1a1d Qm (i8)0x00000073 Qn (i32)0x00000002
---- VSUBHN ----
vsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
vsubhn.i16 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vsubhn.i16 d0, q1, q2 :: Qd 0x1518141e 0x1319121d Qm (i32)0x00000073 Qn (i32)0x00000072
vsubhn.i32 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vsubhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i32)0x00000073 Qn (i32)0x00000072
vsubhn.i64 d0, q1, q2 :: Qd 0x00000001 0x00000001 Qm (i32)0x00000073 Qn (i32)0x00000072
+vsubhn.i64 d0, q1, q2 :: Qd 0x151d18ab 0x131b19a9 Qm (i32)0x00000073 Qn (i32)0x00000072
vsubhn.i16 d0, q15, q2 :: Qd 0xefeeefee 0xefeeefee Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vsubhn.i16 d0, q15, q2 :: Qd 0x1517141d 0x1318121c Qm (i16)0x0000ef73 Qn (i32)0x00000172
vsubhn.i32 d31, q1, q2 :: Qd 0xef73ef73 0xef73ef73 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vsubhn.i32 d31, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i16)0x0000ef73 Qn (i32)0x00000172
vsubhn.i64 d0, q1, q8 :: Qd 0xef73ee01 0xef73ee01 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vsubhn.i64 d0, q1, q8 :: Qd 0x151d17ab 0x131b18a9 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vsubhn.i16 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000072
+vsubhn.i16 d0, q1, q2 :: Qd 0x1518141e 0x1319121d Qm (i8)0x00000073 Qn (i32)0x00000072
vsubhn.i32 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000072
+vsubhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i8)0x00000073 Qn (i32)0x00000072
vsubhn.i64 d0, q1, q2 :: Qd 0x73737301 0x73737301 Qm (i8)0x00000073 Qn (i32)0x00000072
+vsubhn.i64 d0, q1, q2 :: Qd 0x151d18ab 0x131b19a9 Qm (i8)0x00000073 Qn (i32)0x00000072
---- VRSUBHN ----
vrsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vrsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
vrsubhn.i16 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vrsubhn.i16 d0, q1, q2 :: Qd 0x1519141f 0x131a121e Qm (i32)0x00000073 Qn (i32)0x00000072
vrsubhn.i32 d0, q1, q2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000073 Qn (i32)0x00000072
+vrsubhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i32)0x00000073 Qn (i32)0x00000072
vrsubhn.i64 d0, q1, q2 :: Qd 0x00000001 0x00000001 Qm (i32)0x00000073 Qn (i32)0x00000072
+vrsubhn.i64 d0, q1, q2 :: Qd 0x151d18ab 0x131b19a9 Qm (i32)0x00000073 Qn (i32)0x00000072
vrsubhn.i16 d0, q15, q2 :: Qd 0xefeeefee 0xefeeefee Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vrsubhn.i16 d0, q15, q2 :: Qd 0x1518141e 0x1319121d Qm (i16)0x0000ef73 Qn (i32)0x00000172
vrsubhn.i32 d31, q1, q2 :: Qd 0xef74ef74 0xef74ef74 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vrsubhn.i32 d31, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i16)0x0000ef73 Qn (i32)0x00000172
vrsubhn.i64 d0, q1, q8 :: Qd 0xef73ee02 0xef73ee02 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vrsubhn.i64 d0, q1, q8 :: Qd 0x151d17ab 0x131b18a9 Qm (i16)0x0000ef73 Qn (i32)0x00000172
+vrsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vrsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000073 Qn (i32)0x00000072
vrsubhn.i16 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000072
+vrsubhn.i16 d0, q1, q2 :: Qd 0x1519141f 0x131a121e Qm (i8)0x00000073 Qn (i32)0x00000072
vrsubhn.i32 d0, q1, q2 :: Qd 0x73737373 0x73737373 Qm (i8)0x00000073 Qn (i32)0x00000072
+vrsubhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i8)0x00000073 Qn (i32)0x00000072
vrsubhn.i64 d0, q1, q2 :: Qd 0x73737301 0x73737301 Qm (i8)0x00000073 Qn (i32)0x00000072
+vrsubhn.i64 d0, q1, q2 :: Qd 0x151d18ab 0x131b19a9 Qm (i8)0x00000073 Qn (i32)0x00000072
vrsubhn.i16 d0, q15, q2 :: Qd 0xf0eff0ef 0xf0eff0ef Qm (i16)0x0000ef93 Qn (i32)0x00000102
+vrsubhn.i16 d0, q15, q2 :: Qd 0x1518141e 0x1319121d Qm (i16)0x0000ef93 Qn (i32)0x00000102
vrsubhn.i32 d31, q1, q2 :: Qd 0xef94ef94 0xef94ef94 Qm (i16)0x0000ef93 Qn (i32)0x00000102
+vrsubhn.i32 d31, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i16)0x0000ef93 Qn (i32)0x00000102
vrsubhn.i64 d0, q1, q8 :: Qd 0xef93ee92 0xef93ee92 Qm (i16)0x0000ef93 Qn (i32)0x00000102
+vrsubhn.i64 d0, q1, q8 :: Qd 0x151d181b 0x131b1919 Qm (i16)0x0000ef93 Qn (i32)0x00000102
+vrsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000093 Qn (i32)0x00000002
vrsubhn.i32 d0, q1, q1 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000093 Qn (i32)0x00000002
vrsubhn.i16 d0, q1, q2 :: Qd 0x94949494 0x94949494 Qm (i8)0x00000093 Qn (i32)0x00000002
+vrsubhn.i16 d0, q1, q2 :: Qd 0x1519141f 0x131a121e Qm (i8)0x00000093 Qn (i32)0x00000002
vrsubhn.i32 d0, q1, q2 :: Qd 0x93949394 0x93949394 Qm (i8)0x00000093 Qn (i32)0x00000002
+vrsubhn.i32 d0, q1, q2 :: Qd 0x151d141c 0x131b121f Qm (i8)0x00000093 Qn (i32)0x00000002
vrsubhn.i64 d0, q1, q2 :: Qd 0x93939392 0x93939392 Qm (i8)0x00000093 Qn (i32)0x00000002
+vrsubhn.i64 d0, q1, q2 :: Qd 0x151d191b 0x131b1a19 Qm (i8)0x00000093 Qn (i32)0x00000002
---- VCEQ #0 ----
vceq.i32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
+vceq.i32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vceq.i16 d2, d1, #0 :: Qd 0xffff0000 0xffff0000 Qm (i32)0x00000021
+vceq.i16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vceq.i8 d10, d11, #0 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x00000021
+vceq.i8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vceq.i32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.i32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vceq.i16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.i16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vceq.i8 d10, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.i8 d10, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
---- VCGT #0 ----
vcgt.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcgt.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
vcgt.s16 d2, d1, #0 :: Qd 0x0000ffff 0x0000ffff Qm (i32)0x00000021
+vcgt.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
vcgt.s8 d10, d31, #0 :: Qd 0x000000ff 0x000000ff Qm (i32)0x00000021
+vcgt.s8 d10, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
vcgt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.s8 d10, d11, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ef
+vcgt.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ef
vcgt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ed
+vcgt.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ed
vcgt.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ae
+vcgt.s8 d10, d11, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ae
---- VCGE #0 ----
vcge.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcge.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
vcge.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcge.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
+vcge.s8 d10, d11, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
vcge.s8 d10, d11, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000021
vcge.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcge.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcge.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.s8 d10, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcge.s8 d10, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ef
+vcge.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ef
vcge.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ed
+vcge.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ed
vcge.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ae
+vcge.s8 d10, d11, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ae
+vcge.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000000ef
vcge.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000000ef
vcge.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000000ed
+vcge.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000000ed
vcge.s8 d10, d11, #0 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x000000ae
+vcge.s8 d10, d11, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000000ae
---- VCLE #0 ----
vcle.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
+vcle.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vcle.s16 d2, d1, #0 :: Qd 0xffff0000 0xffff0000 Qm (i32)0x00000021
+vcle.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vcle.s8 d10, d11, #0 :: Qd 0xffffff00 0xffffff00 Qm (i32)0x00000021
+vcle.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vcle.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcle.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcle.s8 d10, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.s8 d10, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcle.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ef
+vcle.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ef
vcle.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ed
+vcle.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ed
vcle.s8 d10, d11, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ae
+vcle.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ae
---- VCLT #0 ----
vclt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
+vclt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vclt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
+vclt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
+vclt.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vclt.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000021
vclt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vclt.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.s32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ef
+vclt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ef
vclt.s16 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ed
+vclt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ed
vclt.s8 d10, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i8)0x000000ae
+vclt.s8 d10, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ae
+vclt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x000000ef
vclt.s32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x000000ef
vclt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x000000ed
+vclt.s16 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x000000ed
vclt.s8 d10, d11, #0 :: Qd 0x000000ff 0x000000ff Qm (i32)0x000000ae
+vclt.s8 d10, d11, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x000000ae
---- VCNT ----
vcnt.8 d0, d1 :: Qd 0x04050306 0x04050306 Qm (i32)0xac3d25eb
+vcnt.8 d0, d1 :: Qd 0x03040304 0x02030503 Qm (i32)0xac3d25eb
vcnt.8 d11, d14 :: Qd 0x04050306 0x04050306 Qm (i32)0xac3d25eb
+vcnt.8 d11, d14 :: Qd 0x03040304 0x02030503 Qm (i32)0xac3d25eb
vcnt.8 d6, d2 :: Qd 0x00020306 0x00020306 Qm (i32)0x000ad0eb
+vcnt.8 d6, d2 :: Qd 0x03040304 0x02030503 Qm (i32)0x000ad0eb
---- VCLS ----
vcls.s8 d0, d1 :: Qd 0x07070701 0x07070701 Qm (i32)0x00000021
+vcls.s8 d0, d1 :: Qd 0x02020202 0x02020202 Qm (i32)0x00000021
vcls.s8 d30, d31 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000082
+vcls.s8 d30, d31 :: Qd 0x02020202 0x02020202 Qm (i8)0x00000082
vcls.s16 d0, d1 :: Qd 0x000f0009 0x000f0009 Qm (i32)0x00000021
+vcls.s16 d0, d1 :: Qd 0x00020002 0x00020002 Qm (i32)0x00000021
vcls.s16 d31, d30 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000082
+vcls.s16 d31, d30 :: Qd 0x00020002 0x00020002 Qm (i8)0x00000082
vcls.s32 d6, d1 :: Qd 0x00000019 0x00000019 Qm (i32)0x00000021
+vcls.s32 d6, d1 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000021
vcls.s32 d30, d5 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000082
+vcls.s32 d30, d5 :: Qd 0x00000002 0x00000002 Qm (i8)0x00000082
vcls.s8 d2, d4 :: Qd 0x07070707 0x07070707 Qm (i8)0x000000ff
+vcls.s8 d2, d4 :: Qd 0x02020202 0x02020202 Qm (i8)0x000000ff
vcls.s16 d2, d4 :: Qd 0x000f000f 0x000f000f Qm (i8)0x000000ff
+vcls.s16 d2, d4 :: Qd 0x00020002 0x00020002 Qm (i8)0x000000ff
vcls.s32 d2, d4 :: Qd 0x0000001f 0x0000001f Qm (i8)0x000000ff
+vcls.s32 d2, d4 :: Qd 0x00000002 0x00000002 Qm (i8)0x000000ff
vcls.s8 d2, d4 :: Qd 0x07020702 0x07020702 Qm (i16)0x0000ffef
+vcls.s8 d2, d4 :: Qd 0x02020202 0x02020202 Qm (i16)0x0000ffef
vcls.s16 d2, d4 :: Qd 0x000a000a 0x000a000a Qm (i16)0x0000ffef
+vcls.s16 d2, d4 :: Qd 0x00020002 0x00020002 Qm (i16)0x0000ffef
vcls.s32 d2, d4 :: Qd 0x0000000a 0x0000000a Qm (i16)0x0000ffef
+vcls.s32 d2, d4 :: Qd 0x00000002 0x00000002 Qm (i16)0x0000ffef
vcls.s8 d2, d4 :: Qd 0x07070707 0x07070707 Qm (i8)0x00000000
+vcls.s8 d2, d4 :: Qd 0x02020202 0x02020202 Qm (i8)0x00000000
vcls.s16 d2, d4 :: Qd 0x000f000f 0x000f000f Qm (i8)0x00000000
+vcls.s16 d2, d4 :: Qd 0x00020002 0x00020002 Qm (i8)0x00000000
vcls.s32 d2, d4 :: Qd 0x0000001f 0x0000001f Qm (i8)0x00000000
+vcls.s32 d2, d4 :: Qd 0x00000002 0x00000002 Qm (i8)0x00000000
vcls.s8 d2, d4 :: Qd 0x07020702 0x07020702 Qm (i16)0x000000ef
+vcls.s8 d2, d4 :: Qd 0x02020202 0x02020202 Qm (i16)0x000000ef
vcls.s16 d2, d4 :: Qd 0x00070007 0x00070007 Qm (i16)0x000000ef
+vcls.s16 d2, d4 :: Qd 0x00020002 0x00020002 Qm (i16)0x000000ef
vcls.s32 d2, d4 :: Qd 0x00000007 0x00000007 Qm (i16)0x000000ef
+vcls.s32 d2, d4 :: Qd 0x00000002 0x00000002 Qm (i16)0x000000ef
---- VCLZ ----
vclz.i8 d0, d1 :: Qd 0x08080802 0x08080802 Qm (i32)0x00000021
+vclz.i8 d0, d1 :: Qd 0x03030303 0x03030303 Qm (i32)0x00000021
vclz.i8 d30, d31 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000082
+vclz.i8 d30, d31 :: Qd 0x03030303 0x03030303 Qm (i8)0x00000082
vclz.i16 d0, d1 :: Qd 0x0010000a 0x0010000a Qm (i32)0x00000021
+vclz.i16 d0, d1 :: Qd 0x00030003 0x00030003 Qm (i32)0x00000021
vclz.i16 d31, d30 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000082
+vclz.i16 d31, d30 :: Qd 0x00030003 0x00030003 Qm (i8)0x00000082
vclz.i32 d6, d1 :: Qd 0x0000001a 0x0000001a Qm (i32)0x00000021
+vclz.i32 d6, d1 :: Qd 0x00000003 0x00000003 Qm (i32)0x00000021
vclz.i32 d30, d5 :: Qd 0x00000000 0x00000000 Qm (i8)0x00000082
+vclz.i32 d30, d5 :: Qd 0x00000003 0x00000003 Qm (i8)0x00000082
vclz.i8 d2, d4 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff
+vclz.i8 d2, d4 :: Qd 0x03030303 0x03030303 Qm (i8)0x000000ff
vclz.i16 d2, d4 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff
+vclz.i16 d2, d4 :: Qd 0x00030003 0x00030003 Qm (i8)0x000000ff
vclz.i32 d2, d4 :: Qd 0x00000000 0x00000000 Qm (i8)0x000000ff
+vclz.i32 d2, d4 :: Qd 0x00000003 0x00000003 Qm (i8)0x000000ff
vclz.i8 d2, d4 :: Qd 0x00000000 0x00000000 Qm (i16)0x0000ffef
+vclz.i8 d2, d4 :: Qd 0x03030303 0x03030303 Qm (i16)0x0000ffef
vclz.i16 d2, d4 :: Qd 0x00000000 0x00000000 Qm (i16)0x0000ffef
+vclz.i16 d2, d4 :: Qd 0x00030003 0x00030003 Qm (i16)0x0000ffef
vclz.i32 d2, d4 :: Qd 0x00000000 0x00000000 Qm (i16)0x0000ffef
+vclz.i32 d2, d4 :: Qd 0x00000003 0x00000003 Qm (i16)0x0000ffef
vclz.i8 d2, d4 :: Qd 0x08080808 0x08080808 Qm (i8)0x00000000
+vclz.i8 d2, d4 :: Qd 0x03030303 0x03030303 Qm (i8)0x00000000
vclz.i16 d2, d4 :: Qd 0x00100010 0x00100010 Qm (i8)0x00000000
+vclz.i16 d2, d4 :: Qd 0x00030003 0x00030003 Qm (i8)0x00000000
vclz.i32 d2, d4 :: Qd 0x00000020 0x00000020 Qm (i8)0x00000000
+vclz.i32 d2, d4 :: Qd 0x00000003 0x00000003 Qm (i8)0x00000000
vclz.i8 d2, d4 :: Qd 0x08000800 0x08000800 Qm (i16)0x000000ef
+vclz.i8 d2, d4 :: Qd 0x03030303 0x03030303 Qm (i16)0x000000ef
vclz.i16 d2, d4 :: Qd 0x00080008 0x00080008 Qm (i16)0x000000ef
+vclz.i16 d2, d4 :: Qd 0x00030003 0x00030003 Qm (i16)0x000000ef
vclz.i32 d2, d4 :: Qd 0x00000008 0x00000008 Qm (i16)0x000000ef
+vclz.i32 d2, d4 :: Qd 0x00000003 0x00000003 Qm (i16)0x000000ef
---- VSLI ----
vsli.16 d0, d1, #1 :: Qd 0x0001000f 0x0001000f Qm (i32)0x00000007
+vsli.16 d0, d1, #1 :: Qd 0x2a3b323b 0x28393e39 Qm (i32)0x00000007
vsli.16 d3, d4, #2 :: Qd 0xfffdfe11 0xfffdfe11 Qm (i32)0xffffff84
+vsli.16 d3, d4, #2 :: Qd 0x54776477 0x50737c73 Qm (i32)0xffffff84
vsli.32 d2, d5, #31 :: Qd 0xd5555555 0xd5555555 Qm (i32)0xffffffff
+vsli.32 d2, d5, #31 :: Qd 0x931b1a1b 0x121f1e1f Qm (i32)0xffffffff
vsli.8 d6, d7, #7 :: Qd 0x5555d5d5 0x5555d5d5 Qm (i32)0x0000ffff
+vsli.8 d6, d7, #7 :: Qd 0x939b9a9b 0x121f9e1f Qm (i32)0x0000ffff
vsli.16 d8, d9, #12 :: Qd 0xf5556555 0xf5556555 Qm (i32)0xfffffff6
+vsli.16 d8, d9, #12 :: Qd 0xd31bda1b 0xc21fce1f Qm (i32)0xfffffff6
vsli.32 d10, d11, #5 :: Qd 0x0004ff55 0x0004ff55 Qm (i32)0x000027fa
+vsli.32 d10, d11, #5 :: Qd 0xa3a323bb 0x8383e39f Qm (i32)0x000027fa
vsli.8 d12, d13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vsli.8 d12, d13, #1 :: Qd 0x2b3b323b 0x28393e39 Qm (i32)0xffffffff
vsli.16 d14, d15, #11 :: Qd 0xfd55fd55 0xfd55fd55 Qm (i32)0xffffffff
+vsli.16 d14, d15, #11 :: Qd 0xeb1bea1b 0xe21fe61f Qm (i32)0xffffffff
vsli.32 d10, d11, #9 :: Qd 0x0007d155 0x0007d155 Qm (i32)0x000003e8
+vsli.32 d10, d11, #9 :: Qd 0x3a323a1b 0x383e381f Qm (i32)0x000003e8
vsli.8 d7, d13, #7 :: Qd 0xd5d5d5d5 0xd5d5d5d5 Qm (i32)0xffffffff
+vsli.8 d7, d13, #7 :: Qd 0x939b9a9b 0x121f9e1f Qm (i32)0xffffffff
vsli.16 d8, d1, #1 :: Qd 0x0001579f 0x0001579f Qm (i32)0x0000abcf
+vsli.16 d8, d1, #1 :: Qd 0x2a3b323b 0x28393e39 Qm (i32)0x0000abcf
vsli.32 d12, d3, #15 :: Qd 0xff285555 0xff285555 Qm (i32)0xfffffe50
+vsli.32 d12, d3, #15 :: Qd 0x8c8e9a1b 0x0f8e1e1f Qm (i32)0xfffffe50
vsli.64 d0, d1, #42 :: Qd 0xfffffd55 0x55555555 Qm (i32)0xffffffff
+vsli.64 d0, d1, #42 :: Qd 0x707c721b 0x121f1e1f Qm (i32)0xffffffff
vsli.64 d6, d7, #12 :: Qd 0x00fac000 0x00fac555 Qm (i32)0x00000fac
+vsli.64 d6, d7, #12 :: Qd 0xd191d141 0xc1f1ce1f Qm (i32)0x00000fac
vsli.64 d8, d4, #9 :: Qd 0x0069f000 0x0069f155 Qm (i32)0x000034f8
+vsli.64 d8, d4, #9 :: Qd 0x3a323a28 0x383e381f Qm (i32)0x000034f8
vsli.64 d9, d12, #11 :: Qd 0x0c0cb000 0x0c0cb555 Qm (i32)0x00018196
+vsli.64 d9, d12, #11 :: Qd 0xe8c8e8a0 0xe0f8e61f Qm (i32)0x00018196
---- VPADD ----
vpadd.i32 d0, d1, d2 :: Qd 0x000000f0 0x00000030 Qm (i32)0x00000018 Qn (i32)0x00000078
+vpadd.i32 d0, d1, d2 :: Qd 0x000000f0 0x253a383a Qm (i32)0x00000018 Qn (i32)0x00000078
vpadd.i32 d0, d1, d2 :: Qd 0x000000f0 0x00000118 Qm (i32)0x0000008c Qn (i32)0x00000078
+vpadd.i32 d0, d1, d2 :: Qd 0x000000f0 0x253a383a Qm (i32)0x0000008c Qn (i32)0x00000078
vpadd.i16 d0, d1, d2 :: Qd 0x00780078 0x008c008c Qm (i32)0x0000008c Qn (i32)0x00000078
+vpadd.i16 d0, d1, d2 :: Qd 0x00780078 0x2d36303e Qm (i32)0x0000008c Qn (i32)0x00000078
vpadd.i8 d0, d1, d2 :: Qd 0x00780078 0x008c008c Qm (i32)0x0000008c Qn (i32)0x00000078
+vpadd.i8 d0, d1, d2 :: Qd 0x00780078 0x2e35313d Qm (i32)0x0000008c Qn (i32)0x00000078
vpadd.i8 d0, d1, d2 :: Qd 0x80028002 0x80018001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpadd.i8 d0, d1, d2 :: Qd 0x80028002 0x2e35313d Qm (i32)0x80000001 Qn (i32)0x80000002
vpadd.i16 d0, d1, d2 :: Qd 0x80028002 0x80018001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpadd.i16 d0, d1, d2 :: Qd 0x80028002 0x2d36303e Qm (i32)0x80000001 Qn (i32)0x80000002
vpadd.i32 d0, d1, d2 :: Qd 0x00000004 0x00000002 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpadd.i32 d0, d1, d2 :: Qd 0x00000004 0x253a383a Qm (i32)0x80000001 Qn (i32)0x80000002
vpadd.i32 d10, d11, d12 :: Qd 0x000000f0 0x00000030 Qm (i32)0x00000018 Qn (i32)0x00000078
+vpadd.i32 d10, d11, d12 :: Qd 0x000000f0 0x253a383a Qm (i32)0x00000018 Qn (i32)0x00000078
---- VPADDL ----
vpaddl.u32 d0, d1 :: Qd 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.u32 d0, d1 :: Qd 0x00000000 0x29393839 Qm (i32)0x00000018
vpaddl.u32 d0, d1 :: Qd 0x00000000 0x00000118 Qm (i32)0x0000008c
+vpaddl.u32 d0, d1 :: Qd 0x00000000 0x29393839 Qm (i32)0x0000008c
vpaddl.u16 d0, d1 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c
+vpaddl.u16 d0, d1 :: Qd 0x00002e3a 0x00003338 Qm (i32)0x0000008c
vpaddl.u8 d0, d1 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c
+vpaddl.u8 d0, d1 :: Qd 0x00320036 0x0030003b Qm (i32)0x0000008c
vpaddl.u8 d0, d1 :: Qd 0x00800001 0x00800001 Qm (i32)0x80000001
+vpaddl.u8 d0, d1 :: Qd 0x00320036 0x0030003b Qm (i32)0x80000001
vpaddl.u16 d0, d1 :: Qd 0x00008001 0x00008001 Qm (i32)0x80000001
+vpaddl.u16 d0, d1 :: Qd 0x00002e3a 0x00003338 Qm (i32)0x80000001
vpaddl.u32 d0, d1 :: Qd 0x00000001 0x00000002 Qm (i32)0x80000001
+vpaddl.u32 d0, d1 :: Qd 0x00000000 0x29393839 Qm (i32)0x80000001
vpaddl.u32 d10, d11 :: Qd 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.u32 d10, d11 :: Qd 0x00000000 0x29393839 Qm (i32)0x00000018
vpaddl.s32 d0, d1 :: Qd 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.s32 d0, d1 :: Qd 0x00000000 0x29393839 Qm (i32)0x00000018
vpaddl.s32 d0, d1 :: Qd 0x00000000 0x00000118 Qm (i32)0x0000008c
+vpaddl.s32 d0, d1 :: Qd 0x00000000 0x29393839 Qm (i32)0x0000008c
vpaddl.s16 d0, d1 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c
+vpaddl.s16 d0, d1 :: Qd 0x00002e3a 0x00003338 Qm (i32)0x0000008c
vpaddl.s8 d0, d1 :: Qd 0x0000ff8c 0x0000ff8c Qm (i32)0x0000008c
+vpaddl.s8 d0, d1 :: Qd 0x00320036 0x0030003b Qm (i32)0x0000008c
vpaddl.s8 d0, d1 :: Qd 0xff800001 0xff800001 Qm (i32)0x80000001
+vpaddl.s8 d0, d1 :: Qd 0x00320036 0x0030003b Qm (i32)0x80000001
vpaddl.s16 d0, d1 :: Qd 0xffff8001 0xffff8001 Qm (i32)0x80000001
+vpaddl.s16 d0, d1 :: Qd 0x00002e3a 0x00003338 Qm (i32)0x80000001
vpaddl.s32 d0, d1 :: Qd 0xffffffff 0x00000002 Qm (i32)0x80000001
+vpaddl.s32 d0, d1 :: Qd 0x00000000 0x29393839 Qm (i32)0x80000001
vpaddl.s32 d10, d11 :: Qd 0x00000000 0x00000030 Qm (i32)0x00000018
+vpaddl.s32 d10, d11 :: Qd 0x00000000 0x29393839 Qm (i32)0x00000018
---- VPADAL ----
vpadal.u32 d0, d1 :: Qd 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.u32 d0, d1 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x00000018
vpadal.u32 d0, d1 :: Qd 0x55555555 0x5555566d Qm (i32)0x0000008c
+vpadal.u32 d0, d1 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x0000008c
vpadal.u16 d0, d1 :: Qd 0x555555e1 0x555555e1 Qm (i32)0x0000008c
+vpadal.u16 d0, d1 :: Qd 0x131b4855 0x121f5157 Qm (i32)0x0000008c
vpadal.u8 d0, d1 :: Qd 0x566d566d 0x566d566d Qm (i8)0x0000008c
+vpadal.u8 d0, d1 :: Qd 0x134d1a51 0x124f1e5a Qm (i8)0x0000008c
vpadal.u8 d0, d1 :: Qd 0x55d55556 0x55d55556 Qm (i32)0x80000001
+vpadal.u8 d0, d1 :: Qd 0x134d1a51 0x124f1e5a Qm (i32)0x80000001
vpadal.u16 d0, d1 :: Qd 0x5555d556 0x5555d556 Qm (i32)0x80000001
+vpadal.u16 d0, d1 :: Qd 0x131b4855 0x121f5157 Qm (i32)0x80000001
vpadal.u32 d0, d1 :: Qd 0x55555556 0x55555557 Qm (i32)0x80000001
+vpadal.u32 d0, d1 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x80000001
vpadal.u32 d10, d11 :: Qd 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.u32 d10, d11 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x00000018
vpadal.s32 d0, d1 :: Qd 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.s32 d0, d1 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x00000018
vpadal.s32 d0, d1 :: Qd 0x55555555 0x5555566d Qm (i32)0x0000008c
+vpadal.s32 d0, d1 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x0000008c
vpadal.s16 d0, d1 :: Qd 0x555555e1 0x555555e1 Qm (i32)0x0000008c
+vpadal.s16 d0, d1 :: Qd 0x131b4855 0x121f5157 Qm (i32)0x0000008c
vpadal.s8 d0, d1 :: Qd 0x546d546d 0x546d546d Qm (i8)0x0000008c
+vpadal.s8 d0, d1 :: Qd 0x134d1a51 0x124f1e5a Qm (i8)0x0000008c
vpadal.s8 d0, d1 :: Qd 0x54d55556 0x54d55556 Qm (i32)0x80000001
+vpadal.s8 d0, d1 :: Qd 0x134d1a51 0x124f1e5a Qm (i32)0x80000001
vpadal.s16 d0, d1 :: Qd 0x5554d556 0x5554d556 Qm (i32)0x80000001
+vpadal.s16 d0, d1 :: Qd 0x131b4855 0x121f5157 Qm (i32)0x80000001
vpadal.s32 d0, d1 :: Qd 0x55555554 0x55555557 Qm (i32)0x80000001
+vpadal.s32 d0, d1 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x80000001
vpadal.s32 d10, d11 :: Qd 0x55555555 0x55555585 Qm (i32)0x00000018
+vpadal.s32 d10, d11 :: Qd 0x131b1a1b 0x3b585658 Qm (i32)0x00000018
---- VZIP ----
-vzip.32 d0, d1 :: Qm 0x34343434 0x12121212 Qn 0x34343434 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
-vzip.16 d1, d0 :: Qm 0x12123434 0x12123434 Qn 0x12123434 0x12123434 Qm (i8)0x00000012 Qn (i8)0x00000034
-vzip.8 d10, d11 :: Qm 0x34123412 0x34123412 Qn 0x34123412 0x34123412 Qm (i8)0x00000012 Qn (i8)0x00000034
-vzip.32 d0, d1 :: Qm 0x0a0b0c0d 0x12345678 Qn 0x0a0b0c0d 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vzip.16 d1, d0 :: Qm 0x12340a0b 0x56780c0d Qn 0x12340a0b 0x56780c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vzip.8 d30, d31 :: Qm 0x0a120b34 0x0c560d78 Qn 0x0a120b34 0x0c560d78 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.32 d0, d1 :: Qm 0x34343434 0x121f1e1f Qn 0x34343434 0x131b1a1b Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.32 d0, d1 :: Qm 0x34343434 0x121f1e1f Qn 0x34343434 0x131b1a1b Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.16 d1, d0 :: Qm 0x131b3434 0x1a1b3434 Qn 0x121f3434 0x1e1f3434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.16 d1, d0 :: Qm 0x131b3434 0x1a1b3434 Qn 0x121f3434 0x1e1f3434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.8 d10, d11 :: Qm 0x3412341f 0x341e341f Qn 0x3413341b 0x341a341b Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.8 d10, d11 :: Qm 0x3412341f 0x341e341f Qn 0x3413341b 0x341a341b Qm (i8)0x00000012 Qn (i8)0x00000034
+vzip.32 d0, d1 :: Qm 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x131b1a1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.32 d0, d1 :: Qm 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x131b1a1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.16 d1, d0 :: Qm 0x131b0a0b 0x1a1b0c0d Qn 0x121f0a0b 0x1e1f0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.16 d1, d0 :: Qm 0x131b0a0b 0x1a1b0c0d Qn 0x121f0a0b 0x1e1f0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.8 d30, d31 :: Qm 0x0a120b1f 0x0c1e0d1f Qn 0x0a130b1b 0x0c1a0d1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vzip.8 d30, d31 :: Qm 0x0a120b1f 0x0c1e0d1f Qn 0x0a130b1b 0x0c1a0d1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VUZP ----
-vuzp.32 d0, d1 :: Qm 0x34343434 0x12121212 Qn 0x34343434 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
-vuzp.16 d1, d0 :: Qm 0x12121212 0x34343434 Qn 0x12121212 0x34343434 Qm (i8)0x00000012 Qn (i8)0x00000034
-vuzp.8 d10, d11 :: Qm 0x34343434 0x12121212 Qn 0x34343434 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
-vuzp.32 d0, d1 :: Qm 0x0a0b0c0d 0x12345678 Qn 0x0a0b0c0d 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vuzp.16 d1, d0 :: Qm 0x12341234 0x0a0b0a0b Qn 0x56785678 0x0c0d0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vuzp.8 d30, d31 :: Qm 0x0b0d0b0d 0x34783478 Qn 0x0a0c0a0c 0x12561256 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.32 d0, d1 :: Qm 0x34343434 0x121f1e1f Qn 0x34343434 0x131b1a1b Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.32 d0, d1 :: Qm 0x34343434 0x121f1e1f Qn 0x34343434 0x131b1a1b Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.16 d1, d0 :: Qm 0x131b121f 0x34343434 Qn 0x1a1b1e1f 0x34343434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.16 d1, d0 :: Qm 0x131b121f 0x34343434 Qn 0x1a1b1e1f 0x34343434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.8 d10, d11 :: Qm 0x34343434 0x1b1b1f1f Qn 0x34343434 0x131a121e Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.8 d10, d11 :: Qm 0x34343434 0x1b1b1f1f Qn 0x34343434 0x131a121e Qm (i8)0x00000012 Qn (i8)0x00000034
+vuzp.32 d0, d1 :: Qm 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x131b1a1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.32 d0, d1 :: Qm 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x131b1a1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.16 d1, d0 :: Qm 0x131b121f 0x0a0b0a0b Qn 0x1a1b1e1f 0x0c0d0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.16 d1, d0 :: Qm 0x131b121f 0x0a0b0a0b Qn 0x1a1b1e1f 0x0c0d0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.8 d30, d31 :: Qm 0x0b0d0b0d 0x1b1b1f1f Qn 0x0a0c0a0c 0x131a121e Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vuzp.8 d30, d31 :: Qm 0x0b0d0b0d 0x1b1b1f1f Qn 0x0a0c0a0c 0x131a121e Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VTRN ----
-vtrn.32 d0, d1 :: Qm 0x34343434 0x12121212 Qn 0x34343434 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
-vtrn.16 d1, d0 :: Qm 0x12123434 0x12123434 Qn 0x12123434 0x12123434 Qm (i8)0x00000012 Qn (i8)0x00000034
-vtrn.8 d10, d11 :: Qm 0x34123412 0x34123412 Qn 0x34123412 0x34123412 Qm (i8)0x00000012 Qn (i8)0x00000034
-vtrn.32 d0, d1 :: Qm 0x0a0b0c0d 0x12345678 Qn 0x0a0b0c0d 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vtrn.16 d1, d0 :: Qm 0x12340a0b 0x12340a0b Qn 0x56780c0d 0x56780c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vtrn.8 d30, d31 :: Qm 0x0b340d78 0x0b340d78 Qn 0x0a120c56 0x0a120c56 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.32 d0, d1 :: Qm 0x34343434 0x121f1e1f Qn 0x34343434 0x131b1a1b Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.32 d0, d1 :: Qm 0x34343434 0x121f1e1f Qn 0x34343434 0x131b1a1b Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.16 d1, d0 :: Qm 0x131b3434 0x121f3434 Qn 0x1a1b3434 0x1e1f3434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.16 d1, d0 :: Qm 0x131b3434 0x121f3434 Qn 0x1a1b3434 0x1e1f3434 Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.8 d10, d11 :: Qm 0x341b341b 0x341f341f Qn 0x3413341a 0x3412341e Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.8 d10, d11 :: Qm 0x341b341b 0x341f341f Qn 0x3413341a 0x3412341e Qm (i8)0x00000012 Qn (i8)0x00000034
+vtrn.32 d0, d1 :: Qm 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x131b1a1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.32 d0, d1 :: Qm 0x0a0b0c0d 0x121f1e1f Qn 0x0a0b0c0d 0x131b1a1b Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.16 d1, d0 :: Qm 0x131b0a0b 0x121f0a0b Qn 0x1a1b0c0d 0x1e1f0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.16 d1, d0 :: Qm 0x131b0a0b 0x121f0a0b Qn 0x1a1b0c0d 0x1e1f0c0d Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.8 d30, d31 :: Qm 0x0b1b0d1b 0x0b1f0d1f Qn 0x0a130c1a 0x0a120c1e Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vtrn.8 d30, d31 :: Qm 0x0b1b0d1b 0x0b1f0d1f Qn 0x0a130c1a 0x0a120c1e Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VSWP ----
-vswp d0, d1 :: Qm 0x34343434 0x34343434 Qn 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
-vswp d1, d0 :: Qm 0x34343434 0x34343434 Qn 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
-vswp d10, d11 :: Qm 0x34343434 0x34343434 Qn 0x12121212 0x12121212 Qm (i8)0x00000012 Qn (i8)0x00000034
-vswp d0, d1 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vswp d1, d0 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
-vswp d30, d31 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x12345678 0x12345678 Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp d0, d1 :: Qm 0x34343434 0x34343434 Qn 0x131b1a1b 0x121f1e1f Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp d0, d1 :: Qm 0x34343434 0x34343434 Qn 0x131b1a1b 0x121f1e1f Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp d1, d0 :: Qm 0x34343434 0x34343434 Qn 0x131b1a1b 0x121f1e1f Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp d1, d0 :: Qm 0x34343434 0x34343434 Qn 0x131b1a1b 0x121f1e1f Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp d10, d11 :: Qm 0x34343434 0x34343434 Qn 0x131b1a1b 0x121f1e1f Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp d10, d11 :: Qm 0x34343434 0x34343434 Qn 0x131b1a1b 0x121f1e1f Qm (i8)0x00000012 Qn (i8)0x00000034
+vswp d0, d1 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x131b1a1b 0x121f1e1f Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp d0, d1 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x131b1a1b 0x121f1e1f Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp d1, d0 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x131b1a1b 0x121f1e1f Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp d1, d0 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x131b1a1b 0x121f1e1f Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp d30, d31 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x131b1a1b 0x121f1e1f Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
+vswp d30, d31 :: Qm 0x0a0b0c0d 0x0a0b0c0d Qn 0x131b1a1b 0x121f1e1f Qm (i32)0x12345678 Qn (i32)0x0a0b0c0d
---- VSHRN ----
vshrn.i16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshrn.i16 d0, q1, #1 :: Qd 0x16959717 0x8e8e0e8e Qm (i32)0xffffffff
vshrn.i16 d3, q4, #2 :: Qd 0xffe1ffe1 0xffe1ffe1 Qm (i32)0xffffff84
+vshrn.i16 d3, q4, #2 :: Qd 0x0bcacb8b 0x474707c7 Qm (i32)0xffffff84
vshrn.i32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshrn.i32 d2, q5, #10 :: Qd 0x0b0acbcb 0x47460707 Qm (i32)0xffffffff
vshrn.i32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff
+vshrn.i32 d2, q5, #1 :: Qd 0x15959717 0x8c8e0f8e Qm (i32)0x7fffffff
vshrn.i64 d6, q7, #7 :: Qd 0xfe0001ff 0xfe0001ff Qm (i32)0x0000ffff
+vshrn.i64 d6, q7, #7 :: Qd 0x56465e5c 0x3a28383e Qm (i32)0x0000ffff
vshrn.i16 d8, q9, #8 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff6
+vshrn.i16 d8, q9, #8 :: Qd 0x242b232e 0x1519141f Qm (i32)0xfffffff6
vshrn.i32 d10, q11, #5 :: Qd 0x013f013f 0x013f013f Qm (i32)0x000027fa
+vshrn.i32 d10, q11, #5 :: Qd 0x61597971 0xe8c8e0f8 Qm (i32)0x000027fa
vshrn.i64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshrn.i64 d12, q13, #1 :: Qd 0x91979717 0x8a0e0f8e Qm (i32)0xffffffff
vshrn.i16 d14, q15, #6 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshrn.i16 d14, q15, #6 :: Qd 0x90ac8cb8 0x5464507c Qm (i32)0xffffffff
vshrn.i32 d10, q11, #9 :: Qd 0x00010001 0x00010001 Qm (i32)0x000003e8
+vshrn.i32 d10, q11, #9 :: Qd 0x16159797 0x8e8c0e0f Qm (i32)0x000003e8
vshrn.i64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshrn.i64 d7, q13, #7 :: Qd 0x56465e5c 0x3a28383e Qm (i32)0xffffffff
vshrn.i16 d8, q1, #1 :: Qd 0x00e700e7 0x00e700e7 Qm (i32)0x0000abcf
+vshrn.i16 d8, q1, #1 :: Qd 0x16959717 0x8e8e0e8e Qm (i32)0x0000abcf
vshrn.i32 d12, q3, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffe50
+vshrn.i32 d12, q3, #15 :: Qd 0x4858465e 0x2a3a2838 Qm (i32)0xfffffe50
vshrn.i64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshrn.i64 d0, q1, #22 :: Qd 0xb0acac8c 0x74647450 Qm (i32)0xffffffff
vshrn.i64 d6, q7, #12 :: Qd 0xfac00000 0xfac00000 Qm (i32)0x00000fac
+vshrn.i64 d6, q7, #12 :: Qd 0xb2b232f2 0x91d141c1 Qm (i32)0x00000fac
vshrn.i64 d8, q4, #9 :: Qd 0x7c00001a 0x7c00001a Qm (i32)0x000034f8
+vshrn.i64 d8, q4, #9 :: Qd 0x95919797 0x8e8a0e0f Qm (i32)0x000034f8
vshrn.i64 d9, q12, #11 :: Qd 0x32c00030 0x32c00030 Qm (i32)0x00018196
+vshrn.i64 d9, q12, #11 :: Qd 0x656465e5 0x23a28383 Qm (i32)0x00018196
---- VDUP ----
vdup.8 d12, d2[0] :: Qd 0x57575757 0x57575757 Qm (i32)0x0abc4657
+vdup.8 d12, d2[0] :: Qd 0x1c1c1c1c 0x1c1c1c1c Qm (i32)0x0abc4657
vdup.8 d0, d3[2] :: Qd 0x07070707 0x07070707 Qm (i32)0x0007a1b3
+vdup.8 d0, d3[2] :: Qd 0x1c1c1c1c 0x1c1c1c1c Qm (i32)0x0007a1b3
vdup.8 d1, d0[7] :: Qd 0x00000000 0x00000000 Qm (i32)0x00713aaa
+vdup.8 d1, d0[7] :: Qd 0x15151515 0x15151515 Qm (i32)0x00713aaa
vdup.8 d10, d4[3] :: Qd 0x00000000 0x00000000 Qm (i32)0x000aa713
+vdup.8 d10, d4[3] :: Qd 0x14141414 0x14141414 Qm (i32)0x000aa713
vdup.8 d4, d28[4] :: Qd 0xc3c3c3c3 0xc3c3c3c3 Qm (i32)0x0007b1c3
+vdup.8 d4, d28[4] :: Qd 0x1d1d1d1d 0x1d1d1d1d Qm (i32)0x0007b1c3
vdup.16 d17, d19[1] :: Qd 0x07130713 0x07130713 Qm (i32)0x0713ffff
+vdup.16 d17, d19[1] :: Qd 0x141c141c 0x141c141c Qm (i32)0x0713ffff
vdup.16 d15, d31[2] :: Qd 0x00fa00fa 0x00fa00fa Qm (i32)0x007f00fa
+vdup.16 d15, d31[2] :: Qd 0x191d191d 0x191d191d Qm (i32)0x007f00fa
vdup.16 d6, d2[0] :: Qd 0xbcdebcde 0xbcdebcde Qm (i32)0x0ffabcde
+vdup.16 d6, d2[0] :: Qd 0x1f1c1f1c 0x1f1c1f1c Qm (i32)0x0ffabcde
vdup.16 d8, d22[3] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000713
+vdup.16 d8, d22[3] :: Qd 0x151d151d 0x151d151d Qm (i32)0x00000713
vdup.16 d9, d2[0] :: Qd 0x07130713 0x07130713 Qm (i32)0x00000713
+vdup.16 d9, d2[0] :: Qd 0x1f1c1f1c 0x1f1c1f1c Qm (i32)0x00000713
vdup.32 d10, d17[1] :: Qd 0x00000713 0x00000713 Qm (i32)0x00000713
+vdup.32 d10, d17[1] :: Qd 0x151d191d 0x151d191d Qm (i32)0x00000713
vdup.32 d15, d11[0] :: Qd 0x00000003 0x00000003 Qm (i32)0x00000003
+vdup.32 d15, d11[0] :: Qd 0x141c1f1c 0x141c1f1c Qm (i32)0x00000003
vdup.32 d30, d29[1] :: Qd 0xf00000aa 0xf00000aa Qm (i32)0xf00000aa
+vdup.32 d30, d29[1] :: Qd 0x151d191d 0x151d191d Qm (i32)0xf00000aa
vdup.32 d22, d0[1] :: Qd 0x0000000f 0x0000000f Qm (i32)0x0000000f
+vdup.32 d22, d0[1] :: Qd 0x151d191d 0x151d191d Qm (i32)0x0000000f
vdup.32 d13, d13[0] :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vdup.32 d13, d13[0] :: Qd 0x141c1f1c 0x141c1f1c Qm (i32)0xffffffff
---- VQDMULH ----
vqdmulh.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 d0, d1, d2 :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 d6, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmulh.s32 d6, d7, d8 :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmulh.s16 d9, d11, d12 :: Qd 0x00000002 0x00000002 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmulh.s16 d9, d11, d12 :: Qd 0x0000003a 0x00000043 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmulh.s16 d4, d5, d6 :: Qd 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 d4, d5, d6 :: Qd 0x00000687 0x00000788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 d7, d8, d9 :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 d7, d8, d9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s16 d4, d5, d6 :: Qd 0x0000e50b 0x0000e50b Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 d4, d5, d6 :: Qd 0x00000687 0x00000788 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 d7, d8, d9 :: Qd 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmulh.s32 d7, d8, d9 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmulh.s16 d4, d5, d6 :: Qd 0x0000003f 0x0000003f Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 d4, d5, d6 :: Qd 0x00000687 0x00000788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 d7, d8, d9 :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 d7, d8, d9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s32 d10, d11, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 d10, d11, d15 :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 d10, d30, d31 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmulh.s32 d10, d30, d31 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 d10, d30, d31 :: Qd 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmulh.s16 d10, d30, d31 :: Qd 0xece50000 0xede10000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s32 d10, d30, d31 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 d10, d30, d31 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 d10, d30, d31 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmulh.s16 d10, d30, d31 :: Qd 0x098d0000 0x090f0000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQDMULH (by scalar) ----
vqdmulh.s32 d0, d1, d6[0] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 d0, d1, d6[0] :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 d6, d7, d1[1] :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqdmulh.s32 d6, d7, d1[1] :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqdmulh.s16 d9, d11, d7[0] :: Qd 0x00000002 0x00000002 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqdmulh.s16 d9, d11, d7[0] :: Qd 0x002a003a 0x00280043 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqdmulh.s16 d4, d5, d6[0] :: Qd 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 d4, d5, d6[0] :: Qd 0x04c70687 0x04880788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 d7, d8, d9[1] :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 d7, d8, d9[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s16 d4, d5, d6[1] :: Qd 0xffffe50b 0xffffe50b Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqdmulh.s16 d4, d5, d6[1] :: Qd 0x04c70687 0x04880788 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
vqdmulh.s32 d7, d8, d9[0] :: Qd 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqdmulh.s32 d7, d8, d9[0] :: Qd 0x00000001 0x00000001 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqdmulh.s16 d4, d5, d6[2] :: Qd 0x0400003f 0x0400003f Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqdmulh.s16 d4, d5, d6[2] :: Qd 0x04c70687 0x04880788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqdmulh.s32 d7, d8, d9[0] :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqdmulh.s32 d7, d8, d9[0] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqdmulh.s32 d10, d31, d15[0] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqdmulh.s32 d10, d31, d15[0] :: Qd 0x00000011 0x00000010 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqdmulh.s32 d10, d14, d15[1] :: Qd 0xffffff88 0xffffff88 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 d10, d14, d15[1] :: Qd 0x00000011 0x00000010 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 d10, d14, d7[3] :: Qd 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqdmulh.s16 d10, d14, d7[3] :: Qd 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s32 d10, d14, d15[1] :: Qd 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqdmulh.s32 d10, d14, d15[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqdmulh.s16 d31, d14, d7[1] :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqdmulh.s16 d31, d14, d7[1] :: Qd 0x098d0d0d 0x090f0f0f Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VSHRN ----
vshrn.i64 d2, q2, #1 :: Qd 0x855e232b 0x855e232b Qm (i32)0x0abc4657
+vshrn.i64 d2, q2, #1 :: Qd 0x91979717 0x8a0e0f8e Qm (i32)0x0abc4657
vshrn.i64 d3, q3, #0 :: Qd 0x0007a1b3 0x0007a1b3 Qm (i32)0x0007a1b3
+vshrn.i64 d3, q3, #0 :: Qd 0x232f2e2f 0x141c1f1c Qm (i32)0x0007a1b3
vshrn.i64 d1, q0, #3 :: Qd 0x400e2755 0x400e2755 Qm (i32)0x00713aaa
+vshrn.i64 d1, q0, #3 :: Qd 0x6465e5c5 0xa28383e3 Qm (i32)0x00713aaa
vshrn.i64 d0, q4, #5 :: Qd 0x98005538 0x98005538 Qm (i32)0x000aa713
+vshrn.i64 d0, q4, #5 :: Qd 0x59197971 0xe8a0e0f8 Qm (i32)0x000aa713
vshrn.i64 d4, q8, #11 :: Qd 0x386000f6 0x386000f6 Qm (i32)0x0007b1c3
+vshrn.i64 d4, q8, #11 :: Qd 0x656465e5 0x23a28383 Qm (i32)0x0007b1c3
vshrn.i16 d7, q12, #6 :: Qd 0x1cff1cff 0x1cff1cff Qm (i32)0x0713ffff
+vshrn.i16 d7, q12, #6 :: Qd 0x90ac8cb8 0x5464507c Qm (i32)0x0713ffff
vshrn.i16 d15, q11, #2 :: Qd 0x1f3e1f3e 0x1f3e1f3e Qm (i32)0x007f00fa
+vshrn.i16 d15, q11, #2 :: Qd 0x0bcacb8b 0x474707c7 Qm (i32)0x007f00fa
vshrn.i16 d6, q2, #4 :: Qd 0x00ab00ab 0x00ab00ab Qm (i32)0x000ffabc
+vshrn.i16 d6, q2, #4 :: Qd 0x42b232e2 0x519141f1 Qm (i32)0x000ffabc
vshrn.i16 d8, q12, #3 :: Qd 0x00e200e2 0x00e200e2 Qm (i32)0x00000713
+vshrn.i16 d8, q12, #3 :: Qd 0x856565c5 0xa32383e3 Qm (i32)0x00000713
vshrn.i16 d9, q2, #7 :: Qd 0x000e000e 0x000e000e Qm (i32)0x00000713
+vshrn.i16 d9, q2, #7 :: Qd 0x4856465c 0x2a32283e Qm (i32)0x00000713
vshrn.i32 d10, q13, #2 :: Qd 0x01c401c4 0x01c401c4 Qm (i32)0x00000713
+vshrn.i32 d10, q13, #2 :: Qd 0x0acacb8b 0x464707c7 Qm (i32)0x00000713
vshrn.i32 d15, q11, #1 :: Qd 0x00010001 0x00010001 Qm (i32)0x00000003
+vshrn.i32 d15, q11, #1 :: Qd 0x15959717 0x8c8e0f8e Qm (i32)0x00000003
vshrn.i32 d10, q9, #5 :: Qd 0x00050005 0x00050005 Qm (i32)0xf00000aa
+vshrn.i32 d10, q9, #5 :: Qd 0x61597971 0xe8c8e0f8 Qm (i32)0xf00000aa
vshrn.i32 d12, q0, #6 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000000f
+vshrn.i32 d12, q0, #6 :: Qd 0xb0acbcb8 0x7464707c Qm (i32)0x0000000f
vshrn.i32 d13, q13, #2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff
+vshrn.i32 d13, q13, #2 :: Qd 0x0acacb8b 0x464707c7 Qm (i32)0xffffffff
---- VQSHRN ----
vqshrn.s16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 00000000
+vqshrn.s16 d0, q1, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff fpscr 08000000
vqshrn.s16 d3, q4, #2 :: Qd 0xffe1ffe1 0xffe1ffe1 Qm (i32)0xffffff84 fpscr 00000000
+vqshrn.s16 d3, q4, #2 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffff84 fpscr 08000000
vqshrn.s32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 00000000
+vqshrn.s32 d2, q5, #10 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff fpscr 08000000
+vqshrn.s32 d2, q5, #1 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x7fffffff fpscr 08000000
vqshrn.s32 d2, q5, #1 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x7fffffff fpscr 08000000
vqshrn.s16 d2, q5, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i16)0x00007fff fpscr 08000000
+vqshrn.s16 d2, q5, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i16)0x00007fff fpscr 08000000
+vqshrn.s64 d6, q7, #7 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x0000ffff fpscr 08000000
vqshrn.s64 d6, q7, #7 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x0000ffff fpscr 08000000
vqshrn.s16 d8, q9, #8 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff6 fpscr 00000000
+vqshrn.s16 d8, q9, #8 :: Qd 0x1519141f 0x131a121e Qm (i32)0xfffffff6 fpscr 00000000
vqshrn.s32 d10, q11, #5 :: Qd 0x013f013f 0x013f013f Qm (i32)0x000027fa fpscr 00000000
+vqshrn.s32 d10, q11, #5 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x000027fa fpscr 08000000
vqshrn.s64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 00000000
+vqshrn.s64 d12, q13, #1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.s16 d14, q15, #6 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 00000000
+vqshrn.s16 d14, q15, #6 :: Qd 0x5464507c 0x4c684878 Qm (i32)0xffffffff fpscr 00000000
vqshrn.s32 d10, q11, #9 :: Qd 0x00010001 0x00010001 Qm (i32)0x000003e8 fpscr 00000000
+vqshrn.s32 d10, q11, #9 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x000003e8 fpscr 08000000
vqshrn.s64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 00000000
+vqshrn.s64 d7, q13, #7 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.s16 d8, q1, #1 :: Qd 0x00800080 0x00800080 Qm (i32)0x0000abcf fpscr 08000000
+vqshrn.s16 d8, q1, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x0000abcf fpscr 08000000
vqshrn.s32 d8, q1, #1 :: Qd 0x55e755e7 0x55e755e7 Qm (i32)0x0000abcf fpscr 00000000
+vqshrn.s32 d8, q1, #1 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x0000abcf fpscr 08000000
vqshrn.s32 d12, q3, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffe50 fpscr 00000000
+vqshrn.s32 d12, q3, #15 :: Qd 0x2a3a2838 0x2636243e Qm (i32)0xfffffe50 fpscr 00000000
vqshrn.s64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 00000000
+vqshrn.s64 d0, q1, #22 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.s64 d6, q7, #12 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000fac fpscr 08000000
+vqshrn.s64 d6, q7, #12 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000fac fpscr 08000000
+vqshrn.s64 d8, q4, #9 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x000034f8 fpscr 08000000
vqshrn.s64 d8, q4, #9 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x000034f8 fpscr 08000000
vqshrn.s64 d9, q12, #11 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00018196 fpscr 08000000
+vqshrn.s64 d9, q12, #11 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00018196 fpscr 08000000
+vqshrn.u16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u16 d3, q4, #2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff84 fpscr 08000000
+vqshrn.u16 d3, q4, #2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff84 fpscr 08000000
+vqshrn.u32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
+vqshrn.u32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
+vqshrn.u16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
vqshrn.u16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
vqshrn.u64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
+vqshrn.u64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
vqshrn.u16 d8, q9, #8 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff6 fpscr 00000000
+vqshrn.u16 d8, q9, #8 :: Qd 0x1519141f 0x131a121e Qm (i32)0xfffffff6 fpscr 00000000
vqshrn.u32 d10, q11, #5 :: Qd 0x013f013f 0x013f013f Qm (i32)0x000027fa fpscr 00000000
+vqshrn.u32 d10, q11, #5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000027fa fpscr 08000000
+vqshrn.u64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u16 d14, q15, #6 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqshrn.u16 d14, q15, #6 :: Qd 0x5464507c 0x4c684878 Qm (i32)0xffffffff fpscr 00000000
vqshrn.u32 d10, q11, #9 :: Qd 0x00010001 0x00010001 Qm (i32)0x000003e8 fpscr 00000000
+vqshrn.u32 d10, q11, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000003e8 fpscr 08000000
+vqshrn.u64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u16 d8, q1, #1 :: Qd 0x00ff00ff 0x00ff00ff Qm (i32)0x0000abcf fpscr 08000000
+vqshrn.u16 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqshrn.u32 d8, q1, #1 :: Qd 0x55e755e7 0x55e755e7 Qm (i32)0x0000abcf fpscr 00000000
+vqshrn.u32 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqshrn.u32 d12, q3, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffe50 fpscr 08000000
+vqshrn.u32 d12, q3, #15 :: Qd 0x2a3a2838 0x2636243e Qm (i32)0xfffffe50 fpscr 00000000
+vqshrn.u64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrn.u64 d6, q7, #12 :: Qd 0xfac00000 0xfac00000 Qm (i32)0x00000fac fpscr 00000000
+vqshrn.u64 d6, q7, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000fac fpscr 08000000
vqshrn.u64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
+vqshrn.u64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
+vqshrn.u64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
vqshrn.u64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
---- VQSHRUN ----
vqshrun.s16 d0, q1, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshrun.s16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrun.s16 d3, q4, #2 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff84 fpscr 08000000
+vqshrun.s16 d3, q4, #2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff84 fpscr 08000000
vqshrun.s32 d2, q5, #10 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshrun.s32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrun.s32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
+vqshrun.s32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
+vqshrun.s16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
vqshrun.s16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
vqshrun.s64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
+vqshrun.s64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
vqshrun.s16 d8, q9, #8 :: Qd 0x00000000 0x00000000 Qm (i32)0xfffffff6 fpscr 08000000
+vqshrun.s16 d8, q9, #8 :: Qd 0x1519141f 0x131a121e Qm (i32)0xfffffff6 fpscr 00000000
vqshrun.s32 d10, q11, #5 :: Qd 0x013f013f 0x013f013f Qm (i32)0x000027fa fpscr 00000000
+vqshrun.s32 d10, q11, #5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000027fa fpscr 08000000
vqshrun.s64 d12, q13, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshrun.s64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrun.s16 d14, q15, #6 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshrun.s16 d14, q15, #6 :: Qd 0x5464507c 0x4c684878 Qm (i32)0xffffffff fpscr 00000000
vqshrun.s32 d10, q11, #9 :: Qd 0x00010001 0x00010001 Qm (i32)0x000003e8 fpscr 00000000
+vqshrun.s32 d10, q11, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000003e8 fpscr 08000000
vqshrun.s64 d7, q13, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshrun.s64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrun.s16 d8, q1, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000abcf fpscr 08000000
+vqshrun.s16 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqshrun.s32 d8, q1, #1 :: Qd 0x55e755e7 0x55e755e7 Qm (i32)0x0000abcf fpscr 00000000
+vqshrun.s32 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqshrun.s32 d12, q3, #15 :: Qd 0x00000000 0x00000000 Qm (i32)0xfffffe50 fpscr 08000000
+vqshrun.s32 d12, q3, #15 :: Qd 0x2a3a2838 0x2636243e Qm (i32)0xfffffe50 fpscr 00000000
vqshrun.s64 d0, q1, #22 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 08000000
+vqshrun.s64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqshrun.s64 d6, q7, #12 :: Qd 0xfac00000 0xfac00000 Qm (i32)0x00000fac fpscr 00000000
+vqshrun.s64 d6, q7, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000fac fpscr 08000000
+vqshrun.s64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
vqshrun.s64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
vqshrun.s64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
+vqshrun.s64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
---- VQRSHRN ----
vqrshrn.s16 d0, q1, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrn.s16 d0, q1, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffffff fpscr 08000000
vqrshrn.s16 d3, q4, #2 :: Qd 0x00e100e1 0x00e100e1 Qm (i32)0xffffff84 fpscr 00000000
+vqrshrn.s16 d3, q4, #2 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0xffffff84 fpscr 08000000
vqrshrn.s32 d2, q5, #10 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrn.s32 d2, q5, #10 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.s32 d2, q5, #1 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x7fffffff fpscr 08000000
+vqrshrn.s32 d2, q5, #1 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x7fffffff fpscr 08000000
+vqrshrn.s16 d2, q5, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i16)0x00007fff fpscr 08000000
vqrshrn.s16 d2, q5, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i16)0x00007fff fpscr 08000000
vqrshrn.s64 d6, q7, #7 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x0000ffff fpscr 08000000
+vqrshrn.s64 d6, q7, #7 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x0000ffff fpscr 08000000
vqrshrn.s16 d8, q9, #8 :: Qd 0x00000000 0x00000000 Qm (i32)0xfffffff6 fpscr 00000000
+vqrshrn.s16 d8, q9, #8 :: Qd 0x1519141f 0x131a121e Qm (i32)0xfffffff6 fpscr 00000000
vqrshrn.s32 d10, q11, #5 :: Qd 0x01400140 0x01400140 Qm (i32)0x000027fa fpscr 00000000
+vqrshrn.s32 d10, q11, #5 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x000027fa fpscr 08000000
vqrshrn.s64 d12, q13, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrn.s64 d12, q13, #1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.s16 d14, q15, #6 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrn.s16 d14, q15, #6 :: Qd 0x5464507c 0x4c684878 Qm (i32)0xffffffff fpscr 00000000
vqrshrn.s32 d10, q11, #9 :: Qd 0x00020002 0x00020002 Qm (i32)0x000003e8 fpscr 00000000
+vqrshrn.s32 d10, q11, #9 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x000003e8 fpscr 08000000
vqrshrn.s64 d7, q13, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrn.s64 d7, q13, #7 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.s16 d8, q1, #1 :: Qd 0x00800080 0x00800080 Qm (i32)0x0000abcf fpscr 08000000
+vqrshrn.s16 d8, q1, #1 :: Qd 0x7f7f7f7f 0x7f7f7f7f Qm (i32)0x0000abcf fpscr 08000000
vqrshrn.s32 d8, q1, #1 :: Qd 0x55e855e8 0x55e855e8 Qm (i32)0x0000abcf fpscr 00000000
+vqrshrn.s32 d8, q1, #1 :: Qd 0x7fff7fff 0x7fff7fff Qm (i32)0x0000abcf fpscr 08000000
vqrshrn.s32 d12, q3, #15 :: Qd 0x00000000 0x00000000 Qm (i32)0xfffffe50 fpscr 00000000
+vqrshrn.s32 d12, q3, #15 :: Qd 0x2a3a2838 0x2636243e Qm (i32)0xfffffe50 fpscr 00000000
vqrshrn.s64 d0, q1, #22 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrn.s64 d0, q1, #22 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0xffffffff fpscr 08000000
+vqrshrn.s64 d6, q7, #12 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000fac fpscr 08000000
vqrshrn.s64 d6, q7, #12 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00000fac fpscr 08000000
vqrshrn.s64 d8, q4, #9 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x000034f8 fpscr 08000000
+vqrshrn.s64 d8, q4, #9 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x000034f8 fpscr 08000000
+vqrshrn.s64 d9, q12, #11 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00018196 fpscr 08000000
vqrshrn.s64 d9, q12, #11 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x00018196 fpscr 08000000
vqrshrn.u16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqrshrn.u16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqrshrn.u16 d3, q4, #2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff84 fpscr 08000000
vqrshrn.u16 d3, q4, #2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff84 fpscr 08000000
vqrshrn.u32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqrshrn.u32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqrshrn.u32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
vqrshrn.u32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
vqrshrn.u16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
+vqrshrn.u16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
+vqrshrn.u64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
vqrshrn.u64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
vqrshrn.u16 d8, q9, #8 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffff6 fpscr 08000000
+vqrshrn.u16 d8, q9, #8 :: Qd 0x1519141f 0x131a121e Qm (i32)0xfffffff6 fpscr 00000000
vqrshrn.u32 d10, q11, #5 :: Qd 0x01400140 0x01400140 Qm (i32)0x000027fa fpscr 00000000
+vqrshrn.u32 d10, q11, #5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000027fa fpscr 08000000
+vqrshrn.u64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.u64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.u16 d14, q15, #6 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
+vqrshrn.u16 d14, q15, #6 :: Qd 0x5464507c 0x4c684878 Qm (i32)0xffffffff fpscr 00000000
vqrshrn.u32 d10, q11, #9 :: Qd 0x00020002 0x00020002 Qm (i32)0x000003e8 fpscr 00000000
+vqrshrn.u32 d10, q11, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000003e8 fpscr 08000000
+vqrshrn.u64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.u64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.u16 d8, q1, #1 :: Qd 0x00ff00ff 0x00ff00ff Qm (i32)0x0000abcf fpscr 08000000
+vqrshrn.u16 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqrshrn.u32 d8, q1, #1 :: Qd 0x55e855e8 0x55e855e8 Qm (i32)0x0000abcf fpscr 00000000
+vqrshrn.u32 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqrshrn.u32 d12, q3, #15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xfffffe50 fpscr 08000000
+vqrshrn.u32 d12, q3, #15 :: Qd 0x2a3a2838 0x2636243e Qm (i32)0xfffffe50 fpscr 00000000
+vqrshrn.u64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.u64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrn.u64 d6, q7, #12 :: Qd 0xfac00001 0xfac00001 Qm (i32)0x00000fac fpscr 00000000
+vqrshrn.u64 d6, q7, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000fac fpscr 08000000
vqrshrn.u64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
+vqrshrn.u64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
+vqrshrn.u64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
vqrshrn.u64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
---- VQRSHRUN ----
vqrshrun.s16 d0, q1, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrun.s16 d0, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrun.s16 d3, q4, #2 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffff84 fpscr 08000000
+vqrshrun.s16 d3, q4, #2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffff84 fpscr 08000000
vqrshrun.s32 d2, q5, #10 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrun.s32 d2, q5, #10 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrun.s32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
+vqrshrun.s32 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fffffff fpscr 08000000
+vqrshrun.s16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
vqrshrun.s16 d2, q5, #1 :: Qd 0xffffffff 0xffffffff Qm (i16)0x00007fff fpscr 08000000
vqrshrun.s64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
+vqrshrun.s64 d6, q7, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000ffff fpscr 08000000
vqrshrun.s16 d8, q9, #8 :: Qd 0x00000000 0x00000000 Qm (i32)0xfffffff6 fpscr 00000000
+vqrshrun.s16 d8, q9, #8 :: Qd 0x1519141f 0x131a121e Qm (i32)0xfffffff6 fpscr 00000000
vqrshrun.s32 d10, q11, #5 :: Qd 0x01400140 0x01400140 Qm (i32)0x000027fa fpscr 00000000
+vqrshrun.s32 d10, q11, #5 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000027fa fpscr 08000000
vqrshrun.s64 d12, q13, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrun.s64 d12, q13, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrun.s16 d14, q15, #6 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrun.s16 d14, q15, #6 :: Qd 0x5464507c 0x4c684878 Qm (i32)0xffffffff fpscr 00000000
vqrshrun.s32 d10, q11, #9 :: Qd 0x00020002 0x00020002 Qm (i32)0x000003e8 fpscr 00000000
+vqrshrun.s32 d10, q11, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000003e8 fpscr 08000000
vqrshrun.s64 d7, q13, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrun.s64 d7, q13, #7 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrun.s16 d8, q1, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000abcf fpscr 08000000
+vqrshrun.s16 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqrshrun.s32 d8, q1, #1 :: Qd 0x55e855e8 0x55e855e8 Qm (i32)0x0000abcf fpscr 00000000
+vqrshrun.s32 d8, q1, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x0000abcf fpscr 08000000
vqrshrun.s32 d12, q3, #15 :: Qd 0x00000000 0x00000000 Qm (i32)0xfffffe50 fpscr 00000000
+vqrshrun.s32 d12, q3, #15 :: Qd 0x2a3a2838 0x2636243e Qm (i32)0xfffffe50 fpscr 00000000
vqrshrun.s64 d0, q1, #22 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff fpscr 00000000
+vqrshrun.s64 d0, q1, #22 :: Qd 0xffffffff 0xffffffff Qm (i32)0xffffffff fpscr 08000000
vqrshrun.s64 d6, q7, #12 :: Qd 0xfac00001 0xfac00001 Qm (i32)0x00000fac fpscr 00000000
+vqrshrun.s64 d6, q7, #12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000fac fpscr 08000000
+vqrshrun.s64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
vqrshrun.s64 d8, q4, #9 :: Qd 0xffffffff 0xffffffff Qm (i32)0x000034f8 fpscr 08000000
vqrshrun.s64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
+vqrshrun.s64 d9, q12, #11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00018196 fpscr 08000000
---- VRSHRN ----
vrshrn.i64 d2, q2, #1 :: Qd 0x855e232c 0x855e232c Qm (i32)0x0abc4657
+vrshrn.i64 d2, q2, #1 :: Qd 0x91979718 0x8a0e0f8e Qm (i32)0x0abc4657
vrshrn.i64 d3, q3, #0 :: Qd 0x0007a1b3 0x0007a1b3 Qm (i32)0x0007a1b3
+vrshrn.i64 d3, q3, #0 :: Qd 0x232f2e2f 0x141c1f1c Qm (i32)0x0007a1b3
vrshrn.i64 d1, q0, #3 :: Qd 0x400e2755 0x400e2755 Qm (i32)0x00713aaa
+vrshrn.i64 d1, q0, #3 :: Qd 0x6465e5c6 0xa28383e4 Qm (i32)0x00713aaa
vrshrn.i64 d0, q4, #5 :: Qd 0x98005539 0x98005539 Qm (i32)0x000aa713
+vrshrn.i64 d0, q4, #5 :: Qd 0x59197971 0xe8a0e0f9 Qm (i32)0x000aa713
vrshrn.i64 d4, q8, #11 :: Qd 0x386000f6 0x386000f6 Qm (i32)0x0007b1c3
+vrshrn.i64 d4, q8, #11 :: Qd 0x656465e6 0x23a28384 Qm (i32)0x0007b1c3
vrshrn.i16 d7, q12, #6 :: Qd 0x1c001c00 0x1c001c00 Qm (i32)0x0713ffff
+vrshrn.i16 d7, q12, #6 :: Qd 0x91ad8db9 0x5464507c Qm (i32)0x0713ffff
vrshrn.i16 d15, q11, #2 :: Qd 0x203f203f 0x203f203f Qm (i32)0x007f00fa
+vrshrn.i16 d15, q11, #2 :: Qd 0x0bcbcc8c 0x474707c7 Qm (i32)0x007f00fa
vrshrn.i16 d6, q2, #4 :: Qd 0x01ac01ac 0x01ac01ac Qm (i32)0x000ffabc
+vrshrn.i16 d6, q2, #4 :: Qd 0x43b333e3 0x529242f2 Qm (i32)0x000ffabc
vrshrn.i16 d8, q12, #3 :: Qd 0x00e200e2 0x00e200e2 Qm (i32)0x00000713
+vrshrn.i16 d8, q12, #3 :: Qd 0x866566c6 0xa42484e4 Qm (i32)0x00000713
vrshrn.i16 d9, q2, #7 :: Qd 0x000e000e 0x000e000e Qm (i32)0x00000713
+vrshrn.i16 d9, q2, #7 :: Qd 0x4856465c 0x2a32283e Qm (i32)0x00000713
vrshrn.i32 d10, q13, #2 :: Qd 0x01c501c5 0x01c501c5 Qm (i32)0x00000713
+vrshrn.i32 d10, q13, #2 :: Qd 0x0acbcb8c 0x464707c7 Qm (i32)0x00000713
vrshrn.i32 d15, q11, #1 :: Qd 0x00020002 0x00020002 Qm (i32)0x00000003
+vrshrn.i32 d15, q11, #1 :: Qd 0x15969718 0x8c8f0f8e Qm (i32)0x00000003
vrshrn.i32 d10, q9, #5 :: Qd 0x00050005 0x00050005 Qm (i32)0xf00000aa
+vrshrn.i32 d10, q9, #5 :: Qd 0x61597971 0xe8c9e0f9 Qm (i32)0xf00000aa
vrshrn.i32 d12, q0, #6 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000000f
+vrshrn.i32 d12, q0, #6 :: Qd 0xb0adbcb9 0x7464707c Qm (i32)0x0000000f
vrshrn.i32 d13, q13, #2 :: Qd 0x00000000 0x00000000 Qm (i32)0xffffffff
+vrshrn.i32 d13, q13, #2 :: Qd 0x0acbcb8c 0x464707c7 Qm (i32)0xffffffff
---- VSHL (immediate) ----
vshl.i64 d0, d1, #1 :: Qd 0x00000030 0x00000030 Qm (i32)0x00000018
+vshl.i64 d0, d1, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i32)0x00000018
vshl.i64 d5, d2, #1 :: Qd 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i64 d5, d2, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i32)0x40000000
vshl.i64 d9, d12, #2 :: Qd 0x0000000a 0x00000008 Qm (i32)0x80000002
+vshl.i64 d9, d12, #2 :: Qd 0x54746474 0x50707c70 Qm (i32)0x80000002
vshl.i64 d11, d2, #12 :: Qd 0xffffffff 0xfffff000 Qm (i32)0xffffffff
+vshl.i64 d11, d2, #12 :: Qd 0xd191d141 0xc1f1c000 Qm (i32)0xffffffff
vshl.i64 d15, d12, #63 :: Qd 0x80000000 0x00000000 Qm (i32)0x00000005
+vshl.i64 d15, d12, #63 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000005
vshl.i64 d5, d12, #62 :: Qd 0x40000000 0x00000000 Qm (i32)0x80000001
+vshl.i64 d5, d12, #62 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001
vshl.i32 d0, d1, #1 :: Qd 0x00000030 0x00000030 Qm (i32)0x00000018
+vshl.i32 d0, d1, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i32)0x00000018
vshl.i32 d5, d2, #1 :: Qd 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i32 d5, d2, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i32)0x40000000
vshl.i32 d9, d12, #2 :: Qd 0x00000008 0x00000008 Qm (i32)0x80000002
+vshl.i32 d9, d12, #2 :: Qd 0x54746474 0x50707c70 Qm (i32)0x80000002
vshl.i32 d11, d2, #12 :: Qd 0xfffff000 0xfffff000 Qm (i32)0xffffffff
+vshl.i32 d11, d2, #12 :: Qd 0xd191d000 0xc1f1c000 Qm (i32)0xffffffff
vshl.i32 d15, d12, #20 :: Qd 0x00500000 0x00500000 Qm (i32)0x00000005
+vshl.i32 d15, d12, #20 :: Qd 0x91d00000 0xf1c00000 Qm (i32)0x00000005
vshl.i32 d5, d12, #30 :: Qd 0x40000000 0x40000000 Qm (i32)0x80000001
+vshl.i32 d5, d12, #30 :: Qd 0x40000000 0x00000000 Qm (i32)0x80000001
vshl.i16 d0, d1, #1 :: Qd 0x00300030 0x00300030 Qm (i16)0x00000018
+vshl.i16 d0, d1, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i16)0x00000018
vshl.i16 d5, d2, #1 :: Qd 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i16 d5, d2, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i32)0x40000000
vshl.i16 d9, d12, #2 :: Qd 0x00000008 0x00000008 Qm (i32)0x80000002
+vshl.i16 d9, d12, #2 :: Qd 0x54746474 0x50707c70 Qm (i32)0x80000002
vshl.i16 d11, d2, #12 :: Qd 0xf000f000 0xf000f000 Qm (i16)0xffffffff
+vshl.i16 d11, d2, #12 :: Qd 0xd000d000 0xc000c000 Qm (i16)0xffffffff
vshl.i16 d15, d12, #3 :: Qd 0x00280028 0x00280028 Qm (i16)0x00000005
+vshl.i16 d15, d12, #3 :: Qd 0xa8e8c8e8 0xa0e0f8e0 Qm (i16)0x00000005
vshl.i16 d5, d12, #14 :: Qd 0x00004000 0x00004000 Qm (i32)0x80000001
+vshl.i16 d5, d12, #14 :: Qd 0x40004000 0x00000000 Qm (i32)0x80000001
vshl.i8 d0, d1, #1 :: Qd 0x30303030 0x30303030 Qm (i8)0x00000018
+vshl.i8 d0, d1, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i8)0x00000018
vshl.i8 d5, d2, #1 :: Qd 0x80000000 0x80000000 Qm (i32)0x40000000
+vshl.i8 d5, d2, #1 :: Qd 0x2a3a323a 0x28383e38 Qm (i32)0x40000000
vshl.i8 d9, d12, #2 :: Qd 0x00000008 0x00000008 Qm (i32)0x80000002
+vshl.i8 d9, d12, #2 :: Qd 0x54746474 0x50707c70 Qm (i32)0x80000002
vshl.i8 d11, d2, #7 :: Qd 0x80808080 0x80808080 Qm (i8)0xffffffff
+vshl.i8 d11, d2, #7 :: Qd 0x80808080 0x00008000 Qm (i8)0xffffffff
vshl.i8 d15, d12, #3 :: Qd 0x28282828 0x28282828 Qm (i8)0x00000005
+vshl.i8 d15, d12, #3 :: Qd 0xa8e8c8e8 0xa0e0f8e0 Qm (i8)0x00000005
vshl.i8 d5, d12, #6 :: Qd 0x00000040 0x00000040 Qm (i32)0x80000001
+vshl.i8 d5, d12, #6 :: Qd 0x40404040 0x0000c000 Qm (i32)0x80000001
---- VNEG ----
vneg.s32 d0, d1 :: Qd 0xffffff8d 0xffffff8d Qm (i32)0x00000073
+vneg.s32 d0, d1 :: Qd 0xeae2e6e3 0xebe3e0e4 Qm (i32)0x00000073
vneg.s16 d15, d4 :: Qd 0x0000ff8d 0x0000ff8d Qm (i32)0x00000073
+vneg.s16 d15, d4 :: Qd 0xeae3e6e3 0xebe4e0e4 Qm (i32)0x00000073
vneg.s8 d8, d7 :: Qd 0x0000008d 0x0000008d Qm (i32)0x00000073
+vneg.s8 d8, d7 :: Qd 0xebe3e7e3 0xece4e1e4 Qm (i32)0x00000073
vneg.s32 d0, d1 :: Qd 0xffffff02 0xffffff02 Qm (i32)0x000000fe
+vneg.s32 d0, d1 :: Qd 0xeae2e6e3 0xebe3e0e4 Qm (i32)0x000000fe
vneg.s16 d31, d4 :: Qd 0x0000ff11 0x0000ff11 Qm (i32)0x000000ef
+vneg.s16 d31, d4 :: Qd 0xeae3e6e3 0xebe4e0e4 Qm (i32)0x000000ef
vneg.s8 d8, d7 :: Qd 0x00000022 0x00000022 Qm (i32)0x000000de
+vneg.s8 d8, d7 :: Qd 0xebe3e7e3 0xece4e1e4 Qm (i32)0x000000de
vneg.s32 d0, d1 :: Qd 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a
+vneg.s32 d0, d1 :: Qd 0xeae2e6e3 0xebe3e0e4 Qm (i16)0x0000fe0a
vneg.s16 d15, d4 :: Qd 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b
+vneg.s16 d15, d4 :: Qd 0xeae3e6e3 0xebe4e0e4 Qm (i16)0x0000ef0b
vneg.s8 d8, d7 :: Qd 0x22f422f4 0x22f422f4 Qm (i16)0x0000de0c
+vneg.s8 d8, d7 :: Qd 0xebe3e7e3 0xece4e1e4 Qm (i16)0x0000de0c
---- VQNEG ----
vqneg.s32 d0, d1 :: Qd 0xffffff8d 0xffffff8d Qm (i32)0x00000073 fpscr 00000000
+vqneg.s32 d0, d1 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x00000073 fpscr 00000000
vqneg.s32 d0, d1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x80000000 fpscr 08000000
+vqneg.s32 d0, d1 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 fpscr 00000000
vqneg.s16 d0, d1 :: Qd 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 fpscr 08000000
+vqneg.s16 d0, d1 :: Qd 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 fpscr 00000000
vqneg.s8 d0, d1 :: Qd 0x7f000000 0x7f000000 Qm (i32)0x80000000 fpscr 08000000
+vqneg.s8 d0, d1 :: Qd 0xede5e6e5 0xeee1e2e1 Qm (i32)0x80000000 fpscr 00000000
vqneg.s16 d15, d4 :: Qd 0x0000ff8d 0x0000ff8d Qm (i32)0x00000073 fpscr 00000000
+vqneg.s16 d15, d4 :: Qd 0xece5e5e5 0xede1e1e1 Qm (i32)0x00000073 fpscr 00000000
vqneg.s8 d8, d7 :: Qd 0x0000008d 0x0000008d Qm (i32)0x00000073 fpscr 00000000
+vqneg.s8 d8, d7 :: Qd 0xede5e6e5 0xeee1e2e1 Qm (i32)0x00000073 fpscr 00000000
vqneg.s32 d0, d1 :: Qd 0xffffff02 0xffffff02 Qm (i32)0x000000fe fpscr 00000000
+vqneg.s32 d0, d1 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x000000fe fpscr 00000000
vqneg.s16 d31, d4 :: Qd 0x0000ff11 0x0000ff11 Qm (i32)0x000000ef fpscr 00000000
+vqneg.s16 d31, d4 :: Qd 0xece5e5e5 0xede1e1e1 Qm (i32)0x000000ef fpscr 00000000
vqneg.s8 d8, d7 :: Qd 0x00000022 0x00000022 Qm (i32)0x000000de fpscr 00000000
+vqneg.s8 d8, d7 :: Qd 0xede5e6e5 0xeee1e2e1 Qm (i32)0x000000de fpscr 00000000
vqneg.s32 d0, d1 :: Qd 0x01f501f6 0x01f501f6 Qm (i16)0x0000fe0a fpscr 00000000
+vqneg.s32 d0, d1 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i16)0x0000fe0a fpscr 00000000
vqneg.s16 d15, d4 :: Qd 0x10f510f5 0x10f510f5 Qm (i16)0x0000ef0b fpscr 00000000
+vqneg.s16 d15, d4 :: Qd 0xece5e5e5 0xede1e1e1 Qm (i16)0x0000ef0b fpscr 00000000
vqneg.s8 d8, d7 :: Qd 0x22f422f4 0x22f422f4 Qm (i16)0x0000de0c fpscr 00000000
+vqneg.s8 d8, d7 :: Qd 0xede5e6e5 0xeee1e2e1 Qm (i16)0x0000de0c fpscr 00000000
---- VREV ----
vrev64.8 d0, d1 :: Qd 0xddccbbaa 0xddccbbaa Qm (i32)0xaabbccdd
+vrev64.8 d0, d1 :: Qd 0x1c1f1c14 0x1d191d15 Qm (i32)0xaabbccdd
vrev64.16 d10, d31 :: Qd 0xccddaabb 0xccddaabb Qm (i32)0xaabbccdd
+vrev64.16 d10, d31 :: Qd 0x1f1c141c 0x191d151d Qm (i32)0xaabbccdd
vrev64.32 d1, d14 :: Qd 0xaabbccdd 0xaabbccdd Qm (i32)0xaabbccdd
+vrev64.32 d1, d14 :: Qd 0x141c1f1c 0x151d191d Qm (i32)0xaabbccdd
vrev32.8 d0, d1 :: Qd 0xddccbbaa 0xddccbbaa Qm (i32)0xaabbccdd
+vrev32.8 d0, d1 :: Qd 0x1d191d15 0x1c1f1c14 Qm (i32)0xaabbccdd
vrev32.16 d30, d15 :: Qd 0xccddaabb 0xccddaabb Qm (i32)0xaabbccdd
+vrev32.16 d30, d15 :: Qd 0x191d151d 0x1f1c141c Qm (i32)0xaabbccdd
vrev16.8 d0, d1 :: Qd 0xbbaaddcc 0xbbaaddcc Qm (i32)0xaabbccdd
+vrev16.8 d0, d1 :: Qd 0x1d151d19 0x1c141c1f Qm (i32)0xaabbccdd
---- VTBL ----
vtbl.8 d0, {d2}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d0, {d2}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d0, {d31}, d1 :: Qd 0x12121212 0x12121212 Qm (i8)0x00000007 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d0, {d31}, d1 :: Qd 0x12121212 0x12121212 Qm (i8)0x00000007 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d0, {d20}, d1 :: Qd 0x56565656 0x56565656 Qm (i8)0x00000001 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d0, {d20}, d1 :: Qd 0x56565656 0x56565656 Qm (i8)0x00000001 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d0, {d2}, d31 :: Qd 0x34343434 0x34343434 Qm (i8)0x00000002 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d0, {d2}, d31 :: Qd 0x34343434 0x34343434 Qm (i8)0x00000002 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d30, {d2}, d1 :: Qd 0x12125656 0x12125656 Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d30, {d2}, d1 :: Qd 0x12125656 0x12125656 Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d31, {d2}, d1 :: Qd 0x56785678 0x56785678 Qm (i16)0x00000104 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d31, {d2}, d1 :: Qd 0x56785678 0x56785678 Qm (i16)0x00000104 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d30, {d2}, d1 :: Qd 0x12005656 0x12005656 Qm (i32)0x07080501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d30, {d2}, d1 :: Qd 0x12005656 0x12005656 Qm (i32)0x07080501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d30, {d2}, d1 :: Qd 0x12005600 0x12005600 Qm (i32)0x07ed05ee Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbl.8 d30, {d2}, d1 :: Qd 0x12005600 0x12005600 Qm (i32)0x07ed05ee Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbl.8 d0, {d2-d3}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d2-d3}, d1 :: Qd 0x1c1c1c1c 0x1c1c1c1c Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d1-d2}, d3 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d1-d2}, d3 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d30-d31}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d30-d31}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d23}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d23}, d1 :: Qd 0x1d1d1d1d 0x1d1d1d1d Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000e Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000e Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d3}, d31 :: Qd 0x12125656 0x12125656 Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d3}, d31 :: Qd 0x1514191f 0x1514191f Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d3}, d31 :: Qd 0xa4a25656 0xa4a25656 Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d3}, d31 :: Qd 0xa4a2191f 0xa4a2191f Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d3}, d31 :: Qd 0x12a2a256 0x12a2a256 Qm (i32)0x070e0e01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d3}, d31 :: Qd 0x15a2a21f 0x15a2a21f Qm (i32)0x070e0e01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d3}, d31 :: Qd 0xa300a156 0xa300a156 Qm (i32)0x0d130f01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d3}, d31 :: Qd 0xa300a11f 0xa300a11f Qm (i32)0x0d130f01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d3}, d31 :: Qd 0x12125600 0x12125600 Qm (i32)0x07030511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d3}, d31 :: Qd 0x15141900 0x15141900 Qm (i32)0x07030511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d2-d4}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d2-d4}, d1 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d1-d3}, d10 :: Qd 0xcccccccc 0xcccccccc Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d1-d3}, d10 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d29-d31}, d1 :: Qd 0xcacacaca 0xcacacaca Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d29-d31}, d1 :: Qd 0x15151515 0x15151515 Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d24}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d24}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d24}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d24}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d24}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d24}, d1 :: Qd 0x1b1b1b1b 0x1b1b1b1b Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d24}, d1 :: Qd 0xcdcdcdcd 0xcdcdcdcd Qm (i8)0x00000010 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d24}, d1 :: Qd 0x1c1c1c1c 0x1c1c1c1c Qm (i8)0x00000010 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d22-d24}, d1 :: Qd 0xcccccccc 0xcccccccc Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d0, {d22-d24}, d1 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d4}, d31 :: Qd 0xa212cc78 0xa212cc78 Qm (i32)0x0a031504 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d4}, d31 :: Qd 0xa212191b 0xa212191b Qm (i32)0x0a031504 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d4}, d31 :: Qd 0xa4a25656 0xa4a25656 Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d4}, d31 :: Qd 0xa4a21a1e 0xa4a21a1e Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d4}, d31 :: Qd 0xcaa200a1 0xcaa200a1 Qm (i32)0x170efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d4}, d31 :: Qd 0x15a200a1 0x15a200a1 Qm (i32)0x170efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d4}, d31 :: Qd 0xa3caa1cc 0xa3caa1cc Qm (i32)0x0d130f11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d4}, d31 :: Qd 0xa314a11f 0xa314a11f Qm (i32)0x0d130f11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d30, {d2-d4}, d31 :: Qd 0x12a1cccc 0x12a1cccc Qm (i32)0x070f1511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbl.8 d30, {d2-d4}, d31 :: Qd 0x13a1191f 0x13a1191f Qm (i32)0x070f1511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbl.8 d0, {d2-d5}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d2-d5}, d1 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d0, {d1-d4}, d10 :: Qd 0xcccccccc 0xcccccccc Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d1-d4}, d10 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d0, {d28-d31}, d1 :: Qd 0xcacacaca 0xcacacaca Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d28-d31}, d1 :: Qd 0x15151515 0x15151515 Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d0, {d22-d25}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d22-d25}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d22-d25}, d1 :: Qd 0xfdfdfdfd 0xfdfdfdfd Qm (i8)0x0000001a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d0, {d22-d25}, d1 :: Qd 0xfdfdfdfd 0xfdfdfdfd Qm (i8)0x0000001a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d0, {d22-d25}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d22-d25}, d1 :: Qd 0x1b1b1b1b 0x1b1b1b1b Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d0, {d22-d25}, d1 :: Qd 0xcbcbcbcb 0xcbcbcbcb Qm (i8)0x00000016 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d22-d25}, d1 :: Qd 0x1d1d1d1d 0x1d1d1d1d Qm (i8)0x00000016 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d0, {d22-d25}, d1 :: Qd 0xfefefefe 0xfefefefe Qm (i8)0x0000001f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d0, {d22-d25}, d1 :: Qd 0xfefefefe 0xfefefefe Qm (i8)0x0000001f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d30, {d2-d5}, d31 :: Qd 0xfd12cc00 0xfd12cc00 Qm (i32)0x1a0315ff Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d30, {d2-d5}, d31 :: Qd 0xfd121900 0xfd121900 Qm (i32)0x1a0315ff Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d30, {d2-d5}, d31 :: Qd 0xa4a25656 0xa4a25656 Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d30, {d2-d5}, d31 :: Qd 0xa4a21a1e 0xa4a21a1e Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d30, {d2-d5}, d31 :: Qd 0xcafd00a1 0xcafd00a1 Qm (i32)0x171efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d30, {d2-d5}, d31 :: Qd 0x15fd00a1 0x15fd00a1 Qm (i32)0x171efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d30, {d2-d5}, d31 :: Qd 0xfccaa1fd 0xfccaa1fd Qm (i32)0x1d130f1a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d30, {d2-d5}, d31 :: Qd 0xfc14a1fd 0xfc14a1fd Qm (i32)0x1d130f1a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbl.8 d30, {d2-d5}, d31 :: Qd 0xcacdfbcc 0xcacdfbcc Qm (i32)0x17101c11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbl.8 d30, {d2-d5}, d31 :: Qd 0x151cfb1f 0x151cfb1f Qm (i32)0x17101c11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
---- VTBX ----
vtbx.8 d0, {d2}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d0, {d2}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d0, {d31}, d1 :: Qd 0x12121212 0x12121212 Qm (i8)0x00000007 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d0, {d31}, d1 :: Qd 0x12121212 0x12121212 Qm (i8)0x00000007 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d0, {d20}, d1 :: Qd 0x56565656 0x56565656 Qm (i8)0x00000001 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d0, {d20}, d1 :: Qd 0x56565656 0x56565656 Qm (i8)0x00000001 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d0, {d2}, d31 :: Qd 0x34343434 0x34343434 Qm (i8)0x00000002 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d0, {d2}, d31 :: Qd 0x34343434 0x34343434 Qm (i8)0x00000002 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d30, {d2}, d1 :: Qd 0x12125656 0x12125656 Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d30, {d2}, d1 :: Qd 0x12125656 0x12125656 Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d31, {d2}, d1 :: Qd 0x56785678 0x56785678 Qm (i16)0x00000104 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d31, {d2}, d1 :: Qd 0x56785678 0x56785678 Qm (i16)0x00000104 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d30, {d2}, d1 :: Qd 0x12555656 0x12555656 Qm (i32)0x07080501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d30, {d2}, d1 :: Qd 0x12555656 0x12555656 Qm (i32)0x07080501 Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d30, {d2}, d1 :: Qd 0x12555655 0x12555655 Qm (i32)0x07ed05ee Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
+vtbx.8 d30, {d2}, d1 :: Qd 0x12555655 0x12555655 Qm (i32)0x07ed05ee Qn1 (i32)0x12345678 Qn2 (i32)0x12345678 Qn3 (i32)0x12345678 Qn4 (i32)0x12345678
vtbx.8 d0, {d2-d3}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d2-d3}, d1 :: Qd 0x1c1c1c1c 0x1c1c1c1c Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d1-d2}, d3 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d1-d2}, d3 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d30-d31}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d30-d31}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d23}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d23}, d1 :: Qd 0x1d1d1d1d 0x1d1d1d1d Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000e Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa2a2a2a2 0xa2a2a2a2 Qm (i8)0x0000000e Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d23}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d3}, d31 :: Qd 0x12125656 0x12125656 Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d3}, d31 :: Qd 0x1514191f 0x1514191f Qm (i32)0x07030501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d3}, d31 :: Qd 0xa4a25656 0xa4a25656 Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d3}, d31 :: Qd 0xa4a2191f 0xa4a2191f Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d3}, d31 :: Qd 0x12a2a256 0x12a2a256 Qm (i32)0x070e0e01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d3}, d31 :: Qd 0x15a2a21f 0x15a2a21f Qm (i32)0x070e0e01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d3}, d31 :: Qd 0xa355a156 0xa355a156 Qm (i32)0x0d130f01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d3}, d31 :: Qd 0xa355a11f 0xa355a11f Qm (i32)0x0d130f01 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d3}, d31 :: Qd 0x12125655 0x12125655 Qm (i32)0x07030511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d3}, d31 :: Qd 0x15141955 0x15141955 Qm (i32)0x07030511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0x12345678 Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d2-d4}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d2-d4}, d1 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d1-d3}, d10 :: Qd 0xcccccccc 0xcccccccc Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d1-d3}, d10 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d29-d31}, d1 :: Qd 0xcacacaca 0xcacacaca Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d29-d31}, d1 :: Qd 0x15151515 0x15151515 Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d24}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d24}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d24}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d24}, d1 :: Qd 0xa1a1a1a1 0xa1a1a1a1 Qm (i8)0x0000000f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d24}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d24}, d1 :: Qd 0x1b1b1b1b 0x1b1b1b1b Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d24}, d1 :: Qd 0xcdcdcdcd 0xcdcdcdcd Qm (i8)0x00000010 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d24}, d1 :: Qd 0x1c1c1c1c 0x1c1c1c1c Qm (i8)0x00000010 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d22-d24}, d1 :: Qd 0xcccccccc 0xcccccccc Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d0, {d22-d24}, d1 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d4}, d31 :: Qd 0xa212cc78 0xa212cc78 Qm (i32)0x0a031504 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d4}, d31 :: Qd 0xa212191b 0xa212191b Qm (i32)0x0a031504 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d4}, d31 :: Qd 0xa4a25656 0xa4a25656 Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d4}, d31 :: Qd 0xa4a21a1e 0xa4a21a1e Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d4}, d31 :: Qd 0xcaa255a1 0xcaa255a1 Qm (i32)0x170efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d4}, d31 :: Qd 0x15a255a1 0x15a255a1 Qm (i32)0x170efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d4}, d31 :: Qd 0xa3caa1cc 0xa3caa1cc Qm (i32)0x0d130f11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d4}, d31 :: Qd 0xa314a11f 0xa314a11f Qm (i32)0x0d130f11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d30, {d2-d4}, d31 :: Qd 0x12a1cccc 0x12a1cccc Qm (i32)0x070f1511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
+vtbx.8 d30, {d2-d4}, d31 :: Qd 0x13a1191f 0x13a1191f Qm (i32)0x070f1511 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xa1a2a3a4
vtbx.8 d0, {d2-d5}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d2-d5}, d1 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000000 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d0, {d1-d4}, d10 :: Qd 0xcccccccc 0xcccccccc Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d1-d4}, d10 :: Qd 0x1f1f1f1f 0x1f1f1f1f Qm (i8)0x00000011 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d0, {d28-d31}, d1 :: Qd 0xcacacaca 0xcacacaca Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d28-d31}, d1 :: Qd 0x15151515 0x15151515 Qm (i8)0x00000017 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d22-d25}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d0, {d22-d25}, d1 :: Qd 0xa3a3a3a3 0xa3a3a3a3 Qm (i8)0x00000009 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d0, {d22-d25}, d1 :: Qd 0xfdfdfdfd 0xfdfdfdfd Qm (i8)0x0000001a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d22-d25}, d1 :: Qd 0xfdfdfdfd 0xfdfdfdfd Qm (i8)0x0000001a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d0, {d22-d25}, d1 :: Qd 0x78787878 0x78787878 Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d22-d25}, d1 :: Qd 0x1b1b1b1b 0x1b1b1b1b Qm (i8)0x00000004 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d0, {d22-d25}, d1 :: Qd 0xcbcbcbcb 0xcbcbcbcb Qm (i8)0x00000016 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d22-d25}, d1 :: Qd 0x1d1d1d1d 0x1d1d1d1d Qm (i8)0x00000016 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d0, {d22-d25}, d1 :: Qd 0xfefefefe 0xfefefefe Qm (i8)0x0000001f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d0, {d22-d25}, d1 :: Qd 0xfefefefe 0xfefefefe Qm (i8)0x0000001f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d30, {d2-d5}, d31 :: Qd 0xfd12cc55 0xfd12cc55 Qm (i32)0x1a0315ff Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d30, {d2-d5}, d31 :: Qd 0xfd121955 0xfd121955 Qm (i32)0x1a0315ff Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d30, {d2-d5}, d31 :: Qd 0xa4a25656 0xa4a25656 Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d30, {d2-d5}, d31 :: Qd 0xa4a21a1e 0xa4a21a1e Qm (i32)0x0c0a0501 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d30, {d2-d5}, d31 :: Qd 0xcafd55a1 0xcafd55a1 Qm (i32)0x171efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d30, {d2-d5}, d31 :: Qd 0x15fd55a1 0x15fd55a1 Qm (i32)0x171efe0f Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d30, {d2-d5}, d31 :: Qd 0xfccaa1fd 0xfccaa1fd Qm (i32)0x1d130f1a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d30, {d2-d5}, d31 :: Qd 0xfc14a1fd 0xfc14a1fd Qm (i32)0x1d130f1a Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
vtbx.8 d30, {d2-d5}, d31 :: Qd 0xcacdfbcc 0xcacdfbcc Qm (i32)0x17101c11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
+vtbx.8 d30, {d2-d5}, d31 :: Qd 0x151cfb1f 0x151cfb1f Qm (i32)0x17101c11 Qn1 (i32)0x12345678 Qn2 (i32)0xa1a2a3a4 Qn3 (i32)0xcacbcccd Qn4 (i32)0xfefdfcfb
---- VPMAX (integer) ----
vpmax.s32 d0, d1, d2 :: Qd 0x00000079 0x00000019 Qm (i32)0x00000019 Qn (i32)0x00000079
+vpmax.s32 d0, d1, d2 :: Qd 0x00000079 0x131b1a1b Qm (i32)0x00000019 Qn (i32)0x00000079
vpmax.s32 d0, d1, d2 :: Qd 0x00000079 0x000000fa Qm (i32)0x000000fa Qn (i32)0x00000079
+vpmax.s32 d0, d1, d2 :: Qd 0x00000079 0x131b1a1b Qm (i32)0x000000fa Qn (i32)0x00000079
vpmax.s32 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
+vpmax.s32 d0, d1, d2 :: Qd 0x0000008c 0x131b1a1b Qm (i32)0x0000008c Qn (i32)0x0000008c
vpmax.s16 d0, d1, d2 :: Qd 0x00780078 0x01400140 Qm (i32)0x01200140 Qn (i32)0x00000078
+vpmax.s16 d0, d1, d2 :: Qd 0x00780078 0x1a1b1e1f Qm (i32)0x01200140 Qn (i32)0x00000078
vpmax.s8 d0, d1, d2 :: Qd 0x00780078 0x00780078 Qm (i32)0x00000078 Qn (i32)0x00000078
+vpmax.s8 d0, d1, d2 :: Qd 0x00780078 0x1b1b1f1f Qm (i32)0x00000078 Qn (i32)0x00000078
vpmax.s8 d5, d7, d5 :: Qd 0x00020002 0x00010001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmax.s8 d5, d7, d5 :: Qd 0x00020002 0x1b1b1f1f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmax.s16 d0, d1, d2 :: Qd 0x00020002 0x00010001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmax.s16 d0, d1, d2 :: Qd 0x00020002 0x1a1b1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmax.s32 d0, d1, d2 :: Qd 0x80000002 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmax.s32 d0, d1, d2 :: Qd 0x80000002 0x131b1a1b Qm (i32)0x80000001 Qn (i32)0x80000002
vpmax.s8 d5, d7, d5 :: Qd 0x00030003 0x00010001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmax.s8 d5, d7, d5 :: Qd 0x00030003 0x1b1b1f1f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmax.s16 d0, d1, d2 :: Qd 0x00030003 0x00010001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmax.s16 d0, d1, d2 :: Qd 0x00030003 0x1a1b1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmax.s32 d0, d1, d2 :: Qd 0x80000003 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmax.s32 d0, d1, d2 :: Qd 0x80000003 0x131b1a1b Qm (i32)0x80000001 Qn (i32)0x80000003
vpmax.s8 d5, d7, d5 :: Qd 0x00020002 0x00040004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmax.s8 d5, d7, d5 :: Qd 0x00020002 0x1b1b1f1f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmax.s16 d0, d1, d2 :: Qd 0x00020002 0x00040004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmax.s16 d0, d1, d2 :: Qd 0x00020002 0x1a1b1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmax.s32 d0, d1, d2 :: Qd 0x80000002 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmax.s32 d0, d1, d2 :: Qd 0x80000002 0x131b1a1b Qm (i32)0x80000004 Qn (i32)0x80000002
vpmax.s32 d10, d11, d12 :: Qd 0x00000078 0x00000018 Qm (i32)0x00000018 Qn (i32)0x00000078
+vpmax.s32 d10, d11, d12 :: Qd 0x00000078 0x131b1a1b Qm (i32)0x00000018 Qn (i32)0x00000078
vpmax.u32 d0, d1, d2 :: Qd 0x00000078 0x00000019 Qm (i32)0x00000019 Qn (i32)0x00000078
+vpmax.u32 d0, d1, d2 :: Qd 0x00000078 0x131b1a1b Qm (i32)0x00000019 Qn (i32)0x00000078
vpmax.u32 d0, d1, d2 :: Qd 0x00000078 0x000000fa Qm (i32)0x000000fa Qn (i32)0x00000078
+vpmax.u32 d0, d1, d2 :: Qd 0x00000078 0x131b1a1b Qm (i32)0x000000fa Qn (i32)0x00000078
vpmax.u32 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
+vpmax.u32 d0, d1, d2 :: Qd 0x0000008c 0x131b1a1b Qm (i32)0x0000008c Qn (i32)0x0000008c
vpmax.u16 d0, d1, d2 :: Qd 0x00780078 0x01400140 Qm (i32)0x01200140 Qn (i32)0x00000078
+vpmax.u16 d0, d1, d2 :: Qd 0x00780078 0x1a1b1e1f Qm (i32)0x01200140 Qn (i32)0x00000078
vpmax.u8 d0, d1, d2 :: Qd 0x00780078 0x20212021 Qm (i32)0x01202120 Qn (i32)0x00000078
+vpmax.u8 d0, d1, d2 :: Qd 0x00780078 0x1b1b1f1f Qm (i32)0x01202120 Qn (i32)0x00000078
vpmax.u8 d0, d1, d2 :: Qd 0x80028002 0x80018001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmax.u8 d0, d1, d2 :: Qd 0x80028002 0x1b1b1f1f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmax.u16 d0, d1, d2 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmax.u16 d0, d1, d2 :: Qd 0x80008000 0x1a1b1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmax.u32 d0, d1, d2 :: Qd 0x80000002 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmax.u32 d0, d1, d2 :: Qd 0x80000002 0x131b1a1b Qm (i32)0x80000001 Qn (i32)0x80000002
vpmax.u8 d0, d1, d2 :: Qd 0x80038003 0x80018001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmax.u8 d0, d1, d2 :: Qd 0x80038003 0x1b1b1f1f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmax.u16 d0, d1, d2 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmax.u16 d0, d1, d2 :: Qd 0x80008000 0x1a1b1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmax.u32 d0, d1, d2 :: Qd 0x80000003 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmax.u32 d0, d1, d2 :: Qd 0x80000003 0x131b1a1b Qm (i32)0x80000001 Qn (i32)0x80000003
vpmax.u8 d0, d1, d2 :: Qd 0x80028002 0x80048004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmax.u8 d0, d1, d2 :: Qd 0x80028002 0x1b1b1f1f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmax.u16 d0, d1, d2 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmax.u16 d0, d1, d2 :: Qd 0x80008000 0x1a1b1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmax.u32 d0, d1, d2 :: Qd 0x80000002 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmax.u32 d0, d1, d2 :: Qd 0x80000002 0x131b1a1b Qm (i32)0x80000004 Qn (i32)0x80000002
vpmax.u32 d10, d11, d12 :: Qd 0x00000078 0x00000018 Qm (i32)0x00000018 Qn (i32)0x00000078
+vpmax.u32 d10, d11, d12 :: Qd 0x00000078 0x131b1a1b Qm (i32)0x00000018 Qn (i32)0x00000078
---- VPMIN (integer) ----
vpmin.s32 d0, d1, d2 :: Qd 0x00000079 0x00000019 Qm (i32)0x00000019 Qn (i32)0x00000079
+vpmin.s32 d0, d1, d2 :: Qd 0x00000079 0x121f1e1f Qm (i32)0x00000019 Qn (i32)0x00000079
vpmin.s32 d0, d1, d2 :: Qd 0x00000079 0x000000fa Qm (i32)0x000000fa Qn (i32)0x00000079
+vpmin.s32 d0, d1, d2 :: Qd 0x00000079 0x121f1e1f Qm (i32)0x000000fa Qn (i32)0x00000079
vpmin.s32 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
+vpmin.s32 d0, d1, d2 :: Qd 0x0000008c 0x121f1e1f Qm (i32)0x0000008c Qn (i32)0x0000008c
vpmin.s16 d0, d1, d2 :: Qd 0x00000000 0x01200120 Qm (i32)0x01200140 Qn (i32)0x00000078
+vpmin.s16 d0, d1, d2 :: Qd 0x00000000 0x131b121f Qm (i32)0x01200140 Qn (i32)0x00000078
vpmin.s8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000078 Qn (i32)0x00000078
+vpmin.s8 d0, d1, d2 :: Qd 0x00000000 0x131a121e Qm (i32)0x00000078 Qn (i32)0x00000078
vpmin.s8 d5, d7, d5 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmin.s8 d5, d7, d5 :: Qd 0x80008000 0x131a121e Qm (i32)0x80000001 Qn (i32)0x80000002
vpmin.s16 d0, d1, d2 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmin.s16 d0, d1, d2 :: Qd 0x80008000 0x131b121f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmin.s32 d0, d1, d2 :: Qd 0x80000002 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmin.s32 d0, d1, d2 :: Qd 0x80000002 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmin.s8 d5, d7, d5 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmin.s8 d5, d7, d5 :: Qd 0x80008000 0x131a121e Qm (i32)0x80000001 Qn (i32)0x80000003
vpmin.s16 d0, d1, d2 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmin.s16 d0, d1, d2 :: Qd 0x80008000 0x131b121f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmin.s32 d0, d1, d2 :: Qd 0x80000003 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmin.s32 d0, d1, d2 :: Qd 0x80000003 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmin.s8 d5, d7, d5 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmin.s8 d5, d7, d5 :: Qd 0x80008000 0x131a121e Qm (i32)0x80000004 Qn (i32)0x80000002
vpmin.s16 d0, d1, d2 :: Qd 0x80008000 0x80008000 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmin.s16 d0, d1, d2 :: Qd 0x80008000 0x131b121f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmin.s32 d0, d1, d2 :: Qd 0x80000002 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmin.s32 d0, d1, d2 :: Qd 0x80000002 0x121f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmin.s32 d10, d11, d12 :: Qd 0x00000078 0x00000018 Qm (i32)0x00000018 Qn (i32)0x00000078
+vpmin.s32 d10, d11, d12 :: Qd 0x00000078 0x121f1e1f Qm (i32)0x00000018 Qn (i32)0x00000078
vpmin.u32 d0, d1, d2 :: Qd 0x00000078 0x00000019 Qm (i32)0x00000019 Qn (i32)0x00000078
+vpmin.u32 d0, d1, d2 :: Qd 0x00000078 0x121f1e1f Qm (i32)0x00000019 Qn (i32)0x00000078
vpmin.u32 d0, d1, d2 :: Qd 0x00000078 0x000000fa Qm (i32)0x000000fa Qn (i32)0x00000078
+vpmin.u32 d0, d1, d2 :: Qd 0x00000078 0x121f1e1f Qm (i32)0x000000fa Qn (i32)0x00000078
vpmin.u32 d0, d1, d2 :: Qd 0x0000008c 0x0000008c Qm (i32)0x0000008c Qn (i32)0x0000008c
+vpmin.u32 d0, d1, d2 :: Qd 0x0000008c 0x121f1e1f Qm (i32)0x0000008c Qn (i32)0x0000008c
vpmin.u16 d0, d1, d2 :: Qd 0x00000000 0x01200120 Qm (i32)0x01200140 Qn (i32)0x00000078
+vpmin.u16 d0, d1, d2 :: Qd 0x00000000 0x131b121f Qm (i32)0x01200140 Qn (i32)0x00000078
vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x01200120 Qm (i32)0x01202120 Qn (i32)0x00000078
+vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x131a121e Qm (i32)0x01202120 Qn (i32)0x00000078
vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x131a121e Qm (i32)0x80000001 Qn (i32)0x80000002
vpmin.u16 d0, d1, d2 :: Qd 0x00020002 0x00010001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmin.u16 d0, d1, d2 :: Qd 0x00020002 0x131b121f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmin.u32 d0, d1, d2 :: Qd 0x80000002 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000002
+vpmin.u32 d0, d1, d2 :: Qd 0x80000002 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000002
vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x131a121e Qm (i32)0x80000001 Qn (i32)0x80000003
vpmin.u16 d0, d1, d2 :: Qd 0x00030003 0x00010001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmin.u16 d0, d1, d2 :: Qd 0x00030003 0x131b121f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmin.u32 d0, d1, d2 :: Qd 0x80000003 0x80000001 Qm (i32)0x80000001 Qn (i32)0x80000003
+vpmin.u32 d0, d1, d2 :: Qd 0x80000003 0x121f1e1f Qm (i32)0x80000001 Qn (i32)0x80000003
vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmin.u8 d0, d1, d2 :: Qd 0x00000000 0x131a121e Qm (i32)0x80000004 Qn (i32)0x80000002
vpmin.u16 d0, d1, d2 :: Qd 0x00020002 0x00040004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmin.u16 d0, d1, d2 :: Qd 0x00020002 0x131b121f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmin.u32 d0, d1, d2 :: Qd 0x80000002 0x80000004 Qm (i32)0x80000004 Qn (i32)0x80000002
+vpmin.u32 d0, d1, d2 :: Qd 0x80000002 0x121f1e1f Qm (i32)0x80000004 Qn (i32)0x80000002
vpmin.u32 d10, d11, d12 :: Qd 0x00000078 0x00000018 Qm (i32)0x00000018 Qn (i32)0x00000078
+vpmin.u32 d10, d11, d12 :: Qd 0x00000078 0x121f1e1f Qm (i32)0x00000018 Qn (i32)0x00000078
---- VQRDMULH ----
vqrdmulh.s32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 d0, d1, d2 :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 d6, d7, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqrdmulh.s32 d6, d7, d8 :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqrdmulh.s16 d9, d11, d12 :: Qd 0x00000003 0x00000003 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqrdmulh.s16 d9, d11, d12 :: Qd 0x0000003b 0x00000044 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqrdmulh.s16 d4, d5, d6 :: Qd 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 d4, d5, d6 :: Qd 0x00000687 0x00000788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 d7, d8, d9 :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 d7, d8, d9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s16 d4, d5, d6 :: Qd 0x0000e50b 0x0000e50b Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 d4, d5, d6 :: Qd 0x00000687 0x00000788 Qm (i32)0xffff9433 Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 d7, d8, d9 :: Qd 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqrdmulh.s32 d7, d8, d9 :: Qd 0x00000002 0x00000002 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqrdmulh.s16 d4, d5, d6 :: Qd 0x00000040 0x00000040 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 d4, d5, d6 :: Qd 0x00000687 0x00000788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 d7, d8, d9 :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 d7, d8, d9 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s32 d10, d11, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 d10, d11, d15 :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 d10, d30, d31 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 08000000
+vqrdmulh.s32 d10, d30, d31 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s16 d10, d30, d31 :: Qd 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 08000000
+vqrdmulh.s16 d10, d30, d31 :: Qd 0xece50000 0xede10000 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 00000000
vqrdmulh.s32 d10, d30, d31 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 d10, d30, d31 :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s16 d10, d30, d31 :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqrdmulh.s16 d10, d30, d31 :: Qd 0x098e0000 0x09100000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VQRDMULH (by scalar) ----
vqrdmulh.s32 d0, d1, d6[0] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 d0, d1, d6[0] :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 d6, d7, d1[1] :: Qd 0x00000000 0x00000000 Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
+vqrdmulh.s32 d6, d7, d1[1] :: Qd 0xffffffee 0xffffffef Qm (i32)0x0000008c Qn (i32)0xffffff88 fpscr: 00000000
vqrdmulh.s16 d9, d11, d7[0] :: Qd 0x00000003 0x00000003 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
+vqrdmulh.s16 d9, d11, d7[0] :: Qd 0x002b003b 0x00290044 Qm (i32)0x00000140 Qn (i32)0x00000120 fpscr: 00000000
vqrdmulh.s16 d4, d5, d6[0] :: Qd 0x00001001 0x00001001 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 d4, d5, d6[0] :: Qd 0x04c70687 0x04880788 Qm (i32)0x00004001 Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 d7, d8, d9[1] :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 d7, d8, d9[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s16 d4, d5, d6[1] :: Qd 0x0000e50b 0x0000e50b Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
+vqrdmulh.s16 d4, d5, d6[1] :: Qd 0x04c70687 0x04880788 Qm (i32)0xffff9433 Qn (i16)0x00002002 fpscr: 00000000
vqrdmulh.s32 d7, d8, d9[0] :: Qd 0xfffffff4 0xfffffff4 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
+vqrdmulh.s32 d7, d8, d9[0] :: Qd 0x00000002 0x00000002 Qm (i32)0x80000000 Qn (i32)0x0000000c fpscr: 00000000
vqrdmulh.s16 d4, d5, d6[2] :: Qd 0x04000040 0x04000040 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
+vqrdmulh.s16 d4, d5, d6[2] :: Qd 0x04c70687 0x04880788 Qm (i32)0x100000fe Qn (i32)0x00002002 fpscr: 00000000
vqrdmulh.s32 d7, d8, d9[0] :: Qd 0x7ffffffd 0x7ffffffd Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
+vqrdmulh.s32 d7, d8, d9[0] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x80000001 Qn (i32)0x80000002 fpscr: 00000000
vqrdmulh.s32 d10, d31, d15[0] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
+vqrdmulh.s32 d10, d31, d15[0] :: Qd 0x00000012 0x00000011 Qm (i32)0x00000018 Qn (i32)0x00000078 fpscr: 00000000
vqrdmulh.s32 d10, d14, d15[1] :: Qd 0xffffff88 0xffffff88 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 d10, d14, d15[1] :: Qd 0x00000012 0x00000011 Qm (i32)0x80000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s16 d10, d14, d7[3] :: Qd 0x7fff0000 0x7fff0000 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 08000000
+vqrdmulh.s16 d10, d14, d7[3] :: Qd 0xece5e5e5 0xede1e1e1 Qm (i32)0x80000000 Qn (i32)0x80000001 fpscr: 00000000
vqrdmulh.s32 d10, d14, d15[1] :: Qd 0xc0000000 0xc0000000 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
+vqrdmulh.s32 d10, d14, d15[1] :: Qd 0xece4e5e5 0xede0e1e1 Qm (i32)0x40000000 Qn (i32)0x80000000 fpscr: 00000000
vqrdmulh.s16 d31, d14, d7[1] :: Qd 0xc0000000 0xc0000000 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
+vqrdmulh.s16 d31, d14, d7[1] :: Qd 0x098e0d0e 0x09100f10 Qm (i32)0x80000000 Qn (i32)0x40000000 fpscr: 00000000
---- VADD (fp) ----
vadd.f32 d0, d5, d2 :: Qd 0xc1b43ac6 0xc1b43ac6 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vadd.f32 d0, d5, d2 :: Qd 0xc2364659 0xc2364659 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vadd.f32 d3, d4, d5 :: Qd 0xc8a931cf 0xc8a931cf Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vadd.f32 d3, d4, d5 :: Qd 0x44a84000 0x44a84000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vadd.f32 d10, d11, d2 :: Qd 0x45398860 0x45398860 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vadd.f32 d10, d11, d2 :: Qd 0xc732da7a 0xc732da7a Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vadd.f32 d9, d5, d7 :: Qd 0x47dc9261 0x47dc9261 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vadd.f32 d9, d5, d7 :: Qd 0x46855200 0x46855200 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vadd.f32 d0, d5, d2 :: Qd 0xc88faac0 0xc88faac0 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vadd.f32 d0, d5, d2 :: Qd 0xc872bcb1 0xc872bcb1 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vadd.f32 d3, d4, d5 :: Qd 0x44ab5c08 0x44ab5c08 Qm (i32)0x41c70126 Qn (i32)0x44a84003
+vadd.f32 d3, d4, d5 :: Qd 0x44a84003 0x44a84003 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vadd.f32 d10, d11, d2 :: Qd 0x4742b4e6 0x4742b4e6 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vadd.f32 d10, d11, d2 :: Qd 0x44882666 0x44882666 Qm (i32)0x473e73b3 Qn (i32)0x44882666
vadd.f32 d9, d5, d7 :: Qd 0x49d5e6b8 0x49d5e6b8 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vadd.f32 d9, d5, d7 :: Qd 0x49d5e008 0x49d5e008 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vadd.f32 d0, d11, d12 :: Qd 0x48b0b752 0x48b0b752 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vadd.f32 d0, d11, d12 :: Qd 0x45b75812 0x45b75812 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vadd.f32 d7, d1, d6 :: Qd 0x420802fd 0x420802fd Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vadd.f32 d7, d1, d6 :: Qd 0x3b210e02 0x3b210e02 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vadd.f32 d0, d1, d2 :: Qd 0x4532d000 0x4532d000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vadd.f32 d0, d1, d2 :: Qd 0x42d60000 0x42d60000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vadd.f32 d3, d4, d5 :: Qd 0x450d299a 0x450d299a Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vadd.f32 d3, d4, d5 :: Qd 0x44ad1333 0x44ad1333 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vadd.f32 d10, d11, d2 :: Qd 0x44152592 0x44152592 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vadd.f32 d10, d11, d2 :: Qd 0x42da0000 0x42da0000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vadd.f32 d9, d5, d7 :: Qd 0x4573a000 0x4573a000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vadd.f32 d9, d5, d7 :: Qd 0x44db0000 0x44db0000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vadd.f32 d0, d11, d12 :: Qd 0xc5b695c3 0xc5b695c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vadd.f32 d0, d11, d12 :: Qd 0xc5b4d3c3 0xc5b4d3c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vadd.f32 d7, d1, d6 :: Qd 0x43e07a2a 0x43e07a2a Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vadd.f32 d7, d1, d6 :: Qd 0xc0e96d19 0xc0e96d19 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vadd.f32 d0, d5, d2 :: Qd 0x44053ee0 0x44053ee0 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vadd.f32 d0, d5, d2 :: Qd 0xbb965394 0xbb965394 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vadd.f32 d10, d13, d15 :: Qd 0xc4838fb4 0xc4838fb4 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vadd.f32 d10, d13, d15 :: Qd 0xc40dcfae 0xc40dcfae Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vadd.f32 d10, d13, d15 :: Qd 0x488c3d8e 0x488c3d8e Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vadd.f32 d10, d13, d15 :: Qd 0x4608d008 0x4608d008 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vadd.f32 d0, d1, d2 :: Qd 0x4efa8dc5 0x4efa8dc5 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vadd.f32 d0, d1, d2 :: Qd 0x4e920233 0x4e920233 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vadd.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vadd.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x00000000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vadd.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vadd.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vadd.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vadd.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x00000000
vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
+vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vadd.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vadd.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x00000000
+vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vadd.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vadd.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x00000000
vadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
vadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VSUB (fp) ----
vsub.f32 d0, d5, d2 :: Qd 0x428937a8 0x428937a8 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vsub.f32 d0, d5, d2 :: Qd 0x42364659 0x42364659 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vsub.f32 d3, d4, d5 :: Qd 0xc8aa824f 0xc8aa824f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vsub.f32 d3, d4, d5 :: Qd 0xc4a84000 0xc4a84000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vsub.f32 d10, d11, d2 :: Qd 0x47b8a6bd 0x47b8a6bd Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vsub.f32 d10, d11, d2 :: Qd 0x4732da7a 0x4732da7a Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vsub.f32 d9, d5, d7 :: Qd 0x4799e961 0x4799e961 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vsub.f32 d9, d5, d7 :: Qd 0xc6855200 0xc6855200 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vsub.f32 d0, d5, d2 :: Qd 0x484623e2 0x484623e2 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vsub.f32 d0, d5, d2 :: Qd 0x4872bcb1 0x4872bcb1 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vsub.f32 d3, d4, d5 :: Qd 0xc4a54000 0xc4a54000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vsub.f32 d3, d4, d5 :: Qd 0xc4a84000 0xc4a84000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vsub.f32 d10, d11, d2 :: Qd 0x473a3200 0x473a3200 Qm (i32)0x473e7300 Qn (i32)0x44882000
+vsub.f32 d10, d11, d2 :: Qd 0xc4882000 0xc4882000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vsub.f32 d9, d5, d7 :: Qd 0xc9d5d958 0xc9d5d958 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vsub.f32 d9, d5, d7 :: Qd 0xc9d5e008 0xc9d5e008 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vsub.f32 d0, d11, d12 :: Qd 0x48aafc92 0x48aafc92 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vsub.f32 d0, d11, d12 :: Qd 0xc5b75812 0xc5b75812 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vsub.f32 d7, d1, d6 :: Qd 0x4207fdf5 0x4207fdf5 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vsub.f32 d7, d1, d6 :: Qd 0xbb210e02 0xbb210e02 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vsub.f32 d0, d1, d2 :: Qd 0x45257000 0x45257000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vsub.f32 d0, d1, d2 :: Qd 0xc2d60000 0xc2d60000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vsub.f32 d3, d4, d5 :: Qd 0xc3ff4ccc 0xc3ff4ccc Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vsub.f32 d3, d4, d5 :: Qd 0xc4ad1333 0xc4ad1333 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vsub.f32 d10, d11, d2 :: Qd 0x43bd4b23 0x43bd4b23 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vsub.f32 d10, d11, d2 :: Qd 0xc2da0000 0xc2da0000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vsub.f32 d9, d5, d7 :: Qd 0x43c50000 0x43c50000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vsub.f32 d9, d5, d7 :: Qd 0xc4db0000 0xc4db0000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vsub.f32 d0, d11, d12 :: Qd 0x45b311c3 0x45b311c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vsub.f32 d0, d11, d12 :: Qd 0x45b4d3c3 0x45b4d3c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vsub.f32 d7, d1, d6 :: Qd 0x43e7c592 0x43e7c592 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vsub.f32 d7, d1, d6 :: Qd 0x40e96d19 0x40e96d19 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vsub.f32 d0, d5, d2 :: Qd 0x44053f76 0x44053f76 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vsub.f32 d0, d5, d2 :: Qd 0x3b965394 0x3b965394 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vsub.f32 d10, d13, d15 :: Qd 0x42a3ffa4 0x42a3ffa4 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vsub.f32 d10, d13, d15 :: Qd 0x440dcfae 0x440dcfae Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vsub.f32 d10, d13, d15 :: Qd 0x4883b08e 0x4883b08e Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vsub.f32 d10, d13, d15 :: Qd 0xc608d008 0xc608d008 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vsub.f32 d0, d1, d2 :: Qd 0xcda5da84 0xcda5da84 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vsub.f32 d0, d1, d2 :: Qd 0xce920233 0xce920233 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vsub.f32 d0, d1, d2 :: Qd 0xbf800000 0xbf800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vsub.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x00000000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0xbf800000 0xbf800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vsub.f32 d0, d1, d2 :: Qd 0xbf800000 0xbf800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vsub.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vsub.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x00000000
+vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vsub.f32 d0, d1, d2 :: Qd 0xbf800000 0xbf800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vsub.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x00000000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vsub.f32 d0, d1, d2 :: Qd 0xbf800000 0xbf800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vsub.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x00000000
+vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vsub.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vsub.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vsub.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMUL (fp) ----
vmul.f32 d0, d5, d2 :: Qd 0xc4833ce4 0xc4833ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmul.f32 d0, d5, d2 :: Qd 0x95dcde5d 0x94e29647 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vmul.f32 d3, d4, d5 :: Qd 0xcddf4321 0xcddf4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vmul.f32 d3, d4, d5 :: Qd 0x184bdfd0 0x17512718 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmul.f32 d10, d11, d2 :: Qd 0xcf050e7f 0xcf050e7f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vmul.f32 d10, d11, d2 :: Qd 0x9ad8b90a 0x99de557a Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmul.f32 d9, d5, d7 :: Qd 0x4ec3063f 0x4ec3063f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmul.f32 d9, d5, d7 :: Qd 0x1a218c7d 0x1925bb3c Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vmul.f32 d0, d5, d2 :: Qd 0x5029254c 0x5029254c Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vmul.f32 d0, d5, d2 :: Qd 0x9c131100 0x9b16dfc1 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vmul.f32 d3, d4, d5 :: Qd 0x46fc6000 0x46fc6000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vmul.f32 d3, d4, d5 :: Qd 0x184bdfd0 0x17512718 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vmul.f32 d10, d11, d2 :: Qd 0x4c4a89cd 0x4c4a89cd Qm (i32)0x473e7300 Qn (i32)0x44882000
+vmul.f32 d10, d11, d2 :: Qd 0x1824f283 0x172937c8 Qm (i32)0x473e7300 Qn (i32)0x44882000
vmul.f32 d9, d5, d7 :: Qd 0x4db2c947 0x4db2c947 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vmul.f32 d9, d5, d7 :: Qd 0x1d819474 0x1c84ef4f Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmul.f32 d0, d11, d12 :: Qd 0x4ef90536 0x4ef90536 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vmul.f32 d0, d11, d12 :: Qd 0x195e2a0a 0x1863ea8b Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vmul.f32 d7, d1, d6 :: Qd 0x3dab1f7a 0x3dab1f7a Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vmul.f32 d7, d1, d6 :: Qd 0x0ec327cf 0x0dc8354d Qm (i32)0x42080079 Qn (i32)0x3b210e02
vmul.f32 d0, d1, d2 :: Qd 0x488fe2c0 0x488fe2c0 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmul.f32 d0, d1, d2 :: Qd 0x1681a7d3 0x1585032e Qm (i32)0x452c2000 Qn (i32)0x42d60000
vmul.f32 d3, d4, d5 :: Qd 0x4993b8e3 0x4993b8e3 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vmul.f32 d3, d4, d5 :: Qd 0x1851b88c 0x17572694 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmul.f32 d10, d11, d2 :: Qd 0x474f9afc 0x474f9afc Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vmul.f32 d10, d11, d2 :: Qd 0x1684143b 0x15877fa6 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vmul.f32 d9, d5, d7 :: Qd 0x4a657ac0 0x4a657ac0 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vmul.f32 d9, d5, d7 :: Qd 0x1884af55 0x17881ec5 Qm (i32)0x45062000 Qn (i32)0x44db0000
vmul.f32 d0, d11, d12 :: Qd 0x489eee1e 0x489eee1e Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmul.f32 d0, d11, d12 :: Qd 0x995b1d4f 0x9860c99a Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vmul.f32 d7, d1, d6 :: Qd 0xc5500239 0xc5500239 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vmul.f32 d7, d1, d6 :: Qd 0x948d6cdc 0x9391163a Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmul.f32 d0, d5, d2 :: Qd 0xc01c7d07 0xc01c7d07 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmul.f32 d0, d5, d2 :: Qd 0x8f3627de 0x8e3adf32 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vmul.f32 d10, d13, d15 :: Qd 0x488666a6 0x488666a6 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vmul.f32 d10, d13, d15 :: Qd 0x97abd669 0x96b04959 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmul.f32 d10, d13, d15 :: Qd 0x4f115379 0x4f115379 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmul.f32 d10, d13, d15 :: Qd 0x19a5c7d1 0x18aa129c Qm (i32)0x4887f70e Qn (i32)0x4608d008
vmul.f32 d0, d1, d2 :: Qd 0x5d6e81fd 0x5d6e81fd Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmul.f32 d0, d1, d2 :: Qd 0x2230ec71 0x21358117 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmul.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmul.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmul.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmul.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmul.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmul.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmul.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmul.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x3f800000
vmul.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmul.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLA (fp) ----
vmla.f32 d0, d5, d2 :: Qd 0xc4831ce4 0xc4831ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmla.f32 d0, d5, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vmla.f32 d3, d4, d5 :: Qd 0xcddf4321 0xcddf4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vmla.f32 d3, d4, d5 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmla.f32 d10, d11, d2 :: Qd 0xcf050e7f 0xcf050e7f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vmla.f32 d10, d11, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmla.f32 d9, d5, d7 :: Qd 0x4ec3063f 0x4ec3063f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmla.f32 d9, d5, d7 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vmla.f32 d0, d5, d2 :: Qd 0x5029254c 0x5029254c Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vmla.f32 d0, d5, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vmla.f32 d3, d4, d5 :: Qd 0x46fc6200 0x46fc6200 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vmla.f32 d3, d4, d5 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vmla.f32 d10, d11, d2 :: Qd 0x4c4a89cd 0x4c4a89cd Qm (i32)0x473e7300 Qn (i32)0x44882000
+vmla.f32 d10, d11, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vmla.f32 d9, d5, d7 :: Qd 0x4db2c947 0x4db2c947 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vmla.f32 d9, d5, d7 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmla.f32 d0, d11, d12 :: Qd 0x4ef90536 0x4ef90536 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vmla.f32 d0, d11, d12 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vmla.f32 d7, d1, d6 :: Qd 0x3f8ab1f8 0x3f8ab1f8 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vmla.f32 d7, d1, d6 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vmla.f32 d0, d1, d2 :: Qd 0x488fe2e0 0x488fe2e0 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vmla.f32 d3, d4, d5 :: Qd 0x4993b8eb 0x4993b8eb Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vmla.f32 d3, d4, d5 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmla.f32 d10, d11, d2 :: Qd 0x474f9bfc 0x474f9bfc Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vmla.f32 d10, d11, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vmla.f32 d9, d5, d7 :: Qd 0x4a657ac4 0x4a657ac4 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vmla.f32 d9, d5, d7 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vmla.f32 d0, d11, d12 :: Qd 0x489eee3e 0x489eee3e Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmla.f32 d0, d11, d12 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vmla.f32 d7, d1, d6 :: Qd 0xc54ff239 0xc54ff239 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vmla.f32 d7, d1, d6 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmla.f32 d0, d5, d2 :: Qd 0xbfb8fa0e 0xbfb8fa0e Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmla.f32 d0, d5, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vmla.f32 d10, d13, d15 :: Qd 0x488666c6 0x488666c6 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vmla.f32 d10, d13, d15 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmla.f32 d10, d13, d15 :: Qd 0x4f115379 0x4f115379 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmla.f32 d10, d13, d15 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vmla.f32 d0, d1, d2 :: Qd 0x5d6e81fd 0x5d6e81fd Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmla.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmla.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmla.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmla.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLA (fp by scalar) ----
vmla.f32 d0, d1, d4[0] :: Qd 0x45341000 0x45341000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
+vmla.f32 d0, d1, d4[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
vmla.f32 d31, d8, d7[1] :: Qd 0xc6833e00 0xc6833e00 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
+vmla.f32 d31, d8, d7[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
+vmla.f32 d4, d8, d15[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 d4, d8, d15[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 d7, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmla.f32 d7, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
+vmla.f32 d17, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 d17, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmla.f32 d7, d8, d1[0] :: Qd 0x447a3fff 0x447a3fff Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
+vmla.f32 d7, d8, d1[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
vmla.f32 d7, d24, d1[0] :: Qd 0x65a96816 0x65a96816 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmla.f32 d7, d24, d1[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmla.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmla.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmla.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmla.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmla.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmla.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmla.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLS (fp) ----
vmls.f32 d0, d5, d2 :: Qd 0x44835ce4 0x44835ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmls.f32 d0, d5, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vmls.f32 d3, d4, d5 :: Qd 0x4ddf4321 0x4ddf4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vmls.f32 d3, d4, d5 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmls.f32 d10, d11, d2 :: Qd 0x4f050e7f 0x4f050e7f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vmls.f32 d10, d11, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmls.f32 d9, d5, d7 :: Qd 0xcec3063f 0xcec3063f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmls.f32 d9, d5, d7 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vmls.f32 d0, d5, d2 :: Qd 0xd029254c 0xd029254c Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vmls.f32 d0, d5, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vmls.f32 d3, d4, d5 :: Qd 0xc6fc5e00 0xc6fc5e00 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vmls.f32 d3, d4, d5 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vmls.f32 d10, d11, d2 :: Qd 0xcc4a89cd 0xcc4a89cd Qm (i32)0x473e7300 Qn (i32)0x44882000
+vmls.f32 d10, d11, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vmls.f32 d9, d5, d7 :: Qd 0xcdb2c947 0xcdb2c947 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vmls.f32 d9, d5, d7 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmls.f32 d0, d11, d12 :: Qd 0xcef90536 0xcef90536 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vmls.f32 d0, d11, d12 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vmls.f32 d7, d1, d6 :: Qd 0x3f6a9c11 0x3f6a9c11 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vmls.f32 d7, d1, d6 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vmls.f32 d0, d1, d2 :: Qd 0xc88fe2a0 0xc88fe2a0 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vmls.f32 d3, d4, d5 :: Qd 0xc993b8db 0xc993b8db Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vmls.f32 d3, d4, d5 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmls.f32 d10, d11, d2 :: Qd 0xc74f99fc 0xc74f99fc Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vmls.f32 d10, d11, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vmls.f32 d9, d5, d7 :: Qd 0xca657abc 0xca657abc Qm (i32)0x45062000 Qn (i32)0x44db0000
+vmls.f32 d9, d5, d7 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vmls.f32 d0, d11, d12 :: Qd 0xc89eedfe 0xc89eedfe Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmls.f32 d0, d11, d12 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vmls.f32 d7, d1, d6 :: Qd 0x45501239 0x45501239 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vmls.f32 d7, d1, d6 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmls.f32 d0, d5, d2 :: Qd 0x405c7d07 0x405c7d07 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmls.f32 d0, d5, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vmls.f32 d10, d13, d15 :: Qd 0xc8866686 0xc8866686 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vmls.f32 d10, d13, d15 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmls.f32 d10, d13, d15 :: Qd 0xcf115379 0xcf115379 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmls.f32 d10, d13, d15 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vmls.f32 d0, d1, d2 :: Qd 0xdd6e81fd 0xdd6e81fd Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMLS (fp by scalar) ----
vmls.f32 d0, d1, d4[0] :: Qd 0xc533f000 0xc533f000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
+vmls.f32 d0, d1, d4[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x41c00000 Qn (i32)0x42f00000
vmls.f32 d31, d8, d7[1] :: Qd 0x46834200 0x46834200 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
+vmls.f32 d31, d8, d7[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x430c0000 Qn (i32)0xc2f00000
vmls.f32 d4, d8, d15[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmls.f32 d4, d8, d15[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmls.f32 d7, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
vmls.f32 d7, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000000 Qn (i16)0x0000000c
vmls.f32 d17, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
+vmls.f32 d17, d8, d1[1] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x80000001 Qn (i32)0x80000002
vmls.f32 d7, d8, d1[0] :: Qd 0xc479bfff 0xc479bfff Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
+vmls.f32 d7, d8, d1[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x64078678 Qn (i32)0x1fec1e4a
vmls.f32 d7, d24, d1[0] :: Qd 0xe5a96816 0xe5a96816 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmls.f32 d7, d24, d1[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7
+vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmls.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmls.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmls.f32 d0, d1, d2[0] :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmls.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmls.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmls.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmls.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VABD (fp) ----
vabd.f32 d0, d5, d2 :: Qd 0x428937a8 0x428937a8 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vabd.f32 d0, d5, d2 :: Qd 0x42364659 0x42364659 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vabd.f32 d3, d4, d5 :: Qd 0x48aa824f 0x48aa824f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vabd.f32 d3, d4, d5 :: Qd 0x44a84000 0x44a84000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vabd.f32 d10, d11, d2 :: Qd 0x47b8a6bd 0x47b8a6bd Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vabd.f32 d10, d11, d2 :: Qd 0x4732da7a 0x4732da7a Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vabd.f32 d9, d5, d7 :: Qd 0x4799e961 0x4799e961 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vabd.f32 d9, d5, d7 :: Qd 0x46855200 0x46855200 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vabd.f32 d0, d5, d2 :: Qd 0x484623e2 0x484623e2 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vabd.f32 d0, d5, d2 :: Qd 0x4872bcb1 0x4872bcb1 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vabd.f32 d3, d4, d5 :: Qd 0x44a54000 0x44a54000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vabd.f32 d3, d4, d5 :: Qd 0x44a84000 0x44a84000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vabd.f32 d10, d11, d2 :: Qd 0x473a3200 0x473a3200 Qm (i32)0x473e7300 Qn (i32)0x44882000
+vabd.f32 d10, d11, d2 :: Qd 0x44882000 0x44882000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vabd.f32 d9, d5, d7 :: Qd 0x49d5d958 0x49d5d958 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vabd.f32 d9, d5, d7 :: Qd 0x49d5e008 0x49d5e008 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vabd.f32 d0, d11, d12 :: Qd 0x48aafc92 0x48aafc92 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vabd.f32 d0, d11, d12 :: Qd 0x45b75812 0x45b75812 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vabd.f32 d7, d1, d6 :: Qd 0x4207fdf5 0x4207fdf5 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vabd.f32 d7, d1, d6 :: Qd 0x3b210e02 0x3b210e02 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vabd.f32 d0, d1, d2 :: Qd 0x45257000 0x45257000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vabd.f32 d0, d1, d2 :: Qd 0x42d60000 0x42d60000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vabd.f32 d3, d4, d5 :: Qd 0x43ff4ccc 0x43ff4ccc Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vabd.f32 d3, d4, d5 :: Qd 0x44ad1333 0x44ad1333 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vabd.f32 d10, d11, d2 :: Qd 0x43bd4b23 0x43bd4b23 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vabd.f32 d10, d11, d2 :: Qd 0x42da0000 0x42da0000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vabd.f32 d9, d5, d7 :: Qd 0x43c50000 0x43c50000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vabd.f32 d9, d5, d7 :: Qd 0x44db0000 0x44db0000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vabd.f32 d0, d11, d12 :: Qd 0x45b311c3 0x45b311c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vabd.f32 d0, d11, d12 :: Qd 0x45b4d3c3 0x45b4d3c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vabd.f32 d7, d1, d6 :: Qd 0x43e7c592 0x43e7c592 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vabd.f32 d7, d1, d6 :: Qd 0x40e96d19 0x40e96d19 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vabd.f32 d0, d5, d2 :: Qd 0x44053f76 0x44053f76 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vabd.f32 d0, d5, d2 :: Qd 0x3b965394 0x3b965394 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vabd.f32 d10, d13, d15 :: Qd 0x42a3ffa4 0x42a3ffa4 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vabd.f32 d10, d13, d15 :: Qd 0x440dcfae 0x440dcfae Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vabd.f32 d10, d13, d15 :: Qd 0x4883b08e 0x4883b08e Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vabd.f32 d10, d13, d15 :: Qd 0x4608d008 0x4608d008 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vabd.f32 d0, d1, d2 :: Qd 0x4da5da84 0x4da5da84 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vabd.f32 d0, d1, d2 :: Qd 0x4e920233 0x4e920233 Qm (i32)0x4e511724 Qn (i32)0x4e920233
---- VPADD (fp) ----
vpadd.f32 d0, d5, d2 :: Qd 0xc2b64659 0x423851ec Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vpadd.f32 d0, d5, d2 :: Qd 0xc2b64659 0x1342e1a3 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vpadd.f32 d3, d4, d5 :: Qd 0x45284000 0xc929da0f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vpadd.f32 d3, d4, d5 :: Qd 0x45284000 0x1342e1a3 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vpadd.f32 d10, d11, d2 :: Qd 0xc7b2da7a 0x47be7300 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vpadd.f32 d10, d11, d2 :: Qd 0xc7b2da7a 0x1342e1a3 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vpadd.f32 d9, d5, d7 :: Qd 0x47055200 0x483b3de1 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vpadd.f32 d9, d5, d7 :: Qd 0x47055200 0x1342e1a3 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vpadd.f32 d0, d5, d2 :: Qd 0xc8f2bcb1 0xc7b2633d Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vpadd.f32 d0, d5, d2 :: Qd 0xc8f2bcb1 0x1342e1a3 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vpadd.f32 d3, d4, d5 :: Qd 0x45284000 0x42400000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vpadd.f32 d3, d4, d5 :: Qd 0x45284000 0x1342e1a3 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vpadd.f32 d10, d11, d2 :: Qd 0x45082000 0x47be7300 Qm (i32)0x473e7300 Qn (i32)0x44882000
+vpadd.f32 d10, d11, d2 :: Qd 0x45082000 0x1342e1a3 Qm (i32)0x473e7300 Qn (i32)0x44882000
vpadd.f32 d9, d5, d7 :: Qd 0x4a55e008 0x43d60000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vpadd.f32 d9, d5, d7 :: Qd 0x4a55e008 0x1342e1a3 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vpadd.f32 d0, d11, d12 :: Qd 0x46375812 0x492dd9f2 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vpadd.f32 d0, d11, d12 :: Qd 0x46375812 0x1342e1a3 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vpadd.f32 d7, d1, d6 :: Qd 0x3ba10e02 0x42880079 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vpadd.f32 d7, d1, d6 :: Qd 0x3ba10e02 0x1342e1a3 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vpadd.f32 d0, d1, d2 :: Qd 0x43560000 0x45ac2000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vpadd.f32 d0, d1, d2 :: Qd 0x43560000 0x1342e1a3 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vpadd.f32 d3, d4, d5 :: Qd 0x452d1333 0x44da8000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vpadd.f32 d3, d4, d5 :: Qd 0x452d1333 0x1342e1a3 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vpadd.f32 d10, d11, d2 :: Qd 0x435a0000 0x4473cb23 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vpadd.f32 d10, d11, d2 :: Qd 0x435a0000 0x1342e1a3 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vpadd.f32 d9, d5, d7 :: Qd 0x455b0000 0x45862000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vpadd.f32 d9, d5, d7 :: Qd 0x455b0000 0x1342e1a3 Qm (i32)0x45062000 Qn (i32)0x44db0000
vpadd.f32 d0, d11, d12 :: Qd 0xc634d3c3 0xc2e10000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vpadd.f32 d0, d11, d12 :: Qd 0xc634d3c3 0x1342e1a3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vpadd.f32 d7, d1, d6 :: Qd 0xc1696d19 0x44641fde Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vpadd.f32 d7, d1, d6 :: Qd 0xc1696d19 0x1342e1a3 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vpadd.f32 d0, d5, d2 :: Qd 0xbc165394 0x44853f2b Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vpadd.f32 d0, d5, d2 :: Qd 0xbc165394 0x1342e1a3 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vpadd.f32 d10, d13, d15 :: Qd 0xc48dcfae 0xc4729f73 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vpadd.f32 d10, d13, d15 :: Qd 0xc48dcfae 0x1342e1a3 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vpadd.f32 d10, d13, d15 :: Qd 0x4688d008 0x4907f70e Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vpadd.f32 d10, d13, d15 :: Qd 0x4688d008 0x1342e1a3 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vpadd.f32 d0, d1, d2 :: Qd 0x4f120233 0x4ed11724 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vpadd.f32 d0, d1, d2 :: Qd 0x4f120233 0x1342e1a3 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x1342e1a3 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0x1342e1a3 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0x1342e1a3 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x1342e1a3 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0x1342e1a3 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x1342e1a3 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0x1342e1a3 Qm (i32)0x00000000 Qn (i32)0x3f800000
vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0x1342e1a3 Qm (i32)0x00000000 Qn (i32)0x00000000
vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x1342e1a3 Qm (i32)0x00000000 Qn (i32)0x7f800000
vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0x1342e1a3 Qm (i32)0x00000000 Qn (i32)0xff800000
vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
+vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x1342e1a3 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0x1342e1a3 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0x1342e1a3 Qm (i32)0x7f800000 Qn (i32)0x00000000
vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x1342e1a3 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0x1342e1a3 Qm (i32)0x7f800000 Qn (i32)0xff800000
vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vpadd.f32 d0, d1, d2 :: Qd 0x7fc00000 0x1342e1a3 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x40000000 0x1342e1a3 Qm (i32)0xff800000 Qn (i32)0x3f800000
vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vpadd.f32 d0, d1, d2 :: Qd 0x00000000 0x1342e1a3 Qm (i32)0xff800000 Qn (i32)0x00000000
vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vpadd.f32 d0, d1, d2 :: Qd 0x7f800000 0x1342e1a3 Qm (i32)0xff800000 Qn (i32)0x7f800000
vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vpadd.f32 d0, d1, d2 :: Qd 0xff800000 0x1342e1a3 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VCVT (integer <-> fp) ----
vcvt.u32.f32 d0, d1 :: Qd 0x00000003 0x00000003 Qm (i32)0x404ccccd
+vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.u32.f32 d10, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
+vcvt.u32.f32 d10, d11 :: Qd 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.u32.f32 d15, d4 :: Qd 0xb2d05e00 0xb2d05e00 Qm (i32)0x4f32d05e
+vcvt.u32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0x4f32d05e
vcvt.u32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf000000
+vcvt.u32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf000000
+vcvt.u32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.u32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.u32.f32 d12, d8 :: Qd 0x00000007 0x00000007 Qm (i32)0x40fff800
+vcvt.u32.f32 d12, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0x40fff800
+vcvt.u32.f32 d12, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.u32.f32 d12, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.s32.f32 d0, d1 :: Qd 0x00000003 0x00000003 Qm (i32)0x404ccccd
+vcvt.s32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.s32.f32 d20, d21 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x64cb49b4
+vcvt.s32.f32 d20, d21 :: Qd 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.s32.f32 d15, d4 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x4f32d05e
+vcvt.s32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0x4f32d05e
+vcvt.s32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.s32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.s32.f32 d15, d4 :: Qd 0xfffffff9 0xfffffff9 Qm (i32)0xc0e33333
+vcvt.s32.f32 d15, d4 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.s32.f32 d12, d8 :: Qd 0x00000007 0x00000007 Qm (i32)0x40fff800
+vcvt.s32.f32 d12, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0x40fff800
vcvt.s32.f32 d12, d8 :: Qd 0xfffffff9 0xfffffff9 Qm (i32)0xc0fff800
+vcvt.s32.f32 d12, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.f32.u32 d0, d1 :: Qd 0x40e00000 0x40e00000 Qm (i32)0x00000007
+vcvt.f32.u32 d0, d1 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x00000007
vcvt.f32.u32 d10, d11 :: Qd 0x4f000000 0x4f000000 Qm (i32)0x80000000
+vcvt.f32.u32 d10, d11 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x80000000
vcvt.f32.u32 d0, d1 :: Qd 0x4f000000 0x4f000000 Qm (i32)0x80000001
+vcvt.f32.u32 d0, d1 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x80000001
vcvt.f32.u32 d24, d26 :: Qd 0x4f000000 0x4f000000 Qm (i32)0x7fffffff
+vcvt.f32.u32 d24, d26 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x7fffffff
vcvt.f32.u32 d0, d14 :: Qd 0x4e4282f4 0x4e4282f4 Qm (i32)0x30a0bcef
+vcvt.f32.u32 d0, d14 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x30a0bcef
vcvt.f32.s32 d0, d1 :: Qd 0x40e00000 0x40e00000 Qm (i32)0x00000007
+vcvt.f32.s32 d0, d1 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x00000007
vcvt.f32.s32 d30, d31 :: Qd 0xcf000000 0xcf000000 Qm (i32)0x80000000
+vcvt.f32.s32 d30, d31 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x80000000
vcvt.f32.s32 d0, d1 :: Qd 0xcf000000 0xcf000000 Qm (i32)0x80000001
+vcvt.f32.s32 d0, d1 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x80000001
vcvt.f32.s32 d0, d1 :: Qd 0x4f000000 0x4f000000 Qm (i32)0x7fffffff
+vcvt.f32.s32 d0, d1 :: Qd 0x4da8e8c9 0x4da0e0f9 Qm (i32)0x7fffffff
vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.u32.f32 d0, d1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000
+vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
+vcvt.u32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
+vcvt.s32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.s32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcvt.s32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcvt.s32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.s32.f32 d0, d1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x7f800000
+vcvt.s32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vcvt.s32.f32 d0, d1 :: Qd 0x80000000 0x80000000 Qm (i32)0xff800000
+vcvt.s32.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
---- VCVT (fixed <-> fp) ----
vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000019 0x00000019 Qm (i32)0x404ccccd
+vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.u32.f32 d10, d11, #1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
+vcvt.u32.f32 d10, d11, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.u32.f32 d15, d4, #32 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
+vcvt.u32.f32 d15, d4, #32 :: Qd 0x00000000 0x00000000 Qm (i32)0x4f32d05e
+vcvt.u32.f32 d15, d4, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.u32.f32 d15, d4, #7 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.u32.f32 d15, d4, #4 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0e33333
+vcvt.u32.f32 d15, d4, #4 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.u32.f32 d12, d8, #3 :: Qd 0x0000003f 0x0000003f Qm (i32)0x40fff800
+vcvt.u32.f32 d12, d8, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x40fff800
+vcvt.u32.f32 d12, d8, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.u32.f32 d12, d8, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.s32.f32 d0, d1, #5 :: Qd 0x00000066 0x00000066 Qm (i32)0x404ccccd
+vcvt.s32.f32 d0, d1, #5 :: Qd 0x00000000 0x00000000 Qm (i32)0x404ccccd
vcvt.s32.f32 d20, d21, #1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x64cb49b4
+vcvt.s32.f32 d20, d21, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0x64cb49b4
vcvt.s32.f32 d15, d4, #8 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x4f32d05e
+vcvt.s32.f32 d15, d4, #8 :: Qd 0x00000000 0x00000000 Qm (i32)0x4f32d05e
vcvt.s32.f32 d15, d4, #2 :: Qd 0xfffffffe 0xfffffffe Qm (i32)0xbf000000
+vcvt.s32.f32 d15, d4, #2 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf000000
vcvt.s32.f32 d15, d4, #1 :: Qd 0xfffffff2 0xfffffff2 Qm (i32)0xc0e33333
+vcvt.s32.f32 d15, d4, #1 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0e33333
vcvt.s32.f32 d12, d8, #2 :: Qd 0x0000001f 0x0000001f Qm (i32)0x40fff800
+vcvt.s32.f32 d12, d8, #2 :: Qd 0x00000000 0x00000000 Qm (i32)0x40fff800
vcvt.s32.f32 d12, d8, #2 :: Qd 0xffffffe1 0xffffffe1 Qm (i32)0xc0fff800
+vcvt.s32.f32 d12, d8, #2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc0fff800
vcvt.f32.u32 d0, d1, #5 :: Qd 0x3e600000 0x3e600000 Qm (i32)0x00000007
+vcvt.f32.u32 d0, d1, #5 :: Qd 0x4b28e8c9 0x4b20e0f9 Qm (i32)0x00000007
vcvt.f32.u32 d10, d11, #9 :: Qd 0x4a800000 0x4a800000 Qm (i32)0x80000000
+vcvt.f32.u32 d10, d11, #9 :: Qd 0x4928e8c9 0x4920e0f9 Qm (i32)0x80000000
vcvt.f32.u32 d0, d1, #4 :: Qd 0x4d000000 0x4d000000 Qm (i32)0x80000001
+vcvt.f32.u32 d0, d1, #4 :: Qd 0x4ba8e8c9 0x4ba0e0f9 Qm (i32)0x80000001
vcvt.f32.u32 d24, d26, #6 :: Qd 0x4c000000 0x4c000000 Qm (i32)0x7fffffff
+vcvt.f32.u32 d24, d26, #6 :: Qd 0x4aa8e8c9 0x4aa0e0f9 Qm (i32)0x7fffffff
vcvt.f32.u32 d0, d14, #5 :: Qd 0x4bc282f4 0x4bc282f4 Qm (i32)0x30a0bcef
+vcvt.f32.u32 d0, d14, #5 :: Qd 0x4b28e8c9 0x4b20e0f9 Qm (i32)0x30a0bcef
vcvt.f32.s32 d0, d1, #12 :: Qd 0x3ae00000 0x3ae00000 Qm (i32)0x00000007
+vcvt.f32.s32 d0, d1, #12 :: Qd 0x47a8e8c9 0x47a0e0f9 Qm (i32)0x00000007
vcvt.f32.s32 d30, d31, #8 :: Qd 0xcb000000 0xcb000000 Qm (i32)0x80000000
+vcvt.f32.s32 d30, d31, #8 :: Qd 0x49a8e8c9 0x49a0e0f9 Qm (i32)0x80000000
vcvt.f32.s32 d0, d1, #1 :: Qd 0xce800000 0xce800000 Qm (i32)0x80000001
+vcvt.f32.s32 d0, d1, #1 :: Qd 0x4d28e8c9 0x4d20e0f9 Qm (i32)0x80000001
vcvt.f32.s32 d0, d1, #6 :: Qd 0x4c000000 0x4c000000 Qm (i32)0x7fffffff
+vcvt.f32.s32 d0, d1, #6 :: Qd 0x4aa8e8c9 0x4aa0e0f9 Qm (i32)0x7fffffff
vcvt.f32.s32 d0, d14, #2 :: Qd 0x4d4282f4 0x4d4282f4 Qm (i32)0x30a0bcef
+vcvt.f32.s32 d0, d14, #2 :: Qd 0x4ca8e8c9 0x4ca0e0f9 Qm (i32)0x30a0bcef
vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.u32.f32 d0, d1, #3 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000
+vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
+vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
vcvt.u32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
vcvt.s32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.s32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcvt.s32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.s32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vcvt.s32.f32 d0, d1, #3 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x7f800000
+vcvt.s32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vcvt.s32.f32 d0, d1, #3 :: Qd 0x80000000 0x80000000 Qm (i32)0xff800000
+vcvt.s32.f32 d0, d1, #3 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
---- VMAX (fp) ----
vmax.f32 d0, d5, d2 :: Qd 0x41b851ec 0x41b851ec Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmax.f32 d0, d5, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmax.f32 d3, d4, d5 :: Qd 0x44a84000 0x44a84000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmax.f32 d3, d4, d5 :: Qd 0x44a84000 0x44a84000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vmax.f32 d10, d11, d2 :: Qd 0x473e7300 0x473e7300 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vmax.f32 d10, d11, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmax.f32 d9, d5, d7 :: Qd 0x47bb3de1 0x47bb3de1 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmax.f32 d9, d5, d7 :: Qd 0x46855200 0x46855200 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vmax.f32 d0, d5, d2 :: Qd 0xc732633d 0xc732633d Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vmax.f32 d0, d5, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vmax.f32 d3, d4, d5 :: Qd 0x44a84003 0x44a84003 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vmax.f32 d3, d4, d5 :: Qd 0x44a84003 0x44a84003 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vmax.f32 d10, d11, d2 :: Qd 0x473e73b3 0x473e73b3 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vmax.f32 d10, d11, d2 :: Qd 0x44882666 0x44882666 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vmax.f32 d9, d5, d7 :: Qd 0x49d5e008 0x49d5e008 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmax.f32 d9, d5, d7 :: Qd 0x49d5e008 0x49d5e008 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmax.f32 d0, d11, d12 :: Qd 0x48add9f2 0x48add9f2 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vmax.f32 d0, d11, d12 :: Qd 0x45b75812 0x45b75812 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vmax.f32 d7, d1, d6 :: Qd 0x42080079 0x42080079 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vmax.f32 d7, d1, d6 :: Qd 0x3b210e02 0x3b210e02 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vmax.f32 d0, d1, d2 :: Qd 0x452c2000 0x452c2000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmax.f32 d0, d1, d2 :: Qd 0x42d60000 0x42d60000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmax.f32 d3, d4, d5 :: Qd 0x44ad1333 0x44ad1333 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmax.f32 d3, d4, d5 :: Qd 0x44ad1333 0x44ad1333 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmax.f32 d10, d11, d2 :: Qd 0x43f3cb23 0x43f3cb23 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vmax.f32 d10, d11, d2 :: Qd 0x42da0000 0x42da0000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vmax.f32 d9, d5, d7 :: Qd 0x45062000 0x45062000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vmax.f32 d9, d5, d7 :: Qd 0x44db0000 0x44db0000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vmax.f32 d0, d11, d12 :: Qd 0xc2610000 0xc2610000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmax.f32 d0, d11, d12 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vmax.f32 d7, d1, d6 :: Qd 0x43e41fde 0x43e41fde Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vmax.f32 d7, d1, d6 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmax.f32 d0, d5, d2 :: Qd 0x44053f2b 0x44053f2b Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmax.f32 d0, d5, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x44053f2b Qn (i32)0xbb965394
vmax.f32 d10, d13, d15 :: Qd 0xc3f29f73 0xc3f29f73 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vmax.f32 d10, d13, d15 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmax.f32 d10, d13, d15 :: Qd 0x4887f70e 0x4887f70e Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmax.f32 d10, d13, d15 :: Qd 0x4608d008 0x4608d008 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmax.f32 d0, d1, d2 :: Qd 0x4e920233 0x4e920233 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vmax.f32 d0, d1, d2 :: Qd 0x4e920233 0x4e920233 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vmax.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x00000000
vmax.f32 d0, d1, d2 :: Qd 0x3a800000 0x3a800000 Qm (i32)0x3a800000 Qn (i32)0xba800000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x3a800000 Qn (i32)0xba800000
+vmax.f32 d0, d1, d2 :: Qd 0x3a800000 0x3a800000 Qm (i32)0xba800000 Qn (i32)0x3a800000
vmax.f32 d0, d1, d2 :: Qd 0x3a800000 0x3a800000 Qm (i32)0xba800000 Qn (i32)0x3a800000
vmax.f32 d0, d1, d2 :: Qd 0x45126004 0x45126004 Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vmax.f32 d0, d1, d2 :: Qd 0x45125ffc 0x45125ffc Qm (i32)0x45126004 Qn (i32)0x45125ffc
vmax.f32 d0, d1, d2 :: Qd 0xc5125ffc 0xc5125ffc Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vmax.f32 d0, d1, d2 :: Qd 0x47bff200 0x47bff200 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vmax.f32 d0, d1, d2 :: Qd 0x47bff200 0x47bff200 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0xff800000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vmax.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vmax.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0xff800000
+vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0xff800000
vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vmax.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x00000000
+vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vmax.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vmax.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0xff800000
---- VMIN (fp) ----
vmin.f32 d0, d5, d2 :: Qd 0xc2364659 0xc2364659 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vmin.f32 d0, d5, d2 :: Qd 0xc2364659 0xc2364659 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vmin.f32 d3, d4, d5 :: Qd 0xc8a9da0f 0xc8a9da0f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vmin.f32 d3, d4, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vmin.f32 d10, d11, d2 :: Qd 0xc732da7a 0xc732da7a Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmin.f32 d10, d11, d2 :: Qd 0xc732da7a 0xc732da7a Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vmin.f32 d9, d5, d7 :: Qd 0x46855200 0x46855200 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmin.f32 d9, d5, d7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vmin.f32 d0, d5, d2 :: Qd 0xc872bcb1 0xc872bcb1 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vmin.f32 d0, d5, d2 :: Qd 0xc872bcb1 0xc872bcb1 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vmin.f32 d3, d4, d5 :: Qd 0x41c70126 0x41c70126 Qm (i32)0x41c70126 Qn (i32)0x44a84003
+vmin.f32 d3, d4, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x41c70126 Qn (i32)0x44a84003
vmin.f32 d10, d11, d2 :: Qd 0x44882666 0x44882666 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vmin.f32 d10, d11, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x473e73b3 Qn (i32)0x44882666
vmin.f32 d9, d5, d7 :: Qd 0x43560000 0x43560000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vmin.f32 d9, d5, d7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x43560000 Qn (i32)0x49d5e008
vmin.f32 d0, d11, d12 :: Qd 0x45b75812 0x45b75812 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vmin.f32 d0, d11, d12 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vmin.f32 d7, d1, d6 :: Qd 0x3b210e02 0x3b210e02 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vmin.f32 d7, d1, d6 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x42080079 Qn (i32)0x3b210e02
vmin.f32 d0, d1, d2 :: Qd 0x42d60000 0x42d60000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x452c2000 Qn (i32)0x42d60000
vmin.f32 d3, d4, d5 :: Qd 0x445a8000 0x445a8000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vmin.f32 d3, d4, d5 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vmin.f32 d10, d11, d2 :: Qd 0x42da0000 0x42da0000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vmin.f32 d10, d11, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vmin.f32 d9, d5, d7 :: Qd 0x44db0000 0x44db0000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vmin.f32 d9, d5, d7 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x45062000 Qn (i32)0x44db0000
vmin.f32 d0, d11, d12 :: Qd 0xc5b4d3c3 0xc5b4d3c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmin.f32 d0, d11, d12 :: Qd 0xc5b4d3c3 0xc5b4d3c3 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vmin.f32 d7, d1, d6 :: Qd 0xc0e96d19 0xc0e96d19 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmin.f32 d7, d1, d6 :: Qd 0xc0e96d19 0xc0e96d19 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vmin.f32 d0, d5, d2 :: Qd 0xbb965394 0xbb965394 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmin.f32 d0, d5, d2 :: Qd 0xbb965394 0xbb965394 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vmin.f32 d10, d13, d15 :: Qd 0xc40dcfae 0xc40dcfae Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmin.f32 d10, d13, d15 :: Qd 0xc40dcfae 0xc40dcfae Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vmin.f32 d10, d13, d15 :: Qd 0x4608d008 0x4608d008 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vmin.f32 d10, d13, d15 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x4887f70e Qn (i32)0x4608d008
vmin.f32 d0, d1, d2 :: Qd 0x4e511724 0x4e511724 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x4e511724 Qn (i32)0x4e920233
vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vmin.f32 d0, d1, d2 :: Qd 0xba800000 0xba800000 Qm (i32)0x3a800000 Qn (i32)0xba800000
vmin.f32 d0, d1, d2 :: Qd 0xba800000 0xba800000 Qm (i32)0x3a800000 Qn (i32)0xba800000
vmin.f32 d0, d1, d2 :: Qd 0xba800000 0xba800000 Qm (i32)0xba800000 Qn (i32)0x3a800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xba800000 Qn (i32)0x3a800000
vmin.f32 d0, d1, d2 :: Qd 0x45125ffc 0x45125ffc Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vmin.f32 d0, d1, d2 :: Qd 0xc5126004 0xc5126004 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vmin.f32 d0, d1, d2 :: Qd 0xc5126004 0xc5126004 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vmin.f32 d0, d1, d2 :: Qd 0x47ae5e00 0x47ae5e00 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x3f800000
+vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x7f800000
vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x3f800000
vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000
vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmin.f32 d0, d1, d2 :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x7f800000
+vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
vmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VPMAX (fp) ----
vpmax.f32 d0, d5, d2 :: Qd 0xc2364659 0x41b851ec Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vpmax.f32 d0, d5, d2 :: Qd 0xc2364659 0x131b1a1b Qm (i32)0x41b851ec Qn (i32)0xc2364659
vpmax.f32 d3, d4, d5 :: Qd 0x44a84000 0xc8a9da0f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vpmax.f32 d3, d4, d5 :: Qd 0x44a84000 0x131b1a1b Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vpmax.f32 d10, d11, d2 :: Qd 0xc732da7a 0x473e7300 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vpmax.f32 d10, d11, d2 :: Qd 0xc732da7a 0x131b1a1b Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vpmax.f32 d9, d5, d7 :: Qd 0x46855200 0x47bb3de1 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vpmax.f32 d9, d5, d7 :: Qd 0x46855200 0x131b1a1b Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vpmax.f32 d0, d5, d2 :: Qd 0xc872bcb1 0xc732633d Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vpmax.f32 d0, d5, d2 :: Qd 0xc872bcb1 0x131b1a1b Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vpmax.f32 d3, d4, d5 :: Qd 0x44a84003 0x41c70126 Qm (i32)0x41c70126 Qn (i32)0x44a84003
+vpmax.f32 d3, d4, d5 :: Qd 0x44a84003 0x131b1a1b Qm (i32)0x41c70126 Qn (i32)0x44a84003
vpmax.f32 d10, d11, d2 :: Qd 0x44882666 0x473e73b3 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vpmax.f32 d10, d11, d2 :: Qd 0x44882666 0x131b1a1b Qm (i32)0x473e73b3 Qn (i32)0x44882666
vpmax.f32 d9, d5, d7 :: Qd 0x49d5e008 0x43560000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vpmax.f32 d9, d5, d7 :: Qd 0x49d5e008 0x131b1a1b Qm (i32)0x43560000 Qn (i32)0x49d5e008
vpmax.f32 d0, d11, d12 :: Qd 0x45b75812 0x48add9f2 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vpmax.f32 d0, d11, d12 :: Qd 0x45b75812 0x131b1a1b Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vpmax.f32 d7, d1, d6 :: Qd 0x3b210e02 0x42080079 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vpmax.f32 d7, d1, d6 :: Qd 0x3b210e02 0x131b1a1b Qm (i32)0x42080079 Qn (i32)0x3b210e02
vpmax.f32 d0, d1, d2 :: Qd 0x42d60000 0x452c2000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vpmax.f32 d0, d1, d2 :: Qd 0x42d60000 0x131b1a1b Qm (i32)0x452c2000 Qn (i32)0x42d60000
vpmax.f32 d3, d4, d5 :: Qd 0x44ad1333 0x445a8000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vpmax.f32 d3, d4, d5 :: Qd 0x44ad1333 0x131b1a1b Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vpmax.f32 d10, d11, d2 :: Qd 0x42da0000 0x43f3cb23 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vpmax.f32 d10, d11, d2 :: Qd 0x42da0000 0x131b1a1b Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vpmax.f32 d9, d5, d7 :: Qd 0x44db0000 0x45062000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vpmax.f32 d9, d5, d7 :: Qd 0x44db0000 0x131b1a1b Qm (i32)0x45062000 Qn (i32)0x44db0000
vpmax.f32 d0, d11, d12 :: Qd 0xc5b4d3c3 0xc2610000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vpmax.f32 d0, d11, d12 :: Qd 0xc5b4d3c3 0x131b1a1b Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vpmax.f32 d7, d1, d6 :: Qd 0xc0e96d19 0x43e41fde Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vpmax.f32 d7, d1, d6 :: Qd 0xc0e96d19 0x131b1a1b Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vpmax.f32 d0, d5, d2 :: Qd 0xbb965394 0x44053f2b Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vpmax.f32 d0, d5, d2 :: Qd 0xbb965394 0x131b1a1b Qm (i32)0x44053f2b Qn (i32)0xbb965394
vpmax.f32 d10, d13, d15 :: Qd 0xc40dcfae 0xc3f29f73 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vpmax.f32 d10, d13, d15 :: Qd 0xc40dcfae 0x131b1a1b Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vpmax.f32 d10, d13, d15 :: Qd 0x4608d008 0x4887f70e Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vpmax.f32 d10, d13, d15 :: Qd 0x4608d008 0x131b1a1b Qm (i32)0x4887f70e Qn (i32)0x4608d008
vpmax.f32 d0, d1, d2 :: Qd 0x4e920233 0x4e511724 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vpmax.f32 d0, d1, d2 :: Qd 0x4e920233 0x131b1a1b Qm (i32)0x4e511724 Qn (i32)0x4e920233
vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x131b1a1b Qm (i32)0x00000000 Qn (i32)0x00000000
vpmax.f32 d0, d1, d2 :: Qd 0xba800000 0x3a800000 Qm (i32)0x3a800000 Qn (i32)0xba800000
+vpmax.f32 d0, d1, d2 :: Qd 0xba800000 0x131b1a1b Qm (i32)0x3a800000 Qn (i32)0xba800000
vpmax.f32 d0, d1, d2 :: Qd 0x3a800000 0xba800000 Qm (i32)0xba800000 Qn (i32)0x3a800000
+vpmax.f32 d0, d1, d2 :: Qd 0x3a800000 0x131b1a1b Qm (i32)0xba800000 Qn (i32)0x3a800000
vpmax.f32 d0, d1, d2 :: Qd 0x45125ffc 0x45126004 Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vpmax.f32 d0, d1, d2 :: Qd 0x45125ffc 0x131b1a1b Qm (i32)0x45126004 Qn (i32)0x45125ffc
vpmax.f32 d0, d1, d2 :: Qd 0xc5126004 0xc5125ffc Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vpmax.f32 d0, d1, d2 :: Qd 0xc5126004 0x131b1a1b Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vpmax.f32 d0, d1, d2 :: Qd 0x47bff200 0x47ae5e00 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vpmax.f32 d0, d1, d2 :: Qd 0x47bff200 0x131b1a1b Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x131b1a1b Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x131b1a1b Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x131b1a1b Qm (i32)0x7fc00000 Qn (i32)0x00000000
vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x131b1a1b Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0x131b1a1b Qm (i32)0x7fc00000 Qn (i32)0xff800000
vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x131b1a1b Qm (i32)0x00000000 Qn (i32)0x7fc00000
vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x131b1a1b Qm (i32)0x00000000 Qn (i32)0x3f800000
vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x131b1a1b Qm (i32)0x00000000 Qn (i32)0x00000000
vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x131b1a1b Qm (i32)0x00000000 Qn (i32)0x7f800000
vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0x131b1a1b Qm (i32)0x00000000 Qn (i32)0xff800000
vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
+vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x131b1a1b Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x131b1a1b Qm (i32)0x7f800000 Qn (i32)0x3f800000
vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x131b1a1b Qm (i32)0x7f800000 Qn (i32)0x00000000
vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x131b1a1b Qm (i32)0x7f800000 Qn (i32)0x7f800000
vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0x131b1a1b Qm (i32)0x7f800000 Qn (i32)0xff800000
vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vpmax.f32 d0, d1, d2 :: Qd 0x7fc00000 0x131b1a1b Qm (i32)0xff800000 Qn (i32)0x7fc00000
vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x3f800000 0x131b1a1b Qm (i32)0xff800000 Qn (i32)0x3f800000
vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vpmax.f32 d0, d1, d2 :: Qd 0x00000000 0x131b1a1b Qm (i32)0xff800000 Qn (i32)0x00000000
vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vpmax.f32 d0, d1, d2 :: Qd 0x7f800000 0x131b1a1b Qm (i32)0xff800000 Qn (i32)0x7f800000
vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vpmax.f32 d0, d1, d2 :: Qd 0xff800000 0x131b1a1b Qm (i32)0xff800000 Qn (i32)0xff800000
---- VPMIN (fp) ----
vpmin.f32 d0, d5, d2 :: Qd 0xc2364659 0x41b851ec Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vpmin.f32 d0, d5, d2 :: Qd 0xc2364659 0x121f1e1f Qm (i32)0x41b851ec Qn (i32)0xc2364659
vpmin.f32 d3, d4, d5 :: Qd 0x44a84000 0xc8a9da0f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vpmin.f32 d3, d4, d5 :: Qd 0x44a84000 0x121f1e1f Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vpmin.f32 d10, d11, d2 :: Qd 0xc732da7a 0x473e7300 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vpmin.f32 d10, d11, d2 :: Qd 0xc732da7a 0x121f1e1f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vpmin.f32 d9, d5, d7 :: Qd 0x46855200 0x47bb3de1 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vpmin.f32 d9, d5, d7 :: Qd 0x46855200 0x121f1e1f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vpmin.f32 d0, d5, d2 :: Qd 0xc872bcb1 0xc732633d Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vpmin.f32 d0, d5, d2 :: Qd 0xc872bcb1 0x121f1e1f Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vpmin.f32 d3, d4, d5 :: Qd 0x44a84003 0x41c70126 Qm (i32)0x41c70126 Qn (i32)0x44a84003
+vpmin.f32 d3, d4, d5 :: Qd 0x44a84003 0x121f1e1f Qm (i32)0x41c70126 Qn (i32)0x44a84003
vpmin.f32 d10, d11, d2 :: Qd 0x44882666 0x473e73b3 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vpmin.f32 d10, d11, d2 :: Qd 0x44882666 0x121f1e1f Qm (i32)0x473e73b3 Qn (i32)0x44882666
vpmin.f32 d9, d5, d7 :: Qd 0x49d5e008 0x43560000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vpmin.f32 d9, d5, d7 :: Qd 0x49d5e008 0x121f1e1f Qm (i32)0x43560000 Qn (i32)0x49d5e008
vpmin.f32 d0, d11, d12 :: Qd 0x45b75812 0x48add9f2 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vpmin.f32 d0, d11, d12 :: Qd 0x45b75812 0x121f1e1f Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vpmin.f32 d7, d1, d6 :: Qd 0x3b210e02 0x42080079 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vpmin.f32 d7, d1, d6 :: Qd 0x3b210e02 0x121f1e1f Qm (i32)0x42080079 Qn (i32)0x3b210e02
vpmin.f32 d0, d1, d2 :: Qd 0x42d60000 0x452c2000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vpmin.f32 d0, d1, d2 :: Qd 0x42d60000 0x121f1e1f Qm (i32)0x452c2000 Qn (i32)0x42d60000
vpmin.f32 d3, d4, d5 :: Qd 0x44ad1333 0x445a8000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vpmin.f32 d3, d4, d5 :: Qd 0x44ad1333 0x121f1e1f Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vpmin.f32 d10, d11, d2 :: Qd 0x42da0000 0x43f3cb23 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vpmin.f32 d10, d11, d2 :: Qd 0x42da0000 0x121f1e1f Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vpmin.f32 d9, d5, d7 :: Qd 0x44db0000 0x45062000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vpmin.f32 d9, d5, d7 :: Qd 0x44db0000 0x121f1e1f Qm (i32)0x45062000 Qn (i32)0x44db0000
vpmin.f32 d0, d11, d12 :: Qd 0xc5b4d3c3 0xc2610000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vpmin.f32 d0, d11, d12 :: Qd 0xc5b4d3c3 0x121f1e1f Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vpmin.f32 d7, d1, d6 :: Qd 0xc0e96d19 0x43e41fde Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vpmin.f32 d7, d1, d6 :: Qd 0xc0e96d19 0x121f1e1f Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vpmin.f32 d0, d5, d2 :: Qd 0xbb965394 0x44053f2b Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vpmin.f32 d0, d5, d2 :: Qd 0xbb965394 0x121f1e1f Qm (i32)0x44053f2b Qn (i32)0xbb965394
vpmin.f32 d10, d13, d15 :: Qd 0xc40dcfae 0xc3f29f73 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vpmin.f32 d10, d13, d15 :: Qd 0xc40dcfae 0x121f1e1f Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vpmin.f32 d10, d13, d15 :: Qd 0x4608d008 0x4887f70e Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vpmin.f32 d10, d13, d15 :: Qd 0x4608d008 0x121f1e1f Qm (i32)0x4887f70e Qn (i32)0x4608d008
vpmin.f32 d0, d1, d2 :: Qd 0x4e920233 0x4e511724 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vpmin.f32 d0, d1, d2 :: Qd 0x4e920233 0x121f1e1f Qm (i32)0x4e511724 Qn (i32)0x4e920233
vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x00000000
vpmin.f32 d0, d1, d2 :: Qd 0xba800000 0x3a800000 Qm (i32)0x3a800000 Qn (i32)0xba800000
+vpmin.f32 d0, d1, d2 :: Qd 0xba800000 0x121f1e1f Qm (i32)0x3a800000 Qn (i32)0xba800000
vpmin.f32 d0, d1, d2 :: Qd 0x3a800000 0xba800000 Qm (i32)0xba800000 Qn (i32)0x3a800000
+vpmin.f32 d0, d1, d2 :: Qd 0x3a800000 0x121f1e1f Qm (i32)0xba800000 Qn (i32)0x3a800000
vpmin.f32 d0, d1, d2 :: Qd 0x45125ffc 0x45126004 Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vpmin.f32 d0, d1, d2 :: Qd 0x45125ffc 0x121f1e1f Qm (i32)0x45126004 Qn (i32)0x45125ffc
vpmin.f32 d0, d1, d2 :: Qd 0xc5126004 0xc5125ffc Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vpmin.f32 d0, d1, d2 :: Qd 0xc5126004 0x121f1e1f Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vpmin.f32 d0, d1, d2 :: Qd 0x47bff200 0x47ae5e00 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vpmin.f32 d0, d1, d2 :: Qd 0x47bff200 0x121f1e1f Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x00000000
vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0xff800000
vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x7fc00000
vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x3f800000
vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x00000000
vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x7f800000
vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0xff800000
vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
+vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x3f800000
vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x00000000
vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x7f800000
vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0xff800000
vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vpmin.f32 d0, d1, d2 :: Qd 0x7fc00000 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x7fc00000
vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x3f800000 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x3f800000
vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vpmin.f32 d0, d1, d2 :: Qd 0x00000000 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x00000000
vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vpmin.f32 d0, d1, d2 :: Qd 0x7f800000 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x7f800000
vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vpmin.f32 d0, d1, d2 :: Qd 0xff800000 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0xff800000
---- VRECPE ----
vrecpe.u32 d0, d1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x404ccccd
+vrecpe.u32 d0, d1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x404ccccd
vrecpe.u32 d0, d1 :: Qd 0xa7000000 0xa7000000 Qm (i32)0xc4234ccd
+vrecpe.u32 d0, d1 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc4234ccd
+vrecpe.u32 d10, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
vrecpe.u32 d10, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
vrecpe.u32 d15, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
+vrecpe.u32 d15, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
vrecpe.u32 d15, d4 :: Qd 0xab800000 0xab800000 Qm (i32)0xbf000000
+vrecpe.u32 d15, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0xbf000000
vrecpe.u32 d15, d4 :: Qd 0xaa000000 0xaa000000 Qm (i32)0xc0e33333
+vrecpe.u32 d15, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc0e33333
+vrecpe.u32 d12, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x40fff800
vrecpe.u32 d12, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x40fff800
vrecpe.u32 d12, d8 :: Qd 0xaa000000 0xaa000000 Qm (i32)0xc0fff800
+vrecpe.u32 d12, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc0fff800
vrecpe.u32 d0, d1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x404ccccd
+vrecpe.u32 d0, d1 :: Qd 0xffffffff 0xffffffff Qm (i32)0x404ccccd
+vrecpe.u32 d10, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
vrecpe.u32 d10, d11 :: Qd 0xffffffff 0xffffffff Qm (i32)0x64cb49b4
vrecpe.u32 d15, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
+vrecpe.u32 d15, d4 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4f32d05e
vrecpe.f32 d15, d4 :: Qd 0xbfff8000 0xbfff8000 Qm (i32)0xbf000000
+vrecpe.f32 d15, d4 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0xbf000000
vrecpe.f32 d15, d4 :: Qd 0xbe100000 0xbe100000 Qm (i32)0xc0e33333
+vrecpe.f32 d15, d4 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0xc0e33333
vrecpe.f32 d12, d8 :: Qd 0x3e000000 0x3e000000 Qm (i32)0x40fff800
+vrecpe.f32 d12, d8 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x40fff800
vrecpe.f32 d12, d8 :: Qd 0xbe000000 0xbe000000 Qm (i32)0xc0fff800
+vrecpe.f32 d12, d8 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0xc0fff800
vrecpe.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x00000007
vrecpe.f32 d10, d11 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000000
+vrecpe.f32 d10, d11 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x80000000
vrecpe.f32 d0, d1 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000001
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x80000001
vrecpe.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x7fffffff
vrecpe.f32 d0, d14 :: Qd 0x4e4c0000 0x4e4c0000 Qm (i32)0x30a0bcef
+vrecpe.f32 d0, d14 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x30a0bcef
vrecpe.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x00000007
vrecpe.f32 d10, d11 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000000
+vrecpe.f32 d10, d11 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x80000000
vrecpe.f32 d0, d1 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000001
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x80000001
vrecpe.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x7fffffff
vrecpe.f32 d0, d14 :: Qd 0x4e4c0000 0x4e4c0000 Qm (i32)0x30a0bcef
+vrecpe.f32 d0, d14 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x30a0bcef
vrecpe.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x7fc00000
vrecpe.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x00000000
vrecpe.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0x7f800000
vrecpe.f32 d0, d1 :: Qd 0x80000000 0x80000000 Qm (i32)0xff800000
+vrecpe.f32 d0, d1 :: Qd 0x69d08000 0x6ad18000 Qm (i32)0xff800000
---- VRECPS ----
vrecps.f32 d0, d5, d2 :: Qd 0x44837ce4 0x44837ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vrecps.f32 d0, d5, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vrecps.f32 d3, d4, d5 :: Qd 0x4ddf4321 0x4ddf4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vrecps.f32 d3, d4, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vrecps.f32 d10, d11, d2 :: Qd 0x4f050e7f 0x4f050e7f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vrecps.f32 d10, d11, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vrecps.f32 d9, d5, d7 :: Qd 0xcec3063f 0xcec3063f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vrecps.f32 d9, d5, d7 :: Qd 0x40000000 0x40000000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vrecps.f32 d0, d5, d2 :: Qd 0xd029254c 0xd029254c Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vrecps.f32 d0, d5, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vrecps.f32 d3, d4, d5 :: Qd 0xc6fc5c00 0xc6fc5c00 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vrecps.f32 d3, d4, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vrecps.f32 d10, d11, d2 :: Qd 0xcc4a89cc 0xcc4a89cc Qm (i32)0x473e7300 Qn (i32)0x44882000
+vrecps.f32 d10, d11, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vrecps.f32 d9, d5, d7 :: Qd 0xcdb2c947 0xcdb2c947 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vrecps.f32 d9, d5, d7 :: Qd 0x40000000 0x40000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vrecps.f32 d0, d11, d12 :: Qd 0xcef90536 0xcef90536 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vrecps.f32 d0, d11, d12 :: Qd 0x40000000 0x40000000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vrecps.f32 d7, d1, d6 :: Qd 0x3ff54e08 0x3ff54e08 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vrecps.f32 d7, d1, d6 :: Qd 0x40000000 0x40000000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vrecps.f32 d0, d1, d2 :: Qd 0xc88fe280 0xc88fe280 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vrecps.f32 d3, d4, d5 :: Qd 0xc993b8d3 0xc993b8d3 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vrecps.f32 d3, d4, d5 :: Qd 0x40000000 0x40000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vrecps.f32 d10, d11, d2 :: Qd 0xc74f98fc 0xc74f98fc Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vrecps.f32 d10, d11, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vrecps.f32 d9, d5, d7 :: Qd 0xca657ab8 0xca657ab8 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vrecps.f32 d9, d5, d7 :: Qd 0x40000000 0x40000000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vrecps.f32 d0, d11, d12 :: Qd 0xc89eedde 0xc89eedde Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vrecps.f32 d0, d11, d12 :: Qd 0x40000000 0x40000000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vrecps.f32 d7, d1, d6 :: Qd 0x45502239 0x45502239 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vrecps.f32 d7, d1, d6 :: Qd 0x40000000 0x40000000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vrecps.f32 d0, d5, d2 :: Qd 0x408e3e84 0x408e3e84 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vrecps.f32 d0, d5, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vrecps.f32 d10, d13, d15 :: Qd 0xc8866666 0xc8866666 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vrecps.f32 d10, d13, d15 :: Qd 0x40000000 0x40000000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vrecps.f32 d10, d13, d15 :: Qd 0xcf115379 0xcf115379 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vrecps.f32 d10, d13, d15 :: Qd 0x40000000 0x40000000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vrecps.f32 d0, d1, d2 :: Qd 0xdd6e81fd 0xdd6e81fd Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vrecps.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vrecps.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0x00000000
vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0x00000000
vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vrecps.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vrecps.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vrecps.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vrecps.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vrecps.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vrecps.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vrecps.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vrecps.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0xff800000 Qn (i32)0x00000000
vrecps.f32 d0, d1, d2 :: Qd 0x40000000 0x40000000 Qm (i32)0xff800000 Qn (i32)0x00000000
vrecps.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vrecps.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vrecps.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vrecps.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VABS (fp) ----
vabs.f32 d0, d1 :: Qd 0x404ccccd 0x404ccccd Qm (i32)0x404ccccd
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x404ccccd
vabs.f32 d10, d11 :: Qd 0x64cb49b4 0x64cb49b4 Qm (i32)0x64cb49b4
+vabs.f32 d10, d11 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x64cb49b4
vabs.f32 d15, d4 :: Qd 0x4f32d05e 0x4f32d05e Qm (i32)0x4f32d05e
+vabs.f32 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x4f32d05e
vabs.f32 d15, d4 :: Qd 0x3f000000 0x3f000000 Qm (i32)0xbf000000
+vabs.f32 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xbf000000
vabs.f32 d15, d4 :: Qd 0x40e33333 0x40e33333 Qm (i32)0xc0e33333
+vabs.f32 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xc0e33333
vabs.f32 d12, d8 :: Qd 0x40fff800 0x40fff800 Qm (i32)0x40fff800
+vabs.f32 d12, d8 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x40fff800
vabs.f32 d12, d8 :: Qd 0x40fff800 0x40fff800 Qm (i32)0xc0fff800
+vabs.f32 d12, d8 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xc0fff800
vabs.f32 d0, d1 :: Qd 0x404ccccd 0x404ccccd Qm (i32)0x404ccccd
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x404ccccd
vabs.f32 d10, d11 :: Qd 0x64cb49b4 0x64cb49b4 Qm (i32)0x64cb49b4
+vabs.f32 d10, d11 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x64cb49b4
vabs.f32 d15, d4 :: Qd 0x4f32d05e 0x4f32d05e Qm (i32)0x4f32d05e
+vabs.f32 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x4f32d05e
vabs.f32 d15, d4 :: Qd 0x3f000000 0x3f000000 Qm (i32)0xbf000000
+vabs.f32 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xbf000000
vabs.f32 d15, d4 :: Qd 0x40e33333 0x40e33333 Qm (i32)0xc0e33333
+vabs.f32 d15, d4 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xc0e33333
vabs.f32 d12, d8 :: Qd 0x40fff800 0x40fff800 Qm (i32)0x40fff800
+vabs.f32 d12, d8 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x40fff800
vabs.f32 d12, d8 :: Qd 0x40fff800 0x40fff800 Qm (i32)0xc0fff800
+vabs.f32 d12, d8 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xc0fff800
vabs.f32 d0, d1 :: Qd 0x00000007 0x00000007 Qm (i32)0x00000007
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000007
vabs.f32 d10, d11 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
+vabs.f32 d10, d11 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x80000000
vabs.f32 d0, d1 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x80000001
vabs.f32 d0, d1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x7fffffff
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x7fffffff
vabs.f32 d0, d14 :: Qd 0x30a0bcef 0x30a0bcef Qm (i32)0x30a0bcef
+vabs.f32 d0, d14 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x30a0bcef
vabs.f32 d0, d1 :: Qd 0x00000007 0x00000007 Qm (i32)0x00000007
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000007
vabs.f32 d10, d11 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
+vabs.f32 d10, d11 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x80000000
vabs.f32 d0, d1 :: Qd 0x00000001 0x00000001 Qm (i32)0x80000001
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x80000001
vabs.f32 d0, d1 :: Qd 0x7fffffff 0x7fffffff Qm (i32)0x7fffffff
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x7fffffff
vabs.f32 d0, d14 :: Qd 0x30a0bcef 0x30a0bcef Qm (i32)0x30a0bcef
+vabs.f32 d0, d14 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x30a0bcef
vabs.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x7fc00000
vabs.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x00000000
vabs.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0x7f800000
vabs.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000
+vabs.f32 d0, d1 :: Qd 0x151d191d 0x141c1f1c Qm (i32)0xff800000
---- VCGT (fp) ----
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vcgt.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vcgt.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vcgt.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vcgt.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vcgt.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec Qn (i32)0xc2364659
vcgt.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec Qn (i32)0xc2364659
vcgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vcgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vcgt.f32 d10, d11, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vcgt.f32 d10, d11, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vcgt.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vcgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vcgt.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vcgt.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vcgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vcgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vcgt.f32 d10, d31, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vcgt.f32 d10, d31, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vcgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vcgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vcgt.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vcgt.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vcgt.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vcgt.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vcgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vcgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vcgt.f32 d20, d21, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vcgt.f32 d20, d21, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vcgt.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45062000 Qn (i32)0x44db0000
+vcgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vcgt.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vcgt.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vcgt.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vcgt.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vcgt.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vcgt.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vcgt.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vcgt.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vcgt.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vcgt.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3a800000 Qn (i32)0xba800000
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3a800000 Qn (i32)0xba800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0xff800000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0xff800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0xff800000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0xff800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x00000000
+vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vcgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vcgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0xff800000
---- VCGE (fp) ----
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vcge.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vcge.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vcge.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vcge.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vcge.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec Qn (i32)0xc2364659
vcge.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec Qn (i32)0xc2364659
vcge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vcge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vcge.f32 d10, d11, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vcge.f32 d10, d11, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vcge.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vcge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vcge.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vcge.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vcge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vcge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vcge.f32 d10, d31, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vcge.f32 d10, d31, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vcge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vcge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vcge.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vcge.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vcge.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vcge.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vcge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vcge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vcge.f32 d20, d21, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vcge.f32 d20, d21, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vcge.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45062000 Qn (i32)0x44db0000
+vcge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vcge.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vcge.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vcge.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vcge.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vcge.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vcge.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vcge.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vcge.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vcge.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vcge.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3a800000 Qn (i32)0xba800000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3a800000 Qn (i32)0xba800000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x45126004 Qn (i32)0x45125ffc
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fc00000 Qn (i32)0xff800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0xff800000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0xff800000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0xff800000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0xff800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x00000000
vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vcge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0xff800000
vcge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0xff800000
---- VACGT (fp) ----
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3f000000 Qn (i32)0xbf000000
vacgt.f32 d2, d15, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
+vacgt.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vacgt.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vacgt.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vacgt.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vacgt.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vacgt.f32 d3, d4, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vacgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vacgt.f32 d10, d11, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vacgt.f32 d10, d11, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vacgt.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vacgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vacgt.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vacgt.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vacgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vacgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vacgt.f32 d10, d31, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vacgt.f32 d10, d31, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vacgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vacgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vacgt.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vacgt.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vacgt.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vacgt.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vacgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vacgt.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vacgt.f32 d20, d21, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vacgt.f32 d20, d21, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vacgt.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45062000 Qn (i32)0x44db0000
+vacgt.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vacgt.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vacgt.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vacgt.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vacgt.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vacgt.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vacgt.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vacgt.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vacgt.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vacgt.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vacgt.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3a800000 Qn (i32)0xba800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3a800000 Qn (i32)0xba800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fc00000 Qn (i32)0x00000000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0xff800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x3f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x00000000
vacgt.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x00000000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0xff800000
vacgt.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VACGE (fp) ----
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3f000000 Qn (i32)0xbf000000
vacge.f32 d2, d15, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
+vacge.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vacge.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vacge.f32 d15, d7, d8 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43677333 Qn (i32)0x43677333
+vacge.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vacge.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vacge.f32 d3, d4, d5 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vacge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vacge.f32 d10, d11, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vacge.f32 d10, d11, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vacge.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vacge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vacge.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vacge.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vacge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vacge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vacge.f32 d10, d31, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vacge.f32 d10, d31, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vacge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vacge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vacge.f32 d0, d11, d12 :: Qd 0xffffffff 0xffffffff Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vacge.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vacge.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vacge.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vacge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vacge.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vacge.f32 d20, d21, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vacge.f32 d20, d21, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vacge.f32 d9, d5, d7 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45062000 Qn (i32)0x44db0000
+vacge.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vacge.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vacge.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vacge.f32 d7, d1, d6 :: Qd 0xffffffff 0xffffffff Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vacge.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vacge.f32 d0, d5, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vacge.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vacge.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vacge.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vacge.f32 d10, d13, d15 :: Qd 0xffffffff 0xffffffff Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vacge.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x3a800000 Qn (i32)0xba800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3a800000 Qn (i32)0xba800000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xba800000 Qn (i32)0x3a800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x45126004 Qn (i32)0x45125ffc
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x45126004 Qn (i32)0x45125ffc
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fc00000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0xff800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x3f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x00000000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0x7f800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vacge.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0xff800000
+vacge.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VCEQ (fp) ----
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3f000000 Qn (i32)0xbf000000
+vceq.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vceq.f32 d2, d15, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xbf07ae14 Qn (i32)0x3f051eb8
vceq.f32 d15, d7, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0x43677333 Qn (i32)0x43677333
+vceq.f32 d15, d7, d8 :: Qd 0x00000000 0x00000000 Qm (i32)0x43677333 Qn (i32)0x43677333
+vceq.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vceq.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vceq.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vceq.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vceq.f32 d10, d11, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vceq.f32 d10, d11, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vceq.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vceq.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vceq.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vceq.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vceq.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vceq.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x41c70126 Qn (i32)0x44a84003
vceq.f32 d10, d31, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vceq.f32 d10, d31, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x473e73b3 Qn (i32)0x44882666
+vceq.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vceq.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vceq.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vceq.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vceq.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vceq.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vceq.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vceq.f32 d3, d4, d5 :: Qd 0x00000000 0x00000000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vceq.f32 d20, d21, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vceq.f32 d20, d21, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vceq.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vceq.f32 d9, d5, d7 :: Qd 0x00000000 0x00000000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vceq.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vceq.f32 d0, d11, d12 :: Qd 0x00000000 0x00000000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vceq.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vceq.f32 d7, d1, d6 :: Qd 0x00000000 0x00000000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vceq.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vceq.f32 d0, d5, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vceq.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vceq.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vceq.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vceq.f32 d10, d13, d15 :: Qd 0x00000000 0x00000000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
vceq.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3a800000 Qn (i32)0xba800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x3a800000 Qn (i32)0xba800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xba800000 Qn (i32)0x3a800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x45126004 Qn (i32)0x45125ffc
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x45126004 Qn (i32)0x45125ffc
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xc5125ffc Qn (i32)0xc5126004
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x47ae5e00 Qn (i32)0x47bff200
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vceq.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000 Qn (i32)0x00000000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x00000000
vceq.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000 Qn (i32)0x7f800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000
vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vceq.f32 d0, d1, d2 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000 Qn (i32)0xff800000
+vceq.f32 d0, d1, d2 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VCEQ (fp) #0 ----
vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x01000000
+vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x01000000
vceq.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000001
+vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001
vceq.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000000
+vceq.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
vceq.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec
+vceq.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec
+vceq.f32 d2, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xc1b851ec
vceq.f32 d2, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xc1b851ec
vceq.f32 d30, d15, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.f32 d30, d15, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
vceq.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
+vceq.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
---- VCGT (fp) #0 ----
vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x01000000
+vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x01000000
vcgt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001
+vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000001
vcgt.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
+vcgt.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000000
+vcgt.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec
vcgt.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec
vcgt.f32 d2, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xc1b851ec
+vcgt.f32 d2, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
vcgt.f32 d30, d15, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.f32 d30, d15, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcgt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7fc00000
vcgt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000
vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x7f800000
vcgt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
+vcgt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000
---- VCLT (fp) #0 ----
vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x01000000
+vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x01000000
vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001
+vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001
+vclt.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
vclt.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
vclt.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec
+vclt.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec
vclt.f32 d2, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
+vclt.f32 d2, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xc1b851ec
+vclt.f32 d30, d15, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.f32 d30, d15, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
+vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vclt.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000
+vclt.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
---- VCGE (fp) #0 ----
vcge.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x01000000
+vcge.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x01000000
vcge.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000001
+vcge.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000001
+vcge.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000000
vcge.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000000
vcge.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec
+vcge.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x41b851ec
vcge.f32 d2, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xc1b851ec
+vcge.f32 d2, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
+vcge.f32 d30, d15, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcge.f32 d30, d15, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcle.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vcle.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
---- VCLE (fp) #0 ----
vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x01000000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x01000000
vcle.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000001
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000001
vcle.f32 d2, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x80000000
+vcle.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
+vcle.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec
vcle.f32 d2, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x41b851ec
vcle.f32 d2, d31, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xc1b851ec
+vcle.f32 d2, d31, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xc1b851ec
vcle.f32 d30, d15, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.f32 d30, d15, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000
vcle.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0x00000000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
vcle.f32 d0, d1, #0 :: Qd 0xffffffff 0xffffffff Qm (i32)0xff800000
+vcle.f32 d0, d1, #0 :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000
---- VNEG (fp) ----
vneg.f32 d0, d1 :: Qd 0x81000000 0x81000000 Qm (i32)0x01000000
+vneg.f32 d0, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x01000000
vneg.f32 d0, d1 :: Qd 0x80000001 0x80000001 Qm (i32)0x00000001
+vneg.f32 d0, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x00000001
vneg.f32 d2, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000
+vneg.f32 d2, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x80000000
vneg.f32 d2, d1 :: Qd 0xc1b851ec 0xc1b851ec Qm (i32)0x41b851ec
+vneg.f32 d2, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x41b851ec
vneg.f32 d2, d31 :: Qd 0x41b851ec 0x41b851ec Qm (i32)0xc1b851ec
+vneg.f32 d2, d31 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0xc1b851ec
vneg.f32 d30, d15 :: Qd 0x80000000 0x80000000 Qm (i32)0x00000000
+vneg.f32 d30, d15 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x00000000
vneg.f32 d0, d1 :: Qd 0xffc00000 0xffc00000 Qm (i32)0x7fc00000
+vneg.f32 d0, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x7fc00000
vneg.f32 d0, d1 :: Qd 0x80000000 0x80000000 Qm (i32)0x00000000
+vneg.f32 d0, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x00000000
vneg.f32 d0, d1 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000
+vneg.f32 d0, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0x7f800000
vneg.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000
+vneg.f32 d0, d1 :: Qd 0x951d191d 0x941c1f1c Qm (i32)0xff800000
---- VRSQRTS ----
vrsqrts.f32 d0, d5, d2 :: Qd 0x44039ce4 0x44039ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659
+vrsqrts.f32 d0, d5, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x41b851ec Qn (i32)0xc2364659
vrsqrts.f32 d3, d4, d5 :: Qd 0x4d5f4321 0x4d5f4321 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
+vrsqrts.f32 d3, d4, d5 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0xc8a9da0f Qn (i32)0x44a84000
vrsqrts.f32 d10, d11, d2 :: Qd 0x4e850e7f 0x4e850e7f Qm (i32)0x473e7300 Qn (i32)0xc732da7a
+vrsqrts.f32 d10, d11, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x473e7300 Qn (i32)0xc732da7a
vrsqrts.f32 d9, d5, d7 :: Qd 0xce43063f 0xce43063f Qm (i32)0x47bb3de1 Qn (i32)0x46855200
+vrsqrts.f32 d9, d5, d7 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x47bb3de1 Qn (i32)0x46855200
vrsqrts.f32 d0, d5, d2 :: Qd 0xcfa9254c 0xcfa9254c Qm (i32)0xc732633d Qn (i32)0xc872bcb1
+vrsqrts.f32 d0, d5, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0xc732633d Qn (i32)0xc872bcb1
vrsqrts.f32 d3, d4, d5 :: Qd 0xc67c5a00 0xc67c5a00 Qm (i32)0x41c00000 Qn (i32)0x44a84000
+vrsqrts.f32 d3, d4, d5 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x41c00000 Qn (i32)0x44a84000
vrsqrts.f32 d10, d11, d2 :: Qd 0xcbca89cc 0xcbca89cc Qm (i32)0x473e7300 Qn (i32)0x44882000
+vrsqrts.f32 d10, d11, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x473e7300 Qn (i32)0x44882000
vrsqrts.f32 d9, d5, d7 :: Qd 0xcd32c947 0xcd32c947 Qm (i32)0x43560000 Qn (i32)0x49d5e008
+vrsqrts.f32 d9, d5, d7 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x43560000 Qn (i32)0x49d5e008
vrsqrts.f32 d0, d11, d12 :: Qd 0xce790536 0xce790536 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
+vrsqrts.f32 d0, d11, d12 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x48add9f2 Qn (i32)0x45b75812
vrsqrts.f32 d7, d1, d6 :: Qd 0x3fbaa704 0x3fbaa704 Qm (i32)0x42080079 Qn (i32)0x3b210e02
+vrsqrts.f32 d7, d1, d6 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x42080079 Qn (i32)0x3b210e02
vrsqrts.f32 d0, d1, d2 :: Qd 0xc80fe260 0xc80fe260 Qm (i32)0x452c2000 Qn (i32)0x42d60000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x452c2000 Qn (i32)0x42d60000
vrsqrts.f32 d3, d4, d5 :: Qd 0xc913b8cb 0xc913b8cb Qm (i32)0x445a8000 Qn (i32)0x44ad1333
+vrsqrts.f32 d3, d4, d5 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x445a8000 Qn (i32)0x44ad1333
vrsqrts.f32 d10, d11, d2 :: Qd 0xc6cf97fc 0xc6cf97fc Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
+vrsqrts.f32 d10, d11, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x43f3cb23 Qn (i32)0x42da0000
vrsqrts.f32 d9, d5, d7 :: Qd 0xc9e57ab4 0xc9e57ab4 Qm (i32)0x45062000 Qn (i32)0x44db0000
+vrsqrts.f32 d9, d5, d7 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x45062000 Qn (i32)0x44db0000
vrsqrts.f32 d0, d11, d12 :: Qd 0xc81eedbe 0xc81eedbe Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
+vrsqrts.f32 d0, d11, d12 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0xc2610000 Qn (i32)0xc5b4d3c3
vrsqrts.f32 d7, d1, d6 :: Qd 0x44d03239 0x44d03239 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
+vrsqrts.f32 d7, d1, d6 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x43e41fde Qn (i32)0xc0e96d19
vrsqrts.f32 d0, d5, d2 :: Qd 0x402e3e84 0x402e3e84 Qm (i32)0x44053f2b Qn (i32)0xbb965394
+vrsqrts.f32 d0, d5, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x44053f2b Qn (i32)0xbb965394
vrsqrts.f32 d10, d13, d15 :: Qd 0xc8066646 0xc8066646 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
+vrsqrts.f32 d10, d13, d15 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0xc3f29f73 Qn (i32)0xc40dcfae
vrsqrts.f32 d10, d13, d15 :: Qd 0xce915379 0xce915379 Qm (i32)0x4887f70e Qn (i32)0x4608d008
+vrsqrts.f32 d10, d13, d15 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x4887f70e Qn (i32)0x4608d008
vrsqrts.f32 d0, d1, d2 :: Qd 0xdcee81fd 0xdcee81fd Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x4e511724 Qn (i32)0x4e920233
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x00000000 Qn (i32)0x3f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x00000000 Qn (i32)0x00000000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x00000000 Qn (i32)0x00000000
vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0x7f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000
vrsqrts.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x7f800000 Qn (i32)0x3f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000
+vrsqrts.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0xff800000 Qn (i32)0x3f800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
vrsqrts.f32 d0, d1, d2 :: Qd 0x3fc00000 0x3fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000
vrsqrts.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000
vrsqrts.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000
+vrsqrts.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000
---- VRSQRTE (fp) ----
vrsqrte.f32 d0, d1 :: Qd 0x3f0f0000 0x3f0f0000 Qm (i32)0x404ccccd
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x404ccccd
vrsqrte.f32 d10, d11 :: Qd 0x2ccb0000 0x2ccb0000 Qm (i32)0x64cb49b4
+vrsqrte.f32 d10, d11 :: Qd 0x54a30000 0x55238000 Qm (i32)0x64cb49b4
vrsqrte.f32 d15, d4 :: Qd 0x37998000 0x37998000 Qm (i32)0x4f32d05e
+vrsqrte.f32 d15, d4 :: Qd 0x54a30000 0x55238000 Qm (i32)0x4f32d05e
vrsqrte.f32 d15, d4 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xbf000000
+vrsqrte.f32 d15, d4 :: Qd 0x54a30000 0x55238000 Qm (i32)0xbf000000
vrsqrte.f32 d15, d4 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xc0e33333
+vrsqrte.f32 d15, d4 :: Qd 0x54a30000 0x55238000 Qm (i32)0xc0e33333
vrsqrte.f32 d12, d8 :: Qd 0x3eb50000 0x3eb50000 Qm (i32)0x40fff800
+vrsqrte.f32 d12, d8 :: Qd 0x54a30000 0x55238000 Qm (i32)0x40fff800
vrsqrte.f32 d12, d8 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xc0fff800
+vrsqrte.f32 d12, d8 :: Qd 0x54a30000 0x55238000 Qm (i32)0xc0fff800
vrsqrte.f32 d0, d1 :: Qd 0x3f0f0000 0x3f0f0000 Qm (i32)0x404ccccd
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x404ccccd
vrsqrte.f32 d10, d11 :: Qd 0x2ccb0000 0x2ccb0000 Qm (i32)0x64cb49b4
+vrsqrte.f32 d10, d11 :: Qd 0x54a30000 0x55238000 Qm (i32)0x64cb49b4
vrsqrte.f32 d15, d4 :: Qd 0x37998000 0x37998000 Qm (i32)0x4f32d05e
+vrsqrte.f32 d15, d4 :: Qd 0x54a30000 0x55238000 Qm (i32)0x4f32d05e
vrsqrte.f32 d15, d4 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xbf000000
+vrsqrte.f32 d15, d4 :: Qd 0x54a30000 0x55238000 Qm (i32)0xbf000000
vrsqrte.f32 d15, d4 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xc0e33333
+vrsqrte.f32 d15, d4 :: Qd 0x54a30000 0x55238000 Qm (i32)0xc0e33333
vrsqrte.f32 d12, d8 :: Qd 0x3eb50000 0x3eb50000 Qm (i32)0x40fff800
+vrsqrte.f32 d12, d8 :: Qd 0x54a30000 0x55238000 Qm (i32)0x40fff800
vrsqrte.f32 d12, d8 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xc0fff800
+vrsqrte.f32 d12, d8 :: Qd 0x54a30000 0x55238000 Qm (i32)0xc0fff800
vrsqrte.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x00000007
vrsqrte.f32 d10, d11 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000000
+vrsqrte.f32 d10, d11 :: Qd 0x54a30000 0x55238000 Qm (i32)0x80000000
vrsqrte.f32 d0, d1 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000001
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x80000001
vrsqrte.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x7fffffff
vrsqrte.f32 d0, d14 :: Qd 0x46e48000 0x46e48000 Qm (i32)0x30a0bcef
+vrsqrte.f32 d0, d14 :: Qd 0x54a30000 0x55238000 Qm (i32)0x30a0bcef
vrsqrte.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000007
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x00000007
vrsqrte.f32 d10, d11 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000000
+vrsqrte.f32 d10, d11 :: Qd 0x54a30000 0x55238000 Qm (i32)0x80000000
vrsqrte.f32 d0, d1 :: Qd 0xff800000 0xff800000 Qm (i32)0x80000001
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x80000001
vrsqrte.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fffffff
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x7fffffff
vrsqrte.f32 d0, d14 :: Qd 0x46e48000 0x46e48000 Qm (i32)0x30a0bcef
+vrsqrte.f32 d0, d14 :: Qd 0x54a30000 0x55238000 Qm (i32)0x30a0bcef
vrsqrte.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x7fc00000
vrsqrte.f32 d0, d1 :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x00000000
vrsqrte.f32 d0, d1 :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0x7f800000
vrsqrte.f32 d0, d1 :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000
+vrsqrte.f32 d0, d1 :: Qd 0x54a30000 0x55238000 Qm (i32)0xff800000
TESTINST2("rev16 r0, r1", 0xbb6d14ec, r0, r1, 0);
TESTINST2("rev16 r0, r1", 0x68983cc9, r0, r1, 0);
+ printf("------------ NOP (begin) ------------\n");
+ printf("nop\n");
+ __asm__ __volatile__("nop" ::: "memory","cc");
+ printf("nopeq\n");
+ __asm__ __volatile__("nopeq" ::: "memory","cc");
+ printf("nopne\n");
+ __asm__ __volatile__("nopne" ::: "memory","cc");
+ printf("------------ NOP (end) ------------\n");
+
return 0;
}
rev16 r0, r1 :: rd 0xb8e54b3d rm 0xe5b83d4b, carryin 0, cpsr 0x00000000
rev16 r0, r1 :: rd 0x6dbbec14 rm 0xbb6d14ec, carryin 0, cpsr 0x00000000
rev16 r0, r1 :: rd 0x9868c93c rm 0x68983cc9, carryin 0, cpsr 0x00000000
+------------ NOP (begin) ------------
+nop
+nopeq
+nopne
+------------ NOP (end) ------------
TESTINST2("rev16 r8, r9", 0xbb6d14ec, r8, r9, 0);
TESTINST2("rev16 r8, r9", 0x68983cc9, r8, r9, 0);
+ printf("------------ NOP (begin) ------------\n");
+ printf("nop\n");
+ __asm__ __volatile__("nop" ::: "memory","cc");
+ printf("nop.w\n");
+ __asm__ __volatile__("nop.w" ::: "memory","cc");
+ printf("------------ NOP (end) ------------\n");
+
// plus whatever stuff we can throw in from the old ARM test program
old_main();
rev16 r8, r9 :: rd 0xb8e54b3d rm 0xe5b83d4b, c:v-in 0, cpsr 0xc0000000 NZ
rev16 r8, r9 :: rd 0x6dbbec14 rm 0xbb6d14ec, c:v-in 0, cpsr 0xc0000000 NZ
rev16 r8, r9 :: rd 0x9868c93c rm 0x68983cc9, c:v-in 0, cpsr 0xc0000000 NZ
+------------ NOP (begin) ------------
+nop
+nop.w
+------------ NOP (end) ------------
MOV
mov r0, r1 :: rd 0x00000001 rm 0x00000001, c:v-in 0, cpsr 0xc0000000 NZ
cpy r0, r1 :: rd 0x00000001 rm 0x00000001, c:v-in 0, cpsr 0xc0000000 NZ
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/none/tests/darwin
svn://svn.valgrind.org/valgrind
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# none/tests/darwin/Makefile. Generated from Makefile.in by configure.
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+
+
+# This file is used for tool tests, and also in perf/Makefile.am.
+
+# This file should be included (directly or indirectly) by every
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+abs_builddir = /home/ubuntu/valgrind-3.5.0/none/tests/darwin
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+top_builddir = ../../..
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+ -Wno-format-zero-length \
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+
+AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
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+
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+ -I$(top_srcdir)/include \
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+# -DVGO_linux=1 \
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+
+AM_FLAG_M3264_X86_LINUX =
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+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) -g
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+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) -g
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+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) -g
+AM_FLAG_M3264_PPC32_AIX5 =
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+ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 =
+AM_CFLAGS_PPC64_AIX5 = -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
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+ -mmacosx-version-min=10.5 \
+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
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+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_ARM_LINUX)
+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_ARM_LINUX)
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+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_ARM_LINUX)
+AM_FLAG_M3264_SEC =
+#AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_)
+
+# Baseline link flags for making vgpreload shared objects.
+#
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+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
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+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
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+AM_CFLAGS = -Winline -Wall -Wshadow -g $(AM_FLAG_M3264_PRI)
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g $(AM_FLAG_M3264_PRI)
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS)
+#noinst_DSYMS = $(check_PROGRAMS)
+dist_noinst_SCRIPTS = filter_stderr
+EXTRA_DIST = \
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+ apple-main-arg.stderr.exp apple-main-arg.vgtest \
+ rlimit.stderr.exp rlimit.vgtest
+
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+ case '$(am__configure_deps)' in \
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+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/darwin/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/darwin/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
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+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
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+clean-checkPROGRAMS:
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+access_extended$(EXEEXT): $(access_extended_OBJECTS) $(access_extended_DEPENDENCIES)
+ @rm -f access_extended$(EXEEXT)
+ $(LINK) $(access_extended_OBJECTS) $(access_extended_LDADD) $(LIBS)
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+ @rm -f apple-main-arg$(EXEEXT)
+ $(LINK) $(apple_main_arg_OBJECTS) $(apple_main_arg_LDADD) $(LIBS)
+rlimit$(EXEEXT): $(rlimit_OBJECTS) $(rlimit_DEPENDENCIES)
+ @rm -f rlimit$(EXEEXT)
+ $(LINK) $(rlimit_OBJECTS) $(rlimit_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+include ./$(DEPDIR)/access_extended.Po
+include ./$(DEPDIR)/apple-main-arg.Po
+include ./$(DEPDIR)/rlimit.Po
+
+.c.o:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c $<
+
+.c.obj:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
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+ fi
+ctags: CTAGS
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+ $(TAGS_FILES) $(LISP)
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+GTAGS:
+ here=`$(am__cd) $(top_builddir) && pwd` \
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+ dist_files=`for file in $$list; do echo $$file; done | \
+ sed -e "s|^$$srcdirstrip/||;t" \
+ -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \
+ case $$dist_files in \
+ */*) $(MKDIR_P) `echo "$$dist_files" | \
+ sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \
+ sort -u` ;; \
+ esac; \
+ for file in $$dist_files; do \
+ if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \
+ if test -d $$d/$$file; then \
+ dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \
+ if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \
+ cp -pR $(srcdir)/$$file $(distdir)$$dir || exit 1; \
+ fi; \
+ cp -pR $$d/$$file $(distdir)$$dir || exit 1; \
+ else \
+ test -f $(distdir)/$$file \
+ || cp -p $$d/$$file $(distdir)/$$file \
+ || exit 1; \
+ fi; \
+ done
+check-am: all-am
+ $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
+ $(MAKE) $(AM_MAKEFLAGS) check-local
+check: check-am
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+install: install-am
+install-exec: install-exec-am
+install-data: install-data-am
+uninstall: uninstall-am
+
+install-am: all-am
+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+
+installcheck: installcheck-am
+install-strip:
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+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+ `test -z '$(STRIP)' || \
+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
+ @echo "This command is intended for maintainers to use"
+ @echo "it deletes files that may require special tools to rebuild."
+clean: clean-am
+
+clean-am: clean-checkPROGRAMS clean-generic clean-local mostlyclean-am
+
+distclean: distclean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+distclean-am: clean-am distclean-compile distclean-generic \
+ distclean-tags
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+dvi: dvi-am
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+dvi-am:
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+install-pdf: install-pdf-am
+
+install-ps: install-ps-am
+
+installcheck-am:
+
+maintainer-clean: maintainer-clean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
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+mostlyclean: mostlyclean-am
+
+mostlyclean-am: mostlyclean-compile mostlyclean-generic
+
+pdf: pdf-am
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+pdf-am:
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+ps: ps-am
+
+ps-am:
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+uninstall-am:
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+.MAKE: install-am install-strip
+
+.PHONY: CTAGS GTAGS all all-am check check-am check-local clean \
+ clean-checkPROGRAMS clean-generic clean-local ctags distclean \
+ distclean-compile distclean-generic distclean-tags distdir dvi \
+ dvi-am html html-am info info-am install install-am \
+ install-data install-data-am install-dvi install-dvi-am \
+ install-exec install-exec-am install-html install-html-am \
+ install-info install-info-am install-man install-pdf \
+ install-pdf-am install-ps install-ps-am install-strip \
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+ maintainer-clean-generic mostlyclean mostlyclean-compile \
+ mostlyclean-generic pdf pdf-am ps ps-am tags uninstall \
+ uninstall-am
+
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+# This used to be required when Vex had a handwritten Makefile. It
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+
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+#----------------------------------------------------------------------------
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+build-noinst_DSYMS: $(noinst_DSYMS)
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+# This is used by coregrind/Makefile.am and Makefile.tool.am for doing
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+ rm -f $(inplacedir)/$$f; \
+ ln -f -s ../$(subdir)/$$f $(inplacedir); \
+ done
+
+# Similar to inplace-noinst_PROGRAMS
+inplace-noinst_DSYMS: build-noinst_DSYMS
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+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
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+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
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+# Similar to install-noinst_PROGRAMS.
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+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_DSYMS); do \
+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
+ done
+
+# This needs to be depended on by a 'clean-local' rule.
+clean-noinst_DSYMS:
+ for f in $(noinst_DSYMS); do \
+ rm -rf $$f.dSYM; \
+ done
+
+check-local: build-noinst_DSYMS
+
+clean-local: clean-noinst_DSYMS
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
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+# This file is used for tool tests, and also in perf/Makefile.am.
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+# This file should be included (directly or indirectly) by every
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+# These flags are used for building the preload shared objects.
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+@VGCONF_OS_IS_DARWIN_TRUE@AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
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+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
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+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
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+# Flags for the primary target. These must be used to build the
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+# Baseline link flags for making vgpreload shared objects.
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+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
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+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
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+ -DVGO_$(VGCONF_OS)=1 \
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+AM_CCASFLAGS = $(AM_CPPFLAGS)
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+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
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+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
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+# Similar to install-noinst_PROGRAMS.
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+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
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+
+
+
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+host_vendor = unknown
+htmldir = ${docdir}
+includedir = ${prefix}/include
+infodir = ${datarootdir}/info
+install_sh = $(SHELL) /home/ubuntu/valgrind-3.5.0/install-sh
+libdir = ${exec_prefix}/lib
+libexecdir = ${exec_prefix}/libexec
+localedir = ${datarootdir}/locale
+localstatedir = ${prefix}/var
+mandir = ${datarootdir}/man
+mkdir_p = /scratchbox/tools/bin/mkdir -p
+oldincludedir = /usr/include
+pdfdir = ${docdir}
+prefix = /usr
+program_transform_name = s,x,x,
+psdir = ${docdir}
+sbindir = ${exec_prefix}/sbin
+sharedstatedir = ${prefix}/com
+srcdir = .
+sysconfdir = ${prefix}/etc
+target_alias =
+top_builddir = ../../..
+top_srcdir = ../../..
+inplacedir = $(top_builddir)/.in_place
+
+#----------------------------------------------------------------------------
+# Flags
+#----------------------------------------------------------------------------
+
+# Baseline flags for all compilations. Aim here is to maximise
+# performance and get whatever useful warnings we can out of gcc.
+AM_CFLAGS_BASE = \
+ -O2 -g \
+ -Wall \
+ -Wmissing-prototypes \
+ -Wshadow \
+ -Wpointer-arith \
+ -Wstrict-prototypes \
+ -Wmissing-declarations \
+ -Wno-format-zero-length \
+ -fno-strict-aliasing
+
+AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+#AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+# -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
+# and so the CPPFLAGS are passed to the assembler. But this is not true for
+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
+# AM_CPPFLAGS_<PLATFORM> in each AM_CCASFLAGS_<PLATFORM> variable. This
+# means some of the flags are duplicated on systems with newer versions of
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+AM_CPPFLAGS_ARM_LINUX = \
+ -I$(top_srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
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+ -DVGO_linux=1 \
+ -DVGP_arm_linux=1
+
+#AM_CPPFLAGS_ = \
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+# -DVGO_linux=1 \
+# -DVGP__linux=1
+
+AM_FLAG_M3264_X86_LINUX =
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+ $(AM_CFLAGS_BASE)
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+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) -g
+AM_FLAG_M3264_AMD64_LINUX =
+AM_CFLAGS_AMD64_LINUX = -fomit-frame-pointer \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) -g
+AM_FLAG_M3264_PPC32_LINUX =
+AM_CFLAGS_PPC32_LINUX = $(AM_CFLAGS_BASE)
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+AM_FLAG_M3264_PPC64_LINUX =
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+AM_CCASFLAGS_PPC64_LINUX = $(AM_CPPFLAGS_PPC64_LINUX) -g
+AM_FLAG_M3264_ARM_LINUX =
+AM_CFLAGS_ARM_LINUX = \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) -g
+AM_FLAG_M3264_PPC32_AIX5 =
+AM_CFLAGS_PPC32_AIX5 = -mcpu=powerpc $(AM_CFLAGS_BASE)
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+
+AM_FLAG_M3264_PPC64_AIX5 =
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+AM_FLAG_M3264_X86_DARWIN = -arch i386
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+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_ARM_LINUX)
+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_ARM_LINUX)
+AM_CFLAGS_PRI = $(AM_CFLAGS_ARM_LINUX)
+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_ARM_LINUX)
+AM_FLAG_M3264_SEC =
+#AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
+# as $(AM_FLAG_M3264_PRI).
+AM_CFLAGS = -Winline -Wall -Wshadow -g $(AM_FLAG_M3264_PRI)
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g $(AM_FLAG_M3264_PRI)
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS)
+#noinst_DSYMS = $(check_PROGRAMS)
+dist_noinst_SCRIPTS = filter_stderr
+EXTRA_DIST = \
+ blockfault.stderr.exp blockfault.vgtest \
+ mremap.stderr.exp mremap.stderr.exp-glibc27 mremap.stdout.exp \
+ mremap.vgtest \
+ mremap2.stderr.exp mremap2.stdout.exp mremap2.vgtest
+
+all: all-am
+
+.SUFFIXES:
+.SUFFIXES: .c .o .obj
+$(srcdir)/Makefile.in: # $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/linux/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/linux/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
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+ esac;
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+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: # $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): # $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
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+blockfault$(EXEEXT): $(blockfault_OBJECTS) $(blockfault_DEPENDENCIES)
+ @rm -f blockfault$(EXEEXT)
+ $(LINK) $(blockfault_OBJECTS) $(blockfault_LDADD) $(LIBS)
+mremap$(EXEEXT): $(mremap_OBJECTS) $(mremap_DEPENDENCIES)
+ @rm -f mremap$(EXEEXT)
+ $(LINK) $(mremap_OBJECTS) $(mremap_LDADD) $(LIBS)
+mremap2$(EXEEXT): $(mremap2_OBJECTS) $(mremap2_DEPENDENCIES)
+ @rm -f mremap2$(EXEEXT)
+ $(LINK) $(mremap2_OBJECTS) $(mremap2_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+include ./$(DEPDIR)/blockfault.Po
+include ./$(DEPDIR)/mremap.Po
+include ./$(DEPDIR)/mremap2.Po
+
+.c.o:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c $<
+
+.c.obj:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
+ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES)
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ mkid -fID $$unique
+tags: TAGS
+
+TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ here=`pwd`; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ if test -z "$(ETAGS_ARGS)$$tags$$unique"; then :; else \
+ test -n "$$unique" || unique=$$empty_fix; \
+ $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
+ $$tags $$unique; \
+ fi
+ctags: CTAGS
+CTAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ test -z "$(CTAGS_ARGS)$$tags$$unique" \
+ || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
+ $$tags $$unique
+
+GTAGS:
+ here=`$(am__cd) $(top_builddir) && pwd` \
+ && cd $(top_srcdir) \
+ && gtags -i $(GTAGS_ARGS) $$here
+
+distclean-tags:
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+
+distdir: $(DISTFILES)
+ @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ list='$(DISTFILES)'; \
+ dist_files=`for file in $$list; do echo $$file; done | \
+ sed -e "s|^$$srcdirstrip/||;t" \
+ -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \
+ case $$dist_files in \
+ */*) $(MKDIR_P) `echo "$$dist_files" | \
+ sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \
+ sort -u` ;; \
+ esac; \
+ for file in $$dist_files; do \
+ if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \
+ if test -d $$d/$$file; then \
+ dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \
+ if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \
+ cp -pR $(srcdir)/$$file $(distdir)$$dir || exit 1; \
+ fi; \
+ cp -pR $$d/$$file $(distdir)$$dir || exit 1; \
+ else \
+ test -f $(distdir)/$$file \
+ || cp -p $$d/$$file $(distdir)/$$file \
+ || exit 1; \
+ fi; \
+ done
+check-am: all-am
+ $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
+ $(MAKE) $(AM_MAKEFLAGS) check-local
+check: check-am
+all-am: Makefile $(SCRIPTS)
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+install-exec: install-exec-am
+install-data: install-data-am
+uninstall: uninstall-am
+
+install-am: all-am
+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+
+installcheck: installcheck-am
+install-strip:
+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+ `test -z '$(STRIP)' || \
+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
+ @echo "This command is intended for maintainers to use"
+ @echo "it deletes files that may require special tools to rebuild."
+clean: clean-am
+
+clean-am: clean-checkPROGRAMS clean-generic clean-local mostlyclean-am
+
+distclean: distclean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+distclean-am: clean-am distclean-compile distclean-generic \
+ distclean-tags
+
+dvi: dvi-am
+
+dvi-am:
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+html: html-am
+
+info: info-am
+
+info-am:
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+install-data-am:
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+install-dvi: install-dvi-am
+
+install-exec-am:
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+install-html: install-html-am
+
+install-info: install-info-am
+
+install-man:
+
+install-pdf: install-pdf-am
+
+install-ps: install-ps-am
+
+installcheck-am:
+
+maintainer-clean: maintainer-clean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
+
+mostlyclean: mostlyclean-am
+
+mostlyclean-am: mostlyclean-compile mostlyclean-generic
+
+pdf: pdf-am
+
+pdf-am:
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+ps: ps-am
+
+ps-am:
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+uninstall-am:
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+.MAKE: install-am install-strip
+
+.PHONY: CTAGS GTAGS all all-am check check-am check-local clean \
+ clean-checkPROGRAMS clean-generic clean-local ctags distclean \
+ distclean-compile distclean-generic distclean-tags distdir dvi \
+ dvi-am html html-am info info-am install install-am \
+ install-data install-data-am install-dvi install-dvi-am \
+ install-exec install-exec-am install-html install-html-am \
+ install-info install-info-am install-man install-pdf \
+ install-pdf-am install-ps install-ps-am install-strip \
+ installcheck installcheck-am installdirs maintainer-clean \
+ maintainer-clean-generic mostlyclean mostlyclean-compile \
+ mostlyclean-generic pdf pdf-am ps ps-am tags uninstall \
+ uninstall-am
+
+
+# This used to be required when Vex had a handwritten Makefile. It
+# shouldn't be needed any more, though.
+
+#----------------------------------------------------------------------------
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+#----------------------------------------------------------------------------
+
+# On Darwin, for a program 'p', the DWARF debug info is stored in the
+# directory 'p.dSYM'. This must be generated after the executable is
+# created, with 'dsymutil p'. We could redefine LINK with a script that
+# executes 'dsymutil' after linking, but that's a pain. Instead we use this
+# hook so that every time "make check" is run, we subsequently invoke
+# 'dsymutil' on all the executables that lack a .dSYM directory, or that are
+# newer than their corresponding .dSYM directory.
+build-noinst_DSYMS: $(noinst_DSYMS)
+ for f in $(noinst_DSYMS); do \
+ if [ ! -e $$f.dSYM -o $$f -nt $$f.dSYM ] ; then \
+ echo "dsymutil $$f"; \
+ dsymutil $$f; \
+ fi; \
+ done
+
+# This is used by coregrind/Makefile.am and Makefile.tool.am for doing
+# "in-place" installs. It copies $(noinst_PROGRAMS) into $inplacedir.
+# It needs to be depended on by an 'all-local' rule.
+inplace-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_PROGRAMS) ; do \
+ rm -f $(inplacedir)/$$f; \
+ ln -f -s ../$(subdir)/$$f $(inplacedir); \
+ done
+
+# Similar to inplace-noinst_PROGRAMS
+inplace-noinst_DSYMS: build-noinst_DSYMS
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_DSYMS); do \
+ rm -f $(inplacedir)/$$f.dSYM; \
+ ln -f -s ../$(subdir)/$$f.dSYM $(inplacedir); \
+ done
+
+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
+# "make install". It copies $(noinst_PROGRAMS) into $prefix/lib/valgrind/.
+# It needs to be depended on by an 'install-exec-local' rule.
+install-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_PROGRAMS); do \
+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
+ done
+
+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
+# directories. XXX: not sure whether the resulting permissions will be
+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_DSYMS); do \
+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
+ done
+
+# This needs to be depended on by a 'clean-local' rule.
+clean-noinst_DSYMS:
+ for f in $(noinst_DSYMS); do \
+ rm -rf $$f.dSYM; \
+ done
+
+check-local: build-noinst_DSYMS
+
+clean-local: clean-noinst_DSYMS
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
+
+# This file is used for tool tests, and also in perf/Makefile.am.
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
+
+VPATH = @srcdir@
+pkgdatadir = $(datadir)/@PACKAGE@
+pkglibdir = $(libdir)/@PACKAGE@
+pkgincludedir = $(includedir)/@PACKAGE@
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+install_sh_DATA = $(install_sh) -c -m 644
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+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
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+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
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+ $(top_srcdir)/Makefile.tool-tests.am
+check_PROGRAMS = blockfault$(EXEEXT) mremap$(EXEEXT) mremap2$(EXEEXT)
+subdir = none/tests/linux
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+am__aclocal_m4_deps = $(top_srcdir)/configure.in
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+mkinstalldirs = $(install_sh) -d
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+CONFIG_CLEAN_FILES =
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+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+ `test -z '$(STRIP)' || \
+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
+ @echo "This command is intended for maintainers to use"
+ @echo "it deletes files that may require special tools to rebuild."
+clean: clean-am
+
+clean-am: clean-checkPROGRAMS clean-generic clean-local mostlyclean-am
+
+distclean: distclean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+distclean-am: clean-am distclean-compile distclean-generic \
+ distclean-tags
+
+dvi: dvi-am
+
+dvi-am:
+
+html: html-am
+
+info: info-am
+
+info-am:
+
+install-data-am:
+
+install-dvi: install-dvi-am
+
+install-exec-am:
+
+install-html: install-html-am
+
+install-info: install-info-am
+
+install-man:
+
+install-pdf: install-pdf-am
+
+install-ps: install-ps-am
+
+installcheck-am:
+
+maintainer-clean: maintainer-clean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
+
+mostlyclean: mostlyclean-am
+
+mostlyclean-am: mostlyclean-compile mostlyclean-generic
+
+pdf: pdf-am
+
+pdf-am:
+
+ps: ps-am
+
+ps-am:
+
+uninstall-am:
+
+.MAKE: install-am install-strip
+
+.PHONY: CTAGS GTAGS all all-am check check-am check-local clean \
+ clean-checkPROGRAMS clean-generic clean-local ctags distclean \
+ distclean-compile distclean-generic distclean-tags distdir dvi \
+ dvi-am html html-am info info-am install install-am \
+ install-data install-data-am install-dvi install-dvi-am \
+ install-exec install-exec-am install-html install-html-am \
+ install-info install-info-am install-man install-pdf \
+ install-pdf-am install-ps install-ps-am install-strip \
+ installcheck installcheck-am installdirs maintainer-clean \
+ maintainer-clean-generic mostlyclean mostlyclean-compile \
+ mostlyclean-generic pdf pdf-am ps ps-am tags uninstall \
+ uninstall-am
+
+
+# This used to be required when Vex had a handwritten Makefile. It
+# shouldn't be needed any more, though.
+
+#----------------------------------------------------------------------------
+# noinst_PROGRAMS and noinst_DSYMS targets
+#----------------------------------------------------------------------------
+
+# On Darwin, for a program 'p', the DWARF debug info is stored in the
+# directory 'p.dSYM'. This must be generated after the executable is
+# created, with 'dsymutil p'. We could redefine LINK with a script that
+# executes 'dsymutil' after linking, but that's a pain. Instead we use this
+# hook so that every time "make check" is run, we subsequently invoke
+# 'dsymutil' on all the executables that lack a .dSYM directory, or that are
+# newer than their corresponding .dSYM directory.
+build-noinst_DSYMS: $(noinst_DSYMS)
+ for f in $(noinst_DSYMS); do \
+ if [ ! -e $$f.dSYM -o $$f -nt $$f.dSYM ] ; then \
+ echo "dsymutil $$f"; \
+ dsymutil $$f; \
+ fi; \
+ done
+
+# This is used by coregrind/Makefile.am and Makefile.tool.am for doing
+# "in-place" installs. It copies $(noinst_PROGRAMS) into $inplacedir.
+# It needs to be depended on by an 'all-local' rule.
+inplace-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_PROGRAMS) ; do \
+ rm -f $(inplacedir)/$$f; \
+ ln -f -s ../$(subdir)/$$f $(inplacedir); \
+ done
+
+# Similar to inplace-noinst_PROGRAMS
+inplace-noinst_DSYMS: build-noinst_DSYMS
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_DSYMS); do \
+ rm -f $(inplacedir)/$$f.dSYM; \
+ ln -f -s ../$(subdir)/$$f.dSYM $(inplacedir); \
+ done
+
+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
+# "make install". It copies $(noinst_PROGRAMS) into $prefix/lib/valgrind/.
+# It needs to be depended on by an 'install-exec-local' rule.
+install-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_PROGRAMS); do \
+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
+ done
+
+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
+# directories. XXX: not sure whether the resulting permissions will be
+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_DSYMS); do \
+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
+ done
+
+# This needs to be depended on by a 'clean-local' rule.
+clean-noinst_DSYMS:
+ for f in $(noinst_DSYMS); do \
+ rm -rf $$f.dSYM; \
+ done
+
+check-local: build-noinst_DSYMS
+
+clean-local: clean-noinst_DSYMS
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/none/tests/ppc32
svn://svn.valgrind.org/valgrind
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-11401
+2010-10-11T07:04:07.335838Z
+11425
bart
has-props
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-f5db4277f17a2054a9c7858f95940d89
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+2010-10-11T07:04:07.335838Z
+11425
bart
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\f
lsw.vgtest
file
#undef uint32_t
#undef uint64_t
#define uint32_t unsigned int
-#ifndef __powerpc64__
#define uint64_t unsigned long long
-#else
-#define uint64_t unsigned long
-#endif /* __powerpc64__ */
#ifndef __powerpc64__
typedef uint32_t HWord_t;
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# none/tests/ppc32/Makefile. Generated from Makefile.in by configure.
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+
+
+# This file is used for tool tests, and also in perf/Makefile.am.
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
+
+
+pkgdatadir = $(datadir)/valgrind
+pkglibdir = $(libdir)/valgrind
+pkgincludedir = $(includedir)/valgrind
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+install_sh_DATA = $(install_sh) -c -m 644
+install_sh_PROGRAM = $(install_sh) -c
+install_sh_SCRIPT = $(install_sh) -c
+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+build_triplet = arm-unknown-linux-gnueabi
+host_triplet = arm-unknown-linux-gnueabi
+DIST_COMMON = $(dist_noinst_SCRIPTS) $(srcdir)/Makefile.am \
+ $(srcdir)/Makefile.in $(top_srcdir)/Makefile.all.am \
+ $(top_srcdir)/Makefile.tool-tests.am
+check_PROGRAMS = bug129390-ppc32$(EXEEXT) bug139050-ppc32$(EXEEXT) \
+ ldstrev$(EXEEXT) lsw$(EXEEXT) jm-insns$(EXEEXT) \
+ mftocrf$(EXEEXT) mcrfs$(EXEEXT) round$(EXEEXT) \
+ test_fx$(EXEEXT) test_gx$(EXEEXT) testVMX$(EXEEXT) \
+ twi$(EXEEXT) tw$(EXEEXT) xlc_dbl_u32$(EXEEXT) \
+ power5+_round$(EXEEXT) power6_bcmp$(EXEEXT)
+subdir = none/tests/ppc32
+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
+am__aclocal_m4_deps = $(top_srcdir)/configure.in
+am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
+ $(ACLOCAL_M4)
+mkinstalldirs = $(install_sh) -d
+CONFIG_HEADER = $(top_builddir)/config.h
+CONFIG_CLEAN_FILES =
+bug129390_ppc32_SOURCES = bug129390-ppc32.c
+bug129390_ppc32_OBJECTS = bug129390-ppc32.$(OBJEXT)
+bug129390_ppc32_LDADD = $(LDADD)
+bug139050_ppc32_SOURCES = bug139050-ppc32.c
+bug139050_ppc32_OBJECTS = bug139050-ppc32.$(OBJEXT)
+bug139050_ppc32_LDADD = $(LDADD)
+jm_insns_SOURCES = jm-insns.c
+jm_insns_OBJECTS = jm_insns-jm-insns.$(OBJEXT)
+jm_insns_LDADD = $(LDADD)
+jm_insns_LINK = $(CCLD) $(jm_insns_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
+ $(LDFLAGS) -o $@
+ldstrev_SOURCES = ldstrev.c
+ldstrev_OBJECTS = ldstrev.$(OBJEXT)
+ldstrev_LDADD = $(LDADD)
+lsw_SOURCES = lsw.c
+lsw_OBJECTS = lsw.$(OBJEXT)
+lsw_LDADD = $(LDADD)
+mcrfs_SOURCES = mcrfs.c
+mcrfs_OBJECTS = mcrfs.$(OBJEXT)
+mcrfs_LDADD = $(LDADD)
+mftocrf_SOURCES = mftocrf.c
+mftocrf_OBJECTS = mftocrf.$(OBJEXT)
+mftocrf_LDADD = $(LDADD)
+power5__round_SOURCES = power5+_round.c
+power5__round_OBJECTS = power5+_round.$(OBJEXT)
+power5__round_LDADD = $(LDADD)
+power6_bcmp_SOURCES = power6_bcmp.c
+power6_bcmp_OBJECTS = power6_bcmp.$(OBJEXT)
+power6_bcmp_LDADD = $(LDADD)
+round_SOURCES = round.c
+round_OBJECTS = round.$(OBJEXT)
+round_LDADD = $(LDADD)
+testVMX_SOURCES = testVMX.c
+testVMX_OBJECTS = testVMX-testVMX.$(OBJEXT)
+testVMX_LDADD = $(LDADD)
+testVMX_LINK = $(CCLD) $(testVMX_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
+ $(LDFLAGS) -o $@
+test_fx_SOURCES = test_fx.c
+test_fx_OBJECTS = test_fx.$(OBJEXT)
+test_fx_LDADD = $(LDADD)
+test_gx_SOURCES = test_gx.c
+test_gx_OBJECTS = test_gx.$(OBJEXT)
+test_gx_LDADD = $(LDADD)
+tw_SOURCES = tw.c
+tw_OBJECTS = tw.$(OBJEXT)
+tw_LDADD = $(LDADD)
+twi_SOURCES = twi.c
+twi_OBJECTS = twi.$(OBJEXT)
+twi_LDADD = $(LDADD)
+xlc_dbl_u32_SOURCES = xlc_dbl_u32.c
+xlc_dbl_u32_OBJECTS = xlc_dbl_u32.$(OBJEXT)
+xlc_dbl_u32_LDADD = $(LDADD)
+SCRIPTS = $(dist_noinst_SCRIPTS)
+DEFAULT_INCLUDES = -I. -I$(top_builddir)
+depcomp = $(SHELL) $(top_srcdir)/depcomp
+am__depfiles_maybe = depfiles
+COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
+ $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
+CCLD = $(CC)
+LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) -o $@
+SOURCES = bug129390-ppc32.c bug139050-ppc32.c jm-insns.c ldstrev.c \
+ lsw.c mcrfs.c mftocrf.c power5+_round.c power6_bcmp.c round.c \
+ testVMX.c test_fx.c test_gx.c tw.c twi.c xlc_dbl_u32.c
+DIST_SOURCES = bug129390-ppc32.c bug139050-ppc32.c jm-insns.c \
+ ldstrev.c lsw.c mcrfs.c mftocrf.c power5+_round.c \
+ power6_bcmp.c round.c testVMX.c test_fx.c test_gx.c tw.c twi.c \
+ xlc_dbl_u32.c
+ETAGS = etags
+CTAGS = ctags
+DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST)
+ACLOCAL = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run aclocal-1.10
+AMTAR = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run tar
+AR = /scratchbox/compilers/bin/ar
+AUTOCONF = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run autoconf
+AUTOHEADER = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run autoheader
+AUTOMAKE = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run automake-1.10
+AWK = gawk
+BOOST_CFLAGS =
+BOOST_LIBS =
+CC = gcc
+CCAS = gcc
+CCASDEPMODE = depmode=gcc3
+CCASFLAGS = -Wno-long-long
+CCDEPMODE = depmode=gcc3
+CFLAGS = -Wno-long-long -Wno-pointer-sign -fno-stack-protector
+CPP = gcc -E
+CPPFLAGS =
+CXX = g++
+CXXDEPMODE = depmode=gcc3
+CXXFLAGS = -g -O2
+CYGPATH_W = echo
+DEFAULT_SUPP = exp-ptrcheck.supp xfree-3.supp xfree-4.supp glibc-2.X-drd.supp glibc-2.34567-NPTL-helgrind.supp glibc-2.X.supp
+DEFS = -DHAVE_CONFIG_H
+DEPDIR = .deps
+DIFF = diff -u
+ECHO_C =
+ECHO_N = -n
+ECHO_T =
+EGREP = /scratchbox/tools/bin/grep -E
+EXEEXT =
+FLAG_FNO_STACK_PROTECTOR = -fno-stack-protector
+FLAG_M32 =
+FLAG_M64 =
+FLAG_MAIX32 =
+FLAG_MAIX64 =
+FLAG_MMMX =
+FLAG_MSSE =
+FLAG_NO_BUILD_ID = -Wl,--build-id=none
+FLAG_UNLIMITED_INLINE_UNIT_GROWTH = --param inline-unit-growth=900
+FLAG_W_EXTRA = -Wextra
+FLAG_W_NO_EMPTY_BODY = -Wno-empty-body
+FLAG_W_NO_FORMAT_ZERO_LENGTH = -Wno-format-zero-length
+FLAG_W_NO_UNINITIALIZED = -Wno-uninitialized
+GDB = /targets/links/arch_tools/bin/gdb
+GLIBC_VERSION = 2.11
+GREP = /scratchbox/tools/bin/grep
+INSTALL = /scratchbox/tools/bin/install -c
+INSTALL_DATA = ${INSTALL} -m 644
+INSTALL_PROGRAM = ${INSTALL}
+INSTALL_SCRIPT = ${INSTALL}
+INSTALL_STRIP_PROGRAM = $(install_sh) -c -s
+LDFLAGS = -Wl,--hash-style=both
+LIBOBJS =
+LIBS =
+LN_S = ln -s
+LTLIBOBJS =
+MAINT = #
+MAKEINFO = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run makeinfo
+MKDIR_P = /scratchbox/tools/bin/mkdir -p
+MPI_CC = mpicc
+OBJEXT = o
+PACKAGE = valgrind
+PACKAGE_BUGREPORT = valgrind-users@lists.sourceforge.net
+PACKAGE_NAME = Valgrind
+PACKAGE_STRING = Valgrind 3.6.0.SVN
+PACKAGE_TARNAME = valgrind
+PACKAGE_VERSION = 3.6.0.SVN
+PATH_SEPARATOR = :
+PERL = /scratchbox/tools/bin/perl
+PKG_CONFIG = /scratchbox/tools/bin/pkg-config
+PREFERRED_STACK_BOUNDARY =
+QTCORE_CFLAGS =
+QTCORE_LIBS =
+RANLIB = ranlib
+SED = /scratchbox/tools/bin/sed
+SET_MAKE =
+SHELL = /bin/sh
+STRIP =
+VALT_LOAD_ADDRESS_PRI = 0x38000000
+VALT_LOAD_ADDRESS_SEC = 0xUNSET
+VERSION = 3.6.0.SVN
+VGCONF_ARCH_PRI = arm
+VGCONF_ARCH_SEC =
+VGCONF_OS = linux
+VGCONF_PLATFORM_PRI_CAPS = ARM_LINUX
+VGCONF_PLATFORM_SEC_CAPS =
+abs_builddir = /home/ubuntu/valgrind-3.5.0/none/tests/ppc32
+abs_srcdir = /home/ubuntu/valgrind-3.5.0/none/tests/ppc32
+abs_top_builddir = /home/ubuntu/valgrind-3.5.0
+abs_top_srcdir = /home/ubuntu/valgrind-3.5.0
+ac_ct_CC = gcc
+ac_ct_CXX = g++
+am__include = include
+am__leading_dot = .
+am__quote =
+am__tar = ${AMTAR} chof - "$$tardir"
+am__untar = ${AMTAR} xf -
+bindir = ${exec_prefix}/bin
+build = arm-unknown-linux-gnueabi
+build_alias =
+build_cpu = arm
+build_os = linux-gnueabi
+build_vendor = unknown
+builddir = .
+datadir = ${datarootdir}
+datarootdir = ${prefix}/share
+docdir = ${datarootdir}/doc/${PACKAGE_TARNAME}
+dvidir = ${docdir}
+exec_prefix = ${prefix}
+host = arm-unknown-linux-gnueabi
+host_alias =
+host_cpu = arm
+host_os = linux-gnueabi
+host_vendor = unknown
+htmldir = ${docdir}
+includedir = ${prefix}/include
+infodir = ${datarootdir}/info
+install_sh = $(SHELL) /home/ubuntu/valgrind-3.5.0/install-sh
+libdir = ${exec_prefix}/lib
+libexecdir = ${exec_prefix}/libexec
+localedir = ${datarootdir}/locale
+localstatedir = ${prefix}/var
+mandir = ${datarootdir}/man
+mkdir_p = /scratchbox/tools/bin/mkdir -p
+oldincludedir = /usr/include
+pdfdir = ${docdir}
+prefix = /usr
+program_transform_name = s,x,x,
+psdir = ${docdir}
+sbindir = ${exec_prefix}/sbin
+sharedstatedir = ${prefix}/com
+srcdir = .
+sysconfdir = ${prefix}/etc
+target_alias =
+top_builddir = ../../..
+top_srcdir = ../../..
+inplacedir = $(top_builddir)/.in_place
+
+#----------------------------------------------------------------------------
+# Flags
+#----------------------------------------------------------------------------
+
+# Baseline flags for all compilations. Aim here is to maximise
+# performance and get whatever useful warnings we can out of gcc.
+AM_CFLAGS_BASE = \
+ -O2 -g \
+ -Wall \
+ -Wmissing-prototypes \
+ -Wshadow \
+ -Wpointer-arith \
+ -Wstrict-prototypes \
+ -Wmissing-declarations \
+ -Wno-format-zero-length \
+ -fno-strict-aliasing
+
+AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+#AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+# -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
+# and so the CPPFLAGS are passed to the assembler. But this is not true for
+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
+# AM_CPPFLAGS_<PLATFORM> in each AM_CCASFLAGS_<PLATFORM> variable. This
+# means some of the flags are duplicated on systems with newer versions of
+# automake, but this does not really matter and seems hard to avoid.
+AM_CPPFLAGS_ARM_LINUX = \
+ -I$(top_srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_arm=1 \
+ -DVGO_linux=1 \
+ -DVGP_arm_linux=1
+
+#AM_CPPFLAGS_ = \
+# -I$(top_srcdir) \
+# -I$(top_srcdir)/include \
+# -I$(top_srcdir)/VEX/pub \
+# -DVGA_=1 \
+# -DVGO_linux=1 \
+# -DVGP__linux=1
+
+AM_FLAG_M3264_X86_LINUX =
+AM_CFLAGS_X86_LINUX = \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) -g
+AM_FLAG_M3264_AMD64_LINUX =
+AM_CFLAGS_AMD64_LINUX = -fomit-frame-pointer \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) -g
+AM_FLAG_M3264_PPC32_LINUX =
+AM_CFLAGS_PPC32_LINUX = $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_LINUX = $(AM_CPPFLAGS_PPC32_LINUX) -g
+AM_FLAG_M3264_PPC64_LINUX =
+AM_CFLAGS_PPC64_LINUX = $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_LINUX = $(AM_CPPFLAGS_PPC64_LINUX) -g
+AM_FLAG_M3264_ARM_LINUX =
+AM_CFLAGS_ARM_LINUX = \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) -g
+AM_FLAG_M3264_PPC32_AIX5 =
+AM_CFLAGS_PPC32_AIX5 = -mcpu=powerpc $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
+ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 =
+AM_CFLAGS_PPC64_AIX5 = -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 \
+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_ARM_LINUX)
+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_ARM_LINUX)
+AM_CFLAGS_PRI = $(AM_CFLAGS_ARM_LINUX)
+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_ARM_LINUX)
+AM_FLAG_M3264_SEC =
+#AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
+# as $(AM_FLAG_M3264_PRI).
+AM_CFLAGS = -Winline -Wall -Wshadow -g
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS)
+#noinst_DSYMS = $(check_PROGRAMS)
+dist_noinst_SCRIPTS = filter_stderr
+EXTRA_DIST = \
+ bug129390-ppc32.stdout.exp bug129390-ppc32.stderr.exp \
+ bug129390-ppc32.vgtest \
+ bug139050-ppc32.stdout.exp bug139050-ppc32.stderr.exp \
+ bug139050-ppc32.vgtest \
+ ldstrev.stderr.exp ldstrev.stdout.exp ldstrev.vgtest \
+ lsw.stderr.exp lsw.stdout.exp lsw.vgtest \
+ jm-int.stderr.exp jm-int.stdout.exp jm-int.vgtest \
+ jm-fp.stderr.exp jm-fp.stdout.exp jm-fp.vgtest \
+ jm-vmx.stderr.exp jm-vmx.stdout.exp jm-vmx.vgtest \
+ mftocrf.stderr.exp mftocrf.stdout.exp mftocrf.vgtest \
+ mcrfs.stderr.exp mcrfs.stdout.exp mcrfs.vgtest \
+ round.stderr.exp round.stdout.exp round.vgtest \
+ test_fx.stderr.exp test_fx.stdout.exp test_fx.vgtest \
+ test_gx.stderr.exp test_gx.stdout.exp test_gx.vgtest \
+ testVMX.stderr.exp testVMX.stdout.exp testVMX.vgtest \
+ twi.stderr.exp twi.stdout.exp twi.vgtest \
+ tw.stderr.exp tw.stdout.exp tw.vgtest \
+ xlc_dbl_u32.stderr.exp xlc_dbl_u32.stdout.exp xlc_dbl_u32.vgtest \
+ power5+_round.stderr.exp power5+_round.stdout.exp power5+_round.vgtest \
+ power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest
+
+ALTIVEC_FLAG =
+#ALTIVEC_FLAG = -DHAS_ALTIVEC
+jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames -maltivec \
+ $(ALTIVEC_FLAG)
+
+testVMX_CFLAGS = $(AM_CFLAGS) -O -g -Wall -maltivec -mabi=altivec -DALTIVEC \
+ -DGCC_COMPILER
+
+all: all-am
+
+.SUFFIXES:
+.SUFFIXES: .c .o .obj
+$(srcdir)/Makefile.in: # $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/ppc32/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/ppc32/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: # $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): # $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
+ -test -z "$(check_PROGRAMS)" || rm -f $(check_PROGRAMS)
+bug129390-ppc32$(EXEEXT): $(bug129390_ppc32_OBJECTS) $(bug129390_ppc32_DEPENDENCIES)
+ @rm -f bug129390-ppc32$(EXEEXT)
+ $(LINK) $(bug129390_ppc32_OBJECTS) $(bug129390_ppc32_LDADD) $(LIBS)
+bug139050-ppc32$(EXEEXT): $(bug139050_ppc32_OBJECTS) $(bug139050_ppc32_DEPENDENCIES)
+ @rm -f bug139050-ppc32$(EXEEXT)
+ $(LINK) $(bug139050_ppc32_OBJECTS) $(bug139050_ppc32_LDADD) $(LIBS)
+jm-insns$(EXEEXT): $(jm_insns_OBJECTS) $(jm_insns_DEPENDENCIES)
+ @rm -f jm-insns$(EXEEXT)
+ $(jm_insns_LINK) $(jm_insns_OBJECTS) $(jm_insns_LDADD) $(LIBS)
+ldstrev$(EXEEXT): $(ldstrev_OBJECTS) $(ldstrev_DEPENDENCIES)
+ @rm -f ldstrev$(EXEEXT)
+ $(LINK) $(ldstrev_OBJECTS) $(ldstrev_LDADD) $(LIBS)
+lsw$(EXEEXT): $(lsw_OBJECTS) $(lsw_DEPENDENCIES)
+ @rm -f lsw$(EXEEXT)
+ $(LINK) $(lsw_OBJECTS) $(lsw_LDADD) $(LIBS)
+mcrfs$(EXEEXT): $(mcrfs_OBJECTS) $(mcrfs_DEPENDENCIES)
+ @rm -f mcrfs$(EXEEXT)
+ $(LINK) $(mcrfs_OBJECTS) $(mcrfs_LDADD) $(LIBS)
+mftocrf$(EXEEXT): $(mftocrf_OBJECTS) $(mftocrf_DEPENDENCIES)
+ @rm -f mftocrf$(EXEEXT)
+ $(LINK) $(mftocrf_OBJECTS) $(mftocrf_LDADD) $(LIBS)
+power5+_round$(EXEEXT): $(power5__round_OBJECTS) $(power5__round_DEPENDENCIES)
+ @rm -f power5+_round$(EXEEXT)
+ $(LINK) $(power5__round_OBJECTS) $(power5__round_LDADD) $(LIBS)
+power6_bcmp$(EXEEXT): $(power6_bcmp_OBJECTS) $(power6_bcmp_DEPENDENCIES)
+ @rm -f power6_bcmp$(EXEEXT)
+ $(LINK) $(power6_bcmp_OBJECTS) $(power6_bcmp_LDADD) $(LIBS)
+round$(EXEEXT): $(round_OBJECTS) $(round_DEPENDENCIES)
+ @rm -f round$(EXEEXT)
+ $(LINK) $(round_OBJECTS) $(round_LDADD) $(LIBS)
+testVMX$(EXEEXT): $(testVMX_OBJECTS) $(testVMX_DEPENDENCIES)
+ @rm -f testVMX$(EXEEXT)
+ $(testVMX_LINK) $(testVMX_OBJECTS) $(testVMX_LDADD) $(LIBS)
+test_fx$(EXEEXT): $(test_fx_OBJECTS) $(test_fx_DEPENDENCIES)
+ @rm -f test_fx$(EXEEXT)
+ $(LINK) $(test_fx_OBJECTS) $(test_fx_LDADD) $(LIBS)
+test_gx$(EXEEXT): $(test_gx_OBJECTS) $(test_gx_DEPENDENCIES)
+ @rm -f test_gx$(EXEEXT)
+ $(LINK) $(test_gx_OBJECTS) $(test_gx_LDADD) $(LIBS)
+tw$(EXEEXT): $(tw_OBJECTS) $(tw_DEPENDENCIES)
+ @rm -f tw$(EXEEXT)
+ $(LINK) $(tw_OBJECTS) $(tw_LDADD) $(LIBS)
+twi$(EXEEXT): $(twi_OBJECTS) $(twi_DEPENDENCIES)
+ @rm -f twi$(EXEEXT)
+ $(LINK) $(twi_OBJECTS) $(twi_LDADD) $(LIBS)
+xlc_dbl_u32$(EXEEXT): $(xlc_dbl_u32_OBJECTS) $(xlc_dbl_u32_DEPENDENCIES)
+ @rm -f xlc_dbl_u32$(EXEEXT)
+ $(LINK) $(xlc_dbl_u32_OBJECTS) $(xlc_dbl_u32_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+include ./$(DEPDIR)/bug129390-ppc32.Po
+include ./$(DEPDIR)/bug139050-ppc32.Po
+include ./$(DEPDIR)/jm_insns-jm-insns.Po
+include ./$(DEPDIR)/ldstrev.Po
+include ./$(DEPDIR)/lsw.Po
+include ./$(DEPDIR)/mcrfs.Po
+include ./$(DEPDIR)/mftocrf.Po
+include ./$(DEPDIR)/power5+_round.Po
+include ./$(DEPDIR)/power6_bcmp.Po
+include ./$(DEPDIR)/round.Po
+include ./$(DEPDIR)/testVMX-testVMX.Po
+include ./$(DEPDIR)/test_fx.Po
+include ./$(DEPDIR)/test_gx.Po
+include ./$(DEPDIR)/tw.Po
+include ./$(DEPDIR)/twi.Po
+include ./$(DEPDIR)/xlc_dbl_u32.Po
+
+.c.o:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c $<
+
+.c.obj:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
+jm_insns-jm-insns.o: jm-insns.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(jm_insns_CFLAGS) $(CFLAGS) -MT jm_insns-jm-insns.o -MD -MP -MF $(DEPDIR)/jm_insns-jm-insns.Tpo -c -o jm_insns-jm-insns.o `test -f 'jm-insns.c' || echo '$(srcdir)/'`jm-insns.c
+ mv -f $(DEPDIR)/jm_insns-jm-insns.Tpo $(DEPDIR)/jm_insns-jm-insns.Po
+# source='jm-insns.c' object='jm_insns-jm-insns.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(jm_insns_CFLAGS) $(CFLAGS) -c -o jm_insns-jm-insns.o `test -f 'jm-insns.c' || echo '$(srcdir)/'`jm-insns.c
+
+jm_insns-jm-insns.obj: jm-insns.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(jm_insns_CFLAGS) $(CFLAGS) -MT jm_insns-jm-insns.obj -MD -MP -MF $(DEPDIR)/jm_insns-jm-insns.Tpo -c -o jm_insns-jm-insns.obj `if test -f 'jm-insns.c'; then $(CYGPATH_W) 'jm-insns.c'; else $(CYGPATH_W) '$(srcdir)/jm-insns.c'; fi`
+ mv -f $(DEPDIR)/jm_insns-jm-insns.Tpo $(DEPDIR)/jm_insns-jm-insns.Po
+# source='jm-insns.c' object='jm_insns-jm-insns.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(jm_insns_CFLAGS) $(CFLAGS) -c -o jm_insns-jm-insns.obj `if test -f 'jm-insns.c'; then $(CYGPATH_W) 'jm-insns.c'; else $(CYGPATH_W) '$(srcdir)/jm-insns.c'; fi`
+
+testVMX-testVMX.o: testVMX.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(testVMX_CFLAGS) $(CFLAGS) -MT testVMX-testVMX.o -MD -MP -MF $(DEPDIR)/testVMX-testVMX.Tpo -c -o testVMX-testVMX.o `test -f 'testVMX.c' || echo '$(srcdir)/'`testVMX.c
+ mv -f $(DEPDIR)/testVMX-testVMX.Tpo $(DEPDIR)/testVMX-testVMX.Po
+# source='testVMX.c' object='testVMX-testVMX.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(testVMX_CFLAGS) $(CFLAGS) -c -o testVMX-testVMX.o `test -f 'testVMX.c' || echo '$(srcdir)/'`testVMX.c
+
+testVMX-testVMX.obj: testVMX.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(testVMX_CFLAGS) $(CFLAGS) -MT testVMX-testVMX.obj -MD -MP -MF $(DEPDIR)/testVMX-testVMX.Tpo -c -o testVMX-testVMX.obj `if test -f 'testVMX.c'; then $(CYGPATH_W) 'testVMX.c'; else $(CYGPATH_W) '$(srcdir)/testVMX.c'; fi`
+ mv -f $(DEPDIR)/testVMX-testVMX.Tpo $(DEPDIR)/testVMX-testVMX.Po
+# source='testVMX.c' object='testVMX-testVMX.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(testVMX_CFLAGS) $(CFLAGS) -c -o testVMX-testVMX.obj `if test -f 'testVMX.c'; then $(CYGPATH_W) 'testVMX.c'; else $(CYGPATH_W) '$(srcdir)/testVMX.c'; fi`
+
+ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES)
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ mkid -fID $$unique
+tags: TAGS
+
+TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ here=`pwd`; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ if test -z "$(ETAGS_ARGS)$$tags$$unique"; then :; else \
+ test -n "$$unique" || unique=$$empty_fix; \
+ $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
+ $$tags $$unique; \
+ fi
+ctags: CTAGS
+CTAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ test -z "$(CTAGS_ARGS)$$tags$$unique" \
+ || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
+ $$tags $$unique
+
+GTAGS:
+ here=`$(am__cd) $(top_builddir) && pwd` \
+ && cd $(top_srcdir) \
+ && gtags -i $(GTAGS_ARGS) $$here
+
+distclean-tags:
+ -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
+
+distdir: $(DISTFILES)
+ @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ list='$(DISTFILES)'; \
+ dist_files=`for file in $$list; do echo $$file; done | \
+ sed -e "s|^$$srcdirstrip/||;t" \
+ -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \
+ case $$dist_files in \
+ */*) $(MKDIR_P) `echo "$$dist_files" | \
+ sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \
+ sort -u` ;; \
+ esac; \
+ for file in $$dist_files; do \
+ if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \
+ if test -d $$d/$$file; then \
+ dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \
+ if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \
+ cp -pR $(srcdir)/$$file $(distdir)$$dir || exit 1; \
+ fi; \
+ cp -pR $$d/$$file $(distdir)$$dir || exit 1; \
+ else \
+ test -f $(distdir)/$$file \
+ || cp -p $$d/$$file $(distdir)/$$file \
+ || exit 1; \
+ fi; \
+ done
+check-am: all-am
+ $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
+ $(MAKE) $(AM_MAKEFLAGS) check-local
+check: check-am
+all-am: Makefile $(SCRIPTS)
+installdirs:
+install: install-am
+install-exec: install-exec-am
+install-data: install-data-am
+uninstall: uninstall-am
+
+install-am: all-am
+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+
+installcheck: installcheck-am
+install-strip:
+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+ `test -z '$(STRIP)' || \
+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
+ @echo "This command is intended for maintainers to use"
+ @echo "it deletes files that may require special tools to rebuild."
+clean: clean-am
+
+clean-am: clean-checkPROGRAMS clean-generic clean-local mostlyclean-am
+
+distclean: distclean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+distclean-am: clean-am distclean-compile distclean-generic \
+ distclean-tags
+
+dvi: dvi-am
+
+dvi-am:
+
+html: html-am
+
+info: info-am
+
+info-am:
+
+install-data-am:
+
+install-dvi: install-dvi-am
+
+install-exec-am:
+
+install-html: install-html-am
+
+install-info: install-info-am
+
+install-man:
+
+install-pdf: install-pdf-am
+
+install-ps: install-ps-am
+
+installcheck-am:
+
+maintainer-clean: maintainer-clean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
+
+mostlyclean: mostlyclean-am
+
+mostlyclean-am: mostlyclean-compile mostlyclean-generic
+
+pdf: pdf-am
+
+pdf-am:
+
+ps: ps-am
+
+ps-am:
+
+uninstall-am:
+
+.MAKE: install-am install-strip
+
+.PHONY: CTAGS GTAGS all all-am check check-am check-local clean \
+ clean-checkPROGRAMS clean-generic clean-local ctags distclean \
+ distclean-compile distclean-generic distclean-tags distdir dvi \
+ dvi-am html html-am info info-am install install-am \
+ install-data install-data-am install-dvi install-dvi-am \
+ install-exec install-exec-am install-html install-html-am \
+ install-info install-info-am install-man install-pdf \
+ install-pdf-am install-ps install-ps-am install-strip \
+ installcheck installcheck-am installdirs maintainer-clean \
+ maintainer-clean-generic mostlyclean mostlyclean-compile \
+ mostlyclean-generic pdf pdf-am ps ps-am tags uninstall \
+ uninstall-am
+
+
+# This used to be required when Vex had a handwritten Makefile. It
+# shouldn't be needed any more, though.
+
+#----------------------------------------------------------------------------
+# noinst_PROGRAMS and noinst_DSYMS targets
+#----------------------------------------------------------------------------
+
+# On Darwin, for a program 'p', the DWARF debug info is stored in the
+# directory 'p.dSYM'. This must be generated after the executable is
+# created, with 'dsymutil p'. We could redefine LINK with a script that
+# executes 'dsymutil' after linking, but that's a pain. Instead we use this
+# hook so that every time "make check" is run, we subsequently invoke
+# 'dsymutil' on all the executables that lack a .dSYM directory, or that are
+# newer than their corresponding .dSYM directory.
+build-noinst_DSYMS: $(noinst_DSYMS)
+ for f in $(noinst_DSYMS); do \
+ if [ ! -e $$f.dSYM -o $$f -nt $$f.dSYM ] ; then \
+ echo "dsymutil $$f"; \
+ dsymutil $$f; \
+ fi; \
+ done
+
+# This is used by coregrind/Makefile.am and Makefile.tool.am for doing
+# "in-place" installs. It copies $(noinst_PROGRAMS) into $inplacedir.
+# It needs to be depended on by an 'all-local' rule.
+inplace-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_PROGRAMS) ; do \
+ rm -f $(inplacedir)/$$f; \
+ ln -f -s ../$(subdir)/$$f $(inplacedir); \
+ done
+
+# Similar to inplace-noinst_PROGRAMS
+inplace-noinst_DSYMS: build-noinst_DSYMS
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_DSYMS); do \
+ rm -f $(inplacedir)/$$f.dSYM; \
+ ln -f -s ../$(subdir)/$$f.dSYM $(inplacedir); \
+ done
+
+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
+# "make install". It copies $(noinst_PROGRAMS) into $prefix/lib/valgrind/.
+# It needs to be depended on by an 'install-exec-local' rule.
+install-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_PROGRAMS); do \
+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
+ done
+
+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
+# directories. XXX: not sure whether the resulting permissions will be
+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_DSYMS); do \
+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
+ done
+
+# This needs to be depended on by a 'clean-local' rule.
+clean-noinst_DSYMS:
+ for f in $(noinst_DSYMS); do \
+ rm -rf $$f.dSYM; \
+ done
+
+check-local: build-noinst_DSYMS
+
+clean-local: clean-noinst_DSYMS
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
+
+# This file is used for tool tests, and also in perf/Makefile.am.
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
+
+VPATH = @srcdir@
+pkgdatadir = $(datadir)/@PACKAGE@
+pkglibdir = $(libdir)/@PACKAGE@
+pkgincludedir = $(includedir)/@PACKAGE@
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+install_sh_DATA = $(install_sh) -c -m 644
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+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
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+DIST_COMMON = $(dist_noinst_SCRIPTS) $(srcdir)/Makefile.am \
+ $(srcdir)/Makefile.in $(top_srcdir)/Makefile.all.am \
+ $(top_srcdir)/Makefile.tool-tests.am
+check_PROGRAMS = bug129390-ppc32$(EXEEXT) bug139050-ppc32$(EXEEXT) \
+ ldstrev$(EXEEXT) lsw$(EXEEXT) jm-insns$(EXEEXT) \
+ mftocrf$(EXEEXT) mcrfs$(EXEEXT) round$(EXEEXT) \
+ test_fx$(EXEEXT) test_gx$(EXEEXT) testVMX$(EXEEXT) \
+ twi$(EXEEXT) tw$(EXEEXT) xlc_dbl_u32$(EXEEXT) \
+ power5+_round$(EXEEXT) power6_bcmp$(EXEEXT)
+subdir = none/tests/ppc32
+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
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+am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
+ $(ACLOCAL_M4)
+mkinstalldirs = $(install_sh) -d
+CONFIG_HEADER = $(top_builddir)/config.h
+CONFIG_CLEAN_FILES =
+bug129390_ppc32_SOURCES = bug129390-ppc32.c
+bug129390_ppc32_OBJECTS = bug129390-ppc32.$(OBJEXT)
+bug129390_ppc32_LDADD = $(LDADD)
+bug139050_ppc32_SOURCES = bug139050-ppc32.c
+bug139050_ppc32_OBJECTS = bug139050-ppc32.$(OBJEXT)
+bug139050_ppc32_LDADD = $(LDADD)
+jm_insns_SOURCES = jm-insns.c
+jm_insns_OBJECTS = jm_insns-jm-insns.$(OBJEXT)
+jm_insns_LDADD = $(LDADD)
+jm_insns_LINK = $(CCLD) $(jm_insns_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
+ $(LDFLAGS) -o $@
+ldstrev_SOURCES = ldstrev.c
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+lsw_LDADD = $(LDADD)
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+mcrfs_LDADD = $(LDADD)
+mftocrf_SOURCES = mftocrf.c
+mftocrf_OBJECTS = mftocrf.$(OBJEXT)
+mftocrf_LDADD = $(LDADD)
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+power5__round_OBJECTS = power5+_round.$(OBJEXT)
+power5__round_LDADD = $(LDADD)
+power6_bcmp_SOURCES = power6_bcmp.c
+power6_bcmp_OBJECTS = power6_bcmp.$(OBJEXT)
+power6_bcmp_LDADD = $(LDADD)
+round_SOURCES = round.c
+round_OBJECTS = round.$(OBJEXT)
+round_LDADD = $(LDADD)
+testVMX_SOURCES = testVMX.c
+testVMX_OBJECTS = testVMX-testVMX.$(OBJEXT)
+testVMX_LDADD = $(LDADD)
+testVMX_LINK = $(CCLD) $(testVMX_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
+ $(LDFLAGS) -o $@
+test_fx_SOURCES = test_fx.c
+test_fx_OBJECTS = test_fx.$(OBJEXT)
+test_fx_LDADD = $(LDADD)
+test_gx_SOURCES = test_gx.c
+test_gx_OBJECTS = test_gx.$(OBJEXT)
+test_gx_LDADD = $(LDADD)
+tw_SOURCES = tw.c
+tw_OBJECTS = tw.$(OBJEXT)
+tw_LDADD = $(LDADD)
+twi_SOURCES = twi.c
+twi_OBJECTS = twi.$(OBJEXT)
+twi_LDADD = $(LDADD)
+xlc_dbl_u32_SOURCES = xlc_dbl_u32.c
+xlc_dbl_u32_OBJECTS = xlc_dbl_u32.$(OBJEXT)
+xlc_dbl_u32_LDADD = $(LDADD)
+SCRIPTS = $(dist_noinst_SCRIPTS)
+DEFAULT_INCLUDES = -I.@am__isrc@ -I$(top_builddir)
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+am__depfiles_maybe = depfiles
+COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
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+LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) -o $@
+SOURCES = bug129390-ppc32.c bug139050-ppc32.c jm-insns.c ldstrev.c \
+ lsw.c mcrfs.c mftocrf.c power5+_round.c power6_bcmp.c round.c \
+ testVMX.c test_fx.c test_gx.c tw.c twi.c xlc_dbl_u32.c
+DIST_SOURCES = bug129390-ppc32.c bug139050-ppc32.c jm-insns.c \
+ ldstrev.c lsw.c mcrfs.c mftocrf.c power5+_round.c \
+ power6_bcmp.c round.c testVMX.c test_fx.c test_gx.c tw.c twi.c \
+ xlc_dbl_u32.c
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+pdfdir = @pdfdir@
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+program_transform_name = @program_transform_name@
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+sharedstatedir = @sharedstatedir@
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+target_alias = @target_alias@
+top_builddir = @top_builddir@
+top_srcdir = @top_srcdir@
+inplacedir = $(top_builddir)/.in_place
+
+#----------------------------------------------------------------------------
+# Flags
+#----------------------------------------------------------------------------
+
+# Baseline flags for all compilations. Aim here is to maximise
+# performance and get whatever useful warnings we can out of gcc.
+AM_CFLAGS_BASE = \
+ -O2 -g \
+ -Wall \
+ -Wmissing-prototypes \
+ -Wshadow \
+ -Wpointer-arith \
+ -Wstrict-prototypes \
+ -Wmissing-declarations \
+ @FLAG_W_NO_FORMAT_ZERO_LENGTH@ \
+ -fno-strict-aliasing
+
+@VGCONF_OS_IS_DARWIN_FALSE@AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+@VGCONF_OS_IS_DARWIN_TRUE@AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+@VGCONF_OS_IS_DARWIN_TRUE@ -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
+# and so the CPPFLAGS are passed to the assembler. But this is not true for
+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
+# AM_CPPFLAGS_<PLATFORM> in each AM_CCASFLAGS_<PLATFORM> variable. This
+# means some of the flags are duplicated on systems with newer versions of
+# automake, but this does not really matter and seems hard to avoid.
+AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@ = \
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+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_@VGCONF_ARCH_PRI@=1 \
+ -DVGO_@VGCONF_OS@=1 \
+ -DVGP_@VGCONF_ARCH_PRI@_@VGCONF_OS@=1
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@AM_CPPFLAGS_@VGCONF_PLATFORM_SEC_CAPS@ = \
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+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir)/VEX/pub \
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+
+AM_FLAG_M3264_X86_LINUX = @FLAG_M32@
+AM_CFLAGS_X86_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
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+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) @FLAG_M32@ -g
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+AM_CFLAGS_AMD64_LINUX = @FLAG_M64@ -fomit-frame-pointer \
+ @PREFERRED_STACK_BOUNDARY@ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) @FLAG_M64@ -g
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+AM_CFLAGS_PPC64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE)
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+AM_CFLAGS_ARM_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
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+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) @FLAG_M32@ -g
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+AM_CFLAGS_PPC32_AIX5 = @FLAG_MAIX32@ -mcpu=powerpc $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
+ @FLAG_MAIX32@ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 = @FLAG_MAIX64@
+AM_CFLAGS_PPC64_AIX5 = @FLAG_MAIX64@ -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ @FLAG_MAIX64@ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
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+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
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+# build anything which is built only once on a dual-arch build.
+#
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+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX32@
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX64@
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
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+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
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+AM_CFLAGS = -Winline -Wall -Wshadow -g @FLAG_M32@
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g @FLAG_M32@
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS) @FLAG_M32@
+@VGCONF_OS_IS_DARWIN_TRUE@noinst_DSYMS = $(check_PROGRAMS)
+dist_noinst_SCRIPTS = filter_stderr
+EXTRA_DIST = \
+ bug129390-ppc32.stdout.exp bug129390-ppc32.stderr.exp \
+ bug129390-ppc32.vgtest \
+ bug139050-ppc32.stdout.exp bug139050-ppc32.stderr.exp \
+ bug139050-ppc32.vgtest \
+ ldstrev.stderr.exp ldstrev.stdout.exp ldstrev.vgtest \
+ lsw.stderr.exp lsw.stdout.exp lsw.vgtest \
+ jm-int.stderr.exp jm-int.stdout.exp jm-int.vgtest \
+ jm-fp.stderr.exp jm-fp.stdout.exp jm-fp.vgtest \
+ jm-vmx.stderr.exp jm-vmx.stdout.exp jm-vmx.vgtest \
+ mftocrf.stderr.exp mftocrf.stdout.exp mftocrf.vgtest \
+ mcrfs.stderr.exp mcrfs.stdout.exp mcrfs.vgtest \
+ round.stderr.exp round.stdout.exp round.vgtest \
+ test_fx.stderr.exp test_fx.stdout.exp test_fx.vgtest \
+ test_gx.stderr.exp test_gx.stdout.exp test_gx.vgtest \
+ testVMX.stderr.exp testVMX.stdout.exp testVMX.vgtest \
+ twi.stderr.exp twi.stdout.exp twi.vgtest \
+ tw.stderr.exp tw.stdout.exp tw.vgtest \
+ xlc_dbl_u32.stderr.exp xlc_dbl_u32.stdout.exp xlc_dbl_u32.vgtest \
+ power5+_round.stderr.exp power5+_round.stdout.exp power5+_round.vgtest \
+ power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest
+
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+
+all: all-am
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+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/ppc32/Makefile
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+bug139050-ppc32$(EXEEXT): $(bug139050_ppc32_OBJECTS) $(bug139050_ppc32_DEPENDENCIES)
+ @rm -f bug139050-ppc32$(EXEEXT)
+ $(LINK) $(bug139050_ppc32_OBJECTS) $(bug139050_ppc32_LDADD) $(LIBS)
+jm-insns$(EXEEXT): $(jm_insns_OBJECTS) $(jm_insns_DEPENDENCIES)
+ @rm -f jm-insns$(EXEEXT)
+ $(jm_insns_LINK) $(jm_insns_OBJECTS) $(jm_insns_LDADD) $(LIBS)
+ldstrev$(EXEEXT): $(ldstrev_OBJECTS) $(ldstrev_DEPENDENCIES)
+ @rm -f ldstrev$(EXEEXT)
+ $(LINK) $(ldstrev_OBJECTS) $(ldstrev_LDADD) $(LIBS)
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+ @rm -f lsw$(EXEEXT)
+ $(LINK) $(lsw_OBJECTS) $(lsw_LDADD) $(LIBS)
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+ @rm -f mftocrf$(EXEEXT)
+ $(LINK) $(mftocrf_OBJECTS) $(mftocrf_LDADD) $(LIBS)
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+ $(LINK) $(power5__round_OBJECTS) $(power5__round_LDADD) $(LIBS)
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+ @rm -f power6_bcmp$(EXEEXT)
+ $(LINK) $(power6_bcmp_OBJECTS) $(power6_bcmp_LDADD) $(LIBS)
+round$(EXEEXT): $(round_OBJECTS) $(round_DEPENDENCIES)
+ @rm -f round$(EXEEXT)
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+ @rm -f test_fx$(EXEEXT)
+ $(LINK) $(test_fx_OBJECTS) $(test_fx_LDADD) $(LIBS)
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+ @rm -f test_gx$(EXEEXT)
+ $(LINK) $(test_gx_OBJECTS) $(test_gx_LDADD) $(LIBS)
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+ $(LINK) $(xlc_dbl_u32_OBJECTS) $(xlc_dbl_u32_LDADD) $(LIBS)
+
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+
+distclean-compile:
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+
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+testVMX-testVMX.obj: testVMX.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(testVMX_CFLAGS) $(CFLAGS) -MT testVMX-testVMX.obj -MD -MP -MF $(DEPDIR)/testVMX-testVMX.Tpo -c -o testVMX-testVMX.obj `if test -f 'testVMX.c'; then $(CYGPATH_W) 'testVMX.c'; else $(CYGPATH_W) '$(srcdir)/testVMX.c'; fi`
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+
+ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES)
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+GTAGS:
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+install-am: all-am
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+installcheck: installcheck-am
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+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
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+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
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+#----------------------------------------------------------------------------
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+# executes 'dsymutil' after linking, but that's a pain. Instead we use this
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+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
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+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
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+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
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#undef uint32_t
#undef uint64_t
#define uint32_t unsigned int
-#ifndef __powerpc64__
#define uint64_t unsigned long long
-#else
-#define uint64_t unsigned long
-#endif /* __powerpc64__ */
#ifndef __powerpc64__
typedef uint32_t HWord_t;
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/none/tests/ppc64
svn://svn.valgrind.org/valgrind
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# none/tests/ppc64/Makefile. Generated from Makefile.in by configure.
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+
+
+# This file is used for tool tests, and also in perf/Makefile.am.
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
+
+
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+ std_reg_imm$(EXEEXT) twi_tdi$(EXEEXT) tw_td$(EXEEXT) \
+ power6_bcmp$(EXEEXT) power6_mf_gpr$(EXEEXT)
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+ $(LDFLAGS) -o $@
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+ std_reg_imm.c tw_td.c twi_tdi.c
+DIST_SOURCES = jm-insns.c lsw.c power6_bcmp.c power6_mf_gpr.c round.c \
+ std_reg_imm.c tw_td.c twi_tdi.c
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+builddir = .
+datadir = ${datarootdir}
+datarootdir = ${prefix}/share
+docdir = ${datarootdir}/doc/${PACKAGE_TARNAME}
+dvidir = ${docdir}
+exec_prefix = ${prefix}
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+host_vendor = unknown
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+top_builddir = ../../..
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+AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
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+# These flags are used for building the preload shared objects.
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+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+#AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+# -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
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+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
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+ -I$(top_srcdir)/include \
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+ -DVGO_linux=1 \
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+# -DVGO_linux=1 \
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+AM_FLAG_M3264_X86_LINUX =
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+ $(AM_CFLAGS_BASE)
+
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+AM_CFLAGS_ARM_LINUX = \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) -g
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+ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 =
+AM_CFLAGS_PPC64_AIX5 = -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 \
+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
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+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_ARM_LINUX)
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+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_ARM_LINUX)
+AM_FLAG_M3264_SEC =
+#AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
+# as $(AM_FLAG_M3264_PRI).
+AM_CFLAGS = -Winline -Wall -Wshadow -g
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS)
+#noinst_DSYMS = $(check_PROGRAMS)
+dist_noinst_SCRIPTS = filter_stderr
+EXTRA_DIST = \
+ jm-int.stderr.exp jm-int.stdout.exp jm-int.vgtest \
+ jm-fp.stderr.exp jm-fp.stdout.exp jm-fp.vgtest \
+ jm-vmx.stderr.exp jm-vmx.stdout.exp jm-vmx.vgtest \
+ lsw.stderr.exp lsw.stdout.exp lsw.vgtest \
+ std_reg_imm.vgtest std_reg_imm.stderr.exp std_reg_imm.stdout.exp \
+ round.stderr.exp round.stdout.exp round.vgtest \
+ twi_tdi.stderr.exp twi_tdi.stdout.exp twi_tdi.vgtest \
+ tw_td.stderr.exp tw_td.stdout.exp tw_td.vgtest \
+ power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest \
+ power6_mf_gpr.stderr.exp power6_mf_gpr.stdout.exp power6_mf_gpr.vgtest
+
+ALTIVEC_FLAG =
+#ALTIVEC_FLAG = -DHAS_ALTIVEC
+jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames -maltivec \
+ $(ALTIVEC_FLAG)
+
+all: all-am
+
+.SUFFIXES:
+.SUFFIXES: .c .o .obj
+$(srcdir)/Makefile.in: # $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/ppc64/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/ppc64/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: # $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): # $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
+ -test -z "$(check_PROGRAMS)" || rm -f $(check_PROGRAMS)
+jm-insns$(EXEEXT): $(jm_insns_OBJECTS) $(jm_insns_DEPENDENCIES)
+ @rm -f jm-insns$(EXEEXT)
+ $(jm_insns_LINK) $(jm_insns_OBJECTS) $(jm_insns_LDADD) $(LIBS)
+lsw$(EXEEXT): $(lsw_OBJECTS) $(lsw_DEPENDENCIES)
+ @rm -f lsw$(EXEEXT)
+ $(LINK) $(lsw_OBJECTS) $(lsw_LDADD) $(LIBS)
+power6_bcmp$(EXEEXT): $(power6_bcmp_OBJECTS) $(power6_bcmp_DEPENDENCIES)
+ @rm -f power6_bcmp$(EXEEXT)
+ $(LINK) $(power6_bcmp_OBJECTS) $(power6_bcmp_LDADD) $(LIBS)
+power6_mf_gpr$(EXEEXT): $(power6_mf_gpr_OBJECTS) $(power6_mf_gpr_DEPENDENCIES)
+ @rm -f power6_mf_gpr$(EXEEXT)
+ $(LINK) $(power6_mf_gpr_OBJECTS) $(power6_mf_gpr_LDADD) $(LIBS)
+round$(EXEEXT): $(round_OBJECTS) $(round_DEPENDENCIES)
+ @rm -f round$(EXEEXT)
+ $(LINK) $(round_OBJECTS) $(round_LDADD) $(LIBS)
+std_reg_imm$(EXEEXT): $(std_reg_imm_OBJECTS) $(std_reg_imm_DEPENDENCIES)
+ @rm -f std_reg_imm$(EXEEXT)
+ $(LINK) $(std_reg_imm_OBJECTS) $(std_reg_imm_LDADD) $(LIBS)
+tw_td$(EXEEXT): $(tw_td_OBJECTS) $(tw_td_DEPENDENCIES)
+ @rm -f tw_td$(EXEEXT)
+ $(LINK) $(tw_td_OBJECTS) $(tw_td_LDADD) $(LIBS)
+twi_tdi$(EXEEXT): $(twi_tdi_OBJECTS) $(twi_tdi_DEPENDENCIES)
+ @rm -f twi_tdi$(EXEEXT)
+ $(LINK) $(twi_tdi_OBJECTS) $(twi_tdi_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+include ./$(DEPDIR)/jm_insns-jm-insns.Po
+include ./$(DEPDIR)/lsw.Po
+include ./$(DEPDIR)/power6_bcmp.Po
+include ./$(DEPDIR)/power6_mf_gpr.Po
+include ./$(DEPDIR)/round.Po
+include ./$(DEPDIR)/std_reg_imm.Po
+include ./$(DEPDIR)/tw_td.Po
+include ./$(DEPDIR)/twi_tdi.Po
+
+.c.o:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c $<
+
+.c.obj:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c `$(CYGPATH_W) '$<'`
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+AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@ = \
+ -I$(top_srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_@VGCONF_ARCH_PRI@=1 \
+ -DVGO_@VGCONF_OS@=1 \
+ -DVGP_@VGCONF_ARCH_PRI@_@VGCONF_OS@=1
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@AM_CPPFLAGS_@VGCONF_PLATFORM_SEC_CAPS@ = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir) \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir)/include \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir)/VEX/pub \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGA_@VGCONF_ARCH_SEC@=1 \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGO_@VGCONF_OS@=1 \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGP_@VGCONF_ARCH_SEC@_@VGCONF_OS@=1
+
+AM_FLAG_M3264_X86_LINUX = @FLAG_M32@
+AM_CFLAGS_X86_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_AMD64_LINUX = @FLAG_M64@
+AM_CFLAGS_AMD64_LINUX = @FLAG_M64@ -fomit-frame-pointer \
+ @PREFERRED_STACK_BOUNDARY@ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) @FLAG_M64@ -g
+AM_FLAG_M3264_PPC32_LINUX = @FLAG_M32@
+AM_CFLAGS_PPC32_LINUX = @FLAG_M32@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_LINUX = $(AM_CPPFLAGS_PPC32_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_PPC64_LINUX = @FLAG_M64@
+AM_CFLAGS_PPC64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_LINUX = $(AM_CPPFLAGS_PPC64_LINUX) @FLAG_M64@ -g
+AM_FLAG_M3264_ARM_LINUX = @FLAG_M32@
+AM_CFLAGS_ARM_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_PPC32_AIX5 = @FLAG_MAIX32@
+AM_CFLAGS_PPC32_AIX5 = @FLAG_MAIX32@ -mcpu=powerpc $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
+ @FLAG_MAIX32@ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 = @FLAG_MAIX64@
+AM_CFLAGS_PPC64_AIX5 = @FLAG_MAIX64@ -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ @FLAG_MAIX64@ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 \
+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CFLAGS_PRI = $(AM_CFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+@VGCONF_HAVE_PLATFORM_SEC_FALSE@AM_FLAG_M3264_SEC =
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_@VGCONF_PLATFORM_SEC_CAPS@)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX32@
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX64@
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
+# as $(AM_FLAG_M3264_PRI).
+AM_CFLAGS = -Winline -Wall -Wshadow -g @FLAG_M64@
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g @FLAG_M64@
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS) @FLAG_M64@
+@VGCONF_OS_IS_DARWIN_TRUE@noinst_DSYMS = $(check_PROGRAMS)
+dist_noinst_SCRIPTS = filter_stderr
+EXTRA_DIST = \
+ jm-int.stderr.exp jm-int.stdout.exp jm-int.vgtest \
+ jm-fp.stderr.exp jm-fp.stdout.exp jm-fp.vgtest \
+ jm-vmx.stderr.exp jm-vmx.stdout.exp jm-vmx.vgtest \
+ lsw.stderr.exp lsw.stdout.exp lsw.vgtest \
+ std_reg_imm.vgtest std_reg_imm.stderr.exp std_reg_imm.stdout.exp \
+ round.stderr.exp round.stdout.exp round.vgtest \
+ twi_tdi.stderr.exp twi_tdi.stdout.exp twi_tdi.vgtest \
+ tw_td.stderr.exp tw_td.stdout.exp tw_td.vgtest \
+ power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest \
+ power6_mf_gpr.stderr.exp power6_mf_gpr.stdout.exp power6_mf_gpr.vgtest
+
+@HAS_ALTIVEC_FALSE@ALTIVEC_FLAG =
+@HAS_ALTIVEC_TRUE@ALTIVEC_FLAG = -DHAS_ALTIVEC
+jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames -maltivec \
+ @FLAG_M64@ $(ALTIVEC_FLAG)
+
+all: all-am
+
+.SUFFIXES:
+.SUFFIXES: .c .o .obj
+$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/ppc64/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/ppc64/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
+ -test -z "$(check_PROGRAMS)" || rm -f $(check_PROGRAMS)
+jm-insns$(EXEEXT): $(jm_insns_OBJECTS) $(jm_insns_DEPENDENCIES)
+ @rm -f jm-insns$(EXEEXT)
+ $(jm_insns_LINK) $(jm_insns_OBJECTS) $(jm_insns_LDADD) $(LIBS)
+lsw$(EXEEXT): $(lsw_OBJECTS) $(lsw_DEPENDENCIES)
+ @rm -f lsw$(EXEEXT)
+ $(LINK) $(lsw_OBJECTS) $(lsw_LDADD) $(LIBS)
+power6_bcmp$(EXEEXT): $(power6_bcmp_OBJECTS) $(power6_bcmp_DEPENDENCIES)
+ @rm -f power6_bcmp$(EXEEXT)
+ $(LINK) $(power6_bcmp_OBJECTS) $(power6_bcmp_LDADD) $(LIBS)
+power6_mf_gpr$(EXEEXT): $(power6_mf_gpr_OBJECTS) $(power6_mf_gpr_DEPENDENCIES)
+ @rm -f power6_mf_gpr$(EXEEXT)
+ $(LINK) $(power6_mf_gpr_OBJECTS) $(power6_mf_gpr_LDADD) $(LIBS)
+round$(EXEEXT): $(round_OBJECTS) $(round_DEPENDENCIES)
+ @rm -f round$(EXEEXT)
+ $(LINK) $(round_OBJECTS) $(round_LDADD) $(LIBS)
+std_reg_imm$(EXEEXT): $(std_reg_imm_OBJECTS) $(std_reg_imm_DEPENDENCIES)
+ @rm -f std_reg_imm$(EXEEXT)
+ $(LINK) $(std_reg_imm_OBJECTS) $(std_reg_imm_LDADD) $(LIBS)
+tw_td$(EXEEXT): $(tw_td_OBJECTS) $(tw_td_DEPENDENCIES)
+ @rm -f tw_td$(EXEEXT)
+ $(LINK) $(tw_td_OBJECTS) $(tw_td_LDADD) $(LIBS)
+twi_tdi$(EXEEXT): $(twi_tdi_OBJECTS) $(twi_tdi_DEPENDENCIES)
+ @rm -f twi_tdi$(EXEEXT)
+ $(LINK) $(twi_tdi_OBJECTS) $(twi_tdi_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/jm_insns-jm-insns.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/lsw.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/power6_bcmp.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/power6_mf_gpr.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/round.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/std_reg_imm.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tw_td.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/twi_tdi.Po@am__quote@
+
+.c.o:
+@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(COMPILE) -c $<
+
+.c.obj:
+@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
+jm_insns-jm-insns.o: jm-insns.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(jm_insns_CFLAGS) $(CFLAGS) -MT jm_insns-jm-insns.o -MD -MP -MF $(DEPDIR)/jm_insns-jm-insns.Tpo -c -o jm_insns-jm-insns.o `test -f 'jm-insns.c' || echo '$(srcdir)/'`jm-insns.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/jm_insns-jm-insns.Tpo $(DEPDIR)/jm_insns-jm-insns.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='jm-insns.c' object='jm_insns-jm-insns.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(jm_insns_CFLAGS) $(CFLAGS) -c -o jm_insns-jm-insns.o `test -f 'jm-insns.c' || echo '$(srcdir)/'`jm-insns.c
+
+jm_insns-jm-insns.obj: jm-insns.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(jm_insns_CFLAGS) $(CFLAGS) -MT jm_insns-jm-insns.obj -MD -MP -MF $(DEPDIR)/jm_insns-jm-insns.Tpo -c -o jm_insns-jm-insns.obj `if test -f 'jm-insns.c'; then $(CYGPATH_W) 'jm-insns.c'; else $(CYGPATH_W) '$(srcdir)/jm-insns.c'; fi`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/jm_insns-jm-insns.Tpo $(DEPDIR)/jm_insns-jm-insns.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='jm-insns.c' object='jm_insns-jm-insns.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(jm_insns_CFLAGS) $(CFLAGS) -c -o jm_insns-jm-insns.obj `if test -f 'jm-insns.c'; then $(CYGPATH_W) 'jm-insns.c'; else $(CYGPATH_W) '$(srcdir)/jm-insns.c'; fi`
+
+ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES)
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ mkid -fID $$unique
+tags: TAGS
+
+TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ here=`pwd`; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ if test -z "$(ETAGS_ARGS)$$tags$$unique"; then :; else \
+ test -n "$$unique" || unique=$$empty_fix; \
+ $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
+ $$tags $$unique; \
+ fi
+ctags: CTAGS
+CTAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ test -z "$(CTAGS_ARGS)$$tags$$unique" \
+ || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
+ $$tags $$unique
+
+GTAGS:
+ here=`$(am__cd) $(top_builddir) && pwd` \
+ && cd $(top_srcdir) \
+ && gtags -i $(GTAGS_ARGS) $$here
+
+distclean-tags:
+ -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
+
+distdir: $(DISTFILES)
+ @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ list='$(DISTFILES)'; \
+ dist_files=`for file in $$list; do echo $$file; done | \
+ sed -e "s|^$$srcdirstrip/||;t" \
+ -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \
+ case $$dist_files in \
+ */*) $(MKDIR_P) `echo "$$dist_files" | \
+ sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \
+ sort -u` ;; \
+ esac; \
+ for file in $$dist_files; do \
+ if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \
+ if test -d $$d/$$file; then \
+ dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \
+ if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \
+ cp -pR $(srcdir)/$$file $(distdir)$$dir || exit 1; \
+ fi; \
+ cp -pR $$d/$$file $(distdir)$$dir || exit 1; \
+ else \
+ test -f $(distdir)/$$file \
+ || cp -p $$d/$$file $(distdir)/$$file \
+ || exit 1; \
+ fi; \
+ done
+check-am: all-am
+ $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
+ $(MAKE) $(AM_MAKEFLAGS) check-local
+check: check-am
+all-am: Makefile $(SCRIPTS)
+installdirs:
+install: install-am
+install-exec: install-exec-am
+install-data: install-data-am
+uninstall: uninstall-am
+
+install-am: all-am
+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+
+installcheck: installcheck-am
+install-strip:
+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+ `test -z '$(STRIP)' || \
+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
+ @echo "This command is intended for maintainers to use"
+ @echo "it deletes files that may require special tools to rebuild."
+clean: clean-am
+
+clean-am: clean-checkPROGRAMS clean-generic clean-local mostlyclean-am
+
+distclean: distclean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+distclean-am: clean-am distclean-compile distclean-generic \
+ distclean-tags
+
+dvi: dvi-am
+
+dvi-am:
+
+html: html-am
+
+info: info-am
+
+info-am:
+
+install-data-am:
+
+install-dvi: install-dvi-am
+
+install-exec-am:
+
+install-html: install-html-am
+
+install-info: install-info-am
+
+install-man:
+
+install-pdf: install-pdf-am
+
+install-ps: install-ps-am
+
+installcheck-am:
+
+maintainer-clean: maintainer-clean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
+
+mostlyclean: mostlyclean-am
+
+mostlyclean-am: mostlyclean-compile mostlyclean-generic
+
+pdf: pdf-am
+
+pdf-am:
+
+ps: ps-am
+
+ps-am:
+
+uninstall-am:
+
+.MAKE: install-am install-strip
+
+.PHONY: CTAGS GTAGS all all-am check check-am check-local clean \
+ clean-checkPROGRAMS clean-generic clean-local ctags distclean \
+ distclean-compile distclean-generic distclean-tags distdir dvi \
+ dvi-am html html-am info info-am install install-am \
+ install-data install-data-am install-dvi install-dvi-am \
+ install-exec install-exec-am install-html install-html-am \
+ install-info install-info-am install-man install-pdf \
+ install-pdf-am install-ps install-ps-am install-strip \
+ installcheck installcheck-am installdirs maintainer-clean \
+ maintainer-clean-generic mostlyclean mostlyclean-compile \
+ mostlyclean-generic pdf pdf-am ps ps-am tags uninstall \
+ uninstall-am
+
+
+# This used to be required when Vex had a handwritten Makefile. It
+# shouldn't be needed any more, though.
+
+#----------------------------------------------------------------------------
+# noinst_PROGRAMS and noinst_DSYMS targets
+#----------------------------------------------------------------------------
+
+# On Darwin, for a program 'p', the DWARF debug info is stored in the
+# directory 'p.dSYM'. This must be generated after the executable is
+# created, with 'dsymutil p'. We could redefine LINK with a script that
+# executes 'dsymutil' after linking, but that's a pain. Instead we use this
+# hook so that every time "make check" is run, we subsequently invoke
+# 'dsymutil' on all the executables that lack a .dSYM directory, or that are
+# newer than their corresponding .dSYM directory.
+build-noinst_DSYMS: $(noinst_DSYMS)
+ for f in $(noinst_DSYMS); do \
+ if [ ! -e $$f.dSYM -o $$f -nt $$f.dSYM ] ; then \
+ echo "dsymutil $$f"; \
+ dsymutil $$f; \
+ fi; \
+ done
+
+# This is used by coregrind/Makefile.am and Makefile.tool.am for doing
+# "in-place" installs. It copies $(noinst_PROGRAMS) into $inplacedir.
+# It needs to be depended on by an 'all-local' rule.
+inplace-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_PROGRAMS) ; do \
+ rm -f $(inplacedir)/$$f; \
+ ln -f -s ../$(subdir)/$$f $(inplacedir); \
+ done
+
+# Similar to inplace-noinst_PROGRAMS
+inplace-noinst_DSYMS: build-noinst_DSYMS
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_DSYMS); do \
+ rm -f $(inplacedir)/$$f.dSYM; \
+ ln -f -s ../$(subdir)/$$f.dSYM $(inplacedir); \
+ done
+
+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
+# "make install". It copies $(noinst_PROGRAMS) into $prefix/lib/valgrind/.
+# It needs to be depended on by an 'install-exec-local' rule.
+install-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_PROGRAMS); do \
+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
+ done
+
+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
+# directories. XXX: not sure whether the resulting permissions will be
+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_DSYMS); do \
+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
+ done
+
+# This needs to be depended on by a 'clean-local' rule.
+clean-noinst_DSYMS:
+ for f in $(noinst_DSYMS); do \
+ rm -rf $$f.dSYM; \
+ done
+
+check-local: build-noinst_DSYMS
+
+clean-local: clean-noinst_DSYMS
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/none/tests/x86-linux
svn://svn.valgrind.org/valgrind
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# none/tests/x86-linux/Makefile. Generated from Makefile.in by configure.
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+
+
+# This file is used for tool tests, and also in perf/Makefile.am.
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
+
+
+pkgdatadir = $(datadir)/valgrind
+pkglibdir = $(libdir)/valgrind
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+install_sh_DATA = $(install_sh) -c -m 644
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+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
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+POST_UNINSTALL = :
+build_triplet = arm-unknown-linux-gnueabi
+host_triplet = arm-unknown-linux-gnueabi
+DIST_COMMON = $(dist_noinst_SCRIPTS) $(srcdir)/Makefile.am \
+ $(srcdir)/Makefile.in $(top_srcdir)/Makefile.all.am \
+ $(top_srcdir)/Makefile.tool-tests.am
+check_PROGRAMS = seg_override$(EXEEXT) sigcontext$(EXEEXT)
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+CONFIG_CLEAN_FILES =
+seg_override_SOURCES = seg_override.c
+seg_override_OBJECTS = seg_override.$(OBJEXT)
+seg_override_LDADD = $(LDADD)
+sigcontext_SOURCES = sigcontext.c
+sigcontext_OBJECTS = sigcontext.$(OBJEXT)
+sigcontext_LDADD = $(LDADD)
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+DEFAULT_INCLUDES = -I. -I$(top_builddir)
+depcomp = $(SHELL) $(top_srcdir)/depcomp
+am__depfiles_maybe = depfiles
+COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
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+AMTAR = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run tar
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+DEPDIR = .deps
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+FLAG_MMMX =
+FLAG_MSSE =
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+FLAG_W_NO_EMPTY_BODY = -Wno-empty-body
+FLAG_W_NO_FORMAT_ZERO_LENGTH = -Wno-format-zero-length
+FLAG_W_NO_UNINITIALIZED = -Wno-uninitialized
+GDB = /targets/links/arch_tools/bin/gdb
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+INSTALL_DATA = ${INSTALL} -m 644
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+INSTALL_SCRIPT = ${INSTALL}
+INSTALL_STRIP_PROGRAM = $(install_sh) -c -s
+LDFLAGS = -Wl,--hash-style=both
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+LTLIBOBJS =
+MAINT = #
+MAKEINFO = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run makeinfo
+MKDIR_P = /scratchbox/tools/bin/mkdir -p
+MPI_CC = mpicc
+OBJEXT = o
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+PACKAGE_BUGREPORT = valgrind-users@lists.sourceforge.net
+PACKAGE_NAME = Valgrind
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+QTCORE_LIBS =
+RANLIB = ranlib
+SED = /scratchbox/tools/bin/sed
+SET_MAKE =
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+VGCONF_ARCH_SEC =
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+VGCONF_PLATFORM_PRI_CAPS = ARM_LINUX
+VGCONF_PLATFORM_SEC_CAPS =
+abs_builddir = /home/ubuntu/valgrind-3.5.0/none/tests/x86-linux
+abs_srcdir = /home/ubuntu/valgrind-3.5.0/none/tests/x86-linux
+abs_top_builddir = /home/ubuntu/valgrind-3.5.0
+abs_top_srcdir = /home/ubuntu/valgrind-3.5.0
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+am__untar = ${AMTAR} xf -
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+build_cpu = arm
+build_os = linux-gnueabi
+build_vendor = unknown
+builddir = .
+datadir = ${datarootdir}
+datarootdir = ${prefix}/share
+docdir = ${datarootdir}/doc/${PACKAGE_TARNAME}
+dvidir = ${docdir}
+exec_prefix = ${prefix}
+host = arm-unknown-linux-gnueabi
+host_alias =
+host_cpu = arm
+host_os = linux-gnueabi
+host_vendor = unknown
+htmldir = ${docdir}
+includedir = ${prefix}/include
+infodir = ${datarootdir}/info
+install_sh = $(SHELL) /home/ubuntu/valgrind-3.5.0/install-sh
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+libexecdir = ${exec_prefix}/libexec
+localedir = ${datarootdir}/locale
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+sysconfdir = ${prefix}/etc
+target_alias =
+top_builddir = ../../..
+top_srcdir = ../../..
+inplacedir = $(top_builddir)/.in_place
+
+#----------------------------------------------------------------------------
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+#----------------------------------------------------------------------------
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+# Baseline flags for all compilations. Aim here is to maximise
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+AM_CFLAGS_BASE = \
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+ -Wno-format-zero-length \
+ -fno-strict-aliasing
+
+AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+#AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+# -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
+# and so the CPPFLAGS are passed to the assembler. But this is not true for
+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
+# AM_CPPFLAGS_<PLATFORM> in each AM_CCASFLAGS_<PLATFORM> variable. This
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+# automake, but this does not really matter and seems hard to avoid.
+AM_CPPFLAGS_ARM_LINUX = \
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+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
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+ -DVGO_linux=1 \
+ -DVGP_arm_linux=1
+
+#AM_CPPFLAGS_ = \
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+# -DVGO_linux=1 \
+# -DVGP__linux=1
+
+AM_FLAG_M3264_X86_LINUX =
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+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) -g
+AM_FLAG_M3264_AMD64_LINUX =
+AM_CFLAGS_AMD64_LINUX = -fomit-frame-pointer \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) -g
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+AM_CCASFLAGS_PPC32_LINUX = $(AM_CPPFLAGS_PPC32_LINUX) -g
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+AM_CCASFLAGS_PPC64_LINUX = $(AM_CPPFLAGS_PPC64_LINUX) -g
+AM_FLAG_M3264_ARM_LINUX =
+AM_CFLAGS_ARM_LINUX = \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) -g
+AM_FLAG_M3264_PPC32_AIX5 =
+AM_CFLAGS_PPC32_AIX5 = -mcpu=powerpc $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
+ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 =
+AM_CFLAGS_PPC64_AIX5 = -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
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+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
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+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_ARM_LINUX)
+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_ARM_LINUX)
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+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_ARM_LINUX)
+AM_FLAG_M3264_SEC =
+#AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_)
+
+# Baseline link flags for making vgpreload shared objects.
+#
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+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
+# as $(AM_FLAG_M3264_PRI).
+AM_CFLAGS = -Winline -Wall -Wshadow -g $(FLAG_MMMX) \
+ $(FLAG_MSSE)
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g $(FLAG_MMMX) \
+ $(FLAG_MSSE)
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
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+dist_noinst_SCRIPTS = \
+ filter_stderr
+
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+ seg_override.stderr.exp seg_override.stdout.exp seg_override.vgtest \
+ sigcontext.stdout.exp sigcontext.stderr.exp sigcontext.vgtest
+
+all: all-am
+
+.SUFFIXES:
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+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
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+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/x86-linux/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/x86-linux/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
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+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: # $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
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+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
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+seg_override$(EXEEXT): $(seg_override_OBJECTS) $(seg_override_DEPENDENCIES)
+ @rm -f seg_override$(EXEEXT)
+ $(LINK) $(seg_override_OBJECTS) $(seg_override_LDADD) $(LIBS)
+sigcontext$(EXEEXT): $(sigcontext_OBJECTS) $(sigcontext_DEPENDENCIES)
+ @rm -f sigcontext$(EXEEXT)
+ $(LINK) $(sigcontext_OBJECTS) $(sigcontext_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+include ./$(DEPDIR)/seg_override.Po
+include ./$(DEPDIR)/sigcontext.Po
+
+.c.o:
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+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c $<
+
+.c.obj:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
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+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ mkid -fID $$unique
+tags: TAGS
+
+TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ here=`pwd`; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ if test -z "$(ETAGS_ARGS)$$tags$$unique"; then :; else \
+ test -n "$$unique" || unique=$$empty_fix; \
+ $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
+ $$tags $$unique; \
+ fi
+ctags: CTAGS
+CTAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ test -z "$(CTAGS_ARGS)$$tags$$unique" \
+ || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
+ $$tags $$unique
+
+GTAGS:
+ here=`$(am__cd) $(top_builddir) && pwd` \
+ && cd $(top_srcdir) \
+ && gtags -i $(GTAGS_ARGS) $$here
+
+distclean-tags:
+ -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
+
+distdir: $(DISTFILES)
+ @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ list='$(DISTFILES)'; \
+ dist_files=`for file in $$list; do echo $$file; done | \
+ sed -e "s|^$$srcdirstrip/||;t" \
+ -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \
+ case $$dist_files in \
+ */*) $(MKDIR_P) `echo "$$dist_files" | \
+ sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \
+ sort -u` ;; \
+ esac; \
+ for file in $$dist_files; do \
+ if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \
+ if test -d $$d/$$file; then \
+ dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \
+ if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \
+ cp -pR $(srcdir)/$$file $(distdir)$$dir || exit 1; \
+ fi; \
+ cp -pR $$d/$$file $(distdir)$$dir || exit 1; \
+ else \
+ test -f $(distdir)/$$file \
+ || cp -p $$d/$$file $(distdir)/$$file \
+ || exit 1; \
+ fi; \
+ done
+check-am: all-am
+ $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
+ $(MAKE) $(AM_MAKEFLAGS) check-local
+check: check-am
+all-am: Makefile $(SCRIPTS)
+installdirs:
+install: install-am
+install-exec: install-exec-am
+install-data: install-data-am
+uninstall: uninstall-am
+
+install-am: all-am
+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+
+installcheck: installcheck-am
+install-strip:
+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+ `test -z '$(STRIP)' || \
+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
+ @echo "This command is intended for maintainers to use"
+ @echo "it deletes files that may require special tools to rebuild."
+clean: clean-am
+
+clean-am: clean-checkPROGRAMS clean-generic clean-local mostlyclean-am
+
+distclean: distclean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+distclean-am: clean-am distclean-compile distclean-generic \
+ distclean-tags
+
+dvi: dvi-am
+
+dvi-am:
+
+html: html-am
+
+info: info-am
+
+info-am:
+
+install-data-am:
+
+install-dvi: install-dvi-am
+
+install-exec-am:
+
+install-html: install-html-am
+
+install-info: install-info-am
+
+install-man:
+
+install-pdf: install-pdf-am
+
+install-ps: install-ps-am
+
+installcheck-am:
+
+maintainer-clean: maintainer-clean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
+
+mostlyclean: mostlyclean-am
+
+mostlyclean-am: mostlyclean-compile mostlyclean-generic
+
+pdf: pdf-am
+
+pdf-am:
+
+ps: ps-am
+
+ps-am:
+
+uninstall-am:
+
+.MAKE: install-am install-strip
+
+.PHONY: CTAGS GTAGS all all-am check check-am check-local clean \
+ clean-checkPROGRAMS clean-generic clean-local ctags distclean \
+ distclean-compile distclean-generic distclean-tags distdir dvi \
+ dvi-am html html-am info info-am install install-am \
+ install-data install-data-am install-dvi install-dvi-am \
+ install-exec install-exec-am install-html install-html-am \
+ install-info install-info-am install-man install-pdf \
+ install-pdf-am install-ps install-ps-am install-strip \
+ installcheck installcheck-am installdirs maintainer-clean \
+ maintainer-clean-generic mostlyclean mostlyclean-compile \
+ mostlyclean-generic pdf pdf-am ps ps-am tags uninstall \
+ uninstall-am
+
+
+# This used to be required when Vex had a handwritten Makefile. It
+# shouldn't be needed any more, though.
+
+#----------------------------------------------------------------------------
+# noinst_PROGRAMS and noinst_DSYMS targets
+#----------------------------------------------------------------------------
+
+# On Darwin, for a program 'p', the DWARF debug info is stored in the
+# directory 'p.dSYM'. This must be generated after the executable is
+# created, with 'dsymutil p'. We could redefine LINK with a script that
+# executes 'dsymutil' after linking, but that's a pain. Instead we use this
+# hook so that every time "make check" is run, we subsequently invoke
+# 'dsymutil' on all the executables that lack a .dSYM directory, or that are
+# newer than their corresponding .dSYM directory.
+build-noinst_DSYMS: $(noinst_DSYMS)
+ for f in $(noinst_DSYMS); do \
+ if [ ! -e $$f.dSYM -o $$f -nt $$f.dSYM ] ; then \
+ echo "dsymutil $$f"; \
+ dsymutil $$f; \
+ fi; \
+ done
+
+# This is used by coregrind/Makefile.am and Makefile.tool.am for doing
+# "in-place" installs. It copies $(noinst_PROGRAMS) into $inplacedir.
+# It needs to be depended on by an 'all-local' rule.
+inplace-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_PROGRAMS) ; do \
+ rm -f $(inplacedir)/$$f; \
+ ln -f -s ../$(subdir)/$$f $(inplacedir); \
+ done
+
+# Similar to inplace-noinst_PROGRAMS
+inplace-noinst_DSYMS: build-noinst_DSYMS
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_DSYMS); do \
+ rm -f $(inplacedir)/$$f.dSYM; \
+ ln -f -s ../$(subdir)/$$f.dSYM $(inplacedir); \
+ done
+
+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
+# "make install". It copies $(noinst_PROGRAMS) into $prefix/lib/valgrind/.
+# It needs to be depended on by an 'install-exec-local' rule.
+install-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_PROGRAMS); do \
+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
+ done
+
+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
+# directories. XXX: not sure whether the resulting permissions will be
+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_DSYMS); do \
+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
+ done
+
+# This needs to be depended on by a 'clean-local' rule.
+clean-noinst_DSYMS:
+ for f in $(noinst_DSYMS); do \
+ rm -rf $$f.dSYM; \
+ done
+
+check-local: build-noinst_DSYMS
+
+clean-local: clean-noinst_DSYMS
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
+
+# This file is used for tool tests, and also in perf/Makefile.am.
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
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+
+@VGCONF_OS_IS_DARWIN_FALSE@AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+@VGCONF_OS_IS_DARWIN_TRUE@AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+@VGCONF_OS_IS_DARWIN_TRUE@ -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
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+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
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+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
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+ -I$(top_srcdir)/include \
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+ -DVGA_@VGCONF_ARCH_PRI@=1 \
+ -DVGO_@VGCONF_OS@=1 \
+ -DVGP_@VGCONF_ARCH_PRI@_@VGCONF_OS@=1
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+
+AM_FLAG_M3264_X86_LINUX = @FLAG_M32@
+AM_CFLAGS_X86_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) @FLAG_M32@ -g
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+AM_CFLAGS_AMD64_LINUX = @FLAG_M64@ -fomit-frame-pointer \
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+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) @FLAG_M64@ -g
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+AM_FLAG_M3264_PPC64_LINUX = @FLAG_M64@
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+AM_FLAG_M3264_ARM_LINUX = @FLAG_M32@
+AM_CFLAGS_ARM_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_PPC32_AIX5 = @FLAG_MAIX32@
+AM_CFLAGS_PPC32_AIX5 = @FLAG_MAIX32@ -mcpu=powerpc $(AM_CFLAGS_BASE)
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+ @FLAG_MAIX32@ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 = @FLAG_MAIX64@
+AM_CFLAGS_PPC64_AIX5 = @FLAG_MAIX64@ -mcpu=powerpc64 $(AM_CFLAGS_BASE)
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+ @FLAG_MAIX64@ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
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+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
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+# build anything which is built only once on a dual-arch build.
+#
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+
+# Baseline link flags for making vgpreload shared objects.
+#
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+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX32@
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX64@
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
+# as $(AM_FLAG_M3264_PRI).
+AM_CFLAGS = -Winline -Wall -Wshadow -g @FLAG_M32@ $(FLAG_MMMX) \
+ $(FLAG_MSSE)
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g @FLAG_M32@ $(FLAG_MMMX) \
+ $(FLAG_MSSE)
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS) @FLAG_M32@
+@VGCONF_OS_IS_DARWIN_TRUE@noinst_DSYMS = $(check_PROGRAMS)
+dist_noinst_SCRIPTS = \
+ filter_stderr
+
+EXTRA_DIST = \
+ seg_override.stderr.exp seg_override.stdout.exp seg_override.vgtest \
+ sigcontext.stdout.exp sigcontext.stderr.exp sigcontext.vgtest
+
+all: all-am
+
+.SUFFIXES:
+.SUFFIXES: .c .o .obj
+$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/x86-linux/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/x86-linux/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
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+ esac;
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+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
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+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
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+seg_override$(EXEEXT): $(seg_override_OBJECTS) $(seg_override_DEPENDENCIES)
+ @rm -f seg_override$(EXEEXT)
+ $(LINK) $(seg_override_OBJECTS) $(seg_override_LDADD) $(LIBS)
+sigcontext$(EXEEXT): $(sigcontext_OBJECTS) $(sigcontext_DEPENDENCIES)
+ @rm -f sigcontext$(EXEEXT)
+ $(LINK) $(sigcontext_OBJECTS) $(sigcontext_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/seg_override.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/sigcontext.Po@am__quote@
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+.c.o:
+@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
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+@am__fastdepCC_FALSE@ $(COMPILE) -c $<
+
+.c.obj:
+@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
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+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ mkid -fID $$unique
+tags: TAGS
+
+TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ here=`pwd`; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ if test -z "$(ETAGS_ARGS)$$tags$$unique"; then :; else \
+ test -n "$$unique" || unique=$$empty_fix; \
+ $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
+ $$tags $$unique; \
+ fi
+ctags: CTAGS
+CTAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ test -z "$(CTAGS_ARGS)$$tags$$unique" \
+ || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
+ $$tags $$unique
+
+GTAGS:
+ here=`$(am__cd) $(top_builddir) && pwd` \
+ && cd $(top_srcdir) \
+ && gtags -i $(GTAGS_ARGS) $$here
+
+distclean-tags:
+ -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
+
+distdir: $(DISTFILES)
+ @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ list='$(DISTFILES)'; \
+ dist_files=`for file in $$list; do echo $$file; done | \
+ sed -e "s|^$$srcdirstrip/||;t" \
+ -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \
+ case $$dist_files in \
+ */*) $(MKDIR_P) `echo "$$dist_files" | \
+ sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \
+ sort -u` ;; \
+ esac; \
+ for file in $$dist_files; do \
+ if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \
+ if test -d $$d/$$file; then \
+ dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \
+ if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \
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+ fi; \
+ cp -pR $$d/$$file $(distdir)$$dir || exit 1; \
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+ || cp -p $$d/$$file $(distdir)/$$file \
+ || exit 1; \
+ fi; \
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+ $(MAKE) $(AM_MAKEFLAGS) check-local
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+install-exec: install-exec-am
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+uninstall: uninstall-am
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+install-am: all-am
+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
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+installcheck: installcheck-am
+install-strip:
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+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+ `test -z '$(STRIP)' || \
+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
+ @echo "This command is intended for maintainers to use"
+ @echo "it deletes files that may require special tools to rebuild."
+clean: clean-am
+
+clean-am: clean-checkPROGRAMS clean-generic clean-local mostlyclean-am
+
+distclean: distclean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+distclean-am: clean-am distclean-compile distclean-generic \
+ distclean-tags
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+dvi: dvi-am
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+dvi-am:
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+html: html-am
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+info: info-am
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+info-am:
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+install-data-am:
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+install-dvi: install-dvi-am
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+install-exec-am:
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+install-html: install-html-am
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+install-info: install-info-am
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+install-man:
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+install-pdf: install-pdf-am
+
+install-ps: install-ps-am
+
+installcheck-am:
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+maintainer-clean: maintainer-clean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
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+mostlyclean: mostlyclean-am
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+mostlyclean-am: mostlyclean-compile mostlyclean-generic
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+pdf: pdf-am
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+pdf-am:
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+ps: ps-am
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+ps-am:
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+uninstall-am:
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+.MAKE: install-am install-strip
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+.PHONY: CTAGS GTAGS all all-am check check-am check-local clean \
+ clean-checkPROGRAMS clean-generic clean-local ctags distclean \
+ distclean-compile distclean-generic distclean-tags distdir dvi \
+ dvi-am html html-am info info-am install install-am \
+ install-data install-data-am install-dvi install-dvi-am \
+ install-exec install-exec-am install-html install-html-am \
+ install-info install-info-am install-man install-pdf \
+ install-pdf-am install-ps install-ps-am install-strip \
+ installcheck installcheck-am installdirs maintainer-clean \
+ maintainer-clean-generic mostlyclean mostlyclean-compile \
+ mostlyclean-generic pdf pdf-am ps ps-am tags uninstall \
+ uninstall-am
+
+
+# This used to be required when Vex had a handwritten Makefile. It
+# shouldn't be needed any more, though.
+
+#----------------------------------------------------------------------------
+# noinst_PROGRAMS and noinst_DSYMS targets
+#----------------------------------------------------------------------------
+
+# On Darwin, for a program 'p', the DWARF debug info is stored in the
+# directory 'p.dSYM'. This must be generated after the executable is
+# created, with 'dsymutil p'. We could redefine LINK with a script that
+# executes 'dsymutil' after linking, but that's a pain. Instead we use this
+# hook so that every time "make check" is run, we subsequently invoke
+# 'dsymutil' on all the executables that lack a .dSYM directory, or that are
+# newer than their corresponding .dSYM directory.
+build-noinst_DSYMS: $(noinst_DSYMS)
+ for f in $(noinst_DSYMS); do \
+ if [ ! -e $$f.dSYM -o $$f -nt $$f.dSYM ] ; then \
+ echo "dsymutil $$f"; \
+ dsymutil $$f; \
+ fi; \
+ done
+
+# This is used by coregrind/Makefile.am and Makefile.tool.am for doing
+# "in-place" installs. It copies $(noinst_PROGRAMS) into $inplacedir.
+# It needs to be depended on by an 'all-local' rule.
+inplace-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_PROGRAMS) ; do \
+ rm -f $(inplacedir)/$$f; \
+ ln -f -s ../$(subdir)/$$f $(inplacedir); \
+ done
+
+# Similar to inplace-noinst_PROGRAMS
+inplace-noinst_DSYMS: build-noinst_DSYMS
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_DSYMS); do \
+ rm -f $(inplacedir)/$$f.dSYM; \
+ ln -f -s ../$(subdir)/$$f.dSYM $(inplacedir); \
+ done
+
+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
+# "make install". It copies $(noinst_PROGRAMS) into $prefix/lib/valgrind/.
+# It needs to be depended on by an 'install-exec-local' rule.
+install-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_PROGRAMS); do \
+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
+ done
+
+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
+# directories. XXX: not sure whether the resulting permissions will be
+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_DSYMS); do \
+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
+ done
+
+# This needs to be depended on by a 'clean-local' rule.
+clean-noinst_DSYMS:
+ for f in $(noinst_DSYMS); do \
+ rm -rf $$f.dSYM; \
+ done
+
+check-local: build-noinst_DSYMS
+
+clean-local: clean-noinst_DSYMS
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
10
dir
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svn://svn.valgrind.org/valgrind/trunk/none/tests/x86
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bug132813-x86.c
file
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# none/tests/x86/Makefile. Generated from Makefile.in by configure.
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+
+
+# This file is used for tool tests, and also in perf/Makefile.am.
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
+
+
+pkgdatadir = $(datadir)/valgrind
+pkglibdir = $(libdir)/valgrind
+pkgincludedir = $(includedir)/valgrind
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+install_sh_DATA = $(install_sh) -c -m 644
+install_sh_PROGRAM = $(install_sh) -c
+install_sh_SCRIPT = $(install_sh) -c
+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+build_triplet = arm-unknown-linux-gnueabi
+host_triplet = arm-unknown-linux-gnueabi
+DIST_COMMON = $(dist_noinst_SCRIPTS) $(srcdir)/Makefile.am \
+ $(srcdir)/Makefile.in $(top_srcdir)/Makefile.all.am \
+ $(top_srcdir)/Makefile.tool-tests.am
+#am__append_1 = insn_sse3
+#am__append_2 = insn_ssse3
+check_PROGRAMS = badseg$(EXEEXT) bt_everything$(EXEEXT) \
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+ bug126147-x86$(EXEEXT) bug132813-x86$(EXEEXT) \
+ bug135421-x86$(EXEEXT) bug137714-x86$(EXEEXT) \
+ bug152818-x86$(EXEEXT) cmpxchg8b$(EXEEXT) cpuid$(EXEEXT) \
+ cse_fail$(EXEEXT) faultstatus$(EXEEXT) fcmovnu$(EXEEXT) \
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+ x86locked$(EXEEXT) yield$(EXEEXT) xadd$(EXEEXT) \
+ $(am__EXEEXT_4) $(am__EXEEXT_5)
+#am__append_3 = ssse3_misaligned
+#am__append_4 = lzcnt32
+
+# Some of the tests (bug125959_x86, bug152818_x86, insn_*) need
+# -mdynamic-no-pic. I tried setting *_CFLAGS separately for all of them,
+# but it caused problems with the generation of insn_*.c. So just use this
+# crude approach of setting -mdynamic-no-pic for all tests in this
+# directory.
+#am__append_5 = -mdynamic-no-pic
+subdir = none/tests/x86
+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
+am__aclocal_m4_deps = $(top_srcdir)/configure.in
+am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
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+mkinstalldirs = $(install_sh) -d
+CONFIG_HEADER = $(top_builddir)/config.h
+CONFIG_CLEAN_FILES =
+#am__EXEEXT_1 = insn_sse3$(EXEEXT)
+#am__EXEEXT_2 = insn_ssse3$(EXEEXT)
+am__EXEEXT_3 = insn_basic$(EXEEXT) insn_fpu$(EXEEXT) \
+ insn_cmov$(EXEEXT) insn_mmx$(EXEEXT) insn_mmxext$(EXEEXT) \
+ insn_sse$(EXEEXT) insn_sse2$(EXEEXT) $(am__EXEEXT_1) \
+ $(am__EXEEXT_2)
+#am__EXEEXT_4 = ssse3_misaligned$(EXEEXT)
+#am__EXEEXT_5 = lzcnt32$(EXEEXT)
+badseg_SOURCES = badseg.c
+badseg_OBJECTS = badseg.$(OBJEXT)
+badseg_LDADD = $(LDADD)
+bt_everything_SOURCES = bt_everything.c
+bt_everything_OBJECTS = bt_everything.$(OBJEXT)
+bt_everything_LDADD = $(LDADD)
+bt_literal_SOURCES = bt_literal.c
+bt_literal_OBJECTS = bt_literal.$(OBJEXT)
+bt_literal_LDADD = $(LDADD)
+bug125959_x86_SOURCES = bug125959-x86.c
+bug125959_x86_OBJECTS = bug125959-x86.$(OBJEXT)
+bug125959_x86_LDADD = $(LDADD)
+bug126147_x86_SOURCES = bug126147-x86.c
+bug126147_x86_OBJECTS = bug126147-x86.$(OBJEXT)
+bug126147_x86_LDADD = $(LDADD)
+bug132813_x86_SOURCES = bug132813-x86.c
+bug132813_x86_OBJECTS = bug132813-x86.$(OBJEXT)
+bug132813_x86_LDADD = $(LDADD)
+bug135421_x86_SOURCES = bug135421-x86.c
+bug135421_x86_OBJECTS = bug135421-x86.$(OBJEXT)
+bug135421_x86_LDADD = $(LDADD)
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+bug152818_x86_OBJECTS = bug152818-x86.$(OBJEXT)
+bug152818_x86_LDADD = $(LDADD)
+cmpxchg8b_SOURCES = cmpxchg8b.c
+cmpxchg8b_OBJECTS = cmpxchg8b.$(OBJEXT)
+cmpxchg8b_LDADD = $(LDADD)
+am_cpuid_OBJECTS = cpuid_c.$(OBJEXT) cpuid_s.$(OBJEXT)
+cpuid_OBJECTS = $(am_cpuid_OBJECTS)
+cpuid_LDADD = $(LDADD)
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+cse_fail_OBJECTS = cse_fail.$(OBJEXT)
+cse_fail_LDADD = $(LDADD)
+faultstatus_SOURCES = faultstatus.c
+faultstatus_OBJECTS = faultstatus.$(OBJEXT)
+faultstatus_LDADD = $(LDADD)
+fcmovnu_SOURCES = fcmovnu.c
+fcmovnu_OBJECTS = fcmovnu.$(OBJEXT)
+fcmovnu_LDADD = $(LDADD)
+fpu_lazy_eflags_SOURCES = fpu_lazy_eflags.c
+fpu_lazy_eflags_OBJECTS = fpu_lazy_eflags-fpu_lazy_eflags.$(OBJEXT)
+fpu_lazy_eflags_LDADD = $(LDADD)
+fpu_lazy_eflags_LINK = $(CCLD) $(fpu_lazy_eflags_CFLAGS) $(CFLAGS) \
+ $(AM_LDFLAGS) $(LDFLAGS) -o $@
+fxtract_SOURCES = fxtract.c
+fxtract_OBJECTS = fxtract.$(OBJEXT)
+fxtract_DEPENDENCIES =
+getseg_SOURCES = getseg.c
+getseg_OBJECTS = getseg.$(OBJEXT)
+getseg_LDADD = $(LDADD)
+incdec_alt_SOURCES = incdec_alt.c
+incdec_alt_OBJECTS = incdec_alt.$(OBJEXT)
+incdec_alt_LDADD = $(LDADD)
+am_insn_basic_OBJECTS = insn_basic.$(OBJEXT)
+insn_basic_OBJECTS = $(am_insn_basic_OBJECTS)
+insn_basic_DEPENDENCIES =
+am_insn_cmov_OBJECTS = insn_cmov.$(OBJEXT)
+insn_cmov_OBJECTS = $(am_insn_cmov_OBJECTS)
+insn_cmov_DEPENDENCIES =
+am_insn_fpu_OBJECTS = insn_fpu.$(OBJEXT)
+insn_fpu_OBJECTS = $(am_insn_fpu_OBJECTS)
+insn_fpu_DEPENDENCIES =
+am_insn_mmx_OBJECTS = insn_mmx.$(OBJEXT)
+insn_mmx_OBJECTS = $(am_insn_mmx_OBJECTS)
+insn_mmx_DEPENDENCIES =
+am_insn_mmxext_OBJECTS = insn_mmxext.$(OBJEXT)
+insn_mmxext_OBJECTS = $(am_insn_mmxext_OBJECTS)
+insn_mmxext_DEPENDENCIES =
+am_insn_sse_OBJECTS = insn_sse.$(OBJEXT)
+insn_sse_OBJECTS = $(am_insn_sse_OBJECTS)
+insn_sse_DEPENDENCIES =
+am_insn_sse2_OBJECTS = insn_sse2.$(OBJEXT)
+insn_sse2_OBJECTS = $(am_insn_sse2_OBJECTS)
+insn_sse2_DEPENDENCIES =
+am_insn_sse3_OBJECTS = insn_sse3.$(OBJEXT)
+insn_sse3_OBJECTS = $(am_insn_sse3_OBJECTS)
+insn_sse3_DEPENDENCIES =
+am_insn_ssse3_OBJECTS = insn_ssse3.$(OBJEXT)
+insn_ssse3_OBJECTS = $(am_insn_ssse3_OBJECTS)
+insn_ssse3_DEPENDENCIES =
+int_SOURCES = int.c
+int_OBJECTS = int.$(OBJEXT)
+int_LDADD = $(LDADD)
+jcxz_SOURCES = jcxz.c
+jcxz_OBJECTS = jcxz.$(OBJEXT)
+jcxz_LDADD = $(LDADD)
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+lahf_OBJECTS = lahf.$(OBJEXT)
+lahf_LDADD = $(LDADD)
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+looper_OBJECTS = looper.$(OBJEXT)
+looper_LDADD = $(LDADD)
+lzcnt32_SOURCES = lzcnt32.c
+lzcnt32_OBJECTS = lzcnt32.$(OBJEXT)
+lzcnt32_LDADD = $(LDADD)
+movx_SOURCES = movx.c
+movx_OBJECTS = movx.$(OBJEXT)
+movx_LDADD = $(LDADD)
+pushpopseg_SOURCES = pushpopseg.c
+pushpopseg_OBJECTS = pushpopseg.$(OBJEXT)
+pushpopseg_LDADD = $(LDADD)
+sbbmisc_SOURCES = sbbmisc.c
+sbbmisc_OBJECTS = sbbmisc.$(OBJEXT)
+sbbmisc_LDADD = $(LDADD)
+smc1_SOURCES = smc1.c
+smc1_OBJECTS = smc1.$(OBJEXT)
+smc1_LDADD = $(LDADD)
+ssse3_misaligned_SOURCES = ssse3_misaligned.c
+ssse3_misaligned_OBJECTS = ssse3_misaligned.$(OBJEXT)
+ssse3_misaligned_LDADD = $(LDADD)
+x86locked_SOURCES = x86locked.c
+x86locked_OBJECTS = x86locked-x86locked.$(OBJEXT)
+x86locked_LDADD = $(LDADD)
+x86locked_LINK = $(CCLD) $(x86locked_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
+ $(LDFLAGS) -o $@
+xadd_SOURCES = xadd.c
+xadd_OBJECTS = xadd.$(OBJEXT)
+xadd_LDADD = $(LDADD)
+yield_SOURCES = yield.c
+yield_OBJECTS = yield.$(OBJEXT)
+yield_DEPENDENCIES =
+SCRIPTS = $(dist_noinst_SCRIPTS)
+DEFAULT_INCLUDES = -I. -I$(top_builddir)
+depcomp = $(SHELL) $(top_srcdir)/depcomp
+am__depfiles_maybe = depfiles
+CPPASCOMPILE = $(CCAS) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \
+ $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CCASFLAGS) $(CCASFLAGS)
+COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
+ $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
+CCLD = $(CC)
+LINK = $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) -o $@
+SOURCES = badseg.c bt_everything.c bt_literal.c bug125959-x86.c \
+ bug126147-x86.c bug132813-x86.c bug135421-x86.c \
+ bug137714-x86.c bug152818-x86.c cmpxchg8b.c $(cpuid_SOURCES) \
+ cse_fail.c faultstatus.c fcmovnu.c fpu_lazy_eflags.c fxtract.c \
+ getseg.c incdec_alt.c $(insn_basic_SOURCES) \
+ $(insn_cmov_SOURCES) $(insn_fpu_SOURCES) $(insn_mmx_SOURCES) \
+ $(insn_mmxext_SOURCES) $(insn_sse_SOURCES) \
+ $(insn_sse2_SOURCES) $(insn_sse3_SOURCES) \
+ $(insn_ssse3_SOURCES) int.c jcxz.c lahf.c looper.c lzcnt32.c \
+ movx.c pushpopseg.c sbbmisc.c smc1.c ssse3_misaligned.c \
+ x86locked.c xadd.c yield.c
+DIST_SOURCES = badseg.c bt_everything.c bt_literal.c bug125959-x86.c \
+ bug126147-x86.c bug132813-x86.c bug135421-x86.c \
+ bug137714-x86.c bug152818-x86.c cmpxchg8b.c $(cpuid_SOURCES) \
+ cse_fail.c faultstatus.c fcmovnu.c fpu_lazy_eflags.c fxtract.c \
+ getseg.c incdec_alt.c $(insn_basic_SOURCES) \
+ $(insn_cmov_SOURCES) $(insn_fpu_SOURCES) $(insn_mmx_SOURCES) \
+ $(insn_mmxext_SOURCES) $(insn_sse_SOURCES) \
+ $(insn_sse2_SOURCES) $(insn_sse3_SOURCES) \
+ $(insn_ssse3_SOURCES) int.c jcxz.c lahf.c looper.c lzcnt32.c \
+ movx.c pushpopseg.c sbbmisc.c smc1.c ssse3_misaligned.c \
+ x86locked.c xadd.c yield.c
+ETAGS = etags
+CTAGS = ctags
+DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST)
+ACLOCAL = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run aclocal-1.10
+AMTAR = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run tar
+AR = /scratchbox/compilers/bin/ar
+AUTOCONF = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run autoconf
+AUTOHEADER = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run autoheader
+AUTOMAKE = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run automake-1.10
+AWK = gawk
+BOOST_CFLAGS =
+BOOST_LIBS =
+CC = gcc
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+CCDEPMODE = depmode=gcc3
+CFLAGS = -Wno-long-long -Wno-pointer-sign -fno-stack-protector
+CPP = gcc -E
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+DEPDIR = .deps
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+EGREP = /scratchbox/tools/bin/grep -E
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+FLAG_M64 =
+FLAG_MAIX32 =
+FLAG_MAIX64 =
+FLAG_MMMX =
+FLAG_MSSE =
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+FLAG_UNLIMITED_INLINE_UNIT_GROWTH = --param inline-unit-growth=900
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+FLAG_W_NO_EMPTY_BODY = -Wno-empty-body
+FLAG_W_NO_FORMAT_ZERO_LENGTH = -Wno-format-zero-length
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+INSTALL_DATA = ${INSTALL} -m 644
+INSTALL_PROGRAM = ${INSTALL}
+INSTALL_SCRIPT = ${INSTALL}
+INSTALL_STRIP_PROGRAM = $(install_sh) -c -s
+LDFLAGS = -Wl,--hash-style=both
+LIBOBJS =
+LIBS =
+LN_S = ln -s
+LTLIBOBJS =
+MAINT = #
+MAKEINFO = ${SHELL} /home/ubuntu/valgrind-3.5.0/missing --run makeinfo
+MKDIR_P = /scratchbox/tools/bin/mkdir -p
+MPI_CC = mpicc
+OBJEXT = o
+PACKAGE = valgrind
+PACKAGE_BUGREPORT = valgrind-users@lists.sourceforge.net
+PACKAGE_NAME = Valgrind
+PACKAGE_STRING = Valgrind 3.6.0.SVN
+PACKAGE_TARNAME = valgrind
+PACKAGE_VERSION = 3.6.0.SVN
+PATH_SEPARATOR = :
+PERL = /scratchbox/tools/bin/perl
+PKG_CONFIG = /scratchbox/tools/bin/pkg-config
+PREFERRED_STACK_BOUNDARY =
+QTCORE_CFLAGS =
+QTCORE_LIBS =
+RANLIB = ranlib
+SED = /scratchbox/tools/bin/sed
+SET_MAKE =
+SHELL = /bin/sh
+STRIP =
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+VALT_LOAD_ADDRESS_SEC = 0xUNSET
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+VGCONF_ARCH_SEC =
+VGCONF_OS = linux
+VGCONF_PLATFORM_PRI_CAPS = ARM_LINUX
+VGCONF_PLATFORM_SEC_CAPS =
+abs_builddir = /home/ubuntu/valgrind-3.5.0/none/tests/x86
+abs_srcdir = /home/ubuntu/valgrind-3.5.0/none/tests/x86
+abs_top_builddir = /home/ubuntu/valgrind-3.5.0
+abs_top_srcdir = /home/ubuntu/valgrind-3.5.0
+ac_ct_CC = gcc
+ac_ct_CXX = g++
+am__include = include
+am__leading_dot = .
+am__quote =
+am__tar = ${AMTAR} chof - "$$tardir"
+am__untar = ${AMTAR} xf -
+bindir = ${exec_prefix}/bin
+build = arm-unknown-linux-gnueabi
+build_alias =
+build_cpu = arm
+build_os = linux-gnueabi
+build_vendor = unknown
+builddir = .
+datadir = ${datarootdir}
+datarootdir = ${prefix}/share
+docdir = ${datarootdir}/doc/${PACKAGE_TARNAME}
+dvidir = ${docdir}
+exec_prefix = ${prefix}
+host = arm-unknown-linux-gnueabi
+host_alias =
+host_cpu = arm
+host_os = linux-gnueabi
+host_vendor = unknown
+htmldir = ${docdir}
+includedir = ${prefix}/include
+infodir = ${datarootdir}/info
+install_sh = $(SHELL) /home/ubuntu/valgrind-3.5.0/install-sh
+libdir = ${exec_prefix}/lib
+libexecdir = ${exec_prefix}/libexec
+localedir = ${datarootdir}/locale
+localstatedir = ${prefix}/var
+mandir = ${datarootdir}/man
+mkdir_p = /scratchbox/tools/bin/mkdir -p
+oldincludedir = /usr/include
+pdfdir = ${docdir}
+prefix = /usr
+program_transform_name = s,x,x,
+psdir = ${docdir}
+sbindir = ${exec_prefix}/sbin
+sharedstatedir = ${prefix}/com
+srcdir = .
+sysconfdir = ${prefix}/etc
+target_alias =
+top_builddir = ../../..
+top_srcdir = ../../..
+inplacedir = $(top_builddir)/.in_place
+
+#----------------------------------------------------------------------------
+# Flags
+#----------------------------------------------------------------------------
+
+# Baseline flags for all compilations. Aim here is to maximise
+# performance and get whatever useful warnings we can out of gcc.
+AM_CFLAGS_BASE = \
+ -O2 -g \
+ -Wall \
+ -Wmissing-prototypes \
+ -Wshadow \
+ -Wpointer-arith \
+ -Wstrict-prototypes \
+ -Wmissing-declarations \
+ -Wno-format-zero-length \
+ -fno-strict-aliasing
+
+AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+#AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+# -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
+# and so the CPPFLAGS are passed to the assembler. But this is not true for
+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
+# AM_CPPFLAGS_<PLATFORM> in each AM_CCASFLAGS_<PLATFORM> variable. This
+# means some of the flags are duplicated on systems with newer versions of
+# automake, but this does not really matter and seems hard to avoid.
+AM_CPPFLAGS_ARM_LINUX = \
+ -I$(top_srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_arm=1 \
+ -DVGO_linux=1 \
+ -DVGP_arm_linux=1
+
+#AM_CPPFLAGS_ = \
+# -I$(top_srcdir) \
+# -I$(top_srcdir)/include \
+# -I$(top_srcdir)/VEX/pub \
+# -DVGA_=1 \
+# -DVGO_linux=1 \
+# -DVGP__linux=1
+
+AM_FLAG_M3264_X86_LINUX =
+AM_CFLAGS_X86_LINUX = \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) -g
+AM_FLAG_M3264_AMD64_LINUX =
+AM_CFLAGS_AMD64_LINUX = -fomit-frame-pointer \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) -g
+AM_FLAG_M3264_PPC32_LINUX =
+AM_CFLAGS_PPC32_LINUX = $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_LINUX = $(AM_CPPFLAGS_PPC32_LINUX) -g
+AM_FLAG_M3264_PPC64_LINUX =
+AM_CFLAGS_PPC64_LINUX = $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_LINUX = $(AM_CPPFLAGS_PPC64_LINUX) -g
+AM_FLAG_M3264_ARM_LINUX =
+AM_CFLAGS_ARM_LINUX = \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) -g
+AM_FLAG_M3264_PPC32_AIX5 =
+AM_CFLAGS_PPC32_AIX5 = -mcpu=powerpc $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
+ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 =
+AM_CFLAGS_PPC64_AIX5 = -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 \
+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_ARM_LINUX)
+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_ARM_LINUX)
+AM_CFLAGS_PRI = $(AM_CFLAGS_ARM_LINUX)
+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_ARM_LINUX)
+AM_FLAG_M3264_SEC =
+#AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX)
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5)
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
+# as $(AM_FLAG_M3264_PRI).
+AM_CFLAGS = -Winline -Wall -Wshadow -g $(FLAG_MMMX) \
+ $(FLAG_MSSE) $(am__append_5)
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g $(FLAG_MMMX) \
+ $(FLAG_MSSE)
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS)
+#noinst_DSYMS = $(check_PROGRAMS)
+dist_noinst_SCRIPTS = filter_cpuid filter_stderr gen_insn_test.pl
+CLEANFILES = $(addsuffix .c,$(INSN_TESTS))
+INSN_TESTS = insn_basic insn_fpu insn_cmov insn_mmx insn_mmxext \
+ insn_sse insn_sse2 $(am__append_1) $(am__append_2)
+
+# Explicitly include insn_sse3 even if ! BUILD_SSE3_TESTS,
+# to avoid packaging screwups if 'make dist' is run on a machine
+# which failed the BUILD_SSE3_TESTS test in configure.in.
+EXTRA_DIST = \
+ badseg.stderr.exp badseg.stdout.exp badseg.vgtest \
+ bt_everything.stderr.exp bt_everything.stdout.exp bt_everything.vgtest \
+ bt_literal.stderr.exp bt_literal.stdout.exp bt_literal.vgtest \
+ bug125959-x86.stderr.exp bug125959-x86.stdout.exp bug125959-x86.vgtest \
+ bug126147-x86.stderr.exp bug126147-x86.stdout.exp bug126147-x86.vgtest \
+ bug132813-x86.stderr.exp bug132813-x86.stdout.exp bug132813-x86.vgtest \
+ bug135421-x86.stderr.exp bug135421-x86.stdout.exp bug135421-x86.vgtest \
+ bug137714-x86.stderr.exp bug137714-x86.stdout.exp bug137714-x86.vgtest \
+ bug152818-x86.stderr.exp bug152818-x86.stdout.exp bug152818-x86.vgtest \
+ cmpxchg8b.stderr.exp cmpxchg8b.stdout.exp cmpxchg8b.vgtest \
+ cpuid.stderr.exp cpuid.stdout.exp cpuid.vgtest \
+ cse_fail.stderr.exp cse_fail.stdout.exp cse_fail.vgtest \
+ faultstatus.disabled faultstatus.stderr.exp \
+ fcmovnu.vgtest fcmovnu.stderr.exp fcmovnu.stdout.exp \
+ fpu_lazy_eflags.stderr.exp fpu_lazy_eflags.stdout.exp \
+ fpu_lazy_eflags.vgtest \
+ fxtract.stdout.exp fxtract.stderr.exp fxtract.vgtest \
+ getseg.stdout.exp getseg.stderr.exp getseg.vgtest \
+ incdec_alt.stdout.exp incdec_alt.stderr.exp incdec_alt.vgtest \
+ int.stderr.exp int.stdout.exp int.disabled \
+ $(addsuffix .stderr.exp,$(INSN_TESTS)) \
+ $(addsuffix .stdout.exp,$(INSN_TESTS)) \
+ $(addsuffix .vgtest,$(INSN_TESTS)) \
+ insn_sse3.stdout.exp insn_sse3.stderr.exp insn_sse3.vgtest \
+ insn_ssse3.stdout.exp insn_ssse3.stderr.exp insn_ssse3.vgtest \
+ jcxz.stdout.exp jcxz.stderr.exp jcxz.vgtest \
+ lahf.stdout.exp lahf.stderr.exp lahf.vgtest \
+ looper.stderr.exp looper.stdout.exp looper.vgtest \
+ lzcnt32.stderr.exp lzcnt32.stdout.exp lzcnt32.vgtest \
+ movx.stderr.exp movx.stdout.exp movx.vgtest \
+ pushpopseg.stderr.exp pushpopseg.stdout.exp pushpopseg.vgtest \
+ sbbmisc.stderr.exp sbbmisc.stdout.exp sbbmisc.vgtest \
+ smc1.stderr.exp smc1.stdout.exp smc1.vgtest \
+ ssse3_misaligned.stderr.exp ssse3_misaligned.stdout.exp \
+ ssse3_misaligned.vgtest ssse3_misaligned.c \
+ x86locked.vgtest x86locked.stdout.exp x86locked.stderr.exp \
+ yield.stderr.exp yield.stdout.exp yield.disabled \
+ xadd.stdout.exp xadd.stderr.exp xadd.vgtest
+
+cpuid_SOURCES = cpuid_c.c cpuid_s.S
+# fpu_lazy_eflags must use these flags -- the bug only occurred with them.
+fpu_lazy_eflags_CFLAGS = $(AM_CFLAGS) -O2 -march=pentiumpro
+fxtract_LDADD = -lm
+insn_basic_SOURCES = insn_basic.def
+insn_basic_LDADD = -lm
+insn_fpu_SOURCES = insn_fpu.def
+insn_fpu_LDADD = -lm
+insn_cmov_SOURCES = insn_cmov.def
+insn_cmov_LDADD = -lm
+insn_mmx_SOURCES = insn_mmx.def
+insn_mmx_LDADD = -lm
+insn_mmxext_SOURCES = insn_mmxext.def
+insn_mmxext_LDADD = -lm
+insn_sse_SOURCES = insn_sse.def
+insn_sse_LDADD = -lm
+insn_sse2_SOURCES = insn_sse2.def
+insn_sse2_LDADD = -lm
+insn_sse3_SOURCES = insn_sse3.def
+insn_sse3_LDADD = -lm
+insn_ssse3_SOURCES = insn_ssse3.def
+insn_ssse3_LDADD = -lm
+x86locked_CFLAGS = $(AM_CFLAGS) -O
+yield_LDADD = -lpthread
+all: all-am
+
+.SUFFIXES:
+.SUFFIXES: .S .c .def .o .obj
+$(srcdir)/Makefile.in: # $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/x86/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/x86/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: # $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): # $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
+ -test -z "$(check_PROGRAMS)" || rm -f $(check_PROGRAMS)
+badseg$(EXEEXT): $(badseg_OBJECTS) $(badseg_DEPENDENCIES)
+ @rm -f badseg$(EXEEXT)
+ $(LINK) $(badseg_OBJECTS) $(badseg_LDADD) $(LIBS)
+bt_everything$(EXEEXT): $(bt_everything_OBJECTS) $(bt_everything_DEPENDENCIES)
+ @rm -f bt_everything$(EXEEXT)
+ $(LINK) $(bt_everything_OBJECTS) $(bt_everything_LDADD) $(LIBS)
+bt_literal$(EXEEXT): $(bt_literal_OBJECTS) $(bt_literal_DEPENDENCIES)
+ @rm -f bt_literal$(EXEEXT)
+ $(LINK) $(bt_literal_OBJECTS) $(bt_literal_LDADD) $(LIBS)
+bug125959-x86$(EXEEXT): $(bug125959_x86_OBJECTS) $(bug125959_x86_DEPENDENCIES)
+ @rm -f bug125959-x86$(EXEEXT)
+ $(LINK) $(bug125959_x86_OBJECTS) $(bug125959_x86_LDADD) $(LIBS)
+bug126147-x86$(EXEEXT): $(bug126147_x86_OBJECTS) $(bug126147_x86_DEPENDENCIES)
+ @rm -f bug126147-x86$(EXEEXT)
+ $(LINK) $(bug126147_x86_OBJECTS) $(bug126147_x86_LDADD) $(LIBS)
+bug132813-x86$(EXEEXT): $(bug132813_x86_OBJECTS) $(bug132813_x86_DEPENDENCIES)
+ @rm -f bug132813-x86$(EXEEXT)
+ $(LINK) $(bug132813_x86_OBJECTS) $(bug132813_x86_LDADD) $(LIBS)
+bug135421-x86$(EXEEXT): $(bug135421_x86_OBJECTS) $(bug135421_x86_DEPENDENCIES)
+ @rm -f bug135421-x86$(EXEEXT)
+ $(LINK) $(bug135421_x86_OBJECTS) $(bug135421_x86_LDADD) $(LIBS)
+bug137714-x86$(EXEEXT): $(bug137714_x86_OBJECTS) $(bug137714_x86_DEPENDENCIES)
+ @rm -f bug137714-x86$(EXEEXT)
+ $(LINK) $(bug137714_x86_OBJECTS) $(bug137714_x86_LDADD) $(LIBS)
+bug152818-x86$(EXEEXT): $(bug152818_x86_OBJECTS) $(bug152818_x86_DEPENDENCIES)
+ @rm -f bug152818-x86$(EXEEXT)
+ $(LINK) $(bug152818_x86_OBJECTS) $(bug152818_x86_LDADD) $(LIBS)
+cmpxchg8b$(EXEEXT): $(cmpxchg8b_OBJECTS) $(cmpxchg8b_DEPENDENCIES)
+ @rm -f cmpxchg8b$(EXEEXT)
+ $(LINK) $(cmpxchg8b_OBJECTS) $(cmpxchg8b_LDADD) $(LIBS)
+cpuid$(EXEEXT): $(cpuid_OBJECTS) $(cpuid_DEPENDENCIES)
+ @rm -f cpuid$(EXEEXT)
+ $(LINK) $(cpuid_OBJECTS) $(cpuid_LDADD) $(LIBS)
+cse_fail$(EXEEXT): $(cse_fail_OBJECTS) $(cse_fail_DEPENDENCIES)
+ @rm -f cse_fail$(EXEEXT)
+ $(LINK) $(cse_fail_OBJECTS) $(cse_fail_LDADD) $(LIBS)
+faultstatus$(EXEEXT): $(faultstatus_OBJECTS) $(faultstatus_DEPENDENCIES)
+ @rm -f faultstatus$(EXEEXT)
+ $(LINK) $(faultstatus_OBJECTS) $(faultstatus_LDADD) $(LIBS)
+fcmovnu$(EXEEXT): $(fcmovnu_OBJECTS) $(fcmovnu_DEPENDENCIES)
+ @rm -f fcmovnu$(EXEEXT)
+ $(LINK) $(fcmovnu_OBJECTS) $(fcmovnu_LDADD) $(LIBS)
+fpu_lazy_eflags$(EXEEXT): $(fpu_lazy_eflags_OBJECTS) $(fpu_lazy_eflags_DEPENDENCIES)
+ @rm -f fpu_lazy_eflags$(EXEEXT)
+ $(fpu_lazy_eflags_LINK) $(fpu_lazy_eflags_OBJECTS) $(fpu_lazy_eflags_LDADD) $(LIBS)
+fxtract$(EXEEXT): $(fxtract_OBJECTS) $(fxtract_DEPENDENCIES)
+ @rm -f fxtract$(EXEEXT)
+ $(LINK) $(fxtract_OBJECTS) $(fxtract_LDADD) $(LIBS)
+getseg$(EXEEXT): $(getseg_OBJECTS) $(getseg_DEPENDENCIES)
+ @rm -f getseg$(EXEEXT)
+ $(LINK) $(getseg_OBJECTS) $(getseg_LDADD) $(LIBS)
+incdec_alt$(EXEEXT): $(incdec_alt_OBJECTS) $(incdec_alt_DEPENDENCIES)
+ @rm -f incdec_alt$(EXEEXT)
+ $(LINK) $(incdec_alt_OBJECTS) $(incdec_alt_LDADD) $(LIBS)
+insn_basic$(EXEEXT): $(insn_basic_OBJECTS) $(insn_basic_DEPENDENCIES)
+ @rm -f insn_basic$(EXEEXT)
+ $(LINK) $(insn_basic_OBJECTS) $(insn_basic_LDADD) $(LIBS)
+insn_cmov$(EXEEXT): $(insn_cmov_OBJECTS) $(insn_cmov_DEPENDENCIES)
+ @rm -f insn_cmov$(EXEEXT)
+ $(LINK) $(insn_cmov_OBJECTS) $(insn_cmov_LDADD) $(LIBS)
+insn_fpu$(EXEEXT): $(insn_fpu_OBJECTS) $(insn_fpu_DEPENDENCIES)
+ @rm -f insn_fpu$(EXEEXT)
+ $(LINK) $(insn_fpu_OBJECTS) $(insn_fpu_LDADD) $(LIBS)
+insn_mmx$(EXEEXT): $(insn_mmx_OBJECTS) $(insn_mmx_DEPENDENCIES)
+ @rm -f insn_mmx$(EXEEXT)
+ $(LINK) $(insn_mmx_OBJECTS) $(insn_mmx_LDADD) $(LIBS)
+insn_mmxext$(EXEEXT): $(insn_mmxext_OBJECTS) $(insn_mmxext_DEPENDENCIES)
+ @rm -f insn_mmxext$(EXEEXT)
+ $(LINK) $(insn_mmxext_OBJECTS) $(insn_mmxext_LDADD) $(LIBS)
+insn_sse$(EXEEXT): $(insn_sse_OBJECTS) $(insn_sse_DEPENDENCIES)
+ @rm -f insn_sse$(EXEEXT)
+ $(LINK) $(insn_sse_OBJECTS) $(insn_sse_LDADD) $(LIBS)
+insn_sse2$(EXEEXT): $(insn_sse2_OBJECTS) $(insn_sse2_DEPENDENCIES)
+ @rm -f insn_sse2$(EXEEXT)
+ $(LINK) $(insn_sse2_OBJECTS) $(insn_sse2_LDADD) $(LIBS)
+insn_sse3$(EXEEXT): $(insn_sse3_OBJECTS) $(insn_sse3_DEPENDENCIES)
+ @rm -f insn_sse3$(EXEEXT)
+ $(LINK) $(insn_sse3_OBJECTS) $(insn_sse3_LDADD) $(LIBS)
+insn_ssse3$(EXEEXT): $(insn_ssse3_OBJECTS) $(insn_ssse3_DEPENDENCIES)
+ @rm -f insn_ssse3$(EXEEXT)
+ $(LINK) $(insn_ssse3_OBJECTS) $(insn_ssse3_LDADD) $(LIBS)
+int$(EXEEXT): $(int_OBJECTS) $(int_DEPENDENCIES)
+ @rm -f int$(EXEEXT)
+ $(LINK) $(int_OBJECTS) $(int_LDADD) $(LIBS)
+jcxz$(EXEEXT): $(jcxz_OBJECTS) $(jcxz_DEPENDENCIES)
+ @rm -f jcxz$(EXEEXT)
+ $(LINK) $(jcxz_OBJECTS) $(jcxz_LDADD) $(LIBS)
+lahf$(EXEEXT): $(lahf_OBJECTS) $(lahf_DEPENDENCIES)
+ @rm -f lahf$(EXEEXT)
+ $(LINK) $(lahf_OBJECTS) $(lahf_LDADD) $(LIBS)
+looper$(EXEEXT): $(looper_OBJECTS) $(looper_DEPENDENCIES)
+ @rm -f looper$(EXEEXT)
+ $(LINK) $(looper_OBJECTS) $(looper_LDADD) $(LIBS)
+lzcnt32$(EXEEXT): $(lzcnt32_OBJECTS) $(lzcnt32_DEPENDENCIES)
+ @rm -f lzcnt32$(EXEEXT)
+ $(LINK) $(lzcnt32_OBJECTS) $(lzcnt32_LDADD) $(LIBS)
+movx$(EXEEXT): $(movx_OBJECTS) $(movx_DEPENDENCIES)
+ @rm -f movx$(EXEEXT)
+ $(LINK) $(movx_OBJECTS) $(movx_LDADD) $(LIBS)
+pushpopseg$(EXEEXT): $(pushpopseg_OBJECTS) $(pushpopseg_DEPENDENCIES)
+ @rm -f pushpopseg$(EXEEXT)
+ $(LINK) $(pushpopseg_OBJECTS) $(pushpopseg_LDADD) $(LIBS)
+sbbmisc$(EXEEXT): $(sbbmisc_OBJECTS) $(sbbmisc_DEPENDENCIES)
+ @rm -f sbbmisc$(EXEEXT)
+ $(LINK) $(sbbmisc_OBJECTS) $(sbbmisc_LDADD) $(LIBS)
+smc1$(EXEEXT): $(smc1_OBJECTS) $(smc1_DEPENDENCIES)
+ @rm -f smc1$(EXEEXT)
+ $(LINK) $(smc1_OBJECTS) $(smc1_LDADD) $(LIBS)
+ssse3_misaligned$(EXEEXT): $(ssse3_misaligned_OBJECTS) $(ssse3_misaligned_DEPENDENCIES)
+ @rm -f ssse3_misaligned$(EXEEXT)
+ $(LINK) $(ssse3_misaligned_OBJECTS) $(ssse3_misaligned_LDADD) $(LIBS)
+x86locked$(EXEEXT): $(x86locked_OBJECTS) $(x86locked_DEPENDENCIES)
+ @rm -f x86locked$(EXEEXT)
+ $(x86locked_LINK) $(x86locked_OBJECTS) $(x86locked_LDADD) $(LIBS)
+xadd$(EXEEXT): $(xadd_OBJECTS) $(xadd_DEPENDENCIES)
+ @rm -f xadd$(EXEEXT)
+ $(LINK) $(xadd_OBJECTS) $(xadd_LDADD) $(LIBS)
+yield$(EXEEXT): $(yield_OBJECTS) $(yield_DEPENDENCIES)
+ @rm -f yield$(EXEEXT)
+ $(LINK) $(yield_OBJECTS) $(yield_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+include ./$(DEPDIR)/badseg.Po
+include ./$(DEPDIR)/bt_everything.Po
+include ./$(DEPDIR)/bt_literal.Po
+include ./$(DEPDIR)/bug125959-x86.Po
+include ./$(DEPDIR)/bug126147-x86.Po
+include ./$(DEPDIR)/bug132813-x86.Po
+include ./$(DEPDIR)/bug135421-x86.Po
+include ./$(DEPDIR)/bug137714-x86.Po
+include ./$(DEPDIR)/bug152818-x86.Po
+include ./$(DEPDIR)/cmpxchg8b.Po
+include ./$(DEPDIR)/cpuid_c.Po
+include ./$(DEPDIR)/cpuid_s.Po
+include ./$(DEPDIR)/cse_fail.Po
+include ./$(DEPDIR)/faultstatus.Po
+include ./$(DEPDIR)/fcmovnu.Po
+include ./$(DEPDIR)/fpu_lazy_eflags-fpu_lazy_eflags.Po
+include ./$(DEPDIR)/fxtract.Po
+include ./$(DEPDIR)/getseg.Po
+include ./$(DEPDIR)/incdec_alt.Po
+include ./$(DEPDIR)/insn_basic.Po
+include ./$(DEPDIR)/insn_cmov.Po
+include ./$(DEPDIR)/insn_fpu.Po
+include ./$(DEPDIR)/insn_mmx.Po
+include ./$(DEPDIR)/insn_mmxext.Po
+include ./$(DEPDIR)/insn_sse.Po
+include ./$(DEPDIR)/insn_sse2.Po
+include ./$(DEPDIR)/insn_sse3.Po
+include ./$(DEPDIR)/insn_ssse3.Po
+include ./$(DEPDIR)/int.Po
+include ./$(DEPDIR)/jcxz.Po
+include ./$(DEPDIR)/lahf.Po
+include ./$(DEPDIR)/looper.Po
+include ./$(DEPDIR)/lzcnt32.Po
+include ./$(DEPDIR)/movx.Po
+include ./$(DEPDIR)/pushpopseg.Po
+include ./$(DEPDIR)/sbbmisc.Po
+include ./$(DEPDIR)/smc1.Po
+include ./$(DEPDIR)/ssse3_misaligned.Po
+include ./$(DEPDIR)/x86locked-x86locked.Po
+include ./$(DEPDIR)/xadd.Po
+include ./$(DEPDIR)/yield.Po
+
+.S.o:
+ $(CPPASCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) \
+# $(CPPASCOMPILE) -c -o $@ $<
+
+.S.obj:
+ $(CPPASCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCASDEPMODE) $(depcomp) \
+# $(CPPASCOMPILE) -c -o $@ `$(CYGPATH_W) '$<'`
+
+.c.o:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c $<
+
+.c.obj:
+ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+# source='$<' object='$@' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
+fpu_lazy_eflags-fpu_lazy_eflags.o: fpu_lazy_eflags.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(fpu_lazy_eflags_CFLAGS) $(CFLAGS) -MT fpu_lazy_eflags-fpu_lazy_eflags.o -MD -MP -MF $(DEPDIR)/fpu_lazy_eflags-fpu_lazy_eflags.Tpo -c -o fpu_lazy_eflags-fpu_lazy_eflags.o `test -f 'fpu_lazy_eflags.c' || echo '$(srcdir)/'`fpu_lazy_eflags.c
+ mv -f $(DEPDIR)/fpu_lazy_eflags-fpu_lazy_eflags.Tpo $(DEPDIR)/fpu_lazy_eflags-fpu_lazy_eflags.Po
+# source='fpu_lazy_eflags.c' object='fpu_lazy_eflags-fpu_lazy_eflags.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(fpu_lazy_eflags_CFLAGS) $(CFLAGS) -c -o fpu_lazy_eflags-fpu_lazy_eflags.o `test -f 'fpu_lazy_eflags.c' || echo '$(srcdir)/'`fpu_lazy_eflags.c
+
+fpu_lazy_eflags-fpu_lazy_eflags.obj: fpu_lazy_eflags.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(fpu_lazy_eflags_CFLAGS) $(CFLAGS) -MT fpu_lazy_eflags-fpu_lazy_eflags.obj -MD -MP -MF $(DEPDIR)/fpu_lazy_eflags-fpu_lazy_eflags.Tpo -c -o fpu_lazy_eflags-fpu_lazy_eflags.obj `if test -f 'fpu_lazy_eflags.c'; then $(CYGPATH_W) 'fpu_lazy_eflags.c'; else $(CYGPATH_W) '$(srcdir)/fpu_lazy_eflags.c'; fi`
+ mv -f $(DEPDIR)/fpu_lazy_eflags-fpu_lazy_eflags.Tpo $(DEPDIR)/fpu_lazy_eflags-fpu_lazy_eflags.Po
+# source='fpu_lazy_eflags.c' object='fpu_lazy_eflags-fpu_lazy_eflags.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(fpu_lazy_eflags_CFLAGS) $(CFLAGS) -c -o fpu_lazy_eflags-fpu_lazy_eflags.obj `if test -f 'fpu_lazy_eflags.c'; then $(CYGPATH_W) 'fpu_lazy_eflags.c'; else $(CYGPATH_W) '$(srcdir)/fpu_lazy_eflags.c'; fi`
+
+x86locked-x86locked.o: x86locked.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(x86locked_CFLAGS) $(CFLAGS) -MT x86locked-x86locked.o -MD -MP -MF $(DEPDIR)/x86locked-x86locked.Tpo -c -o x86locked-x86locked.o `test -f 'x86locked.c' || echo '$(srcdir)/'`x86locked.c
+ mv -f $(DEPDIR)/x86locked-x86locked.Tpo $(DEPDIR)/x86locked-x86locked.Po
+# source='x86locked.c' object='x86locked-x86locked.o' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(x86locked_CFLAGS) $(CFLAGS) -c -o x86locked-x86locked.o `test -f 'x86locked.c' || echo '$(srcdir)/'`x86locked.c
+
+x86locked-x86locked.obj: x86locked.c
+ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(x86locked_CFLAGS) $(CFLAGS) -MT x86locked-x86locked.obj -MD -MP -MF $(DEPDIR)/x86locked-x86locked.Tpo -c -o x86locked-x86locked.obj `if test -f 'x86locked.c'; then $(CYGPATH_W) 'x86locked.c'; else $(CYGPATH_W) '$(srcdir)/x86locked.c'; fi`
+ mv -f $(DEPDIR)/x86locked-x86locked.Tpo $(DEPDIR)/x86locked-x86locked.Po
+# source='x86locked.c' object='x86locked-x86locked.obj' libtool=no \
+# DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) \
+# $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(x86locked_CFLAGS) $(CFLAGS) -c -o x86locked-x86locked.obj `if test -f 'x86locked.c'; then $(CYGPATH_W) 'x86locked.c'; else $(CYGPATH_W) '$(srcdir)/x86locked.c'; fi`
+
+ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES)
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ mkid -fID $$unique
+tags: TAGS
+
+TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ here=`pwd`; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ if test -z "$(ETAGS_ARGS)$$tags$$unique"; then :; else \
+ test -n "$$unique" || unique=$$empty_fix; \
+ $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
+ $$tags $$unique; \
+ fi
+ctags: CTAGS
+CTAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ test -z "$(CTAGS_ARGS)$$tags$$unique" \
+ || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
+ $$tags $$unique
+
+GTAGS:
+ here=`$(am__cd) $(top_builddir) && pwd` \
+ && cd $(top_srcdir) \
+ && gtags -i $(GTAGS_ARGS) $$here
+
+distclean-tags:
+ -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
+
+distdir: $(DISTFILES)
+ @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ list='$(DISTFILES)'; \
+ dist_files=`for file in $$list; do echo $$file; done | \
+ sed -e "s|^$$srcdirstrip/||;t" \
+ -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \
+ case $$dist_files in \
+ */*) $(MKDIR_P) `echo "$$dist_files" | \
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+clean-generic:
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+
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+#----------------------------------------------------------------------------
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+build-noinst_DSYMS: $(noinst_DSYMS)
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+# This is used by coregrind/Makefile.am and Makefile.tool.am for doing
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+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
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+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
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+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
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+# This needs to be depended on by a 'clean-local' rule.
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+check-local: build-noinst_DSYMS
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+clean-local: clean-noinst_DSYMS
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+.def.c: $(srcdir)/gen_insn_test.pl
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+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
--- /dev/null
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
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+# This file is used for tool tests, and also in perf/Makefile.am.
+
+# This file should be included (directly or indirectly) by every
+# Makefile.am that builds programs. And also the top-level Makefile.am.
+
+#----------------------------------------------------------------------------
+# Global stuff
+#----------------------------------------------------------------------------
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+VPATH = @srcdir@
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+ bt_literal$(EXEEXT) bug125959-x86$(EXEEXT) \
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+# Some of the tests (bug125959_x86, bug152818_x86, insn_*) need
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+# but it caused problems with the generation of insn_*.c. So just use this
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+ $(insn_cmov_SOURCES) $(insn_fpu_SOURCES) $(insn_mmx_SOURCES) \
+ $(insn_mmxext_SOURCES) $(insn_sse_SOURCES) \
+ $(insn_sse2_SOURCES) $(insn_sse3_SOURCES) \
+ $(insn_ssse3_SOURCES) int.c jcxz.c lahf.c looper.c lzcnt32.c \
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+ x86locked.c xadd.c yield.c
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+ $(insn_ssse3_SOURCES) int.c jcxz.c lahf.c looper.c lzcnt32.c \
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+PACKAGE_STRING = @PACKAGE_STRING@
+PACKAGE_TARNAME = @PACKAGE_TARNAME@
+PACKAGE_VERSION = @PACKAGE_VERSION@
+PATH_SEPARATOR = @PATH_SEPARATOR@
+PERL = @PERL@
+PKG_CONFIG = @PKG_CONFIG@
+PREFERRED_STACK_BOUNDARY = @PREFERRED_STACK_BOUNDARY@
+QTCORE_CFLAGS = @QTCORE_CFLAGS@
+QTCORE_LIBS = @QTCORE_LIBS@
+RANLIB = @RANLIB@
+SED = @SED@
+SET_MAKE = @SET_MAKE@
+SHELL = @SHELL@
+STRIP = @STRIP@
+VALT_LOAD_ADDRESS_PRI = @VALT_LOAD_ADDRESS_PRI@
+VALT_LOAD_ADDRESS_SEC = @VALT_LOAD_ADDRESS_SEC@
+VERSION = @VERSION@
+VGCONF_ARCH_PRI = @VGCONF_ARCH_PRI@
+VGCONF_ARCH_SEC = @VGCONF_ARCH_SEC@
+VGCONF_OS = @VGCONF_OS@
+VGCONF_PLATFORM_PRI_CAPS = @VGCONF_PLATFORM_PRI_CAPS@
+VGCONF_PLATFORM_SEC_CAPS = @VGCONF_PLATFORM_SEC_CAPS@
+abs_builddir = @abs_builddir@
+abs_srcdir = @abs_srcdir@
+abs_top_builddir = @abs_top_builddir@
+abs_top_srcdir = @abs_top_srcdir@
+ac_ct_CC = @ac_ct_CC@
+ac_ct_CXX = @ac_ct_CXX@
+am__include = @am__include@
+am__leading_dot = @am__leading_dot@
+am__quote = @am__quote@
+am__tar = @am__tar@
+am__untar = @am__untar@
+bindir = @bindir@
+build = @build@
+build_alias = @build_alias@
+build_cpu = @build_cpu@
+build_os = @build_os@
+build_vendor = @build_vendor@
+builddir = @builddir@
+datadir = @datadir@
+datarootdir = @datarootdir@
+docdir = @docdir@
+dvidir = @dvidir@
+exec_prefix = @exec_prefix@
+host = @host@
+host_alias = @host_alias@
+host_cpu = @host_cpu@
+host_os = @host_os@
+host_vendor = @host_vendor@
+htmldir = @htmldir@
+includedir = @includedir@
+infodir = @infodir@
+install_sh = @install_sh@
+libdir = @libdir@
+libexecdir = @libexecdir@
+localedir = @localedir@
+localstatedir = @localstatedir@
+mandir = @mandir@
+mkdir_p = @mkdir_p@
+oldincludedir = @oldincludedir@
+pdfdir = @pdfdir@
+prefix = @prefix@
+program_transform_name = @program_transform_name@
+psdir = @psdir@
+sbindir = @sbindir@
+sharedstatedir = @sharedstatedir@
+srcdir = @srcdir@
+sysconfdir = @sysconfdir@
+target_alias = @target_alias@
+top_builddir = @top_builddir@
+top_srcdir = @top_srcdir@
+inplacedir = $(top_builddir)/.in_place
+
+#----------------------------------------------------------------------------
+# Flags
+#----------------------------------------------------------------------------
+
+# Baseline flags for all compilations. Aim here is to maximise
+# performance and get whatever useful warnings we can out of gcc.
+AM_CFLAGS_BASE = \
+ -O2 -g \
+ -Wall \
+ -Wmissing-prototypes \
+ -Wshadow \
+ -Wpointer-arith \
+ -Wstrict-prototypes \
+ -Wmissing-declarations \
+ @FLAG_W_NO_FORMAT_ZERO_LENGTH@ \
+ -fno-strict-aliasing
+
+@VGCONF_OS_IS_DARWIN_FALSE@AM_CFLAGS_PIC = -fpic -O -g -fno-omit-frame-pointer -fno-strict-aliasing
+
+# These flags are used for building the preload shared objects.
+# The aim is to give reasonable performance but also to have good
+# stack traces, since users often see stack traces extending
+# into (and through) the preloads.
+@VGCONF_OS_IS_DARWIN_TRUE@AM_CFLAGS_PIC = -dynamic -O -g -fno-omit-frame-pointer -fno-strict-aliasing \
+@VGCONF_OS_IS_DARWIN_TRUE@ -mno-dynamic-no-pic -fpic -fPIC
+
+
+# Flags for specific targets.
+#
+# Nb: the AM_CPPFLAGS_* values are suitable for building tools and auxprogs.
+# For building the core, coregrind/Makefile.am files add some extra things.
+#
+# Also: in newer versions of automake (1.10 onwards?) asm files ending with
+# '.S' are considered "pre-processed" (as opposed to those ending in '.s')
+# and so the CPPFLAGS are passed to the assembler. But this is not true for
+# older automakes (e.g. 1.8.5, 1.9.6), sigh. So we include
+# AM_CPPFLAGS_<PLATFORM> in each AM_CCASFLAGS_<PLATFORM> variable. This
+# means some of the flags are duplicated on systems with newer versions of
+# automake, but this does not really matter and seems hard to avoid.
+AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@ = \
+ -I$(top_srcdir) \
+ -I$(top_srcdir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_@VGCONF_ARCH_PRI@=1 \
+ -DVGO_@VGCONF_OS@=1 \
+ -DVGP_@VGCONF_ARCH_PRI@_@VGCONF_OS@=1
+
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@AM_CPPFLAGS_@VGCONF_PLATFORM_SEC_CAPS@ = \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir) \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir)/include \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -I$(top_srcdir)/VEX/pub \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGA_@VGCONF_ARCH_SEC@=1 \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGO_@VGCONF_OS@=1 \
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@ -DVGP_@VGCONF_ARCH_SEC@_@VGCONF_OS@=1
+
+AM_FLAG_M3264_X86_LINUX = @FLAG_M32@
+AM_CFLAGS_X86_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
+ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_X86_LINUX = $(AM_CPPFLAGS_X86_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_AMD64_LINUX = @FLAG_M64@
+AM_CFLAGS_AMD64_LINUX = @FLAG_M64@ -fomit-frame-pointer \
+ @PREFERRED_STACK_BOUNDARY@ $(AM_CFLAGS_BASE)
+
+AM_CCASFLAGS_AMD64_LINUX = $(AM_CPPFLAGS_AMD64_LINUX) @FLAG_M64@ -g
+AM_FLAG_M3264_PPC32_LINUX = @FLAG_M32@
+AM_CFLAGS_PPC32_LINUX = @FLAG_M32@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_LINUX = $(AM_CPPFLAGS_PPC32_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_PPC64_LINUX = @FLAG_M64@
+AM_CFLAGS_PPC64_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_LINUX = $(AM_CPPFLAGS_PPC64_LINUX) @FLAG_M64@ -g
+AM_FLAG_M3264_ARM_LINUX = @FLAG_M32@
+AM_CFLAGS_ARM_LINUX = @FLAG_M32@ @PREFERRED_STACK_BOUNDARY@ \
+ $(AM_CFLAGS_BASE) -marm
+
+AM_CCASFLAGS_ARM_LINUX = $(AM_CPPFLAGS_ARM_LINUX) @FLAG_M32@ -g
+AM_FLAG_M3264_PPC32_AIX5 = @FLAG_MAIX32@
+AM_CFLAGS_PPC32_AIX5 = @FLAG_MAIX32@ -mcpu=powerpc $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 = $(AM_CPPFLAGS_PPC32_AIX5) \
+ @FLAG_MAIX32@ -mcpu=powerpc -g
+
+AM_FLAG_M3264_PPC64_AIX5 = @FLAG_MAIX64@
+AM_CFLAGS_PPC64_AIX5 = @FLAG_MAIX64@ -mcpu=powerpc64 $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 = $(AM_CPPFLAGS_PPC64_AIX5) \
+ @FLAG_MAIX64@ -mcpu=powerpc64 -g
+
+AM_FLAG_M3264_X86_DARWIN = -arch i386
+AM_CFLAGS_X86_DARWIN = $(WERROR) -arch i386 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 \
+ -fno-stack-protector -fno-pic -fno-PIC
+
+AM_CCASFLAGS_X86_DARWIN = $(AM_CPPFLAGS_X86_DARWIN) -arch i386 -g
+AM_FLAG_M3264_AMD64_DARWIN = -arch x86_64
+AM_CFLAGS_AMD64_DARWIN = $(WERROR) -arch x86_64 $(AM_CFLAGS_BASE) \
+ -mmacosx-version-min=10.5 -fno-stack-protector
+
+AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g
+
+# Flags for the primary target. These must be used to build the
+# regtests and performance tests. In fact, these must be used to
+# build anything which is built only once on a dual-arch build.
+#
+AM_FLAG_M3264_PRI = $(AM_FLAG_M3264_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CPPFLAGS_PRI = $(AM_CPPFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CFLAGS_PRI = $(AM_CFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+AM_CCASFLAGS_PRI = $(AM_CCASFLAGS_@VGCONF_PLATFORM_PRI_CAPS@)
+@VGCONF_HAVE_PLATFORM_SEC_FALSE@AM_FLAG_M3264_SEC =
+@VGCONF_HAVE_PLATFORM_SEC_TRUE@AM_FLAG_M3264_SEC = $(AM_FLAG_M3264_@VGCONF_PLATFORM_SEC_CAPS@)
+
+# Baseline link flags for making vgpreload shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX = -nodefaultlibs -shared -Wl,-z,interpose,-z,initfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 = -nodefaultlibs -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_COMMON_DARWIN = -dynamic -dynamiclib -all_load
+PRELOAD_LDFLAGS_X86_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_AMD64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_PPC32_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC64_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@
+PRELOAD_LDFLAGS_ARM_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M32@
+PRELOAD_LDFLAGS_PPC32_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX32@
+PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX64@
+PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386
+PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64
+AM_CPPFLAGS = -I$(top_srcdir) -I$(top_srcdir)/include \
+ -I$(top_srcdir)/coregrind -I$(top_builddir)/include \
+ -I$(top_srcdir)/VEX/pub \
+ -DVGA_$(VGCONF_ARCH_PRI)=1 \
+ -DVGO_$(VGCONF_OS)=1 \
+ -DVGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS)=1
+
+# Nb: Tools need to augment these flags with an arch-selection option, such
+# as $(AM_FLAG_M3264_PRI).
+AM_CFLAGS = -Winline -Wall -Wshadow -g @FLAG_M32@ $(FLAG_MMMX) \
+ $(FLAG_MSSE) $(am__append_5)
+AM_CXXFLAGS = -Winline -Wall -Wshadow -g @FLAG_M32@ $(FLAG_MMMX) \
+ $(FLAG_MSSE)
+# Include AM_CPPFLAGS in AM_CCASFLAGS to allow for older versions of
+# automake; see comments in Makefile.all.am for more detail.
+AM_CCASFLAGS = $(AM_CPPFLAGS) @FLAG_M32@
+@VGCONF_OS_IS_DARWIN_TRUE@noinst_DSYMS = $(check_PROGRAMS)
+dist_noinst_SCRIPTS = filter_cpuid filter_stderr gen_insn_test.pl
+CLEANFILES = $(addsuffix .c,$(INSN_TESTS))
+INSN_TESTS = insn_basic insn_fpu insn_cmov insn_mmx insn_mmxext \
+ insn_sse insn_sse2 $(am__append_1) $(am__append_2)
+
+# Explicitly include insn_sse3 even if ! BUILD_SSE3_TESTS,
+# to avoid packaging screwups if 'make dist' is run on a machine
+# which failed the BUILD_SSE3_TESTS test in configure.in.
+EXTRA_DIST = \
+ badseg.stderr.exp badseg.stdout.exp badseg.vgtest \
+ bt_everything.stderr.exp bt_everything.stdout.exp bt_everything.vgtest \
+ bt_literal.stderr.exp bt_literal.stdout.exp bt_literal.vgtest \
+ bug125959-x86.stderr.exp bug125959-x86.stdout.exp bug125959-x86.vgtest \
+ bug126147-x86.stderr.exp bug126147-x86.stdout.exp bug126147-x86.vgtest \
+ bug132813-x86.stderr.exp bug132813-x86.stdout.exp bug132813-x86.vgtest \
+ bug135421-x86.stderr.exp bug135421-x86.stdout.exp bug135421-x86.vgtest \
+ bug137714-x86.stderr.exp bug137714-x86.stdout.exp bug137714-x86.vgtest \
+ bug152818-x86.stderr.exp bug152818-x86.stdout.exp bug152818-x86.vgtest \
+ cmpxchg8b.stderr.exp cmpxchg8b.stdout.exp cmpxchg8b.vgtest \
+ cpuid.stderr.exp cpuid.stdout.exp cpuid.vgtest \
+ cse_fail.stderr.exp cse_fail.stdout.exp cse_fail.vgtest \
+ faultstatus.disabled faultstatus.stderr.exp \
+ fcmovnu.vgtest fcmovnu.stderr.exp fcmovnu.stdout.exp \
+ fpu_lazy_eflags.stderr.exp fpu_lazy_eflags.stdout.exp \
+ fpu_lazy_eflags.vgtest \
+ fxtract.stdout.exp fxtract.stderr.exp fxtract.vgtest \
+ getseg.stdout.exp getseg.stderr.exp getseg.vgtest \
+ incdec_alt.stdout.exp incdec_alt.stderr.exp incdec_alt.vgtest \
+ int.stderr.exp int.stdout.exp int.disabled \
+ $(addsuffix .stderr.exp,$(INSN_TESTS)) \
+ $(addsuffix .stdout.exp,$(INSN_TESTS)) \
+ $(addsuffix .vgtest,$(INSN_TESTS)) \
+ insn_sse3.stdout.exp insn_sse3.stderr.exp insn_sse3.vgtest \
+ insn_ssse3.stdout.exp insn_ssse3.stderr.exp insn_ssse3.vgtest \
+ jcxz.stdout.exp jcxz.stderr.exp jcxz.vgtest \
+ lahf.stdout.exp lahf.stderr.exp lahf.vgtest \
+ looper.stderr.exp looper.stdout.exp looper.vgtest \
+ lzcnt32.stderr.exp lzcnt32.stdout.exp lzcnt32.vgtest \
+ movx.stderr.exp movx.stdout.exp movx.vgtest \
+ pushpopseg.stderr.exp pushpopseg.stdout.exp pushpopseg.vgtest \
+ sbbmisc.stderr.exp sbbmisc.stdout.exp sbbmisc.vgtest \
+ smc1.stderr.exp smc1.stdout.exp smc1.vgtest \
+ ssse3_misaligned.stderr.exp ssse3_misaligned.stdout.exp \
+ ssse3_misaligned.vgtest ssse3_misaligned.c \
+ x86locked.vgtest x86locked.stdout.exp x86locked.stderr.exp \
+ yield.stderr.exp yield.stdout.exp yield.disabled \
+ xadd.stdout.exp xadd.stderr.exp xadd.vgtest
+
+cpuid_SOURCES = cpuid_c.c cpuid_s.S
+# fpu_lazy_eflags must use these flags -- the bug only occurred with them.
+fpu_lazy_eflags_CFLAGS = $(AM_CFLAGS) -O2 -march=pentiumpro
+fxtract_LDADD = -lm
+insn_basic_SOURCES = insn_basic.def
+insn_basic_LDADD = -lm
+insn_fpu_SOURCES = insn_fpu.def
+insn_fpu_LDADD = -lm
+insn_cmov_SOURCES = insn_cmov.def
+insn_cmov_LDADD = -lm
+insn_mmx_SOURCES = insn_mmx.def
+insn_mmx_LDADD = -lm
+insn_mmxext_SOURCES = insn_mmxext.def
+insn_mmxext_LDADD = -lm
+insn_sse_SOURCES = insn_sse.def
+insn_sse_LDADD = -lm
+insn_sse2_SOURCES = insn_sse2.def
+insn_sse2_LDADD = -lm
+insn_sse3_SOURCES = insn_sse3.def
+insn_sse3_LDADD = -lm
+insn_ssse3_SOURCES = insn_ssse3.def
+insn_ssse3_LDADD = -lm
+x86locked_CFLAGS = $(AM_CFLAGS) -O
+yield_LDADD = -lpthread
+all: all-am
+
+.SUFFIXES:
+.SUFFIXES: .S .c .def .o .obj
+$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(top_srcdir)/Makefile.tool-tests.am $(top_srcdir)/Makefile.all.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \
+ && { if test -f $@; then exit 0; else break; fi; }; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign none/tests/x86/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign none/tests/x86/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-checkPROGRAMS:
+ -test -z "$(check_PROGRAMS)" || rm -f $(check_PROGRAMS)
+badseg$(EXEEXT): $(badseg_OBJECTS) $(badseg_DEPENDENCIES)
+ @rm -f badseg$(EXEEXT)
+ $(LINK) $(badseg_OBJECTS) $(badseg_LDADD) $(LIBS)
+bt_everything$(EXEEXT): $(bt_everything_OBJECTS) $(bt_everything_DEPENDENCIES)
+ @rm -f bt_everything$(EXEEXT)
+ $(LINK) $(bt_everything_OBJECTS) $(bt_everything_LDADD) $(LIBS)
+bt_literal$(EXEEXT): $(bt_literal_OBJECTS) $(bt_literal_DEPENDENCIES)
+ @rm -f bt_literal$(EXEEXT)
+ $(LINK) $(bt_literal_OBJECTS) $(bt_literal_LDADD) $(LIBS)
+bug125959-x86$(EXEEXT): $(bug125959_x86_OBJECTS) $(bug125959_x86_DEPENDENCIES)
+ @rm -f bug125959-x86$(EXEEXT)
+ $(LINK) $(bug125959_x86_OBJECTS) $(bug125959_x86_LDADD) $(LIBS)
+bug126147-x86$(EXEEXT): $(bug126147_x86_OBJECTS) $(bug126147_x86_DEPENDENCIES)
+ @rm -f bug126147-x86$(EXEEXT)
+ $(LINK) $(bug126147_x86_OBJECTS) $(bug126147_x86_LDADD) $(LIBS)
+bug132813-x86$(EXEEXT): $(bug132813_x86_OBJECTS) $(bug132813_x86_DEPENDENCIES)
+ @rm -f bug132813-x86$(EXEEXT)
+ $(LINK) $(bug132813_x86_OBJECTS) $(bug132813_x86_LDADD) $(LIBS)
+bug135421-x86$(EXEEXT): $(bug135421_x86_OBJECTS) $(bug135421_x86_DEPENDENCIES)
+ @rm -f bug135421-x86$(EXEEXT)
+ $(LINK) $(bug135421_x86_OBJECTS) $(bug135421_x86_LDADD) $(LIBS)
+bug137714-x86$(EXEEXT): $(bug137714_x86_OBJECTS) $(bug137714_x86_DEPENDENCIES)
+ @rm -f bug137714-x86$(EXEEXT)
+ $(LINK) $(bug137714_x86_OBJECTS) $(bug137714_x86_LDADD) $(LIBS)
+bug152818-x86$(EXEEXT): $(bug152818_x86_OBJECTS) $(bug152818_x86_DEPENDENCIES)
+ @rm -f bug152818-x86$(EXEEXT)
+ $(LINK) $(bug152818_x86_OBJECTS) $(bug152818_x86_LDADD) $(LIBS)
+cmpxchg8b$(EXEEXT): $(cmpxchg8b_OBJECTS) $(cmpxchg8b_DEPENDENCIES)
+ @rm -f cmpxchg8b$(EXEEXT)
+ $(LINK) $(cmpxchg8b_OBJECTS) $(cmpxchg8b_LDADD) $(LIBS)
+cpuid$(EXEEXT): $(cpuid_OBJECTS) $(cpuid_DEPENDENCIES)
+ @rm -f cpuid$(EXEEXT)
+ $(LINK) $(cpuid_OBJECTS) $(cpuid_LDADD) $(LIBS)
+cse_fail$(EXEEXT): $(cse_fail_OBJECTS) $(cse_fail_DEPENDENCIES)
+ @rm -f cse_fail$(EXEEXT)
+ $(LINK) $(cse_fail_OBJECTS) $(cse_fail_LDADD) $(LIBS)
+faultstatus$(EXEEXT): $(faultstatus_OBJECTS) $(faultstatus_DEPENDENCIES)
+ @rm -f faultstatus$(EXEEXT)
+ $(LINK) $(faultstatus_OBJECTS) $(faultstatus_LDADD) $(LIBS)
+fcmovnu$(EXEEXT): $(fcmovnu_OBJECTS) $(fcmovnu_DEPENDENCIES)
+ @rm -f fcmovnu$(EXEEXT)
+ $(LINK) $(fcmovnu_OBJECTS) $(fcmovnu_LDADD) $(LIBS)
+fpu_lazy_eflags$(EXEEXT): $(fpu_lazy_eflags_OBJECTS) $(fpu_lazy_eflags_DEPENDENCIES)
+ @rm -f fpu_lazy_eflags$(EXEEXT)
+ $(fpu_lazy_eflags_LINK) $(fpu_lazy_eflags_OBJECTS) $(fpu_lazy_eflags_LDADD) $(LIBS)
+fxtract$(EXEEXT): $(fxtract_OBJECTS) $(fxtract_DEPENDENCIES)
+ @rm -f fxtract$(EXEEXT)
+ $(LINK) $(fxtract_OBJECTS) $(fxtract_LDADD) $(LIBS)
+getseg$(EXEEXT): $(getseg_OBJECTS) $(getseg_DEPENDENCIES)
+ @rm -f getseg$(EXEEXT)
+ $(LINK) $(getseg_OBJECTS) $(getseg_LDADD) $(LIBS)
+incdec_alt$(EXEEXT): $(incdec_alt_OBJECTS) $(incdec_alt_DEPENDENCIES)
+ @rm -f incdec_alt$(EXEEXT)
+ $(LINK) $(incdec_alt_OBJECTS) $(incdec_alt_LDADD) $(LIBS)
+insn_basic$(EXEEXT): $(insn_basic_OBJECTS) $(insn_basic_DEPENDENCIES)
+ @rm -f insn_basic$(EXEEXT)
+ $(LINK) $(insn_basic_OBJECTS) $(insn_basic_LDADD) $(LIBS)
+insn_cmov$(EXEEXT): $(insn_cmov_OBJECTS) $(insn_cmov_DEPENDENCIES)
+ @rm -f insn_cmov$(EXEEXT)
+ $(LINK) $(insn_cmov_OBJECTS) $(insn_cmov_LDADD) $(LIBS)
+insn_fpu$(EXEEXT): $(insn_fpu_OBJECTS) $(insn_fpu_DEPENDENCIES)
+ @rm -f insn_fpu$(EXEEXT)
+ $(LINK) $(insn_fpu_OBJECTS) $(insn_fpu_LDADD) $(LIBS)
+insn_mmx$(EXEEXT): $(insn_mmx_OBJECTS) $(insn_mmx_DEPENDENCIES)
+ @rm -f insn_mmx$(EXEEXT)
+ $(LINK) $(insn_mmx_OBJECTS) $(insn_mmx_LDADD) $(LIBS)
+insn_mmxext$(EXEEXT): $(insn_mmxext_OBJECTS) $(insn_mmxext_DEPENDENCIES)
+ @rm -f insn_mmxext$(EXEEXT)
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+ mkdir -p $(inplacedir); \
+ for f in $(noinst_PROGRAMS) ; do \
+ rm -f $(inplacedir)/$$f; \
+ ln -f -s ../$(subdir)/$$f $(inplacedir); \
+ done
+
+# Similar to inplace-noinst_PROGRAMS
+inplace-noinst_DSYMS: build-noinst_DSYMS
+ mkdir -p $(inplacedir); \
+ for f in $(noinst_DSYMS); do \
+ rm -f $(inplacedir)/$$f.dSYM; \
+ ln -f -s ../$(subdir)/$$f.dSYM $(inplacedir); \
+ done
+
+# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
+# "make install". It copies $(noinst_PROGRAMS) into $prefix/lib/valgrind/.
+# It needs to be depended on by an 'install-exec-local' rule.
+install-noinst_PROGRAMS: $(noinst_PROGRAMS)
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_PROGRAMS); do \
+ $(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
+ done
+
+# Similar to install-noinst_PROGRAMS.
+# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
+# directories. XXX: not sure whether the resulting permissions will be
+# correct when using 'cp -R'...
+install-noinst_DSYMS: build-noinst_DSYMS
+ $(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
+ for f in $(noinst_DSYMS); do \
+ cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
+ done
+
+# This needs to be depended on by a 'clean-local' rule.
+clean-noinst_DSYMS:
+ for f in $(noinst_DSYMS); do \
+ rm -rf $$f.dSYM; \
+ done
+
+check-local: build-noinst_DSYMS
+
+clean-local: clean-noinst_DSYMS
+
+.def.c: $(srcdir)/gen_insn_test.pl
+ $(PERL) $(srcdir)/gen_insn_test.pl < $< > $@
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/perf
svn://svn.valgrind.org/valgrind
10
dir
-11404
+11429
svn://svn.valgrind.org/valgrind/trunk/tests
svn://svn.valgrind.org/valgrind
projects / sdk / tools / upstream / valgrind.git / commitdiff