drm/amd/display: Add CP_IRQ clear capability

[Why]
Currently we do not clear the CP_IRQ bit upon receiving it.

[How]
Added a function to clear CP_IRQ bit.

Signed-off-by: Harmanprit Tatla <harmanprit.tatla@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
index e9fbd94f8635e7654c7a701f604c8ceecdfd5c15..a82975970e87079443ddee88eb453943eed239d9 100644 (file)
--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
+++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.c
@@ -470,6 +470,15 @@ enum mod_hdcp_status mod_hdcp_process_event(struct mod_hdcp *hdcp,
                if (reset_status != MOD_HDCP_STATUS_SUCCESS)
                        push_error_status(hdcp, reset_status);
        }
+
+       /* Clear CP_IRQ status if needed */
+       if (event_ctx.event == MOD_HDCP_EVENT_CPIRQ &&
+                       event_ctx.unexpected_event == 0) {
+               status = mod_hdcp_clear_cp_irq_status(hdcp);
+               if (status != MOD_HDCP_STATUS_SUCCESS)
+                       push_error_status(hdcp, status);
+       }
+
        return status;
 }
 

diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h
index b0cefed2eb02660b7f43d5ad7b83a9d2edbbb453..6c678cfb82e39898f7e5134b9dc96d9d739e107e 100644 (file)
--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h
+++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h
@@ -386,6 +386,7 @@ enum mod_hdcp_status mod_hdcp_write_eks(struct mod_hdcp *hdcp);
 enum mod_hdcp_status mod_hdcp_write_repeater_auth_ack(struct mod_hdcp *hdcp);
 enum mod_hdcp_status mod_hdcp_write_stream_manage(struct mod_hdcp *hdcp);
 enum mod_hdcp_status mod_hdcp_write_content_type(struct mod_hdcp *hdcp);
+enum mod_hdcp_status mod_hdcp_clear_cp_irq_status(struct mod_hdcp *hdcp);
 
 /* hdcp version helpers */
 static inline uint8_t is_dp_hdcp(struct mod_hdcp *hdcp)

diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c
index bb5130f4228dba70b0574b2e45a1569483cbe0d6..9dd8c854fd8193144cc22fc258e88b6f35f11d75 100644 (file)
--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c
+++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c
@@ -645,3 +645,22 @@ enum mod_hdcp_status mod_hdcp_write_content_type(struct mod_hdcp *hdcp)
                status = MOD_HDCP_STATUS_INVALID_OPERATION;
        return status;
 }
+
+enum mod_hdcp_status mod_hdcp_clear_cp_irq_status(struct mod_hdcp *hdcp)
+{
+       uint8_t clear_cp_irq_bit = 2;
+       uint32_t size = 1;
+
+       if (is_dp_hdcp(hdcp)) {
+               if (hdcp->connection.link.dp.rev >= 0x14)
+                       return hdcp->config.ddc.funcs.write_dpcd(hdcp->config.ddc.handle,
+                                       DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0, &clear_cp_irq_bit, size)
+                                       ? MOD_HDCP_STATUS_SUCCESS : MOD_HDCP_STATUS_DDC_FAILURE;
+               else
+                       return hdcp->config.ddc.funcs.write_dpcd(hdcp->config.ddc.handle,
+                                       DP_DEVICE_SERVICE_IRQ_VECTOR, &clear_cp_irq_bit, size)
+                                       ? MOD_HDCP_STATUS_SUCCESS : MOD_HDCP_STATUS_DDC_FAILURE;
+       }
+
+       return MOD_HDCP_STATUS_INVALID_OPERATION;
+}