arm64: dts: mediatek: cherry: Add edptx and dptx support
authorBo-Chen Chen <rex-bc.chen@mediatek.com>
Thu, 10 Nov 2022 06:37:16 +0000 (14:37 +0800)
committerMatthias Brugger <matthias.bgg@gmail.com>
Mon, 21 Nov 2022 12:15:00 +0000 (13:15 +0100)
In cherry projects, we use edptx as the internal display interface
and use dptx as the external display interface. To support this, we
need to add more properties.

- Add pinctrls for edptx and dptx.
- Add ports for edptx and dptx.

The port connections for the internal and external display:
dp-intf0 -> edptx -> panel
dp-intf1 -> dptx

The edptx endpoint is kept empty for now, as the panel addition will
come in a later commit.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221110063716.25677-5-rex-bc.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi

index 303dc32..560103e 100644 (file)
 
        port {
                dp_intf0_out: endpoint {
+                       remote-endpoint = <&edp_in>;
                };
        };
 };
 
        port {
                dp_intf1_out: endpoint {
+                       remote-endpoint = <&dptx_in>;
+               };
+       };
+};
+
+&edp_tx {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&edptx_pins_default>;
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+                       edp_in: endpoint {
+                               remote-endpoint = <&dp_intf0_out>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+                       edp_out: endpoint {
+                               data-lanes = <0 1 2 3>;
+                       };
+               };
+       };
+};
+
+&dp_tx {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&dptx_pin>;
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+                       dptx_in: endpoint {
+                               remote-endpoint = <&dp_intf1_out>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+                       dptx_out: endpoint {
+                               data-lanes = <0 1 2 3>;
+                       };
                };
        };
 };
                };
        };
 
+       edptx_pins_default: edptx-default-pins {
+               pins-cmd-dat {
+                       pinmux = <PINMUX_GPIO7__FUNC_EDP_TX_HPD>;
+                       bias-pull-up;
+               };
+       };
+
+       dptx_pin: dptx-default-pins {
+               pins-cmd-dat {
+                       pinmux = <PINMUX_GPIO18__FUNC_DP_TX_HPD>;
+                       bias-pull-up;
+               };
+       };
+
        i2c0_pins: i2c0-default-pins {
                pins-bus {
                        pinmux = <PINMUX_GPIO8__FUNC_SDA0>,