ARM: dts: s5pv210: Adjust memory reg entries to match spec

The reg property of memory nodes should have pairs of offset, size;
not all memory banks lumped in as one.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/CY4PR04MB05677849A13F41BF603906DFCB1C9@CY4PR04MB0567.namprd04.prod.outlook.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/arch/arm/boot/dts/s5pv210-aquila.dts b/arch/arm/boot/dts/s5pv210-aquila.dts
index 54de3bc..bc0b735 100644 (file)
--- a/arch/arm/boot/dts/s5pv210-aquila.dts
+++ b/arch/arm/boot/dts/s5pv210-aquila.dts
@@ -29,8 +29,7 @@
 
        memory@30000000 {
                device_type = "memory";
-               reg = <0x30000000 0x05000000
-                       0x40000000 0x18000000>;
+               reg = <0x30000000 0x05000000>, <0x40000000 0x18000000>;
        };
 
        pmic_ap_clk: clock-0 {

diff --git a/arch/arm/boot/dts/s5pv210-aries.dtsi b/arch/arm/boot/dts/s5pv210-aries.dtsi
index 9ae4c4a..32216aa 100644 (file)
--- a/arch/arm/boot/dts/s5pv210-aries.dtsi
+++ b/arch/arm/boot/dts/s5pv210-aries.dtsi
@@ -24,9 +24,9 @@
 
        memory@30000000 {
                device_type = "memory";
-               reg = <0x30000000 0x05000000
-                       0x40000000 0x10000000
-                       0x50000000 0x08000000>;
+               reg = <0x30000000 0x05000000>,
+                       <0x40000000 0x10000000>,
+                       <0x50000000 0x08000000>;
        };
 
        reserved-memory {

diff --git a/arch/arm/boot/dts/s5pv210-goni.dts b/arch/arm/boot/dts/s5pv210-goni.dts
index c6f3914..d32f42d 100644 (file)
--- a/arch/arm/boot/dts/s5pv210-goni.dts
+++ b/arch/arm/boot/dts/s5pv210-goni.dts
@@ -30,9 +30,9 @@
 
        memory@30000000 {
                device_type = "memory";
-               reg = <0x30000000 0x05000000
-                       0x40000000 0x10000000
-                       0x50000000 0x08000000>;
+               reg = <0x30000000 0x05000000>,
+                       <0x40000000 0x10000000>,
+                       <0x50000000 0x08000000>;
        };
 
        pmic_ap_clk: clock-0 {