rs6000.md (floatunssidf2_internal splitter): Use base register operand, not hard...

	* rs6000.md (floatunssidf2_internal splitter): Use base register
	operand, not hard-coded SP.

From-SVN: r23548

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2e80549..87c79fe 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+Fri Nov  6 16:35:10 1998  David Edelsohn  <edelsohn@mhpcc.edu>
+
+       * rs6000.md (floatunssidf2_internal splitter): Use base register
+       operand, not hard-coded SP.
+
 Fri Nov  6 04:07:53 1998  David S. Miller  <davem@pierdol.cobaltmicro.com>
 
        * jump.c (calculate_can_reach_end): Fix thinko.

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 7b7f989..53a5eee 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -3704,7 +3704,7 @@
        (unsigned_float:DF (match_operand:SI 1 "gpc_reg_operand" "")))
    (use (match_operand:SI 2 "gpc_reg_operand" ""))
    (use (match_operand:DF 3 "gpc_reg_operand" ""))
-   (clobber (match_operand 4 "gpc_reg_operand" "=b"))
+   (clobber (match_operand 4 "gpc_reg_operand" ""))
    (clobber (reg:DF 76))]
   "TARGET_HARD_FLOAT"
   [(set (match_dup 4)
@@ -3718,7 +3718,7 @@
                 (match_dup 5)] 13))    ;; high word
    (set (match_dup 0)
        (unspec [(match_dup 5)
-                (reg:SI 1)] 14))
+                (match_dup 4)] 14))
    (set (match_dup 0)
        (minus:DF (match_dup 0)
                  (match_dup 3)))]