#include "ac_gpu_info.h"
#include "ac_perfcounter.h"
+#include "ac_spm.h"
#include "util/u_memory.h"
#include "util/macros.h"
.num_spm_counters = 1,
.num_spm_wires = 2,
- .spm_block_select = 0x0,
+ .spm_block_select = AC_SPM_SE_BLOCK_CB,
};
/* cik_CPC */
.num_spm_counters = 1,
.num_spm_wires = 2,
- .spm_block_select = 0x1,
+ .spm_block_select = AC_SPM_GLOBAL_BLOCK_CPC,
};
/* cik_CPF */
.num_spm_counters = 1,
.num_spm_wires = 2,
- .spm_block_select = 0x2,
+ .spm_block_select = AC_SPM_GLOBAL_BLOCK_CPF,
};
/* cik_CPG */
.num_spm_counters = 1,
.num_spm_wires = 2,
- .spm_block_select = 0x0,
+ .spm_block_select = AC_SPM_GLOBAL_BLOCK_CPG,
};
/* cik_DB */
.num_spm_counters = 1,
.num_spm_wires = 2,
- .spm_block_select = 0x3,
+ .spm_block_select = AC_SPM_GLOBAL_BLOCK_GDS,
};
/* cik_GRBM */
.num_spm_counters = 1,
.num_spm_wires = 2,
- .spm_block_select = 0x4,
+ .spm_block_select = AC_SPM_SE_BLOCK_SC,
};
/* cik_PA_SU */
.num_spm_counters = 4,
.num_spm_wires = 8,
- .spm_block_select = 0x8,
+ .spm_block_select = AC_SPM_SE_BLOCK_SPI,
};
/* cik_SQ */
.num_spm_counters = 2,
.num_spm_wires = 4,
- .spm_block_select = 0x3,
+ .spm_block_select = AC_SPM_SE_BLOCK_SX,
};
/* cik_TA */
.num_spm_counters = 1,
.num_spm_wires = 2,
- .spm_block_select = 0x5,
+ .spm_block_select = AC_SPM_SE_BLOCK_TA,
};
/* cik_TD */
.num_spm_counters = 1,
.num_spm_wires = 2,
- .spm_block_select = 0x6,
+ .spm_block_select = AC_SPM_SE_BLOCK_TD,
};
/* cik_TCA */
.num_spm_counters = 1,
.num_spm_wires = 2,
- .spm_block_select = 0xc,
+ .spm_block_select = AC_SPM_GLOBAL_BLOCK_CHA,
};
/* gfx10_CHCG */
.num_spm_counters = 1,
.num_spm_wires = 2,
- .spm_block_select = 0xe,
+ .spm_block_select = AC_SPM_GLOBAL_BLOCK_CHCG,
};
/* gfx10_CHC */
.num_spm_counters = 1,
.num_spm_wires = 2,
- .spm_block_select = 0xd,
+ .spm_block_select = AC_SPM_GLOBAL_BLOCK_CHC,
};
/* gfx10_DB */
.num_spm_counters = 2,
.num_spm_wires = 4,
- .spm_block_select = 0x1,
+ .spm_block_select = AC_SPM_SE_BLOCK_DB,
};
/* gfx10_GCR */
.num_spm_counters = 1,
.num_spm_wires = 2,
- .spm_block_select = 0x4,
+ .spm_block_select = AC_SPM_GLOBAL_BLOCK_GCR,
};
/* gfx10_GE */
.num_spm_counters = 4,
.num_spm_wires = 8,
- .spm_block_select = 0x6,
+ .spm_block_select = AC_SPM_GLOBAL_BLOCK_GE,
};
/* gfx10_GL1A */
.num_spm_counters = 1,
.num_spm_wires = 2,
- .spm_block_select = 0xa,
+ .spm_block_select = AC_SPM_SE_BLOCK_GL1A,
};
/* gfx10_GL1C */
.num_spm_counters = 1,
.num_spm_wires = 2,
- .spm_block_select = 0xc
+ .spm_block_select = AC_SPM_SE_BLOCK_GL1C,
};
/* gfx10_GL2A */
.num_spm_counters = 2,
.num_spm_wires = 4,
- .spm_block_select = 0x7,
+ .spm_block_select = AC_SPM_GLOBAL_BLOCK_GL2A,
};
/* gfx10_GL2C */
.num_spm_counters = 2,
.num_spm_wires = 4,
- .spm_block_select = 0x8,
+ .spm_block_select = AC_SPM_GLOBAL_BLOCK_GL2C,
};
/* gfx10_PA_PH */
.num_spm_counters = 4,
.num_spm_wires = 8,
- .spm_block_select = 0x5,
+ .spm_block_select = AC_SPM_GLOBAL_BLOCK_PH,
};
/* gfx10_PA_SU */
.num_spm_counters = 4,
.num_spm_wires = 8,
- .spm_block_select = 0x2,
+ .spm_block_select = AC_SPM_SE_BLOCK_PA,
};
/* gfx10_RLC */
.num_spm_counters = 2,
.num_spm_wires = 2,
- .spm_block_select = 0xb,
+ .spm_block_select = AC_SPM_SE_BLOCK_RMI,
};
/* gfx10_SQ */
.counter0_lo = R_034700_SQ_PERFCOUNTER0_LO,
.num_spm_wires = 16,
- .spm_block_select = 0x9,
+ .spm_block_select = AC_SPM_SE_BLOCK_SQG,
};
/* gfx10_TCP */
.num_spm_counters = 2,
.num_spm_wires = 4,
- .spm_block_select = 0x7,
+ .spm_block_select = AC_SPM_SE_BLOCK_TCP,
};
/* gfx10_UTCL1 */
#define AC_SPM_MUXSEL_LINE_SIZE ((AC_SPM_NUM_COUNTER_PER_MUXSEL * 2) / 4) /* in dwords */
#define AC_SPM_NUM_PERF_SEL 4
+/* GFX10+ */
+enum ac_spm_global_block {
+ AC_SPM_GLOBAL_BLOCK_CPG,
+ AC_SPM_GLOBAL_BLOCK_CPC,
+ AC_SPM_GLOBAL_BLOCK_CPF,
+ AC_SPM_GLOBAL_BLOCK_GDS,
+ AC_SPM_GLOBAL_BLOCK_GCR,
+ AC_SPM_GLOBAL_BLOCK_PH,
+ AC_SPM_GLOBAL_BLOCK_GE,
+ AC_SPM_GLOBAL_BLOCK_GE1 = AC_SPM_GLOBAL_BLOCK_GE,
+ AC_SPM_GLOBAL_BLOCK_GL2A,
+ AC_SPM_GLOBAL_BLOCK_GL2C,
+ AC_SPM_GLOBAL_BLOCK_SDMA,
+ AC_SPM_GLOBAL_BLOCK_GUS,
+ AC_SPM_GLOBAL_BLOCK_EA,
+ AC_SPM_GLOBAL_BLOCK_CHA,
+ AC_SPM_GLOBAL_BLOCK_CHC,
+ AC_SPM_GLOBAL_BLOCK_CHCG,
+ AC_SPM_GLOBAL_BLOCK_GPUVMATTCL2,
+ AC_SPM_GLOBAL_BLOCK_GPUVMVML2,
+ AC_SPM_GLOBAL_BLOCK_GE2SE, /* Per-SE counters */
+ AC_SPM_GLOBAL_BLOCK_GE2DIST,
+
+ /* GFX11+ */
+ /* gap */
+ AC_SPM_GLOBAL_BLOCK_RSPM = 31,
+};
+
+enum ac_spm_se_block {
+ AC_SPM_SE_BLOCK_CB,
+ AC_SPM_SE_BLOCK_DB,
+ AC_SPM_SE_BLOCK_PA,
+ AC_SPM_SE_BLOCK_SX,
+ AC_SPM_SE_BLOCK_SC,
+ AC_SPM_SE_BLOCK_TA,
+ AC_SPM_SE_BLOCK_TD,
+ AC_SPM_SE_BLOCK_TCP,
+ AC_SPM_SE_BLOCK_SPI,
+ AC_SPM_SE_BLOCK_SQG,
+ AC_SPM_SE_BLOCK_GL1A,
+ AC_SPM_SE_BLOCK_RMI,
+ AC_SPM_SE_BLOCK_GL1C,
+ AC_SPM_SE_BLOCK_GL1CG,
+
+ /* GFX11+ */
+ AC_SPM_SE_BLOCK_CBR,
+ AC_SPM_SE_BLOCK_DBR,
+ AC_SPM_SE_BLOCK_GL1H,
+ AC_SPM_SE_BLOCK_SQC,
+ AC_SPM_SE_BLOCK_PC,
+ /* gap */
+ AC_SPM_SE_BLOCK_SE_RPM = 31,
+};
+
enum ac_spm_segment_type {
AC_SPM_SEGMENT_TYPE_SE0,
AC_SPM_SEGMENT_TYPE_SE1,