// Try to find umax(a,b) - b or a - umin(a,b) patterns
// they may be converted to usubsat(a,b).
- if (Op0.getOpcode() == ISD::UMAX) {
+ if (Op0.getOpcode() == ISD::UMAX && Op0.hasOneUse()) {
SDValue MaxLHS = Op0.getOperand(0);
SDValue MaxRHS = Op0.getOperand(1);
if (MaxLHS == Op1)
return getTruncatedUSUBSAT(DstVT, SubVT, MaxLHS, Op1, DAG, SDLoc(N));
}
- if (Op1.getOpcode() == ISD::UMIN) {
+ if (Op1.getOpcode() == ISD::UMIN && Op1.hasOneUse()) {
SDValue MinLHS = Op1.getOperand(0);
SDValue MinRHS = Op1.getOperand(1);
if (MinLHS == Op0)
// sub(a,trunc(umin(zext(a),b))) -> usubsat(a,trunc(umin(b,SatLimit)))
if (Op1.getOpcode() == ISD::TRUNCATE &&
- Op1.getOperand(0).getOpcode() == ISD::UMIN) {
+ Op1.getOperand(0).getOpcode() == ISD::UMIN &&
+ Op1.getOperand(0).hasOneUse()) {
SDValue MinLHS = Op1.getOperand(0).getOperand(0);
SDValue MinRHS = Op1.getOperand(0).getOperand(1);
if (MinLHS.getOpcode() == ISD::ZERO_EXTEND && MinLHS.getOperand(0) == Op0)
ret <4 x i128> %c
}
+define i64 @unsigned_sat_constant_i64_with_single_use(i64 %x) {
+; CHECK-LABEL: unsigned_sat_constant_i64_with_single_use:
+; CHECK: # %bb.0:
+; CHECK-NEXT: addi 4, 3, -4
+; CHECK-NEXT: cmpld 4, 3
+; CHECK-NEXT: iselgt 3, 0, 4
+; CHECK-NEXT: blr
+ %umin = call i64 @llvm.umin.i64(i64 %x, i64 4)
+ %sub = sub i64 %x, %umin
+ ret i64 %sub
+}
+
+define i64 @unsigned_sat_constant_i64_with_multiple_use(i64 %x, i64 %y) {
+; CHECK-LABEL: unsigned_sat_constant_i64_with_multiple_use:
+; CHECK: # %bb.0:
+; CHECK-NEXT: li 5, 4
+; CHECK-NEXT: cmpldi 3, 4
+; CHECK-NEXT: isellt 5, 3, 5
+; CHECK-NEXT: sub 3, 3, 5
+; CHECK-NEXT: add 4, 4, 5
+; CHECK-NEXT: mulld 3, 3, 4
+; CHECK-NEXT: blr
+ %umin = call i64 @llvm.umin.i64(i64 %x, i64 4)
+ %sub = sub i64 %x, %umin
+ %add = add i64 %y, %umin
+ %res = mul i64 %sub, %add
+ ret i64 %res
+}
+
+declare i64 @llvm.umin.i64(i64, i64)