arm_boot: Pass ARMCPU to arm_boot_info::write_secondary_boot()

Adapt exynos4210 and highbank accordingly.
The parameter itself is unused.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Igor Mitsyanko <i.mitsyanko@samsung.com> (for exynos)

diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index 2f46e214cf4b842e09593a716a9f8873bd82a8e0..320033dba512f4cb729b9188fde6d8e74baa7d25 100644 (file)
--- a/hw/arm-misc.h
+++ b/hw/arm-misc.h
@@ -50,7 +50,7 @@ struct arm_boot_info {
      * perform any necessary CPU reset handling and set the PC for thei
      * secondary CPUs to point at this boot blob.
      */
-    void (*write_secondary_boot)(CPUARMState *env,
+    void (*write_secondary_boot)(ARMCPU *cpu,
                                  const struct arm_boot_info *info);
     void (*secondary_cpu_reset_hook)(CPUARMState *env,
                                      const struct arm_boot_info *info);

diff --git a/hw/arm_boot.c b/hw/arm_boot.c
index eb2d1760b0c1ebacf06ac1c6e9f66a10e2252ef3..4955f019a874257132bbc7a40e95df4ad08a51f8 100644 (file)
--- a/hw/arm_boot.c
+++ b/hw/arm_boot.c
@@ -59,7 +59,7 @@ static uint32_t smpboot[] = {
   0           /* bootreg: Boot register address is held here */
 };
 
-static void default_write_secondary(CPUARMState *env,
+static void default_write_secondary(ARMCPU *cpu,
                                     const struct arm_boot_info *info)
 {
     int n;
@@ -303,7 +303,7 @@ static void do_cpu_reset(void *opaque)
 
 void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
 {
-    ARMCPU *cpu;
+    ARMCPU *cpu = arm_env_get_cpu(env);
     int kernel_size;
     int initrd_size;
     int n;
@@ -402,7 +402,7 @@ void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
         rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader),
                            info->loader_start);
         if (info->nb_cpus > 1) {
-            info->write_secondary_boot(env, info);
+            info->write_secondary_boot(cpu, info);
         }
     }
     info->is_linux = is_linux;

diff --git a/hw/exynos4210.c b/hw/exynos4210.c
index afc4bdc7e07e0761eade5139ccff24645f0063de..ae538376443abdfcdea1b0fb794cc54b74f6168c 100644 (file)
--- a/hw/exynos4210.c
+++ b/hw/exynos4210.c
@@ -65,7 +65,7 @@
 static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43,
                                     0x09, 0x00, 0x00, 0x00 };
 
-void exynos4210_write_secondary(CPUARMState *env,
+void exynos4210_write_secondary(ARMCPU *cpu,
         const struct arm_boot_info *info)
 {
     int n;

diff --git a/hw/exynos4210.h b/hw/exynos4210.h
index f7c7027302e3789e00973668f3d65240ea021573..b520676c6243f88aa190aeb1cba2e76608b8e8ae 100644 (file)
--- a/hw/exynos4210.h
+++ b/hw/exynos4210.h
@@ -97,7 +97,7 @@ typedef struct Exynos4210State {
     MemoryRegion bootreg_mem;
 } Exynos4210State;
 
-void exynos4210_write_secondary(CPUARMState *env,
+void exynos4210_write_secondary(ARMCPU *cpu,
         const struct arm_boot_info *info);
 
 Exynos4210State *exynos4210_init(MemoryRegion *system_mem,

diff --git a/hw/highbank.c b/hw/highbank.c
index 4d6d728a28569029ad508932f9b34f0575f71ccb..45ca1ad757921a131a1c25030f0278e7b902d233 100644 (file)
--- a/hw/highbank.c
+++ b/hw/highbank.c
@@ -36,7 +36,7 @@
 
 /* Board init.  */
 
-static void hb_write_secondary(CPUARMState *env, const struct arm_boot_info *info)
+static void hb_write_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
 {
     int n;
     uint32_t smpboot[] = {