target-ppc: Altivec 2.07: vmuluw Instruction

This patch adds the Vector Multiply Unsigned Word Modulo (vmuluwm)
instruction.

The existing VARITH_DO macro is re-used to (trivially) instantiate
the helper code.

Since bits 21-31 of any vmuluwm instruction is 137, the instruction
is coded as a dual to vmulouw (bits 21-31 = 136).

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>

diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index ca184472b271c325381cff5bf49fdb9e0a4ce261..c20d50e3d2ea4db8e9634810d8f384b75a53c6d3 100644 (file)
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -176,6 +176,7 @@ DEF_HELPER_3(vmulosw, void, avr, avr, avr)
 DEF_HELPER_3(vmuloub, void, avr, avr, avr)
 DEF_HELPER_3(vmulouh, void, avr, avr, avr)
 DEF_HELPER_3(vmulouw, void, avr, avr, avr)
+DEF_HELPER_3(vmuluwm, void, avr, avr, avr)
 DEF_HELPER_3(vsrab, void, avr, avr, avr)
 DEF_HELPER_3(vsrah, void, avr, avr, avr)
 DEF_HELPER_3(vsraw, void, avr, avr, avr)

diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 09590c71a26187097ba7f4e7139044f67b75570b..7a50f4a2cf04db16b03aebac4693909aa45970e4 100644 (file)
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -505,6 +505,7 @@ VARITH(ubm, u8)
 VARITH(uhm, u16)
 VARITH(uwm, u32)
 VARITH(udm, u64)
+VARITH_DO(muluwm, *, u32)
 #undef VARITH_DO
 #undef VARITH
 

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 4d2579df86cb95daebf35360ca7a4a41acc53f9c..ca253e07191b0c2db6399908916edcf8b269cdee 100644 (file)
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -6964,6 +6964,9 @@ GEN_VXFORM(vmrglw, 6, 6);
 GEN_VXFORM(vmuloub, 4, 0);
 GEN_VXFORM(vmulouh, 4, 1);
 GEN_VXFORM(vmulouw, 4, 2);
+GEN_VXFORM(vmuluwm, 4, 2);
+GEN_VXFORM_DUAL(vmulouw, PPC_ALTIVEC, PPC_NONE,
+                vmuluwm, PPC_NONE, PPC2_ALTIVEC_207)
 GEN_VXFORM(vmulosb, 4, 4);
 GEN_VXFORM(vmulosh, 4, 5);
 GEN_VXFORM(vmulosw, 4, 6);
@@ -10375,7 +10378,7 @@ GEN_VXFORM(vmrglh, 6, 5),
 GEN_VXFORM(vmrglw, 6, 6),
 GEN_VXFORM(vmuloub, 4, 0),
 GEN_VXFORM(vmulouh, 4, 1),
-GEN_VXFORM_207(vmulouw, 4, 2),
+GEN_VXFORM_DUAL(vmulouw, vmuluwm, 4, 2, PPC_ALTIVEC, PPC_NONE),
 GEN_VXFORM(vmulosb, 4, 4),
 GEN_VXFORM(vmulosh, 4, 5),
 GEN_VXFORM_207(vmulosw, 4, 6),