arm64: dts: renesas: Miscellaneous whitespace fixes
authorGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 18 Jan 2022 16:48:31 +0000 (17:48 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 28 Jan 2022 09:59:14 +0000 (10:59 +0100)
Make whitespace and indentation more consistent.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3f2bcae1253c7a31d3eb6755185092a1f2b99b09.1642524439.git.geert+renesas@glider.be
14 files changed:
arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
arch/arm64/boot/dts/renesas/r8a774a1.dtsi
arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dts
arch/arm64/boot/dts/renesas/r8a774b1.dtsi
arch/arm64/boot/dts/renesas/r8a774c0.dtsi
arch/arm64/boot/dts/renesas/r8a774e1-beacon-rzg2h-kit.dts
arch/arm64/boot/dts/renesas/r8a774e1.dtsi
arch/arm64/boot/dts/renesas/r8a77951.dtsi
arch/arm64/boot/dts/renesas/r8a77960.dtsi
arch/arm64/boot/dts/renesas/r8a77961.dtsi
arch/arm64/boot/dts/renesas/r8a77965.dtsi
arch/arm64/boot/dts/renesas/r8a77990.dtsi
arch/arm64/boot/dts/renesas/r8a77995.dtsi
arch/arm64/boot/dts/renesas/r8a779a0.dtsi

index 2692cc6..5ad6cd1 100644 (file)
                clocks = <&x304_clk>;
                clock-names = "xin";
 
-               assigned-clocks = <&versaclock6_bb 1>,
-                                  <&versaclock6_bb 2>,
-                                  <&versaclock6_bb 3>,
-                                  <&versaclock6_bb 4>;
-               assigned-clock-rates =  <24000000>, <24000000>, <24000000>, <24576000>;
+               assigned-clocks = <&versaclock6_bb 1>, <&versaclock6_bb 2>,
+                                 <&versaclock6_bb 3>, <&versaclock6_bb 4>;
+               assigned-clock-rates = <24000000>, <24000000>, <24000000>,
+                                      <24576000>;
 
                OUT1 {
                        idt,mode = <VC5_CMOS>;
index eda6a84..1284612 100644 (file)
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
-                       reg =   <0 0xec500000 0 0x1000>, /* SCU */
-                               <0 0xec5a0000 0 0x100>,  /* ADG */
-                               <0 0xec540000 0 0x1000>, /* SSIU */
-                               <0 0xec541000 0 0x280>,  /* SSI */
-                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
+                       compatible = "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3";
+                       reg = <0 0xec500000 0 0x1000>, /* SCU */
+                             <0 0xec5a0000 0 0x100>,  /* ADG */
+                             <0 0xec540000 0 0x1000>, /* SSIU */
+                             <0 0xec541000 0 0x280>,  /* SSI */
+                             <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
                        reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
                        clocks = <&cpg CPG_MOD 1005>,
                                        dma-names = "rx", "tx";
                                };
                                ssiu40: ssiu-32 {
-                                       dmas =  <&audma0 0x71>, <&audma1 0x72>;
+                                       dmas = <&audma0 0x71>, <&audma1 0x72>;
                                        dma-names = "rx", "tx";
                                };
                                ssiu41: ssiu-33 {
index 3c0d59d..89d7083 100644 (file)
@@ -11,7 +11,7 @@
 
 / {
        model = "Beacon Embedded Works RZ/G2N Development Kit";
-       compatible =    "beacon,beacon-rzg2n", "renesas,r8a774b1";
+       compatible = "beacon,beacon-rzg2n", "renesas,r8a774b1";
 
        aliases {
                serial0 = &scif2;
index 44f79fb..a4b406a 100644 (file)
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3";
+                       compatible = "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3";
                        reg = <0 0xec500000 0 0x1000>, /* SCU */
                              <0 0xec5a0000 0 0x100>,  /* ADG */
                              <0 0xec540000 0 0x1000>, /* SSIU */
                                        dma-names = "rx", "tx";
                                };
                                ssiu40: ssiu-32 {
-                                       dmas =  <&audma0 0x71>, <&audma1 0x72>;
+                                       dmas = <&audma0 0x71>, <&audma1 0x72>;
                                        dma-names = "rx", "tx";
                                };
                                ssiu41: ssiu-33 {
index b8dcbbb..e123c8d 100644 (file)
                         */
                        compatible = "renesas,rcar_sound-r8a774c0",
                                     "renesas,rcar_sound-gen3";
-                       reg =   <0 0xec500000 0 0x1000>, /* SCU */
-                               <0 0xec5a0000 0 0x100>,  /* ADG */
-                               <0 0xec540000 0 0x1000>, /* SSIU */
-                               <0 0xec541000 0 0x280>,  /* SSI */
-                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
+                       reg = <0 0xec500000 0 0x1000>, /* SCU */
+                             <0 0xec5a0000 0 0x100>,  /* ADG */
+                             <0 0xec540000 0 0x1000>, /* SSIU */
+                             <0 0xec541000 0 0x280>,  /* SSI */
+                             <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
                        reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
                        clocks = <&cpg CPG_MOD 1005>,
index 7b6649a..3e9ced3 100644 (file)
@@ -11,7 +11,7 @@
 
 / {
        model = "Beacon Embedded Works RZ/G2H Development Kit";
-       compatible =    "beacon,beacon-rzg2h", "renesas,r8a774e1";
+       compatible = "beacon,beacon-rzg2h", "renesas,r8a774e1";
 
        aliases {
                serial0 = &scif2;
index e6d8610..989c1c0 100644 (file)
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a774e1", "renesas,rcar_sound-gen3";
+                       compatible = "renesas,rcar_sound-r8a774e1", "renesas,rcar_sound-gen3";
                        reg = <0 0xec500000 0 0x1000>, /* SCU */
                              <0 0xec5a0000 0 0x100>,  /* ADG */
                              <0 0xec540000 0 0x1000>, /* SSIU */
                                        dma-names = "rx", "tx";
                                };
                                ssiu40: ssiu-32 {
-                                       dmas =  <&audma0 0x71>, <&audma1 0x72>;
+                                       dmas = <&audma0 0x71>, <&audma1 0x72>;
                                        dma-names = "rx", "tx";
                                };
                                ssiu41: ssiu-33 {
index 9265a57..4e294b1 100644 (file)
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
-                       reg =   <0 0xec500000 0 0x1000>, /* SCU */
-                               <0 0xec5a0000 0 0x100>,  /* ADG */
-                               <0 0xec540000 0 0x1000>, /* SSIU */
-                               <0 0xec541000 0 0x280>,  /* SSI */
-                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
+                       compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
+                       reg = <0 0xec500000 0 0x1000>, /* SCU */
+                             <0 0xec5a0000 0 0x100>,  /* ADG */
+                             <0 0xec540000 0 0x1000>, /* SSIU */
+                             <0 0xec541000 0 0x280>,  /* SSI */
+                             <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
                        reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
                        clocks = <&cpg CPG_MOD 1005>,
                                        dma-names = "rx", "tx";
                                };
                                ssiu40: ssiu-32 {
-                                       dmas =  <&audma0 0x71>, <&audma1 0x72>;
+                                       dmas = <&audma0 0x71>, <&audma1 0x72>;
                                        dma-names = "rx", "tx";
                                };
                                ssiu41: ssiu-33 {
index 26f7103..6cdb062 100644 (file)
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
-                       reg =   <0 0xec500000 0 0x1000>, /* SCU */
-                               <0 0xec5a0000 0 0x100>,  /* ADG */
-                               <0 0xec540000 0 0x1000>, /* SSIU */
-                               <0 0xec541000 0 0x280>,  /* SSI */
-                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
+                       compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
+                       reg = <0 0xec500000 0 0x1000>, /* SCU */
+                             <0 0xec5a0000 0 0x100>,  /* ADG */
+                             <0 0xec540000 0 0x1000>, /* SSIU */
+                             <0 0xec541000 0 0x280>,  /* SSI */
+                             <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
                        reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
                        clocks = <&cpg CPG_MOD 1005>,
                                        dma-names = "rx", "tx";
                                };
                                ssiu40: ssiu-32 {
-                                       dmas =  <&audma0 0x71>, <&audma1 0x72>;
+                                       dmas = <&audma0 0x71>, <&audma1 0x72>;
                                        dma-names = "rx", "tx";
                                };
                                ssiu41: ssiu-33 {
index 59509e2..b6e4fd5 100644 (file)
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a77961", "renesas,rcar_sound-gen3";
+                       compatible = "renesas,rcar_sound-r8a77961", "renesas,rcar_sound-gen3";
                        reg = <0 0xec500000 0 0x1000>, /* SCU */
                              <0 0xec5a0000 0 0x100>,  /* ADG */
                              <0 0xec540000 0 0x1000>, /* SSIU */
                                        dma-names = "rx", "tx";
                                };
                                ssiu40: ssiu-32 {
-                                       dmas =  <&audma0 0x71>, <&audma1 0x72>;
+                                       dmas = <&audma0 0x71>, <&audma1 0x72>;
                                        dma-names = "rx", "tx";
                                };
                                ssiu41: ssiu-33 {
index f898aad..4d21bc0 100644 (file)
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
-                       reg =   <0 0xec500000 0 0x1000>, /* SCU */
-                               <0 0xec5a0000 0 0x100>,  /* ADG */
-                               <0 0xec540000 0 0x1000>, /* SSIU */
-                               <0 0xec541000 0 0x280>,  /* SSI */
-                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
+                       compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
+                       reg = <0 0xec500000 0 0x1000>, /* SCU */
+                             <0 0xec5a0000 0 0x100>,  /* ADG */
+                             <0 0xec540000 0 0x1000>, /* SSIU */
+                             <0 0xec541000 0 0x280>,  /* SSI */
+                             <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
                        reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
                        clocks = <&cpg CPG_MOD 1005>,
                                        dma-names = "rx", "tx";
                                };
                                ssiu40: ssiu-32 {
-                                       dmas =  <&audma0 0x71>, <&audma1 0x72>;
+                                       dmas = <&audma0 0x71>, <&audma1 0x72>;
                                        dma-names = "rx", "tx";
                                };
                                ssiu41: ssiu-33 {
index 14caedd..a5fe143 100644 (file)
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
-                       reg =   <0 0xec500000 0 0x1000>, /* SCU */
-                               <0 0xec5a0000 0 0x100>,  /* ADG */
-                               <0 0xec540000 0 0x1000>, /* SSIU */
-                               <0 0xec541000 0 0x280>,  /* SSI */
-                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
+                       compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3";
+                       reg = <0 0xec500000 0 0x1000>, /* SCU */
+                             <0 0xec5a0000 0 0x100>,  /* ADG */
+                             <0 0xec540000 0 0x1000>, /* SSIU */
+                             <0 0xec541000 0 0x280>,  /* SSI */
+                             <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
                        reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
                        clocks = <&cpg CPG_MOD 1005>,
index f29f398..34f5812 100644 (file)
                         * clkout       : #clock-cells = <0>;   <&rcar_sound>;
                         * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
                         */
-                       compatible =  "renesas,rcar_sound-r8a77995", "renesas,rcar_sound-gen3";
-                       reg =   <0 0xec500000 0 0x1000>, /* SCU */
-                               <0 0xec5a0000 0 0x100>,  /* ADG */
-                               <0 0xec540000 0 0x1000>, /* SSIU */
-                               <0 0xec541000 0 0x280>,  /* SSI */
-                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
+                       compatible = "renesas,rcar_sound-r8a77995", "renesas,rcar_sound-gen3";
+                       reg = <0 0xec500000 0 0x1000>, /* SCU */
+                             <0 0xec5a0000 0 0x100>,  /* ADG */
+                             <0 0xec540000 0 0x1000>, /* SSIU */
+                             <0 0xec541000 0 0x280>,  /* SSI */
+                             <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
                        reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
                        clocks = <&cpg CPG_MOD 1005>,
index 9ad1b23..c4be288 100644 (file)
                        interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 916>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 916>;
+                       resets = <&cpg 916>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 0 28>;
                        interrupts = <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 915>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 915>;
+                       resets = <&cpg 915>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 32 31>;
                        interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 915>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 915>;
+                       resets = <&cpg 915>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 64 25>;
                        interrupts = <GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 916>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 916>;
+                       resets = <&cpg 916>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 96 17>;
                        interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 917>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 917>;
+                       resets = <&cpg 917>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 128 27>;
                        interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 917>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 917>;
+                       resets = <&cpg 917>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 160 21>;
                        interrupts = <GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 918>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 918>;
+                       resets = <&cpg 918>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 192 21>;
                        interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 918>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 918>;
+                       resets = <&cpg 918>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 224 21>;
                        interrupts = <GIC_SPI 864 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 918>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 918>;
+                       resets = <&cpg 918>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 256 21>;
                        interrupts = <GIC_SPI 868 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 918>;
                        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
-                       resets =  <&cpg 918>;
+                       resets = <&cpg 918>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&pfc 0 288 21>;