-bin_PROGRAMS = \
- intel_upload_blit_large \
- intel_upload_blit_large_gtt \
- intel_upload_blit_large_map \
- intel_upload_blit_small
+NULL=#
+
+bin_PROGRAMS = $(NULL)
+
+if HAVE_DRM
+bin_PROGRAMS += \
+ intel_upload_blit_large \
+ intel_upload_blit_large_gtt \
+ intel_upload_blit_large_map \
+ intel_upload_blit_small \
+ $(NULL)
+endif
BENCHMARK_LIBS = \
../lib/libintel_tools.la \
AC_PROG_CC
AM_PROG_CC_C_O
-PKG_CHECK_MODULES(DRM, [libdrm_intel >= 2.4.6])
+PKG_CHECK_MODULES(DRM, [libdrm_intel >= 2.4.6], have_drm=yes, have_drm=no)
+if test "x$have_drm" = "xyes"; then
+ AC_DEFINE([HAVE_DRM], 1, [Define to 1 if we have DRM support])
+fi
+AM_CONDITIONAL(HAVE_DRM, test "x$have_drm" = "xyes")
+
PKG_CHECK_MODULES(PCIACCESS, [pciaccess >= 0.10])
dnl Use lots of warning flags with GCC
+NULL=#
+
+AM_CFLAGS = $(WARN_CFLAGS) -I$(srcdir)/..
libintel_tools_la_SOURCES = \
- intel_batchbuffer.c \
intel_batchbuffer.h \
intel_chipset.h \
- intel_gpu_tools.c \
intel_gpu_tools.h \
+ intel_mmio.c \
+ intel_pci.c \
intel_reg.h \
instdone.c \
instdone.h \
- drmtest.c \
drmtest.h
+if HAVE_DRM
+libintel_tools_la_SOURCES += \
+ intel_batchbuffer.c \
+ intel_drm.c \
+ drmtest.c \
+ $(NULL)
+AM_CFLAGS += $(DRM_CFLAGS)
+endif
+
noinst_LTLIBRARIES = libintel_tools.la
-AM_CFLAGS = $(DRM_CFLAGS) $(WARN_CFLAGS) \
- -I$(srcdir)/..
*
*/
-#include "intel_gpu_tools.h"
#include "instdone.h"
+#include "intel_chipset.h"
+#include "intel_reg.h"
+
struct instdone_bit instdone_bits[MAX_INSTDONE_BITS];
int num_instdone_bits = 0;
}
void
-init_instdone_definitions(void)
+init_instdone_definitions(uint32_t devid)
{
if (IS_GEN6(devid)) {
/* Now called INSTDONE_1 in the docs. */
*
*/
+#include <stdint.h>
+
#define MAX_INSTDONE_BITS 100
struct instdone_bit {
extern struct instdone_bit instdone_bits[MAX_INSTDONE_BITS];
extern int num_instdone_bits;
-void init_instdone_definitions(void);
+void init_instdone_definitions(uint32_t devid);
#include <stdio.h>
#include <string.h>
#include <assert.h>
+
#include "drm.h"
#include "intel_batchbuffer.h"
#include "intel_bufmgr.h"
+#include "intel_chipset.h"
+#include "intel_reg.h"
+#include <i915_drm.h>
void
intel_batchbuffer_reset(struct intel_batchbuffer *batch)
memcpy(batch->ptr, data, bytes);
batch->ptr += bytes;
}
+
+void
+intel_copy_bo(struct intel_batchbuffer *batch,
+ drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
+ int width, int height, uint32_t devid)
+{
+ uint32_t src_tiling, dst_tiling, swizzle;
+ uint32_t src_pitch, dst_pitch;
+ uint32_t cmd_bits = 0;
+
+ drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
+ drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
+
+ src_pitch = width * 4;
+ if (IS_965(devid) && src_tiling != I915_TILING_NONE) {
+ src_pitch /= 4;
+ cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
+ }
+
+ dst_pitch = width * 4;
+ if (IS_965(devid) && dst_tiling != I915_TILING_NONE) {
+ dst_pitch /= 4;
+ cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
+ }
+
+ BEGIN_BATCH(8);
+ OUT_BATCH(XY_SRC_COPY_BLT_CMD |
+ XY_SRC_COPY_BLT_WRITE_ALPHA |
+ XY_SRC_COPY_BLT_WRITE_RGB |
+ cmd_bits);
+ OUT_BATCH((3 << 24) | /* 32 bits */
+ (0xcc << 16) | /* copy ROP */
+ dst_pitch);
+ OUT_BATCH(0); /* dst x1,y1 */
+ OUT_BATCH((height << 16) | width); /* dst x2,y2 */
+ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
+ OUT_BATCH(0); /* src x1,y1 */
+ OUT_BATCH(src_pitch);
+ OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
+ ADVANCE_BATCH();
+
+ intel_batchbuffer_flush(batch);
+}
intel_batchbuffer_emit_dword(batch, MI_FLUSH);
}
+void intel_copy_bo(struct intel_batchbuffer *batch,
+ drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
+ int width, int height, uint32_t devid);
+
#endif
--- /dev/null
+/*
+ * Copyright © 2008 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Eric Anholt <eric@anholt.net>
+ *
+ */
+
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <errno.h>
+#include <err.h>
+#include <assert.h>
+#include <sys/ioctl.h>
+#include <sys/fcntl.h>
+#include <sys/stat.h>
+#include <sys/mman.h>
+
+#include "intel_gpu_tools.h"
+#include "i915_drm.h"
+
+uint32_t
+intel_get_drm_devid(int fd)
+{
+ int ret;
+ struct drm_i915_getparam gp;
+ uint32_t devid;
+
+ gp.param = I915_PARAM_CHIPSET_ID;
+ gp.value = (int *)&devid;
+
+ ret = ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp, sizeof(gp));
+ assert(ret == 0);
+
+ return devid;
+}
*
*/
+#include <stdint.h>
#include <sys/types.h>
#include <pciaccess.h>
-#include "i915_drm.h"
-#include "intel_batchbuffer.h"
+
#include "intel_chipset.h"
#include "intel_reg.h"
-extern struct pci_device *pci_dev;
-extern uint32_t devid;
-extern void *mmio;
-
#define ARRAY_SIZE(arr) (sizeof(arr)/sizeof(arr[0]))
+extern void *mmio;
+void intel_get_mmio(struct pci_device *pci_dev);
+
static inline uint32_t
INREG(uint32_t reg)
{
*(volatile uint32_t *)((volatile char *)mmio + reg) = val;
}
-void intel_get_pci_device(void);
-void intel_get_mmio(void);
-void intel_get_drm_devid(int fd);
-void intel_copy_bo(struct intel_batchbuffer *batch,
- drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
- int width, int height);
+struct pci_device *intel_get_pci_device(void);
+
+uint32_t intel_get_drm_devid(int fd);
+
void intel_map_file(char *);
#include <sys/fcntl.h>
#include <sys/stat.h>
#include <sys/mman.h>
+
#include "intel_gpu_tools.h"
-#include "i915_drm.h"
-#include "intel_batchbuffer.h"
-#include "intel_chipset.h"
-struct pci_device *pci_dev;
-uint32_t devid;
void *mmio;
void
-intel_get_drm_devid(int fd)
-{
- int ret;
- struct drm_i915_getparam gp;
-
- gp.param = I915_PARAM_CHIPSET_ID;
- gp.value = (int *)&devid;
-
- ret = ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp, sizeof(gp));
- assert(ret == 0);
-}
-
-void
-intel_get_pci_device(void)
-{
- int err;
-
- err = pci_system_init();
- if (err != 0) {
- fprintf(stderr, "Couldn't initialize PCI system: %s\n",
- strerror(err));
- exit(1);
- }
-
- /* Grab the graphics card */
- pci_dev = pci_device_find_by_slot(0, 0, 2, 0);
- if (pci_dev == NULL)
- errx(1, "Couldn't find graphics card");
-
- err = pci_device_probe(pci_dev);
- if (err != 0) {
- fprintf(stderr, "Couldn't probe graphics card: %s\n",
- strerror(err));
- exit(1);
- }
-
- if (pci_dev->vendor_id != 0x8086)
- errx(1, "Graphics card is non-intel");
- devid = pci_dev->device_id;
-}
-
-void
intel_map_file(char *file)
{
int fd;
}
void
-intel_get_mmio(void)
+intel_get_mmio(struct pci_device *pci_dev)
{
+ uint32_t devid;
int mmio_bar;
int err;
- intel_get_pci_device();
-
+ devid = pci_dev->device_id;
if (IS_9XX(devid))
mmio_bar = 0;
else
}
}
-void
-intel_copy_bo(struct intel_batchbuffer *batch,
- drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
- int width, int height)
-{
- uint32_t src_tiling, dst_tiling, swizzle;
- uint32_t src_pitch, dst_pitch;
- uint32_t cmd_bits = 0;
-
- drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
- drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
-
- src_pitch = width * 4;
- if (IS_965(devid) && src_tiling != I915_TILING_NONE) {
- src_pitch /= 4;
- cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
- }
-
- dst_pitch = width * 4;
- if (IS_965(devid) && dst_tiling != I915_TILING_NONE) {
- dst_pitch /= 4;
- cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
- }
-
- BEGIN_BATCH(8);
- OUT_BATCH(XY_SRC_COPY_BLT_CMD |
- XY_SRC_COPY_BLT_WRITE_ALPHA |
- XY_SRC_COPY_BLT_WRITE_RGB |
- cmd_bits);
- OUT_BATCH((3 << 24) | /* 32 bits */
- (0xcc << 16) | /* copy ROP */
- dst_pitch);
- OUT_BATCH(0); /* dst x1,y1 */
- OUT_BATCH((height << 16) | width); /* dst x2,y2 */
- OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
- OUT_BATCH(0); /* src x1,y1 */
- OUT_BATCH(src_pitch);
- OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
- ADVANCE_BATCH();
-
- intel_batchbuffer_flush(batch);
-}
-
-
--- /dev/null
+/*
+ * Copyright © 2008 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Eric Anholt <eric@anholt.net>
+ *
+ */
+
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <errno.h>
+#include <err.h>
+#include <assert.h>
+#include <sys/ioctl.h>
+#include <sys/fcntl.h>
+#include <sys/stat.h>
+#include <sys/mman.h>
+
+#include "intel_gpu_tools.h"
+
+struct pci_device *
+intel_get_pci_device(void)
+{
+ struct pci_device *pci_dev;
+ int err;
+
+ err = pci_system_init();
+ if (err != 0) {
+ fprintf(stderr, "Couldn't initialize PCI system: %s\n",
+ strerror(err));
+ exit(1);
+ }
+
+ /* Grab the graphics card */
+ pci_dev = pci_device_find_by_slot(0, 0, 2, 0);
+ if (pci_dev == NULL)
+ errx(1, "Couldn't find graphics card");
+
+ err = pci_device_probe(pci_dev);
+ if (err != 0) {
+ fprintf(stderr, "Couldn't probe graphics card: %s\n",
+ strerror(err));
+ exit(1);
+ }
+
+ if (pci_dev->vendor_id != 0x8086)
+ errx(1, "Graphics card is non-intel");
+
+ return pci_dev;
+}
int fd;
fd = drm_open_any();
- intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
int fd;
fd = drm_open_any();
- intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
#define BAD_GTT_DEST ((256*1024*1024)) /* past end of aperture */
static void
-bad_blit(drm_intel_bo *src_bo)
+bad_blit(drm_intel_bo *src_bo, uint32_t devid)
{
uint32_t src_pitch = 512, dst_pitch = 512;
uint32_t cmd_bits = 0;
int main(int argc, char **argv)
{
drm_intel_bo *src;
+ uint32_t devid;
int fd;
fd = drm_open_any();
- intel_get_drm_devid(fd);
+ devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
src = drm_intel_bo_alloc(bufmgr, "src", 128 * 128, 4096);
- bad_blit(src);
+ bad_blit(src, devid);
intel_batchbuffer_free(batch);
drm_intel_bufmgr_destroy(bufmgr);
drm_intel_bo *src1, *src2, *bo;
uint32_t start1 = 0;
uint32_t start2 = 1024 * 1024 / 4;
+ uint32_t devid;
fd = drm_open_any();
- intel_get_drm_devid(fd);
+ devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
/* First, do a full-buffer read after blitting */
printf("Large read after blit 1\n");
- intel_copy_bo(batch, bo, src1, width, height);
+ intel_copy_bo(batch, bo, src1, width, height, devid);
verify_large_read(bo, start1);
printf("Large read after blit 2\n");
- intel_copy_bo(batch, bo, src2, width, height);
+ intel_copy_bo(batch, bo, src2, width, height, devid);
verify_large_read(bo, start2);
printf("Small reads after blit 1\n");
- intel_copy_bo(batch, bo, src1, width, height);
+ intel_copy_bo(batch, bo, src1, width, height, devid);
verify_small_read(bo, start1);
printf("Small reads after blit 2\n");
- intel_copy_bo(batch, bo, src2, width, height);
+ intel_copy_bo(batch, bo, src2, width, height, devid);
verify_small_read(bo, start2);
printf("Large read after blit 3\n");
- intel_copy_bo(batch, bo, src1, width, height);
+ intel_copy_bo(batch, bo, src1, width, height, devid);
verify_large_read(bo, start1);
drm_intel_bo_unreference(src1);
int main(int argc, char **argv)
{
int fd;
+ uint32_t devid;
int i;
drm_intel_bo *src_bo, *dst_bo;
fd = drm_open_any();
- intel_get_drm_devid(fd);
+ devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
* doing this, we aren't likely to with this test.
*/
for (i = 0; i < 128 * 1024 / (8 * 4) * 1.25; i++) {
- intel_copy_bo(batch, dst_bo, src_bo, width, height);
+ intel_copy_bo(batch, dst_bo, src_bo, width, height, devid);
intel_batchbuffer_flush(batch);
}
static drm_intel_bufmgr *bufmgr;
struct intel_batchbuffer *batch;
static int width = 512, height = 512;
-
-static void
-copy_bo(drm_intel_bo *dst_bo, drm_intel_bo *src_bo)
-{
- uint32_t src_tiling, dst_tiling, swizzle;
- uint32_t src_pitch, dst_pitch;
- uint32_t cmd_bits = 0;
-
- drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
- drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
-
- src_pitch = width * 4;
- if (IS_965(devid) && src_tiling != I915_TILING_NONE) {
- src_pitch /= 4;
- cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
- }
-
- dst_pitch = width * 4;
- if (IS_965(devid) && dst_tiling != I915_TILING_NONE) {
- dst_pitch /= 4;
- cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
- }
-
- BEGIN_BATCH(8);
- OUT_BATCH(XY_SRC_COPY_BLT_CMD |
- XY_SRC_COPY_BLT_WRITE_ALPHA |
- XY_SRC_COPY_BLT_WRITE_RGB |
- cmd_bits);
- OUT_BATCH((3 << 24) | /* 32 bits */
- (0xcc << 16) | /* copy ROP */
- dst_pitch);
- OUT_BATCH(0); /* dst x1,y1 */
- OUT_BATCH((height << 16) | width); /* dst x2,y2 */
- OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
- OUT_BATCH(0); /* src x1,y1 */
- OUT_BATCH(src_pitch);
- OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
- ADVANCE_BATCH();
-
- intel_batchbuffer_flush(batch);
-}
+static uint32_t devid;
static drm_intel_bo *
create_bo(uint32_t start_val)
}
drm_intel_bo_unmap(linear_bo);
- copy_bo(bo, linear_bo);
+ intel_copy_bo (batch, bo, linear_bo, width, height, devid);
drm_intel_bo_unreference(linear_bo);
linear_bo = drm_intel_bo_alloc(bufmgr, "linear dst", 1024 * 1024, 4096);
- copy_bo(linear_bo, bo);
+ intel_copy_bo(batch, linear_bo, bo, width, height, devid);
drm_intel_bo_map(linear_bo, 0);
linear = linear_bo->virtual;
int i;
fd = drm_open_any();
- intel_get_drm_devid(fd);
+ devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
if (src == dst)
continue;
- copy_bo(bo[dst], bo[src]);
+ intel_copy_bo(batch, bo[dst], bo[src], width, height, devid);
bo_start_val[dst] = bo_start_val[src];
/*
#define PAGE_SIZE 4096
-static void
-copy_bo(drm_intel_bo *dst_bo, drm_intel_bo *src_bo)
-{
- uint32_t src_tiling, dst_tiling, swizzle;
- uint32_t src_pitch, dst_pitch;
- uint32_t cmd_bits = 0;
-
- drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
- drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
-
- src_pitch = width * 4;
- if (IS_965(devid) && src_tiling != I915_TILING_NONE) {
- src_pitch /= 4;
- cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
- }
-
- dst_pitch = width * 4;
- if (IS_965(devid) && dst_tiling != I915_TILING_NONE) {
- dst_pitch /= 4;
- cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
- }
-
- BEGIN_BATCH(8);
- OUT_BATCH(XY_SRC_COPY_BLT_CMD |
- XY_SRC_COPY_BLT_WRITE_ALPHA |
- XY_SRC_COPY_BLT_WRITE_RGB |
- cmd_bits);
- OUT_BATCH((3 << 24) | /* 32 bits */
- (0xcc << 16) | /* copy ROP */
- dst_pitch);
- OUT_BATCH(0); /* dst x1,y1 */
- OUT_BATCH((height << 16) | width); /* dst x2,y2 */
- OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
- OUT_BATCH(0); /* src x1,y1 */
- OUT_BATCH(src_pitch);
- OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
- ADVANCE_BATCH();
-
- intel_batchbuffer_flush(batch);
-}
-
static drm_intel_bo *
-create_bo(void)
+create_bo(uint32_t devid)
{
drm_intel_bo *bo, *linear_bo;
uint32_t *linear;
linear[i] = val++;
drm_intel_bo_unmap(linear_bo);
- copy_bo(bo, linear_bo);
+ intel_copy_bo(batch, bo, linear_bo, width, height, devid);
drm_intel_bo_unreference(linear_bo);
main(int argc, char **argv)
{
int fd;
+ uint32_t devid;
drm_intel_bo *bo;
int i, iter = 100;
uint32_t buf[width * height];
uint32_t tiling, swizzle;
fd = drm_open_any();
- intel_get_drm_devid(fd);
+ devid = intel_get_drm_devid(fd);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
batch = intel_batchbuffer_alloc(bufmgr);
- bo = create_bo();
+ bo = create_bo(devid);
drm_intel_bo_get_tiling(bo, &tiling, &swizzle);
#include <fcntl.h>
#include <getopt.h>
#include <arpa/inet.h>
+
#include "intel_gpu_tools.h"
#define AUD_CONFIG 0x62000
int i;
do_self_tests();
- intel_get_mmio();
+
+ intel_get_mmio(intel_get_pci_device());
/* printf("%-18s %8s %s\n\n", "register name", "raw value", "description"); */
#include "instdone.h"
static void
-print_instdone (unsigned int instdone, unsigned int instdone1)
+print_instdone (uint32_t devid, unsigned int instdone, unsigned int instdone1)
{
int i;
+ static int once;
+
+ if (!once) {
+ init_instdone_definitions(devid);
+ once = 1;
+ }
for (i = 0; i < num_instdone_bits; i++) {
int busy = 0;
matched = sscanf (line, " INSTDONE: 0x%08x\n", ®);
if (matched)
- print_instdone (reg, -1);
+ print_instdone (devid, reg, -1);
matched = sscanf (line, " INSTDONE1: 0x%08x\n", ®);
if (matched)
- print_instdone (-1, reg);
+ print_instdone (devid, -1, reg);
continue;
}
return 1;
}
- init_instdone_definitions();
-
if (argc == 1) {
path = "/debug/dri/0";
err = stat (path, &st);
* exit()).
*/
static void
-read_data_file (const char * filename, int is_batch)
+read_data_file (uint32_t devid, const char * filename, int is_batch)
{
FILE *file;
uint32_t *data = NULL;
const char *path;
struct stat st;
int err;
+ uint32_t devid;
uint32_t instdone, instdone1 = 0;
+ struct pci_device *pci_dev;
if (argc > 2) {
fprintf (stderr,
return 1;
}
- intel_get_mmio();
- init_instdone_definitions();
+ pci_dev = intel_get_pci_device();
+ devid = pci_dev->device_id;
+ intel_get_mmio(pci_dev);
+ init_instdone_definitions(devid);
if (argc == 1) {
path = "/debug/dri/0";
asprintf (&filename, "%s/i915_batchbuffers", path);
intel_decode_context_set_head_tail(acthd, 0xffffffff);
- read_data_file (filename, 1);
+ read_data_file (devid, filename, 1);
free (filename);
asprintf (&filename, "%s/i915_ringbuffer_data", path);
printf("Ringbuffer: ");
printf("Reminder: head pointer is GPU read, tail pointer is CPU "
"write\n");
- read_data_file (filename, 0);
+ read_data_file (devid, filename, 0);
free (filename);
} else {
- read_data_file (path, 1);
+ read_data_file (devid, path, 1);
}
return 0;
static struct rusage rusage;
int status;
- intel_get_mmio();
+ intel_get_mmio(intel_get_pci_device());
if (argc == 1) {
fprintf(stderr, "usage: %s cmd [args...]\n", argv[0]);
}
static int
-print_clock_info(void)
+print_clock_info(struct pci_device *pci_dev)
{
+ uint32_t devid = pci_dev->device_id;
uint16_t gcfgc;
if (IS_GM45(devid)) {
int main(int argc, char **argv)
{
- intel_get_mmio();
+ struct pci_device *pci_dev;
uint32_t ring_size;
+ uint32_t devid;
int i;
- init_instdone_definitions();
+ pci_dev = intel_get_pci_device();
+ devid = pci_dev->device_id;
+ intel_get_mmio(pci_dev);
+ init_instdone_definitions(devid);
+
for (i = 0; i < num_instdone_bits; i++) {
top_bits[i].bit = &instdone_bits[i];
top_bits[i].count = 0;
printf("%s", clear_screen);
- print_clock_info();
+ print_clock_info(pci_dev);
percent = ring_idle / SAMPLES_TO_PERCENT_RATIO;
len = printf("%30s: %3d%%: ", "ring idle", percent);
int main(int argc, char **argv)
{
+ struct pci_device *pci_dev;
int start, aper_size;
unsigned char *gtt;
+ uint32_t devid;
- intel_get_mmio();
+ pci_dev = intel_get_pci_device();
+ devid = pci_dev->device_id;
+ intel_get_mmio(pci_dev);
if (!IS_9XX(devid)) {
printf("Unsupported chipset for gtt dumper\n");
{
int swf14, acpi_lid;
- intel_get_mmio();
+ intel_get_mmio(intel_get_pci_device());
while (1) {
swf14 = INREG(SWF14);
#include <err.h>
#include "intel_gpu_tools.h"
+static uint32_t devid;
+
#define DEBUGSTRING(func) static void func(char **result, int reg, uint32_t val)
DEBUGSTRING(i830_16bit_func)
int main(int argc, char** argv)
{
+ struct pci_device *pci_dev;
+
+ pci_dev = intel_get_pci_device();
+ devid = pci_dev->device_id; /* XXX not true when mapping! */
+
if (argc == 2)
intel_map_file(argv[1]);
else
- intel_get_mmio();
+ intel_get_mmio(pci_dev);
if (HAS_PCH_SPLIT(devid) || getenv("HAS_PCH_SPLIT"))
ironlake_dump_regs();
exit(1);
}
- intel_get_mmio();
+ intel_get_mmio(intel_get_pci_device());
if (!strcmp(argv[1], "-f")) {
dump_range(0x00000, 0x00fff); /* VGA registers */
int main(int argc, char** argv)
{
+ struct pci_device *pci_dev;
+ uint32_t devid;
int mmio_bar;
- intel_get_mmio();
+ pci_dev = intel_get_pci_device();
+ devid = pci_dev->device_id;
+ intel_get_mmio(pci_dev);
if (IS_9XX(devid))
mmio_bar = 0;
exit(1);
}
- intel_get_mmio();
+ intel_get_mmio(intel_get_pci_device());
sscanf(argv[1], "0x%x", ®);
sscanf(argv[2], "0x%x", &value);
ptr = (volatile uint32_t *)((volatile char *)mmio + reg);
projects / platform / upstream / intel-gpu-tools.git / commitdiff