PR target/53156

	* gcc.target/cris/peep2-andu2.c: Tweak expected assembly
	code to match current output and cover new peephole2 pattern.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@186941 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 54c616c..3b3a1f6 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2012-04-29  Hans-Peter Nilsson  <hp@axis.com>
+
+       PR target/53156
+       * gcc.target/cris/peep2-andu2.c: Tweak expected assembly
+       code to match current output and cover new peephole2 pattern.
+
 2012-04-27   Ollie Wild  <aaw@google.com>
 
        * g++.dg/cpp0x/Wliteral-suffix.c: New test.

diff --git a/gcc/testsuite/gcc.target/cris/peep2-andu2.c b/gcc/testsuite/gcc.target/cris/peep2-andu2.c
index 55f638c..fd19cdd 100644 (file)
--- a/gcc/testsuite/gcc.target/cris/peep2-andu2.c
+++ b/gcc/testsuite/gcc.target/cris/peep2-andu2.c
@@ -1,13 +1,20 @@
 /* { dg-do assemble } */
-/* { dg-final { scan-assembler "movu.w \\\$r10,\\\$" } } */
-/* { dg-final { scan-assembler "and.w 2047,\\\$" } } */
+/* { dg-final { scan-assembler "movu.w \\\$r10,\\\$|movu.w 2047," } } */
+/* { dg-final { scan-assembler "and.w 2047,\\\$|and.d \\\$r10," } } */
 /* { dg-final { scan-assembler-not "move.d \\\$r10,\\\$" } } */
-/* { dg-final { scan-assembler "movu.b \\\$r10,\\\$" } } */
-/* { dg-final { scan-assembler "and.b 95,\\\$" } } */
+/* { dg-final { scan-assembler "movu.b \\\$r10,\\\$|movu.b 95," } } */
+/* { dg-final { scan-assembler "and.b 95,\\\$|and.d \\\$r10," } } */
 /* { dg-final { scan-assembler "andq -2,\\\$" } } */
+/* { dg-final { scan-assembler-not "movu.b 254,\\\$" } } */
 /* { dg-options "-O2 -save-temps" } */
 
-/* Test the "andu" peephole2 trivially, register operand.  */
+/* Originally used to test the "andu" peephole2 trivially, register operand.
+   Due to reload changes (r186861), the suboptimal sequence isn't
+   generated and the peephole2 doesn't trig for this trivial code
+   anymore.  Another minimal sequence is generated, where the constant
+   is loaded to a free register first.  Instead another case is exposed;
+   handled by the "andqu" peephole2, trigged by and_peep2_q (the andq
+   and scan-assembler-not-movu.b lines above).  */
 
 unsigned int
 and_peep2_hi (unsigned int y, unsigned int *x)