r600c: const buffer sizes must be a multiple of 16 consts
authorAlex Deucher <alexdeucher@gmail.com>
Mon, 13 Sep 2010 17:36:19 +0000 (13:36 -0400)
committerAlex Deucher <alexdeucher@gmail.com>
Mon, 13 Sep 2010 17:41:46 +0000 (13:41 -0400)
This applies to r6xx/r7xx/evergreen

src/mesa/drivers/dri/r600/evergreen_chip.c
src/mesa/drivers/dri/r600/evergreen_fragprog.c
src/mesa/drivers/dri/r600/evergreen_vertprog.c

index 59768fd..f02032b 100644 (file)
@@ -550,8 +550,9 @@ static void evergreenSendPSresource(GLcontext *ctx)
     context_t *context = EVERGREEN_CONTEXT(ctx);
     EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
     struct radeon_bo * pbo;
-       
-       struct radeon_bo * pbo_const;
+    struct radeon_bo * pbo_const;
+    /* const size reg is in units of 16 consts */
+    int const_size = ((evergreen->ps.num_consts * 4) + 15) & ~15;
 
     BATCH_LOCALS(&context->radeon);
     radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__);
@@ -582,17 +583,8 @@ static void evergreenSendPSresource(GLcontext *ctx)
     {                  
         r700SyncSurf(context, pbo_const, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit); 
 
-           BEGIN_BATCH_NO_AUTOSTATE(3);  
-        
-        if(evergreen->ps.num_consts < 4)
-        {
-            EVERGREEN_OUT_BATCH_REGVAL(EG_SQ_ALU_CONST_BUFFER_SIZE_PS_0, 1);
-        }
-        else
-        {
-            EVERGREEN_OUT_BATCH_REGVAL(EG_SQ_ALU_CONST_BUFFER_SIZE_PS_0, (evergreen->ps.num_consts * 4)/16 );
-        }
-        
+       BEGIN_BATCH_NO_AUTOSTATE(3);
+       EVERGREEN_OUT_BATCH_REGVAL(EG_SQ_ALU_CONST_BUFFER_SIZE_PS_0, const_size / 16);
         END_BATCH();
 
         BEGIN_BATCH_NO_AUTOSTATE(3 + 2);            
@@ -613,8 +605,9 @@ static void evergreenSendVSresource(GLcontext *ctx, struct radeon_state_atom *at
     context_t *context = EVERGREEN_CONTEXT(ctx);
     EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
     struct radeon_bo * pbo;
-       
-       struct radeon_bo * pbo_const;
+    struct radeon_bo * pbo_const;
+    /* const size reg is in units of 16 consts */
+    int const_size = ((evergreen->vs.num_consts * 4) + 15) & ~15;
 
     BATCH_LOCALS(&context->radeon);
     radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__);
@@ -646,17 +639,8 @@ static void evergreenSendVSresource(GLcontext *ctx, struct radeon_state_atom *at
     {                  
         r700SyncSurf(context, pbo_const, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit);
 
-           BEGIN_BATCH_NO_AUTOSTATE(3);   
-        
-        if(evergreen->vs.num_consts < 4)
-        {
-            EVERGREEN_OUT_BATCH_REGVAL(EG_SQ_ALU_CONST_BUFFER_SIZE_VS_0, 1);
-        }
-        else
-        {
-            EVERGREEN_OUT_BATCH_REGVAL(EG_SQ_ALU_CONST_BUFFER_SIZE_VS_0, (evergreen->vs.num_consts * 4)/16 );
-        }
-       
+       BEGIN_BATCH_NO_AUTOSTATE(3);
+       EVERGREEN_OUT_BATCH_REGVAL(EG_SQ_ALU_CONST_BUFFER_SIZE_VS_0, const_size / 16);
         END_BATCH();
 
         BEGIN_BATCH_NO_AUTOSTATE(3 + 2);            
index 7dcca8b..0e7edf4 100644 (file)
@@ -748,6 +748,7 @@ GLboolean evergreenSetupFPconstants(GLcontext * ctx)
     struct gl_program_parameter_list *paramList;
     unsigned int unNumParamData;
     unsigned int ui;
+    int alloc_size;
 
     /* sent out shader constants. */
     paramList = fp->mesa_program.Base.Parameters;
@@ -771,14 +772,17 @@ GLboolean evergreenSetupFPconstants(GLcontext * ctx)
                        evergreen->ps.consts[ui][2].f32All = paramList->ParameterValues[ui][2];
                        evergreen->ps.consts[ui][3].f32All = paramList->ParameterValues[ui][3];
            }
-        
+
+           /* alloc multiple of 16 constants */
+           alloc_size = ((unNumParamData * 4 * 4) + 255) & ~255;
+
         /* Load fp constants to gpu */
         if(unNumParamData > 0) 
         {            
             radeonAllocDmaRegion(&context->radeon, 
                                 &context->fp_Constbo, 
                                 &context->fp_bo_offset, 
-                                unNumParamData * 4 * 4, 
+                                alloc_size,
                                 256);            
             r600EmitShaderConsts(ctx,
                                  context->fp_Constbo,
index 2bb055c..6840fa3 100644 (file)
@@ -655,6 +655,7 @@ GLboolean evergreenSetupVPconstants(GLcontext * ctx)
     struct gl_program_parameter_list *paramList;
     unsigned int unNumParamData;
     unsigned int ui;
+    int alloc_size;
 
     /* sent out shader constants. */
     paramList = vp->mesa_program->Base.Parameters;
@@ -677,6 +678,9 @@ GLboolean evergreenSetupVPconstants(GLcontext * ctx)
 
            unNumParamData = paramList->NumParameters;
 
+           /* alloc multiple of 16 constants */
+           alloc_size = ((unNumParamData * 4 * 4) + 255) & ~255;
+
            for(ui=0; ui<unNumParamData; ui++) {
             if(paramList->Parameters[ui].Type == PROGRAM_UNIFORM) 
             {
@@ -697,7 +701,7 @@ GLboolean evergreenSetupVPconstants(GLcontext * ctx)
         radeonAllocDmaRegion(&context->radeon, 
                              &context->vp_Constbo, 
                              &context->vp_bo_offset, 
-                             unNumParamData * 4 * 4, 
+                            alloc_size,
                              256);        
         r600EmitShaderConsts(ctx,
                              context->vp_Constbo,