}
-static struct hw_interrupt_type rise_edge_irq_type = {
+static struct irq_chip rise_edge_irq_type = {
.typename = "Au1000 Rise Edge",
.startup = startup_irq,
.shutdown = shutdown_irq,
.end = end_irq,
};
-static struct hw_interrupt_type fall_edge_irq_type = {
+static struct irq_chip fall_edge_irq_type = {
.typename = "Au1000 Fall Edge",
.startup = startup_irq,
.shutdown = shutdown_irq,
.end = end_irq,
};
-static struct hw_interrupt_type either_edge_irq_type = {
+static struct irq_chip either_edge_irq_type = {
.typename = "Au1000 Rise or Fall Edge",
.startup = startup_irq,
.shutdown = shutdown_irq,
.end = end_irq,
};
-static struct hw_interrupt_type level_irq_type = {
+static struct irq_chip level_irq_type = {
.typename = "Au1000 Level",
.startup = startup_irq,
.shutdown = shutdown_irq,
}
}
-static struct hw_interrupt_type external_irq_type =
+static struct irq_chip external_irq_type =
{
#ifdef CONFIG_MIPS_PB1200
"Pb1200 Ext",
ll_vrc5477_irq_enable( irq - vrc5477_irq_base);
}
-hw_irq_controller vrc5477_irq_controller = {
+struct irq_chip vrc5477_irq_controller = {
.typename = "vrc5477_irq",
.startup = vrc5477_irq_startup,
.shutdown = vrc5477_irq_shutdown,
enable_ioasic_irq(irq);
}
-static struct hw_interrupt_type ioasic_irq_type = {
+static struct irq_chip ioasic_irq_type = {
.typename = "IO-ASIC",
.startup = startup_ioasic_irq,
.shutdown = shutdown_ioasic_irq,
end_ioasic_irq(irq);
}
-static struct hw_interrupt_type ioasic_dma_irq_type = {
+static struct irq_chip ioasic_dma_irq_type = {
.typename = "IO-ASIC-DMA",
.startup = startup_ioasic_dma_irq,
.shutdown = shutdown_ioasic_dma_irq,
enable_kn02_irq(irq);
}
-static struct hw_interrupt_type kn02_irq_type = {
+static struct irq_chip kn02_irq_type = {
.typename = "KN02-CSR",
.startup = startup_kn02_irq,
.shutdown = shutdown_kn02_irq,
ll_emma2rh_irq_enable(irq - emma2rh_irq_base);
}
-hw_irq_controller emma2rh_irq_controller = {
+struct irq_chip emma2rh_irq_controller = {
.typename = "emma2rh_irq",
.startup = emma2rh_irq_startup,
.shutdown = emma2rh_irq_shutdown,
ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base);
}
-hw_irq_controller emma2rh_sw_irq_controller = {
+struct irq_chip emma2rh_sw_irq_controller = {
.typename = "emma2rh_sw_irq",
.startup = emma2rh_sw_irq_startup,
.shutdown = emma2rh_sw_irq_shutdown,
ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
}
-hw_irq_controller emma2rh_gpio_irq_controller = {
+struct irq_chip emma2rh_gpio_irq_controller = {
.typename = "emma2rh_gpio_irq",
.startup = emma2rh_gpio_irq_startup,
.shutdown = emma2rh_gpio_irq_shutdown,
enable_ev64120_irq(irq);
}
-static struct hw_interrupt_type ev64120_irq_type = {
+static struct irq_chip ev64120_irq_type = {
.typename = "EV64120",
.startup = startup_ev64120_irq,
.shutdown = shutdown_ev64120_irq,
/* Let's initialize our IRQ descriptors */
for (i = 0; i < NR_IRQS; i++) {
irq_desc[i].status = 0;
- irq_desc[i].chip = &no_irq_type;
+ irq_desc[i].chip = &no_irq_chip;
irq_desc[i].action = NULL;
irq_desc[i].depth = 0;
spin_lock_init(&irq_desc[i].lock);
enable_it8172_irq(irq);
}
-static struct hw_interrupt_type it8172_irq_type = {
+static struct irq_chip it8172_irq_type = {
.typename = "ITE8172",
.startup = startup_ite_irq,
.shutdown = shutdown_ite_irq,
#define shutdown_none disable_none
#define end_none enable_none
-static struct hw_interrupt_type cp0_irq_type = {
+static struct irq_chip cp0_irq_type = {
.typename = "CP0 Count",
.startup = startup_none,
.shutdown = shutdown_none,
enable_r4030_irq(irq);
}
-static struct hw_interrupt_type r4030_irq_type = {
+static struct irq_chip r4030_irq_type = {
.typename = "R4030",
.startup = startup_r4030_irq,
.shutdown = shutdown_r4030_irq,
set_c0_status(ST0_IM); /* IE bit is still 0. */
}
-static hw_irq_controller jmr3927_irq_controller = {
+static struct irq_chip jmr3927_irq_controller = {
.typename = "jmr3927_irq",
.startup = jmr3927_irq_startup,
.shutdown = jmr3927_irq_shutdown,
return 0; /* never anything pending */
}
-static struct hw_interrupt_type i8259A_irq_type = {
+static struct irq_chip i8259A_irq_type = {
.typename = "XT-PIC",
.startup = startup_8259A_irq,
.shutdown = shutdown_8259A_irq,
#define shutdown_msc_irq disable_msc_irq
-struct hw_interrupt_type msc_levelirq_type = {
+struct irq_chip msc_levelirq_type = {
.typename = "SOC-it-Level",
.startup = startup_msc_irq,
.shutdown = shutdown_msc_irq,
.end = end_msc_irq,
};
-struct hw_interrupt_type msc_edgeirq_type = {
+struct irq_chip msc_edgeirq_type = {
.typename = "SOC-it-Edge",
.startup =startup_msc_irq,
.shutdown = shutdown_msc_irq,
#define shutdown_mv64340_irq disable_mv64340_irq
-struct hw_interrupt_type mv64340_irq_type = {
+struct irq_chip mv64340_irq_type = {
.typename = "MV-64340",
.startup = startup_mv64340_irq,
.shutdown = shutdown_mv64340_irq,
unmask_rm7k_irq(irq);
}
-static hw_irq_controller rm7k_irq_controller = {
+static struct irq_chip rm7k_irq_controller = {
.typename = "RM7000",
.startup = rm7k_cpu_irq_startup,
.shutdown = rm7k_cpu_irq_shutdown,
unmask_rm9k_irq(irq);
}
-static hw_irq_controller rm9k_irq_controller = {
+static struct irq_chip rm9k_irq_controller = {
.typename = "RM9000",
.startup = rm9k_cpu_irq_startup,
.shutdown = rm9k_cpu_irq_shutdown,
.end = rm9k_cpu_irq_end,
};
-static hw_irq_controller rm9k_perfcounter_irq = {
+static struct irq_chip rm9k_perfcounter_irq = {
.typename = "RM9000",
.startup = rm9k_perfcounter_irq_startup,
.shutdown = rm9k_perfcounter_irq_shutdown,
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
- irq_desc[i].chip = &no_irq_type;
+ irq_desc[i].chip = &no_irq_chip;
spin_lock_init(&irq_desc[i].lock);
#ifdef CONFIG_MIPS_MT_SMTC
irq_hwmask[i] = 0;
unmask_mips_irq(irq);
}
-static hw_irq_controller mips_cpu_irq_controller = {
+static struct irq_chip mips_cpu_irq_controller = {
.typename = "MIPS",
.startup = mips_cpu_irq_startup,
.shutdown = mips_cpu_irq_shutdown,
#define mips_mt_cpu_irq_end mips_cpu_irq_end
-static hw_irq_controller mips_mt_cpu_irq_controller = {
+static struct irq_chip mips_mt_cpu_irq_controller = {
.typename = "MIPS",
.startup = mips_mt_cpu_irq_startup,
.shutdown = mips_mt_cpu_irq_shutdown,
enable_lasat_irq(irq);
}
-static struct hw_interrupt_type lasat_irq_type = {
+static struct irq_chip lasat_irq_type = {
.typename = "Lasat",
.startup = startup_lasat_irq,
.shutdown = shutdown_lasat_irq,
enable_atlas_irq(irq);
}
-static struct hw_interrupt_type atlas_irq_type = {
+static struct irq_chip atlas_irq_type = {
.typename = "Atlas",
.startup = startup_atlas_irq,
.shutdown = shutdown_atlas_irq,
#define shutdown_cpci_irq disable_cpci_irq
-struct hw_interrupt_type cpci_irq_type = {
+struct irq_chip cpci_irq_type = {
.typename = "CPCI/FPGA",
.startup = startup_cpci_irq,
.shutdown = shutdown_cpci_irq,
#define shutdown_uart_irq disable_uart_irq
-struct hw_interrupt_type uart_irq_type = {
+struct irq_chip uart_irq_type = {
.typename = "UART/FPGA",
.startup = startup_uart_irq,
.shutdown = shutdown_uart_irq,
}
}
-static struct hw_interrupt_type level_irq_type = {
+static struct irq_chip level_irq_type = {
.typename = "PNX Level IRQ",
.startup = startup_irq,
.shutdown = shutdown_irq,
enable_eisa1_irq(irq);
}
-static struct hw_interrupt_type ip22_eisa1_irq_type = {
+static struct irq_chip ip22_eisa1_irq_type = {
.typename = "IP22 EISA",
.startup = startup_eisa1_irq,
.shutdown = shutdown_eisa1_irq,
enable_eisa2_irq(irq);
}
-static struct hw_interrupt_type ip22_eisa2_irq_type = {
+static struct irq_chip ip22_eisa2_irq_type = {
.typename = "IP22 EISA",
.startup = startup_eisa2_irq,
.shutdown = shutdown_eisa2_irq,
enable_local0_irq(irq);
}
-static struct hw_interrupt_type ip22_local0_irq_type = {
+static struct irq_chip ip22_local0_irq_type = {
.typename = "IP22 local 0",
.startup = startup_local0_irq,
.shutdown = shutdown_local0_irq,
enable_local1_irq(irq);
}
-static struct hw_interrupt_type ip22_local1_irq_type = {
+static struct irq_chip ip22_local1_irq_type = {
.typename = "IP22 local 1",
.startup = startup_local1_irq,
.shutdown = shutdown_local1_irq,
enable_local2_irq(irq);
}
-static struct hw_interrupt_type ip22_local2_irq_type = {
+static struct irq_chip ip22_local2_irq_type = {
.typename = "IP22 local 2",
.startup = startup_local2_irq,
.shutdown = shutdown_local2_irq,
enable_local3_irq(irq);
}
-static struct hw_interrupt_type ip22_local3_irq_type = {
+static struct irq_chip ip22_local3_irq_type = {
.typename = "IP22 local 3",
.startup = startup_local3_irq,
.shutdown = shutdown_local3_irq,
mips_cpu_irq_init(SGINT_CPU);
for (i = SGINT_LOCAL0; i < SGI_INTERRUPTS; i++) {
- hw_irq_controller *handler;
+ struct irq_chip *handler;
if (i < SGINT_LOCAL1)
handler = &ip22_local0_irq_type;
enable_bridge_irq(irq);
}
-static struct hw_interrupt_type bridge_irq_type = {
+static struct irq_chip bridge_irq_type = {
.typename = "bridge",
.startup = startup_bridge_irq,
.shutdown = shutdown_bridge_irq,
{
}
-static struct hw_interrupt_type rt_irq_type = {
+static struct irq_chip rt_irq_type = {
.typename = "SN HUB RT timer",
.startup = startup_rt_irq,
.shutdown = shutdown_rt_irq,
#define shutdown_cpu_irq disable_cpu_irq
#define mask_and_ack_cpu_irq disable_cpu_irq
-static struct hw_interrupt_type ip32_cpu_interrupt = {
+static struct irq_chip ip32_cpu_interrupt = {
.typename = "IP32 CPU",
.startup = startup_cpu_irq,
.shutdown = shutdown_cpu_irq,
#define shutdown_crime_irq disable_crime_irq
-static struct hw_interrupt_type ip32_crime_interrupt = {
+static struct irq_chip ip32_crime_interrupt = {
.typename = "IP32 CRIME",
.startup = startup_crime_irq,
.shutdown = shutdown_crime_irq,
#define shutdown_macepci_irq disable_macepci_irq
#define mask_and_ack_macepci_irq disable_macepci_irq
-static struct hw_interrupt_type ip32_macepci_interrupt = {
+static struct irq_chip ip32_macepci_interrupt = {
.typename = "IP32 MACE PCI",
.startup = startup_macepci_irq,
.shutdown = shutdown_macepci_irq,
#define shutdown_maceisa_irq disable_maceisa_irq
-static struct hw_interrupt_type ip32_maceisa_interrupt = {
+static struct irq_chip ip32_maceisa_interrupt = {
.typename = "IP32 MACE ISA",
.startup = startup_maceisa_irq,
.shutdown = shutdown_maceisa_irq,
#define shutdown_mace_irq disable_mace_irq
#define mask_and_ack_mace_irq disable_mace_irq
-static struct hw_interrupt_type ip32_mace_interrupt = {
+static struct irq_chip ip32_mace_interrupt = {
.typename = "IP32 MACE",
.startup = startup_mace_irq,
.shutdown = shutdown_mace_irq,
mace->perif.ctrl.imask = 0;
for (irq = 0; irq <= IP32_IRQ_MAX; irq++) {
- hw_irq_controller *controller;
+ struct irq_chip *controller;
if (irq == IP32_R4K_TIMER_IRQ)
controller = &ip32_cpu_interrupt;
#endif
#endif
-static struct hw_interrupt_type bcm1480_irq_type = {
+static struct irq_chip bcm1480_irq_type = {
.typename = "BCM1480-IMR",
.startup = startup_bcm1480_irq,
.shutdown = shutdown_bcm1480_irq,
{
int i = 0, old_cpu, cpu, int_on, k;
u64 cur_ints;
- irq_desc_t *desc = irq_desc + irq;
+ struct irq_desc *desc = irq_desc + irq;
unsigned long flags;
unsigned int irq_dirty;
irq_desc[i].chip = &bcm1480_irq_type;
bcm1480_irq_owner[i] = 0;
} else {
- irq_desc[i].chip = &no_irq_type;
+ irq_desc[i].chip = &no_irq_chip;
}
}
}
int bcm1480_steal_irq(int irq)
{
- irq_desc_t *desc = irq_desc + irq;
+ struct irq_desc *desc = irq_desc + irq;
unsigned long flags;
int retval = 0;
#endif
#endif
-static struct hw_interrupt_type sb1250_irq_type = {
+static struct irq_chip sb1250_irq_type = {
.typename = "SB1250-IMR",
.startup = startup_sb1250_irq,
.shutdown = shutdown_sb1250_irq,
{
int i = 0, old_cpu, cpu, int_on;
u64 cur_ints;
- irq_desc_t *desc = irq_desc + irq;
+ struct irq_desc *desc = irq_desc + irq;
unsigned long flags;
i = first_cpu(mask);
irq_desc[i].chip = &sb1250_irq_type;
sb1250_irq_owner[i] = 0;
} else {
- irq_desc[i].chip = &no_irq_type;
+ irq_desc[i].chip = &no_irq_chip;
}
}
}
int sb1250_steal_irq(int irq)
{
- irq_desc_t *desc = irq_desc + irq;
+ struct irq_desc *desc = irq_desc + irq;
unsigned long flags;
int retval = 0;
enable_pciasic_irq(irq);
}
-static struct hw_interrupt_type pciasic_irq_type = {
+static struct irq_chip pciasic_irq_type = {
.typename = "ASIC-PCI",
.startup = startup_pciasic_irq,
.shutdown = shutdown_pciasic_irq,
static DEFINE_SPINLOCK(tx4927_pic_lock);
#define TX4927_CP0_NAME "TX4927-CP0"
-static struct hw_interrupt_type tx4927_irq_cp0_type = {
+static struct irq_chip tx4927_irq_cp0_type = {
.typename = TX4927_CP0_NAME,
.startup = tx4927_irq_cp0_startup,
.shutdown = tx4927_irq_cp0_shutdown,
};
#define TX4927_PIC_NAME "TX4927-PIC"
-static struct hw_interrupt_type tx4927_irq_pic_type = {
+static struct irq_chip tx4927_irq_pic_type = {
.typename = TX4927_PIC_NAME,
.startup = tx4927_irq_pic_startup,
.shutdown = tx4927_irq_pic_shutdown,
#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
-static struct hw_interrupt_type toshiba_rbtx4927_irq_ioc_type = {
+static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
.typename = TOSHIBA_RBTX4927_IOC_NAME,
.startup = toshiba_rbtx4927_irq_ioc_startup,
.shutdown = toshiba_rbtx4927_irq_ioc_shutdown,
#ifdef CONFIG_TOSHIBA_FPCIB0
#define TOSHIBA_RBTX4927_ISA_NAME "RBTX4927-ISA"
-static struct hw_interrupt_type toshiba_rbtx4927_irq_isa_type = {
+static struct irq_chip toshiba_rbtx4927_irq_isa_type = {
.typename = TOSHIBA_RBTX4927_ISA_NAME,
.startup = toshiba_rbtx4927_irq_isa_startup,
.shutdown = toshiba_rbtx4927_irq_isa_shutdown,
DEFINE_SPINLOCK(tx4938_pic_lock);
#define TX4938_CP0_NAME "TX4938-CP0"
-static struct hw_interrupt_type tx4938_irq_cp0_type = {
+static struct irq_chip tx4938_irq_cp0_type = {
.typename = TX4938_CP0_NAME,
.startup = tx4938_irq_cp0_startup,
.shutdown = tx4938_irq_cp0_shutdown,
};
#define TX4938_PIC_NAME "TX4938-PIC"
-static struct hw_interrupt_type tx4938_irq_pic_type = {
+static struct irq_chip tx4938_irq_pic_type = {
.typename = TX4938_PIC_NAME,
.startup = tx4938_irq_pic_startup,
.shutdown = tx4938_irq_pic_shutdown,
DEFINE_SPINLOCK(toshiba_rbtx4938_ioc_lock);
#define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC"
-static struct hw_interrupt_type toshiba_rbtx4938_irq_ioc_type = {
+static struct irq_chip toshiba_rbtx4938_irq_ioc_type = {
.typename = TOSHIBA_RBTX4938_IOC_NAME,
.startup = toshiba_rbtx4938_irq_ioc_startup,
.shutdown = toshiba_rbtx4938_irq_ioc_shutdown,
void vr41xx_enable_piuint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + PIU_IRQ;
+ struct irq_desc *desc = irq_desc + PIU_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4111 ||
void vr41xx_disable_piuint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + PIU_IRQ;
+ struct irq_desc *desc = irq_desc + PIU_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4111 ||
void vr41xx_enable_aiuint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + AIU_IRQ;
+ struct irq_desc *desc = irq_desc + AIU_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4111 ||
void vr41xx_disable_aiuint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + AIU_IRQ;
+ struct irq_desc *desc = irq_desc + AIU_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4111 ||
void vr41xx_enable_kiuint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + KIU_IRQ;
+ struct irq_desc *desc = irq_desc + KIU_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4111 ||
void vr41xx_disable_kiuint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + KIU_IRQ;
+ struct irq_desc *desc = irq_desc + KIU_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4111 ||
void vr41xx_enable_dsiuint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + DSIU_IRQ;
+ struct irq_desc *desc = irq_desc + DSIU_IRQ;
unsigned long flags;
spin_lock_irqsave(&desc->lock, flags);
void vr41xx_disable_dsiuint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + DSIU_IRQ;
+ struct irq_desc *desc = irq_desc + DSIU_IRQ;
unsigned long flags;
spin_lock_irqsave(&desc->lock, flags);
void vr41xx_enable_firint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + FIR_IRQ;
+ struct irq_desc *desc = irq_desc + FIR_IRQ;
unsigned long flags;
spin_lock_irqsave(&desc->lock, flags);
void vr41xx_disable_firint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + FIR_IRQ;
+ struct irq_desc *desc = irq_desc + FIR_IRQ;
unsigned long flags;
spin_lock_irqsave(&desc->lock, flags);
void vr41xx_enable_pciint(void)
{
- irq_desc_t *desc = irq_desc + PCI_IRQ;
+ struct irq_desc *desc = irq_desc + PCI_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4122 ||
void vr41xx_disable_pciint(void)
{
- irq_desc_t *desc = irq_desc + PCI_IRQ;
+ struct irq_desc *desc = irq_desc + PCI_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4122 ||
void vr41xx_enable_scuint(void)
{
- irq_desc_t *desc = irq_desc + SCU_IRQ;
+ struct irq_desc *desc = irq_desc + SCU_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4122 ||
void vr41xx_disable_scuint(void)
{
- irq_desc_t *desc = irq_desc + SCU_IRQ;
+ struct irq_desc *desc = irq_desc + SCU_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4122 ||
void vr41xx_enable_csiint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + CSI_IRQ;
+ struct irq_desc *desc = irq_desc + CSI_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4122 ||
void vr41xx_disable_csiint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + CSI_IRQ;
+ struct irq_desc *desc = irq_desc + CSI_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4122 ||
void vr41xx_enable_bcuint(void)
{
- irq_desc_t *desc = irq_desc + BCU_IRQ;
+ struct irq_desc *desc = irq_desc + BCU_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4122 ||
void vr41xx_disable_bcuint(void)
{
- irq_desc_t *desc = irq_desc + BCU_IRQ;
+ struct irq_desc *desc = irq_desc + BCU_IRQ;
unsigned long flags;
if (current_cpu_data.cputype == CPU_VR4122 ||
icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
}
-static struct hw_interrupt_type sysint1_irq_type = {
+static struct irq_chip sysint1_irq_type = {
.typename = "SYSINT1",
.startup = startup_sysint1_irq,
.shutdown = shutdown_sysint1_irq,
icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
}
-static struct hw_interrupt_type sysint2_irq_type = {
+static struct irq_chip sysint2_irq_type = {
.typename = "SYSINT2",
.startup = startup_sysint2_irq,
.shutdown = shutdown_sysint2_irq,
static inline int set_sysint1_assign(unsigned int irq, unsigned char assign)
{
- irq_desc_t *desc = irq_desc + irq;
+ struct irq_desc *desc = irq_desc + irq;
uint16_t intassign0, intassign1;
unsigned int pin;
static inline int set_sysint2_assign(unsigned int irq, unsigned char assign)
{
- irq_desc_t *desc = irq_desc + irq;
+ struct irq_desc *desc = irq_desc + irq;
uint16_t intassign2, intassign3;
unsigned int pin;
static void irq_dispatch(unsigned int irq, struct pt_regs *regs)
{
irq_cascade_t *cascade;
- irq_desc_t *desc;
+ struct irq_desc *desc;
if (irq >= NR_IRQS) {
atomic_inc(&irq_err_count);
void vrc4173_enable_piuint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + VRC4173_PIU_IRQ;
+ struct irq_desc *desc = irq_desc + VRC4173_PIU_IRQ;
unsigned long flags;
uint16_t val;
void vrc4173_disable_piuint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + VRC4173_PIU_IRQ;
+ struct irq_desc *desc = irq_desc + VRC4173_PIU_IRQ;
unsigned long flags;
uint16_t val;
void vrc4173_enable_aiuint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + VRC4173_AIU_IRQ;
+ struct irq_desc *desc = irq_desc + VRC4173_AIU_IRQ;
unsigned long flags;
uint16_t val;
void vrc4173_disable_aiuint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + VRC4173_AIU_IRQ;
+ struct irq_desc *desc = irq_desc + VRC4173_AIU_IRQ;
unsigned long flags;
uint16_t val;
void vrc4173_enable_kiuint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + VRC4173_KIU_IRQ;
+ struct irq_desc *desc = irq_desc + VRC4173_KIU_IRQ;
unsigned long flags;
uint16_t val;
void vrc4173_disable_kiuint(uint16_t mask)
{
- irq_desc_t *desc = irq_desc + VRC4173_KIU_IRQ;
+ struct irq_desc *desc = irq_desc + VRC4173_KIU_IRQ;
unsigned long flags;
uint16_t val;
enable_vrc4173_irq(irq);
}
-static struct hw_interrupt_type vrc4173_irq_type = {
+static struct irq_chip vrc4173_irq_type = {
.typename = "VRC4173",
.startup = startup_vrc4173_irq,
.shutdown = shutdown_vrc4173_irq,
enable_8259A_irq(irq - I8259_IRQ_BASE);
}
-static struct hw_interrupt_type i8259_irq_type = {
+static struct irq_chip i8259_irq_type = {
.typename = "XT-PIC",
.startup = startup_i8259_irq,
.shutdown = shutdown_i8259_irq,