octeontx2-af: Config pkind for CGX mapped PFs

For each CGX LMAC that is mapped to a RVU PF, allocate
a pkind and config the same in CGX. For a received packet
at CGX LMAC interface this pkind is used by NPC block
to start parsing of packet.

Signed-off-by: Geetha sowjanya <gakula@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 352501b54aee6b10fdc105d29365d8fe3d85d82c..12db256c8c9f97633346ab1da23a9bc02b4a934a 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -186,6 +186,18 @@ u64 cgx_lmac_addr_get(u8 cgx_id, u8 lmac_id)
 }
 EXPORT_SYMBOL(cgx_lmac_addr_get);
 
+int cgx_set_pkind(void *cgxd, u8 lmac_id, int pkind)
+{
+       struct cgx *cgx = cgxd;
+
+       if (!cgx || lmac_id >= cgx->lmac_count)
+               return -ENODEV;
+
+       cgx_write(cgx, lmac_id, CGXX_CMRX_RX_ID_MAP, (pkind & 0x3F));
+       return 0;
+}
+EXPORT_SYMBOL(cgx_set_pkind);
+
 static inline u8 cgx_get_lmac_type(struct cgx *cgx, int lmac_id)
 {
        u64 cfg;

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
index ada25ed0765bf1ff9e8bd4019a39d0bf7228ba25..0a66d27174425213abf79b1e96879d98940f96e9 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h
@@ -97,6 +97,7 @@ extern struct pci_driver cgx_driver;
 int cgx_get_cgx_cnt(void);
 int cgx_get_lmac_cnt(void *cgxd);
 void *cgx_get_pdata(int cgx_id);
+int cgx_set_pkind(void *cgxd, u8 lmac_id, int pkind);
 int cgx_lmac_evh_register(struct cgx_event_cb *cb, void *cgxd, int lmac_id);
 int cgx_get_tx_stats(void *cgxd, int lmac_id, int idx, u64 *tx_stat);
 int cgx_get_rx_stats(void *cgxd, int lmac_id, int idx, u64 *rx_stat);

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/common.h b/drivers/net/ethernet/marvell/octeontx2/af/common.h
index 28eb691185f414ccf95c71280663bfe3c6d511e5..7c53ba3545f1f5577d9f8be781de6cbc1d607183 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/common.h
@@ -143,6 +143,12 @@ enum nix_scheduler {
        NIX_TXSCH_LVL_CNT = 0x5,
 };
 
+#define NIX_INTF_TYPE_CGX              0
+#define NIX_INTF_TYPE_LBK              1
+
+#define MAX_LMAC_PKIND                 12
+#define NIX_LINK_CGX_LMAC(a, b)                (0 + 4 * (a) + (b))
+
 /* NIX LSO format indices.
  * As of now TSO is the only one using, so statically assigning indices.
  */

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index e8e16a71fbed36ef1f6fea024282a35de8f2dee3..b3dbbd6d2d9fba6197104ce6c8a33540fb7a1af9 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -67,6 +67,7 @@ struct rvu_pfvf {
        u16             ssow;
        u16             cptlfs;
        u16             timlfs;
+       u8              cgx_lmac;
 
        /* Block LF's MSIX vector info */
        struct rsrc_bmap msix;      /* Bitmap for MSIX vector alloc */
@@ -230,6 +231,7 @@ static inline void rvu_get_cgx_lmac_id(u8 map, u8 *cgx_id, u8 *lmac_id)
 
 int rvu_cgx_probe(struct rvu *rvu);
 void rvu_cgx_wq_destroy(struct rvu *rvu);
+void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu);
 int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start);
 int rvu_mbox_handler_CGX_START_RXTX(struct rvu *rvu, struct msg_req *req,
                                    struct msg_rsp *rsp);
@@ -302,4 +304,6 @@ int rvu_mbox_handler_NIX_STATS_RST(struct rvu *rvu, struct msg_req *req,
 /* NPC APIs */
 int rvu_npc_init(struct rvu *rvu);
 void rvu_npc_freemem(struct rvu *rvu);
+int rvu_npc_get_pkind(struct rvu *rvu, u16 pf);
+void rvu_npc_set_pkind(struct rvu *rvu, int pkind, struct rvu_pfvf *pfvf);
 #endif /* RVU_H */

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
index e0aee217663755556950f9d644850a1cce3ab0b8..188185c15b4a7a26504efcf03a0de12d642a40f9 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
@@ -50,7 +50,7 @@ static inline u8 cgxlmac_id_to_bmap(u8 cgx_id, u8 lmac_id)
        return ((cgx_id & 0xF) << 4) | (lmac_id & 0xF);
 }
 
-static void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu)
+void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu)
 {
        if (cgx_id >= rvu->cgx_cnt)
                return NULL;
@@ -60,10 +60,11 @@ static void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu)
 
 static int rvu_map_cgx_lmac_pf(struct rvu *rvu)
 {
+       struct npc_pkind *pkind = &rvu->hw->pkind;
        int cgx_cnt = rvu->cgx_cnt;
        int cgx, lmac_cnt, lmac;
        int pf = PF_CGXMAP_BASE;
-       int size;
+       int size, free_pkind;
 
        if (!cgx_cnt)
                return 0;
@@ -96,6 +97,8 @@ static int rvu_map_cgx_lmac_pf(struct rvu *rvu)
                for (lmac = 0; lmac < lmac_cnt; lmac++, pf++) {
                        rvu->pf2cgxlmac_map[pf] = cgxlmac_id_to_bmap(cgx, lmac);
                        rvu->cgxlmac2pf_map[CGX_OFFSET(cgx) + lmac] = 1 << pf;
+                       free_pkind = rvu_alloc_rsrc(&pkind->rsrc);
+                       pkind->pfchan_map[free_pkind] = ((pf) & 0x3F) << 16;
                        rvu->cgx_mapped_pfs++;
                }
        }

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 62d8913e7c9244db35938a3257a82e94c14b0a17..4f2528e10e9375a06422abc9906b84b4db70d13e 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -48,6 +48,36 @@ static bool is_valid_txschq(struct rvu *rvu, int blkaddr,
        return true;
 }
 
+static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf)
+{
+       struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
+       u8 cgx_id, lmac_id;
+       int pkind, pf;
+
+       pf = rvu_get_pf(pcifunc);
+       if (!is_pf_cgxmapped(rvu, pf) && type != NIX_INTF_TYPE_LBK)
+               return 0;
+
+       switch (type) {
+       case NIX_INTF_TYPE_CGX:
+               pfvf->cgx_lmac = rvu->pf2cgxlmac_map[pf];
+               rvu_get_cgx_lmac_id(pfvf->cgx_lmac, &cgx_id, &lmac_id);
+
+               pkind = rvu_npc_get_pkind(rvu, pf);
+               if (pkind < 0) {
+                       dev_err(rvu->dev,
+                               "PF_Func 0x%x: Invalid pkind\n", pcifunc);
+                       return -EINVAL;
+               }
+               cgx_set_pkind(rvu_cgx_pdata(cgx_id, rvu), lmac_id, pkind);
+               rvu_npc_set_pkind(rvu, pkind, pfvf);
+               break;
+       case NIX_INTF_TYPE_LBK:
+               break;
+       }
+       return 0;
+}
+
 static void nix_setup_lso_tso_l3(struct rvu *rvu, int blkaddr,
                                 u64 format, bool v4, u64 *fidx)
 {
@@ -639,6 +669,10 @@ int rvu_mbox_handler_NIX_LF_ALLOC(struct rvu *rvu,
        /* Config Rx pkt length, csum checks and apad  enable / disable */
        rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_CFG(nixlf), req->rx_cfg);
 
+       err = nix_interface_init(rvu, pcifunc, NIX_INTF_TYPE_CGX, nixlf);
+       if (err)
+               goto free_mem;
+
        goto exit;
 
 free_mem:

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
index 01baf3e0b3e109f309ded822c6228b4effd68ccd..a9738958aaa6e3b6004814f64d2a639ef8460345 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
@@ -17,6 +17,34 @@
 #include "npc.h"
 #include "npc_profile.h"
 
+void rvu_npc_set_pkind(struct rvu *rvu, int pkind, struct rvu_pfvf *pfvf)
+{
+       int blkaddr;
+       u64 val = 0;
+
+       blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
+       if (blkaddr < 0)
+               return;
+
+       /* Config CPI base for the PKIND */
+       val = pkind | 1ULL << 62;
+       rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_CPI_DEFX(pkind, 0), val);
+}
+
+int rvu_npc_get_pkind(struct rvu *rvu, u16 pf)
+{
+       struct npc_pkind *pkind = &rvu->hw->pkind;
+       u32 map;
+       int i;
+
+       for (i = 0; i < pkind->rsrc.max; i++) {
+               map = pkind->pfchan_map[i];
+               if (((map >> 16) & 0x3F) == pf)
+                       return i;
+       }
+       return -1;
+}
+
 static void npc_config_kpuaction(struct rvu *rvu, int blkaddr,
                                 struct npc_kpu_profile_action *kpuaction,
                                 int kpu, int entry, bool pkind)