i2c: i2c-cdns: Fix write transaction state
authorSai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Tue, 1 Mar 2022 08:16:51 +0000 (09:16 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 9 Mar 2022 11:36:37 +0000 (12:36 +0100)
Start write transfer after loading data to FIFO.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f0b3e443daa7758e00dfdcc245cf6b2120b0e907.1646122610.git.michal.simek@xilinx.com
drivers/i2c/i2c-cdns.c

index 5736afb..07d53be 100644 (file)
@@ -251,6 +251,7 @@ static int cdns_i2c_write_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data,
        u8 *cur_data = data;
        struct cdns_i2c_regs *regs = i2c_bus->regs;
        u32 ret;
+       bool start = 1;
 
        /* Set the controller in Master transmit mode and clear FIFO */
        setbits_le32(&regs->control, CDNS_I2C_CONTROL_CLR_FIFO);
@@ -269,6 +270,11 @@ static int cdns_i2c_write_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data,
 
        while (len-- && !is_arbitration_lost(regs)) {
                writel(*(cur_data++), &regs->data);
+               /* Trigger write only after loading data */
+               if (start) {
+                       writel(addr, &regs->address);
+                       start = 0;
+               }
                if (len && readl(&regs->transfer_size) == CDNS_I2C_FIFO_DEPTH) {
                        ret = cdns_i2c_wait(regs, CDNS_I2C_INTERRUPT_COMP |
                                            CDNS_I2C_INTERRUPT_ARBLOST);