media: rzg2l-cru: fix a test for timeout
authorDan Carpenter <error27@gmail.com>
Tue, 29 Nov 2022 09:44:57 +0000 (09:44 +0000)
committerMauro Carvalho Chehab <mchehab@kernel.org>
Tue, 6 Dec 2022 07:18:37 +0000 (07:18 +0000)
The test for if the loop timed out is wrong and Smatch complains:

    drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c:411 rzg2l_csi2_mipi_link_disable()
    warn: should this be 'timeout == -1'

Let's change it to a preop loop instead of a post op loop.

Fixes: 51e8415e39a9 ("media: platform: Add Renesas RZ/G2L MIPI CSI-2 receiver driver")
Signed-off-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c

index 3deb09be6400145c2a60a162070deb9758052189..33e08efa3039c286661943df899a23b4e599c1c2 100644 (file)
@@ -402,7 +402,7 @@ static void rzg2l_csi2_mipi_link_disable(struct rzg2l_csi2 *csi2)
        rzg2l_csi2_write(csi2, CSI2nRTCT, CSI2nRTCT_VSRST);
 
        /* Make sure CSI2nRTST.VSRSTS bit is cleared */
-       while (timeout--) {
+       while (--timeout) {
                if (!(rzg2l_csi2_read(csi2, CSI2nRTST) & CSI2nRTST_VSRSTS))
                        break;
                usleep_range(100, 200);