DRI_CONF_RADV_DGC(false)
DRI_CONF_RADV_FLUSH_BEFORE_QUERY_COPY(false)
DRI_CONF_RADV_ENABLE_UNIFIED_HEAP_ON_APU(false)
+ DRI_CONF_RADV_TEX_NON_UNIFORM(false)
DRI_CONF_SECTION_END
};
// clang-format on
instance->enable_unified_heap_on_apu =
driQueryOptionb(&instance->dri_options, "radv_enable_unified_heap_on_apu");
+
+ instance->tex_non_uniform = driQueryOptionb(&instance->dri_options, "radv_tex_non_uniform");
}
static VkResult create_null_physical_device(struct vk_instance *vk_instance);
key.image_2d_view_of_3d = device->image_2d_view_of_3d &&
device->physical_device->rad_info.gfx_level == GFX9;
+ key.tex_non_uniform = device->instance->tex_non_uniform;
+
return key;
}
bool disable_sinking_load_input_fs;
bool flush_before_query_copy;
bool enable_unified_heap_on_apu;
+ bool tex_non_uniform;
};
VkResult radv_init_wsi(struct radv_physical_device *physical_device);
.func = radv_spirv_nir_debug,
.private_data = &spirv_debug_data,
},
+ .force_tex_non_uniform = key->tex_non_uniform,
};
nir = spirv_to_nir(spirv, stage->spirv.size / 4, spec_entries, num_spec_entries, stage->stage,
stage->entrypoint, &spirv_options,
uint32_t dynamic_rasterization_samples : 1;
uint32_t dynamic_color_write_mask : 1;
uint32_t dynamic_provoking_vtx_mode : 1;
+ uint32_t tex_non_uniform : 1;
struct {
uint32_t instance_rate_inputs;
DRI_CONF_OPT_B(radv_enable_unified_heap_on_apu, def, \
"Enable an unified heap with DEVICE_LOCAL on integrated GPUs")
+#define DRI_CONF_RADV_TEX_NON_UNIFORM(def) \
+ DRI_CONF_OPT_B(radv_tex_non_uniform, def, \
+ "Always mark texture sample operations as non-uniform.")
+
/**
* \brief ANV specific configuration options
*/