crypto: hisilicon/sgl - align the hardware sgl dma address

The hardware needs aligned sgl dma address. So expend the sgl_size to
align 64 bytes.

Signed-off-by: Yang Shen <shenyang39@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/hisilicon/sgl.c b/drivers/crypto/hisilicon/sgl.c
index f7efc02..2b6f228 100644 (file)
--- a/drivers/crypto/hisilicon/sgl.c
+++ b/drivers/crypto/hisilicon/sgl.c
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /* Copyright (c) 2019 HiSilicon Limited. */
+#include <linux/align.h>
 #include <linux/dma-mapping.h>
 #include <linux/hisi_acc_qm.h>
 #include <linux/module.h>
@@ -64,8 +65,9 @@ struct hisi_acc_sgl_pool *hisi_acc_create_sgl_pool(struct device *dev,
        if (!dev || !count || !sge_nr || sge_nr > HISI_ACC_SGL_SGE_NR_MAX)
                return ERR_PTR(-EINVAL);
 
-       sgl_size = sizeof(struct acc_hw_sge) * sge_nr +
-                  sizeof(struct hisi_acc_hw_sgl);
+       sgl_size = ALIGN(sizeof(struct acc_hw_sge) * sge_nr +
+                        sizeof(struct hisi_acc_hw_sgl),
+                        HISI_ACC_SGL_ALIGN_SIZE);
 
        /*
         * the pool may allocate a block of memory of size PAGE_SIZE * 2^(MAX_ORDER - 1),