drm/i915: Unify GT* and GT3 definitions
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 6 Jun 2017 16:06:06 +0000 (09:06 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Wed, 7 Jun 2017 14:52:02 +0000 (07:52 -0700)
This patch clean up a bit the platform definition block in
a way to avoid duplications and to let clear that GT3 for
the current platform only have the extra Media engine (BSD2).

v2: Kabylake IS_KABYLAKE as Anusha noticed.

v3: Avoid EXTRA_ENGINE_MASK and list rings out on GT3 to
    make it more clear.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1496765166-7068-1-git-send-email-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/i915_pci.c

index e9d80df..224f5f9 100644 (file)
@@ -312,16 +312,17 @@ static const struct intel_device_info intel_haswell_info = {
        .has_full_48bit_ppgtt = 1, \
        .has_64bit_reloc = 1
 
+#define BDW_PLATFORM \
+       BDW_FEATURES, \
+       .gen = 8, \
+       .platform = INTEL_BROADWELL
+
 static const struct intel_device_info intel_broadwell_info = {
-       BDW_FEATURES,
-       .gen = 8,
-       .platform = INTEL_BROADWELL,
+       BDW_PLATFORM,
 };
 
 static const struct intel_device_info intel_broadwell_gt3_info = {
-       BDW_FEATURES,
-       .gen = 8,
-       .platform = INTEL_BROADWELL,
+       BDW_PLATFORM,
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
 
@@ -347,22 +348,20 @@ static const struct intel_device_info intel_cherryview_info = {
        CHV_COLORS,
 };
 
+#define SKL_PLATFORM \
+       BDW_FEATURES, \
+       .gen = 9, \
+       .platform = INTEL_SKYLAKE, \
+       .has_csr = 1, \
+       .has_guc = 1, \
+       .ddb_size = 896
+
 static const struct intel_device_info intel_skylake_info = {
-       BDW_FEATURES,
-       .platform = INTEL_SKYLAKE,
-       .gen = 9,
-       .has_csr = 1,
-       .has_guc = 1,
-       .ddb_size = 896,
+       SKL_PLATFORM,
 };
 
 static const struct intel_device_info intel_skylake_gt3_info = {
-       BDW_FEATURES,
-       .platform = INTEL_SKYLAKE,
-       .gen = 9,
-       .has_csr = 1,
-       .has_guc = 1,
-       .ddb_size = 896,
+       SKL_PLATFORM,
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
 
@@ -406,22 +405,20 @@ static const struct intel_device_info intel_geminilake_info = {
        .color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
 };
 
+#define KBL_PLATFORM \
+       BDW_FEATURES, \
+       .gen = 9, \
+       .platform = INTEL_KABYLAKE, \
+       .has_csr = 1, \
+       .has_guc = 1, \
+       .ddb_size = 896
+
 static const struct intel_device_info intel_kabylake_info = {
-       BDW_FEATURES,
-       .platform = INTEL_KABYLAKE,
-       .gen = 9,
-       .has_csr = 1,
-       .has_guc = 1,
-       .ddb_size = 896,
+       KBL_PLATFORM,
 };
 
 static const struct intel_device_info intel_kabylake_gt3_info = {
-       BDW_FEATURES,
-       .platform = INTEL_KABYLAKE,
-       .gen = 9,
-       .has_csr = 1,
-       .has_guc = 1,
-       .ddb_size = 896,
+       KBL_PLATFORM,
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };