#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineInstrBundle.h"
#include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/CodeGen/ReachingDefAnalysis.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/MC/MCInstrDesc.h"
-#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Support/Debug.h"
#include <cassert>
#include <new>
class MVEVPTBlock : public MachineFunctionPass {
public:
static char ID;
- const Thumb2InstrInfo *TII;
- const TargetRegisterInfo *TRI;
MVEVPTBlock() : MachineFunctionPass(ID) {}
bool runOnMachineFunction(MachineFunction &Fn) override;
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
+ AU.setPreservesCFG();
+ AU.addRequired<ReachingDefAnalysis>();
+ MachineFunctionPass::getAnalysisUsage(AU);
+ }
+
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoVRegs);
+ MachineFunctionProperties::Property::NoVRegs).set(
+ MachineFunctionProperties::Property::TracksLiveness);
}
StringRef getPassName() const override {
private:
bool InsertVPTBlocks(MachineBasicBlock &MBB);
+
+ const Thumb2InstrInfo *TII = nullptr;
+ ReachingDefAnalysis *RDA = nullptr;
};
char MVEVPTBlock::ID = 0;
}
}
-static MachineInstr *findVCMPToFoldIntoVPST(MachineBasicBlock::iterator MI,
- const TargetRegisterInfo *TRI,
+static MachineInstr *findVCMPToFoldIntoVPST(MachineInstr *MI,
+ ReachingDefAnalysis *RDA,
unsigned &NewOpcode) {
- // Search backwards to the instruction that defines VPR. This may or not
- // be a VCMP, we check that after this loop. If we find another instruction
- // that reads cpsr, we return nullptr.
- MachineBasicBlock::iterator CmpMI = MI;
- while (CmpMI != MI->getParent()->begin()) {
- --CmpMI;
- if (CmpMI->modifiesRegister(ARM::VPR, TRI))
- break;
- if (CmpMI->readsRegister(ARM::VPR, TRI))
- break;
- }
-
- if (CmpMI == MI)
- return nullptr;
- NewOpcode = VCMPOpcodeToVPT(CmpMI->getOpcode());
- if (NewOpcode == 0)
+ // First, search backwards to the instruction that defines VPR
+ auto *Def = RDA->getReachingMIDef(MI, ARM::VPR);
+ if (!Def)
return nullptr;
- // Search forward from CmpMI to MI, checking if either register was def'd
- if (registerDefinedBetween(CmpMI->getOperand(1).getReg(), std::next(CmpMI),
- MI, TRI))
+ // Now check that Def is a VCMP
+ if (!(NewOpcode = VCMPOpcodeToVPT(Def->getOpcode())))
return nullptr;
- if (registerDefinedBetween(CmpMI->getOperand(2).getReg(), std::next(CmpMI),
- MI, TRI))
+
+ // Check that Def's operands are not defined between the VCMP and MI, i.e.
+ // check that they have the same reaching def.
+ if (!RDA->hasSameReachingDef(Def, MI, Def->getOperand(1).getReg()) ||
+ !RDA->hasSameReachingDef(Def, MI, Def->getOperand(2).getReg()))
return nullptr;
- return &*CmpMI;
+
+ return Def;
}
bool MVEVPTBlock::InsertVPTBlocks(MachineBasicBlock &Block) {
// a VPST directly
MachineInstrBuilder MIBuilder;
unsigned NewOpcode;
- MachineInstr *VCMP = findVCMPToFoldIntoVPST(MI, TRI, NewOpcode);
+ MachineInstr *VCMP = findVCMPToFoldIntoVPST(MI, RDA, NewOpcode);
if (VCMP) {
LLVM_DEBUG(dbgs() << " folding VCMP into VPST: "; VCMP->dump());
MIBuilder = BuildMI(Block, MI, dl, TII->get(NewOpcode));
return false;
TII = static_cast<const Thumb2InstrInfo *>(STI.getInstrInfo());
- TRI = STI.getRegisterInfo();
+ RDA = &getAnalysis<ReachingDefAnalysis>();
LLVM_DEBUG(dbgs() << "********** ARM MVE VPT BLOCKS **********\n"
<< "********** Function: " << Fn.getName() << '\n');