#include <asm/arch/clk.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/power.h>
+#ifndef CONFIG_TPL_TM2
#include <asm/gpio.h>
+#endif
#define DWMMC_MAX_CH_NUM 4
#define DWMMC_MAX_FREQ 52000000
static int exynos_dwmci_core_init(struct dwmci_host *host)
{
- unsigned int div;
int addr_config;
+
+#ifndef CONFIG_TPL_TM2
unsigned long freq, sclk;
+ unsigned int div;
if (host->bus_hz)
freq = host->bus_hz;
div = DIV_ROUND_UP(sclk, freq);
/* set the clock divisor for mmc */
set_mmc_clk(host->dev_index, div);
+#endif
host->name = "EXYNOS DWMMC";
#ifdef CONFIG_EXYNOS5420
return -1;
}
#endif
-
return 0;
}
+#ifndef CONFIG_TPL_TM2
+/*
+ * This function adds the mmc channel to be registered with mmc core.
+ * index - mmc channel number.
+ * regbase - register base address of mmc channel specified in 'index'.
+ * bus_width - operating bus width of mmc channel specified in 'index'.
+ * clksel - value to be written into CLKSEL register in case of FDT.
+ * NULL in case od non-FDT.
+ */
+int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel)
+{
+ struct dwmci_host *host = NULL;
+ struct dwmci_exynos_priv_data *priv;
+
+ host = malloc(sizeof(struct dwmci_host));
+ if (!host) {
+ error("dwmci_host malloc fail!\n");
+ return -ENOMEM;
+ }
+ priv = malloc(sizeof(struct dwmci_exynos_priv_data));
+ if (!priv) {
+ error("dwmci_exynos_priv_data malloc fail!\n");
+ return -ENOMEM;
+ }
+
+ host->ioaddr = (void *)regbase;
+ host->buswidth = bus_width;
+
+ if (clksel)
+ priv->sdr_timing = clksel;
+
+ host->priv = priv;
+
+ return 0;
+}
+#endif /* CONFIG_TPL_TM2" */
static struct dwmci_host dwmci_host[DWMMC_MAX_CH_NUM];
static int do_dwmci_init(struct dwmci_host *host)
{
+#ifndef CONFIG_TPL_TM2
int flag, err;
flag = host->buswidth == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE;
printf("DWMMC%d not configure\n", host->dev_index);
return err;
}
-
+#endif
return exynos_dwmci_core_init(host);
}
struct dwmci_host *host)
{
int err = 0;
- u32 base, timing[3];
+ u32 timing[3];
+ dma_addr_t base;
struct dwmci_exynos_priv_data *priv;
priv = malloc(sizeof(struct dwmci_exynos_priv_data));
}
/* Extract device id for each mmc channel */
+#ifndef CONFIG_TPL_TM2
host->dev_id = pinmux_decode_periph_id(blob, node);
-
+#else
+ host->dev_id = 0;
+#endif
host->dev_index = fdtdec_get_int(blob, node, "index", host->dev_id);
if (host->dev_index == host->dev_id)
host->dev_index = host->dev_id - PERIPH_ID_SDMMC0;
int exynos_dwmmc_init(const void *blob)
{
int node_list[DWMMC_MAX_CH_NUM];
- int boot_dev_node;
int err = 0, count;
count = fdtdec_find_aliases_for_id(blob, "mmc",
COMPAT_SAMSUNG_EXYNOS_DWMMC, node_list,
DWMMC_MAX_CH_NUM);
+#ifndef CONFIG_TPL_TM2
+ int boot_dev_node;
/* For DWMMC always set boot device as mmc 0 */
if (count >= 3 && get_boot_mode() == BOOT_MODE_SD) {
boot_dev_node = node_list[2];
node_list[2] = node_list[0];
node_list[0] = boot_dev_node;
}
-
+#endif
err = exynos_dwmci_process_node(blob, node_list, count);
return err;