armv8/fsl-lsch2: correct QMAN clock
authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Wed, 25 Apr 2018 08:28:44 +0000 (16:28 +0800)
committerYork Sun <york.sun@nxp.com>
Wed, 9 May 2018 14:17:51 +0000 (09:17 -0500)
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c

index 7edc06d..546de33 100644 (file)
@@ -469,6 +469,14 @@ config SYS_FSL_SDHC_CLK_DIV
        help
          This is the divider that is used to derive SDHC clock from Platform
          clock, in another word SDHC_clk = Platform_clk / this_divider.
+
+config SYS_FSL_QMAN_CLK_DIV
+       int "QMAN clock divider"
+       default 1 if ARCH_LS1043A
+       default 2
+       help
+         This is the divider that is used to derive QMAN clock from Platform
+         clock, in another word QMAN_clk = Platform_clk / this_divider.
 endmenu
 
 config RESV_RAM
index 8386678..723d7ea 100644 (file)
@@ -155,7 +155,9 @@ void get_sys_info(struct sys_info *sys_info)
                                                CONFIG_SYS_FSL_IFC_CLK_DIV;
 #endif
 #ifdef CONFIG_SYS_DPAA_QBMAN
-       sys_info->freq_qman = sys_info->freq_systembus;
+       sys_info->freq_qman = (sys_info->freq_systembus /
+                               CONFIG_SYS_FSL_PCLK_DIV) /
+                               CONFIG_SYS_FSL_QMAN_CLK_DIV;
 #endif
 }