[arm] Fix use of CRC32 intrinsics with Armv8-a and hard-float

We currently have a nasty error when trying to use the __crc* intrinsics
with an -mfloat-abi=hard.
That is because the target pragma guarding them uses armv8-a+crc that
does not include fp by default.
So we get errors like:
error: '-mfloat-abi=hard': selected processor lacks an FPU

This patch fixes that by using an FP-enabled arch target pragma to guard
these intrinsics when floating-point is available.
That way both the softfloat and hardfloat variants work.

     * config/arm/arm_acle.h: Use arch=armv8-a+crc+simd pragma for CRC32
     intrinsics if __ARM_FP.
     Use __ARM_FEATURE_CRC32 ifdef guard.

     * gcc.target/arm/acle/crc_hf_1.c: New test.

From-SVN: r274827

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8984d0e..2e58369 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-08-22  Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+       * config/arm/arm_acle.h: Use arch=armv8-a+crc+simd pragma for CRC32
+       intrinsics if __ARM_FP.
+       Use __ARM_FEATURE_CRC32 ifdef guard.
+
 2019-08-22  Wilco Dijkstra  <wdijkstr@arm.com>
 
        * config/arm/arm.md (neon_for_64bits): Remove.

diff --git a/gcc/config/arm/arm_acle.h b/gcc/config/arm/arm_acle.h
index 2c7acc6..6857ab1 100644 (file)
--- a/gcc/config/arm/arm_acle.h
+++ b/gcc/config/arm/arm_acle.h
@@ -174,8 +174,12 @@ __arm_mrrc2 (const unsigned int __coproc, const unsigned int __opc1,
 #endif /* (!__thumb__ || __thumb2__) &&  __ARM_ARCH >= 4.  */
 
 #pragma GCC push_options
-#if __ARM_ARCH >= 8
+#ifdef __ARM_FEATURE_CRC32
+#ifdef __ARM_FP
+#pragma GCC target ("arch=armv8-a+crc+simd")
+#else
 #pragma GCC target ("arch=armv8-a+crc")
+#endif
 
 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
 __crc32b (uint32_t __a, uint8_t __b)
@@ -235,7 +239,7 @@ __crc32cd (uint32_t __a, uint64_t __b)
 }
 #endif
 
-#endif /* __ARM_ARCH >= 8.  */
+#endif /* __ARM_FEATURE_CRC32  */
 #pragma GCC pop_options
 
 #ifdef __cplusplus

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index a389067..46b63d5 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2019-08-22  Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+       * gcc.target/arm/acle/crc_hf_1.c: New test.
+
 2019-08-22  Wilco Dijkstra  <wdijkstr@arm.com>
 
        * gcc.target/arm/neon-extend-1.c: Remove test.

diff --git a/gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c b/gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c
new file mode 100644 (file)
index 0000000..e6cbfc0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c
@@ -0,0 +1,14 @@
+/* Test that using an Armv8-a hard-float target doesn't
+   break CRC intrinsics.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
+/* { dg-options "-mfloat-abi=hard -march=armv8-a+simd+crc" } */
+
+#include <arm_acle.h>
+
+uint32_t
+foo (uint32_t a, uint32_t b)
+{
+  return __crc32cw (a, b);
+}