READ_NEXT_PAIR(v1, v2, i);
}
- if (bMatched == false) {
+ if (!bMatched) {
/* Condition isn't matched.
* Discard the following (offset, data) pairs.
*/
READ_NEXT_PAIR(v1, v2, i);
}
- if (bMatched == false) {
+ if (!bMatched) {
/* Condition isn't matched.
* Discard the following (offset, data) pairs.
*/
READ_NEXT_PAIR(v1, v2, i);
}
- if (bMatched == false) {
+ if (!bMatched) {
/* Condition isn't matched. Discard the following (offset, data) pairs. */
while (v1 < 0x40000000 && i < ArrayLen-2)
READ_NEXT_PAIR(v1, v2, i);
READ_NEXT_PAIR(v1, v2, i);
}
- if (bMatched == false) {
+ if (!bMatched) {
/* Condition isn't matched.
* Discard the following (offset, data) pairs.
*/
struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
- if (ODM_CheckPowerStatus(padapter) == false)
+ if (!ODM_CheckPowerStatus(padapter))
return;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save ADDA parameters.\n"));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n"));
pathOn = 0x01c00014;
- if (false == is2T) {
+ if (!is2T) {
pathOn = 0x01c00014;
PHY_SetBBReg(pDM_Odm->Adapter, ADDAReg[0], bMaskDWord, 0x01c00014);
} else {
u32 StartTime;
s32 ProgressingTime;
- if (ODM_CheckPowerStatus(padapter) == false)
+ if (!ODM_CheckPowerStatus(padapter))
return;
if (!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION))
if (0xFF == hw_channel_plan)
AutoLoadFail = true;
- if (false == AutoLoadFail) {
+ if (!AutoLoadFail) {
u8 hw_chnlPlan;
hw_chnlPlan = hw_channel_plan & (~EEPROM_CHANNEL_PLAN_BY_HW_MASK);
bool bDFSBand = false;
bool bPerformance = true, bFirstTpTarget = false, bFirstCoverage = false;
- if (odm_DigAbort(pDM_Odm) == true)
+ if (odm_DigAbort(pDM_Odm))
return;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() ===========================>\n\n"));