&i2c0 {
clock-frequency = <100000>;
i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <3000>;
- i2c-scl-falling-time-ns = <3000>;
+ i2c-sda-falling-time-ns = <510>;
+ i2c-scl-falling-time-ns = <510>;
auto_calc_scl_lhcnt;
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
&i2c1 {
clock-frequency = <100000>;
i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <3000>;
- i2c-scl-falling-time-ns = <3000>;
+ i2c-sda-falling-time-ns = <510>;
+ i2c-scl-falling-time-ns = <510>;
auto_calc_scl_lhcnt;
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
&i2c2 {
clock-frequency = <100000>;
i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <3000>;
- i2c-scl-falling-time-ns = <3000>;
+ i2c-sda-falling-time-ns = <510>;
+ i2c-scl-falling-time-ns = <510>;
auto_calc_scl_lhcnt;
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
&i2c3 {
clock-frequency = <100000>;
i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <3000>;
- i2c-scl-falling-time-ns = <3000>;
+ i2c-sda-falling-time-ns = <510>;
+ i2c-scl-falling-time-ns = <510>;
auto_calc_scl_lhcnt;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins>;
&i2c4 {
clock-frequency = <100000>;
i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <3000>;
- i2c-scl-falling-time-ns = <3000>;
+ i2c-sda-falling-time-ns = <510>;
+ i2c-scl-falling-time-ns = <510>;
auto_calc_scl_lhcnt;
pinctrl-names = "default";
pinctrl-0 = <&i2c4_pins>;
&i2c5 {
clock-frequency = <100000>;
i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <3000>;
- i2c-scl-falling-time-ns = <3000>;
+ i2c-sda-falling-time-ns = <510>;
+ i2c-scl-falling-time-ns = <510>;
auto_calc_scl_lhcnt;
pinctrl-names = "default";
pinctrl-0 = <&i2c5_pins>;
&i2c6 {
clock-frequency = <100000>;
i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <3000>;
- i2c-scl-falling-time-ns = <3000>;
+ i2c-sda-falling-time-ns = <510>;
+ i2c-scl-falling-time-ns = <510>;
auto_calc_scl_lhcnt;
pinctrl-names = "default";
pinctrl-0 = <&i2c6_pins>;
<&rstgen RSTN_U0_NOC_BUS_CPU_AXI_N>,
<&rstgen RSTN_U0_NOC_BUS_AXICFG0_AXI_N>,
<&rstgen RSTN_U0_NOC_BUS_APB_BUS_N>,
- <&rstgen RSTN_U0_NOC_BUS_GPU_AXI_N>,
- <&rstgen RSTN_U0_NOC_BUS_VDEC_AXI_N>,
- <&rstgen RSTN_U0_JTAG2APB_PRESETN>,
<&rstgen RSTN_U0_NOC_BUS_DISP_AXI_N>,
- <&rstgen RSTN_U0_NOC_BUS_ISP_AXI_N>,
- <&rstgen RSTN_U0_NOC_BUS_STG_AXI_N>,
- <&rstgen RSTN_U0_NOC_BUS_DDRC_N>;
+ <&rstgen RSTN_U0_NOC_BUS_STG_AXI_N>;
reset-names = "rst_vout_src","rst_axi","rst_ahb","rst_core",
"rst_noc_cpu","rst_noc_axicfg0","rst_noc_apb",
- "rst_noc_gpu","rst_noc_vdec","rst_jtag2apb",
- "rst_noc_disp","rst_noc_isp","rst_noc_stg","rst_noc_ddrc";
+ "rst_noc_disp","rst_noc_stg";
power-domains = <&pwrc JH7110_PD_VOUT>;
};
#define JH7110_SHA_KEY_DONE BIT(13)
u32 key_done :1;
u32 key_flag :1;
+#define JH7110_SHA_HMAC_DONE BIT(15)
u32 hmac_done :1;
#define JH7110_SHA_BUSY BIT(16)
u32 busy :1;
static inline int jh7110_hash_wait_hmac_done(struct jh7110_sec_ctx *ctx)
{
struct jh7110_sec_dev *sdev = ctx->sdev;
- int ret = -1;
-
- if (sdev->done_flags & JH7110_SHA_HMAC_DONE)
- ret = 0;
+ u32 status;
- return ret;
+ return readl_relaxed_poll_timeout(sdev->io_base + JH7110_SHA_SHACSR, status,
+ (status & JH7110_SHA_HMAC_DONE), 10, 100000);
}
static inline int jh7110_hash_wait_busy(struct jh7110_sec_ctx *ctx)
rctx->csr.sha_csr.v = 0;
rctx->csr.sha_csr.mode = ctx->sha_mode & JH7110_SHA_MODE_MASK;
- if (ctx->sdev->use_dma)
- rctx->csr.sha_csr.ie = 1;
if (ctx->sha_mode & JH7110_SHA_HMAC_FLAGS)
ret = jh7110_sha_hmac_key(ctx);
struct mutex aes_lock;
struct mutex rsa_lock;
-#define JH7110_SHA_HMAC_DONE BIT(1)
#define JH7110_SHA_SHA_DONE BIT(2)
#define JH7110_AES_DONE BIT(3)
#define JH7110_DES_DONE BIT(4)
clk_disable_unprepare(dc->stg_axi);
}
-static int vs_dc_get_reset(struct device *dev, struct vs_dc *dc)
-{
- int ret;
-
- dc->cpu_axi_n = reset_control_get_exclusive(dev, "rst_noc_cpu");
- if (IS_ERR(dc->cpu_axi_n)) {
- dev_err(dev, "failed to get cpu_axi_n\n");
- return PTR_ERR(dc->cpu_axi_n);
- }
- dc->axicfg0_axi_n = reset_control_get_exclusive(dev, "rst_noc_axicfg0");
- if (IS_ERR(dc->axicfg0_axi_n)) {
- dev_err(dev, "failed to get axicfg0_axi_n\n");
- return PTR_ERR(dc->axicfg0_axi_n);
- }
- dc->apb_bus_n = reset_control_get_exclusive(dev, "rst_noc_apb");
- if (IS_ERR(dc->apb_bus_n)) {
- dev_err(dev, "failed to get apb_bus_n\n");
- return PTR_ERR(dc->apb_bus_n);
- }
- dc->disp_axi_n = reset_control_get_exclusive(dev, "rst_noc_disp");
- if (IS_ERR(dc->disp_axi_n)) {
- dev_err(dev, "failed to get disp_axi_n\n");
- return PTR_ERR(dc->disp_axi_n);
- }
- dc->stg_axi_n = reset_control_get_exclusive(dev, "rst_noc_stg");
- if (IS_ERR(dc->stg_axi_n)) {
- dev_err(dev, "failed to get stg_axi_n\n");
- return PTR_ERR(dc->stg_axi_n);
- }
-
- return ret;
-}
-
-static int vs_dc_resets_deassert(struct device *dev, struct vs_dc *dc)
-{
- int ret;
-
- ret = reset_control_deassert(dc->cpu_axi_n);
- if (ret < 0) {
- dev_err(dev, "failed to deassert cpu_axi_n\n");
- return ret;
- }
- ret = reset_control_deassert(dc->axicfg0_axi_n);
- if (ret < 0) {
- dev_err(dev, "failed to deassert axicfg0_axi_n\n");
- return ret;
- }
- ret = reset_control_deassert(dc->apb_bus_n);
- if (ret < 0) {
- dev_err(dev, "failed to deassert apb_bus_n\n");
- return ret;
- }
- ret = reset_control_deassert(dc->disp_axi_n);
- if (ret < 0) {
- dev_err(dev, "failed to deassert disp_axi_n\n");
- return ret;
- }
- ret = reset_control_deassert(dc->stg_axi_n);
- if (ret < 0) {
- dev_err(dev, "failed to deassert stg_axi_n\n");
- return ret;
- }
- return ret;
-}
-
-static int vs_dc_resets_assert(struct device *dev, struct vs_dc *dc)
-{
- int ret;
-
- ret = reset_control_assert(dc->cpu_axi_n);
- if (ret < 0) {
- dev_err(dev, "failed to assert cpu_axi_n\n");
- return ret;
- }
- ret = reset_control_assert(dc->axicfg0_axi_n);
- if (ret < 0) {
- dev_err(dev, "failed to assert axicfg0_axi_n\n");
- return ret;
- }
- ret = reset_control_assert(dc->apb_bus_n);
- if (ret < 0) {
- dev_err(dev, "failed to assert apb_bus_n\n");
- return ret;
- }
- ret = reset_control_assert(dc->disp_axi_n);
- if (ret < 0) {
- dev_err(dev, "failed to assert disp_axi_n\n");
- return ret;
- }
- ret = reset_control_assert(dc->stg_axi_n);
- if (ret < 0) {
- dev_err(dev, "failed to assert stg_axi_n\n");
- return ret;
- }
- return ret;
-}
-
static int vs_dc_vouttop_get_clock(struct device *dev, struct vs_dc *dc)
{
int ret;
clk_disable_unprepare(dc->bclk_mst);
}
-static int vs_dc_vouttop_get_reset(struct device *dev, struct vs_dc *dc)
-{
- int ret;
-
- dc->rstn_vout_src = reset_control_get_exclusive(dev, "rst_vout_src");
- if (IS_ERR(dc->rstn_vout_src)) {
- dev_err(dev, "failed to get rstn_vout_src\n");
- return PTR_ERR(dc->rstn_vout_src);
- }
- return ret;
-}
-
-static int vs_dc_vouttop_resets_deassert(struct device *dev, struct vs_dc *dc)
-{
- int ret;
- ret = reset_control_deassert(dc->rstn_vout_src);
- if (ret < 0) {
- dev_err(dev, "failed to deassert rstn_vout_src\n");
- return ret;
- }
- return ret;
-}
-
-static int vs_dc_vouttop_resets_assert(struct device *dev, struct vs_dc *dc)
-{
- int ret;
- ret = reset_control_assert(dc->rstn_vout_src);
- if (ret < 0) {
- dev_err(dev, "failed to deassert rstn_vout_src\n");
- return ret;
- }
- return ret;
-}
-
static int vs_dc_dc8200_get_clock(struct device *dev, struct vs_dc *dc)
{
int ret;
clk_disable_unprepare(dc->dc8200_ahb);
}
-static int vs_dc_dc8200_get_reset(struct device *dev, struct vs_dc *dc)
-{
- int ret;
-
- dc->rstn_dc8200_axi = reset_control_get_exclusive(dev, "rst_axi");
- if (IS_ERR(dc->rstn_dc8200_axi)) {
- dev_err(dev, "failed to get rstn_dc8200_axi\n");
- return PTR_ERR(dc->rstn_dc8200_axi);
- }
- dc->rstn_dc8200_core = reset_control_get_exclusive(dev, "rst_core");
- if (IS_ERR(dc->rstn_dc8200_core)) {
- dev_err(dev, "failed to get rstn_dc8200_core\n");
- return PTR_ERR(dc->rstn_dc8200_core);
- }
- dc->rstn_dc8200_ahb = reset_control_get_exclusive(dev, "rst_ahb");
- if (IS_ERR(dc->rstn_dc8200_ahb)) {
- dev_err(dev, "failed to get rstn_dc8200_ahb\n");
- return PTR_ERR(dc->rstn_dc8200_ahb);
- }
- return ret;
-}
-
-static int vs_dc_dc8200_resets_deassert(struct device *dev, struct vs_dc *dc)
-{
- int ret;
- ret = reset_control_deassert(dc->rstn_dc8200_axi);
- if (ret < 0) {
- dev_err(dev, "failed to deassert rstn_dc8200_axi\n");
- return ret;
- }
- ret = reset_control_deassert(dc->rstn_dc8200_core);
- if (ret < 0) {
- dev_err(dev, "failed to deassert rstn_dc8200_core\n");
- return ret;
- }
- ret = reset_control_deassert(dc->rstn_dc8200_ahb);
- if (ret < 0) {
- dev_err(dev, "failed to deassert rstn_dc8200_ahb\n");
- return ret;
- }
- return ret;
-}
-
-static int vs_dc_dc8200_resets_assert(struct device *dev, struct vs_dc *dc)
-{
- int ret;
- ret = reset_control_assert(dc->rstn_dc8200_axi);
- if (ret < 0) {
- dev_err(dev, "failed to assert rstn_dc8200_axi\n");
- return ret;
- }
- ret = reset_control_assert(dc->rstn_dc8200_core);
- if (ret < 0) {
- dev_err(dev, "failed to assert rstn_dc8200_core\n");
- return ret;
- }
- ret = reset_control_assert(dc->rstn_dc8200_ahb);
- if (ret < 0) {
- dev_err(dev, "failed to assert rstn_dc8200_ahb\n");
- return ret;
- }
- return ret;
-}
-
static int dc_vout_clk_rst_init(struct device *dev, struct vs_dc *dc)
{
int ret;
dev_err(dev, "failed to get clock\n");
return ret;
}
- ret = vs_dc_get_reset(dev, dc);
- if (ret) {
- dev_err(dev, "failed to get reset\n");
- return ret;
- }
+
ret = vs_dc_clock_enable(dev, dc);
if (ret) {
dev_err(dev, "failed to enable clock\n");
return ret;
}
- ret = vs_dc_resets_deassert(dev, dc);
- if (ret) {
- dev_err(dev, "failed to deassert reset\n");
- return ret;
- }
ret = vs_dc_vouttop_get_clock(dev, dc);
if (ret) {
dev_err(dev, "failed to get clock\n");
return ret;
}
- ret = vs_dc_vouttop_get_reset(dev, dc);
- if (ret) {
- dev_err(dev, "failed to get reset\n");
- return ret;
- }
+
ret = vs_dc_vouttop_clock_enable(dev, dc);
if (ret) {
dev_err(dev, "failed to enable clock\n");
return ret;
}
- ret = vs_dc_vouttop_resets_deassert(dev, dc);
- if (ret) {
- dev_err(dev, "failed to deassert reset\n");
- return ret;
- }
ret = vs_dc_dc8200_get_clock(dev, dc);
if (ret) {
dev_err(dev, "failed to get clock\n");
return ret;
}
- ret = vs_dc_dc8200_get_reset(dev, dc);
- if (ret) {
- dev_err(dev, "failed to get reset\n");
- return ret;
- }
+
ret = vs_dc_dc8200_clock_enable(dev, dc);
if (ret) {
dev_err(dev, "failed to enable clock\n");
return ret;
}
- ret = vs_dc_dc8200_resets_deassert(dev, dc);
- if (ret) {
- dev_err(dev, "failed to deassert reset\n");
+
+ dc->vout_resets = devm_reset_control_array_get_exclusive(dev);
+ if (IS_ERR(dc->vout_resets)) {
+ ret = PTR_ERR(dc->vout_resets);
+ dev_err(dev, "faied to get vout resets controls\n");
+ }
+
+ ret = reset_control_deassert(dc->vout_resets);
+ if (ret){
+ dev_err(dev, "deassert error.\n");
return ret;
}
{
struct vs_dc *dc = dev_get_drvdata(dev);
struct platform_device *pdev = to_platform_device(dev);
-
+ int ret;
dc_hw_enable_interrupt(&dc->hw, 0);
dc_hw_deinit(&dc->hw);
vs_dc_dc8200_clock_disable(dc);
vs_dc_vouttop_clock_disable(dc);
vs_dc_clock_disable(dc);
- vs_dc_dc8200_resets_assert(dev, dc);
- vs_dc_vouttop_resets_assert(dev, dc);
- //vs_dc_resets_assert(dev, dc);
- //plda_clk_rst_deinit(dev);
+ ret = reset_control_assert(dc->vout_resets);
+ if (ret)
+ dev_err(dev, "assert vout resets error.\n");
+
pm_runtime_put_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev);
}
display.v_active = mode->vdisplay;
display.v_total = mode->vtotal;
- display.v_sync_start = mode->vsync_start;
- display.v_sync_end = mode->vsync_end;
+
+ if (crtc_state->encoder_type == DRM_MODE_ENCODER_DSI){
+ display.v_sync_start = mode->vsync_start + 1;
+ display.v_sync_end = mode->vsync_end - 1;
+ }else{
+ display.v_sync_start = mode->vsync_start;
+ display.v_sync_end = mode->vsync_end;
+ }
+
if (mode->flags & DRM_MODE_FLAG_PVSYNC)
display.v_sync_polarity = true;
else
struct clk *disp_axi;
struct clk *stg_axi;
- struct reset_control *cpu_axi_n;
- struct reset_control *axicfg0_axi_n;
- struct reset_control *apb_bus_n;
- struct reset_control *disp_axi_n;
- struct reset_control *stg_axi_n;
-
struct clk *vout_src;
struct clk *vout_axi;
struct clk *ahb1;
struct clk *hdmitx0_mclk;
struct clk *bclk_mst;
- struct reset_control *rstn_vout_src;
-
struct clk *dc8200_clk_pix0;
struct clk *dc8200_clk_pix1;
struct clk *dc8200_axi;
struct clk *dc8200_core;
struct clk *dc8200_ahb;
- struct reset_control *rstn_dc8200_axi;
- struct reset_control *rstn_dc8200_core;
- struct reset_control *rstn_dc8200_ahb;
-
struct clk *vout_top_axi;
struct clk *vout_top_lcd;
struct clk *dc8200_clk_pix0_out;
struct clk *dc8200_clk_pix1_out;
+ struct reset_control *vout_resets;
+
struct regmap *dss_regmap;
};
else
dc_set_clear(hw, DC_DISPLAY_PANEL_START, 0, BIT(1) | BIT(2));
-#ifdef CONFIG_STARFIVE_DSI
- dc_write(hw, DC_DISPLAY_H + offset, hw->display[id].h_active |
- (hw->display[id].h_total << 16));
-
- dc_write(hw, DC_DISPLAY_H_SYNC + offset,
- hw->display[id].h_sync_start |
- (hw->display[id].h_sync_end << 15) |
- BIT(31) |
- BIT(30));
-
- dc_write(hw, DC_DISPLAY_V + offset, hw->display[id].v_active |
- (hw->display[id].v_total << 16));
-
- dc_write(hw, DC_DISPLAY_V_SYNC + offset,
- hw->display[id].v_sync_start |
- (hw->display[id].v_sync_end << 15) |
- (hw->display[id].v_sync_polarity ? 0 : BIT(31)) |
- BIT(30));
-
-#else
dc_write(hw, DC_DISPLAY_H + offset, hw->display[id].h_active |
(hw->display[id].h_total << 16));
dc_write(hw, DC_DISPLAY_H_SYNC + offset,
(hw->display[id].v_sync_end << 15) |
(hw->display[id].v_sync_polarity ? 0 : BIT(31)) |
BIT(30));
-#endif
if (hw->info->pipe_sync) {
switch (display->sync_mode) {
struct stfcamss *stfcamss = vin_dev->stfcamss;
struct stf_vin_dev *vin = vin_dev->stfcamss->vin;
- print_reg(ST_VIN, vin->sysctrl_base, SYSCONSAIF_SYSCFG_20);
+ //make the axiwr alway on
if (on) {
reset_control_deassert(stfcamss->sys_rst[STFRST_AXIWR].rstc);
reg_set(vin->sysctrl_base, SYSCONSAIF_SYSCFG_20, U0_VIN_CNFG_AXIWR0_EN);
- } else {
- reg_clear(vin->sysctrl_base, SYSCONSAIF_SYSCFG_20, U0_VIN_CNFG_AXIWR0_EN);
- reset_control_assert(stfcamss->sys_rst[STFRST_AXIWR].rstc);
}
- print_reg(ST_VIN, vin->sysctrl_base, SYSCONSAIF_SYSCFG_20);
-
return 0;
}
#include <linux/pinctrl/consumer.h>
#include <linux/reset.h>
#include <linux/platform_device.h>
+#include <linux/clk/clk-conf.h>
+#include <linux/pm_domain.h>
/*
* This macro is used to define some register default values.
master->bus_num = platform_info->bus_id;
master->cleanup = pl022_cleanup;
master->setup = pl022_setup;
- master->auto_runtime_pm = true;
+ /* If open CONFIG_PM, auto_runtime_pm should be false when of-platform.*/
+ if (platform_flag)
+ master->auto_runtime_pm = false;
+ else
+ master->auto_runtime_pm = true;
master->transfer_one_message = pl022_transfer_one_message;
master->unprepare_transfer_hardware = pl022_unprepare_transfer_hardware;
master->rt = platform_info->rt;
/* If that failed, use channels from platform_info */
if (status == 0)
platform_info->enable_dma = 1;
- else if (platform_info->enable_dma) {
+ else if (platform_flag) {
+ platform_info->enable_dma = 0;
+ dev_info(&adev->dev, "work without dma!\n");
+ } else if (platform_info->enable_dma) {
status = pl022_dma_probe(pl022);
if (status != 0)
platform_info->enable_dma = 0;
ret = -EINVAL;
}
+ ret = of_clk_set_defaults(dev->of_node, false);
+ if (ret < 0)
+ goto err_probe;
+
+ ret = dev_pm_domain_attach(dev, true);
+ if (ret)
+ goto err_probe;
+
+ pm_runtime_get_noresume(dev);
+ pm_runtime_set_active(dev);
+ pm_runtime_enable(dev);
+
ret = pl022_probe(pcdev, &id);
+ if (ret) {
+ pm_runtime_disable(dev);
+ pm_runtime_set_suspended(dev);
+ pm_runtime_put_noidle(dev);
+ dev_pm_domain_detach(dev, true);
+ }
+
+err_probe:
return ret;
}