net/mlx5: mlx5_ifc updates for embedded CPU SRIOV
authorDaniel Jurgens <danielj@nvidia.com>
Mon, 6 Mar 2023 22:27:21 +0000 (00:27 +0200)
committerSaeed Mahameed <saeedm@nvidia.com>
Sat, 10 Jun 2023 01:40:50 +0000 (18:40 -0700)
Add ec_vf_vport_base to HCA Capabilities 2. This indicates the base vport
of embedded CPU virtual functions that are connected to the eswitch.

Add ec_vf_function to query/set_hca_caps. If set this indicates
accessing a virtual function on the embedded CPU by function ID. This
should only be used with other_function set to 1.

Signed-off-by: Daniel Jurgens <danielj@nvidia.com>
Reviewed-by: Bodong Wang <bodong@nvidia.com>
Reviewed-by: William Tu <witu@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
include/linux/mlx5/mlx5_ifc.h

index af3a92a..1f4f62c 100644 (file)
@@ -1992,7 +1992,10 @@ struct mlx5_ifc_cmd_hca_cap_2_bits {
        u8         ts_cqe_metadata_size2wqe_counter[0x5];
        u8         reserved_at_250[0x10];
 
-       u8         reserved_at_260[0x5a0];
+       u8         reserved_at_260[0x120];
+       u8         reserved_at_380[0x10];
+       u8         ec_vf_vport_base[0x10];
+       u8         reserved_at_3a0[0x460];
 };
 
 enum mlx5_ifc_flow_destination_type {
@@ -4805,7 +4808,8 @@ struct mlx5_ifc_set_hca_cap_in_bits {
        u8         op_mod[0x10];
 
        u8         other_function[0x1];
-       u8         reserved_at_41[0xf];
+       u8         ec_vf_function[0x1];
+       u8         reserved_at_42[0xe];
        u8         function_id[0x10];
 
        u8         reserved_at_60[0x20];
@@ -5956,7 +5960,8 @@ struct mlx5_ifc_query_hca_cap_in_bits {
        u8         op_mod[0x10];
 
        u8         other_function[0x1];
-       u8         reserved_at_41[0xf];
+       u8         ec_vf_function[0x1];
+       u8         reserved_at_42[0xe];
        u8         function_id[0x10];
 
        u8         reserved_at_60[0x20];