drm/amdgpu: add support for sdma 5.2.6
authorYifan Zhang <yifan1.zhang@amd.com>
Thu, 10 Feb 2022 19:43:50 +0000 (14:43 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 18 Feb 2022 19:06:59 +0000 (14:06 -0500)
This patch adds support for sdma 5.2.6.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

index 3501ade..4195b83 100644 (file)
@@ -1458,6 +1458,7 @@ static int amdgpu_discovery_set_sdma_ip_blocks(struct amdgpu_device *adev)
        case IP_VERSION(5, 2, 2):
        case IP_VERSION(5, 2, 4):
        case IP_VERSION(5, 2, 5):
+       case IP_VERSION(5, 2, 6):
        case IP_VERSION(5, 2, 3):
        case IP_VERSION(5, 2, 1):
        case IP_VERSION(5, 2, 7):
index 0ca3650..dcc622e 100644 (file)
@@ -51,6 +51,7 @@ MODULE_FIRMWARE("amdgpu/beige_goby_sdma.bin");
 
 MODULE_FIRMWARE("amdgpu/vangogh_sdma.bin");
 MODULE_FIRMWARE("amdgpu/yellow_carp_sdma.bin");
+MODULE_FIRMWARE("amdgpu/sdma_5_2_6.bin");
 MODULE_FIRMWARE("amdgpu/sdma_5_2_7.bin");
 
 #define SDMA1_REG_OFFSET 0x600
@@ -156,10 +157,12 @@ static int sdma_v5_2_init_microcode(struct amdgpu_device *adev)
        case IP_VERSION(5, 2, 3):
                chip_name = "yellow_carp_sdma";
                break;
+       case IP_VERSION(5, 2, 6):
+               chip_name = "sdma_5_2_6";
+               break;
        case IP_VERSION(5, 2, 7):
                chip_name = "sdma_5_2_7";
                break;
-
        default:
                BUG();
        }
@@ -1622,6 +1625,7 @@ static int sdma_v5_2_set_clockgating_state(void *handle,
        case IP_VERSION(5, 2, 1):
        case IP_VERSION(5, 2, 4):
        case IP_VERSION(5, 2, 5):
+       case IP_VERSION(5, 2, 6):
        case IP_VERSION(5, 2, 3):
                sdma_v5_2_update_medium_grain_clock_gating(adev,
                                state == AMD_CG_STATE_GATE);
@@ -1649,6 +1653,11 @@ static void sdma_v5_2_get_clockgating_state(void *handle, u32 *flags)
        if (amdgpu_sriov_vf(adev))
                *flags = 0;
 
+       /* AMD_CG_SUPPORT_SDMA_MGCG */
+       data = RREG32(sdma_v5_2_get_reg_offset(adev, 0, mmSDMA0_CLK_CTRL));
+       if (!(data & SDMA0_CLK_CTRL__CGCG_EN_OVERRIDE_MASK))
+               *flags |= AMD_CG_SUPPORT_SDMA_MGCG;
+
        /* AMD_CG_SUPPORT_SDMA_LS */
        data = RREG32_KIQ(sdma_v5_2_get_reg_offset(adev, 0, mmSDMA0_POWER_CNTL));
        if (data & SDMA0_POWER_CNTL__MEM_POWER_OVERRIDE_MASK)