cache: export clean and invalidate

hack: cache: Fix linker error

diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index 250c83b..abae7ff 100644 (file)
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -200,7 +200,7 @@ ENTRY(v6_flush_kern_dcache_area)
  *     - start   - virtual start address of region
  *     - end     - virtual end address of region
  */
-v6_dma_inv_range:
+ENTRY(v6_dma_inv_range)
 #ifdef CONFIG_DMA_CACHE_RWFO
        ldrb    r2, [r0]                        @ read for ownership
        strb    r2, [r0]                        @ write for ownership
@@ -245,7 +245,7 @@ v6_dma_inv_range:
  *     - start   - virtual start address of region
  *     - end     - virtual end address of region
  */
-v6_dma_clean_range:
+ENTRY(v6_dma_clean_range)
        bic     r0, r0, #D_CACHE_LINE_SIZE - 1
 1:
 #ifdef CONFIG_DMA_CACHE_RWFO

diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 127afe2..6a16d88 100644 (file)
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -361,7 +361,8 @@ ENDPROC(v7_flush_kern_dcache_area)
  *     - start   - virtual start address of region
  *     - end     - virtual end address of region
  */
-v7_dma_inv_range:
+ENTRY(b15_dma_inv_range)
+ENTRY(v7_dma_inv_range)
        dcache_line_size r2, r3
        sub     r3, r2, #1
        tst     r0, r3
@@ -391,7 +392,8 @@ ENDPROC(v7_dma_inv_range)
  *     - start   - virtual start address of region
  *     - end     - virtual end address of region
  */
-v7_dma_clean_range:
+ENTRY(b15_dma_clean_range)
+ENTRY(v7_dma_clean_range)
        dcache_line_size r2, r3
        sub     r3, r2, #1
        bic     r0, r0, r3