drm/amd/display: Stop waiting for vblank during pipe programming
authorMartin Leung <Martin.Leung@amd.com>
Fri, 21 Oct 2022 19:28:52 +0000 (15:28 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 1 Nov 2022 15:47:31 +0000 (11:47 -0400)
[why and how]
This line was originally removed for a compliance issue, but then
reverted as it caused a fringe underflow case.

However, the addition of this line caused a underflow regression
when subVP is on, and it needs to be removed again. We plan to
fix subvp underflow and then re-add in this line. After that,
we will investigate what to do next for the compliance issue.

Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Martin Leung <Martin.Leung@amd.com>
Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

index b465a83..f3334f5 100644 (file)
@@ -1663,7 +1663,6 @@ static void dcn20_program_pipe(
                                pipe_ctx->pipe_dlg_param.vupdate_width);
 
                if (pipe_ctx->stream->mall_stream_config.type != SUBVP_PHANTOM) {
-                       pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VBLANK);
                        pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE);
                }