clk: fractional-divider: keep mwidth and nwidth internally
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tue, 22 Sep 2015 15:54:09 +0000 (18:54 +0300)
committerStephen Boyd <sboyd@codeaurora.org>
Fri, 2 Oct 2015 18:29:46 +0000 (11:29 -0700)
The patch adds mwidth and nwidth fields to the struct clk_fractional_divider
for further usage. While here, use GENMASK() instead of open coding this
functionality.

Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/clk-fractional-divider.c
include/linux/clk-provider.h

index 1af9c1e..0282c76 100644 (file)
@@ -128,9 +128,11 @@ struct clk *clk_register_fractional_divider(struct device *dev,
 
        fd->reg = reg;
        fd->mshift = mshift;
-       fd->mmask = (BIT(mwidth) - 1) << mshift;
+       fd->mwidth = mwidth;
+       fd->mmask = GENMASK(mwidth - 1, 0) << mshift;
        fd->nshift = nshift;
-       fd->nmask = (BIT(nwidth) - 1) << nshift;
+       fd->nwidth = nwidth;
+       fd->nmask = GENMASK(nwidth - 1, 0) << nshift;
        fd->flags = clk_divider_flags;
        fd->lock = lock;
        fd->hw.init = &init;
index 3ecc07d..8ff43eb 100644 (file)
@@ -500,13 +500,14 @@ struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
  *
  * Clock with adjustable fractional divider affecting its output frequency.
  */
-
 struct clk_fractional_divider {
        struct clk_hw   hw;
        void __iomem    *reg;
        u8              mshift;
+       u8              mwidth;
        u32             mmask;
        u8              nshift;
+       u8              nwidth;
        u32             nmask;
        u8              flags;
        spinlock_t      *lock;