arm64/sme: Generate SMPRI_EL1 definitions

Convert SMPRI_EL1 to be generated. No functional change.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20220510161208.631259-11-broonie@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 2a9468d..b4affc3 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -215,7 +215,6 @@
 
 #define SYS_ZCR_EL1                    sys_reg(3, 0, 1, 2, 0)
 #define SYS_TRFCR_EL1                  sys_reg(3, 0, 1, 2, 1)
-#define SYS_SMPRI_EL1                  sys_reg(3, 0, 1, 2, 4)
 
 #define SYS_TCR_EL1                    sys_reg(3, 0, 2, 0, 2)
 
@@ -406,8 +405,6 @@
 #define TRBIDR_ALIGN_MASK              GENMASK(3, 0)
 #define TRBIDR_ALIGN_SHIFT             0
 
-#define SMPRI_EL1_PRIORITY_MASK                0xf
-
 #define SYS_PMINTENSET_EL1             sys_reg(3, 0, 9, 14, 1)
 #define SYS_PMINTENCLR_EL1             sys_reg(3, 0, 9, 14, 2)
 

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 2cdcdac..d29bc42 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -185,6 +185,11 @@ Field      1       A
 Field  0       M
 EndSysreg
 
+Sysreg SMPRI_EL1       3       0       1       2       4
+Res0   63:4
+Field  3:0     PRIORITY
+EndSysreg
+
 SysregFields   SMCR_ELx
 Res0   63:32
 Field  31      FA64