PCI: pci-bridge-emul: Add description for class_revision field
authorPali Rohár <pali@kernel.org>
Tue, 30 Nov 2021 17:29:03 +0000 (18:29 +0100)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Thu, 2 Dec 2021 09:55:48 +0000 (09:55 +0000)
The current assignment to the class_revision member

  class_revision |= cpu_to_le32(PCI_CLASS_BRIDGE_PCI << 16);

can make the reader think that class is at high 16 bits of the member and
revision at low 16 bits.

In reality, class is at high 24 bits, but the class for PCI Bridge Normal
Decode is PCI_CLASS_BRIDGE_PCI << 8.

Change the assignment and add a comment to make this clearer.

Link: https://lore.kernel.org/r/20211130172913.9727-2-kabel@kernel.org
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
drivers/pci/pci-bridge-emul.c

index db97cdd..a4af1a5 100644 (file)
@@ -265,7 +265,11 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
 {
        BUILD_BUG_ON(sizeof(bridge->conf) != PCI_BRIDGE_CONF_END);
 
-       bridge->conf.class_revision |= cpu_to_le32(PCI_CLASS_BRIDGE_PCI << 16);
+       /*
+        * class_revision: Class is high 24 bits and revision is low 8 bit of this member,
+        * while class for PCI Bridge Normal Decode has the 24-bit value: PCI_CLASS_BRIDGE_PCI << 8
+        */
+       bridge->conf.class_revision |= cpu_to_le32((PCI_CLASS_BRIDGE_PCI << 8) << 8);
        bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
        bridge->conf.cache_line_size = 0x10;
        bridge->conf.status = cpu_to_le16(PCI_STATUS_CAP_LIST);