x86: Add cpu code for x86_64

There is not much needed at present, but set up a separate directory to put
this code as it grows.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 41ad481..7f89ff0 100644 (file)
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -38,6 +38,8 @@ obj-$(CONFIG_PCI) += pci.o
 obj-$(CONFIG_SMP) += sipi_vector.o
 obj-y += turbo.o
 
-ifeq ($(CONFIG_$(SPL_)X86_64),)
+ifeq ($(CONFIG_$(SPL_)X86_64),y)
+obj-y += x86_64/
+else
 obj-y += i386/
 endif

diff --git a/arch/x86/cpu/x86_64/Makefile b/arch/x86/cpu/x86_64/Makefile
new file mode 100644 (file)
index 0000000..4b06386
--- /dev/null
+++ b/arch/x86/cpu/x86_64/Makefile
@@ -0,0 +1,6 @@
+#
+# (C) Copyright 2016 Google, Inc
+# Written by Simon Glass <sjg@chromium.org>
+#
+
+obj-y += cpu.o interrupts.o

diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c
new file mode 100644 (file)
index 0000000..b12eab1
--- /dev/null
+++ b/arch/x86/cpu/x86_64/cpu.c
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2016 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+
+int cpu_has_64bit(void)
+{
+       return true;
+}
+
+void enable_caches(void)
+{
+       /* Not implemented */
+}
+
+void disable_caches(void)
+{
+       /* Not implemented */
+}
+
+int dcache_status(void)
+{
+       return true;
+}
+
+int x86_mp_init(void)
+{
+       /* Not implemented */
+       return 0;
+}

diff --git a/arch/x86/cpu/x86_64/interrupts.c b/arch/x86/cpu/x86_64/interrupts.c
new file mode 100644 (file)
index 0000000..3e06173
--- /dev/null
+++ b/arch/x86/cpu/x86_64/interrupts.c
@@ -0,0 +1,29 @@
+/*
+ * (C) Copyright 2016 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/processor-flags.h>
+
+void enable_interrupts(void)
+{
+       asm("sti\n");
+}
+
+int disable_interrupts(void)
+{
+       long flags;
+
+       asm volatile ("pushfq ; popq %0 ; cli\n" : "=g" (flags) : );
+
+       return flags & X86_EFLAGS_IF;
+}
+
+int interrupt_init(void)
+{
+       /* Nothing to do - this was already done in SPL */
+       return 0;
+}