drm/amd/display: Workaround IGT multiplane restriction

IGT currently does not properly commit changes on planes with multiple
possible CRTC's. Set one valid CRTC for each plane for now, plus one
underlay plane on Carizzo and Stoney that is valid for all CRTCs.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 98e0dbe..f018de2 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1189,6 +1189,7 @@ int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
        struct amdgpu_encoder *aencoder = NULL;
        struct amdgpu_mode_info *mode_info = &adev->mode_info;
        uint32_t link_cnt;
+       unsigned long possible_crtcs;
 
        link_cnt = dm->dc->caps.max_links;
        if (amdgpu_dm_mode_config_init(dm->adev)) {
@@ -1204,7 +1205,18 @@ int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
                        goto fail_free_planes;
                }
                mode_info->planes[i]->base.type = mode_info->plane_type[i];
-               if (amdgpu_dm_plane_init(dm, mode_info->planes[i], 0xff)) {
+
+               /*
+                * HACK: IGT tests expect that each plane can only have one
+                * one possible CRTC. For now, set one CRTC for each
+                * plane that is not an underlay, but still allow multiple
+                * CRTCs for underlay planes.
+                */
+               possible_crtcs = 1 << i;
+               if (i >= dm->dc->caps.max_streams)
+                       possible_crtcs = 0xff;
+
+               if (amdgpu_dm_plane_init(dm, mode_info->planes[i], possible_crtcs)) {
                        DRM_ERROR("KMS: Failed to initialize plane\n");
                        goto fail_free_planes;
                }