unsigned int hda_fmt;
};
+/* rate = base * mult / div */
+#define HDA_RATE(base, mult, div) \
+ (AC_FMT_BASE_##base##K | (((mult) - 1) << AC_FMT_MULT_SHIFT) | \
+ (((div) - 1) << AC_FMT_DIV_SHIFT))
+
static struct hda_rate_tbl rate_bits[] = {
/* rate in Hz, ALSA rate bitmask, HDA format value */
/* autodetected value used in snd_hda_query_supported_pcm */
- { 8000, SNDRV_PCM_RATE_8000, 0x0500 }, /* 1/6 x 48 */
- { 11025, SNDRV_PCM_RATE_11025, 0x4300 }, /* 1/4 x 44 */
- { 16000, SNDRV_PCM_RATE_16000, 0x0200 }, /* 1/3 x 48 */
- { 22050, SNDRV_PCM_RATE_22050, 0x4100 }, /* 1/2 x 44 */
- { 32000, SNDRV_PCM_RATE_32000, 0x0a00 }, /* 2/3 x 48 */
- { 44100, SNDRV_PCM_RATE_44100, 0x4000 }, /* 44 */
- { 48000, SNDRV_PCM_RATE_48000, 0x0000 }, /* 48 */
- { 88200, SNDRV_PCM_RATE_88200, 0x4800 }, /* 2 x 44 */
- { 96000, SNDRV_PCM_RATE_96000, 0x0800 }, /* 2 x 48 */
- { 176400, SNDRV_PCM_RATE_176400, 0x5800 },/* 4 x 44 */
- { 192000, SNDRV_PCM_RATE_192000, 0x1800 }, /* 4 x 48 */
+ { 8000, SNDRV_PCM_RATE_8000, HDA_RATE(48, 1, 6) },
+ { 11025, SNDRV_PCM_RATE_11025, HDA_RATE(44, 1, 4) },
+ { 16000, SNDRV_PCM_RATE_16000, HDA_RATE(48, 1, 3) },
+ { 22050, SNDRV_PCM_RATE_22050, HDA_RATE(44, 1, 2) },
+ { 32000, SNDRV_PCM_RATE_32000, HDA_RATE(48, 2, 3) },
+ { 44100, SNDRV_PCM_RATE_44100, HDA_RATE(44, 1, 1) },
+ { 48000, SNDRV_PCM_RATE_48000, HDA_RATE(48, 1, 1) },
+ { 88200, SNDRV_PCM_RATE_88200, HDA_RATE(44, 2, 1) },
+ { 96000, SNDRV_PCM_RATE_96000, HDA_RATE(48, 2, 1) },
+ { 176400, SNDRV_PCM_RATE_176400, HDA_RATE(44, 4, 1) },
+ { 192000, SNDRV_PCM_RATE_192000, HDA_RATE(48, 4, 1) },
#define AC_PAR_PCM_RATE_BITS 11
/* up to bits 10, 384kHZ isn't supported properly */
/* not autodetected value */
- { 9600, SNDRV_PCM_RATE_KNOT, 0x0400 }, /* 1/5 x 48 */
+ { 9600, SNDRV_PCM_RATE_KNOT, HDA_RATE(48, 1, 5) },
{ 0 } /* terminator */
};
switch (snd_pcm_format_width(format)) {
case 8:
- val |= 0x00;
+ val |= AC_FMT_BITS_8;
break;
case 16:
- val |= 0x10;
+ val |= AC_FMT_BITS_16;
break;
case 20:
case 24:
case 32:
if (maxbps >= 32 || format == SNDRV_PCM_FORMAT_FLOAT_LE)
- val |= 0x40;
+ val |= AC_FMT_BITS_32;
else if (maxbps >= 24)
- val |= 0x30;
+ val |= AC_FMT_BITS_24;
else
- val |= 0x20;
+ val |= AC_FMT_BITS_20;
break;
default:
snd_printdd("invalid format width %d\n",
}
if (spdif_ctls & AC_DIG1_NONAUDIO)
- val |= 0x8000;
+ val |= AC_FMT_TYPE_NON_PCM;
return val;
}
/* Input converter SDI select */
#define AC_SDI_SELECT (0xf<<0)
+/* stream format id */
+#define AC_FMT_CHAN_SHIFT 0
+#define AC_FMT_CHAN_MASK (0x0f << 0)
+#define AC_FMT_BITS_SHIFT 4
+#define AC_FMT_BITS_MASK (7 << 4)
+#define AC_FMT_BITS_8 (0 << 4)
+#define AC_FMT_BITS_16 (1 << 4)
+#define AC_FMT_BITS_20 (2 << 4)
+#define AC_FMT_BITS_24 (3 << 4)
+#define AC_FMT_BITS_32 (4 << 4)
+#define AC_FMT_DIV_SHIFT 8
+#define AC_FMT_DIV_MASK (7 << 8)
+#define AC_FMT_MULT_SHIFT 11
+#define AC_FMT_MULT_MASK (7 << 11)
+#define AC_FMT_BASE_SHIFT 14
+#define AC_FMT_BASE_48K (0 << 14)
+#define AC_FMT_BASE_44K (1 << 14)
+#define AC_FMT_TYPE_SHIFT 15
+#define AC_FMT_TYPE_PCM (0 << 15)
+#define AC_FMT_TYPE_NON_PCM (1 << 15)
+
/* Unsolicited response control */
#define AC_UNSOL_TAG (0x3f<<0)
#define AC_UNSOL_ENABLED (1<<7)
* Callbacks
*/
+/* HBR should be Non-PCM, 8 channels */
+#define is_hbr_format(format) \
+ ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
+
static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t nid,
u32 stream_tag, int format)
{
AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
new_pinctl = pinctl & ~AC_PINCTL_EPT;
- /* Non-PCM, 8 channels */
- if ((format & 0x8000) && (format & 0x0f) == 7)
+ if (is_hbr_format(format))
new_pinctl |= AC_PINCTL_EPT_HBR;
else
new_pinctl |= AC_PINCTL_EPT_NATIVE;
new_pinctl);
}
- if ((format & 0x8000) && (format & 0x0f) == 7 && !new_pinctl) {
+ if (is_hbr_format(format) && !new_pinctl) {
snd_printdd("hdmi_setup_stream: HBR is not supported\n");
return -EINVAL;
}