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clk: qcom: dispcc-qcm2290: Fix BI_TCXO_AO handling
author
Konrad Dybcio
<konrad.dybcio@linaro.org>
Fri, 14 Apr 2023 11:06:35 +0000
(13:06 +0200)
committer
Bjorn Andersson
<andersson@kernel.org>
Fri, 26 May 2023 20:26:02 +0000
(13:26 -0700)
BI_TCXO_AO (.fw_name = "bi_tcxo_ao") was previously made to reuse the
same parent enum entry as BI_TCXO (.fw_name = "bi_tcxo") in parent_map_2.
Resolve it by introducing its own entry in the parent enum and
correctly assigning it in disp_cc_parent_map_2[].
Fixes: cc517ea3333f ("clk: qcom: Add display clock controller driver for QCM2290")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link:
https://lore.kernel.org/r/20230412-topic-qcm_dispcc-v2-1-bce7dd512fe4@linaro.org
drivers/clk/qcom/dispcc-qcm2290.c
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diff --git
a/drivers/clk/qcom/dispcc-qcm2290.c
b/drivers/clk/qcom/dispcc-qcm2290.c
index e9cfe41c04426760bacd43cbc81cc472dee6e17c..ee62aca4e5bb205af0b583386f79b70503d17a9c 100644
(file)
--- a/
drivers/clk/qcom/dispcc-qcm2290.c
+++ b/
drivers/clk/qcom/dispcc-qcm2290.c
@@
-24,6
+24,7
@@
enum {
P_BI_TCXO,
+ P_BI_TCXO_AO,
P_DISP_CC_PLL0_OUT_MAIN,
P_DSI0_PHY_PLL_OUT_BYTECLK,
P_DSI0_PHY_PLL_OUT_DSICLK,
@@
-82,7
+83,7
@@
static const struct clk_parent_data disp_cc_parent_data_1[] = {
};
static const struct parent_map disp_cc_parent_map_2[] = {
- { P_BI_TCXO, 0 },
+ { P_BI_TCXO
_AO
, 0 },
{ P_GPLL0_OUT_MAIN, 4 },
};
@@
-151,7
+152,7
@@
static struct clk_regmap_div disp_cc_mdss_byte0_div_clk_src = {
};
static const struct freq_tbl ftbl_disp_cc_mdss_ahb_clk_src[] = {
- F(19200000, P_BI_TCXO, 1, 0, 0),
+ F(19200000, P_BI_TCXO
_AO
, 1, 0, 0),
F(37500000, P_GPLL0_OUT_MAIN, 8, 0, 0),
F(75000000, P_GPLL0_OUT_MAIN, 4, 0, 0),
{ }